Motor control device and motor control method

Abstract

This motor control device comprises: at least one processor that executes a calculation for controlling a motor in accordance with a program; a determination unit that determines whether the operation of the processor is normal or not; a hardware logic circuit that executes processing simpler than the calculation performed by the processor and generates a limp home control signal for controlling the motor; and a switch that switches an output to continue outputting the calculation result of the processor in a normal state in which the operation of the processor is determined to be normal by the determination unit and to output the limp home control signal generated by the hardware logic circuit in an abnormal state in which the operation of the processor is determined to be abnormal by the determination unit. The hardware logic circuit generates the limp home control signal in parallel with the calculation performed by the processor even in the normal state and continuously outputs the limp home control signal after the switch switches the output to the limp home control signal.

Description

Motor control device and motor control method

[0001] The present disclosure relates to a motor control device and a motor control method.

[0002] Some mobile devices such as UAVs (Unmanned Aerial Vehicles) including drones, electric vehicles, and mobile robots have an electric motor as a power source. Even when an abnormality occurs in the control system of the electric motor, it is preferable that the drive can be automatically and safely continued. When continuing the drive, it is conceivable to switch to a control method simpler than the normal drive. A simple control method is a control method in which the mobile device can continue driving for at least a certain distance.

[0003] Japanese Patent Laid-Open No. 10-14300 discloses a control method switching device for an electric vehicle. When a sensor failure of a motor occurs, this control method switching device switches the control method of the motor from a vector control method to a V / F control method or a sensorless vector control method.

[0004] Japanese Patent Laid-Open No. 2009-140213 discloses a control system that collates the outputs of two microprocessors mounted on a single chip. One control system disclosed in Patent Document 2 stops the two microprocessors or restores one microprocessor from a recoverable point when the collation result is abnormal. Another control system disclosed in Japanese Patent Laid-Open No. 2009-140213 stops the operation of a device using the output of a microprocessor when the collation result is abnormal. Another control system disclosed in Patent Document 2 uses the output of a microprocessor mounted on another chip when the collation result is abnormal.

[0005] Japanese Patent Gazette: Japanese Patent Laid-Open No. 10-14300 Gazette Japanese Patent Gazette: Japanese Patent Laid-Open No. 2009-140213 Gazette

[0006] When switching the control of a motor used in a moving device to continue driving the motor, it is preferable that the change in motor rotation before and after the switch be smooth. If the change in motor rotation is smooth, the impact on the moving device is minimized and the load on the motor's drive circuit is reduced.

[0007] Therefore, the present disclosure aims to provide a motor control device and a motor control method that can switch the motor control so that the change in motor rotation before and after switching is smooth when the processor controlling the motor is malfunctioning.

[0008] One aspect of the present disclosure provides a motor control device. The motor control device includes at least one processor that performs calculations to control a motor according to a program; a determination unit that determines whether the operation of the processor is normal or not; a hardware logic circuit that performs a simpler process than the calculations of the processor to generate a limp home control signal for controlling the motor; and a switch that continuously outputs the calculation results of the processor when the determination unit determines that the operation of the processor is normal, and outputs the limp home control signal generated by the hardware logic circuit when the determination unit determines that the operation of the processor is abnormal. The hardware logic circuit generates the limp home control signal in parallel with the calculations of the processor from the normal state, and continues to output the limp home control signal after the switch switches its output to the limp home control signal.

[0009] According to an aspect of this disclosure, in a normal state where the processor controlling the motor is operating normally, the switch outputs the processor's calculation result. When the processor controlling the motor enters an abnormal state, the switch outputs a limp home control signal generated by the hardware logic circuit. In this way, if the processor is abnormal, the motor control can be switched. Since the hardware logic circuit generates the limp home control signal in parallel with the processor's calculations from the normal state, the change in motor rotation becomes smooth even when the motor control is switched. Therefore, the impact on the moving device is minimized, and the load on the motor drive circuit is reduced.

[0010] Figure 1 is a block diagram showing a motor control system including a motor control device according to an embodiment of this disclosure. Figure 2 is a flowchart showing an example of a motor control method according to an embodiment. Figure 3 is a block diagram showing a motor control system including a motor control device according to a modified embodiment. Figure 4 is a block diagram showing a motor control system including a motor control device according to another modified embodiment. Figure 5 is a block diagram showing a motor control system including a motor control device according to another modified embodiment. Figure 6 is a block diagram showing a motor control system including a motor control device according to another modified embodiment. Figure 7 is a time chart showing an example of operation in the motor control system of Figure 6. Figure 8 is a block diagram showing a motor control system including a motor control device according to another modified embodiment.

[0011] Embodiments of the present disclosure will be described below with reference to the attached drawings. Figure 1 shows a motor control system including a motor control device 1 according to an embodiment of the present disclosure. The illustrated motor control system is provided in a mobile device. The mobile device may be a UAV, an electric vehicle, or a mobile robot. The motor control device 1 according to the embodiment supplies a PWM (Pulse Width Modulation) drive signal to an inverter 20. The inverter 20 drives an electric motor 10 (hereinafter referred to as "motor 10") according to the PWM drive signal.

[0012] As shown in Figure 1, the motor control device 1 comprises two CPUs (Central Processing Units) 2A and 2B, two memories 3A and 3B, a comparator (decision unit) 4, a backup control circuit (hardware logic circuit) 5, and a calculation / switch circuit 6. The CPUs (processors) 2A and 2B, memories 3A and 3B, comparator 4, backup control circuit 5, and calculation / switch circuit 6 are integrated into a single-chip microcomputer 7. That is, they are provided on a single circuit board.

[0013] CPU 2A performs calculations to control the motor 10 according to a computer program (hereinafter referred to as "the program"). CPU 2B also performs calculations to control the motor 10 according to the program. Each CPU is supplied with a torque command and a current angular position signal of the motor 10. The torque command indicates the torque required for the motor 10. The current angular position signal indicates the current rotational angular position of the motor 10. Based on the torque command and the current angular position signal, each CPU calculates a voltage command value for each target angular position of the motor 10 according to the program. Furthermore, based on the voltage command value for each target angular position, each CPU performs calculations according to the program to sequentially calculate the PWM drive signal for controlling the motor 10.

[0014] Torque commands are supplied to the motor control device 1 from devices other than the motor control device 1. For example, in an electric vehicle, torque commands are supplied to the motor control device 1 from the accelerator device. The current angular position signal is supplied to the motor control device 1 from the sensor 30. The sensor 30 may be an angle sensor (e.g., a resolver) that measures the rotation angle of the motor 10. Instead of the sensor 30, a current sensor that measures the current supplied to the motor 10 may be used. In this case, a device is provided that calculates or estimates the angle from the current, and the current angular position signal is supplied to the motor control device 1 from this device.

[0015] CPUs 2A and 2B perform calculations in parallel. The operation of CPU 2B is synchronized with the operation of CPU 2A. Here, "synchronization" includes the complete temporal synchronization of the operations of CPUs 2A and 2B, but also includes a short, predetermined time difference (e.g., half a clock cycle) between the operations of CPUs 2A and 2B.

[0016] The two memories 3A and 3B are connected to CPUs 2A and 2B via different buses. Memory 3A stores the program used by CPU 2A. Memory 3B stores the program used by CPU 2B. That is, CPU 2A reads the program stored in memory 3A and operates according to that program. CPU 2B reads the program stored in memory 3B and operates according to that program. In this embodiment, the programs stored in memories 3A and 3B are software that derives voltage command values ​​for each target angular position from the torque command and the current angular position signal, and calculates sequential PWM drive signals based on the voltage command values ​​for each target angular position. That is, the programs stored in memories 3A and 3B are software capable of sequentially calculating PWM drive signals to control the motor 10.

[0017] Memories 3A and 3B are non-volatile flash memories, and their programs are rewritable. The specifications of the program stored in memory 3B are identical to those of the program stored in memory 3A. Therefore, CPUs 2A and 2B perform the same calculations to control the motor 10, following essentially the same program. Since the operation of CPU 2B is synchronized with the operation of CPU 2A, under normal conditions, CPUs 2A and 2B synchronously output the same calculation results.

[0018] However, due to factors such as noise or surges, the program or data stored in memory 3A or 3B may be replaced with something different from the original. If the program or data stored in memory 3B differs from the program or data stored in memory 3A, the calculation results of CPU 2A and 2B may differ. This is one example of a state in which either CPU 2A or 2B becomes abnormal. Furthermore, even if the programs stored in memory 3A and 3B remain the same, if either CPU 2A or 2B becomes abnormal due to other factors, the calculation results of CPU 2A and 2B may differ. The same applies even if the programs stored in memory 3A and 3B are unrewritable.

[0019] Comparator 4 is a circuit that compares the calculation results output from CPUs 2A and 2B. The calculation results compared by comparator 4 may be, for example, PWM drive signals calculated by CPUs 2A and 2B. If the operation of CPUs 2A and 2B is delayed by a predetermined time, a buffer or delay circuit (not shown) is provided so that the calculation result of CPU 2A and the corresponding calculation result of CPU 2B are input to comparator 4 simultaneously. If noise or surges affect CPUs 2A and 2B simultaneously, both CPUs 2A and 2B may enter an abnormal state at the same time, but the calculation results of CPUs 2A and 2B may still be the same. Therefore, the operation of CPUs 2A and 2B may be delayed by a predetermined time.

[0020] In this embodiment, the operation of CPUs 2A and 2B is determined by comparing their calculation results. That is, if the calculation results of CPUs 2A and 2B match, the operation of CPUs 2A and 2B can be determined to be normal. On the other hand, if the calculation results of CPUs 2A and 2B differ, the operation of at least one of CPUs 2A and 2B is abnormal. The output of comparator 4 when the calculation results of CPUs 2A and 2B differ is different from the output of comparator 4 when the calculation results of CPUs 2A and 2B match. The output of comparator 4 when the calculation results of CPUs 2A and 2B differ is called an "error flag". In other words, when the calculation results of CPUs 2A and 2B differ, comparator 4 outputs an error flag.

[0021] The backup control circuit 5 is provided to safely continue driving the motor 10 if the operation of at least one of the CPUs 2A and 2B is in an abnormal state. The backup control circuit 5 is a circuit comprising transistors and other electrical components, such as an ASIC (Application Specific Integrated Circuit). The backup control circuit 5 may also be a programmable logic device.

[0022] The torque command and the current angular position signal of the motor 10 are supplied not only to each CPU but also to the backup control circuit 5. The backup control circuit 5 processes the torque command and the current angular position signal to calculate the voltage command value for each target angular position of the motor 10. Furthermore, the backup control circuit 5 performs calculations from the voltage command value for each target angular position to sequentially calculate the PWM drive signal that controls the motor 10. The backup control circuit 5 generates a limp home control signal (limp home mode control signal) that indicates the PWM drive signal.

[0023] The processing performed by the hardware backup control circuit 5 is simpler than the calculations performed by CPUs 2A and 2B. This is in contrast to the CPUs, which perform complex calculations according to a program, i.e., software. For example, the calculation of a PWM drive signal that the backup control circuit 5 can perform is simpler than the calculation of a PWM drive signal that CPUs 2A and 2B can perform. In addition to CPUs 2A and 2B calculating the PWM drive signal, the backup control circuit 5 also calculates the PWM drive signal, so in this embodiment, there is no need to provide a dedicated element for calculating the PWM drive signal. That is, the PWM calculation logic circuit 8 shown in Figure 3 and the FOC / PWM calculation logic circuit 9 shown in Figure 4 are unnecessary.

[0024] In order to immediately supply a limp home control signal in the event of a malfunction in CPU 2A or 2B, the backup control circuit 5 continuously generates a limp home control signal from a normal state (even before a malfunction occurs) in parallel with the calculations of CPUs 2A and 2B.

[0025] The calculation / switch circuit 6 is a circuit that performs the functions of both a switch and a calculation circuit. The calculation / switch circuit 6 is supplied with the calculation result output by either CPU 2A or 2B. In the following description, it is assumed that the calculation result of CPU 2A is supplied to the calculation / switch circuit 6. The calculation result supplied to the calculation / switch circuit 6 may consist only of the PWM drive signal calculated by CPU 2A, but in this embodiment, it also includes the voltage command value for each target angular position derived by CPU 2A. The calculation / switch circuit 6 is also supplied with the limp home control signal (indicating the PWM drive signal) output by the backup control circuit 5. In this embodiment, the voltage command value for each target angular position derived by the backup control circuit 5 is also supplied to the calculation / switch circuit 6. Furthermore, if the calculation results of CPU 2A and 2B are different, an error flag output from the comparator 4 is supplied to the calculation / switch circuit 6.

[0026] The calculation / switch circuit 6 functions as a switch, switching its output to either the calculation result generated by the CPU 2A or the limp home control signal generated by the backup control circuit 5. Specifically, in a normal state where the difference between the outputs of CPUs 2A and 2B is within an acceptable range (in this embodiment, the calculation results of CPUs 2A and 2B match), the calculation / switch circuit 6 continues to output the calculation result of CPU 2A (PWM drive signal). When an abnormal state occurs where the difference between the outputs of CPUs 2A and 2B is not within an acceptable range (in this embodiment, the calculation results of CPUs 2A and 2B are different), the calculation / switch circuit 6 outputs the limp home control signal generated by the backup control circuit 5. After the calculation / switch circuit 6 switches its output to the limp home control signal, the backup control circuit 5 continues to output the limp home control signal.

[0027] Thus, the calculation result (PWM drive signal) generated by CPU 2A is the control signal for motor 10 in a normal state (normal mode). On the other hand, the limp-home control signal generated by backup control circuit 5 is the control signal for motor 10 in an abnormal state (limp-home mode). The calculation result (PWM drive signal) from CPU 2A output from calculation / switch circuit 6 or the limp-home control signal from backup control circuit 5 is supplied to the driver 22 of inverter 20. That is, when CPU 2A and 2B are operating in a normal state, the calculation result from CPU 2A is supplied from calculation / switch circuit 6 to driver 22. When CPU 2A or 2B is operating in an abnormal state, the limp-home control signal from backup control circuit 5 is supplied from calculation / switch circuit 6 to driver 22.

[0028] The inverter 20 comprises a driver 22 and a power device 24. The inverter 20 drives the motor 10 based on the calculation result of the CPU 2A or the limp home control signal of the backup control circuit 5. That is, the inverter 20 drives the motor 10 according to the PWM drive signal, which is the calculation result of the CPU 2A or the PWM drive signal indicated by the limp home control signal of the backup control circuit 5.

[0029] According to this embodiment, in a normal state where CPUs 2A and 2B are operating normally, the difference between the outputs of CPUs 2A and 2B is within an acceptable range, and the calculation / switch circuit 6 outputs the calculation result of CPU 2A. When the operation of CPU 2A or 2B becomes abnormal, the difference between the outputs of CPUs 2A and 2B is no longer within an acceptable range, and the calculation / switch circuit 6 outputs a limp home control signal generated by the backup control circuit 5. In this way, when the operation of CPU 2A or 2B is abnormal, the control of the motor 10 can be switched.

[0030] CPUs 2A and 2B operate according to a program, i.e., software, and can flexibly perform complex calculations. However, the operation of CPUs 2A and 2B is susceptible to noise. On the other hand, the backup control circuit 5 is hardware and, unlike software, is not suitable for complex processing, but it is highly robust. After the operation of CPU 2A or 2B becomes abnormal, the limp home control signal generated by the backup control circuit 5 is used to control the motor 10, so the motor 10 can be safely driven continuously.

[0031] The backup control circuit 5 generates a limp home control signal in parallel with the calculations of CPUs 2A and 2B from the normal state, so that even if the control of the motor 10 is switched, the rotational change of the motor 10 becomes smooth. Therefore, the impact on the moving device on which the motor 10 is mounted is minimized, and the load on the drive circuit (power device 24) of the motor 10 is reduced.

[0032] The backup control circuit 5 is supplied with a current angular position signal indicating the current rotational angular position of the motor 10. The backup control circuit 5 refers to the current angular position signal and generates a limp home control signal that matches the current rotational angular position of the motor 10. The calculations of CPUs 2A and 2B are also based on the current angular position signal. Therefore, the backup control circuit 5 generates the limp home control signal in parallel with and synchronous with the calculations of CPUs 2A and 2B. As a result, when the calculation / switch circuit 6 switches its output from the calculation result of CPU 2A to the limp home control signal, the rotational change of the motor 10 becomes smooth.

[0033] In this embodiment, under normal conditions where CPUs 2A and 2B are operating normally, the calculation / switch circuit 6 functions as a calculation circuit and, for example, calculates the voltage difference. The voltage difference is the difference between the voltage command value corresponding to the calculation result of CPU 2A and the voltage command value corresponding to the limp home control signal from the backup control circuit 5. The voltage command value corresponding to the calculation result of CPU 2A indicates the voltage derived by CPU 2A. The voltage command value corresponding to the limp home control signal indicates the voltage derived by the backup control circuit 5.

[0034] Under normal conditions, the voltage difference calculated by the calculation / switch circuit 6 is supplied to the backup control circuit 5. The backup control circuit 5 generates a limp-home control signal to make the difference in effective voltage values ​​for one cycle zero. That is, the backup control circuit 5 calculates the voltage command value to make the difference in effective voltage values ​​for one cycle zero, and calculates the PWM drive signal to control the motor 10 from the voltage command value for each target angular position. As a result, when the calculation / switch circuit 6 switches its output from the calculation result of the CPU 2A to the limp-home control signal, the rotational change of the motor 10 becomes smoother. Therefore, the impact on the moving device on which the motor 10 is mounted is minimized, and the load on the power device 24 is reduced. Reducing the voltage difference is performed at least when the calculation / switch circuit 6 switches its output from the calculation result of the CPU 2A to the limp-home control signal. That is, at least when switching the control of the motor 10, the backup control circuit 5 reduces the voltage difference that was last calculated under normal conditions.

[0035] Furthermore, under normal conditions, the calculation / switch circuit 6 functions as a calculation circuit, for example, calculating the position difference. The position difference is the difference between the rotational angle position of the motor 10 corresponding to the calculation result of the CPU 2A and the rotational angle position of the motor 10 corresponding to the limp home control signal from the backup control circuit 5. The rotational angle position of the motor 10 corresponding to the calculation result of the CPU 2A is the target angle position of the motor 10 derived by the CPU 2A. The rotational angle position of the motor 10 corresponding to the limp home control signal is the target angle position of the motor 10 derived by the backup control circuit 5.

[0036] Under normal conditions, the position difference calculated by the calculation / switch circuit 6 is supplied to the backup control circuit 5. The backup control circuit 5 generates a limp home control signal to reduce the position difference (preferably to make the position difference zero). That is, the backup control circuit 5 calculates the target angular position to reduce the position difference (preferably to make the position difference zero), and calculates a PWM drive signal to control the motor 10 from the voltage command value for each target angular position. Therefore, when the calculation / switch circuit 6 switches its output from the calculation result of the CPU 2A to the limp home control signal, the rotational change of the motor 10 becomes smoother. As a result, the impact on the moving device on which the motor 10 is mounted is minimized, and the load on the power device 24 is reduced. Reducing the position difference is performed at least when the calculation / switch circuit 6 switches its output from the calculation result of the CPU 2A to the limp home control signal. That is, at least when switching the control of the motor 10, the backup control circuit 5 reduces the position difference that was last calculated under normal conditions.

[0037] If the calculation results of CPUs 2A and 2B differ and an abnormal state occurs, the output of the calculation / switch circuit 6 is switched, and thereafter, the calculation results of CPUs 2A and 2B are not used to control the motor 10. CPUs 2A and 2B may continue calculations even after the output of the calculation / switch circuit 6 is switched. However, preferably, when an abnormal state occurs, the calculation / switch circuit 6 supplies a stop signal to CPUs 2A and 2B, stopping the operation of both CPUs 2A and 2B. By stopping the operation of CPUs 2A and 2B, thermal damage to CPUs 2A and 2B caused by unstable continued operation can be prevented. However, when an abnormal state occurs, the calculation / switch circuit 6 may supply a reset signal or a forced interrupt signal to CPUs 2A and 2B, restarting the operation of both CPUs 2A and 2B. This allows both CPUs 2A and 2B to return to normal operation.

[0038] Preferably, after the calculation / switch circuit 6 switches its output to a limp-home control signal, the backup control circuit 5 generates a limp-home control signal to gradually decelerate the motor 10. That is, after the calculation / switch circuit 6 switches its output to a limp-home control signal, it is preferable that the backup control circuit 5 generates a limp-home control signal that causes the motor 10 to decelerate over time. This prevents or reduces sudden changes in the torque of the motor 10, allowing the moving device to continue moving safely. For example, after the calculation / switch circuit 6 switches its output to a limp-home control signal, the backup control circuit 5 may calculate the voltage command value such that the voltage command value gradually decreases over time. The backup control circuit 5 may then calculate a PWM drive signal to control the motor 10 from the gradually decreasing voltage command value.

[0039] After the calculation / switch circuit 6 switches its output to a limp home control signal, the backup control circuit 5 may generate the limp home control signal for a predetermined short time. This predetermined short time corresponds to a certain distance (for example, several meters to several kilometers). Therefore, after an abnormal condition occurs, the mobile device can continue moving for a certain distance.

[0040] In this embodiment, the CPUs 2A and 2B, memories 3A and 3B, comparator 4, backup control circuit 5, and calculation / switch circuit 6 are integrated into a single-chip microcomputer 7. That is, they are provided on a single substrate. Therefore, the motor control device 1 is easy to handle. Also in this embodiment, the calculation / switch circuit 6 performs the functions of both a switch and a calculation circuit. In other words, the switch and calculation circuit are integrated into a single circuit. Therefore, the number of elements is reduced. However, the switch and calculation circuit may be formed as separate circuits. In this case, it is preferable that the switch and calculation circuit are integrated into a single-chip microcomputer 7 together with the CPUs 2A and 2B, comparator 4, and backup control circuit 5. That is, it is preferable that they are provided on a single substrate.

[0041] FIG. 2 shows an example of a motor control method according to an embodiment. In step S1, CPUs 2A and 2B execute the same operation in parallel and synchronously according to a program of the same specification. In step S1, in parallel with the operations of CPUs 2A and 2B, backup control circuit 5 executes a process simpler than the operations of CPUs 2A and 2B to generate a limp home control signal.

[0042] In step S2, comparator 4 determines whether the operation results of CPUs 2A and 2B are within an allowable range. In the embodiment, comparator 4 determines whether the operation results of CPUs 2A and 2B match. If the determination in step S2 is affirmative, the operation proceeds to step S3. In step S3, calculation / switch circuit 6 outputs a normal mode control signal that is the operation result of CPU 2A. Thereafter, the operation returns to step S1. As long as the operation results of CPUs 2A and 2B are within the allowable range, the operation repeats the loop of steps S1, S2, and S3, and calculation / switch circuit 6 continues to output the operation result of CPU 2A.

[0043] If the determination in step S2 is negative, the operation proceeds to step S4. In step S4, calculation / switch circuit 6 supplies a stop signal to CPUs 2A and 2B to stop the operations of both CPUs 2A and 2B. Next, in step S5, calculation / switch circuit 6 outputs a limp home control signal (limp home mode control signal) from backup control circuit 5. After the operation results of CPUs 2A and 2B are out of the allowable range, backup control circuit 5 continues to generate a limp home control signal. The operation repeats step S5, and calculation / switch circuit 6 continues to output the limp home control signal of backup control circuit 5. Although not shown, as described above, after the operation results of CPUs 2A and 2B are out of the allowable range, calculation / switch circuit 6 may supply a reset signal or a forced interrupt signal to CPUs 2A and 2B to restart the operations of both CPUs 2A and 2B. Thereby, both CPUs 2A and 2B can be returned to normal operation.

[0044] Figure 3 shows a motor control system including a motor control device 1A according to a modified example of the embodiment. In the drawings after Figure 3, the same reference numerals are used to indicate the components already described, and those components will not be described in detail. Unless otherwise specified, the features of the modified examples shown in the drawings after Figure 3 are the same as those of the embodiment shown in Figure 1.

[0045] In addition to CPUs 2A and 2B, memories 3A and 3B, comparator 4, backup control circuit 5, and calculation / switch circuit 6, the motor control device 1A includes a PWM arithmetic logic circuit 8. The CPUs 2A and 2B, memories 3A and 3B, comparator 4, backup control circuit 5, calculation / switch circuit 6, and PWM arithmetic logic circuit 8 are incorporated in a single-chip microcomputer 7. That is, they are provided on a single substrate.

[0046] The output of the calculation / switch circuit 6 (voltage command value for each target angular position of the motor 10) is supplied to the PWM arithmetic logic circuit 8. That is, in a normal state where the operations of the CPUs 2A and 2B are normal, the calculation result (voltage command value for each target angular position) of the CPU 2A is supplied to the PWM arithmetic logic circuit 8. When an abnormal state occurs in which the calculation results of the CPUs 2A and 2B are different, the limp home control signal (voltage command value for each target angular position) of the backup control circuit 5 is supplied to the PWM arithmetic logic circuit 8. The PWM arithmetic logic circuit 8 adds a PWM calculation for controlling the motor 10 to the output supplied from the calculation / switch circuit 6, and sequentially calculates a PWM drive signal for controlling the motor 10. The inverter 20 drives the motor 10 according to the PWM drive signal calculated by the PWM arithmetic logic circuit 8.

[0047] In the motor control device 1A, the CPUs 2A and 2B calculate the voltage command value for each target angular position of the motor 10 from the torque command and the current angular position signal, without calculating the PWM drive signal. For example, the CPUs 2A and 2B can perform vector control, or FOC (field-oriented control) calculations, to derive the voltage command value for each target angular position. The memories 3A and 3B store programs, which are software that perform FOC calculations. The calculation results from the CPU 2A supplied to the calculation / switch circuit 6 are the voltage command values ​​for each target angular position.

[0048] Furthermore, in the motor control device 1A, the torque command does not need to be supplied to the backup control circuit 5. The backup control circuit 5 refers to the current angular position signal and generates a limp home control signal in parallel with and synchronized with the calculations of the CPUs 2A and 2B. The backup control circuit 5 generates the limp home control signal without performing PWM drive signal calculation or FOC calculation. For example, the backup control circuit 5 may perform 120-degree conduction (120-degree conduction or square-wave drive) from the current angular position signal to derive the voltage command value for each target angular position of the motor 10. Alternatively, the backup control circuit 5 may be a PLC. In this case, the PLC derives the voltage command value for each target angular position from the current angular position signal. In any case, the limp home control signal supplied to the calculation / switch circuit 6 is the voltage command value for each target angular position.

[0049] It is preferable that after the calculation / switch circuit 6 switches its output to a limp-home control signal, the backup control circuit 5 derives a voltage command value such that the voltage command value gradually decreases over time, and generates a limp-home control signal. That is, after the calculation / switch circuit 6 switches its output to a limp-home control signal, it is preferable that the backup control circuit 5 generates a limp-home control signal that causes the motor 10 to decelerate over time. This prevents or reduces sudden changes in the torque of the motor 10, and the moving device can continue to move safely. It is also preferable that after the calculation / switch circuit 6 switches its output to a limp-home control signal, the backup control circuit 5 generates a limp-home control signal for a predetermined short time. Therefore, after an abnormal condition occurs, the moving device can continue to move for a certain distance. In the motor control device 1A, the backup control circuit 5 does not calculate the PWM drive signal, so the processing of the backup control circuit 5 is simpler.

[0050] Figure 4 shows a motor control system including a motor control device 1B according to another modification of the embodiment. The motor control device 1B includes a CPU 2A, 2B, memory 3A, 3B, comparator 4, backup control circuit 5, and calculation / switch circuit 6, as well as an FOC / PWM arithmetic logic circuit 9. The CPU 2A, 2B, memory 3A, 3B, comparator 4, backup control circuit 5, calculation / switch circuit 6, and FOC / PWM arithmetic logic circuit 9 are incorporated into a single-chip microcomputer 7. That is, they are provided on a single board.

[0051] The FOC / PWM calculation logic circuit 9 is supplied with the output of the calculation / switch circuit 6 (torque command to the motor 10, the angular position of the motor 10, and the current value). That is, in a normal state where the CPUs 2A and 2B are operating normally, the FOC / PWM calculation logic circuit 9 is supplied with the calculation result of the CPU 2A (torque command, angular position, and current value). If an abnormal state occurs where the calculation results of the CPUs 2A and 2B are different, the FOC / PWM calculation logic circuit 9 is supplied with the limp home control signal (torque command, angular position, and current value) from the backup control circuit 5. The FOC / PWM calculation logic circuit 9 is also supplied with the current angular position signal from the sensor 30. The FOC / PWM calculation logic circuit 9 adds FOC calculations and PWM calculations to the output supplied from the calculation / switch circuit 6 to control the motor 10, and sequentially calculates the PWM drive signal to control the motor 10. The inverter 20 drives the motor 10 according to the PWM drive signal calculated by the PWM calculation logic circuit 8.

[0052] In the motor control device 1B, CPUs 2A and 2B output the torque command, angular position, and current value to be instructed to the FOC / PWM calculation logic circuit 9 based on the torque command and current angular position signal, without performing PWM drive signal calculation or FOC calculation. Memories 3A and 3B store programs, which are software that perform simple calculations. The calculation results of CPU 2A supplied to the calculation / switch circuit 6 are the torque command, the angular position based on information from sensor 30, and the current value.

[0053] Furthermore, in the motor control device 1B, the backup control circuit 5 refers to the current angular position signal and generates a limp home control signal in parallel with and synchronously with the calculations of the CPUs 2A and 2B. The backup control circuit 5 generates the limp home control signal without performing calculations of the PWM drive signal or FOC calculations. For example, the backup control circuit 5 may be a programmable logic controller (PLC). In this case, the PLC derives the angular position and current value based on the torque command and information from the sensor 30. In this case, after the calculation / switch circuit 6 switches its output to the limp home control signal, the backup control circuit 5 may generate the limp home control signal such that the current value decreases over time. As a result, the torque of the motor 10 gradually decreases over time. The limp home control signal supplied to the calculation / switch circuit 6 is the angular position and current value based on information from the sensor 30, and also includes the torque command.

[0054] It is preferable that after the calculation / switch circuit 6 switches its output to a limp-home control signal, the backup control circuit 5 derives a current value such that the torque value of the motor 10 gradually decreases over time, and generates a limp-home control signal. That is, after the calculation / switch circuit 6 switches its output to a limp-home control signal, it is preferable that the backup control circuit 5 generates a limp-home control signal that causes the motor 10 to decelerate over time. This prevents or reduces sudden changes in the torque of the motor 10, and the moving device can continue to move safely. It is also preferable that after the calculation / switch circuit 6 switches its output to a limp-home control signal, the backup control circuit 5 generates a limp-home control signal for a predetermined short time. Therefore, after an abnormal condition occurs, the moving device can continue to move for a certain distance. In the motor control device 1B, the backup control circuit 5 does not perform calculation of the PWM drive signal or FOC calculation, so the processing of the backup control circuit 5 is simple. Also, since the CPUs 2A and 2B do not perform calculation of the PWM drive signal or FOC calculation, the processing of the CPUs 2A and 2B is also simple.

[0055] Figure 5 shows a motor control system including a motor control device 1C according to another modification of the embodiment. The motor control device 1C includes a sequencer 11 in addition to CPUs 2A, 2B, memories 3A, 3B, comparator 4, backup control circuit 5, calculation / switch circuit 6, and PWM arithmetic logic circuit 8. The CPUs 2A, 2B, memories 3A, 3B, comparator 4, backup control circuit 5, calculation / switch circuit 6, PWM arithmetic logic circuit 8, and sequencer 11 are incorporated into a single-chip microcomputer 7. That is, they are provided on a single board.

[0056] In the motor control device 1C, similar to the CPUs 2A and 2B of the motor control device 1A in Figure 3, the CPUs 2A and 2B calculate the voltage command value for each target angular position of the motor 10 from the torque command and the current angular position signal, without calculating the PWM drive signal. For example, the CPUs 2A and 2B can perform vector control, i.e., FOC calculation, to derive the voltage command value for each target angular position. Memories 3A and 3B store a program, which is the software that performs the FOC calculation. The calculation result of the CPU 2A supplied to the calculation / switch circuit 6 is the voltage command value for each target angular position.

[0057] In the motor control device 1C, the torque command is not supplied directly to the backup control circuit 5, but to the sequencer 11. Also, if the calculation results of CPUs 2A and 2B are different, an error flag output from the comparator 4 is supplied to the sequencer 11 in addition to the calculation / switch circuit 6. The sequencer (multiplication unit) 11 multiplies the torque value indicated by the torque command by a coefficient. The coefficient is 1 or less and 0 or greater. In a normal state where no error flag is supplied to the sequencer 11 from the comparator 4, the coefficient is 1. When an error flag is supplied to the sequencer 11 from the comparator 4, the sequencer 11 decreases the coefficient over time. That is, after an abnormal state occurs and the calculation / switch circuit 6 switches its output to a limp home control signal, the sequencer 11 decreases the coefficient over time. For example, after an error flag is supplied, the coefficient is b in the first period, c in the next second period, and d in the next third period. 1 > b > c > d > 0. Therefore, the output of the sequencer 11 can be considered as a deceleration command. The output of the sequencer 11 is supplied to the backup control circuit 5. The lengths of the first period, second period, third period, etc., may be the same or different.

[0058] The backup control circuit 5 references the current angular position signal and generates a limp home control signal in parallel with and synchronized with the calculations of CPUs 2A and 2B. The backup control circuit 5 generates the limp home control signal without performing PWM drive signal calculation or FOC calculation. For example, the backup control circuit 5 may perform a 120-degree energization from the deceleration command and the current angular position signal to derive the voltage command value for each target angular position of the motor 10. Alternatively, the backup control circuit 5 may be a separate sequencer from the sequencer 11. In this case, the sequencer derives the voltage command value for each target angular position of the motor 10 from the deceleration command and the current angular position signal. In any case, the limp home control signal supplied to the calculation / switch circuit 6 is the voltage command value for each target angular position.

[0059] The backup control circuit 5 generates a limp-home control signal by deriving a voltage command value from the deceleration command output of the sequencer 11. After the calculation / switch circuit 6 switches its output to the limp-home control signal, the value of the deceleration command output by the sequencer 11 gradually decreases. Therefore, after the calculation / switch circuit 6 switches its output to the limp-home control signal, the backup control circuit 5 derives a voltage command value such that the voltage command value gradually decreases over time, thereby generating a limp-home control signal that causes the motor 10 to decelerate. This prevents or reduces sudden changes in the torque of the motor 10, allowing the moving device to continue moving safely.

[0060] The PWM logic circuit 8 is supplied with the output of the calculation / switch circuit 6 (voltage command values ​​for each target angular position of the motor 10). That is, in a normal state where the CPUs 2A and 2B are operating normally, the PWM logic circuit 8 is supplied with the calculation results of the CPU 2A (voltage command values ​​for each target angular position). If an abnormal state occurs where the calculation results of the CPUs 2A and 2B (for example, voltage command values) are different, the PWM logic circuit 8 is supplied with the limp home control signal (voltage command values ​​for each target angular position) from the backup control circuit 5. The PWM logic circuit 8 applies PWM calculations to the output supplied from the calculation / switch circuit 6 to control the motor 10 and sequentially calculates PWM drive signals to control the motor 10. The inverter 20 drives the motor 10 according to the PWM drive signals calculated by the PWM logic circuit 8.

[0061] After the calculation / switch circuit 6 switches its output to a limp home control signal, it is preferable that the backup control circuit 5 generates a limp home control signal for a predetermined short time. Therefore, after an abnormal condition occurs, the mobile device can continue to move for a certain distance.

[0062] In the motor control device 1C, the backup control circuit 5 does not perform PWM drive signal calculation or FOC calculation, so the processing of the backup control circuit 5 is simple. Furthermore, in the motor control device 1C, if either CPU 2A or 2B enters an abnormal state, the combination of the sequencer 11, which performs simple processing, and the backup control circuit 5 slows down the motor 10. Therefore, the structure for slowing down the motor 10 can be simple. The sequencer 11 and the backup control circuit 5 are separate elements. However, the sequencer 11 and the backup control circuit 5 may be incorporated into a single circuit. Instead of the sequencer 11, a processor that operates similarly to the sequencer 11 may be provided.

[0063] In the motor control device 1C, instead of the PWM calculation logic circuit 8, the FOC / PWM calculation logic circuit 9 shown in Figure 4 may be provided. In this case, the CPUs 2A and 2B derive voltage command values ​​for each target angular position through simple calculations without performing calculations for PWM drive signals or FOC calculations. The memories 3A and 3B store programs, which are software that performs these simple calculations.

[0064] Figure 6 shows a motor control system including a motor control device 1D according to another modification of the embodiment. The motor control device 1D includes CPUs 2A, 2B, memories 3A, 3B, comparator 4, backup control circuit 5, calculation / switch circuit 6, and PWM arithmetic logic circuit 8, in addition to a buffer 13 and an ALU (arithmetic logic unit) 14. The CPUs 2A, 2B, memories 3A, 3B, comparator 4, backup control circuit 5, calculation / switch circuit 6, PWM arithmetic logic circuit 8, buffer 13 and ALU 14 are incorporated into a single-chip microcomputer 7. That is, they are provided on a single board.

[0065] In the motor control device 1D, similar to the CPUs 2A and 2B of the motor control device 1A in Figure 3, the CPUs 2A and 2B calculate the voltage command value for each target angular position of the motor 10 from the torque command and the current angular position signal without calculating the PWM drive signal. For example, the CPUs 2A and 2B can perform vector control, i.e., FOC calculation, to derive the voltage command value for each target angular position. The memories 3A and 3B store a program, which is the software that performs the FOC calculation. As shown in Figure 7, the voltage command value 71a for each target angular position output by the CPU under normal conditions has an almost sinusoidal shape.

[0066] The voltage command values ​​for each target angular position output by the CPU 2A may be supplied to the calculation / switch circuit 6. However, as will be described later, in the motor control device 1D, the voltage command values ​​for each target angular position output by the CPU 2A are supplied to the calculation / switch circuit 6 via the buffer 13 and ALU 14. Therefore, the voltage command values ​​for each target angular position output by the CPU 2A do not need to be supplied directly to the calculation / switch circuit 6.

[0067] In the motor control device 1D, the voltage command values ​​for each target angular position output by the CPU 2A are supplied to the buffer 13. Therefore, in a normal state where the CPUs 2A and 2B are operating normally, the buffer 13 stores the voltage command values ​​for each target angular position corresponding to the calculation results of the CPU 2A.

[0068] The ALU (Arithmetic Unit) 14 is a multiplier that multiplies the value stored in the buffer 13 by a coefficient to derive the multiplication result. For this reason, the ALU 14 reads the value stored in the buffer 13 at predetermined intervals. Then, at predetermined intervals, the ALU 14 stores the multiplication result in the buffer 13. In addition, if the calculation results of CPUs 2A and 2B are different, an error flag output from the comparator 4 is supplied to the ALU 14 in addition to the calculation / switch circuit 6.

[0069] In a normal state where no error flag is supplied to the ALU 14 from the comparator 4, the coefficient used by the ALU 14 is 1. In a normal state, the ALU 14 multiplies the value stored in the buffer 13 (the voltage command value for each target angular position derived by the CPU 2A) by 1 as a coefficient, and stores the multiplication result in the buffer 13. Therefore, in a normal state, the voltage command value for each target angular position derived by the CPU 2A is always stored in the buffer 13. The calculation / switch circuit 6 reads the value stored in the buffer 13. In a normal state where the difference between the outputs of CPU 2A and 2B is within an acceptable range (the calculation results of CPU 2A and 2B match), the calculation / switch circuit 6, which functions as a switch, continues to output the value stored in the buffer 13. In a normal state, the value stored in the buffer 13 is the voltage command value for each target angular position derived by the CPU 2A. Therefore, in a normal state, the calculation / switch circuit 6 continues to output the calculation result of the CPU 2A (the voltage command value for each target angular position). In other words, as shown in Figure 7, under normal conditions, the output 74a of the calculation / switch circuit 6 is the same as the voltage command value 71a for each target angular position output by the CPU 2A, and has an almost sinusoidal shape.

[0070] On the other hand, if the difference in output between CPUs 2A and 2B is outside the acceptable range (i.e., the calculation results of CPUs 2A and 2B are different), an error flag is supplied from the comparator 4 to the calculation / switch circuit 6 and the ALU 14. After this, at the timing when the torque fluctuation of the motor 10 is smallest, the calculation / switch circuit 6 outputs a limp home control signal (voltage command value for each target angular position) generated by the backup control circuit 5. That is, as shown in Figure 7, after a certain period 75 has elapsed since it was determined that the CPU operation was abnormal, the calculation / switch circuit 6 switches its output from the value stored in the buffer 13 to the limp home control signal at a switching timing that minimizes the impact of the switch. After an abnormal state occurs and an error flag is supplied, but before the calculation / switch circuit 6 switches its output to the limp home control signal, the ALU 14 multiplies the value stored in the buffer 13 by a constant number X that is less than 1 and greater than 0 as a coefficient to derive the multiplication result. In other words, during the period 75 shown in Figure 7, the ALU 14 multiplies the value stored in the buffer 13 by a constant number X that is less than 1 and greater than 0 as a coefficient to derive the multiplication result. Then, ALU 14 stores the multiplication result in buffer 13 instead of the voltage command value for each target angle position derived by CPU 2A. Therefore, immediately after the error flag is supplied, ALU 14 stores the multiplication result a・x in buffer 13. a is the voltage command value derived by CPU 2A immediately before the error flag was supplied. In other words, a is the voltage command value that CPU 2A last derived under normal conditions.

[0071] After the error flag is supplied, the ALU 14 repeatedly multiplies the value stored in the buffer 13 by a coefficient X at a predetermined period and stores the multiplication result in the buffer 13. Therefore, after the error flag is supplied, in the first period the multiplication result is a * x, but in the next second period the multiplication result is a * x ２ Therefore, in the next third period, the multiplication result is a・x ３ And in the next fourth period, the multiplication result is a・x ４ Thus, the ALU 14 gradually decreases the multiplication result (the value stored in buffer 13) over time.

[0072] During the period 75 shown in Figure 7, the calculation / switch circuit 6 reads the value stored in the buffer 13 (the multiplication result of ALU 14) at predetermined intervals. During the period 75 shown in Figure 7 (after the error flag is supplied and before the switching timing), the calculation / switch circuit 6 continues to output the gradually decreasing value stored in the buffer 13. Therefore, as shown in Figure 7, the output 74b of the calculation / switch circuit 6 has the shape of a decaying sine wave with a gradually decreasing amplitude. The multiplication result of ALU 14 may be supplied directly to the calculation / switch circuit 6 instead of via the buffer 13.

[0073] In the motor control device 1D, the torque command does not necessarily have to be supplied to the backup control circuit 5. The backup control circuit 5 refers to the current angular position signal and generates a limp home control signal in parallel with and synchronized with the calculations of the CPUs 2A and 2B. The backup control circuit 5 generates the limp home control signal without performing PWM drive signal calculation or FOC calculation. For example, the backup control circuit 5 may perform a 120-degree energization from the current angular position signal to derive the voltage command value for each target angular position of the motor 10. Alternatively, the backup control circuit 5 may be a sequencer. In this case, the sequencer derives the voltage command value for each target angular position of the motor 10 from the current angular position signal. In any case, the limp home control signal supplied to the calculation / switch circuit 6 is the voltage command value for each target angular position. As shown in Figure 7, the voltage command value 72a for each target angular position output by the backup control circuit 5 in a normal state has a rectangular wave shape. Furthermore, after the switching timing, the calculation / switch circuit 6 outputs voltage command values ​​for each target angular position generated by the backup control circuit 5, so the output 74c of the calculation / switch circuit 6 also has a rectangular wave shape. However, due to the voltage difference reduction process described later, the output 74c of the calculation / switch circuit 6 after the switching timing has a rectangular wave shape with an amplitude smaller than that of the voltage command value 72a.

[0074] The calculation / switch circuit 6 functions as a calculation circuit, for example, to calculate the voltage difference. In the motor control device 1D, the voltage difference is the difference between the multiplication result of ALU 14 and the voltage command value corresponding to the limp home control signal from the backup control circuit 5. As described above, in a normal state, the multiplication result of ALU 14 is the voltage command value a derived by the CPU 2A. In an abnormal state, the multiplication result of ALU 14 is initially a * x and gradually decreases over time. The voltage difference calculated by the calculation / switch circuit 6 is supplied to the backup control circuit 5. The backup control circuit 5 generates a limp home control signal to make the difference in effective voltage values ​​for one cycle zero. That is, the backup control circuit 5 calculates the voltage command value to make the difference in effective voltage values ​​for one cycle zero. As described above, in a normal state, the value stored in the buffer 13 (the multiplication result of ALU 14) is the voltage command value derived by the CPU 2A. Therefore, the voltage difference is the difference between the voltage command value derived by the CPU 2A and the voltage command value corresponding to the limp home control signal from the backup control circuit 5. After an abnormal state occurs and an error flag is supplied, the value stored in buffer 13 (the multiplication result of ALU 14) is initially a・x and gradually decreases over time. Based on the voltage difference, which is the difference between the multiplication result of ALU 14 that changes in this way and the voltage command value corresponding to the limp home control signal from backup control circuit 5, backup control circuit 5 calculates the voltage command value. Therefore, as shown in Figure 7, the voltage command value 72b for each target angular position output by backup control circuit 5 in an abnormal state has a smaller amplitude than the voltage command value 72a in a normal state. Then, the output 74c of calculation / switch circuit 6 after the switching timing has a rectangular wave shape with a small amplitude that reflects the voltage command value 72b. Thus, immediately before switching, the output 74b of calculation / switch circuit 6 has a decayed sine wave shape derived from the multiplication result of ALU 14, and immediately after switching, the output 74c of calculation / switch circuit 6 has a rectangular wave shape with an amplitude smaller than the voltage command value 72a. Therefore, when the calculation / switch circuit 6 switches the output from the multiplication result of ALU 14 to the limp home control signal, the rotational change of the motor 10 becomes smoother.Therefore, the impact on the mobile device on which the motor 10 is mounted is minimized, and the load on the power device 24 is reduced. Reducing the voltage difference is performed at least when the calculation / switch circuit 6 switches its output from the multiplication result of ALU 14 to the limp home control signal. Preferably, after the calculation / switch circuit 6 switches its output from the multiplication result of ALU 14 to the limp home control signal, the backup control circuit 5 derives a voltage command value such that the voltage command value gradually decreases over time. In this way, the backup control circuit 5 generates a limp home control signal that causes the motor 10 to decelerate. This prevents or reduces sudden changes in the torque of the motor 10, and the mobile device can continue to move safely.

[0075] Furthermore, the calculation / switch circuit 6 functions as a calculation circuit, for example, calculating the position difference. The position difference is the difference between the rotational angle position of the motor 10 corresponding to the calculation result of the CPU 2A and the rotational angle position of the motor 10 corresponding to the limp home control signal from the backup control circuit 5. In a normal state, the position difference calculated by the calculation / switch circuit 6 is supplied to the backup control circuit 5. The backup control circuit 5 generates a limp home control signal to reduce the position difference (preferably to make the position difference zero). That is, the backup control circuit 5 calculates the target angle position to reduce the position difference (preferably to make the position difference zero). Therefore, when the calculation / switch circuit 6 switches its output from the calculation result of the CPU 2A to the limp home control signal, the rotational change of the motor 10 becomes smoother. As a result, the impact on the moving device on which the motor 10 is mounted is minimized, and the load on the power device 24 is reduced. Reducing the position difference is performed at least when the calculation / switch circuit 6 switches its output from the calculation result of the CPU 2A to the limp home control signal. In other words, at least when switching the control of the motor 10, the backup control circuit 5 reduces the position difference that was last calculated under normal conditions.

[0076] The PWM logic circuit 8 is supplied with the output of the calculation / switch circuit 6 (voltage command values ​​for each target angular position of the motor 10). That is, in a normal state where the CPUs 2A and 2B are operating normally, the PWM logic circuit 8 is supplied with the calculation results of the CPU 2A (voltage command values ​​for each target angular position). If the calculation results of the CPUs 2A and 2B are different, resulting in an abnormal state, the PWM logic circuit 8 is supplied with the limp home control signal from the backup control circuit 5 (voltage command values ​​for each target angular position). The PWM logic circuit 8 applies PWM calculations to the output supplied from the calculation / switch circuit 6 to control the motor 10, and sequentially calculates PWM drive signals to control the motor 10. The inverter 20 drives the motor 10 according to the PWM drive signals calculated by the PWM logic circuit 8.

[0077] After the calculation / switch circuit 6 switches its output to a limp home control signal, it is preferable that the backup control circuit 5 generates a limp home control signal for a predetermined short time. Therefore, after an abnormal condition occurs, the mobile device can continue to move for a certain distance.

[0078] In the motor control device 1D, as described above, after an abnormal condition occurs, the calculation / switch circuit 6 switches its output from the value stored in the buffer 13 (output 74b) to the limp home control signal (output 74c) at the switching timing that minimizes torque fluctuations in the motor 10. Furthermore, immediately before the switch, the output 74b of the calculation / switch circuit 6 has a damped sinusoidal shape derived from the multiplication result of the ALU 14, and immediately after the switch, the output 74c of the calculation / switch circuit 6 has a rectangular wave shape with an amplitude smaller than the voltage command value 72a. Therefore, when the calculation / switch circuit 6 switches its output from the multiplication result of the ALU 14 to the limp home control signal, the rotational change of the motor 10 becomes smooth. On the other hand, let's consider the case where there is no buffer 13 and ALU 14. In this case, as shown in Figure 7, in a normal state, the output 73a of the calculation / switch circuit 6 is the same as the voltage command value 71a for each target angular position output by the CPU 2A, and has an almost sinusoidal shape. If an abnormal condition occurs, the calculation / switch circuit 6 immediately switches its output to the voltage command value of the backup control circuit 5. Thus, without the buffer 13, it is not guaranteed that the output of the calculation / switch circuit 6 can be switched at the appropriate timing. Moreover, since the output 73b of the calculation / switch circuit 6 in an abnormal condition has a rectangular wave shape with the same amplitude as the voltage command value 72a, the rotational change of the motor 10 may not be smooth.

[0079] In the motor control device 1D, instead of the PWM calculation logic circuit 8, the FOC / PWM calculation logic circuit 9 shown in Figure 4 may be provided. In this case, the CPUs 2A and 2B derive voltage command values ​​for each target angular position by performing a simplified calculation without performing either the calculation of the PWM drive signal or the FOC calculation. The memories 3A and 3B store programs, which are software that performs the simplified calculation.

[0080] Figure 8 shows a motor control system including a motor control device 1E according to another modification of the embodiment. The motor control device 1E includes a watchdog timer (decision unit) 4A instead of a comparator 4. The motor control device 1E is provided with one CPU 2A and one memory 3A for the CPU 2A. The CPU 2A, memory 3A, watchdog timer 4A, backup control circuit 5, and calculation / switch circuit 6 are integrated into a single-chip microcomputer 7. That is, they are provided on a single board.

[0081] The watchdog timer 4A is a digital or analog circuit that monitors the output of the CPU 2A. The output of the CPU 2A monitored by the watchdog timer 4A is not the result of calculations performed by the CPU 2A, but rather a signal that the CPU 2A periodically generates. The CPU 2A periodically generates a signal to reset the timer value of the watchdog timer 4A. Each time this signal is received, the watchdog timer 4A resets the timer value to zero, and after the reset, gradually increases the timer value. When the CPU 2A is operating normally, it periodically supplies a signal to the watchdog timer 4A to reset the timer value. Therefore, the watchdog timer 4A periodically resets the timer value. On the other hand, when the CPU 2A is operating abnormally, it is unable to periodically supply a signal to the watchdog timer 4A to reset the timer value. If the signal to reset the timer value is received by the watchdog timer 4A with a delay of more than a predetermined period, the increasing timer value exceeds a predetermined allowable upper limit, and the watchdog timer 4A outputs an "error flag". Furthermore, if a signal to reset the timer value is received by the watchdog timer 4A before the timer value reaches a predetermined lower limit, the watchdog timer 4A may output an "error flag". That is, the watchdog timer 4A monitors the operation of the CPU 2A, and if the period of the signal generated by the CPU 2A is outside the acceptable range, it supplies an error flag to the calculation / switch circuit 6. If the operation of the CPU 2A is normal and within the acceptable range, the watchdog timer 4A does not supply an error flag to the calculation / switch circuit 6.

[0082] The calculation / switch circuit 6 acts as a switch, switching its output to output either the calculation result generated by the CPU 2A or the limp home control signal generated by the backup control circuit 5. Specifically, in a normal state where the CPU 2A is operating within an acceptable range, the calculation / switch circuit 6 continues to output the calculation result (PWM drive signal) of the CPU 2A. If the CPU 2A's operation becomes abnormal and outside an acceptable range, the calculation / switch circuit 6 outputs the limp home control signal generated by the backup control circuit 5.

[0083] While the present disclosure has been illustrated and described above with reference to preferred embodiments thereof, those skilled in the art will understand that modifications in form and detail are possible without departing from the scope of the disclosure as described in the claims. Such modifications, alterations, and changes should be included within the scope of the present disclosure.

[0084] For example, in one embodiment, the motor control device comprises two CPUs 2A and 2B and two memories 3A and 3B. However, the motor control device may also comprise three or more CPUs and three or more memories corresponding to these CPUs. In another embodiment, the multiple CPUs each operate according to programs stored in multiple memories corresponding to these CPUs. However, the multiple CPUs may operate according to a program stored in a single memory. Even in this case, if any of the multiple CPUs enter an abnormal state, the calculation results of the multiple CPUs may differ. In yet another embodiment, when at least the calculation / switch circuit 6 switches its output, the backup control circuit 5 generates a limp-home control signal to reduce the voltage difference in order to smooth the rotational change of the motor 10. However, instead of reducing the voltage difference, the backup control circuit 5 may generate a limp-home control signal so that power is supplied to the motor 10 that matches the operating status of the CPUs in a normal state. The operating status of the CPUs in a normal state may be stored in a buffer (not shown), for example, and when at least the calculation / switch circuit 6 switches its output, the backup control circuit 5 may read this from the buffer and use it to generate the limp-home control signal. The above modifications may be combined as long as they do not contradict each other.

[0085] Aspects of this disclosure are also described in the numbered clauses below: (1) A motor control device comprising: at least one processor that performs calculations for controlling a motor according to a program; a determination unit that determines whether the operation of the processor is normal or not; a hardware logic circuit that performs a simpler process than the calculations of the processor to generate a limp home control signal for controlling the motor; and a switch that, in a normal state where the determination unit determines that the operation of the processor is normal, continues to output the calculation results of the processor, and in an abnormal state where the determination unit determines that the operation of the processor is abnormal, switches the output to output the limp home control signal generated by the hardware logic circuit, wherein the hardware logic circuit generates the limp home control signal in parallel with the calculations of the processor from the normal state, and continues to output the limp home control signal after the switch switches its output to the limp home control signal.

[0086] (2) The motor control device according to (1), comprising a plurality of processors that synchronously perform the same calculation for controlling the motor according to a program of the same specifications, wherein the determination unit is a comparator that compares the calculation results of the plurality of processors, the comparator notifies the switch of the abnormal state when the calculation results do not match, and the switch continues to output the calculation result of any of the processors when the calculation results of the processors match in a normal state, and switches its output to output a limp home control signal generated by the hardware logic circuit when the calculation results of the processors do not match in an abnormal state.

[0087] (3) The motor control device according to (1), wherein the determination unit is a watchdog timer that determines whether the period of a signal periodically generated by the processor is within an acceptable range, and the watchdog timer notifies the switch of the abnormal state if the period of the signal is not within an acceptable range, and the switch continues to output the calculation result of the processor when the period of the signal is within an acceptable range (normal state), and switches its output to output a limp home control signal generated by the hardware logic circuit when the period of the signal is not within an acceptable range (normal state).

[0088] (4) The motor control device according to any one of (1) to (3), further comprising a calculation circuit that calculates a voltage difference which is the difference between a voltage command value corresponding to the calculation result of the processor and a voltage command value corresponding to the limp home control signal from the hardware logic circuit, wherein the hardware logic circuit generates the limp home control signal to reduce the voltage difference at least when the switch switches its output to the limp home control signal.

[0089] (5) The motor control device according to any one of (1) to (3), wherein the hardware logic circuit generates the limp home control signal such that power suitable for the operating state of the processor in the normal state is supplied to the motor when at least the switch switches the output to the limp home control signal.

[0090] (6) The motor control device according to (4), wherein the calculation circuit calculates a position difference which is the difference between the rotational angle position of the motor corresponding to the calculation result of the processor and the rotational angle position of the motor corresponding to the limp home control signal from the hardware logic circuit in the normal state, and the hardware logic circuit generates the limp home control signal to reduce the position difference at least when the switch switches its output to the limp home control signal.

[0091] (7) The motor control device according to (4) or (6), wherein the calculation circuit and the switch are incorporated into a single circuit.

[0092] (8) The motor control device according to any one of (1) to (7), wherein the hardware logic circuit generates a limp home control signal that causes the motor to decelerate after the switch has switched its output to the limp home control signal.

[0093] (9) The motor control device according to (8), further comprising a multiplication unit that multiplies the torque value corresponding to the command supplied to the processor by a coefficient that is 1 or less and 0 or greater, wherein the multiplication unit decreases the coefficient over time after the switch switches its output to the limp home control signal, and the hardware logic circuit generates a limp home control signal that causes the motor to decelerate after the switch switches its output to the limp home control signal by deriving a voltage command value from the output of the multiplication unit.

[0094] (10) The motor control device according to any one of (1) to (3), further comprising: a buffer for storing a voltage command value corresponding to the calculation result of the processor in the normal state; and an arithmetic unit for deriving a multiplication result by multiplying the value stored in the buffer by a coefficient, wherein in the normal state, the arithmetic unit multiplies the value stored in the buffer by 1 as a coefficient; when the abnormal state occurs, the arithmetic unit multiplies the value stored in the buffer by a constant number less than 1 and greater than 0 as a coefficient to derive a multiplication result, and stores the multiplication result in the buffer in place of the voltage command value, thereby decreasing the multiplication result over time; and the switch first outputs the multiplication result, and then outputs the limp home control signal.

[0095] (11) The motor control device according to (10), further comprising a calculation circuit that calculates a voltage difference which is the difference between the multiplication result derived by the calculation device and the voltage command value corresponding to the limp home control signal from the hardware logic circuit, wherein the hardware logic circuit generates the limp home control signal to reduce the voltage difference at least when the switch switches its output to the limp home control signal.

[0096] (12) The motor control device according to (11), wherein the calculation circuit and the switch are incorporated into a single circuit.

[0097] (13) The motor control device according to any one of (1) to (12), wherein the switch stops or restarts the processor when the abnormal condition occurs.

[0098] (14) The motor control device according to any one of (1) to (13), wherein the processor sequentially generates PWM drive signals for controlling the motor, and the hardware logic circuit sequentially generates PWM drive signals for controlling the motor to generate the limp home control signal.

[0099] (15) The motor control device according to any one of (1) to (13), further comprising a PWM operation logic circuit that applies a PWM operation to the output supplied from the switch for controlling the motor.

[0100] (16) The motor control device according to any one of (1) to (13), further comprising an arithmetic logic circuit that applies FOC calculation and PWM calculation for controlling the motor to the output supplied from the switch.

[0101] (17) The motor control device according to any one of (1) to (16), wherein the hardware logic circuit is supplied with a signal indicating the rotational angle position of the motor, and the hardware logic circuit generates the limp home control signal that is adapted to the rotational angle position of the motor.

[0102] (18) A motor control device according to any one of (1) to (17), wherein the processor, the determination unit, the hardware logic circuit, and the switch are provided on a single board.

[0103] (19) A motor control method comprising: determining whether the operation of at least one processor that performs calculations for controlling a motor according to a program is normal; generating a limp home control signal for controlling the motor by performing a simpler process than the calculations of the processor using a hardware logic circuit in parallel with the calculations of the processor; continuing to output the calculation results of the processor when it is determined that the operation of the processor is normal; switching the output to output the limp home control signal generated by the hardware logic circuit when it is determined that the operation of the processor is abnormal; and continuing to output the limp home control signal using the hardware logic circuit after the output has been switched.

[0104] 1, 1A, 1B, 1C, 1D, 1E: Motor control device; 2A, 2B: CPU (processor); 3A, 3B: Memory; 4: Comparator (decision unit); 4A: Watchdog timer (decision unit); 5: Backup control circuit (hardware logic circuit); 6: Calculation / switch circuit (switch, calculation circuit); 7: Microcomputer; 8: PWM calculation logic circuit; 9: FOC / PWM calculation logic circuit; 10: Motor; 11: Sequencer (multiplication unit); 13: Buffer; 14: ALU (arithmetic unit); 20: Inverter; 22: Driver; 24: Power device; 30: Sensor

Claims

At least one processor that performs calculations to control the motor according to a program, A determination unit that determines whether the processor is operating normally or not, A hardware logic circuit that performs a simpler process than the calculations of the aforementioned processor to generate a limp-home control signal for controlling the motor, The system includes a switch that switches the output so as to output a limp home control signal generated by the hardware logic circuit when the determination unit determines that the processor is operating normally and the system is in a normal state, and when the determination unit determines that the processor is operating abnormally and the system is in an abnormal state, the system is in a normal state. The hardware logic circuit generates the limp home control signal in parallel with the calculations of the processor from the normal state, and after the switch switches its output to the limp home control signal, the motor control device continues to output the limp home control signal. 　 The system comprises multiple processors that synchronously perform the same calculations to control the motor according to a program of the same specifications, The determination unit is a comparator that compares the calculation results of the plurality of processors, and the comparator notifies the switch of the abnormal state if the calculation results do not match. The motor control device according to claim 1, wherein the switch continues to output the calculation result of either processor when the calculation results of the processors match in a normal state, and switches the output to output a limp home control signal generated by the hardware logic circuit when the calculation results of the processors do not match in an abnormal state. 　 The determination unit is a watchdog timer that determines whether the period of the signal periodically generated by the processor is within an acceptable range, and the watchdog timer notifies the switch of the abnormal state if the period of the signal is not within an acceptable range. The motor control device according to claim 1, wherein the switch continues to output the calculation result of the processor when the period of the signal is within an acceptable range in a normal state, and switches the output to output a limp home control signal generated by the hardware logic circuit when the period of the signal is outside an acceptable range in an abnormal state. 　 In the aforementioned normal state, the system further includes a calculation circuit that calculates a voltage difference, which is the difference between a voltage command value corresponding to the calculation result of the processor and a voltage command value corresponding to the limp home control signal from the hardware logic circuit. The motor control device according to any one of claims 1 to 3, wherein the hardware logic circuit generates the limp home control signal to reduce the voltage difference when the switch switches its output to the limp home control signal. 　 The motor control device according to any one of claims 1 to 3, wherein the hardware logic circuit generates the limp home control signal such that, at least when the switch switches its output to the limp home control signal, power suitable for the operating state of the processor in the normal state is supplied to the motor. 　 The calculation circuit calculates a position difference, which is the difference between the rotational angle position of the motor corresponding to the calculation result of the processor and the rotational angle position of the motor corresponding to the limp home control signal from the hardware logic circuit, in the normal state. The motor control device according to claim 4, wherein the hardware logic circuit generates the limp home control signal to reduce the position difference when the switch switches its output to the limp home control signal. 　 The motor control device according to claim 4, wherein the calculation circuit and the switch are incorporated into a single circuit. 　 The motor control device according to any one of claims 1 to 3, wherein the hardware logic circuit generates a limp home control signal that causes the motor to decelerate after the switch has switched its output to the limp home control signal. 　 The processor is further provided with a multiplication unit that multiplies the torque value corresponding to the command supplied to the processor by a coefficient that is 1 or less and 0 or more. The multiplication unit, after the switch switches its output to the limp home control signal, decreases the coefficient over time. The motor control device according to claim 8, wherein the hardware logic circuit derives a voltage command value from the output of the multiplication unit, and after the switch switches its output to the limp home control signal, generates a limp home control signal that causes the motor to decelerate. 　 In the aforementioned normal state, a buffer is provided to store voltage command values ​​corresponding to the calculation results of the processor, The system further comprises an arithmetic unit that multiplies the value stored in the buffer by a coefficient to derive the multiplication result, The arithmetic unit, in the normal state, multiplies the value stored in the buffer by 1 as a coefficient. When the abnormal state occurs, the arithmetic unit multiplies the value stored in the buffer by a constant number less than 1 and greater than 0 as a coefficient to derive the multiplication result, and stores the multiplication result in the buffer in place of the voltage command value. This process is repeated, thereby decreasing the multiplication result over time. The motor control device according to any one of claims 1 to 3, wherein the switch first outputs the multiplication result in the abnormal state, and then outputs the limp home control signal. 　 The system further comprises a calculation circuit that calculates a voltage difference, which is the difference between the multiplication result derived by the aforementioned calculation device and the voltage command value corresponding to the limp home control signal from the hardware logic circuit. The motor control device according to claim 10, wherein the hardware logic circuit generates the limp home control signal to reduce the voltage difference when the switch switches its output to the limp home control signal. 　 The motor control device according to claim 11, wherein the calculation circuit and the switch are incorporated into a single circuit. 　 The switch, upon encountering the abnormal condition, stops or restarts the processor. A motor control device according to any one of claims 1 to 3. 　 The processor sequentially generates PWM drive signals for controlling the motor, The motor control device according to any one of claims 1 to 3, wherein the hardware logic circuit sequentially generates PWM drive signals for controlling the motor and generates the limp home control signal. 　 The motor control device according to any one of claims 1 to 3, further comprising a PWM calculation logic circuit that applies a PWM calculation for controlling the motor to the output supplied from the switch. 　 The motor control device according to any one of claims 1 to 3, further comprising an arithmetic logic circuit that applies FOC calculation and PWM calculation for controlling the motor to the output supplied from the switch. 　 The motor control device according to any one of claims 1 to 3, wherein the hardware logic circuit is supplied with a signal indicating the rotational angle position of the motor, and the hardware logic circuit generates the limp home control signal that is adapted to the rotational angle position of the motor. 　 The motor control device according to any one of claims 1 to 3, wherein the processor, the determination unit, the hardware logic circuit, and the switch are provided on a single circuit board. 　 To determine whether the operation of at least one processor that performs calculations to control the motor according to the program is normal or not, In parallel with the calculations performed by the aforementioned processor, a hardware logic circuit performs a simpler process than the calculations performed by the aforementioned processor to generate a limp-home control signal for controlling the motor. In a normal state where the processor is determined to be operating normally, the processor continues to output the calculation results, When the aforementioned processor is determined to be in an abnormal state, the output is switched to output a limp home control signal generated by the hardware logic circuit. A motor control method comprising switching the output and then continuously outputting the limp home control signal by a hardware logic circuit.

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