Full-bridge LLC circuit analysis method and apparatus, device, and storage medium

Abstract

A full-bridge LLC circuit analysis method and apparatus, a device, and a storage medium, relating to the field of new energy vehicles. The method is executed by a control program of an OBC, and the OBC comprises a full-bridge LLC circuit. The method comprises: transmitting a frequency regulation factor to a digital control circuit, the digital control circuit being connected to the full-bridge LLC circuit and being used for providing a switching control signal to a MOS transistor of the full-bridge LLC circuit, and the frequency regulation factor being used for generating the switching control signal and regulating the switching frequency of the MOS transistor (210); measuring an output current and an output voltage of the full-bridge LLC circuit (220); and displaying a current waveform diagram on the basis of the output current and displaying a voltage waveform diagram on the basis of the output voltage (230).

Description

Analysis methods, apparatus, equipment and storage media for full-bridge LLC circuits

[0001] This application claims priority to Chinese Patent Application No. 202411647246.8, filed on November 18, 2024, entitled “Analysis Method, Apparatus, Device and Storage Medium for Full-Bridge LLC Circuits”, the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of new energy vehicles, and in particular to an analysis method, apparatus, device, and storage medium for a full-bridge LLC circuit. Background Technology

[0003] An on-board charger (OBC) is a charger installed in an electric vehicle. It is mainly used in pure electric vehicles (BEVs) and plug-in hybrid electric vehicles (PHEVs). The function of the OBC is to convert the alternating current (AC) from the grid into the direct current (DC) required by the high-voltage battery of the electric vehicle. At the same time, it can also invert the DC power from the power battery back into AC power to supply external loads (Vehicle to Load, V2L) or other vehicles (Vehicle-to-Vehicle, V2V) or directly feed back to the grid (Vehicle-to-Grid, V2G). In other words, the OBC can realize bidirectional energy transfer between the vehicle's power battery and external loads or the grid.

[0004] In related technologies, OBCs (On-Board Circuits) typically employ a full-bridge LLC (LLC) topology for DC-DC converters, while bidirectional OBCs utilize a CLLC (Clear-Loop Cell) topology. An LLC is a resonant circuit that achieves a constant output voltage by controlling the switching frequency (frequency regulation). Its advantages include: achieving zero-voltage switching (ZVS) for the four primary-side MOS (Metal-Oxide-Semiconductor Field-Effect Transistors) and zero-current switching (ZCS) for the secondary-side rectifier diodes. This soft-switching technology reduces switching losses in DC-DC power supplies and improves the efficiency and power density of the OBC.

[0005] The relevant technologies lack detailed analysis of the methods for implementing soft switching of the full-bridge LLC circuit in the OBC control system, and are limited to using OBC development solutions recommended by specific suppliers, which is not conducive to developers freely choosing chips from any manufacturer for independent and controllable development. Summary of the Invention

[0006] This application provides a method, apparatus, device, and storage medium for analyzing full-bridge LLC circuits, which can enrich the analysis methods for full-bridge LLC circuits. The technical solution is as follows:

[0007] According to one aspect of this application, an analysis method for a full-bridge LLC circuit is provided, the method being executed by a terminal logged into a first account; the method includes:

[0008] The first live stream room where a live barrage game has been started is displayed. The live barrage game is a game in which at least one account in the first live stream room participates by sending barrage messages.

[0009] Receive a first sensing operation, wherein the first sensing operation is a user operation received by a sensor in the terminal;

[0010] In response to the first sensing operation, the first bullet screen message corresponding to the first sensing operation sent by the first account is displayed in the first live broadcast room;

[0011] The display shows the response result of the live-streamed bullet screen game to the first bullet screen message.

[0012] According to another aspect of this application, an analysis device for a full-bridge LLC circuit is provided, the device being logged into a first account; the device includes:

[0013] The display module is used to display the first live stream room where a live stream barrage game has been started. The live stream barrage game is a game in which at least one account in the first live stream room participates by sending barrage messages.

[0014] The sensing module is used to receive a first sensing operation, which is a user operation received by a sensor in the terminal.

[0015] The display module is used to respond to the first sensing operation and display the first bullet screen message corresponding to the first sensing operation sent by the first account in the first live broadcast room.

[0016] The display module is used to display the response result of the live-streamed bullet screen game to the first bullet screen message.

[0017] According to another aspect of this application, a computer device is provided, the computer device including a processor and a memory, the memory storing at least one instruction, at least one program, code set or instruction set, the at least one instruction, the at least one program, the code set or instruction set being loaded and executed by the processor to implement the analysis method of the full-bridge LLC circuit as described above.

[0018] According to another aspect of this application, a computer-readable storage medium is provided, wherein at least one instruction, at least one program, code set, or instruction set is stored therein, wherein the at least one instruction, the at least one program, the code set, or the instruction set is loaded and executed by a processor to implement the analysis method for the full-bridge LLC circuit as described above.

[0019] According to another aspect of this application, a computer program product or computer program is provided, comprising computer instructions stored in a computer-readable storage medium. A processor of a computer device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the computer device to perform the analysis method for the full-bridge LLC circuit provided in various alternative implementations of the above aspects.

[0020] The beneficial effects of the technical solution provided in this application include at least the following:

[0021] This paper presents an analysis method for full-bridge LLC circuits. The switching frequency of the MOSFETs in the full-bridge LLC circuit can be dynamically adjusted using a digital control circuit, thereby changing the operating state of the circuit. The output voltage and current of the full-bridge LLC circuit are measured, and the current and voltage waveforms are displayed. This facilitates developers in analyzing the soft-switching operation of the full-bridge LLC circuit and understanding the soft-switching waveform details and efficiency advantages of LLC DC-DC converters. Attached Figure Description

[0022] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0023] Figure 1 is a schematic diagram of a computer device provided in an exemplary embodiment of this application;

[0024] Figure 2 is a schematic diagram of a charging system provided in an exemplary embodiment of this application;

[0025] Figure 3 is a schematic diagram of module one provided in an exemplary embodiment of this application;

[0026] Figure 4 is a schematic diagram of module two provided in an exemplary embodiment of this application;

[0027] Figure 5 is a schematic diagram of module three provided in an exemplary embodiment of this application;

[0028] Figure 6 is a schematic diagram of module four provided in an exemplary embodiment of this application;

[0029] Figure 7 is a schematic diagram of module five provided in an exemplary embodiment of this application;

[0030] Figure 8 is a schematic diagram of module six provided in an exemplary embodiment of this application;

[0031] Figure 9 is a circuit diagram of a charging system provided in an exemplary embodiment of this application;

[0032] Figure 10 is a flowchart of an analysis method for a full-bridge LLC circuit provided in an exemplary embodiment of this application;

[0033] Figure 11 is a schematic diagram of an analysis method for a full-bridge LLC circuit provided in an exemplary embodiment of this application;

[0034] Figure 12 is a schematic diagram of an analysis method for a full-bridge LLC circuit provided in an exemplary embodiment of this application;

[0035] Figure 13 is a schematic diagram of an analysis method for a full-bridge LLC circuit provided in an exemplary embodiment of this application;

[0036] Figure 14 is a schematic diagram of an analysis method for a full-bridge LLC circuit provided in an exemplary embodiment of this application;

[0037] Figure 15 is a schematic diagram of an analysis method for a full-bridge LLC circuit provided in an exemplary embodiment of this application;

[0038] Figure 16 is a schematic diagram of an analysis method for a full-bridge LLC circuit provided in an exemplary embodiment of this application;

[0039] Figure 17 is a schematic diagram of an analysis method for a full-bridge LLC circuit provided in an exemplary embodiment of this application;

[0040] Figure 18 is a flowchart of an analysis method for a full-bridge LLC circuit provided in an exemplary embodiment of this application;

[0041] Figure 19 is a schematic diagram of the structure of an analysis device for a full-bridge LLC circuit provided in an exemplary embodiment of this application;

[0042] Figure 20 is a schematic diagram of the structure of a computer device provided in an exemplary embodiment of this application.

[0043] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application. Detailed Implementation

[0044] To make the objectives, technical solutions, and advantages of this application clearer, the embodiments of this application will be described in further detail below with reference to the accompanying drawings.

[0045] A full-bridge LLC circuit is a highly efficient DC-DC power conversion topology. Exemplarily, a full-bridge LLC circuit includes a power switch, a resonant cavity, a transformer, and a diode rectifier. The power switch, typically a MOSFET power switch, is used to convert the input DC voltage into a high-frequency square wave. The resonant cavity consists of a resonant capacitor (Cr), a resonant inductor (Lr), and a magnetizing inductor (Lm). The function of the resonant cavity is to filter out harmonics of the square wave and output a sinusoidal wave at the fundamental switching frequency to the input of the transformer. The resonant inductor (Lr) is connected in series with the capacitor and the transformer, while the magnetizing inductor (Lm) is connected in parallel. The transformer is used to transmit the sinusoidal signal and boost or buck the voltage according to application requirements. The diode rectifier is used to convert the sinusoidal wave into a stable DC output.

[0046] The operation of a full-bridge LLC circuit can be divided into the following four steps:

[0047] Step 1, Input Voltage Conversion: First, the input DC voltage is converted into a high-frequency AC square wave using four MOSFET power switches (full-bridge structure). The four MOSFET power switches operate in a complementary manner, ensuring that at any given time, two MOSFET power switches are on and the other two are off, thus forming a continuous AC signal.

[0048] Step 2, Resonance and Voltage Division: The AC square wave then enters the resonant cavity. Inside the cavity, harmonics are filtered out, leaving only the fundamental frequency sine wave. The amplitude of the sine wave is affected by the resonant cavity parameters, particularly the ratio of the resonant inductor to the magnetizing inductor. By adjusting these parameters, the voltage division of the sine wave across the magnetizing inductor can be controlled, thereby adjusting the output voltage.

[0049] Step 3, Transformer Transmission: The sinusoidal signal processed by the resonant cavity is transmitted to the high-frequency transformer. The transformer steps up or steps down the voltage according to application requirements to ensure that the output voltage meets design requirements.

[0050] Step 4, Rectification and Output: On the secondary side of the transformer, the sinusoidal signal is converted into a stable DC output by a diode rectifier. The function of the rectifier is to convert the AC signal into a DC signal while ensuring the smoothness and stability of the output voltage.

[0051] Figure 1 shows a schematic diagram of a computer device 101 provided in an exemplary embodiment of this application.

[0052] For example, the analysis method for the full-bridge LLC circuit shown in the embodiments of this application can be applied to a computer device 101 running an OBC control program 102. The computer device may include an in-vehicle terminal, mobile phone, tablet computer, laptop computer, desktop computer, all-in-one computer, Internet of Things device, intelligent robot workstation, television, set-top box, smart glasses, smartwatch, digital camera, MP4 playback device, MP5 playback device, learning machine, e-reader, e-book reader, electronic dictionary, virtual reality (VR) playback device, or augmented reality (AR) playback device, etc.

[0053] Computer device 101 includes a first memory and a first processor. The first memory stores an analysis program for a full-bridge LLC circuit; the analysis program for the full-bridge LLC circuit is called and executed by the first processor to implement the analysis method for the full-bridge LLC circuit provided in this application. The first memory may include, but is not limited to, the following: Random Access Memory (RAM), Read Only Memory (ROM), Programmable Read-Only Memory (PROM), Erasable Programmable Read-Only Memory (EPROM), and Electrically Erasable Programmable Read-Only Memory (EEPROM).

[0054] The first processor can consist of one or more integrated circuit chips. Optionally, the first processor can be a general-purpose processor, such as a central processing unit (CPU) or a network processor (NP). Optionally, the first processor can implement the analysis method for the full-bridge LLC circuit provided in this application by running programs or code.

[0055] For example, computer device 101 is connected to an OBC, which includes a digital control circuit and a full-bridge LLC circuit. The digital control circuit generates a switching control signal based on a resonant frequency adjustment factor provided by a program, and inputs the switching control signal into the full-bridge LLC circuit. For example, as shown in Figure 2, the digital control circuit includes: module one resonant frequency adjustment factor 301, module two periodic reset integrator 302, and module three full-bridge PWM (Pulse Width Modulation) generator 303; the full-bridge LLC circuit includes: module four full-bridge driver 304, module five LLC resonant cavity 305, and module six full-bridge rectifier circuit 306.

[0056] For example, the overall design goals of an LLC DCDC circuit are: input voltage Vin = 400V, rated output voltage Vo = 350V, minimum output voltage Vomin = 280V, maximum output voltage Vomax = 420V, rated output power Po = 6.6kW, and LLC resonant frequency fr = 500kHz. These design goals are merely illustrative; the full-bridge LLC circuit provided in this application can also employ other design goals. Based on the above design goals, an example of a digital control circuit and a full-bridge LLC circuit is given.

[0057] As shown in Figure 3, module one multiplies the frequency adjustment factor K_rel_freq 401 by the first gain 402 (resonant frequency 500kHz), then by the second gain 403 (2π), and then discretizes it using a 100kHz sampling clock source 404 to obtain a discrete signal. The discrete signal is then delayed by 405 time steps, and the result is used as the input to the subsequent periodic reset integrator 302. Figure 3 illustrates examples with frequency adjustment factors of 1.2, 1, and 0.8.

[0058] As shown in Figure 4, the modulated frequency adjustment factor is input to the integrator 406 of module 2. The integrator 406 is reset with a period of 2π. Therefore, the integrator will output a sawtooth wave with a modulated resonant frequency, with a peak value of 2π and a frequency of 500kHz*K_rel_freq. After passing through the sin function 407, it is converted into a sine wave with a frequency of 500kHz*K_rel_freq.

[0059] According to the above design goals, when K_rel_freq=1, the output frequency fs of module 2 is equal to the resonant frequency fr of the full-bridge LLC circuit, which is 500kHz, and the full-bridge LLC circuit is operating in a resonant state.

[0060] When K_rel_freq = 1.2, the output frequency of module 2 is fs = 600kHz > fr, and the full-bridge LLC circuit operates in an underresonant state.

[0061] When K_rel_freq = 0.8, the output frequency fs of Module 2 is 400 kHz < fr, and the full-bridge LLC circuit operates in the over-resonance state.

[0062] Module 3 is shown in Figure 5. The sine wave output from Module 2 is input into Module 3. The comparator 408 at the front end of Module 3 synchronously outputs a square wave signal corresponding to the frequency, and then through the dead-time control module 409, two dead-time complementary switch control signals S12 and S34 are output. The dead-time control module 409 includes a buffer 410 and a NOT gate 411. The buffer 410 is used to delay the square wave signal for a dead time to obtain the switch control signal S12. The dead time is a delay time set to avoid the simultaneous conduction of the high-side and low-side power transistors. For example, the dead time can be 50 nanoseconds or 100 nanoseconds. The NOT gate 411 is used to invert the square wave signal and output the switch control signal S34 complementary to the switch control signal S12.

[0063] Module 4 is shown in Figure 6. The full-bridge drive 304 consists of 4 silicon carbide (SiC) MOS 412. The MOS 412 can use CREE's C3M0030090K. At the same time, a 1 nF capacitor 413 is additionally connected in parallel to the Vds of the MOS 412 to absorb the transient reverse current. The gate of the MOS 412 uses RC filtering to limit the edge time of the MOS 412 and optimize the EMI (Electromagnetic Interference) performance. The switching frequency of the full-bridge drive 304 is determined by the frequencies of the switch control signals S12 and S34 output by the previous-stage PWM generator 303.

[0064] Module 5 is shown in Figure 7. The mainstream bidirectional CLLC topology structure is adopted. Since the forward and reverse analysis processes are similar, only the forward charging process of the LLC is taken as an example for illustration below. Among them, the 4 MOS transistors in the secondary can be replaced by rectifier diodes, and the high-voltage battery can be replaced by a resistor with the same power.

[0065] Exemplarily, there are two choices for the LLC primary resonant inductor 414 and the secondary resonant inductor 415. One is to use independent inductor components. The advantage is that the flexibility can be adjusted according to the circuit requirements, which is beneficial to development and debugging. The other is to use the leakage inductance of the transformer to replace the resonant inductor, that is, the magnetically integrated LLC transformer. The advantage is that the cost is reduced by eliminating the separate resonant inductor, but it is difficult to adjust the leakage inductance and the flexibility is poor.

[0066] As shown in Figure 8, the vehicle's high-voltage battery is replaced by a 416 18.56Ω resistor with the same power as a 6.6kW battery. The default battery rated voltage is 350V, the depleted voltage is 280V, and the fully charged voltage is 420V. At the same time, the output voltage Vo_fbk and the output current Io_fbk are collected as feedback parameters for software closed-loop control to achieve constant current charging or constant voltage charging control.

[0067] Connecting modules one through six yields the circuit shown in Figure 9. Sequentially connecting the resonant frequency adjustment factor 301 (module one), the periodic reset integrator 302 (module two), and the full-bridge PWM generator 303 (module three) results in a digital control circuit. The input to the digital control circuit is the frequency adjustment factor, and the outputs are switch control signals S12 and S34. Sequentially connecting the full-bridge driver 304 (module four), the LLC resonant cavity 305 (module five), and the full-bridge rectifier circuit 306 (module six) results in a full-bridge LLC circuit. A DC power supply 417 powers the full-bridge LLC circuit, and the switch control signals S12 and S34 output from the digital control circuit are used as the switch control signals for the full-bridge LLC circuit.

[0068] Figure 10 is a flowchart illustrating an analysis method for a full-bridge LLC circuit provided in an exemplary embodiment of this application. This method can be used in the computer device shown in Figure 1. The method is executed by a control program of an OBC running in the computer device, the OBC including a full-bridge LLC circuit. The method includes the following steps.

[0069] Step 210: Transmit the frequency adjustment factor to the digital control circuit; the digital control circuit is connected to the full-bridge LLC circuit and is used to provide switching control signals to the MOSFETs of the full-bridge LLC circuit; the frequency adjustment factor is used to generate the switching control signal and adjust the switching frequency of the MOSFETs.

[0070] For example, the digital control circuit includes: a periodic reset integrator and a full-bridge PWM generator connected in sequence; the periodic reset integrator is used to convert the input signal into a sine wave; the full-bridge PWM generator is used to convert the sine wave into a switching control signal.

[0071] The frequency adjustment factor is a constant, for example, a positive number. The frequency adjustment factor is used to adjust the switching frequency of the full-bridge LLC circuit. Optionally, the frequency adjustment factor can be multiplied by the resonant frequency of the full-bridge LLC circuit to obtain the switching frequency, allowing developers to adjust the switching frequency based on the resonant frequency of the full-bridge LLC circuit to control its operating state. For example, the frequency adjustment factor can be input into module one, resonant frequency adjustment factor 301, of the digital control circuit so that the digital control circuit can output switching control signals S12 and S34 based on the frequency adjustment factor.

[0072] For example, the frequency adjustment factor can be dynamically changed. The control program can dynamically adjust the frequency adjustment factor based on the detected output voltage and / or output current of the full-bridge LLC circuit to control the full-bridge LLC circuit to be in a target operating state, or to control the output current and / or output voltage of the full-bridge LLC circuit to meet expectations.

[0073] For example, at a first moment, the control program inputs a first frequency adjustment factor and, based on the detected output current, determines that the output current deviates from the target output current. Then, at a second moment, the control program can input a second frequency adjustment factor to control the output current to approach the target output current. In this way, the control program can generate a dynamically changing frequency adjustment factor signal in real time based on the error signal between the output voltage and / or output current and the target output voltage and / or target output current.

[0074] Optionally, the control program transmits a first frequency adjustment factor to the digital control circuit; the first frequency adjustment factor corresponds to a first switching frequency, which is equal to the resonant frequency of the full-bridge LLC circuit. For example, if the first frequency adjustment factor is 1, the first switching frequency is 500Hz, and the resonant frequency of the full-bridge LLC circuit is 500Hz, then the full-bridge LLC circuit operates in a resonant state.

[0075] Alternatively, a second frequency adjustment factor can be transmitted to the digital control circuit; the second frequency adjustment factor corresponds to a second switching frequency, which is greater than the resonant frequency of the full-bridge LLC circuit. For example, if the second frequency adjustment factor is 1.2, the second switching frequency is 600Hz, and the resonant frequency of the full-bridge LLC circuit is 500Hz, then the full-bridge LLC circuit operates in an underresonant state.

[0076] Alternatively, a third frequency adjustment factor can be transmitted to the digital control circuit; the third frequency adjustment factor corresponds to a third switching frequency, which is less than the resonant frequency of the full-bridge LLC circuit. For example, if the third frequency adjustment factor is 0.8, the third switching frequency is 400Hz, and the resonant frequency of the full-bridge LLC circuit is 500Hz, then the full-bridge LLC circuit operates in an over-resonance state.

[0077] For example, the frequency adjustment factor is multiplied by the resonant frequency of the full-bridge LLC circuit, and then multiplied by 2π to obtain the first result; the first result is discretized using a sampling clock to obtain a discrete signal; the discrete signal is delayed by one time step to obtain the input signal; and the input signal is input to the digital control circuit.

[0078] Step 220: Detect the output current and output voltage of the full-bridge LLC circuit.

[0079] For example, as shown in Figure 8, the control program can detect the output voltage Vo_fbk and output current Io_fbk of the full-bridge LLC circuit.

[0080] Optionally, the control program can also detect other data in the full-bridge LLC circuit to analyze its operation. For example, it can detect the Vds (drain-source voltage) of each of the four MOSFETs, the current of the MOSFETs, the switching control signal of the input MOSFETs, the voltage and current of each of the four diodes in the full-bridge rectifier circuit 306 of module six, etc.

[0081] Step 230: Display the current waveform based on the output current and the voltage waveform based on the output voltage.

[0082] For example, the control program can display the current waveform of the output current and the voltage waveform of the output voltage on a computer device. From the current waveform and voltage waveform, it can be seen intuitively that the full-bridge LLC circuit periodically performs the soft-switching process. This makes it easier for developers to understand the soft-switching operation of the LLC circuit by analyzing the current waveform and voltage waveform, and to understand the soft-switching waveform details and efficiency advantages of the LLC DC-DC converter.

[0083] Optionally, if the control program also detects other circuit data, the corresponding waveforms can also be displayed to facilitate analysis by developers.

[0084] In one alternative embodiment, as shown in FIG11, the computer device displays the corresponding output voltage and primary resonant current when different frequency adjustment factors K_rel_freq are input.

[0085] With the first frequency adjustment factor input, the current waveform and voltage waveform of the full-bridge LLC circuit operating in the resonant state are displayed based on the output current and output voltage, respectively. For example, as shown in Figure 11, when K_rel_freq = 1, the switching frequency fs = 500kHz, and Vout = 350V, the primary resonant inductor current is approximately sinusoidal, and the full-bridge LLC circuit operates in the resonant state.

[0086] With the second frequency adjustment factor input, the current and voltage waveforms of the full-bridge LLC circuit operating in underresonant state are displayed based on the output current and output voltage, respectively. For example, as shown in Figure 11, when K_rel_freq = 1.2, the switching frequency fs = 600kHz, and Vout = 284V, the primary resonant inductor current is underresonant. Slightly increasing K_rel_freq further reduces Vout to 280V.

[0087] With the third frequency adjustment factor input, the current and voltage waveforms of the full-bridge LLC circuit operating in the over-resonance state are displayed based on the output current and output voltage, respectively. For example, as shown in Figure 11, when K_rel_freq = 0.8, the switching frequency fs = 400kHz, and Vout = 420V, the primary resonant inductor current is over-resonant.

[0088] In an alternative embodiment, the computer device can also display the ZVS (zero-voltage turn-on) waveforms for resonance, underresonance, and overresonance. As can be seen from the figure, the MOSFET's Vds has already decreased before gated turn-on, achieving soft turn-on and avoiding losses caused by voltage and current crossing during the MOSFET turn-on phase.

[0089] As shown in Figure 12, the first zero-voltage turn-on (ZVS) waveform is displayed when the full-bridge LLC circuit is operating in the resonant state. The first ZVS waveform is used to analyze the ZVS situation when the full-bridge LLC circuit is operating in the resonant state. The first ZVS waveform includes at least one of the following: the waveform of the switch control signal, the drain-source voltage waveform of the MOSFET, and the current waveform of the MOSFET.

[0090] As shown in Figure 13, the second ZVS waveform is displayed when the full-bridge LLC circuit is operating in an under-resonant state. The second ZVS waveform is used to analyze the ZVS situation when the full-bridge LLC circuit is operating in an under-resonant state. The second ZVS waveform includes at least one of the following: waveform of the switching control signal, waveform of the drain-source voltage of the MOSFET, and waveform of the current of the MOSFET.

[0091] As shown in Figure 14, the third ZVS waveform is displayed when the full-bridge LLC circuit is operating in the over-resonance state. The third ZVS waveform is used to analyze the ZVS situation when the full-bridge LLC circuit is operating in the over-resonance state. The third ZVS waveform includes at least one of the following: the waveform of the switch control signal, the drain-source voltage waveform of the MOSFET, and the current waveform of the MOSFET.

[0092] In an alternative embodiment, the computer device can also display resonant, underresonant, and overresonant ZCS zero-current turn-off waveforms. As can be seen from the figure, the diode current has already decreased before the diode turns off, achieving soft turn-off and avoiding losses caused by voltage and current crossing during the diode turn-off phase.

[0093] As shown in Figure 15, the first zero-current turn-off ZCS waveform is displayed when the full-bridge LLC circuit is operating in the resonant state. The first ZCS waveform is used to analyze the ZCS situation when the full-bridge LLC circuit is operating in the resonant state. The first ZCS waveform includes at least one of the following: the voltage waveform of the secondary diode in the full-bridge LLC circuit and the current waveform of the secondary diode.

[0094] As shown in Figure 16, the second ZCS waveform is displayed when the full-bridge LLC circuit is operating in an under-resonant state. The second ZCS waveform is used to analyze the ZCS situation when the full-bridge LLC circuit is operating in an under-resonant state. The second ZCS waveform includes at least one of the following: the voltage waveform of the secondary diode in the full-bridge LLC circuit and the current waveform of the secondary diode.

[0095] As shown in Figure 17, the third ZCS waveform is displayed when the full-bridge LLC circuit is operating in an over-resonance state. The third ZCS waveform is used to analyze the ZCS situation when the full-bridge LLC circuit is operating in an over-resonance state. The third ZCS waveform includes at least one of the following: the voltage waveform of the secondary diode in the full-bridge LLC circuit and the current waveform of the secondary diode.

[0096] In summary, the method provided in this embodiment offers an analysis method for full-bridge LLC circuits. It allows for dynamic adjustment of the switching frequency of the MOSFETs in the full-bridge LLC circuit via digital control circuitry, thereby altering the circuit's operating state. Furthermore, it measures the output voltage and current of the full-bridge LLC circuit, displaying current and voltage waveforms. This facilitates developers' analysis of the soft-switching operation of the full-bridge LLC circuit, enabling them to understand the soft-switching waveform details and efficiency advantages of LLC DC-DC converters.

[0097] The method provided in this application embodiment can analyze the output voltage, output current, primary MOSFET ZVS waveform, and secondary diode ZCS waveform of LLC in three states: resonance, under-resonance, and over-resonance. It reflects the different ZVS and ZCS waveform characteristics corresponding to different frequency adjustment factors, allowing developers to fully understand the soft-switching waveforms in the three states involved in LLC DC-CDC and fully evaluate the possible development results and optimization paths of the developed LLC DC-CDC.

[0098] The method provided in this application establishes a complete LLC operating state control system by setting three different frequency adjustment factors (first, second, and third). The first frequency adjustment factor puts the system at the resonant point, where the system efficiency reaches its peak; the second frequency adjustment factor places the system in an under-resonant state, suitable for operating conditions requiring a reduction in output voltage; the third frequency adjustment factor enables over-resonant operation, which can increase the output voltage. This method provides the system with comprehensive voltage regulation means, widening the voltage regulation range by more than 30%; at the same time, by comparing the waveform characteristics of the three states, developers can gain a deeper understanding of the impact of frequency offset on LLC characteristics. This method enables the system to maintain high efficiency over a wide voltage range, solving the problem of limited voltage regulation range in traditional LLC converters.

[0099] The method provided in this application displays waveforms in the resonant state, showcasing ideal operating conditions with a sinusoidal primary current. In the under-resonant state, the waveform shows current phase lag; and in the over-resonant state, the waveform demonstrates current lead in the inductive operating region. This helps developers accurately identify the system's operating state, providing intuitive data for parameter optimization and shortening debugging time. Furthermore, the accumulation of this waveform data lays the foundation for establishing a digital twin model of the LLC circuit. Particularly in the context of new energy vehicle on-board charging, it can improve fault diagnosis efficiency.

[0100] The method provided in this application provides a ZVS waveform display function, enabling visual analysis of the soft-switching characteristics of LLC circuits. The ZVS waveform in the resonant state demonstrates the ideal zero-voltage turn-on process; the waveforms in the under-resonant and over-resonant states respectively present the impact of frequency shift on switching characteristics. These waveform data allow developers to directly evaluate the ZVS quality at different operating points, providing an intuitive reference for optimizing key parameters such as dead time.

[0101] The method provided in this application implements a ZCS waveform display function, thus enhancing the comprehensive analysis capabilities of LLC circuits. By demonstrating the turn-off process of the secondary diode under different operating states, developers can intuitively understand the implementation conditions and working principle of ZCS. The ideal turn-off waveform in the resonant state, the current cutoff characteristics in the under-resonant state, and the special turn-off mode in the over-resonant state constitute a complete set of secondary-side switching characteristic analysis tools.

[0102] The method provided in this application achieves high-precision frequency control through digital signal processing techniques such as resonant frequency multiplication, discretization, and step delay. This not only improves the accuracy and stability of frequency setting but also facilitates online adjustment and optimization of system parameters.

[0103] The method provided in this application uses a periodic reset integrator to convert discrete signals into high-purity sine waves; a full-bridge PWM generator precisely generates drive signals with appropriate dead times. This balances signal quality and timing accuracy, ensuring the efficient and reliable operation of the LLC circuit. The entire control circuit is fully digital, facilitating integration and functional expansion, and can be flexibly configured according to different application requirements, exhibiting excellent versatility and scalability.

[0104] In one alternative embodiment, the computer device can dynamically adjust the frequency adjustment factor according to the target charging voltage or target charging current of the OBC, so that the actual output voltage or actual output current approaches the target value.

[0105] Figure 18 is a flowchart illustrating an analysis method for a full-bridge LLC circuit provided in an exemplary embodiment of this application. This method can be used in the computer device shown in Figure 1. Based on the embodiment shown in Figure 10, step 210 includes steps 211 and 212.

[0106] Step 211: Calculate the voltage error signal between the output voltage and the target charging voltage; or, calculate the current error signal between the output current of the full-bridge LLC circuit and the target charging current.

[0107] For example, the OBC can be set with a target charging voltage during constant voltage charging and a target charging current during constant current charging. The control program can calculate the frequency adjustment factor based on the error between the detected output current and / or output voltage of the full-bridge LLC circuit and the target output current and / or target output voltage.

[0108] For example, the value of the frequency adjustment factor can be calculated based on the error signal. For instance, when the target charging voltage is higher than the output voltage, the output voltage can be increased by decreasing the frequency adjustment factor.

[0109] For example, the control program provides a frequency adjustment factor. By adjusting this variable, the control program changes the switching frequency of the drive circuit's gate signal, thereby adjusting the output voltage of the LLC DC-DC converter. The frequency adjustment factor can be obtained from the error signal of the target charging current for constant current charging or the error signal of the target charging voltage for constant voltage charging. The frequency adjustment factor facilitates the OBC control program in implementing constant current and constant voltage control for two stages of fast charging of the battery. Furthermore, the ZVS and ZCS waveforms corresponding to the frequency adjustment factor are obtained for analysis and evaluation, thus achieving an evaluation of the overall soft-switching effect of the LLC DC-DC converter combined with the software control circuit.

[0110] Step 212: Adjust the frequency adjustment factor based on the voltage error signal to control the output voltage to approach the target charging voltage; or, adjust the frequency adjustment factor based on the current error signal to control the output current to approach the target charging current.

[0111] In summary, the method provided in this embodiment allows the OBC control program to calculate the error between the output current or output voltage of the full-bridge LLC circuit and the target value based on the set target charging current or target charging voltage. It then dynamically adjusts the switching frequency of the MOSFETs in the full-bridge LLC circuit via a digital control circuit, thereby adjusting the output current or output voltage. Furthermore, it measures the output voltage and current of the full-bridge LLC circuit, displaying current and voltage waveforms. This facilitates developers in analyzing the soft-switching operation of the full-bridge LLC circuit and understanding the soft-switching waveform details and efficiency advantages of the LLC DC-DC converter.

[0112] The method provided in this application automatically adjusts the frequency by comparing the deviation between the output voltage and the target value in real time, enabling the system to maintain a stable voltage output. This not only improves the steady-state accuracy of the system but also enhances its anti-interference capability, greatly improving the system's practicality and reliability.

[0113] The method provided in this application dynamically adjusts the operating frequency to maintain a constant current by monitoring the output current and comparing it with a target value. Combined with a voltage closed-loop control, this forms a complete dual-loop control system, enabling the system to intelligently switch between constant current and constant voltage modes according to actual needs. This not only ensures the safety of the charging process but also optimizes the overall dynamic response characteristics, providing more precise power protection for the battery management system.

[0114] It should be noted that this application may display prompt interfaces, pop-ups, or output voice prompts before and during the collection of user data. These prompt interfaces, pop-ups, or voice prompts are used to inform the user that their data is being collected. This ensures that the application only begins the steps for collecting user data after receiving confirmation from the user regarding the prompt interface or pop-up; otherwise (i.e., without user confirmation), the steps for collecting user data end, meaning no user data is collected. In other words, all user data collected in this application is collected with the user's consent and authorization, and the collection, use, and processing of related user data must comply with the relevant laws, regulations, and standards of the relevant countries and regions.

[0115] It should be noted that the order of the method steps provided in the embodiments of this application can be appropriately adjusted, and the steps can also be added or removed as appropriate. Any method variations that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the protection scope of this application, and therefore will not be elaborated further.

[0116] Figure 19 is a schematic diagram of the structure of an analysis device for a full-bridge LLC circuit provided in an exemplary embodiment of this application. The device runs a control program for an on-board charger (OBC), the OBC including the full-bridge LLC circuit; the device includes:

[0117] The transmission module 1001 is used to transmit a frequency adjustment factor to the digital control circuit; the digital control circuit is connected to the full-bridge LLC circuit and is used to provide switching control signals to the MOSFETs of the full-bridge LLC circuit; the frequency adjustment factor is used to generate the switching control signals and adjust the switching frequency of the MOSFETs.

[0118] Detection module 1002 is used to detect the output current and output voltage of the full-bridge LLC circuit;

[0119] Display module 1003 is used to display a current waveform based on the output current and a voltage waveform based on the output voltage.

[0120] In one alternative embodiment, the transmission module 1001 is configured to perform at least one of the following:

[0121] A first frequency adjustment factor is transmitted to the digital control circuit; the first frequency adjustment factor corresponds to a first switching frequency, and the first switching frequency is equal to the resonant frequency of the full-bridge LLC circuit.

[0122] A second frequency adjustment factor is transmitted to the digital control circuit; the second frequency adjustment factor corresponds to a second switching frequency, which is greater than the resonant frequency of the full-bridge LLC circuit.

[0123] A third frequency adjustment factor is transmitted to the digital control circuit; the third frequency adjustment factor corresponds to a third switching frequency, which is less than the resonant frequency of the full-bridge LLC circuit.

[0124] In one alternative embodiment, the display module 1003 is configured to perform at least one of the following:

[0125] When the first frequency adjustment factor is input, the current waveform and the voltage waveform of the full-bridge LLC circuit operating in the resonant state are displayed based on the output current and the output voltage, respectively.

[0126] With the second frequency adjustment factor input, the current waveform and voltage waveform of the full-bridge LLC circuit operating in the underresonant state are displayed based on the output current and the output voltage, respectively.

[0127] With the third frequency adjustment factor input, the current waveform and voltage waveform of the full-bridge LLC circuit operating in the over-resonance state are displayed based on the output current and the output voltage, respectively.

[0128] In one alternative embodiment, the display module 1003 is configured to perform at least one of the following:

[0129] When the full-bridge LLC circuit is operating in a resonant state, a first zero-voltage turn-on (ZVS) waveform diagram is displayed; the first ZVS waveform diagram is used to analyze the ZVS situation when the full-bridge LLC circuit is operating in a resonant state; the first ZVS waveform diagram includes at least one of the following: the waveform diagram of the switch control signal, the drain-source voltage waveform diagram of the MOSFET, and the current waveform diagram of the MOSFET;

[0130] When the full-bridge LLC circuit operates in an underresonant state, a second ZVS waveform is displayed; the second ZVS waveform is used to analyze the ZVS situation when the full-bridge LLC circuit operates in an underresonant state; the second ZVS waveform includes at least one of the following: the waveform of the switch control signal, the drain-source voltage waveform of the MOSFET, and the current waveform of the MOSFET;

[0131] When the full-bridge LLC circuit operates in an over-resonance state, a third ZVS waveform is displayed; the third ZVS waveform is used to analyze the ZVS situation when the full-bridge LLC circuit operates in an over-resonance state; the third ZVS waveform includes at least one of the following: the waveform of the switch control signal, the drain-source voltage waveform of the MOS transistor, and the current waveform of the MOS transistor.

[0132] In one alternative embodiment, the display module 1003 is configured to perform at least one of the following:

[0133] When the full-bridge LLC circuit is operating in a resonant state, a first zero-current turn-off (ZCS) waveform diagram is displayed; the first ZCS waveform diagram is used to analyze the ZCS situation when the full-bridge LLC circuit is operating in a resonant state; the first ZCS waveform diagram includes at least one of the following: the voltage waveform diagram of the secondary diode in the full-bridge LLC circuit, and the current waveform diagram of the secondary diode;

[0134] When the full-bridge LLC circuit operates in an underresonant state, a second ZCS waveform diagram is displayed; the second ZCS waveform diagram is used to analyze the ZCS situation when the full-bridge LLC circuit operates in an underresonant state; the second ZCS waveform diagram includes at least one of the following: the voltage waveform diagram of the secondary diode in the full-bridge LLC circuit, and the current waveform diagram of the secondary diode;

[0135] When the full-bridge LLC circuit operates in an over-resonance state, a third ZCS waveform diagram is displayed; the third ZCS waveform diagram is used to analyze the ZCS situation when the full-bridge LLC circuit operates in an over-resonance state; the third ZCS waveform diagram includes at least one of the following: the voltage waveform diagram of the secondary diode in the full-bridge LLC circuit, and the current waveform diagram of the secondary diode.

[0136] In one alternative embodiment, the OBC is configured with a target charging voltage;

[0137] The transmission module 1001 is used to calculate the voltage error signal between the output voltage and the target charging voltage;

[0138] The transmission module 1001 is used to adjust the frequency adjustment factor based on the voltage error signal and control the output voltage to approach the target charging voltage.

[0139] In one alternative embodiment, the OBC is configured with a target charging current;

[0140] The transmission module 1001 is used to calculate the current error signal between the output current of the full-bridge LLC circuit and the target charging current.

[0141] The transmission module 1001 is used to adjust the frequency adjustment factor based on the current error signal and control the output current to approach the target charging current.

[0142] In an optional embodiment, the transmission module 1001 is used to multiply the frequency adjustment factor by the resonant frequency of the full-bridge LLC circuit, and then multiply by 2π to obtain a first result;

[0143] The transmission module 1001 is used to discretize the first result using a sampling clock to obtain a discrete signal;

[0144] The transmission module 1001 is used to delay the discrete signal by a time step to obtain the input signal;

[0145] The transmission module 1001 is used to input the input signal into the digital control circuit.

[0146] In one alternative embodiment, the digital control circuit includes: a periodic reset integrator and a full-bridge pulse width modulation (PWM) generator connected in sequence;

[0147] The periodic reset integrator is used to convert the input signal into a sine wave;

[0148] The full-bridge PWM generator is used to convert the sine wave into the switching control signal.

[0149] It should be noted that the analysis device for the full-bridge LLC circuit provided in the above embodiments is only an example of the division of the above functional modules. In practical applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above. In addition, the analysis device for the full-bridge LLC circuit provided in the above embodiments and the analysis method embodiments for the full-bridge LLC circuit belong to the same concept, and the specific implementation process is detailed in the method embodiments, which will not be repeated here.

[0150] Embodiments of this application also provide a computer device, comprising: a processor and a memory, wherein the memory stores at least one instruction, at least one program, code set, or instruction set, and the at least one instruction, at least one program, code set, or instruction set is loaded and executed by the processor to implement the analysis method for the full-bridge LLC circuit provided in the above-described method embodiments. This computer device can be implemented as a terminal.

[0151] For example, Figure 20 is a schematic diagram of the structure of a computer device provided in an exemplary embodiment of this application.

[0152] Typically, computer device 1700 includes a processor 1701 and a memory 1702.

[0153] Processor 1701 may include one or more processing cores, such as a quad-core processor, an octa-core processor, etc. Processor 1701 may be implemented using at least one hardware form selected from DSP (Digital Signal Processing), FPGA (Field-Programmable Gate Array), and PLA (Programmable Logic Array). Processor 1701 may also include a main processor and a coprocessor. The main processor, also known as a CPU (Central Processing Unit), is used to process data in the wake-up state; the coprocessor is a low-power processor used to process data in the standby state. In some embodiments, processor 1701 may integrate a GPU (Graphics Processing Unit), which is responsible for rendering and drawing the content required to be displayed on the screen. In some embodiments, processor 1701 may also include an AI (Artificial Intelligence) processor, which is used to handle computational operations related to machine learning.

[0154] Memory 1702 may include one or more computer-readable storage media, which may be non-transitory. Memory 1702 may also include high-speed random access memory and non-volatile memory, such as one or more disk storage devices or flash memory devices. In some embodiments, the non-transitory computer-readable storage media in memory 1702 is used to store at least one instruction, which is executed by processor 1701 to implement the analysis method for the full-bridge LLC circuit provided in the method embodiments of this application.

[0155] In some embodiments, the computer device 1700 may also optionally include a peripheral device interface 1703 and at least one peripheral device. The processor 1701, memory 1702, and peripheral device interface 1703 can be connected via a bus or signal line. Each peripheral device can be connected to the peripheral device interface 1703 via a bus, signal line, or circuit board. Specifically, the peripheral device includes at least one of the following: a radio frequency circuit 1704, a display screen 1705, a camera assembly 1706, an audio circuit 1707, and a power supply 1708.

[0156] Peripheral device interface 1703 can be used to connect at least one I / O (Input / Output) related peripheral device to processor 1701 and memory 1702. In some embodiments, processor 1701, memory 1702 and peripheral device interface 1703 are integrated on the same chip or circuit board; in some other embodiments, any one or two of processor 1701, memory 1702 and peripheral device interface 1703 can be implemented on separate chips or circuit boards, and this application embodiment is not limited in this respect.

[0157] The radio frequency (RF) circuit 1704 is used to receive and transmit RF (Radio Frequency) signals, also known as electromagnetic signals. The RF circuit 1704 communicates with communication networks and other communication devices via electromagnetic signals. The RF circuit 1704 converts electrical signals into electromagnetic signals for transmission, or converts received electromagnetic signals back into electrical signals. Optionally, the RF circuit 1704 includes: an antenna system, an RF transceiver, one or more amplifiers, a tuner, an oscillator, a digital signal processor, a codec chipset, a user identity module card, etc. The RF circuit 1704 can communicate with other computer devices via at least one wireless communication protocol. This wireless communication protocol includes, but is not limited to: the World Wide Web, metropolitan area networks, intranets, various generations of mobile communication networks (2G, 3G, 4G, and 5G), wireless local area networks, and / or WiFi (Wireless Fidelity) networks. In some embodiments, the RF circuit 1704 may also include circuitry related to NFC (Near Field Communication), which is not limited in this application.

[0158] Display screen 1705 is used to display a UI (User Interface). This UI may include graphics, text, icons, videos, and any combination thereof. When display screen 1705 is a touch display screen, it also has the ability to collect touch signals on or above its surface. These touch signals can be input as control signals to processor 1701 for processing. In this case, display screen 1705 can also be used to provide virtual buttons and / or a virtual keyboard, also known as soft buttons and / or a soft keyboard. In some embodiments, there may be one display screen 1705, positioned on the front panel of computer device 1700; in other embodiments, there may be at least two display screens 1705, respectively positioned on different surfaces of computer device 1700 or in a folded design; in still other embodiments, display screen 1705 may be a flexible display screen, positioned on a curved or folded surface of computer device 1700. Furthermore, display screen 1705 may also be configured as a non-rectangular, irregular shape, i.e., a non-rectangular screen. The display screen 1705 can be made of materials such as LCD (Liquid Crystal Display) and OLED (Organic Light-Emitting Diode).

[0159] The camera assembly 1706 is used to acquire images or videos. Optionally, the camera assembly 1706 includes a front-facing camera and a rear-facing camera. Typically, the front-facing camera is located on the front panel of the computer device 1700, and the rear-facing camera is located on the back of the computer device. In some embodiments, there are at least two rear-facing cameras, which are any one of a main camera, a depth-sensing camera, a wide-angle camera, and a telephoto camera, to achieve background blurring by fusion of the main camera and the depth-sensing camera, panoramic shooting by fusion of the main camera and the wide-angle camera, VR (Virtual Reality) shooting, or other fusion shooting functions. In some embodiments, the camera assembly 1706 may also include a flash. The flash can be a single-color temperature flash or a dual-color temperature flash. A dual-color temperature flash refers to a combination of a warm light flash and a cool light flash, which can be used for light compensation at different color temperatures.

[0160] The audio circuit 1707 may include a microphone and a speaker. The microphone is used to collect sound waves from the user and the environment, converting them into electrical signals that are input to the processor 1701 for processing, or to the radio frequency circuit 1704 for voice communication. For stereo sound acquisition or noise reduction purposes, multiple microphones may be used, positioned at different locations within the computer device 1700. The microphone may also be an array microphone or an omnidirectional microphone. The speaker is used to convert electrical signals from the processor 1701 or the radio frequency circuit 1704 into sound waves. The speaker may be a conventional diaphragm speaker or a piezoelectric ceramic speaker. When the speaker is a piezoelectric ceramic speaker, it can convert electrical signals not only into audible sound waves but also into inaudible sound waves for purposes such as distance measurement. In some embodiments, the audio circuit 1707 may also include a headphone jack.

[0161] Power supply 1708 is used to supply power to the various components in computer device 1700. Power supply 1708 can be AC ​​power, DC power, a disposable battery, or a rechargeable battery. When power supply 1708 includes a rechargeable battery, the rechargeable battery can be a wired rechargeable battery or a wireless rechargeable battery. A wired rechargeable battery is a battery that is charged via a wired line, and a wireless rechargeable battery is a battery that is charged via a wireless coil. The rechargeable battery can also be used to support fast charging technology.

[0162] In some embodiments, the computer device 1700 further includes one or more sensors 1709. The one or more sensors 1709 include, but are not limited to, an accelerometer 1710, a gyroscope 1711, a pressure sensor 1712, an optical sensor 1713, and a proximity sensor 1714.

[0163] Accelerometer 1710 can detect the magnitude of acceleration along the three coordinate axes of a coordinate system established by computer device 1700. For example, accelerometer 1710 can be used to detect the components of gravitational acceleration along the three coordinate axes. Processor 1701 can control touchscreen display 1705 to display the user interface in landscape or portrait view based on the gravitational acceleration signal acquired by accelerometer 1710. Accelerometer 1710 can also be used for games or for acquiring user motion data.

[0164] The gyroscope sensor 1711 can detect the orientation and rotation angle of the computer device 1700. The gyroscope sensor 1711 can work in conjunction with the accelerometer sensor 1710 to acquire 3D motion data from the user on the computer device 1700. Based on the data acquired by the gyroscope sensor 1711, the processor 1701 can perform the following functions: motion sensing (e.g., changing the UI based on the user's tilt), image stabilization during shooting, game control, and inertial navigation.

[0165] Pressure sensor 1712 can be disposed on the side bezel of computer device 1700 and / or on the lower layer of touch display screen 1705. When pressure sensor 1712 is disposed on the side bezel of computer device 1700, it can detect the user's grip signal on computer device 1700, and processor 1701 can perform left / right hand recognition or quick operation based on the grip signal collected by pressure sensor 1712. When pressure sensor 1712 is disposed on the lower layer of touch display screen 1705, processor 1701 can control operable controls on the UI interface based on the user's pressure operation on touch display screen 1705. Operable controls include at least one of button controls, scroll bar controls, icon controls, and menu controls.

[0166] Optical sensor 1713 is used to collect ambient light intensity. In one embodiment, processor 1701 can control the display brightness of touch display screen 1705 based on the ambient light intensity collected by optical sensor 1713. Specifically, when the ambient light intensity is high, the display brightness of touch display screen 1705 is increased; when the ambient light intensity is low, the display brightness of touch display screen 1705 is decreased. In another embodiment, processor 1701 can also dynamically adjust the shooting parameters of camera assembly 1706 based on the ambient light intensity collected by optical sensor 1713.

[0167] The proximity sensor 1714, also known as a distance sensor, is typically located on the front panel of the computer device 1700. The proximity sensor 1714 is used to detect the distance between the user and the front of the computer device 1700. In one embodiment, when the proximity sensor 1714 detects that the distance between the user and the front of the computer device 1700 is gradually decreasing, the processor 1701 controls the touch display screen 1705 to switch from a screen-on state to a screen-off state; when the proximity sensor 1714 detects that the distance between the user and the front of the computer device 1700 is gradually increasing, the processor 1701 controls the touch display screen 1705 to switch from a screen-off state to a screen-on state.

[0168] Those skilled in the art will understand that the structure shown in FIG20 does not constitute a limitation on the computer device 1700, and may include more or fewer components than shown, or combine certain components, or employ different component arrangements.

[0169] This application also provides a computer-readable storage medium storing at least one instruction, at least one program, code set, or instruction set. When the at least one instruction, at least one program, code set, or instruction set is loaded and executed by the processor of a computer device, the analysis method for the full-bridge LLC circuit provided in the above-described method embodiments is implemented.

[0170] This application also provides a computer program product or computer program including computer instructions stored in a computer-readable storage medium. A processor of a computer device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the computer device to perform the analysis method for the full-bridge LLC circuit provided in the above-described method embodiments.

[0171] Those skilled in the art will understand that all or part of the steps of the above embodiments can be implemented by hardware or by a program instructing related hardware. The program can be stored in a computer-readable storage medium, such as a read-only memory, a disk, or an optical disk.

[0172] The above description is merely an optional embodiment of this application and is not intended to limit this application. Any modifications, equivalent switching, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A method of analysis of a full-bridge LLC circuit, wherein, The method is executed by the control program of the on-board charger (OBC), the OBC including the full-bridge LLC circuit; the method includes: A frequency adjustment factor is transmitted to the digital control circuit; the digital control circuit is connected to the full-bridge LLC circuit and is used to provide switching control signals to the MOSFETs of the full-bridge LLC circuit; the frequency adjustment factor is used to generate the switching control signals and adjust the switching frequency of the MOSFETs. Detect the output current and output voltage of the full-bridge LLC circuit; The current waveform is displayed based on the output current, and the voltage waveform is displayed based on the output voltage.

2. The method of claim 1, wherein, The transmission of the frequency adjustment factor to the digital control circuit includes at least one of the following: A first frequency adjustment factor is transmitted to the digital control circuit; the first frequency adjustment factor corresponds to a first switching frequency, and the first switching frequency is equal to the resonant frequency of the full-bridge LLC circuit. A second frequency adjustment factor is transmitted to the digital control circuit; the second frequency adjustment factor corresponds to a second switching frequency, which is greater than the resonant frequency of the full-bridge LLC circuit. A third frequency adjustment factor is transmitted to the digital control circuit; the third frequency adjustment factor corresponds to a third switching frequency, which is less than the resonant frequency of the full-bridge LLC circuit.

3. The method of claim 1 or 2, wherein, The display of a current waveform based on the output current and the display of a voltage waveform based on the output voltage include at least one of the following: When the first frequency adjustment factor is input, the current waveform and the voltage waveform of the full-bridge LLC circuit operating in the resonant state are displayed based on the output current and the output voltage, respectively. With the second frequency adjustment factor input, the current waveform and voltage waveform of the full-bridge LLC circuit operating in the underresonant state are displayed based on the output current and the output voltage, respectively. With the third frequency adjustment factor input, the current waveform and voltage waveform of the full-bridge LLC circuit operating in the over-resonance state are displayed based on the output current and the output voltage, respectively.

4. The method according to any one of claims 1 to 3, wherein, The method further includes at least one of the following: When the full-bridge LLC circuit is operating in a resonant state, a first zero-voltage turn-on (ZVS) waveform diagram is displayed; the first ZVS waveform diagram is used to analyze the ZVS situation when the full-bridge LLC circuit is operating in a resonant state; the first ZVS waveform diagram includes at least one of the following: the waveform diagram of the switch control signal, the drain-source voltage waveform diagram of the MOSFET, and the current waveform diagram of the MOSFET; When the full-bridge LLC circuit operates in an underresonant state, a second ZVS waveform is displayed; the second ZVS waveform is used to analyze the ZVS situation when the full-bridge LLC circuit operates in an underresonant state; the second ZVS waveform includes at least one of the following: the waveform of the switch control signal, the drain-source voltage waveform of the MOSFET, and the current waveform of the MOSFET; When the full-bridge LLC circuit operates in an over-resonance state, a third ZVS waveform is displayed; the third ZVS waveform is used to analyze the ZVS situation when the full-bridge LLC circuit operates in an over-resonance state; the third ZVS waveform includes at least one of the following: the waveform of the switch control signal, the drain-source voltage waveform of the MOS transistor, and the current waveform of the MOS transistor.

5. The method according to any one of claims 1 to 4, wherein, The method further includes at least one of the following: When the full-bridge LLC circuit is operating in a resonant state, a first zero-current turn-off (ZCS) waveform diagram is displayed; the first ZCS waveform diagram is used to analyze the ZCS situation when the full-bridge LLC circuit is operating in a resonant state; the first ZCS waveform diagram includes at least one of the following: the voltage waveform diagram of the secondary diode in the full-bridge LLC circuit, and the current waveform diagram of the secondary diode; When the full-bridge LLC circuit operates in an underresonant state, a second ZCS waveform diagram is displayed; the second ZCS waveform diagram is used to analyze the ZCS situation when the full-bridge LLC circuit operates in an underresonant state; the second ZCS waveform diagram includes at least one of the following: the voltage waveform diagram of the secondary diode in the full-bridge LLC circuit, and the current waveform diagram of the secondary diode; When the full-bridge LLC circuit operates in an over-resonance state, a third ZCS waveform diagram is displayed; the third ZCS waveform diagram is used to analyze the ZCS situation when the full-bridge LLC circuit operates in an over-resonance state; the third ZCS waveform diagram includes at least one of the following: the voltage waveform diagram of the secondary diode in the full-bridge LLC circuit, and the current waveform diagram of the secondary diode.

6. The method according to any one of claims 1 to 5, wherein, The OBC is configured with a target charging voltage; the method further includes: Calculate the voltage error signal between the output voltage and the target charging voltage; The frequency adjustment factor is adjusted based on the voltage error signal to control the output voltage to approach the target charging voltage.

7. The method according to any one of claims 1 to 6, wherein, The OBC is configured with a target charging current; the method further includes: Calculate the current error signal between the output current of the full-bridge LLC circuit and the target charging current; The frequency adjustment factor is adjusted based on the current error signal to control the output current to approach the target charging current.

8. The method according to any one of claims 1 to 7, wherein, The transmission of the frequency adjustment factor to the digital control circuit includes: Multiply the frequency adjustment factor by the resonant frequency of the full-bridge LLC circuit, and then multiply by 2π to obtain the first result; The first result is discretized using a sampling clock to obtain a discrete signal; The discrete signal is delayed by one time step to obtain the input signal; The input signal is input to the digital control circuit.

9. The method of claim 8, wherein, The digital control circuit includes: a periodic reset integrator and a full-bridge pulse width modulation (PWM) generator connected in sequence; The periodic reset integrator is used to convert the input signal into a sine wave; The full-bridge PWM generator is used to convert the sine wave into the switching control signal.

10. An analysis device of a full-bridge LLC circuit, wherein, The device includes: A transmission module is used to transmit a frequency adjustment factor to a digital control circuit; the digital control circuit is connected to the full-bridge LLC circuit and is used to provide switching control signals to the MOSFETs of the full-bridge LLC circuit; the frequency adjustment factor is used to generate the switching control signals and adjust the switching frequency of the MOSFETs. The detection module is used to detect the output current and output voltage of the full-bridge LLC circuit; The display module is used to display a current waveform based on the output current and a voltage waveform based on the output voltage.

11. A computer device, wherein, The computer device includes a processor and a memory, the memory storing at least one program, which is loaded and executed by the processor to implement the analysis method for a full-bridge LLC circuit as described in any one of claims 1 to 9.

12. A computer readable storage medium, wherein, The readable storage medium stores at least one program, which is loaded and executed by a processor to implement the analysis method for a full-bridge LLC circuit as described in any one of claims 1 to 9.

13. A computer program product, wherein, The computer program product includes computer instructions stored in a computer-readable storage medium, a processor of a computer device reading the computer instructions from the computer-readable storage medium, and the processor executing the computer instructions to cause the computer device to perform the analysis method for a full-bridge LLC circuit as described in any one of claims 1 to 9.

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