Overlaid synchronization signal (SS) block structures and cell detection procedures
WO2026105072A1PCT designated stage Publication Date: 2026-05-21LENOVO UNITED STATES INC
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Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- LENOVO UNITED STATES INC
- Filing Date
- 2025-11-15
- Publication Date
- 2026-05-21
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Figure IB2025061680_21052026_PF_FP_ABST
Abstract
Various aspects of the present disclosure relate to a signaling mechanism, such as a mechanism that implements an overlaid synchronization signal (SS) block structure or design, to detect minimized signals transmitted by the base station during initial synchronization procedures. For example, the new signaling may comprise SS blocks that include overlaid sequence carrying information, such as a synchronization signal overlaid within an ON duration of an on-off keying (OOK) pulse.
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