Photoelectric conversion element

The photoelectric conversion element addresses moiré patterns by positioning diffusion layers differently within each pixel, maintaining area efficiency and avoiding cost increases, thus achieving high-quality image capture.

WO2026105557A1PCT designated stage Publication Date: 2026-05-21SONY SEMICON SOLUTIONS CORP
View PDF 3 Cites 0 Cited by

Patent Information

Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
SONY SEMICON SOLUTIONS CORP
Filing Date
2025-10-27
Publication Date
2026-05-21

AI Technical Summary

Technical Problem

Existing infrared sensors face issues with moiré patterns when photographing subjects with patterns smaller than the pixel pitch, and methods to suppress these patterns often reduce area efficiency or increase development costs.

Method used

The photoelectric conversion element is designed with diffusion layers at different positions within each pixel, allowing for moiré pattern suppression without reducing area efficiency by maintaining the same pixel size and manufacturing process complexity.

Benefits of technology

This design effectively suppresses moiré patterns while maintaining area efficiency and avoiding increased development costs, ensuring high-quality image capture with minimal sensitivity variations.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure JP2025037548_21052026_PF_FP_ABST
    Figure JP2025037548_21052026_PF_FP_ABST
Patent Text Reader

Abstract

The present technology relates to a photoelectric conversion element that can suppress moire without reducing area efficiency. This photoelectric conversion element with a plurality of pixels includes a light receiving unit that receives infrared light, and a readout circuit that reads out, as a signal, a charge corresponding to the infrared light. The light receiving unit includes a semiconductor layer that photoelectrically converts incident infrared light, and a diffusion layer that is formed on the readout circuit side of the semiconductor layer and supplies charge obtained by photoelectric conversion to the readout circuit. Furthermore, the pixel has the diffusion layer, and the plurality of pixels include pixels having diffusion layers located at different positions. The present technology can be applied to an infrared sensor.
Need to check novelty before this filing date? Find Prior Art

Description

Photoelectric conversion element

[0001] The present technology relates to a photoelectric conversion element, and particularly to a photoelectric conversion element capable of suppressing moire without reducing the area efficiency.

[0002] Conventionally, an infrared sensor having sensitivity in the infrared region is known.

[0003] Such an infrared sensor includes, for example, an element substrate provided with a photoelectric conversion layer containing a compound semiconductor material, and a readout circuit substrate provided with a readout circuit for reading out signal charges obtained by photoelectric conversion in the photoelectric conversion layer (see, for example, Patent Document 1).

[0004] In a part of the photoelectric conversion layer, a P+-type semiconductor layer is formed by diffusing a P-type impurity such as zinc (Zn), and this P+-type semiconductor layer functions as a readout portion that outputs signal charges to the readout circuit substrate.

[0005] Also, in a digital camera, a technique has been proposed to suppress the occurrence of moire by shifting the position of the light shielding film provided in the pixel region, that is, the position of the opening that guides light incident from the outside to the pixel region, for each pixel (see, for example, Patent Document 2).

[0006] International Publication No. 2018 / 194030, Japanese Patent Application Laid-Open No. 2009-26941

[0007] By the way, in the technology described in Patent Document 1, since a P+-type semiconductor layer serving as a readout portion is formed at the center position of the pixel region in each pixel, moire may occur when photographing a subject having a pattern smaller than the pixel pitch.

[0008] On the other hand, in the technology described in Patent Document 2, although the occurrence of moire can be suppressed, since openings are provided at different positions for each pixel, it is necessary to secure a region sufficiently wider than the openings as the pixel region, and the area efficiency is reduced. That is, since the openings are provided in a part of the entire pixel region, the entire pixel region cannot be used as an effective pixel region where photoelectric conversion is performed.

[0009] This technology was developed in light of these circumstances, and aims to suppress moiré patterns without reducing area efficiency.

[0010] One aspect of this technology is a photoelectric conversion element having a plurality of pixels, comprising a light-receiving unit that receives infrared light and a readout circuit that reads out a charge corresponding to the infrared light as a signal, wherein the light-receiving unit has a semiconductor layer that photoelectrically converts the incident infrared light and a diffusion layer formed on the readout circuit side of the semiconductor layer and supplies the charge obtained by the photoelectric conversion to the readout circuit, the pixels have the diffusion layer, and the plurality of pixels include pixels in which the positions of the diffusion layer within the pixel are different from each other.

[0011] In one aspect of this technology, a photoelectric conversion element having multiple pixels is provided with a light-receiving section that receives infrared light and a readout circuit that reads out the charge corresponding to the infrared light as a signal. The light-receiving section is provided with a semiconductor layer that converts the incident infrared light into photoelectric light and a diffusion layer formed on the readout circuit side of the semiconductor layer that supplies the charge obtained by the photoelectric conversion to the readout circuit. Furthermore, each pixel has the diffusion layer, and the plurality of pixels include pixels in which the positions of the diffusion layer within each pixel are different from each other.

[0012] This is a cross-sectional view of the light-receiving part of a photoelectric conversion element. This is a diagram showing the arrangement of the diffusion layer. This is a diagram showing an example configuration of a photoelectric conversion element to which this technology is applied. This is a diagram showing a cross-section of a part of a photoelectric conversion element. This is a diagram showing the arrangement of the diffusion layer. This is a diagram illustrating the effective region of a pixel. This is a diagram showing an example configuration of a photoelectric conversion element. This is a diagram illustrating the overlap of effective pixel regions. This is a diagram illustrating the interaction of signal charges. This is a diagram illustrating sensitivity correction. This is a diagram showing an example configuration of a photoelectric conversion element. This is a diagram showing a cross-section of a part of a photoelectric conversion element. This is a diagram showing the arrangement of the diffusion layer. This is a diagram showing a cross-section of a part of a photoelectric conversion element. This is a diagram showing the arrangement of the diffusion layer. This is a diagram showing an example configuration of a pixel circuit. This is a diagram illustrating the manufacturing process of a photoelectric conversion element. This is a diagram illustrating the manufacturing process of a photoelectric conversion element. This is a diagram illustrating the manufacturing process of a photoelectric conversion element. This is a diagram illustrating the manufacturing process of a photoelectric conversion element. This is a diagram illustrating the manufacturing process of a photoelectric conversion element. This is a diagram illustrating the manufacturing process of a photoelectric conversion element. This is a diagram illustrating an example configuration of an imaging device. This is a block diagram showing an example of a schematic configuration of a vehicle control system. This is an explanatory diagram showing an example of the installation position of the external information detection unit and the imaging unit.

[0013] The following describes embodiments to which this technology is applied, with reference to the drawings.

[0014] <First Embodiment> <About this Technology> This technology suppresses moiré patterns without reducing area efficiency by providing pixels in the light-receiving section with diffuse layers in different positions, which serve as the readout section.

[0015] Figure 1 shows a cross-section of the light-receiving portion of a photoelectric conversion element that functions as an infrared sensor.

[0016] In the example shown in Figure 1, the photoelectric conversion element has an element substrate 11 and a readout circuit board 12 bonded to the element substrate 11.

[0017] The element substrate 11 consists of a photoelectric conversion layer 21, a passivation insulating film 22, a transparent electrode 23, and a wiring layer 24.

[0018] In particular, a passivation insulating film 22 is provided on the infrared light (infrared) incident surface side, a transparent electrode 23 is provided between the passivation insulating film 22 and the photoelectric conversion layer 21, and a wiring layer 24 is provided adjacent to the readout circuit board 12 side of the photoelectric conversion layer 21. The element substrate 11 is electrically connected to the readout circuit board 12 via the wiring layer 24.

[0019] The photoelectric conversion layer 21 consists of three semiconductor layers containing compound semiconductor material. Specifically, the photoelectric conversion layer 21 has an N-type semiconductor layer 25 made of InGaAs (indium gallium arsenide), an N+-type semiconductor layer 26 made of InP (indium phosphide), and an N-type semiconductor layer 27 made of InP (indium phosphide).

[0020] Furthermore, a P+ type semiconductor layer 28, which is a diffusion layer, is formed in the photoelectric conversion layer 21 by impurity diffusion from the N type semiconductor layer 27 on the read circuit board 12 side. This P+ type semiconductor layer 28 reaches the N type semiconductor layer 25 via the N type semiconductor layer 27.

[0021] In the wiring layer 24, an electrode 29 is provided directly beneath the P+ type semiconductor layer 28, and this electrode 29 is electrically connected to the read circuit board 12 by vias or pads.

[0022] In such a photoelectric conversion element, a voltage is applied to the photoelectric conversion layer 21 by the transparent electrode 23 and the electrode 29, thereby forming an electric field in the photoelectric conversion layer 21.

[0023] When infrared light is incident on the photoelectric conversion layer 21 from outside the photoelectric conversion element, the infrared light is absorbed by the N-type semiconductor layer 25. That is, photoelectric conversion occurs, and an electric charge is generated.

[0024] Since an electric field is formed in the photoelectric conversion layer 21, the charge generated by photoelectric conversion moves to the P+ type semiconductor layer 28. The charge acquired (read) by the P+ type semiconductor layer 28 is then supplied to the readout circuit board 12 via the electrode 29, etc., and a signal corresponding to the amount of supplied charge is output as a pixel signal corresponding to the amount of incident infrared light (amount of light received).

[0025] In the photoelectric conversion element with the configuration shown in Figure 1, for example, as shown in Figure 2, one P+ type semiconductor layer 28 is provided for each pixel.

[0026] Figure 2 shows a portion of the photoelectric conversion element with the configuration shown in Figure 1, viewed from above and downwards in Figure 1, that is, from a direction perpendicular to the element substrate 11. In Figure 2, the rectangular region enclosed by the dotted line represents one pixel, and the circle within that pixel represents one P+ type semiconductor layer 28.

[0027] Generally, a P+ type semiconductor layer 28 is provided at the same position within each pixel. In this example, the P+ type semiconductor layer 28 is located at the center of each pixel. When the P+ type semiconductor layers 28 are arranged regularly, or periodically, in this way, moiré patterns may occur when photographing subjects with patterns smaller than the pixel pitch.

[0028] Another approach is to suppress moiré patterns by providing apertures at different positions for each pixel. However, in such cases, structurally, it becomes necessary to secure a pixel area larger than the aperture, which reduces area efficiency.

[0029] Furthermore, if apertures are provided at different positions for each pixel, the manufacturing process of the photoelectric conversion element may also be affected by changes in the process of forming parts other than the apertures (light-shielding areas), potentially increasing development costs.

[0030] Therefore, in this technology, without changing the size of the pixels, moiré patterns can be suppressed without reducing area efficiency by providing pixels with different readout sections (P+ type semiconductor layers) among multiple pixels provided in the photoelectric conversion element. Moreover, in this technology, the processes other than the process of forming the readout section during the manufacturing of the photoelectric conversion element can be kept unchanged, thus suppressing an increase in development costs.

[0031] <Example of Photoelectric Conversion Element Configuration> Figure 3 shows an example of the configuration of one embodiment of a photoelectric conversion element (image sensor) to which this technology is applied.

[0032] The photoelectric conversion element 51 shown in Figure 3 is a semiconductor device that functions as an infrared sensor and has a light receiving section 61 and a circuit section 62.

[0033] For example, the light-receiving unit 61 and the circuit unit 62 are provided on a semiconductor chip obtained by joining multiple semiconductor substrates, and are arranged so that the light-receiving unit 61 and the circuit unit 62 overlap when viewed from a direction perpendicular to the surface of the semiconductor chip.

[0034] The light-receiving unit 61 has multiple pixels 71 arranged in a matrix, and receives infrared light (infrared rays) incident from the outside and converts it into photoelectric light. In Figure 3, only one pixel 71 is shown for clarity, but in reality, multiple pixels 71 are arranged in both the row direction (horizontal direction) and the column direction (vertical direction).

[0035] For example, when viewed from a direction perpendicular to the surface of the semiconductor chip (light-receiving section 61), if a part or all of the area of ​​the light-receiving section 61 is equally divided into multiple areas, one of the divided areas is considered to be the area of ​​one pixel 71. More specifically, the pixel-level circuits provided in the readout circuit 72 of the circuit section 62 are also included in the pixel 71. In other words, more specifically, one pixel 71 is composed of a part of the area of ​​the light-receiving section 61 and a part of the circuits of the readout circuit 72, but here, for the sake of clarity in the diagram, the pixel 71 is depicted on the light-receiving section 61.

[0036] In the region corresponding to each pixel 71 of the light-receiving unit 61, photoelectric conversion is performed for infrared light incident from the outside, and the resulting charge (signal charge) is supplied to the circuit unit 62.

[0037] The circuit unit 62 has a readout circuit 72 that reads out the charge corresponding to the infrared light incident on and received by the light receiving unit 61 as a signal. The circuit unit 62 also controls the driving of each pixel 71 as appropriate.

[0038] The readout circuit 72 reads out a signal corresponding to the amount of signal charge obtained from each pixel 71 as a pixel signal, and generates an image signal consisting of the pixel signals of each pixel 71.

[0039] FIG. 4 is a cross-sectional view of a part of the photoelectric conversion element 51. That is, FIG. 4 shows a cross-section when a part of the light-receiving part 61 and the readout circuit 72 is viewed from a direction parallel to the surface of the semiconductor chip on which the light-receiving part 61 and the readout circuit 72 are provided.

[0040] In this example, the photoelectric conversion element 51 has an element substrate 101 that functions as a light-receiving part 61, and a readout circuit substrate 102 that is bonded to the element substrate 101 and on which the readout circuit 72 is formed.

[0041] The element substrate 101 is composed of a photoelectric conversion layer 111, a passivation insulating film 112, a transparent electrode 113, and a wiring layer 114.

[0042] The photoelectric conversion layer 111 is composed of an N-type semiconductor layer 115, an N+-type semiconductor layer 116, and an N-type semiconductor layer 117, which are three semiconductor layers laminated in a direction perpendicular to the element substrate 101.

[0043] The N-type semiconductor layer 115 is a semiconductor layer (semiconductor region) having a conductive type of N-type, which is made of InGaAs (indium gallium arsenide), a semiconductor material (compound semiconductor material) that absorbs infrared light, that is, infrared rays.

[0044] Also, the N+-type semiconductor layer 116 and the N-type semiconductor layer 117 are semiconductor layers (semiconductor regions) having a conductive type of N-type, which are made of InP (indium phosphide), a semiconductor material having a larger bandgap than the semiconductor material (InGaAs) constituting the N-type semiconductor layer 115.

[0045] In particular, here, the N+-type semiconductor layer 116 provided on the incident surface side of the infrared light is a semiconductor layer having a higher concentration (higher concentration) of InP than the N-type semiconductor layer 117 provided on the side of the readout circuit substrate 120. By doing so, an appropriate electric field is easily formed in the photoelectric conversion layer 111. As a result, crosstalk (color mixing) in each pixel 71 is suppressed and the sensitivity can be improved.

[0046] The photoelectric conversion layer 111 is a semiconductor layer that performs photoelectric conversion of incident infrared light. In the figure, it is laminated in the order of an N+ type semiconductor layer 116, an N type semiconductor layer 115, and an N type semiconductor layer 117 from the upper side, that is, the light receiving surface side of the infrared light. Note that each semiconductor layer constituting the photoelectric conversion layer 111 is not limited to the semiconductor materials described above, and may be formed of any other semiconductor material.

[0047] Further, on the side of the N+ type semiconductor layer 116 opposite to the readout circuit board 102 side, a transparent electrode 113 is formed adjacent to the N+ type semiconductor layer 116. The transparent electrode 113 is used to form an electric field for reading out a signal (signal charge) corresponding to the amount of incident infrared light.

[0048] Furthermore, on the side of the transparent electrode 113 opposite to the readout circuit board 102 side, a passivation insulating film 112 is formed adjacent to the transparent electrode 113.

[0049] The surface of the passivation insulating film 112 opposite to the transparent electrode 113 side serves as a light receiving surface for infrared light incident from the outside. The passivation insulating film 112 functions not only as a protective film that prevents moisture and dust from entering the photoelectric conversion layer 111 from the outside, but also as an antireflection film.

[0050] On the readout circuit board 102 side of the photoelectric conversion layer 111, a wiring layer 114 is formed adjacent to the photoelectric conversion layer 111. In this example, the wiring layer 114 has a layer formed by an insulating film 121 and a layer formed by an insulating film 122. Various wirings and the like are formed in these layers, and the element substrate 101 and the readout circuit board 102 are electrically connected by these wirings.

[0051] On the readout circuit board 102 side in the photoelectric conversion layer 111, a diffusion layer 123 is formed to supply the signal charge obtained by photoelectric conversion in the photoelectric conversion layer 111 to the readout circuit board 102 (readout circuit 72).

[0052] For example, the diffusion layer 123 is formed by diffusing impurities into the photoelectric conversion layer 111 from the readout circuit board 102 side. This diffusion layer 123 is a semiconductor layer (semiconductor region) with a conductivity type of P, that is, a P+ type semiconductor layer, and functions as a readout unit that reads out an amount of signal charge corresponding to the amount of infrared light incident on the photoelectric conversion layer 111.

[0053] For example, the diffusion layer 123 is formed by diffusing Zn (zinc) as an impurity (P-type impurity) into the photoelectric conversion layer 111, that is, by performing Zn diffusion.

[0054] In this example, the diffusion layer 123 extends from the wiring layer 114 side (read circuit board 102 side) of the N-type semiconductor layer 117 to the N-type semiconductor layer 115. More specifically, a depletion layer is formed between the N-type semiconductor layer 117 or N-type semiconductor layer 115 and the diffusion layer 123, covering the diffusion layer 123.

[0055] Furthermore, in this example, each pixel 71 has one diffusion layer 123. That is, one diffusion layer 123 is formed (provided) within each pixel 71. Also, the diffusion layer 123 is formed at a random position for each pixel 71. Therefore, the distance between the diffusion layers 123 of adjacent pixels 71, i.e., the distance between adjacent diffusion layers 123, differs for each pixel 71.

[0056] Specifically, for example, the distance L11 between the diffusion layer 123 on the left side of the figure and the diffusion layer 123 in the center of the figure is shorter than the distance L12 between the diffusion layer 123 in the center of the figure and the diffusion layer 123 on the right side of the figure.

[0057] In each pixel 71, an electrode 124 is formed on the photoelectric conversion layer 111 side of the wiring layer 114. Specifically, the electrode 124 is formed directly beneath the diffusion layer 123 in the wiring layer 114, that is, adjacent to the diffusion layer 123 on the readout circuit board 102 side of the diffusion layer 123. In this example, the electrode 124 is formed so as to be embedded not only in the insulating film 121 but also in the insulating film 122. The electrode 124 forms an electric field in the photoelectric conversion layer 111 and functions as a readout electrode for reading out the signal charge generated in the photoelectric conversion layer 111.

[0058] In particular, in this example, when viewed from a direction perpendicular to the element substrate 101 (light-receiving section 61), the electrodes 124 of each pixel 71 are positioned at the center of those pixels 71. That is, in all pixels 71, the electrodes 124 are provided at the same position, the center of those pixels 71. Therefore, unlike the diffusion layer 123, the electrodes 124 of each pixel 71 are arranged periodically (regularly) in the row and column directions when viewed from a direction perpendicular to the element substrate 101.

[0059] Therefore, the process of forming the electrodes 124 during the manufacturing of the photoelectric conversion element 51 is exactly the same as in the case of the photoelectric conversion element shown in Figure 1, meaning that no changes are necessary, and an increase in development costs due to changes or complexity in the manufacturing process can be suppressed.

[0060] In this example, when viewed from a direction perpendicular to the element substrate 101, the diffusion layer 123 of each pixel 71 is positioned inside the electrode 124. In other words, when viewed from a direction perpendicular to the element substrate 101, the entire area of ​​the diffusion layer 123 overlaps with the electrode 124.

[0061] Wiring made of copper (Cu) or the like is formed in the wiring layer 114, particularly the layer formed by the insulating film 122. For example, the wiring layer 114 has vias 125 connected to electrodes 124 and pads 126 connected to the end of the vias 125 opposite to the electrode 124 as wiring.

[0062] The readout circuit board 102 has a readout circuit 72 formed on it, which consists of various wirings and components. The readout circuit 72 is a so-called ROIC (Readout Integrated Circuit).

[0063] In this example, the read circuit board 102 has at least pads 127, vias 128, and pads 129 formed on it as wiring. For example, pads 127 and vias 128 are made of copper (Cu), and pad 129 is made of copper (Cu) or aluminum (Al). Pads 127, vias 128, and pads 129 are formed, for example, as part of the read circuit 72.

[0064] Pad 127 is joined to pad 126, which is provided on the wiring layer 114. For example, in the photoelectric conversion element 51, the element substrate 101 and the read circuit board 102 are joined by a CuCu bond between pad 126 and pad 127. Also, in the read circuit board 102, pad 127 and pad 129 are connected by via 128.

[0065] For example, during the shooting operation of the photoelectric conversion element 51, the transparent electrode 113 and electrode 124 are set to different potentials, and a voltage is applied to the photoelectric conversion layer 111. In other words, different voltages are applied to the transparent electrode 113 and electrode 124. As a result, an electric field is formed between the transparent electrode 113 and electrode 124, i.e., in the photoelectric conversion layer 111.

[0066] In this state, when infrared light is incident on the photoelectric conversion layer 111 from the outside via the passivation insulating film 112 and the transparent electrode 113, the infrared light is absorbed by the N-type semiconductor layer 115. In other words, photoelectric conversion of the infrared light occurs in the N-type semiconductor layer 115, and a signal charge is generated. In this example, we will explain the case where a positive charge, i.e., a hole, is used as the signal charge (carrier), but the photoelectric conversion element 51 may also be configured in a way that electrons are used as the signal charge.

[0067] The signal charge generated by photoelectric conversion is guided to the diffusion layer 123 by the electric field and read (acquired) by the diffusion layer 123. Subsequently, the signal charge is supplied from the diffusion layer 123 to the readout circuit 72 via the electrode 124, via 125, and pad 126.

[0068] During a predetermined exposure period, the signal charge obtained at each pixel 71 is sequentially supplied from the diffusion layer 123 to the readout circuit 72 and accumulated. When the exposure period ends, the readout circuit 72 reads out a signal corresponding to the amount of signal charge accumulated at each pixel 71 as the pixel signal for each pixel 71. When reading out the pixel signals, appropriate processing such as AD (Analog to Digital) conversion is performed.

[0069] As described above, in the photoelectric conversion element 51, one diffusion layer 123 and one electrode 124 are provided on the readout circuit board 102 side of the element substrate 101 for each pixel 71.

[0070] Furthermore, in the photoelectric conversion element 51, as shown in Figure 5, the diffusion layer 123, which serves as a readout section for reading out signal charges, is formed at random positions for each pixel 71.

[0071] Figure 5 shows a view of a portion of the photoelectric conversion element 51 from the top-down direction in Figure 4, that is, from a direction perpendicular to the element substrate 101. In Figure 5, the rectangular area enclosed by the dotted line represents one pixel 71, and the circle within that pixel 71 represents one diffusion layer 123. For the sake of clarity, only some of the pixels 71 and diffusion layers 123 are labeled with reference numerals.

[0072] In the example shown in Figure 5, the positions of the diffusion layers 123 within each pixel 71 are different from each other. In other words, the positions of the diffusion layers 123 within each pixel 71 are random.

[0073] The position of the diffusion layer 123 referred to here is the position of the diffusion layer 123 within the pixel 71 when the element substrate 101 is viewed from a direction perpendicular to the element substrate 101. For example, if the center position of the pixel 71 is taken as the reference position, the position of the diffusion layer 123 within the pixel 71 as viewed from the reference position will be different for each pixel 71.

[0074] Specifically, for example, in Figure 5, the pixel 71 in the upper left is located to the upper left of the reference position, and in Figure 5, the pixel 71 at the leftmost end of the second row from the top is located at approximately the same position as the reference position.

[0075] Thus, because the position of the diffusion layer 123 within each pixel 71, that is, the direction of the diffusion layer 123 as seen from the reference position, and the distance from the reference position to the diffusion layer 123 differ for each pixel 71, the effective region (effective pixel region) of each pixel 71 is arranged irregularly (non-periodic), as shown in Figure 6.

[0076] In Figure 6, the effective region of each pixel 71 is shown in addition to the photoelectric conversion element 51 shown in Figure 5. In Figure 6, the dotted rectangles centered on the circles representing each diffusion layer 123 indicate the effective region of the pixel 71.

[0077] The effective region of the pixel 71 (effective pixel region) referred to here is the region of the element substrate 101 that functions substantially as a pixel 71, that is, the region in which signal charge can be captured by the diffusion layer 123 provided on the pixel 71.

[0078] For example, if we focus on the pixel 71 in the upper left of Figure 6, the rectangular region R11 centered on the diffusion layer 123 within that pixel 71 is considered the effective region of that pixel 71. In this example, since the diffusion layer 123 is located shifted to the upper left from the center position (reference position) of the pixel 71, the effective region R11 is also shifted to the upper left in the figure by the same amount relative to the actual region of the pixel 71. During photoelectric conversion, the signal charge generated within region R11 basically moves to the diffusion layer 123 at the center of region R11.

[0079] As described above, in the photoelectric conversion element 51, the diffusion layer 123 is formed at random positions within each pixel 71. Therefore, when viewed from a direction perpendicular to the light-receiving surface of the light-receiving unit 61, the diffusion layer 123 of each pixel 71, that is, the effective pixel area of ​​each pixel 71, is arranged aperiodically (irregularly).

[0080] Therefore, even when photographing subjects with patterns finer than the pixel pitch (the distance between pixels 71), i.e., subjects with many high-frequency components, the occurrence of moiré patterns can be suppressed. Moreover, in the photoelectric conversion element 51, there is no need to provide an opening with a shifted position for each pixel 71 in order to suppress moiré patterns, and the entire light-receiving surface of the light-receiving unit 61 can be used as the area of ​​each pixel 71, so the area efficiency does not decrease.

[0081] Furthermore, in the example shown in Figure 4, the manufacturing process of the photoelectric conversion element 51, excluding the process of forming the diffusion layer 123, can be the same as the manufacturing process of the photoelectric conversion element when the diffusion layer is arranged regularly (periodically), as in the example in Figure 1. In other words, there is no need to change the process. Therefore, it is possible to suppress the increase in development costs due to changes in the manufacturing process or the complexity of the process.

[0082] In this example, the diffusion layer 123 of each pixel 71 is formed at random positions. However, the example is not limited to this; any number of pixels 71 in the light-receiving unit 61 that have different diffusion layer positions can be included. In this case, moiré patterns can be suppressed without reducing area efficiency compared to the case where the diffusion layers of each pixel are arranged regularly (periodically).

[0083] <Second Embodiment> <Example of Photoelectric Conversion Element Configuration> For example, if the position of the diffusion layer 123 differs for each pixel 71, variations in sensitivity will occur among multiple pixels 71.

[0084] Therefore, information regarding the distance between the diffusion layers 123 of each pixel 71 may be stored, and sensitivity correction for each pixel 71 may be performed based on that information.

[0085] In such cases, the photoelectric conversion element 51 is configured as shown in Figure 7, for example. In Figure 7, parts corresponding to those in Figure 3 are given the same reference numerals, and their explanations are omitted as appropriate.

[0086] The configuration of the photoelectric conversion element 51 shown in Figure 7 is a modified version of the photoelectric conversion element 51 shown in Figure 3, with the addition of a memory 151 and a sensitivity correction unit 152. In other words, in the photoelectric conversion element 51 shown in Figure 7, the readout circuit 72 is newly equipped with a memory 151 and a sensitivity correction unit 152.

[0087] The memory 151 has in advance distance information indicating the distance between the diffusion layers 123 of each pixel 71, that is, the distance between adjacent diffusion layers 123, and supplies the stored distance information to the sensitivity correction unit 152.

[0088] For example, the memory 151 stores distance information for each pixel 71 between it and eight adjacent pixels 71 in each of the eight directions: up, down, left, right, and diagonally. Furthermore, distance information can be obtained, for example, from information about the mask used during the manufacturing of the photoelectric conversion element 51, particularly during the formation of the diffusion layer 123.

[0089] Here, we will describe an example where the information regarding the distance between the diffusion layers 123 is distance information. However, the information regarding the distance between the diffusion layers 123 is not limited to this; it can be anything, such as a correction coefficient for sensitivity correction determined by distance.

[0090] The sensitivity correction unit 152 corrects the pixel signal obtained for each pixel 71 based on the distance information stored in the memory 151, thereby performing sensitivity correction for each pixel 71.

[0091] For example, the sensitivity correction unit 152 calculates a correction coefficient based on the distance information for the pixel 71, and performs sensitivity correction by correcting the pixel signal based on that correction coefficient. In this case, sensitivity correction, i.e., multiplication by the correction coefficient, is performed on the pixel signal after AD conversion.

[0092] The sensitivity correction may also be performed on the pixel signal before AD conversion. In such a case, for example, the sensitivity correction unit 152 calculates an analog gain corresponding to the correction coefficient based on the distance information held in the memory 151. The sensitivity correction unit 152 then corrects the analog pixel signal before AD conversion by appropriately controlling the readout circuit 72 using the calculated analog gain. That is, the operation of the readout circuit 72 is controlled so that gain correction is performed on the pixel signal using the analog gain.

[0093] In addition, if the capacitance of the Floating Diffusion (FD), which is a charge holding part in the readout circuit 72 that holds the signal charge for each pixel 71, can be adjusted by adding capacitance to the FD, then the sensitivity correction of the pixel 71 may be performed by adjusting the capacitance of the FD. In such a case, the sensitivity correction unit 152 determines the capacitance to be added to the FD for each pixel 71 based on the distance information held in the memory 151. The sensitivity correction unit 152 then controls the readout circuit 72 to add the determined capacitance to the FD. By adding capacitance to the FD, the capacitance of the FD changes (capacitance adjustment is performed), and as a result, the value of the readout pixel signal changes. This realizes the sensitivity correction of the pixel 71.

[0094] If the placement of the diffusion layer 123 differs for each pixel 71, depending on the placement of the diffusion layer 123 for each pixel 71, the effective pixel areas may overlap, as shown in Figure 8, for example.

[0095] Figure 8 shows a view of a portion of the photoelectric conversion element 51 from a direction perpendicular to the element substrate 101. In Figure 8, the regularly arranged dotted rectangles represent a single pixel 71, and the single circle within each pixel 71 represents a single diffusion layer 123. Furthermore, the dotted rectangle centered on the circle representing the diffusion layer 123 indicates the effective area of ​​the pixel 71.

[0096] For example, in the example shown in Figure 8, let's focus on region R21, which consists of four pixels 71. In the figure, the right side shows a magnified view of the portion represented by region R21.

[0097] Focusing on the upper right pixel 71 (hereinafter also referred to as the "pixel of interest 71") among the four pixels 71 within region R21, the effective region of this pixel of interest 71 is region R31. Furthermore, the effective region of the pixel 71 adjacent to the left of the pixel of interest 71 (hereinafter also referred to as the "left adjacent pixel 71") is region R32, and the effective region of the pixel 71 adjacent to the bottom of the pixel of interest 71 (hereinafter also referred to as the "bottom adjacent pixel 71") is region R33.

[0098] In this example, the diffusion layer 123 of the pixel of interest 71 is formed close to the diffusion layer 123 of the left adjacent pixel 71. As a result, a portion of the effective region R41 of the pixel of interest 71 overlaps with the effective region R31 of the left adjacent pixel 71. In other words, region R41 is located close to both the diffusion layer 123 of the pixel of interest 71 and the diffusion layer 123 of the left adjacent pixel 71.

[0099] Therefore, in region R41, when infrared light is incident and photoelectric conversion occurs, the resulting signal charge may be read out by the diffusion layer 123 of the pixel of interest 71, or by the diffusion layer 123 of the left adjacent pixel 71. In other words, there is competition for signal charge (carrier) between the pixel of interest 71 and the left adjacent pixel 71. This results in variations in the sensitivity of the pixel 71.

[0100] Similarly, for the lower adjacent pixel 71, a portion of the effective region R33 of the lower adjacent pixel 71 and the effective region R31 of the pixel of interest 71 overlap in region R42, resulting in a competition for signal charge in this region R42.

[0101] Refer to Figure 9 to explain this type of signal charge sharing.

[0102] Figure 9 shows a cross-section of a portion of the light-receiving section 61 and the readout circuit 72 in the photoelectric conversion element 51. Note that in Figure 9, the same reference numerals are used for parts corresponding to those in Figure 4, and their explanations are omitted as appropriate.

[0103] Furthermore, in Figure 9, some of the reference numerals that were used in Figure 4 have been omitted to improve the clarity of the diagram. In addition, although not shown in Figure 9, the read circuit board 102, or more specifically the read circuit 72 on the read circuit board 102, is provided with a memory 151 and a sensitivity correction unit 152 as circuits that constitute the read circuit 72.

[0104] In the example shown in Figure 9, three diffusion layers 123 are illustrated in the photoelectric conversion layer 111.

[0105] In this diagram, the distance between the diffusion layer 123 on the left and the diffusion layer 123 in the center is distance L21, and the distance between the diffusion layer 123 in the center and the diffusion layer 123 on the right is distance L22. In other words, distance L21 is relatively short, indicating that the left and center diffusion layers 123 are located close together. Also, distance L22 is relatively long, indicating that the right and center diffusion layers 123 are located far apart.

[0106] For example, let's focus on region R61 in the photoelectric conversion layer 111. Near this region R61, there are two diffusion layers 123, one located on the left side of the figure and the other located in the center of the figure.

[0107] Therefore, the signal charge generated within region R61 moves to either the left diffusion layer 123 or the central diffusion layer 123, depending on the electric field formed in the photoelectric conversion layer 111. In other words, there is competition for signal charge between the two diffusion layers 123. This results in variations in sensitivity for each pixel 71. Specifically, for example, if there are many other pixels 71 adjacent to a given pixel 71 that have short distances between their diffusion layers 123, the sensitivity of that given pixel 71 is likely to decrease.

[0108] On the other hand, focusing on region R62 in the photoelectric conversion layer 111, the only diffusion layer 123 in the vicinity of region R62 is the one located on the right side in the figure. Therefore, the signal charge generated within region R62 moves to the diffusion layer 123 on the right side in the figure, and there is no competition for signal charge. Consequently, there is no decrease in the sensitivity of the pixel 71.

[0109] Thus, because the distance between the diffusion layer 123 and adjacent pixels 71 differs for each pixel 71, variations in the sensitivity of the pixels 71 occur. Therefore, in order to correct these variations in sensitivity, the readout circuit 72 shown in Figure 7 is provided with a memory 151 and a sensitivity correction unit 152.

[0110] Here, we will explain a specific example of applying sensitivity correction based on distance information to the digital pixel signal after AD conversion.

[0111] For example, let's assume that a diffusion layer 123 is arranged for each pixel 71 as shown in Figure 10.

[0112] Figure 10 shows a view of a portion of the photoelectric conversion element 51 from a direction perpendicular to the element substrate 101, where regularly arranged dotted rectangles represent a single pixel 71. Within each pixel 71, a single circle represents a single diffusion layer 123, and the dotted rectangle centered on the circle representing the diffusion layer 123 indicates the effective area of ​​the pixel 71. In Figure 10, reference numerals are assigned only to some of the pixels 71 and diffusion layers 123 for clarity.

[0113] In the example shown in Figure 10, a total of nine pixels 71 are illustrated in a 3x3 grid. We will focus on the pixel 71 located in the center of these pixels 71 and consider sensitivity correction for that pixel 71 (hereinafter also referred to as the "focus pixel 71").

[0114] The effective pixel area of ​​the pixel of interest 71 is region R71. Of this effective region R71, the areas that overlap with the pixel areas of the eight adjacent pixels 71 are regions R72 and R73. The combined area of ​​regions R72 and R73 is approximately 1 / 5 of the area of ​​the effective region R71 of the pixel of interest 71. In other words, about 1 / 5 of the entire region R71 overlaps with the effective areas of the adjacent pixels 71.

[0115] The sensitivity correction unit 152 calculates the area of ​​region R72 and region R73, that is, the area of ​​the region of region R71 that overlaps with the adjacent pixel 71, based on the distance information between adjacent pixels 71 stored in the memory 151, and calculates a correction coefficient for the pixel of interest 71 based on the calculation result. Here, since about 1 / 5 of the entire region R71 overlaps with the adjacent pixel 71, a correction coefficient of "1.25" is calculated to correct the sensitivity by 1.25 (= 1 / (1-1 / 5)).

[0116] The sensitivity correction unit 152 multiplies the pixel signal of the pixel of interest 71 by the correction coefficient "1.25" obtained in this way, and outputs the pixel signal multiplied by the correction coefficient as the final pixel signal, that is, the pixel signal after sensitivity correction, to the next stage.

[0117] As described above, by performing sensitivity correction according to distance information, it is possible to suppress moiré patterns without reducing area efficiency, as well as suppress sensitivity variations, thereby obtaining higher quality images.

[0118] <Third Embodiment> <Example of Photoelectric Conversion Element Configuration> When correcting for variations in sensitivity between pixels 71, instead of storing distance information in the memory 151 in advance, information equivalent to distance information may be obtained by measurement at any time.

[0119] In such cases, the photoelectric conversion element 51 is configured as shown in Figure 11, for example. Note that in Figure 11, parts corresponding to those in Figure 7 are denoted by the same reference numerals, and their explanations are omitted as appropriate.

[0120] The configuration of the photoelectric conversion element 51 shown in Figure 11 is the same as the photoelectric conversion element 51 shown in Figure 7, but with a measurement unit 181 instead of the memory 151. In other words, in the photoelectric conversion element 51 shown in Figure 11, the reading circuit 72 is provided with a measurement unit 181 and a sensitivity correction unit 152.

[0121] The measurement unit 181 applies a voltage to a test wire provided in the wiring layer 114 to measure a current value corresponding to the length of the test wire, and obtains the resistance value of the test wire from the measurement result. In other words, the measurement unit 181 measures the resistance value of the test wire provided between adjacent diffusion layers 123. The sensitivity correction unit 152 performs sensitivity correction for each pixel 71 based on the resistance value measurement result from the measurement unit 181.

[0122] Refer to Figure 12 for further explanation of how to correct for sensitivity variations.

[0123] Figure 12 shows a cross-section of a portion of the light-receiving section 61 and the readout circuit 72 in the photoelectric conversion element 51. Note that parts corresponding to those in Figure 4 are denoted by the same reference numerals in Figure 12, and their explanations are omitted as appropriate.

[0124] Furthermore, in Figure 12, some of the reference numerals that were used in Figure 4 have been omitted to improve the clarity of the diagram. In addition, although not shown in Figure 12, the readout circuit board 102, or more specifically the readout circuit 72 on the readout circuit board 102, is provided with a measurement unit 181 and a sensitivity correction unit 152 as circuits that constitute the readout circuit 72.

[0125] In the example shown in Figure 12, the photoelectric conversion layer 111 has three diffusion layers 123, and test wiring 211 for current measurement (resistance measurement) is formed in the portion of the wiring layer 114 between adjacent diffusion layers 123. That is, when viewed from above and below in the figure, i.e., from a direction perpendicular to the element substrate 101, test wiring 211 is formed between adjacent diffusion layers 123 in the vertical or horizontal direction. In particular, the length of the test wiring 211 is formed such that the longer the distance between adjacent diffusion layers 123, the longer the test wiring 211 is. In other words, the length of the test wiring 211 corresponds to the distance between adjacent diffusion layers 123. In this example, because test wiring 211 is formed, the electrodes 124 of each pixel 71 are arranged in a non-periodic (irregular) manner, unlike in the example in Figure 4.

[0126] The test wiring 211 is embedded in the insulating film 121 of the wiring layer 114, and during the manufacturing of the photoelectric conversion element 51, the test wiring 211 is formed in the process of forming the electrodes 124, or in a process immediately before or after that process.

[0127] Furthermore, at each end of the test wiring 211, wiring 212 is provided for measuring the current flowing through the test wiring 211. One end of wiring 212 is connected to the end of the test wiring 211, and the other end of wiring 212 is connected to a pad 213 provided on the end of the read circuit board 102 opposite to the element board 101 side.

[0128] Therefore, the wiring 212 penetrates the insulating film 122 portion of the wiring layer 114 and extends further to the portion of the pad 213 on the read circuit board 102. More specifically, the wiring 212 is composed of vias and pads made of Cu (copper) or the like.

[0129] These wires 212 and pads 213 electrically connect both ends of the test wire 211 to the readout circuit 72. In particular, the measuring unit 181, which constitutes the readout circuit 72, is electrically connected to the wires 212 or pads 213.

[0130] The measurement unit 181 applies a desired voltage to the test wiring 211 by applying a voltage to the wiring 212 at any given timing.

[0131] For example, if the potential at one end of the test wiring 211 is V1, and the potential at the other end of the test wiring 211 is V2 (which is different from V1), then a voltage equal to the difference between these potentials is applied to the test wiring 211. Specifically, if, for example, V1 < V2, then a voltage of (V2 - V1) will be applied to the test wiring 211.

[0132] When a voltage is applied to the test wiring 211, the measurement unit 181 measures the current I flowing through the test wiring 211 as a result of the applied voltage, and calculates the resistance value σ = (V2-V1) / I of the test wiring 211 based on the applied voltage (V2-V1) and the measured current I. In other words, the resistance value σ of the test wiring 211 is measured.

[0133] The resistance value σ obtained in this way is proportional to the length of the test wiring 211. Also, the longer the distance between diffusion layers 123, the longer the length of the test wiring 211. Therefore, it can be seen that the smaller the resistance value σ, the shorter the distance between adjacent diffusion layers 123, and the larger the sensitivity correction value (correction coefficient) needs to be.

[0134] For example, the sensitivity correction unit 152 calculates a correction coefficient for each pixel 71 based on the difference or ratio of the resistance value σ obtained for each pixel 71 by the measurement unit 181, and performs sensitivity correction by multiplying the pixel signal by the correction coefficient. As an example, for a pixel 71, the sensitivity correction unit 152 calculates the average value of the resistance value σ between that pixel 71 and a total of four adjacent pixels 71 (hereinafter also referred to as the pixel average value), and calculates the average of the pixel average values ​​of all pixels 71 (hereinafter also referred to as the overall average value). Then, for each pixel 71, the sensitivity correction unit 152 calculates a correction coefficient for the pixel 71 based on the difference or ratio between the pixel average value of that pixel 71 and the overall average value. At this time, the smaller the pixel average value, the larger the correction coefficient becomes.

[0135] Since the correction coefficient for each pixel 71 only needs to be calculated once, and the same correction coefficient can be used thereafter, the calculated correction coefficient may be stored in a memory provided in the readout circuit 72. In this case, the sensitivity correction unit 152 can read the correction coefficient for each pixel 71 from the memory and perform sensitivity correction.

[0136] As described above, by forming the test wiring 211 and measuring the resistance value in the test wiring 211, sensitivity correction can be performed according to the distance between the diffusion layers 123. Therefore, with the photoelectric conversion element 51 with the configuration shown in Figures 11 and 12, not only can moiré patterns be suppressed without reducing area efficiency, but variations in sensitivity can also be suppressed, resulting in higher quality images.

[0137] <Fourth Embodiment> <Example of Diffusion Layer Arrangement> In the photoelectric conversion element 51, it is sufficient that there are multiple pixels 71 in total where the arrangement positions of the diffusion layers 123 differ from each other, and it is not necessary for the arrangement positions of the diffusion layers 123 to be random throughout the entire light-receiving section 61.

[0138] Therefore, as shown in Figure 13, for example, the diffusion layer 123 may be randomly arranged in units of a certain number of pixels 71.

[0139] Figure 13 shows a view of a portion of the photoelectric conversion element 51 from a direction perpendicular to the element substrate 101. In Figure 13, each regularly arranged dotted rectangle represents a single pixel 71, and each circle within a pixel 71 represents a single diffusion layer 123. Note that, for clarity, only some of the pixels 71 and diffusion layers 123 in Figure 13 are labeled with reference numerals.

[0140] In this example, a unit region is defined as a rectangular area consisting of 4x4 pixels that are adjacent to each other, i.e., a total of 16 adjacent pixels 71. The area consisting of all pixels 71 is divided into multiple unit regions that are adjacent to each other. In other words, by arranging multiple unit regions in the vertical and horizontal directions in the diagram, an area containing all pixels 71 is formed.

[0141] For example, in the figure, the region R91 in the upper left is considered a single unit region. Within each unit region, such as region R91, the placement of the diffusion layer 123 for each pixel 71 is determined so that the placement of the diffusion layer 123 for each pixel 71 within that unit region is random.

[0142] For example, in the diagram within region R91, the diffusion layer 123 is positioned in the upper left corner of the upper left pixel 71, while the diffusion layer 123 is positioned approximately in the center of the pixel 71 adjacent to the right of that pixel 71. Thus, within a unit region, the positions of the diffusion layer 123 for each pixel 71 are different from each other. In other words, the arrangement pattern of the diffusion layer 123 for each pixel 71 within a unit region is a random arrangement pattern.

[0143] Hereinafter, the arrangement pattern of the diffuse layer 123 of the pixels 71 in the entire unit region will also be referred to as the unit pattern. In this example, the unit pattern is a random (irregular) arrangement pattern of the diffuse layer 123.

[0144] Furthermore, the arrangement pattern of the diffusion layer 123 in all unit regions is the same. That is, in any unit region, the arrangement pattern of the diffusion layer 123 in the entire unit region is always the same unit pattern. Therefore, for example, the arrangement positions of the diffusion layer 123 for pixels 71 that are in the same positional relationship within any two unit regions will always be the same.

[0145] In other words, the arrangement pattern of the diffusion layer 123 for each pixel 71 in the entire region consisting of all pixels 71 is an arrangement pattern obtained by periodically arranging the unit pattern in the vertical and horizontal directions in the figure. Therefore, in the entire region consisting of all pixels 71, the arrangement pattern of the diffusion layer 123 is a periodic (regular) arrangement pattern with the unit pattern as the unit.

[0146] In this way, by periodically arranging the diffusion layer 123 with unit regions as the unit, signal processing for the image signal (pixel signal) in the readout circuit 72 and the like can be simplified.

[0147] In other words, if signal processing such as sensitivity correction is performed on a unit region as a single unit, then that signal processing can be extended to the entire region, thereby reducing the overall amount of computation and simplifying the calculations. For example, if a correction coefficient matrix consisting of correction coefficients for each pixel 71 within a unit region is obtained, then sensitivity correction can be performed on each unit region by using that correction coefficient matrix to perform the same calculation on each unit region.

[0148] <Fifth Embodiment> <Example of Photoelectric Conversion Element Configuration> In the above, an example in which one diffusion layer 123 is provided for one pixel 71 has been described, but two or more diffusion layers may be provided for one pixel 71.

[0149] For example, a single pixel 71 may be provided with a diffusion layer randomly arranged and a diffusion layer placed at a predetermined position, such as the center of the pixel 71. In other words, a single pixel 71 may be provided with a diffusion layer that is irregularly (non-periodic) arranged and a diffusion layer that is regularly (periodic) arranged.

[0150] In such cases, the photoelectric conversion element 51 is configured as shown in Figure 14, for example.

[0151] Figure 14 is a cross-sectional view of a portion of the photoelectric conversion element 51. Specifically, Figure 14 shows a cross-section of a portion of the light-receiving unit 61 and the readout circuit 72, viewed from a direction parallel to the surface of the semiconductor chip on which the light-receiving unit 61 and the readout circuit 72 are provided.

[0152] Note that in Figure 14, the same reference numerals are used for parts corresponding to those in Figure 4, and their explanations are omitted as appropriate. Also, in Figure 14, some reference numerals have been omitted for clarity.

[0153] In the example shown in Figure 14, each pixel 71 is provided with a diffusion layer 123 placed at a random position (arbitrary position) within the pixel 71, and a diffusion layer 241 placed at a predetermined position within the pixel 71. That is, each pixel 71 has two diffusion layers, the diffusion layer 123 and the diffusion layer 241. In particular, the diffusion layer 241 is formed at the same position within each pixel 71.

[0154] The diffusion layer 241, similar to the diffusion layer 123, is made of a P+ type semiconductor layer formed by diffusing Zn (zinc), etc., and functions as a readout unit that reads out a signal charge corresponding to the amount of incident infrared light. The diffusion layer 241 is formed to extend from the wiring layer 114 side of the N-type semiconductor layer 117 to partway up the N-type semiconductor layer 115.

[0155] Furthermore, an electrode 242 similar to electrode 124 is formed directly beneath the diffusion layer 241 in the wiring layer 114, that is, on the read circuit board 102 side of the diffusion layer 241. Electrode 242 forms an electric field in the photoelectric conversion layer 111 and functions as a read electrode for reading out the signal charge generated in the photoelectric conversion layer 111.

[0156] The layer formed by the insulating film 122 of the wiring layer 114 has vias 243 connected to electrodes 242 and pads 244 connected to the end of the vias 243 opposite to the electrode 242, both made of copper (Cu) or the like.

[0157] Furthermore, pads 245, vias 246, and pads 247 are formed on the read circuit board 102 as wiring. For example, pads 245 and vias 246 are made of copper (Cu), and pad 247 is made of copper (Cu) or aluminum (Al).

[0158] Pad 245 is joined to pad 244 by a CuCu bond or the like, and pad 247 is connected to pad 245 via via 246.

[0159] In this example, each pixel 71 is provided with two diffusion layers, diffusion layer 123 and diffusion layer 241. However, during shooting, for example, only one of these diffusion layers, 123 or 241, is used.

[0160] For example, when the diffusion layer 123 is used, a voltage is applied to the transparent electrode 113 and electrode 124 to form an electric field, and the signal charge generated by photoelectric conversion as described above is read (acquired) by the diffusion layer 123. At this time, no voltage is applied to electrode 242.

[0161] In contrast, when the diffusion layer 241 is used, a voltage is applied to the transparent electrode 113 and electrode 242 to form an electric field, and the signal charge generated by photoelectric conversion is read (acquired) by the diffusion layer 241. The read signal charge is then supplied from the diffusion layer 241 to the readout circuit 72 via electrode 242, via 243, and pad 244. In this case, no voltage is applied to electrode 124.

[0162] For example, when each pixel 71 is viewed from a direction perpendicular to the element substrate 101, it looks like Figure 15. In Figure 15, each dotted rectangular area represents one pixel 71, and one circle within that pixel 71 represents one diffusion layer 123 or diffusion layer 241. In particular, circles without hatching (diagonal lines) represent diffusion layer 123, and circles with hatching represent diffusion layer 241. Note that in Figure 15, reference numerals are only assigned to some of the pixels 71, diffusion layers 123, and diffusion layers 241 for clarity.

[0163] In this example, all pixels 71 have a diffusion layer 241 and a diffusion layer 123. Furthermore, in each pixel 71, the diffusion layer 241 is located in the central part of the pixel 71. Therefore, when viewed as a whole, the diffusion layers 241 of each pixel 71 are arranged at equal intervals in the vertical, horizontal, and vertical directions. In other words, multiple diffusion layers 241 are arranged regularly (periodically).

[0164] In contrast, the position of the diffusion layer 123 within each pixel 71 differs for each pixel 71. That is, the diffusion layer 123 of each pixel 71 is positioned randomly within the pixel 71. Therefore, when viewed as a whole, the diffusion layer 123 of each pixel 71 is arranged irregularly (non-periodically).

[0165] Diffusion layer 123 and diffusion layer 241 are basically the same except for their arrangement positions. Hereafter, diffusion layer 123 will be specifically referred to as randomly arranged diffusion layer 123, and diffusion layer 241 will be referred to as normally arranged diffusion layer 241.

[0166] In this example, since a single pixel 71 is provided with both a diffusion layer 123 and a diffusion layer 241, it is possible to switch between using the diffusion layer 123 and the diffusion layer 241 as appropriate during shooting, depending on the subject.

[0167] For example, when photographing a subject that does not have high-frequency components, no moiré patterns will occur in the image obtained by the photograph, so it is conceivable to read out the signal charge using a normally arranged diffusion layer 241, i.e., a normally arranged diffusion layer 241.

[0168] In this case, since there is no variation in sensitivity due to the placement of the diffusion layer 241, the sensitivity correction unit 152 does not need to perform calculations such as sensitivity correction. In other words, a high-quality image without moiré can be obtained with less computation and without reducing area efficiency.

[0169] In contrast, when photographing a subject that contains high-frequency components, for example, by reading out the signal charge using randomly arranged diffusion layers 123 as described in the first embodiment, the occurrence of moiré can be suppressed without reducing area efficiency. In this case, sensitivity correction according to the distance between the diffusion layers 123 may be performed using the method described above.

[0170] <Sixth Embodiment> <Example of Diffusion Layer Arrangement> When the light-receiving unit 61 is provided with pixels 71 having a normally arranged diffusion layer 241 and a randomly arranged diffusion layer 123, that is, when providing pixels 71 having two diffusion layers, it is not necessarily required that all pixels 71 have two diffusion layers.

[0171] Therefore, for example, among the multiple pixels 71 constituting the light-receiving unit 61, some pixels 71 may be provided with a normally arranged diffusion layer 241 and a randomly arranged diffusion layer 123, while the other pixels 71 may be provided with only the normally arranged diffusion layer 241.

[0172] In such cases, for example, as shown in Figure 16, it is conceivable to provide a randomly arranged diffusion layer 123 in units of one per several pixels.

[0173] Figure 16 shows a view of a portion of the photoelectric conversion element 51 from a direction perpendicular to the element substrate 101. In Figure 16, the same reference numerals are used for parts corresponding to those in Figure 15, and their explanations are omitted as appropriate. Also, in Figure 16, reference numerals are only used for some of the pixels 71, diffusion layer 123, and diffusion layer 241 in order to improve the clarity of the diagram.

[0174] In this example, each region consisting of four adjacent pixels (2x2 pixels) has one pixel 71 that has both a normally arranged diffusion layer 241 and a randomly arranged diffusion layer 123. That is, within a region of four adjacent pixels 71, only one pixel 71 has both the normally arranged diffusion layer 241 and the randomly arranged diffusion layer 123, while the other three pixels 71 have only the normally arranged diffusion layer 241 as their diffusion layer and do not have the randomly arranged diffusion layer 123.

[0175] Furthermore, for each 2x2 pixel region, the placement positions of the pixels 71 having the randomly arranged diffusion layer 123 within that region also differ from region to region.

[0176] In the following, a pixel 71 provided only with a normally arranged diffusion layer 241 will be specifically referred to as a normal pixel 71, and a pixel 71 provided with both a normally arranged diffusion layer 241 and a randomly arranged diffusion layer 123 will be referred to as a switchable pixel 71.

[0177] During shooting, pixel binning may be performed to increase sensitivity.

[0178] In the pixel addition operation, for example, the pixel signals obtained from a total of four adjacent 2x2 pixels 71 are added together in the readout circuit 72, and the resulting signal is used as the pixel signal for one pixel of the image.

[0179] When this type of pixel binning operation (pixel addition processing) is performed, a 2x2 pixel area becomes the effective area of ​​a single pixel, resulting in a larger effective pixel size compared to when pixel binning is not performed. Consequently, moiré patterns are more likely to occur than during normal shooting, i.e., when pixel binning is not performed.

[0180] Therefore, for example, when performing pixel addition, it is conceivable that during shooting, the signal charge is read out using the normally arranged diffusion layer 241 for the normal pixels 71, and the signal charge is read out using the randomly arranged diffusion layer 123 for the switchable pixels 71. In this case, the signal obtained by adding the pixel signals obtained from the three normal pixels 71 and the pixel signal obtained from the one switchable pixel 71 is the final pixel signal of one pixel.

[0181] In this way, by using the randomly arranged diffusion layer 123 during pixel addition, moiré patterns can be suppressed without reducing area efficiency.

[0182] Furthermore, for example, during normal shooting when pixel addition is not performed, the signal charge can be read using the normally arranged diffusion layer 241 of each pixel 71. Alternatively, even during normal shooting, the signal charge may be read using the randomly arranged diffusion layer 123 for the switchable pixels 71. In addition, the light-receiving unit 61 may be provided with pixels 71 that have only the normally arranged diffusion layer 241 and pixels 71 that have only the randomly arranged diffusion layer 123.

[0183] <Seventh Embodiment> <Example of Photoelectric Conversion Element Configuration> In the case where a normally arranged diffusion layer 241 and a randomly arranged diffusion layer 123 are provided in one pixel 71, as shown in the configurations in Figures 15 and 16, some of the circuits constituting the pixel 71 may be shared between the normally arranged diffusion layer 241 and the randomly arranged diffusion layer 123.

[0184] In other words, a circuit common to both the normally arranged diffusion layer 241 and the randomly arranged diffusion layer 123 provided on the same pixel 71 may be provided for reading out the signal charge supplied from the normally arranged diffusion layer 241 or the randomly arranged diffusion layer 123 as a pixel signal.

[0185] In such cases, the circuit configuration of the pixel 71, or more specifically, the switchable pixel 71, will be as shown in Figure 17, for example. Figure 17 shows an example of the configuration of the circuit (pixel circuit) of the pixel 71 that functions as the switchable pixel 71 in Figure 15 or Figure 16, for example.

[0186] In the example shown in Figure 17, the pixel 71 has a randomly arranged diffusion layer 123, a capacitor 301, a transfer transistor 302, a normally arranged diffusion layer 241, a capacitor 303, a transfer transistor 304, an FD 305 (floating diffusion 305), a reset transistor 306, an amplification transistor 307, and a selection transistor 308.

[0187] Note that, although photodiodes are depicted in the image of the randomly arranged diffusion layer 123 and the normally arranged diffusion layer 241, photodiodes are not actually provided in the randomly arranged diffusion layer 123 and the normally arranged diffusion layer 241.

[0188] Furthermore, capacitor 301, transfer transistor 302, capacitor 303, transfer transistor 304, FD 305, reset transistor 306, amplification transistor 307, and selection transistor 308 are provided in the readout circuit 72.

[0189] Furthermore, a vertical signal line 309 is connected to the selection transistor 308 of the pixel 71, and the pixel signal is output from the amplification transistor 307 to the AD conversion circuit in the readout circuit 72 via the selection transistor 308 and the vertical signal line 309.

[0190] When the signal charge generated by photoelectric conversion in the photoelectric conversion layer 111 is read by the randomly arranged diffusion layer 123, the signal charge is supplied from the randomly arranged diffusion layer 123 to the capacitor 301 via electrodes 124, vias 125, pads 126, 127, vias 128, and pad 129. The capacitor 301 is made of, for example, a capacitor and stores (holds) the signal charge supplied from the randomly arranged diffusion layer 123.

[0191] The transfer transistor 302 turns on and off in response to the control signal TG supplied from the readout circuit 72. That is, the transfer transistor 302 is either on (conducting) or off (non-conducting) in response to the control signal TG.

[0192] When the transfer transistor 302 is turned on by the control signal TG, it transfers the signal charge stored in the capacitor 301 to the FD 305.

[0193] When the signal charge generated by photoelectric conversion in the photoelectric conversion layer 111 is read by the normally arranged diffusion layer 241, that signal charge is supplied from the normally arranged diffusion layer 241 to the capacitor 303 via electrodes 242, vias 243, pads 244, pads 245, vias 246, and pads 247. The capacitor 303 is made of, for example, a capacitor and stores (holds) the signal charge supplied from the normally arranged diffusion layer 241.

[0194] The transfer transistor 304 turns on (conductive) or off (non-conductive) in response to the control signal TG2 supplied from the readout circuit 72. When the transfer transistor 304 is turned on by the control signal TG2, it transfers the signal charge stored in the capacitor 303 to the FD 305.

[0195] FD305 is a charge holding unit that holds the signal charge read from capacitor 301 or capacitor 303 in order to read it out as a pixel signal. FD305 holds (stores) the signal charge supplied from capacitor 301 via transfer transistor 302, or the signal charge supplied from capacitor 303 via transfer transistor 304.

[0196] The reset transistor 306 and the amplification transistor 307 are connected to FD305, and in particular, FD305 is connected to the gate of the amplification transistor 307. In addition, the vertical signal line 309 is connected to the amplification transistor 307 via the selection transistor 308.

[0197] The reset transistor 306 is turned on (conducting) or off (non-conducting) by the control signal RST supplied from the readout circuit 72. When the reset transistor 306 is turned on, the charge held in FD 305 is discharged, and the potential of FD 305 is reset.

[0198] The amplifying transistor 307 forms a source follower circuit with a predetermined constant current source and outputs a pixel signal corresponding to the amount of charge (signal charge) held in FD305, i.e., the potential.

[0199] The selection transistor 308 is turned on (conducting) or off (non-conducting) by the control signal SEL supplied from the readout circuit 72. When the selection transistor 308 is turned on and the pixel 71 is selected, a pixel signal indicating a level corresponding to the charge stored in the FD 305 is output from the amplification transistor 307 to the AD conversion circuit in the readout circuit 72 via the selection transistor 308 and the vertical signal line 309.

[0200] In the pixel circuit described above, a circuit for reading out the pixel signal, namely consisting of FD305, reset transistor 306, amplification transistor 307, and selection transistor 308, is provided as a common circuit for the randomly arranged diffusion layer 123 and the normally arranged diffusion layer 241. In other words, the part of the pixel signal reading circuit from FD305 onwards is common.

[0201] In this way, by making a portion of the circuitry for each pixel 71 that constitutes the readout circuit 72 common, the circuit area can be reduced and the photoelectric conversion element 51 can be miniaturized.

[0202] <Other> <Regarding the manufacturing of the photoelectric conversion element> The manufacturing flow of the photoelectric conversion element 51 described above will be explained with reference to Figures 18 to 22.

[0203] First, as shown in Figure 18, a semiconductor layer 342 is formed by stacking multiple layers on a growth substrate 341 made of InP (indium phosphide) or the like by epitaxial growth, and an adhesive layer 343 is formed on top of the semiconductor layer 342. The semiconductor layer 342 is, for example, the photoelectric conversion layer 111 shown in Figure 4.

[0204] These growth substrates 341, semiconductor layer 342, and adhesive layer 343 constitute a single chip-shaped semiconductor substrate 351. Each semiconductor substrate 351 corresponds to one photoelectric conversion element 51.

[0205] Next, a support substrate 361 is prepared, as shown on the left side of Figure 19. For example, the support substrate 361 is made of Si (silicon) or the like, and insulating films are formed on the upper and lower surfaces of the support substrate 361.

[0206] Multiple semiconductor substrates 351 are arranged and bonded on the surface of the support substrate 361. In particular, the adhesive layer 343 of the semiconductor substrate 351 is bonded to the support substrate 361. In addition, the growth substrate 341 portion of each semiconductor substrate 351 is removed by etching.

[0207] Furthermore, as shown on the right side of the figure, an insulating film 371 for diffusion hard masks is deposited on the surface of each semiconductor substrate 351, and a portion of the insulating film 371 is etched to form an opening 372. Then, P-type impurities diffuse from the opening 372 into the semiconductor layer 342, forming a diffusion layer 123.

[0208] For the sake of clarity, only two diffusion layers 123 are shown for each semiconductor substrate 351 in this diagram; however, in reality, numerous diffusion layers 123 are formed. Furthermore, depending on the configuration of the pixel 71, diffusion layers 241 may also be formed as appropriate. However, for the sake of simplicity, the following explanation will continue assuming that only diffusion layers 123 are formed.

[0209] Next, as shown on the left side of Figure 20, an electrode 124 is formed in the opening 372, that is, in the upper part of the diffusion layer 123 in the figure.

[0210] Subsequently, as shown on the right side of the figure, an embedding insulating film 381 is formed to cover the portion of the insulating film 371, and the insulating film 381 is then flattened.

[0211] Furthermore, as shown on the left side of Figure 21, a wiring layer 391 consisting of multiple layers (insulating films) is formed on top of the insulating film 381. For example, the portion consisting of the layer on which the electrode 124 is formed and the wiring layer 391 is the wiring layer 114. Once the wiring layer 391 is formed, wiring 392 is formed on the wiring layer 391 and other portions thereof. For example, vias 125 and pads 126 shown in Figure 4 are formed as wiring 392.

[0212] Once the wiring 392 is formed, the separately manufactured read circuit board 102 is joined to the wiring layer 391 (wiring layer 114), as shown on the right side of the figure. Specifically, for example, the read circuit board 102 and the substrate (element substrate 101) on which the wiring layer 391 is formed are joined by CuCu bonding between the pad 127 formed on the read circuit board 102 and the pad 126 formed on the wiring layer 391.

[0213] Subsequently, as shown on the left side of Figure 22, the compound is exposed by etching. That is, the support substrate 361 and the adhesive layer 343 are removed by etching.

[0214] Subsequently, as shown on the right side of the figure, a transparent electrode 113 is formed (film-formed) in the area where the adhesive layer 343 has been removed, and a passivation insulating film 112 is then formed on the upper part of the transparent electrode 113 in the figure.

[0215] Finally, the semiconductor wafer obtained as described above is cut into multiple semiconductor chips by dicing or the like to form a photoelectric conversion element 51. Specifically, for example, the portion enclosed by the frame R101 is cut out as one semiconductor chip, forming one photoelectric conversion element 51.

[0216] As described above, this technology makes it possible to suppress moiré patterns without reducing area efficiency by arranging the diffusion layers 123 of multiple pixels 71 irregularly, either entirely or partially.

[0217] Specifically, this technology allows for the suppression of moiré patterns even when photographing subjects with patterns finer than the Nyquist frequency, by providing pixels 71 with diffuse layers 123 positioned at different locations. Moreover, since moiré patterns can be suppressed without using a low-pass filter, it is possible to miniaturize and reduce the cost of the photoelectric conversion element 51 and the camera system on which it is mounted.

[0218] Furthermore, this technology eliminates the need for apertures or other elements with different placement positions for each pixel 71, allowing moiré patterns to be suppressed with existing pixel pitches and reducing crosstalk, i.e., color mixing. In other words, since there is no need to narrow the pixel pitch, color mixing is less likely to occur.

[0219] Furthermore, with this technology, since the photoelectric conversion element 51 can be manufactured in the same way by only changing (adjusting) the diffusion layer formation step in the existing photoelectric conversion element manufacturing process flow, the increase in development costs (manufacturing costs) can be suppressed.

[0220] <Examples of application to electronic devices> This technology is not limited to photoelectric conversion elements, i.e., image sensors (solid-state imaging devices). This technology can be applied to all electronic devices that use solid-state imaging devices in the image acquisition unit (photoelectric conversion unit), such as imaging devices for digital still cameras, video cameras, and surveillance cameras, as well as portable terminal devices with imaging functions and photocopiers that use solid-state imaging devices in the image reading unit. The solid-state imaging device may be formed as a single chip, or it may be in the form of a module with imaging functions in which the imaging unit and signal processing unit or optical system are packaged together.

[0221] Figure 23 is a block diagram showing an example configuration of an imaging device as an electronic device to which this technology is applied.

[0222] The imaging device 601 in Figure 23 comprises an optical unit 611 consisting of a lens group and the like, a solid-state imaging device (imaging device) 612 employing a configuration of a photoelectric conversion element 51, and a DSP (Digital Signal Processor) circuit 613 which is a camera signal processing circuit.

[0223] The imaging device 601 also includes a frame memory 614, a display unit 615, a recording unit 616, an operation unit 617, and a power supply unit 618. The DSP circuit 613, frame memory 614, display unit 615, recording unit 616, operation unit 617, and power supply unit 618 are interconnected via a bus line 619.

[0224] The optical unit 611 captures incident light (image light) from the subject and forms an image on the imaging surface of the solid-state imaging device 612. The solid-state imaging device 612 converts the amount of light from the incident light formed on the imaging surface by the optical unit 611 into an electrical signal on a pixel-by-pixel basis and outputs it as a pixel signal.

[0225] The display unit 615 is composed of a thin display such as an LCD (Liquid Crystal Display) or an organic EL (Electro Luminescence) display, and displays video or still images captured by the solid-state imaging device 612. The recording unit 616 records the video or still images captured by the solid-state imaging device 612 onto a recording medium such as a hard disk or semiconductor memory.

[0226] The operation unit 617 issues operation commands for various functions of the imaging device 601 under the user's input. The power supply unit 618 appropriately supplies various power sources to the DSP circuit 613, frame memory 614, display unit 615, recording unit 616, and operation unit 617.

[0227] <Examples of application to mobile devices> The technology disclosed herein (this technology) can be applied to various products. For example, the technology disclosed herein may be implemented as a device mounted on any type of mobile device such as automobiles, electric vehicles, hybrid electric vehicles, motorcycles, bicycles, personal mobility devices, airplanes, drones, ships, and robots.

[0228] Figure 24 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile control system to which the technology described herein may be applied.

[0229] The vehicle control system 12000 comprises a plurality of electronic control units connected via a communication network 12001. In the example shown in Figure 24, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an external information detection unit 12030, an internal information detection unit 12040, and an integrated control unit 12050. The functional configuration of the integrated control unit 12050 is shown in the figure, which includes a microcomputer 12051, an audio / image output unit 12052, and an in-vehicle network interface 12053.

[0230] The drivetrain control unit 12010 controls the operation of devices related to the vehicle's drivetrain according to various programs. For example, the drivetrain control unit 12010 functions as a control device for a drivetrain generating device that generates driving force for the vehicle, such as an internal combustion engine or a drive motor; a drivetrain transmission mechanism that transmits driving force to the wheels; a steering mechanism that adjusts the steering angle of the vehicle; and a braking device that generates braking force for the vehicle.

[0231] The body system control unit 12020 controls the operation of various devices mounted on the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window system, or various lamps such as headlights, reverse lights, brake lights, turn signals, or fog lights. In this case, the body system control unit 12020 may receive radio waves transmitted from a portable device that replaces a key or signals from various switches. The body system control unit 12020 receives these radio waves or signals and controls the vehicle's door lock system, power window system, lamps, etc.

[0232] The external information detection unit 12030 detects information from outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the external information detection unit 12030. The external information detection unit 12030 causes the imaging unit 12031 to capture images of the outside of the vehicle and receives the captured images. Based on the received images, the external information detection unit 12030 may perform object detection processing such as detecting people, cars, obstacles, signs, or characters on the road surface, or distance detection processing.

[0233] The imaging unit 12031 is a light sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 can output the electrical signal as an image or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0234] The in-vehicle information detection unit 12040 detects information inside the vehicle. The in-vehicle information detection unit 12040 is connected to, for example, a driver status detection unit 12041 that detects the driver's state. The driver status detection unit 12041 includes, for example, a camera that captures images of the driver, and the in-vehicle information detection unit 12040 may calculate the driver's level of fatigue or concentration, or determine whether the driver is drowsy, based on the detection information input from the driver status detection unit 12041.

[0235] The microcomputer 12051 can calculate control target values ​​for the drive force generator, steering mechanism, or braking device based on information inside and outside the vehicle acquired by the external information detection unit 12030 or the internal information detection unit 12040, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing ADAS (Advanced Driver Assistance System) functions, including vehicle collision avoidance or impact mitigation, following driving based on distance between vehicles, maintaining vehicle speed, vehicle collision warning, or vehicle lane departure warning.

[0236] Furthermore, the microcomputer 12051 can perform cooperative control for purposes such as autonomous driving, where the vehicle drives autonomously without driver intervention, by controlling the drive force generating device, steering mechanism, or braking device, etc., based on information about the vehicle's surroundings acquired by the external information detection unit 12030 or the internal information detection unit 12040.

[0237] Furthermore, the microcomputer 12051 can output control commands to the body system control unit 12020 based on external information acquired by the external information detection unit 12030. For example, the microcomputer 12051 can control the headlights according to the position of a preceding or oncoming vehicle detected by the external information detection unit 12030, and perform coordinated control aimed at reducing glare, such as switching from high beams to low beams.

[0238] The audio-image output unit 12052 transmits at least one of audio and image output signals to an output device capable of visually or audibly notifying information to the vehicle's occupants or to those outside the vehicle. In the example shown in Figure 24, the output devices are exemplified as an audio speaker 12061, a display unit 12062, and an instrument panel 12063. The display unit 12062 may include, for example, at least one of an onboard display and a head-up display.

[0239] Figure 25 shows an example of the installation position of the imaging unit 12031.

[0240] In Figure 25, the vehicle 12100 has imaging units 12101, 12102, 12103, 12104, and 12105 as the imaging unit 12031.

[0241] The imaging units 12101, 12102, 12103, 12104, and 12105 are installed, for example, on the front nose, side mirrors, rear bumper, back door, and the upper part of the windshield inside the vehicle 12100. The imaging unit 12101 installed on the front nose and the imaging unit 12105 installed on the upper part of the windshield inside the vehicle mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 installed on the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 installed on the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The forward images acquired by imaging units 12101 and 12105 are mainly used for detecting preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, or lanes.

[0242] Figure 25 shows an example of the imaging range of imaging units 12101 to 12104. Imaging range 12111 indicates the imaging range of imaging unit 12101 located on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of imaging units 12102 and 12103 located on the side mirrors, respectively, and imaging range 12114 indicates the imaging range of imaging unit 12104 located on the rear bumper or back door. For example, by superimposing the image data captured by imaging units 12101 to 12104, an overhead view image of the vehicle 12100 can be obtained.

[0243] At least one of the imaging units 12101 to 12104 may have a function for acquiring distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera consisting of multiple image sensors, or an image sensor having pixels for phase difference detection.

[0244] For example, the microcomputer 12051, based on distance information obtained from the imaging units 12101 to 12104, can determine the distance to each object within the imaging range 12111 to 12114 and the temporal change of this distance (relative speed to the vehicle 12100). In particular, it can extract the closest object on the vehicle 12100's path that is traveling in approximately the same direction as the vehicle 12100 at a predetermined speed (e.g., 0 km / h or more) as the preceding vehicle. Furthermore, the microcomputer 12051 can set a predetermined distance to be maintained before the preceding vehicle and perform automatic braking control (including follow-and-stop control) and automatic acceleration control (including follow-and-start control), etc. In this way, cooperative control aimed at autonomous driving, etc., that drives autonomously without driver operation, can be performed.

[0245] For example, the microcomputer 12051 can use distance information obtained from imaging units 12101 to 12104 to classify and extract three-dimensional object data related to three-dimensional objects, such as motorcycles, passenger cars, large vehicles, pedestrians, utility poles, and other three-dimensional objects, and use this data for automatic obstacle avoidance. For example, the microcomputer 12051 identifies obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. The microcomputer 12051 then determines the collision risk, which indicates the degree of risk of collision with each obstacle. If the collision risk is above a set value and there is a possibility of collision, the microcomputer 12051 can provide driving assistance to avoid collisions by outputting a warning to the driver via the audio speaker 12061 or the display unit 12062, or by performing forced deceleration or evasive steering via the drive system control unit 12010.

[0246] At least one of the imaging units 12101 to 12104 may be an infrared camera that detects infrared light. For example, the microcomputer 12051 can recognize pedestrians by determining whether or not pedestrians are present in the images captured by the imaging units 12101 to 12104. Such pedestrian recognition is performed, for example, by a procedure to extract feature points from the images captured by the imaging units 12101 to 12104 as infrared cameras, and a procedure to perform pattern matching on a series of feature points that indicate the contour of an object to determine whether or not it is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the images captured by the imaging units 12101 to 12104 and recognizes a pedestrian, the audio-image output unit 12052 controls the display unit 12062 to superimpose a rectangular contour line for emphasis on the recognized pedestrian. The audio-image output unit 12052 may also control the display unit 12062 to display an icon indicating a pedestrian at a desired position.

[0247] The above describes an example of a vehicle control system to which the technology described herein may be applied. The technology described herein can be applied to the imaging unit 12031, etc., among the configurations described above. Specifically, for example, the photoelectric conversion element 51 shown in Figure 3 can be used as the imaging unit 12031, and moiré can be suppressed without reducing area efficiency.

[0248] Furthermore, this technology is not limited to applications to solid-state imaging devices that detect the distribution of incident infrared (infrared light) and capture it as an image, but can be applied to solid-state imaging devices (physical quantity distribution detection devices) in general, such as solid-state imaging devices that capture the distribution of incident amounts of visible light, X-rays, or particles as an image.

[0249] Furthermore, this technology is applicable not only to solid-state imaging devices but also to semiconductor devices in general that have semiconductor integrated circuits.

[0250] The embodiments of this technology are not limited to those described above, and various modifications are possible without departing from the spirit of this technology.

[0251] For example, a combination of all or some of the above-described embodiments can be adopted.

[0252] Furthermore, the effects described herein are merely illustrative and not limiting, and other effects may also occur.

[0253] Furthermore, this technology can also be configured as follows:

[0254] (1) A photoelectric conversion element having a plurality of pixels, comprising: a light receiving unit for receiving infrared light; and a readout circuit for reading out a charge corresponding to the infrared light as a signal, wherein the light receiving unit has a semiconductor layer for photoelectric conversion of the incident infrared light; and a diffusion layer formed on the readout circuit side of the semiconductor layer for supplying the charge obtained by the photoelectric conversion to the readout circuit, the pixels have the diffusion layer, and the plurality of pixels include pixels in which the positions of the diffusion layer within the pixels are different from each other. (2) The photoelectric conversion element according to (1), wherein the semiconductor layer has a first semiconductor layer of a first conductivity type made of a predetermined semiconductor material that absorbs the infrared light; and a second semiconductor layer of the first conductivity type made of a semiconductor material with a larger band gap than the predetermined semiconductor material, the second semiconductor layer, the first semiconductor layer, and the second semiconductor layer are stacked in that order, and the diffusion layer is a region of a second conductivity type different from the first conductivity type. (3) The photoelectric element according to (1) or (2), wherein the light-receiving portion further comprises an electrode formed on the side opposite to the readout circuit side when viewed from the semiconductor layer, for forming an electric field in the semiconductor layer. (4) The photoelectric element according to any one of (1) to (3), wherein the diffusion layer is formed at random positions within the pixel. (5) The photoelectric element according to any one of (1) to (3), wherein a plurality of unit regions consisting of a plurality of pixels are arranged in a row, the arrangement pattern of the diffusion layer of each pixel within the unit region is a random arrangement pattern, and the arrangement pattern of each unit region is the same. (6) The photoelectric element according to any one of (1) to (3), wherein the plurality of pixels include a pixel having a first diffusion layer which is the diffusion layer formed at a predetermined position, and a second diffusion layer which is the diffusion layer formed at an arbitrary position different from the first diffusion layer. (7) The photoelectric element according to (6), wherein all of the pixels have the first diffusion layer and the second diffusion layer, and among all of the pixels, there are pixels in which the positions of the second diffusion layer within the pixel are different from each other.(8) The photoelectric element according to (6), wherein the plurality of pixels consist of pixels having the first diffusion layer and the second diffusion layer, and pixels having the first diffusion layer and not having the second diffusion layer. (9) The photoelectric element according to (8), wherein one pixel having the first diffusion layer and the second diffusion layer is provided for each region consisting of a predetermined number of pixels. (10) The photoelectric element according to any one of (6) to (9), wherein the readout circuit is provided with a circuit for reading out the charge supplied from the first diffusion layer or the second diffusion layer as the signal, which is common to the first diffusion layer and the second diffusion layer of the same pixel. (11) The photoelectric element according to any one of (4) to (7), wherein the readout circuit has a memory for recording information about the distance between adjacent diffusion layers, and a correction unit for correcting the signal of the pixel based on the distance information. (12) The photoelectric element according to any one of (4) to (7), wherein the light receiving unit has wiring of a length corresponding to the distance between adjacent diffusion layers, and the readout circuit has a measuring unit for measuring the resistance value of the wiring, and a correction unit for correcting the signal of the pixel based on the measurement result of the resistance value. (13) The photoelectric element according to any one of (1) to (5), wherein the pixel has a readout electrode for forming an electric field in the semiconductor layer, provided adjacent to the readout circuit side of the diffusion layer, and the readout electrode is provided at the same position within the pixel in all of the pixels.

[0255] 51 Photoelectric conversion element, 61 Light receiving section, 62 Circuit section, 71 Pixel, 72 Readout circuit, 101 Element substrate, 102 Readout circuit substrate, 111 Photoelectric conversion layer, 112 Passivation insulating film, 113 Transparent electrode, 114 Wiring layer, 115 N-type semiconductor layer, 116 N+-type semiconductor layer, 117 N-type semiconductor layer, 123 Diffusion layer, 124 Electrode, 151 Memory, 152 Sensitivity correction section, 181 Measurement section

Claims

1. A photoelectric conversion element having a plurality of pixels, comprising: a light-receiving unit for receiving infrared light; and a readout circuit for reading out a charge corresponding to the infrared light as a signal, wherein the light-receiving unit has a semiconductor layer for photoelectric conversion of the incident infrared light, and a diffusion layer formed on the readout circuit side of the semiconductor layer for supplying the charge obtained by the photoelectric conversion to the readout circuit, the pixels have the diffusion layer, and the plurality of pixels include pixels in which the positions of the diffusion layer within the pixel are different from each other.

2. The photoelectric conversion element according to claim 1, wherein the semiconductor layer comprises a first semiconductor layer of a first conductivity type made of a predetermined semiconductor material that absorbs infrared light, and a second semiconductor layer of the first conductivity type made of a semiconductor material having a larger band gap than the predetermined semiconductor material, the second semiconductor layer, the first semiconductor layer, and the second semiconductor layer stacked in that order, and the diffusion layer is a region of the second conductivity type different from the first conductivity type.

3. The photoelectric conversion element according to claim 1, wherein the light-receiving portion further comprises an electrode formed on the side opposite to the readout circuit side when viewed from the semiconductor layer, for forming an electric field in the semiconductor layer.

4. The photoelectric conversion element according to claim 1, wherein the diffusion layer is formed at random positions within the pixel.

5. The photoelectric conversion element according to claim 1, wherein a plurality of unit regions consisting of a plurality of pixels are arranged in a row, the arrangement pattern of the diffusion layer of each pixel within the unit region is a random arrangement pattern, and the arrangement pattern of each unit region is the same.

6. The photoelectric conversion element according to claim 1, wherein the plurality of pixels include a first diffusion layer which is the diffusion layer formed at a predetermined position and a second diffusion layer which is the diffusion layer formed at an arbitrary position different from the first diffusion layer.

7. The photoelectric conversion element according to claim 6, wherein all of the pixels have the first diffusion layer and the second diffusion layer, and among all of the pixels, there are pixels in which the positions of the second diffusion layer within the pixel are different from each other.

8. The photoelectric conversion element according to claim 6, wherein the plurality of pixels consist of pixels having the first diffusion layer and the second diffusion layer, and pixels having the first diffusion layer and not having the second diffusion layer.

9. The photoelectric element according to claim 8, wherein one pixel having the first diffusion layer and the second diffusion layer is provided for each region consisting of a predetermined number of pixels.

10. The photoelectric element according to claim 6, wherein the readout circuit is provided with a circuit common to the first diffuse layer and the second diffuse layer of the same pixel for reading out the charge supplied from the first diffuse layer or the second diffuse layer as the signal.

11. The photoelectric conversion element according to claim 4, wherein the readout circuit includes a memory for recording information regarding the distance between adjacent diffusion layers, and a correction unit for correcting the signal of the pixel based on the distance information.

12. The photoelectric conversion element according to claim 4, wherein the light receiving unit has wiring of a length corresponding to the distance between adjacent diffusion layers, and the readout circuit comprises a measuring unit for measuring the resistance value of the wiring, and a correction unit for correcting the signal of the pixel based on the measurement result of the resistance value.

13. The photoelectric element according to claim 1, wherein the pixel is provided with a readout electrode for forming an electric field in the semiconductor layer adjacent to the readout circuit side of the diffusion layer, and the readout electrode is provided at the same position within the pixel in all of the pixels.