Semiconductor device and method for manufacturing semiconductor device

Abstract

Provided is a semiconductor device in which a gap between an insulating board and a printed board can be held as uniformly as possible by using as few components as possible. A printed board 130: has a lower surface which faces the upper surface of an insulating board 120 and on which a circuit pattern for driving a semiconductor element 110 is formed; and is provided above the insulating board 120 and the semiconductor element 110. A plurality of resin plates 140: are provided in a gap between the printed board 130 and one of the insulating board 120 and the semiconductor element 110; and hold the gap. In a plan view, one or more resin plates 140 among the plurality of resin plates 140 are provided in each of two or more regions among four regions of the insulating board 120. The plurality of resin plates 140 include one or more first resin plates 141, each having a through-hole 143 extending in the vertical direction.

Description

Semiconductor device and method of manufacturing the same

[0001] The present disclosure relates to a semiconductor device and a method of manufacturing the same.

[0002] Power modules (semiconductor devices) are used as power conversion devices in electrical equipment such as inverters, converters, and servo amplifiers. In such semiconductor devices, semiconductor elements such as IGBTs (Insulated Gate Bipolar Transistors), MOSFETs (Metal Oxide Semiconductor Field Effect Transistors), and diodes are mounted on a substrate. The ON / OFF of these semiconductor elements is controlled by switching with a gate signal. Therefore, a drive circuit for controlling the gate signal is required for the semiconductor device.

[0003] Conventionally, silicon (Si) has been used as the material for semiconductor elements. However, from the perspective of reducing power loss, in recent years, the application of wide bandgap semiconductors represented by silicon carbide (SiC) and gallium nitride (GaN) has been expanding. Semiconductor elements formed of wide bandgap semiconductors achieve faster switching control and lower ON resistance compared to Si semiconductor elements. Since semiconductor elements using SiC or GaN exhibit higher performance than Si semiconductor elements, their size can be made smaller than that of Si semiconductor elements. Accordingly, the outer size of the semiconductor device can also be reduced.

[0004] From the perspective of the assemblability of semiconductor devices, semiconductor devices having supports provided at the four corners of a printed circuit board have been proposed (for example, Patent Document 1).

[0005] Japanese Patent Application Laid-Open No. 10-154725

[0006] A semiconductor device includes an insulating substrate on which semiconductor elements are mounted and a printed circuit board (PCB) on which drive circuits are mounted. When the PCB is mounted above the insulating substrate, it is necessary to maintain a uniform gap between the PCB and the insulating substrate to ensure reliable electrical connection. Therefore, the semiconductor device needs to be equipped with numerous components, including not only pins to electrically connect the semiconductor elements and the PCB, but also supports to prevent tilting between the insulating substrate and the PCB, and bonding materials to fix the pins and supports.

[0007] This disclosure aims to provide a semiconductor device that can maintain as uniform a gap as possible between an insulating substrate on which a semiconductor element is mounted and a printed circuit board on which a circuit related to driving the semiconductor element is mounted, using as few components as possible, in order to solve the above problems.

[0008] The semiconductor device according to this disclosure comprises an insulating substrate, a semiconductor element mounted on the upper surface of the insulating substrate, a printed circuit board positioned above the insulating substrate and the semiconductor element, having a lower surface facing the upper surface of the insulating substrate and having a circuit pattern formed thereon for driving the semiconductor element, a plurality of gap-retaining materials provided in the gap between either the insulating substrate or the semiconductor element and the printed circuit board to maintain the gap, a plurality of bonding materials electrically connecting a conductor mounted on the upper surface of the insulating substrate or an electrode provided on the upper surface of the semiconductor element and a part of the circuit pattern of the printed circuit board, wherein in a plan view, the smallest rectangular region containing all of the plurality of bonding materials is defined, and at least one of the plurality of gap-retaining materials is provided in at least two of the four regions obtained by dividing the rectangular region with two mutually perpendicular imaginary lines passing through the center of the rectangular region.

[0009] The semiconductor device according to this disclosure includes an insulating substrate, a semiconductor element, a printed circuit board, and a plurality of resin plates. The semiconductor element is mounted on the upper surface of the insulating substrate. The printed circuit board is positioned above the insulating substrate and the semiconductor element, and has a lower surface facing the upper surface of the insulating substrate and having a circuit pattern formed thereon for driving the semiconductor element. The plurality of resin plates are provided in the gap between either the insulating substrate or the semiconductor element and the printed circuit board, and maintain the gap. In a plan view, at least one of the plurality of resin plates is provided in at least two of four regions divided by two imaginary lines that pass through the center of the insulating substrate and extend in the longitudinal and transverse directions of the insulating substrate, respectively. The plurality of resin plates include at least one first resin plate having a through hole that penetrates in the vertical direction.

[0010] According to this disclosure, a semiconductor device is provided that maintains the gap between an insulating substrate on which a semiconductor element is mounted and a printed circuit board on which a circuit related to driving the semiconductor element is mounted as uniformly as possible with the fewest possible number of components.

[0011] The purpose, features, aspects, and advantages of this disclosure will become clearer from the following detailed description and accompanying drawings.

[0012] Figure 1 is a circuit diagram showing an example of the connection configuration of a power conversion device including a semiconductor device of Embodiment 1. Figure 2 is a schematic cross-sectional view showing the configuration of the semiconductor device of Embodiment 1. Figure 3 is a plan view showing an example of the configuration of the semiconductor device. Figure 4 is a cross-sectional view showing the configuration of the semiconductor device. Figure 5 is a cross-sectional view showing another configuration of the semiconductor device of Embodiment 1. Figures 6(a) and 6(b) are cross-sectional views showing the configuration of a resin plate in the manufacturing process of a semiconductor device. Figures 7(a) and 7(b) are cross-sectional views showing the configuration of a resin plate in the manufacturing process of a semiconductor device. Figure 8 is a plan view showing the configuration of a semiconductor device in Embodiment 2. Figure 9 is a cross-sectional view showing the configuration of a semiconductor device. Figure 10 is a plan view showing the configuration of a semiconductor device in Embodiment 3. Figure 11 is a plan view showing the configuration of a semiconductor device in Embodiment 3. Figure 12 is a plan view showing the configuration of a semiconductor device in Embodiment 3. Figure 13 is a plan view showing the configuration of a semiconductor device in Embodiment 4. Figure 14 is a plan view showing the configuration of a semiconductor device in Embodiment 5. Figure 15 is a cross-sectional view showing the configuration of a semiconductor device. Figure 16 is a plan view showing the configuration of a semiconductor device in Embodiment 6. Figure 17 is a cross-sectional view showing the configuration of a semiconductor device.

[0013] <Embodiment 1> Hereinafter, embodiments of the semiconductor device according to the present disclosure will be described with reference to the attached drawings.

[0014] (Overall Configuration of Power Converter and Semiconductor Device) Figure 1 is a circuit diagram showing an example of the connection configuration of a power converter 1 including the semiconductor device 101 of Embodiment 1. The power converter 1 includes an input capacitor 2, a plurality of semiconductor devices 101, and a control circuit 3. The power converter 1 is mounted on a vehicle, such as an electric vehicle, and converts the DC output from the on-board battery 4 into AC and supplies it to a rotating electric machine 5. The semiconductor device 101 is incorporated into the inverter circuit of the power converter 1 and consists of a plurality of semiconductor elements 110 which are switching elements, a current sensor (not shown), a drive circuit 6, a power supply circuit 7, etc. The input capacitor 2 is provided in the input stage of the power converter 1 and smooths the output from the on-board battery 4, such as a lithium-ion battery, which has an output voltage of several tens of volts to several hundred volts. The current sensor detects the current input to the rotating electric machine 5 via the semiconductor elements 110. The drive circuit 6 and the control circuit 3 control the switching operation of the semiconductor elements 110. The power supply circuit 7 generates the power supplied to the drive circuit 6 and the control circuit 3.

[0015] The inverter circuit of the power converter 1 converts direct current to alternating current through the switching operation of semiconductor elements 110. This converted current is supplied through AC wiring, and the rotating electric machine 5 is driven by this AC current. In addition, the AC current generated in the rotating electric machine 5 by regenerative braking, etc., is rectified through AC wiring, smoothed by the input capacitor 2, and stored in the on-board battery 4. The rotating electric machine 5 that drives electric vehicles is often driven by a three-phase AC full-bridge circuit. The circuit shown in Figure 1 corresponds to the circuit diagram of a dual three-phase power converter 1 in which three-phase AC is configured in a double configuration to meet the demand for higher output of the rotating electric machine 5. In Figure 1, two semiconductor elements 110 connected in series constitute one module, and three modules are provided to output one three-phase AC. Furthermore, these three modules are provided in a double configuration, and the inverter circuit of the power converter 1 is composed of a total of six modules. Of the semiconductor elements 110 connected in series, the semiconductor element 110 connected to the positive potential side, i.e., the P potential, of the onboard battery 4 is the upper arm semiconductor element 110a. The semiconductor element 110 connected to the negative battery side, i.e., the N potential, of the onboard battery 4 is the lower arm semiconductor element 110b. The contact point where the upper arm semiconductor element 110a and the lower arm semiconductor element 110b are connected to each other is at the AC potential.

[0016] The drive circuit 6 and control circuit 3 output appropriate signals to the semiconductor element 110 and control the switching operation so that the target drive frequency and torque of the rotating electric machine 5 can be obtained. In addition, if the rotating electric machine 5 is damaged or an abnormality in the current is detected, the drive circuit 6 and control circuit 3 immediately control the inverter drive and power supply in a predetermined order. Such control is performed based on the current value detected by the current sensor and the signal voltage converted from it. The control circuit 3 operates on power supplied by a lead-acid battery of approximately 12V to 24V.

[0017] In this disclosure, circuits or components that use the low potential side of the lead-acid battery as the reference potential are referred to as the primary side. Specifically, the lead-acid battery, the control circuit 3 and the portion of the drive circuit 6 that is directly connected to the control circuit 3 (the primary drive circuit 6), the portion of the power supply circuit 7 that is directly connected to the control circuit 3 and the primary drive circuit 6, the current sensor, and the wiring and connections that connect these circuits and components are considered to be the primary side. On the other hand, circuits and components that use the N potential side of the lithium-ion battery as the reference potential are referred to as the secondary side. Specifically, the lithium-ion battery, the input capacitor 2, the semiconductor element 110, the portion of the insulating substrate (described later) that is connected to the semiconductor element 110, the rotating electric machine 5, the portion of the drive circuit 6 that is directly connected to the semiconductor element 110 (the secondary drive circuit 6), the portion of the power supply circuit 7 that is directly connected to the secondary drive circuit 6, and the wiring and connections that connect these circuits and components are considered to be the secondary side. The potentials of the primary and secondary sides are isolated.

[0018] (Drive Circuit) The drive circuit 6 is a circuit section for generating a signal that is directly input to the semiconductor element 110. Although not shown in the diagram, the drive circuit 6 consists of a drive IC, a capacitor for stabilizing the power supply of the drive IC, peripheral elements of the drive IC such as pull-up / pull-down resistors, a gate resistor and diode which are part of the main circuit and are placed in close proximity to the semiconductor element 110 to characterize the gate ON / OFF behavior, and a connector which is an electrical connection part. The drive circuit 6 also incorporates an insulating part, such as a pulse transformer or photocoupler, to isolate the primary side potential from the secondary side potential. An insulating part such as a transformer or photocoupler may be provided inside the drive IC. The drive circuit 6 is a circuit section that functions as an interface between the two potentials of the primary side and the secondary side.

[0019] (Power supply circuit) The power supply circuit 7 is a circuit that receives power from an external power supply and generates a voltage for driving the IC mounted on the printed circuit board described later, or a voltage suitable for the gate signal. The power supply circuit 7 is not shown in the figure, but mainly consists of a power supply IC, a capacitor for stabilizing the power supply IC, a resistor for applying negative feedback to the power supply IC by referring to the output voltage or output current, a diode for rectification, a switching element for switching, an oscillator circuit which is a signal source for driving the switching element, and a coil that raises or lowers the voltage by the current which changes depending on whether the switching element is ON or OFF. In Embodiment 1, the potential of the primary side is different from the potential of the secondary side. Since the external power supply mainly corresponds to the potential of the primary side, a power source for the secondary side is necessary. The power supply circuit 7 that supplies power to the secondary side has an insulating part such as a transformer and a photocoupler.

[0020] (Control Circuit) The control circuit 3 is a primary circuit that determines the signal to be sent to the control IC in response to the current sensor or the command signal from the vehicle. Although not shown in the diagram, the control circuit 3 consists of a microcontroller, microcontroller peripherals, a connector which is the electrical connection part to the drive circuit 6, etc. The control circuit 3 may also include various sensor circuits such as a current sensor for the output of the power converter 1, voltage sensors for each part, a temperature sensor, and a rotation sensor for the rotating electric machine 5. Furthermore, the control circuit 3 may include a protection circuit for shutting off the operation of the main circuit based on these sensors. In addition, the control circuit 3 may include a communication IC and peripherals for the communication IC for communicating with the vehicle.

[0021] As described above, the semiconductor device 101 of Embodiment 1 includes a semiconductor element 110, a drive circuit 6, a power supply circuit 7, and a control circuit 3. The semiconductor device 101 may also include components other than those described above, or it may include fewer components than those described above. For example, the semiconductor device 101 may include all or part of the circuit of the control circuit 3 that transmits control signals to the drive IC. Alternatively, for example, the semiconductor device 101 may not include the electronic components that constitute the power supply circuit 7, but only wiring.

[0022] (Component configuration of the semiconductor device) Figure 2 is a schematic cross-sectional view showing the configuration of the semiconductor device 101 of Embodiment 1. The semiconductor device 101 includes an insulating substrate 120, a plurality of semiconductor elements 110, a printed circuit board 130, a plurality of resin plates 140, and a sealing resin 150. The semiconductor device 101 of Embodiment 1 is mounted on a cooler 200.

[0023] In the following explanation, the left-right direction in Figure 2 is defined as the X direction, the direction perpendicular to the plane of the paper as the Y direction, and the up-down direction as the Z direction. Within the Z direction, the direction in which the printed circuit board 130 is positioned relative to the insulating substrate 120 is defined as the upward direction. The X direction corresponds to the longitudinal direction of the insulating substrate 120 or the printed circuit board 130. Furthermore, each drawing is a schematic diagram, and in order to make the structure easier to understand, the scale ratio of each drawing does not reflect the actual proportions of the semiconductor device 101.

[0024] (Insulating substrate) The insulating substrate 120 includes an insulating portion 121, an upper conductor portion 122, and a lower conductor portion 123. The upper conductor portion 122 is bonded to the upper surface of the insulating portion 121. The lower conductor portion 123 is bonded to the lower surface of the insulating portion 121. The upper conductor portion 122 and the lower conductor portion 123 have an electrical connection function.

[0025] The insulating part 121 is made of aluminum nitride (AlN), alumina (Al ２ O ３ ), silicon nitride (Si ３ N ４ It is formed of ceramics such as ). Alternatively, the insulating part 121 is formed of an organic component layer mainly composed of resin, such as polyimide or epoxy resin. The upper conductor part 122 and the lower conductor part 123 are formed of copper (Cu), aluminum (Al), nickel (Ni), etc. The upper conductor part 122 and the lower conductor part 123 may be formed of a single metal material, or they may be composed of a metal film and a plating film in which the surface of the metal film is plated with gold (Au), silver (Ag), etc.

[0026] The thicknesses of the insulating portion 121, the upper conductor portion 122, and the lower conductor portion 123 are determined considering the heat dissipation, insulation, and bonding reliability of the semiconductor device 101. For example, the insulating portion 121 has a thickness of 0.001 mm or more and 3 mm or less, and the upper conductor portion 122 and the lower conductor portion 123 have a thickness of 0.001 mm or more and 5 mm or less. In Embodiment 1, the insulating portion 121 is made of AlN with a thickness of 0.05 mm, and the upper conductor portion 122 and the lower conductor portion 123 are made of Cu (copper foil) with a thickness of 0.1 mm. However, the thicknesses of the insulating portion 121, the upper conductor portion 122, and the lower conductor portion 123 are not limited to these. The thicknesses of the upper conductor portion 122 and the lower conductor portion 123 may be the same or different.

[0027] Figure 3 is a plan view showing an example of the configuration of the semiconductor device 101. In the following plan views, including Figure 3, some components such as the printed circuit board 130 and the sealing resin 150 are omitted from the illustration in order to show the configuration of components mounted on the insulating substrate 120.

[0028] In Embodiment 1, the upper conductor portion 122 is divided into a first upper conductor portion 122a and a second upper conductor portion 122b. The first upper conductor portion 122a is at a P potential, and the second upper conductor portion 122b is at an AC potential.

[0029] As shown in Figure 3, the insulating substrate 120 has a first region 120a, a second region 120b, a third region 120c, and a fourth region 120d in a plan view. These four regions are defined by two imaginary lines that pass through the center CT of the insulating substrate 120 and extend in the longitudinal and short directions, respectively. In Embodiment 1, the two imaginary lines correspond to a straight line passing through the center CT of the insulating substrate 120 and parallel to the X direction, and a straight line passing through the center CT of the insulating substrate 120 and parallel to the Y direction.

[0030] (Semiconductor element) The semiconductor element 110 is mounted on the upper surface of the insulating substrate 120. In the first embodiment, two semiconductor elements 110 are mounted in the first region 120a of the first upper surface conductor portion 122a, and two semiconductor elements 110 are mounted in the third region 120c of the second upper surface conductor portion 122b. The outer shape of the semiconductor element 110 is, for example, a rectangle with sides of about 1 mm to 20 mm.

[0031] Two semiconductor elements 110 provided on the first upper conductor portion 122a and two semiconductor elements 110 provided on the second upper conductor portion 122b are connected in parallel. The two semiconductor elements 110 on the first upper conductor portion 122a correspond to the upper arm semiconductor elements 110a, and the two semiconductor elements 110 on the second upper conductor portion 122b correspond to the lower arm semiconductor elements 110b. In principle, an inverter circuit can be formed with one upper arm semiconductor element 110a and one lower arm semiconductor element 110b, but in practical terms, a configuration including multiple semiconductor elements 110 with smaller capacitances is more cost-effective and advantageous than a single semiconductor element 110 with larger capacitance.

[0032] Figure 4 is a cross-sectional view showing the configuration of the semiconductor device 101, and shows a cross-section along line A-A' shown in Figure 3. The semiconductor element 110 is bonded to the first upper conductor portion 122a of the insulating substrate 120 via a bonding material 160a. The bonding material 160a is, for example, solder mainly composed of tin (Sn). The bonding material 160a may be a sinterable metallic material mainly composed of Au, Ag, or Cu, or an intermetallic compound alloyed with Cu and Sn. The bonding material 160a may also be a conductive adhesive, and is not limited to the above materials. The supply form of the bonding material 160a in the manufacturing process of the semiconductor device 101 is, but is not limited to, paste, sheet, or powder. The thickness of the bonding material 160a is determined based on the material properties of the bonding material 160a, such as heat dissipation. In Embodiment 1, the supply form of the bonding material 160a is a 0.6 mm thick solder sheet.

[0033] The semiconductor device 110 is a power semiconductor device and is made of a wide-bandgap semiconductor, such as silicon (Si), silicon carbide (SiC), gallium nitride (GaN), or diamond, which has a wider bandgap compared to silicon. The semiconductor device 110 includes, for example, switching elements such as MOSFETs (Meatal Oxide Semiconductor Field Effect Transistors) and IGBTs (Insulated Gate Bipolar Transistors), or rectifying elements such as diodes. The device type of the semiconductor device 110 is not limited to the above. The semiconductor device 110 shown in Figure 1 is an IGBT, while the semiconductor device 110 shown in Figures 3 and 4 is a SiC MOSFET.

[0034] The semiconductor element 110, which is a switching element, has a main electrode 111 as a back electrode provided on the back surface of the semiconductor element 110, and a main electrode 112 and a signal electrode 113 as surface electrodes provided on the front surface of the semiconductor element 110. The main electrodes 111 and 112 are electrodes corresponding to the input and output of the main current. The signal electrode 113 is an electrode to which a signal controlling the switching operation is input. If the semiconductor element 110 is a MOSFET, the main electrode 111 is the drain electrode, the main electrode 112 is the source electrode, and the signal electrode 113 is the gate electrode. The drain electrode is formed, for example, on the entire back surface of the semiconductor element 110. The semiconductor element 110 is mounted on the insulating substrate 120 by bonding the drain electrode to the first upper surface conductor portion 122a of the insulating substrate 120 via a bonding material 160a. Since the main current flows through the source electrode, the source electrode has a relatively large outer shape of about 1 mm square to 15 mm square. Since a minute signal current flows through the gate electrode to drive the semiconductor element 110, the gate electrode has a relatively small external shape of about 0.1 mm square to 2 mm square. These electrodes are connected to the bottom electrode 135 of the printed circuit board 130 by a bonding material 160b. The bonding material 160b, like the bonding material 160a, is formed from solder, sinterable metal material, intermetallic compound, conductive adhesive, etc. The semiconductor element 110 may also be provided with other electrodes, such as electrodes for temperature sensing, electrodes for short-circuit detection, etc.

[0035] (Printed circuit board) The printed circuit board 130 is provided above the insulating substrate 120 and the semiconductor element 110, and the lower surface of the printed circuit board 130 faces the upper surface of the insulating substrate 120. The printed circuit board 130 is, for example, a paper phenolic substrate, a paper epoxy substrate, a glass epoxy substrate, a ceramic substrate, or a composite substrate.

[0036] The printed circuit board 130 has a single-layer or multi-layer structure. The printed circuit board 130 of Embodiment 1 is composed of an insulating layer 131, a metal layer 132, and a resist layer 133, as shown in Figure 4. The metal layer 132 is selectively provided on the insulating layer 131, and the resist layer 133 is selectively provided on either the insulating layer 131 or the metal layer 132.

[0037] On the upper and lower surfaces of the printed circuit board 130, a plurality of terminals 134 and circuit patterns for driving the semiconductor element 110 are formed by the insulating layer 131, metal layer 132, and resist layer 133. The plurality of terminals 134 are provided at the edges of the printed circuit board 130 and protrude from the sealing resin 150. The terminals 134 have the function of connecting the semiconductor device 101 to an external circuit. The circuit pattern has a plurality of lands (not shown), a plurality of bottom electrodes 135, and a wiring pattern 136. The lands are provided on the upper surface of the printed circuit board 130 and mount electronic components 170 such as a drive IC. The bottom electrodes 135 are provided on the lower surface of the printed circuit board 130 and face the upper conductor portion 122 of the insulating substrate 120 and the surface electrodes of the semiconductor element 110. The wiring pattern 136 electrically connects the terminals 134, bottom electrodes 135, and lands to each other.

[0038] On the upper surface of the printed circuit board 130, electronic components 170 constituting the drive circuit 6 and the power supply circuit 7 are mounted on lands via a bonding material 160c. The bonding material 160c is, for example, solder, but like the bonding material 160a, it may also be a sinterable metal material, an intermetallic compound, a conductive adhesive, etc. The position where the drive IC is mounted is not particularly limited as long as it is on the printed circuit board 130, but it is preferable that it be directly above the semiconductor element 110 when viewed from above in order to reduce wiring resistance and wiring inductance. Furthermore, it is preferable that the secondary output section of the power supply circuit 7 be close to the drive IC.

[0039] The resist layer 133 forming the circuit pattern has a thickness of several tens of micrometers and covers areas other than the metal layer 132, for example, areas other than the bottom electrodes 135 and lands. The resist layer 133 prevents short circuits between the bottom electrodes 135 and between lands on the printed circuit board 130. The metal layer 132 constituting the circuit pattern is made of, for example, copper or a copper alloy. The bottom electrodes 135 and lands may be plated with precious metals such as tin, gold, or silver to improve bonding.

[0040] Among the wiring patterns 136, the main wiring pattern through which the main current flows is formed of, for example, a thick copper film having a thickness of 105 μm or more. When the semiconductor device 101 is a high-capacity device typified by an in-vehicle inverter, there are cases where the current value of the main current is as large as 100 A or more. When a large current flows in a state where the thickness of the wiring pattern 136 is thin, the amount of heat generation increases. As a result, the temperature of the printed circuit board 130 exceeds the glass transition point of the resin material forming the insulating layer 131, and the bonding reliability of the printed circuit board 130 deteriorates. The main wiring pattern in Embodiment 1 has a thickness of 500 μm and has a thickness more than 10 times that of a general thickness of 35 μm. Therefore, the amount of heat generation is reduced to 1 / 10 or less. The wiring pattern 136 may be configured by laminating a plurality of thin metal layers 132, and in that case, the amount of heat generation is reduced in the same manner as described above.

[0041] The terminals 134 include a P-side input terminal 134a having a P potential, an AC output terminal 134b having an AC potential, an N-side input terminal (not shown in FIG. 2) having an N potential, and a signal terminal (not shown in FIG. 2). A main current flows through the P-side input terminal 134a, the AC output terminal 134b, and the N-side input terminal. The signal terminal is a terminal for inputting a signal or power for operating the drive IC. In the printed circuit board 130, the P-side input terminal 134a is connected to a P-side wiring pattern 136a, the AC output terminal 134b is connected to an AC wiring pattern 136b, and the N-side input terminal is connected to an N-side wiring pattern (not shown in FIG. 2), respectively. In the printed circuit board 130, in particular, at least a part of the P-side wiring pattern 136a and the N-side wiring pattern are arranged so as to overlap each other in the Z direction. It is preferable that these wiring patterns 136 overlap with each other over a wider area.

[0042] In the manufacturing process of the semiconductor device 101, each terminal 134 is formed, for example, by removing the resin portion constituting the insulating layer 131 at the end after the production of the printed circuit board 130. As another forming method, each terminal 134 is formed by mounting a copper plate or pin on the printed circuit board 130. These terminals 134 may have through holes or a bent configuration as required. In the connection process of the power conversion device 1, the connection method between the terminal 134 and an external terminal such as a capacitor or a rotating electrical machine 5 after the semiconductor device 101 and the cooler 200 are joined is appropriately selected from a plurality of connection methods according to the terminal shape. The connection methods include, for example, TIG welding, laser welding, screw fastening, etc.

[0043] (Electrical connection configuration) The electrical connection configuration in the first region 120a and the second region 120b of the insulating substrate 120 will be described. The P-side input terminal 134a is electrically connected to the P-side lower surface electrode 135a via the P-side wiring pattern 136a. The P-side lower surface electrode 135a is electrically connected to the upper surface conductor portion 122 (the first upper surface conductor portion 122a) of the insulating substrate 120 via the bonding material 160b. The AC output terminal 134b is electrically connected to the AC lower surface electrode 135b via the AC wiring pattern 136b. The AC lower surface electrode 135b is electrically connected to the source electrode of the semiconductor element 110 (the upper arm semiconductor element 110a) via the bonding material 160b.

[0044] Although illustration is omitted, the electrical connection configuration in the third region 120c and the fourth region 120d of the insulating substrate 120 will be described. The AC output terminal 134b is electrically connected to the AC lower surface electrode 135b via the AC wiring pattern 136b. The AC lower surface electrode 135b is electrically connected to the second upper surface conductor portion 122b of the insulating substrate 120 via the bonding material 160b. The N-side input terminal is electrically connected to the N-side lower surface electrode via the N-side wiring pattern. The N-side lower surface electrode is connected to the source electrode of the semiconductor element 110 (the lower arm semiconductor element 110b) via the bonding material 160b.

[0045] The signal terminal is electrically connected to the signal bottom electrode 135c via the signal wiring pattern 136c. The signal bottom electrode 135c is connected to the gate electrode of the semiconductor element 110 via the bonding material 160b. The gate signal input to the signal terminal undergoes a predetermined power conversion within the circuit pattern of the printed circuit board 130, and is then input to the gate electrode via the signal wiring pattern 136c and the bonding material 160b.

[0046] The number of connection points between the wiring pattern 136 and the insulating substrate 120, or the contact area with the bonding material 160b, is not particularly limited.

[0047] (Resin Plates) Multiple resin plates 140 are provided on the upper surface of the insulating substrate 120 or on the surface of the semiconductor element 110. The resin plates 140 fill a gap formed between the insulating substrate 120 and the printed circuit board 130, and a portion of the gap formed between the semiconductor element 110 and the printed circuit board 130. In other words, the resin plates 140 are provided in the gap between either the insulating substrate 120 or the semiconductor element 110 and the printed circuit board 130, and maintain that gap. Also, as shown in Figure 3, at least one resin plate 140 is provided in each of the first region 120a, second region 120b, third region 120c, and fourth region 120d, which are defined by a virtual line passing through the center CT of the insulating substrate 120. Furthermore, the multiple resin plates 140 include at least one first resin plate 141 having a through hole 143 that penetrates in the vertical direction, and a second resin plate 142 that does not have a through hole 143. Furthermore, it is sufficient if at least one resin plate 140 is provided in at least two of the first region 120a, second region 120b, third region 120c, and fourth region 120d.

[0048] The first resin plate 141 is provided on the surface of the semiconductor element 110. The lower end of the first resin plate 141 is in contact with the surface of the semiconductor element 110, and the upper end of the first resin plate 141 is in contact with the lower surface of the printed circuit board 130. Since the semiconductor element 110 in Embodiment 1 is arranged in the first region 120a and the third region 120c of the insulating substrate 120, the first resin plate 141 is also located in the first region 120a and the third region 120c. A bonding material 160b is provided inside the through hole 143 of the first resin plate 141. The bonding material 160b is in contact with the surface electrode of the semiconductor element 110 and the lower electrode 135 of the printed circuit board 130, electrically connecting the surface electrode of the semiconductor element 110 and the lower electrode 135 of the printed circuit board 130. A space exists between the bonding material 160b and the side wall of the through hole 143. In other words, the bonding material 160b fills only a portion of the inside of the through hole 143.

[0049] The first resin plate 141 not only ensures a gap between the semiconductor element 110 and the printed circuit board 130, but also prevents the bonding material 160b, which is placed on the main electrode 112 and the signal electrode 113 respectively, from short-circuiting each other. Furthermore, the first resin plate 141 insulates areas where high potential differences occur, such as between the semiconductor element 110 and the printed circuit board 130, or between the insulating substrate 120 and the printed circuit board 130. In addition, the first resin plate 141 has the function of mitigating the thermal stress added to the bonding material 160b when the semiconductor device 101 is driven in the market.

[0050] The second resin plate 142 is provided on the upper surface of the insulating substrate 120. The lower end of the second resin plate 142 is in contact with the upper surface of the insulating substrate 120, and the upper end of the second resin plate 142 is in contact with the lower surface of the printed circuit board 130. In Embodiment 1, the second resin plate 142 is provided in the second region 120b and the fourth region 120d where the first resin plate 141 is not provided. It is preferable that the second resin plate 142 is located on the outer side in the longitudinal direction of the insulating substrate 120 with respect to the bonding material 160b provided on the first upper surface conductor portion 122a or the second upper surface conductor portion 122b. Such a configuration makes it possible to maintain a gap over a wider area.

[0051] It is preferable that the contact area between the resin plate 140 and the insulating substrate 120, or the contact area between the resin plate 140 and the printed circuit board 130, in each of the four regions is equal across the regions. Such a configuration allows for uniform pressure to be applied to the insulating substrate 120 and the printed circuit board 130 within their planes during the manufacturing process of the semiconductor device 101. In Embodiment 1, the contact area of ​​the second resin plate 142 is determined based on the total contact area of ​​the first resin plate 141 located in the first region 120a and the third region 120c.

[0052] The resin plate 140 is formed from materials such as PTFE (polytetrafluoroethylene), PI (polyimide), PPS (polyphenylenesulfide), and LCP (Liquid Crystal Polymer).

[0053] The thickness, shape, and position of the resin plate 140 are determined by the required pressure resistance, gaps, and the presence or absence of adjacent electrodes with different potentials. In Embodiment 1, the first resin plate 141 is a sheet-like LCP with a thickness of 0.45 mm. The size of the through hole 143 located on the gate electrode is φ1 mm, and the size of the through hole 143 located on the source electrode is φ5 mm. The size of the bonding material 160b provided in the through hole 143 on the gate electrode is φ0.8 mm. The size of the bonding material 160b provided in the through hole 143 on the source electrode is φ4.5 mm.

[0054] In the manufacturing process of the semiconductor device 101, the first resin plate 141 is formed by processing a sheet-shaped resin plate 140 with through holes 143 having the same shape as the surface electrodes of the semiconductor element 110, and then placing it directly on top of the semiconductor element 110. Alternatively, the first resin plate 141 is formed by applying a liquid-molded resin along the edges of the surface electrodes of the semiconductor element 110, and then curing the resin. A resin plate 140 molded into a desired shape by injection molding may also be placed on the surface of the semiconductor element 110. The method for forming the second resin plate 142 in the manufacturing process of the semiconductor device 101 is the same as the method for forming the first resin plate 141, but without the need to process the through holes 143.

[0055] The outer shape of the first resin plate 141, which is placed on the semiconductor element 110, is larger than the outer shape of the semiconductor element 110 in a plan view. This is to ensure that the semiconductor element 110 does not come into contact with the pattern formed on the lower surface of the printed circuit board 130, when insulation is taken into consideration as described above.

[0056] Figure 5 is a cross-sectional view showing another configuration of the semiconductor device 101 of Embodiment 1. The cross-sectional configuration of Figure 5 is not present in Figures 2 and 3, and Figure 5 is a diagram for explaining a modified example of the semiconductor device 101. The upper end of each of the multiple resin plates 140 is in contact with either the metal layer 132 or the resist layer 133 that is exposed from the lower surface of the printed circuit board 130. A step is created on the lower surface of the printed circuit board 130 by the lower electrode 135 formed of the metal layer 132, the resist layer 133 on the metal layer 132, etc. The resin plate 140 in Embodiment 1 has a thickness based on the configuration of the layer exposed from the lower surface of the printed circuit board 130 that it is in contact with, so as to fill the gap between the insulating substrate 120 and the printed circuit board 130 or the gap between the semiconductor element 110 and the printed circuit board 130. For example, in Figure 5, the thicknesses t1 to t6 of the resin plate 140 are different from each other and correspond to the width of the gap.

[0057] Furthermore, although not shown in the illustration, if the insulating substrate 120 or the printed circuit board 130 is warped, each of the multiple resin plates 140 has a thickness corresponding to the inclination caused by the warping, so as to fill the gap between them.

[0058] Figures 6(a) and 6(b) are cross-sectional views showing the configuration of the resin plate 140 in the manufacturing process of the semiconductor device 101. Figure 6(a) shows the state before the printed circuit board 130 is joined, and Figure 6(b) shows the state after the printed circuit board 130 has been joined. In Figure 6, the resin plate 140 has a single elastic modulus in the thickness direction. Before joining the printed circuit board 130, the thickness of the resin plate 140 is thinner than the thickness of the bonding material 160b placed near the resin plate 140. This thickness relationship ensures that the bonding material 160b contacts the lower electrode 135 of the printed circuit board 130 during and after joining. When the resin plate 140 has a single elastic modulus in the thickness direction, it is preferable that the elastic modulus is approximately 0.1 GPa or more and 20 GPa or less. The specific elastic modulus should be determined by the pressure applied during joining.

[0059] Figures 7(a) and 7(b) are cross-sectional views showing the structure of the resin plate 140 in the manufacturing process of the semiconductor device 101. Figure 7(a) shows the state before the printed circuit board 130 is bonded, and Figure 7(b) shows the state after the printed circuit board 130 has been bonded.

[0060] Each of the multiple resin plates 140 may have a low-elasticity region 144 and a high-elasticity region 145 in the thickness direction. The low-elasticity region 144 is provided at the upper and lower ends of the resin plate 140. The high-elasticity region 145 is provided between the upper and lower ends of the resin plate 140. The low-elasticity region 144 has less elasticity than the high-elasticity region 145.

[0061] The high-elasticity region 145 is formed of a different material than the low-elasticity region 144. For example, the high-elasticity region 145 is formed of a thermo-cured LCP plate, and the low-elasticity region 144 is formed of an uncured epoxy adhesive thinly applied to both sides of the high-elasticity region 145. Alternatively, the high-elasticity region 145 may be formed of the same material as the low-elasticity region 144. If the high-elasticity region 145 is formed of the same material as the low-elasticity region 144, the high-elasticity region 145 and the low-elasticity region 144 are formed by combining materials that have been pre-cured or softened, for example, by heat or ultraviolet light.

[0062] Furthermore, among the multiple resin plates 140, it is preferable that the thickness t7 of the high-elasticity region 145 in the resin plate 140 provided on the semiconductor element 110 is thinner than the thickness t9 of the high-elasticity region 145 in the resin plate 140 provided on the insulating substrate 120. Moreover, it is preferable that the difference between the thickness t7 of the high-elasticity region 145 in the resin plate 140 provided on the semiconductor element 110 and the thickness t9 of the high-elasticity region 145 in the resin plate 140 provided on the insulating substrate 120 corresponds to the sum t8 of the thickness of the bonding material 160a provided between the semiconductor element 110 and the insulating substrate 120 and the thickness of the semiconductor element 110. This is because the semiconductor element 110 and the bonding material 160a provided on the back surface of the semiconductor element 110 are highly elastic materials. In other words, it is preferable that the sum of the thicknesses t8 of the two high-elasticity materials and the thickness t7 of the high-elasticity region 145 of the first resin plate 141 (i.e., the sum of t7 and t8) is equal to the thickness t9 of the high-elasticity region 145 of the second resin plate 142. If the thicknesses of the high-elasticity regions 145 of the first resin plate 141 and the second resin plate 142 are equal, the first resin plate 141 tends to protrude by the thickness of the semiconductor element 110 and the bonding material 160a, and a large step is likely to occur. However, with the above configuration, such a step is reduced.

[0063] Furthermore, to prevent the bonding material 160b from leaking out of the through-hole 143 of the first resin plate 141 during bonding, it is preferable that the combined thickness of the high-elasticity region 145 and the low-elasticity region 144 is higher than the height of the bonding material 160b before bonding. To ensure that the bonding material 160b is in reliable contact with the printed circuit board 130, the semiconductor element 110, and the lower electrode 135 of the insulating substrate 120, it is preferable that the thickness of the high-elasticity region 145 is equal to or less than the height of the bonding material 160b after bonding. Also, in the state before bonding, it is preferable that the height of the bonding material 160b from the upper surface of the insulating substrate 120 is located between the upper end of the high-elasticity region 145 of the resin plate 140 and the uppermost surface of the resin plate 140 (the upper surface of the upper low-elasticity region 144).

[0064] The resin plate 140 described above ensures uniformity of the gap. On the other hand, the use of the resin plate 140 can also cause the bonding material 160b and the lower electrode 135 of the printed circuit board 130, which should ideally be in contact, to fail to make contact with each other. For example, due to manufacturing tolerances, the resin plate 140 and the high-elasticity region 145 may be higher than the bonding material 160b, and even under pressure, the bonding material 160b may not contact the lower electrode 135 of the printed circuit board 130, making bonding impossible. To avoid such a situation, the semiconductor device 101 should have a thickness relationship such that the upper surface of the bonding material 160b is higher than the upper surface of the resin plate 140. However, in the above thickness relationship, when pressure is applied or when the bonding material 160b melts due to heating, there needs to be room for the volume of the bonding material 160b protruding from the upper surface of the resin plate 140 to be absorbed. In particular, in the first resin plate 141, when the protruding bonding material 160b is crushed and spreads, there is a risk of a short circuit occurring between it and electrodes of different potentials, such as the gate electrode. To prevent such short circuits, the volume of the bonding material 160b supplied to the through-hole 143 of the first resin plate 141 is smaller than the volume of the through-hole 143. As a result, the bonding material 160b after bonding does not completely fill the internal space of the through-hole 143 of the first resin plate 141. In other words, the bonding material 160b fills only a portion of the inside of the through-hole 143.

[0065] (Sealing Resin) As shown in Figure 2, the sealing resin 150 seals a part of the insulating substrate 120, the semiconductor element 110, the printed circuit board 130, and the multiple resin plates 140, which are components of the semiconductor device 101. The sealing resin 150 is formed from a thermosetting resin such as epoxy resin, and exhibits effects such as moisture resistance, antifouling, thermal stress relief, and insulation. The sealing resin 150 is formed by, for example, transfer molding. The sealing resin 150 may also be formed by methods other than transfer molding, such as a molding method using compression molding or a molding method using potting at room temperature and pressure.

[0066] In Embodiment 1, a high voltage may be generated between the circuit pattern of the printed circuit board 130 and the upper conductor portion 122 located directly beneath it. Therefore, it is preferable that the gap between the printed circuit board 130 and the insulating substrate 120, or the gap between the printed circuit board 130 and the semiconductor element 110, be filled with sealing resin 150, except for the portions filled by the resin plate 140 and the bonding material 160b. However, depending on the application of the semiconductor device 101, sealing may not be necessary.

[0067] The sealing resin 150 is, for example, silica (SiO ２ It contains inorganic fillers such as ). The inorganic fillers have the function of reducing the coefficient of linear expansion of the sealing resin 150 and reducing the amount of curing shrinkage. The coefficient of linear expansion of the epoxy resin used as the sealing resin 150 is 20 ppm / K or more and 40 ppm / K or less, while the coefficient of linear expansion of aluminum nitride (AlN) used in the insulating substrate 120 is 4.5 ppm / K. If the difference in the coefficients of linear expansion between the epoxy resin and aluminum nitride is large, delamination may occur between the epoxy resin and aluminum nitride due to the temperature load applied to the semiconductor device 101. By including fillers in the sealing resin 150, the coefficient of linear expansion of the sealing resin 150 is reduced to match that of the insulating substrate 120, and delamination under temperature load is prevented.

[0068] On the other hand, if the sealing resin 150 contains a filler, the elastic modulus of the sealing resin 150 increases, and the thermal stress at the joint during temperature changes increases. Since there is a trade-off relationship between the decrease in the coefficient of thermal expansion and the increase in the elastic modulus, it is necessary to derive a resin composition and filler blending ratio that can achieve both. In particular, at the fine joints between the semiconductor element 110 and the printed circuit board 130, and at the joints between the insulating substrate 120 and the printed circuit board 130, delamination, cracking, and cutting are likely to occur due to the thermal stress associated with the increase in the elastic modulus of the sealing resin 150. To address this problem, in Embodiment 1, the resin plate 140 present between the sealing resin 150 and the bonding material 160b relieves the stress. When the temperature changes, the sealing resin 150 is displaced, and thermal stress is generated in the bonding material 160b. At this time, by applying the resin plate 140, which has a relatively low elastic modulus, the thermal stress is relieved by the resin plate 140. As a result, the bonding life of the bonding material 160b is improved. From this perspective, it is preferable that the resin plate 140 be formed from a material with a lower elastic modulus than the sealing resin 150.

[0069] (Cooler) The cooler 200 is bonded to the lower conductor portion 123 of the insulating substrate 120 via the bonding material 160d. Therefore, the lower conductor portion 123 has the lowest temperature among the semiconductor device 101. Components mounted on the insulating substrate 120 are cooled via the upper conductor portion 122, the bonding material 160b, the circuit pattern of the printed circuit board 130, etc. The bonding material 160d, like the bonding material 160a, is formed from solder, sinterable metal material, intermetallic compound, conductive adhesive, etc. The bonding materials 160a to 160d may be made of the same material or different materials.

[0070] (Method for manufacturing a semiconductor device) The method for manufacturing the semiconductor device 101 in Embodiment 1 is described below.

[0071] In STEP 1, electronic components 170 are mounted on the printed circuit board 130 via a bonding material 160c. Also, semiconductor elements 110 are mounted on the insulating substrate 120 via a bonding material 160a.

[0072] In STEP 2, the insulating substrate 120 is fixed by a predetermined jig. The jig includes a positioning mechanism for accurately positioning the insulating substrate 120, such as a groove into which the insulating substrate 120 fits. The insulating substrate 120 is pressed against the inner wall of the groove in the X and Y directions. This allows the position of the insulating substrate 120 relative to the jig to be determined with high precision.

[0073] In STEP 3, the first resin plate 141, the second resin plate 142, and the bonding material 160b are supplied onto the insulating substrate 120 and the semiconductor element 110 in the arrangement shown in Figure 3. At this time, a pre-assembled component of the first resin plate 141 and the bonding material 160b may be supplied onto the semiconductor element 110.

[0074] In STEP 4, the printed circuit board 130 is placed on the resin plate 140 and the bonding material 160b. A predetermined jig is used at this time. The jig is equipped with two positioning pins as a positioning mechanism for accurately positioning the printed circuit board 130. Two holes provided at the longitudinal ends of the printed circuit board 130 are inserted into these positioning pins, and the printed circuit board 130 is placed. With this configuration, the position of the printed circuit board 130 relative to the jig and the position of the printed circuit board 130 relative to the insulating substrate 120 are determined with high precision. However, the detailed supply method is changed depending on the form of the resin plate 140 and the bonding material 160b. For example, each resin plate 140, which is an LCP plate, may be placed by an air suction arm, and then each bonding material 160b, which is a solder plate, may be placed by a separate air suction arm.

[0075] When a highly elastic first resin plate 141 and a highly elastic bonding material 160b are used, a subassembly combining these in advance may be placed on the insulating substrate 120 and the semiconductor element 110. When a low-elasticity bonding material 160b, such as a paste, is used, the required amount of bonding material 160b is applied by a dispenser after each resin plate 140 is supplied. Alternatively, the bonding material paste may be supplied by mask printing or the like, and then the resin plates 140 may be placed.

[0076] In STEP 5, the printed circuit board 130 is pressurized from its top surface to its bottom surface. Simultaneously, the entire component is heated, and the bonding material 160b melts. Subsequently, the entire component is cooled, and the bonding material 160b reaches below its melting point. As a result, the bottom electrode 135 of the printed circuit board 130 and the top conductor portion 122 of the insulating substrate 120 are joined, and the bottom electrode 135 and the surface electrode of the semiconductor element 110 are also joined.

[0077] During pressurization, several locations on the printed circuit board 130 where electronic components 170 are not mounted are pressed. The pressure during pressurization is selected based on the type of bonding material 160b or resin plate 140. For example, an appropriate value is selected from approximately 1 kPa to 10 MPa. It is preferable that the pressure be controlled so that the contact state of the joint does not change due to pressure changes during heating.

[0078] Furthermore, the pressure is within the elastic deformation region of the resin plate 140, and as shown in Figure 7, it is preferable that the resin plate 140 elastically deforms by approximately 0.01 mm to 0.2 mm. The temperature profile during heating is preferably such that it exceeds the melting point of the bonding material 160b but does not exceed the melting points of the bonding materials 160a and 160c, so that misalignment does not occur in the bonded parts.

[0079] In STEP 6, the components, in which the printed circuit board 130, insulating substrate 120, and semiconductor element 110 are joined together, are placed inside a mold. The components are then resin-sealed by transfer molding. After that, they are removed from the mold and the semiconductor device 101 is completed.

[0080] (Effects of Embodiment 1) The semiconductor device 101 of Embodiment 1 has a configuration in which a printed circuit board 130 and an insulating substrate 120 are connected by a bonding material 160b. As described in STEP 5 of the manufacturing method, when the printed circuit board 130 is pressed toward the insulating substrate 120, the bonding material 160b comes into contact with the lower electrode 135, the upper conductor portion 122, and the surface electrode of the semiconductor element 110, bonding the components together. At this time, the resin plate 140 prevents the gap from narrowing excessively and prevents the bonding material 160b from wetting and spreading excessively, which would cause a short circuit between electrodes of different potentials. The first resin plate 141 holds the bonding material 160b inside the through hole 143. Therefore, a wiring member connecting the lower electrode 135 of the printed circuit board 130 and the surface electrode of the semiconductor element 110 is unnecessary. In the resin sealing process of STEP 6, the gap does not narrow, ensuring that there is enough height for the resin to flow. As a result, a highly reliable semiconductor device 101 that does not cause problems such as voltage resistance failure can be manufactured.

[0081] However, if the first resin plate 141 is placed only on semiconductor elements 110 where electrodes with different potentials are in close proximity, the printed circuit board 130 will warp or tilt due to the pressure applied. For example, the printed circuit board 130 may warp so that the second region 120b and the fourth region 120d are pushed downwards along the axis from the first region 120a to the third region 120c. Alternatively, the printed circuit board 130 may warp so that the axis from the second region 120b to the fourth region 120d is pushed downwards, causing the first region 120a and the third region 120c to rise, or it may tilt downwards from the second region 120b to the fourth region 120d. Or, the opposite warp may occur. Warping and tilting can be reduced if the upper surface of the printed circuit board 130 can be uniformly pressurized over a wide area. However, in a configuration where electronic components 170 are mounted on the printed circuit board 130, it is not possible to uniformly pressurize such a wide area. Therefore, as described in STEP 5, several points on the printed circuit board 130 are pressurized, which makes it prone to warping or tilting. When warping or tilting occurs, bonding defects occur in the relatively raised areas. Also, the bonding material 160b spreads excessively in the relatively sunken areas, causing short circuits between electrodes with different potentials. Furthermore, the gap in the relatively sunken areas is too narrow, resulting in poor flow of the sealing resin 150 during the resin sealing process. As a result, manufacturing defects such as insulation failures occur frequently.

[0082] The semiconductor device 101 of Embodiment 1 has a structure that is less prone to warping and tilting, thereby preventing the defects described above. For example, a rectangular insulating substrate 120 is provided with resin plates 140 that enable gap retention at positions close to the four corners of the insulating substrate 120. In Embodiment 1, a first resin plate 141 is provided as a gap retention mechanism in the first region 120a and the third region 120c. The first resin plate 141 also serves as a measure against short circuits between electrodes of different potentials. A second resin plate 142 is provided in the second region 120b and the fourth region 120d. As shown in Figure 3, the second resin plate 142 is provided closer to the outer edge of the insulating substrate 120 in the X direction than the bonding material 160b located in the same second region 120b and fourth region 120d. This makes the above-mentioned warping and tilting less likely to occur. The bonding material 160b, which is positioned in the second region 120b and the fourth region 120d, does not pose a problem even if it spreads to some extent during bonding. Therefore, it is possible to apply the second resin plate 142, which does not have through holes 143. As a result, processing to form through holes 143, as in the first resin plate 141, becomes unnecessary, and costs are reduced.

[0083] Furthermore, even when resin plates 140 are provided in four regions, warping or tilting may occur. Such warping or tilting is caused by differences in the thickness of the semiconductor element 110, the warping of the insulating substrate 120, the warping of the printed circuit board 130, and the surface configuration of the printed circuit board 130. Differences in the surface configuration of the printed circuit board 130 correspond to structural differences such as areas on the printed circuit board 130 where nothing is present, areas where a metal layer 132 is formed, areas where a resist is applied, and areas where a resist is applied on the metal layer 132, as shown in Figure 5.

[0084] The thickness of the semiconductor element 110 is between several tens of micrometers and several hundred micrometers, including the thickness of the bonding material 160a provided on the underside of the semiconductor element 110. The warpage of the insulating substrate 120 and the printed circuit board 130 is between several tens of micrometers and several hundred micrometers. The thickness of the metal layer 132 of the printed circuit board 130 is between several tens of micrometers and several hundred micrometers. The thickness of the resist layer 133 is several tens of micrometers. The gap between the printed circuit board 130 and the insulating substrate 120, or the gap between the printed circuit board 130 and the semiconductor element 110, which is held to a distance of about 0.5 mm by the resin plate 140, varies due to the above-mentioned local thickness differences.

[0085] In Embodiment 1, as shown in Figures 4 to 7, the thickness of the resin plate 140 is adjusted according to the arrangement of the resin plate 140. If the thickness of the low-elasticity region 144 of the resin plate 140 is increased so that it is crushed during joining, the resin plate 140 may easily undergo plastic deformation, potentially causing problems such as the resin plate 140 being crushed or falling over. It is preferable to control the thickness of the resin plate 140 according to its location so that thickness tolerances caused by manufacturing variations, etc., can be absorbed by the elastic deformation of the resin plate 140 under pressure.

[0086] In Embodiment 1, the size of the through-hole 143 in the first resin plate 141 placed on the source electrode is φ5 mm × 0.45 mm, and the volume of the through-hole 143 is 2.8 mm³. ３ Furthermore, the size of the joining material 160b supplied to this through hole 143 is φ4.5 mm × 0.5 mm, and the volume of the joining material 160b is 2.5 mm³. ３ This volume relationship ensures that even if the bonding material 160b is crushed by pressurization or heating during manufacturing, the bonding material 160b will not leak out of the through-hole 143 of the first resin plate 141. More preferably, the above volume relationship is designed taking into account the reduction in the thickness of the resin plate 140 due to the elastic deformation of the resin plate 140 when pressurized. Considering manufacturing tolerances, it is preferable that the amount of bonding material 160b supplied to the through-hole 143 of the first resin plate 141 after bonding is not enough to completely fill the space inside the through-hole 143 of the first resin plate 141.

[0087] In summary, the semiconductor device 101 in Embodiment 1 includes an insulating substrate 120, a semiconductor element 110, a printed circuit board 130, and a plurality of resin plates 140. The semiconductor element 110 is mounted on the upper surface of the insulating substrate 120. The printed circuit board 130 has a lower surface facing the upper surface of the insulating substrate 120 and having a circuit pattern formed thereon for driving the semiconductor element 110, and is provided above the insulating substrate 120 and the semiconductor element 110. The plurality of resin plates 140 are provided in the gap between either the insulating substrate 120 or the semiconductor element 110 and the printed circuit board 130, and maintain that gap. In a plan view, at least one of the plurality of resin plates 140 is provided in each of the four regions divided by two imaginary lines that extend through the center CT of the insulating substrate 120 in the longitudinal and transverse directions, respectively. The plurality of resin plates 140 include at least one first resin plate 141 having a through hole 143 that penetrates in the vertical direction.

[0088] Such a semiconductor device 101 maintains a uniform gap between the insulating substrate 120 and the printed circuit board 130. Therefore, when the printed circuit board 130 is pressed during the manufacturing process of the semiconductor device 101, warping or tilting of the printed circuit board 130 is reduced. Furthermore, the first resin plate 141, which has through holes 143, not only maintains this gap but also enables electrical connection between the printed circuit board 130 and the semiconductor element 110 through the bonding material 160b provided inside the through holes 143. As a result, bonding defects and insulation defects inside the semiconductor device 101 are reduced. In other words, the semiconductor device 101 of the first embodiment achieves miniaturization, cost reduction, and improved reliability by uniformly maintaining the gap between the insulating substrate 120 and the printed circuit board 130 with a small number of components. The semiconductor device 101 is used in electrical equipment such as inverters, converters, and servo amplifiers.

[0089] In Embodiment 1, two first resin plates 141 are provided in each of the first region 120a and the third region 120c, and one second resin plate 142 is provided in each of the second region 120b and the fourth region 120d. It is sufficient that at least one resin plate 140 is provided in at least two or more regions from the first region 120a to the fourth region 120d. Furthermore, the above effect can be obtained if at least one of the multiple resin plates 140 is a first resin plate 141 having a through hole 143.

[0090] <Embodiment 2> Figure 8 is a plan view showing the configuration of the semiconductor device 102 in Embodiment 2. Figure 9 is a cross-sectional view showing the configuration of the semiconductor device 102. Figure 9 shows a cross-section along B-B' in Figure 8. In Embodiment 2, eight resin plates 140 are provided in the first region 120a to the fourth region 120d.

[0091] In the first region 120a and the third region 120c, three first resin plates 141 are provided, and two of these first resin plates 141a are provided on the surface of the semiconductor element 110, similar to Embodiment 1. In Embodiment 2, the other first resin plate 141b is provided on the upper conductor portion 122 of the insulating substrate 120. Compared to Embodiment 1, the semiconductor element 110, the bonding material 160b, and the first resin plate 141a are located inside the insulating substrate 120 in the X direction. The first resin plate 141b provided on the upper conductor portion 122 is located outside the insulating substrate 120 in the X direction compared to the semiconductor element 110.

[0092] In each of the second region 120b and the fourth region 120d, a first resin plate 141c and a bonding material 160b are provided. The bonding material 160b is provided inside the through hole 143 of the first resin plate 141c. In other words, the first resin plate 141c is provided on the upper conductor portion 122 of the insulating substrate 120 such that the side walls of the through hole 143 surround the bonding material 160b. The printed circuit board 130 includes a lower electrode 135 as a circuit pattern that faces the upper conductor portion 122 of the insulating substrate 120. The bonding material 160b electrically connects the upper conductor portion 122 of the insulating substrate 120 and the lower electrode 135 of the printed circuit board 130. The area of ​​the bonding material 160b is larger compared to Embodiment 1. The first resin plate 141c is made of the same material as the first resin plate 141a and the first resin plate 141b.

[0093] (Effects) The bonding material 160b provided in the second region 120b and the fourth region 120d may spread slightly more than the bonding material 160b on the semiconductor element 110. However, if the bonding material 160b spreads to another upper conductor portion 122, a short circuit will occur between the different potentials. In addition, the bonding material 160b has the function of an electrical connection between the lower electrode 135 of the printed circuit board 130 and the upper conductor portion 122 on the insulating substrate 120, and at the same time has the function of dissipating the heat generated at the lower electrode 135 of the printed circuit board 130 to the cooler 200 below the insulating substrate 120. Therefore, from an electrical and thermal viewpoint, it is preferable that the bonding material 160b in the second region 120b and the fourth region 120d be arranged over the largest possible area relative to the upper conductor portion 122 of the insulating substrate 120. In such cases, it is preferable that a first resin plate 141c having through holes 143 is also provided around the bonding material 160b in the second region 120b and the fourth region 120d. By supplying the bonding material 160b to the through holes 143 of the first resin plate 141c, short circuits due to the wetting and spreading of the bonding material 160b are prevented.

[0094] Compared to Embodiment 1, the first resin plate 141a provided in the first region 120a and the third region 120c is positioned closer to the inside of the insulating substrate 120 in the X direction. In this state, if the resin plate 140 is provided only in the first region 120a and the third region 120c, there are no supporting resin plates 140 in the second region 120b and the fourth region 120d. Therefore, warping or tilting is likely to occur in the second region 120b and the fourth region 120d. In Embodiment 2, since the first resin plate 141c is provided in the second region 120b and the fourth region 120d, the occurrence of such warping and tilting is reduced.

[0095] The first resin plate 141b provided in the first region 120a and the third region 120c has through holes 143. The first resin plate 141b is better able to absorb strain due to elastic deformation under pressure than the second resin plate 142, which does not have through holes 143. As a result, warping and tilting of the printed circuit board 130 are reduced. Thus, the inside of the through holes 143 does not necessarily have to be filled with bonding material 160b.

[0096] <Embodiment 3> Figures 10 to 12 are plan views showing the configuration of semiconductor devices 103a, 103b, and 103c in Embodiment 3. The insulating substrate 120 includes a first upper conductor portion 122a and a second upper conductor portion 122b, as well as a third upper conductor portion 122c. The third upper conductor portion 122c is provided in the third region 120c.

[0097] The semiconductor device 103a shown in Figure 10 includes a bonding material 160b provided on the third upper conductor portion 122c and a first resin plate 141d having a through hole 143 surrounding the bonding material 160b. In other words, the bonding material 160b provided on the third upper conductor portion 122c is provided inside the through hole 143 of the first resin plate 141d. The third upper conductor portion 122c is bonded to the N-side lower electrode of the printed circuit board 130 via its bonding material 160b. The first resin plate 141d is made of the same material as the other first resin plates 141. Furthermore, a second resin plate 142a is provided on the first upper conductor portion 122a of the first region 120a, which is approximately point-symmetric to the first resin plate 141d.

[0098] The semiconductor device 103b shown in Figure 11 includes a second resin plate 142b provided on the third upper conductor portion 122c. The second resin plate 142b does not have through holes 143. The second resin plate 142b is made of TIM (Thermal Inductance Material) and is solid at least within the operating temperature range of the semiconductor device 103b. In order to maintain the gap between the printed circuit board 130 and the insulating substrate 120, it is preferable that the second resin plate 142b has an elastic modulus similar to that of the other resin plates 140 in the same semiconductor device 103b. From the viewpoint of heat dissipation, it is preferable that the second resin plate 142b has a better thermal conductivity than the material of the other resin plates 140. For example, the thermal conductivity of the second resin plate 142b is preferably 1 W / m·K or higher, and more preferably 10 W / m·K or higher. From the viewpoint of heat dissipation, it is preferable that the second resin plate 142b is in direct contact with the N-side lower electrode of the printed circuit board 130. However, it may also be thermally connected to the printed circuit board 130 via a resist layer 133 provided between the second resin plate 142b and the N-side wiring pattern.

[0099] The semiconductor device 103c shown in Figure 12 includes a first resin plate 141e and a second resin plate 142c provided on the third upper conductor portion 122c. The second resin plate 142c is provided inside the through hole 143 of the first resin plate 141e. The first resin plate 141e is made of the same material as the other resin plates 140 except for the second resin plate 142c. The second resin plate 142c is made of TIM (Thermal Inductance Material), similar to the second resin plate 142b shown in Figure 11, and is solid at least within the operating temperature range of the semiconductor device 103c. However, unlike the second resin plate 142b, the second resin plate 142c may have a smaller modulus of elasticity than the other resin plates 140 in the same semiconductor device 103c. From the viewpoint of heat dissipation, it is preferable that the second resin plate 142c has a better thermal conductivity than the material of the other resin plates 140. For example, the thermal conductivity of the second resin plate 142c is preferably 1 W / m·K or higher, and more preferably 10 W / m·K or higher. The second resin plate 142c preferably has a lower modulus of elasticity and higher thermal conductivity than the other resin plates 140. From the viewpoint of heat dissipation, the second resin plate 142c is preferably in direct contact with the N-side lower electrode of the printed circuit board 130, but it may also be thermally connected to the printed circuit board 130 via a resist layer 133 provided between the second resin plate 142c and the N-side wiring pattern.

[0100] (Effect) The P-side wiring pattern 136a and AC wiring pattern 136b of the printed circuit board 130 are electrically and thermally connected to the first upper surface conductor portion 122a and the second upper surface conductor portion 122b of the insulating substrate 120, respectively, by the bonding material 160b. As the cooler 200 provided on the lower surface of the insulating substrate 120 cools the insulating substrate 120, the P-side wiring pattern 136a and AC wiring pattern 136b of the printed circuit board 130 also dissipate heat. The same current flows through the N-side wiring pattern of the printed circuit board 130 as through the P-side wiring pattern 136a and AC wiring pattern 136b, but the N-side wiring pattern is connected to the semiconductor element 110 and the N-side input terminal by the bonding material 160b. In other words, the N-side wiring pattern does not have a heat dissipation path toward the cooler 200.

[0101] In Embodiment 3, the N-side wiring pattern is connected to the third upper conductor portion 122c via a heat conductive member such as a bonding material 160b or TIM. This configuration forms a heat dissipation path for the N-side wiring pattern.

[0102] In the semiconductor device 103a shown in Figure 10, if the bonding material 160b has a high thermal conductivity, such as Ag paste, the bonding material 160b functions as a heat conductive member, improving the heat dissipation of the semiconductor device 103a. However, when bonding the printed circuit board 130 and the insulating substrate 120, such a bonding material 160b easily melts. As a result, it is difficult to maintain the gap, and the printed circuit board 130 is prone to warping or tilting. In the semiconductor device 103a, the gap is maintained by providing the first resin plate 141d in the third region 120c. In addition, since the first resin plate 141d is positioned to surround the bonding material 160b, the wetting spread of the bonding material 160b is appropriately controlled. As a result, the risk of insulation failure is reduced.

[0103] In the semiconductor device 103b shown in Figure 11, the thermal conductivity of the second resin plate 142b is lower compared to the semiconductor device 103a in Figure 10, but the printed circuit board 130 is supported by a single component, namely the second resin plate 142b. In other words, the number of components is reduced. If the second resin plate 142b is a material with sufficient insulating properties, the possibility of a short circuit due to contact or proximity between the second resin plate 142b and the first upper surface conductor portion 122a and the second upper surface conductor portion 122b located around it is eliminated. In other words, the tolerance for manufacturing tolerances or placement of the second resin plate 142b is increased, resulting in improved productivity and cost reduction.

[0104] The semiconductor device 103c shown in Figure 12 achieves performance intermediate between the semiconductor device 103a shown in Figure 10 and the semiconductor device 103b shown in Figure 11. For example, the thermal conductivity of the second resin plate 142c is lower than that of the bonding material 160b shown in Figure 10, but higher than that of the second resin plate 142b shown in Figure 11. However, the elastic modulus of the second resin plate 142c is not as high as that of the second resin plate 142b. Also, compared to the semiconductor device 103b in Figure 11, the first resin plate 141e is more susceptible to load during pressurization, so there is a lower possibility that the second resin plate 142c will be excessively crushed and damaged. Therefore, heat dissipation performance is relatively easy to ensure. Furthermore, even if the second resin plate 142c is crushed, it is held inside the through hole 143 of the first resin plate 141e. Therefore, a non-insulating TIM can be applied to the second resin plate 142c.

[0105] Unlike the semiconductor device 103a in Figure 10, in semiconductor device 103b in Figure 11 and semiconductor device 103c in Figure 12, the second resin plate 142b or the second resin plate 142c does not need to be in direct contact with the N-side lower electrode of the insulating substrate 120. In semiconductor device 103a in Figure 10, heat dissipation performance cannot be guaranteed unless the bonding material 160b is bonded to the lower electrode 135 and the third upper conductor portion 122c of the printed circuit board 130. However, in the case of the TIM second resin plate 142b and the second resin plate 142c, a heat dissipation path is secured if they are thermally connected to the N-side wiring pattern via the resist layer 133. In this case, thermal resistance increases, but since the N-side wiring pattern is not exposed from the lower surface of the insulating substrate 120, sufficient insulation against the N potential is ensured, and the risk of insulation failure is reduced.

[0106] As described above, the semiconductor devices 103a, 103b, and 103c of Embodiment 3 uniformly maintain the gap between the printed circuit board 130 and the insulating substrate 120, and the gap between the printed circuit board 130 and the semiconductor element 110, and improve the heat dissipation of the N-side wiring pattern of the printed circuit board 130.

[0107] <Embodiment 4> Figure 13 is a plan view showing the configuration of the semiconductor device 104 in Embodiment 4. Similar to Embodiment 3, the semiconductor device 104 includes a third upper conductor portion 122c and a resin plate 140 provided on the third upper conductor portion 122c in the first region 120a. Furthermore, the semiconductor device 104 is provided with a fourth upper conductor portion 122d in the first region 120a. The semiconductor device 104 includes a second resin plate 142d provided on its fourth upper conductor portion 122d. However, instead of the second resin plate 142d, the second resin plate 142b shown in Figure 11 of Embodiment 3, or the second resin plate 142c and the first resin plate 141e shown in Figure 12 may be provided on the fourth upper conductor portion 122d. Although not shown in the illustration, the upper conductive portion 122 of the insulating substrate 120, the semiconductor element 110 on the insulating substrate 120, and the resin plate 140 may be arranged point-symmetrically with respect to the insulating substrate 120.

[0108] (Effect) The fourth upper conductor portion 122d is insulated from the first upper conductor portion 122a and the second upper conductor portion 122b. As a result, among the wiring patterns 136, those with a high need for heat dissipation are selectively thermally connected to the fourth upper conductor portion 122d. For example, by joining the fourth upper conductor portion 122d and the lower electrode 135 to the second resin plate 142d, the heat generated in the N-side wiring pattern is dissipated to the cooler 200 via the second resin plate 142d. The wiring patterns 136 of the printed circuit board 130 are paths through which the main current flows, and compared to cases where busbars or the like are paths for the main current, it is possible to easily form the above-mentioned heat dissipation paths. The semiconductor device 104 enables selective improvement of the heat dissipation performance for any wiring pattern 136 of the printed circuit board 130.

[0109] When the upper conductive portions 122 of the insulating substrate 120 are arranged point-symmetrically with respect to the insulating substrate 120, the warping of the insulating substrate 120 is reduced. Furthermore, when the semiconductor elements 110 and the resin plate 140 on the insulating substrate 120 are also arranged point-symmetrically with respect to the insulating substrate 120, the warping and tilting of the printed circuit board 130 during bonding are also reduced.

[0110] <Embodiment 5> Figure 14 is a plan view showing the configuration of the semiconductor device 105 in Embodiment 5. The semiconductor device 105 has the same configuration as in Embodiment 4, but does not have a first resin plate 141 on the semiconductor element 110. In order to prevent warping and tilting in the first region 120a and the third region 120c, a second resin plate 142d is provided on the fourth upper conductor portion 122d of the first region 120a.

[0111] (Effect) If the semiconductor element 110 is sufficiently large and the bonding material 160b provided on the surface electrodes of the semiconductor element 110 does not spread, the first resin plate 141 is not necessarily required. The surface electrodes of the semiconductor element 110 and the electrodes with different potentials are sealed with the sealing resin 150. Therefore, even if the semiconductor device 105 is used in the market for a long period of time, problems such as ion migration are less likely to occur.

[0112] Furthermore, because the size of the gate electrode of the semiconductor element 110 is small, between 0.1 mm square and 2 mm square, the joint between the bonding material 160b and the semiconductor element 110 is susceptible to the influence of the mounting accuracy of the semiconductor element 110, the mounting accuracy of the bonding material 160b, and the mounting accuracy of the printed circuit board 130 during manufacturing. For this reason, the bonding material 160b on the gate electrode is the most prone to bonding defects. When the first resin plate 141 is provided, bonding between the two electrodes is impossible unless the gate electrode faces the lower electrode 135 of the printed circuit board 130 through the through hole 143. In Embodiment 5, since the first resin plate 141 is not provided, the bonding material 160b can bond the gate electrode and the lower electrode 135 with a relatively high degree of freedom.

[0113] Figure 15 is a cross-sectional view showing the configuration of the semiconductor device 105. Figure 15 shows a cross-section along C-C' in Figure 14. The bonding material 160b after bonding has an angle with respect to the Z direction. In this way, because the first resin plate 141 is not provided on the semiconductor element 110, the bonding material 160b reliably bonds the gate electrode and the lower electrode 135 of the printed circuit board 130 in an inclined state. As a result, bonding defects of the gate electrode caused by manufacturing tolerances are reduced.

[0114] <Embodiment 6> Figure 16 is a plan view showing the configuration of the semiconductor device 106 in Embodiment 6. The configuration of Embodiment 6 is similar to that of Embodiment 1, but the semiconductor device 106 in Figure 16 does not have the resin plate 140 in Embodiment 1, but instead has a gap-holding material 146.

[0115] The gap-holding material 146 is made of a resin such as PTFE, PI, PPS, or LCP. The elastic modulus of the gap-holding material 146 is preferably, for example, 0.1 GPa or more and 20 GPa or less. The specific elastic modulus of the gap-holding material 146 should be determined by the pressure applied during joining, and it is preferable that the gap-holding material 146 is made of a material that does not undergo compression of 0.1 mm or more under pressure. The gap-holding material 146 may be made of a conductive material such as copper, aluminum, iron (Fe), gold, silver, or alloys thereof. In Embodiment 6, the gap-holding material 146 is made of a conductive material. In this case, the gap-holding material 146 is provided in a position that is electrically insulated from the circuit pattern of the printed circuit board 130.

[0116] The multiple bonding materials 160b, similar to Embodiment 1, electrically connect the upper conductor portion 122 mounted on the upper surface of the insulating substrate 120 and the electrodes provided on the upper surface of the semiconductor element 110 to a part of the circuit pattern of the printed circuit board 130.

[0117] As shown by the dashed line in Figure 16, in a plan view, the smallest rectangular region that encloses all of the multiple bonding materials 160b is virtually defined. This rectangular region is divided into a first region 124a, a second region 124b, a third region 124c, and a fourth region 124d by two mutually perpendicular virtual lines that extend through the center CT of the insulating substrate 120 in the longitudinal and short directions of the insulating substrate 120, respectively.

[0118] At least one gap-retaining material 146 is provided in at least two of the first region 124a, second region 124b, third region 124c, and fourth region 124d. As an example, in the configuration shown in Figure 16, one gap-retaining material 146 is provided in each of the first region 124a, second region 124b, third region 124c, and fourth region 124d. Specifically, the gap-retaining materials 146 in the first region 124a and third region 124c are provided in positions close to the short side of the rectangular region and electrically insulated from the semiconductor element 110. The gap-retaining materials 146 in the second region 124b and fourth region 124d are provided in positions close to a virtual line parallel to the short side direction of the insulating substrate 120 passing through the center CT of the insulating substrate 120, and close to the long side of the rectangular region, and electrically insulated from the bonding material 160b located within the same region.

[0119] The arrangement of the gap-retaining material 146 is not limited to the arrangement described above. For example, as shown in Figure 17, when heat is applied to the insulating substrate 120 or the printed circuit board 130 and warping occurs, the gap-retaining material 146 may be provided at a position where the gap between the insulating substrate 120 (e.g., the upper conductor portion 122) and the printed circuit board 130 (e.g., the resist layer 133) narrows due to the warping. The height of the gap-retaining material 146 is preferably set based on the height of the gap between the insulating substrate 120 and the printed circuit board 130 at the position where the gap-retaining material 146 is placed, and the final gap height due to the expected warping at that position.

[0120] (Effect) In this configuration, when the insulating substrate 120 and semiconductor element 110 are joined to the printed circuit board 130, each component expands due to thermal expansion and warps due to the temperature during joining, causing the gap between the insulating substrate 120 and the printed circuit board 130 to narrow in some places. When the gap narrows, the bonding material 160b placed between them is compressed, and the bonding material 160b becomes wet and spreads. The wet and spread bonding material 160b reduces the insulation distance between electrodes that should be insulated, and in the worst case, it may cause electrical conductivity between the electrodes.

[0121] In contrast, in Embodiment 6, a minimum rectangular area is defined that includes all of the multiple bonding materials 160b arranged on the upper surfaces of the insulating substrate 120 and the semiconductor element 110, and a gap-holding material 146 is provided inside this rectangular area. Even if the insulating substrate 120 or the printed circuit board 130 warps in such a way that it protrudes towards the gap, the gap is maintained by the gap-holding material 146, thereby suppressing the wetting and spreading of the bonding material 160b as described above. Therefore, reliable electrical connections can be ensured with as few parts as possible, and the defect rate in the bonding process can be reduced. Furthermore, if the gap-holding material 146 is provided in an area inside the rectangular area relative to the bonding material 160b, an improvement in the above effect can be expected.

[0122] Furthermore, when the gap-holding material 146 is made of a conductive material, pre-bonding and fixing with the upper conductor portion 122 on the insulating substrate 120 becomes easier. Therefore, problems such as the gap-holding material falling over or shifting position during the bonding process can be suppressed, thus ensuring a reliable electrical connection.

[0123] This disclosure allows for the free combination of each embodiment, and enables modifications and omissions of each embodiment as appropriate. The above description is illustrative and not limiting in all respects. It is understood that countless variations not illustrated are conceivable.

[0124] 1 Power converter, 2 Input capacitor, 3 Control circuit, 4 Onboard battery, 5 Rotating electric machine, 6 Drive circuit, 7 Power supply circuit, 101-105 Semiconductor device, 110 Semiconductor element, 110a Upper arm semiconductor element, 110b Lower arm semiconductor element, 111 Main electrode, 112 Main electrode, 113 Signal electrode, 120 Insulating substrate, 120a First region, 120b Second region, 120c Third region, 120d Fourth region, 121 Insulating part, 122 Upper conductor part, 122a First upper conductor part, 122b Second upper conductor part, 122c Third upper conductor part, 122d Fourth upper conductor part, 123 Lower conductor part, 130 Printed circuit board, 131 Insulating layer, 132 Metal layer, 133 Resist layer, 134 Terminal, 134a P-side input terminal, 134b AC output terminal, 135 Bottom electrode, 135a P-side bottom electrode, 135b AC bottom electrode, 135c Signal bottom electrode, 136 Wiring pattern, 136a P-side wiring pattern, 136b AC wiring pattern, 136c Signal wiring pattern, 140 Resin plate, 141 First resin plate, 141a First resin plate, 141b First resin plate, 141c First resin plate, 141d First resin plate, 141e First resin plate, 142 Second resin plate, 142a Second resin plate, 142b Second resin plate, 142c Second resin plate, 142d Second resin plate, 143 Through hole, 144 Low elastic region, 145 High elastic region, 150 Sealing resin, 160a Bonding material, 160b Bonding material, 160c Bonding material, 160d Bonding material, 170 Electronic components, 200 Cooler, CT center.

Claims

1. A semiconductor device comprising: an insulating substrate; a semiconductor element mounted on the upper surface of the insulating substrate; a printed circuit board provided above the insulating substrate and the semiconductor element, having a lower surface facing the upper surface of the insulating substrate and having a circuit pattern formed thereon for driving the semiconductor element; a plurality of gap-retaining materials provided in the gap between either the insulating substrate or the semiconductor element and the printed circuit board to maintain the gap; a plurality of bonding materials electrically connecting a conductor mounted on the upper surface of the insulating substrate or an electrode provided on the upper surface of the semiconductor element and a part of the circuit pattern on the printed circuit board, wherein, in a plan view, a minimum rectangular region containing all of the plurality of bonding materials is defined, and at least one of the plurality of gap-retaining materials is provided in at least two of the four regions obtained by dividing the rectangular region with two mutually perpendicular imaginary lines passing through the center of the rectangular region.

2. The semiconductor device according to claim 1, wherein the insulating substrate or the printed circuit board has a curvature, and at least one of the plurality of gap-holding members is provided at a position where the gap narrows due to the curvature.

3. The semiconductor device according to claim 1 or claim 2, wherein the plurality of gap-holding materials are made of resin.

4. The semiconductor device according to claim 1 or 2, wherein the plurality of gap-holding materials are made of conductive material and are not electrically connected to the circuit pattern of the printed circuit board.

5. A semiconductor device comprising: an insulating substrate; a semiconductor element mounted on the upper surface of the insulating substrate; a printed circuit board provided above the insulating substrate and the semiconductor element, having a lower surface facing the upper surface of the insulating substrate and having a circuit pattern formed thereon for driving the semiconductor element; and a plurality of resin plates provided in the gap between either the insulating substrate or the semiconductor element and the printed circuit board, and maintaining the gap, wherein, in a plan view, at least one of the plurality of resin plates is provided in at least two of four regions divided by two imaginary lines extending through the center of the insulating substrate in the longitudinal and transverse directions of the insulating substrate, respectively, and the plurality of resin plates include at least one first resin plate having a through hole penetrating in the vertical direction.

6. The semiconductor device according to claim 5, wherein the plurality of resin plates further include a second resin plate that does not have the through hole, and at least one of the plurality of resin plates is provided in each of the four regions.

7. The semiconductor device according to claim 5 or 6, wherein the printed circuit board includes an insulating layer forming the circuit pattern, a metal layer provided on the insulating layer, and a resist layer provided on the insulating layer or the metal layer, the upper end of each of the plurality of resin plates is in contact with either the metal layer or the resist layer exposed from the lower surface of the printed circuit board, and each of the plurality of resin plates has a thickness based on the configuration of the layer exposed from the lower surface of the printed circuit board that is the object of contact.

8. The semiconductor device according to any one of claims 5 to 7, wherein the insulating substrate or the printed circuit board has a curvature, and each of the plurality of resin plates has a thickness corresponding to the curvature.

9. The semiconductor device according to any one of claims 5 to 8, further comprising a bonding material provided inside the through hole of the first resin plate, the semiconductor element including a surface electrode provided on the surface of the semiconductor element, the printed circuit board including a bottom electrode facing the surface electrode of the semiconductor element as the circuit pattern, the first resin plate provided on the surface of the semiconductor element, and the bonding material electrically connecting the surface electrode of the semiconductor element and the bottom electrode of the printed circuit board.

10. A semiconductor device according to any one of claims 5 to 8, further comprising a bonding material provided inside the through hole of the first resin plate, the insulating substrate including a conductor portion provided on the upper surface of the insulating substrate, the printed circuit board including a lower electrode facing the conductor portion of the insulating substrate as the circuit pattern, the first resin plate provided on the upper surface of the insulating substrate, and the bonding material electrically connecting the conductor portion of the insulating substrate and the lower electrode of the printed circuit board.

11. The semiconductor device according to claim 9 or 10, wherein the bonding material is filled only in a portion of the interior of the through hole.

12. The semiconductor device according to any one of claims 5 to 11, wherein each of the plurality of resin plates includes a low-elasticity region provided at the upper end and lower end of each of the plurality of resin plates, and a high-elasticity region provided between the upper end and the lower end of each of the plurality of resin plates, wherein the low-elasticity region has less elasticity than the high-elasticity region.

13. The semiconductor device according to claim 12, wherein, among the plurality of resin plates, the thickness of the high-elasticity region in the resin plate provided on the semiconductor element is thinner than the thickness of the high-elasticity region in the resin plate provided on the insulating substrate, and the difference between the thickness of the high-elasticity region in the resin plate provided on the semiconductor element and the thickness of the high-elasticity region in the resin plate provided on the insulating substrate is equal to the sum of the thickness of the bonding material provided between the semiconductor element and the insulating substrate and the thickness of the semiconductor element.

14. The semiconductor device according to any one of claims 5 to 13, further comprising a sealing resin for sealing a part of the insulating substrate, the semiconductor element, the printed circuit board, and the plurality of resin plates.

15. The semiconductor device according to any one of claims 5 to 14, wherein, among the plurality of resin plates, the outer shape of the resin plate provided on the semiconductor element is larger than the outer shape of the semiconductor element in a plan view.

16. A method for manufacturing a semiconductor device according to any one of claims 5 to 15, comprising a step of pressurizing the plurality of resin plates with either the insulating substrate or the semiconductor element and the printed circuit board, wherein each of the plurality of resin plates undergoes an elastic deformation of 0.01 mm or more and 0.2 mm or less due to the pressurization in the step.

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