A method for manufacturing a semiconductor device, a semiconductor device, a lead frame structure and a moulding form
The method addresses the high cost and complexity of ceramic-based semiconductor packaging by integrating lead frame junctions and breaking means to expose terminals during encapsulation, achieving stable connections and efficient heat transfer without ceramic support.
Patent Information
- Application Number
- PCT/EP2025/085752
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-12-06
- Filing Date
- 2025-12-05
- Publication Date
- 2026-06-11
AI Technical Summary
Conventional semiconductor power packaging using ceramic substrates is costly due to high thermal conductivity materials, has significant CTE mismatch, and a longer thermal dissipation path, and faces challenges in cutting lead frame junctions after encapsulation due to full coverage by the encapsulation material.
A method for manufacturing semiconductor devices without a ceramic layer by using a lead frame structure with interconnecting junctions, mounting semiconductor dies, creating electrical connections, and interrupting lead frame junctions during encapsulation using a moulding form with breaking means to expose terminals, thereby eliminating the need for ceramic support and simplifying the process.
This method reduces costs, simplifies the manufacturing process, and ensures stable connections without gaps or openings, enhancing thermal and electrical performance by removing the ceramic layer and allowing for efficient heat transfer to a heat sink.