Light-emitting device having cavity structure and manufacturing method therefor

Abstract

A light-emitting device comprising: a substrate; a buffer layer formed on the substrate; a first reflection part formed on the buffer layer and comprising a plurality of distributed Bragg reflector (DBR) pairs; an n-type cladding layer deposited on the top of the first reflection unit, formed from a semiconductor material doped with an n-type dopant, and providing electrons; an active layer deposited on the n-type cladding layer and generating light by recombining the provided electrons and holes; a p-type semiconductor layer deposited on the active layer and providing holes to the active layer; a second reflection part formed on the p-type semiconductor layer and comprising a plurality of DBR pairs; a first electrode electrically in contact with the buffer layer to supply power to the n-type cladding layer; a second electrode formed on the second reflection part to supply power to the p-type semiconductor layer; and a passivation layer applied to the side surface or top surface of each component of the light-emitting device.

Description

Light-emitting device having a cavity structure and method for manufacturing the same

[0001] The present embodiment relates to a light-emitting device having a cavity structure and a method for manufacturing the same.

[0002]

[0003] This patent is the result of research conducted in 2014 with funding from the government of the Republic of Korea (Ministry of Science, ICT and Future Planning) and support from the Korea Institute for Industrial Technology Evaluation and Management (Project Unique Number: 1711017525, Sub-project Number: 10041878, Project Name: Development of Core Technologies for the Electronic Information Device Industry, Project Name: Development of Process and Standard Analysis Technology for LED Optical Devices with 75% Power Conversion Efficiency), and

[0004] This is the result of a research project conducted in 2020 with funding from the government of the Republic of Korea (Ministry of Trade, Industry and Energy) and support from the Korea Institute for Industrial Technology Promotion (Project Unique Number: 1415170397, Sub-project Number: N0001886, Project Name: System Industry Technology Development Infrastructure Establishment (R&D), Project Name: Infrastructure Establishment Project for Strengthening Global Competitiveness of Optical Convergence Industry).

[0005] The content described in this section merely provides background information regarding the present embodiment and does not constitute prior art.

[0006] Light-emitting diodes (LEDs) are used as inorganic light sources in various fields, such as display devices, automotive lamps, and general lighting. Due to their advantages of long lifespan, low power consumption, and fast response speed, LEDs are rapidly replacing conventional light sources.

[0007] Light-emitting diodes (LEDs) can generally output various colors by mixing blue, green, and red light. To realize various images or colors, an LED includes multiple pixels, and each pixel is equipped with blue, green, and red subpixels. The LED determines the color of a specific pixel based on the colors of each subpixel and can realize an image through a combination of these pixels.

[0008] Conventional light-emitting diodes have typically been manufactured based on nitride semiconductors. Light-emitting diodes based on nitride semiconductors have relatively superior luminous efficiency compared to those made of other conventional materials.

[0009] However, conventional nitride semiconductor-based light-emitting diodes have the following structural problems. As the indium content in the light-generating active layer increases, the luminous efficiency of the nitride semiconductor-based light-emitting device decreases sharply. This is because nitride semiconductors have lattice constants of different sizes, and internal pressures attempting to compress or expand are generated due to these differences in lattice constants.

[0010] Due to these problems, conventional nitride semiconductor-based light-emitting diodes had the disadvantage of having relatively low luminous efficiency.

[0011] One embodiment of the present invention has the objective of providing a light-emitting device having a cavity structure comprising a nitride and an oxide semiconductor, and a method for manufacturing the same.

[0012] According to one aspect of the present invention, a light-emitting element is provided, comprising: a substrate; a buffer layer formed on the substrate; a first reflector formed on the buffer layer and composed of a plurality of DBR (Distributed Bragg Reflector) pairs; an n-type cladding layer deposited on the top of the first reflector and composed of a semiconductor material doped with an n-type dopant to provide electrons; an active layer deposited on the n-type cladding layer and recombines the provided electrons and holes to generate light; a p-type semiconductor layer deposited on the active layer and providing holes to the active layer; a second reflector formed on the p-type semiconductor layer and composed of a plurality of DBR pairs; a first electrode that is electrically in contact with the buffer layer to supply power to the n-type cladding layer; a second electrode formed on the second reflector to supply power to the p-type semiconductor layer; and a passivation layer applied to the side or top surface of each component of the light-emitting element to protect each component from the outside.

[0013] According to one aspect of the present invention, the light-emitting element further comprises a protective layer deposited on the p-type semiconductor layer to protect the p-type semiconductor layer from the external environment.

[0014] According to one aspect of the present invention, the p-type semiconductor layer is deposited immediately above the active layer and comprises a p-type cladding layer that is implemented as a semiconductor material doped with a p-type dopant and provides holes delivered to the active layer, and a p-type oxide layer deposited on the p-type cladding layer to relieve internal pressure that may occur between the active layer and the p-type cladding layer and to improve the hole delivery rate.

[0015] According to one aspect of the present invention, the p-type cladding layer is characterized by being implemented with p-type GaN, p-type InGaN, p-type AlGaN, or p-type AlInGaN, or a combination thereof.

[0016] According to one aspect of the present invention, the p-type oxide layer is characterized by being implemented as zinc oxide (ZnO) or as an oxide containing zinc (Zn) and including group 2 and group 6 elements on the periodic table.

[0017] According to one aspect of the present invention, a method for manufacturing a light-emitting device is provided, comprising: a first forming process in which a buffer layer is formed on a substrate; a first implementation process in which a first reflective portion is implemented on the buffer layer; a first deposition process in which an n-type cladding layer is deposited on the first reflective portion; a second deposition process in which an active layer is deposited on the n-type cladding layer; a third deposition process in which a p-type semiconductor layer is deposited on the active layer; a second implementation process in which a second reflective portion is implemented on the p-type semiconductor layer; an etching process in which etching is performed vertically at both ends from the second reflective portion to the n-type cladding layer to form a mesa structure; a second forming process in which a second electrode is formed on the second reflective portion; a coating process in which a passivation layer is applied to the side or upper surface of each component of the light-emitting device; and a third forming process in which a through hole is formed in the passivation layer to form a first electrode that electrically contacts the buffer layer.

[0018] According to one aspect of the present invention, a light-emitting element is provided, comprising: a substrate; a buffer layer formed on the substrate; a first reflector formed on the buffer layer and composed of a plurality of DBR (Distributed Bragg Reflector) pairs; an n-type cladding layer deposited on the top of the first reflector and composed of a semiconductor material doped with an n-type dopant to provide electrons; an active layer deposited on the n-type cladding layer and recombines the provided electrons and holes to generate light; a p-type semiconductor layer deposited on the active layer and providing holes to the active layer; a second reflector formed on the p-type semiconductor layer and composed of a plurality of DBR pairs; a metal layer formed on the uppermost surface of the second reflector; a first electrode that supplies power to the n-type cladding layer; a second electrode formed on the second reflector and supplying power to the p-type semiconductor layer; and a passivation layer applied to the side or top surface of each component of the light-emitting element to protect each component from the outside.

[0019] According to one aspect of the present invention, the metal layer is characterized by being implemented with a metal having a reflectance greater than or equal to a preset reference value.

[0020] According to one aspect of the present invention, the metal layer is characterized by being formed by first forming a metal layer of aluminum or silver, and then sequentially depositing other metal layers such as nickel, titanium, chromium, and gold.

[0021] According to one aspect of the present invention, the metal layer is characterized by reducing the thickness of the second reflective portion and facilitating the formation of the second electrode.

[0022] According to one aspect of the present invention, a method for manufacturing a light-emitting element comprises: a first forming process in which a buffer layer is formed on a substrate; a first implementation process in which a first reflective portion is implemented on the buffer layer; a first deposition process in which an n-type cladding layer is deposited on the first reflective portion; a second deposition process in which an active layer is deposited on the n-type cladding layer; a third deposition process in which a p-type semiconductor layer is deposited on the active layer; a second implementation process in which a second reflective portion is implemented on the p-type semiconductor layer; a third implementation process in which a metal layer is implemented on the second reflective portion; an etching process in which etching is performed vertically at both ends from the second reflective portion to the n-type cladding layer to form a mesa structure; a second forming process in which a second electrode is formed on the second reflective portion; a coating process in which a passivation layer is applied to the side or upper surface of each component of the light-emitting element; and a third forming process in which a through hole is formed in the passivation layer to form a first electrode that electrically contacts the buffer layer.

[0023] According to one aspect of the present invention, a light-emitting element is provided, comprising: a substrate; a buffer layer formed on the substrate; a first reflector formed on the buffer layer and composed of a plurality of DBR (Distributed Bragg Reflector) pairs; an n-type cladding layer deposited on the top of the first reflector and composed of a semiconductor material doped with an n-type dopant to provide electrons; an active layer deposited on the n-type cladding layer and recombines the provided electrons and holes to generate light; a p-type semiconductor layer deposited on the active layer and providing holes to the active layer; a second reflector formed on the p-type semiconductor layer and composed of a plurality of DBR pairs; a first electrode formed on the opposite side of the substrate where the buffer layer is formed and supplying power to the n-type cladding layer; a second electrode formed on the second reflector and supplying power to the p-type semiconductor layer; and a passivation layer applied to the side or top surface of each component of the light-emitting element to protect each component from the outside.

[0024] According to one aspect of the present invention, the substrate is characterized by being implemented with GaN, Al2O3, Si, SiC, ScAlMgO, LiAlO2, MgAl2O4, or MoS2.

[0025] According to one aspect of the present invention, the first reflective portion is characterized by being formed by alternately combining an n-type GaN or n-type InGaN thin film layer with a relatively high refractive index and an n-type AlGaN or InAlGaN thin film layer with a relatively low refractive index.

[0026] According to one aspect of the present invention, each thin film layer is characterized by being implemented with a predetermined thickness.

[0027] According to one aspect of the present invention, a method for manufacturing a light-emitting device is provided, comprising: a first forming process in which a buffer layer is formed on a substrate; a first implementation process in which a first reflective portion is implemented on the buffer layer; a first deposition process in which an n-type cladding layer is deposited on the first reflective portion; a second deposition process in which an active layer is deposited on the n-type cladding layer; a third deposition process in which a p-type semiconductor layer is deposited on the active layer; a second implementation process in which a second reflective portion is implemented on the p-type semiconductor layer; an etching process in which etching is performed vertically at both ends from the second reflective portion to the n-type cladding layer to form a mesa structure; a second forming process in which a second electrode is formed on the second reflective portion; a coating process in which a passivation layer is applied to the side or top surface of each component of the light-emitting device; and a third forming process in which a first electrode is formed on the opposite side of the surface on which the buffer layer is formed on the substrate.

[0028] As described above, according to one aspect of the present invention, by including nitride and oxide semiconductors and having a cavity structure, there is an advantage of being able to output light with high luminous efficiency and improved directivity.

[0029] FIG. 1 is a diagram illustrating the configuration of a light-emitting element according to a first embodiment of the present invention.

[0030] FIG. 2 is a diagram illustrating the configuration of a p-type semiconductor layer according to one embodiment of the present invention.

[0031] FIG. 3 is a graph illustrating the reflection characteristics of a first reflective part according to an embodiment of the present invention.

[0032] FIG. 4 is a graph illustrating the reflection characteristics of a second reflector according to an embodiment of the present invention.

[0033] FIG. 5 is a diagram illustrating crystal lattice constants according to the components of the semiconductor layer and the active layer according to one embodiment of the present invention.

[0034] FIG. 6 is a diagram illustrating the configuration of a light-emitting element according to a second embodiment of the present invention.

[0035] FIG. 7 is a diagram illustrating the configuration of a light-emitting element according to a third embodiment of the present invention.

[0036] FIGS. 8 to 18 are drawings illustrating the manufacturing process of a light-emitting element according to one embodiment of the present invention.

[0037] The present invention is susceptible to various modifications and may have various embodiments, and specific embodiments are illustrated in the drawings and described in detail. However, this is not intended to limit the invention to specific embodiments, and it should be understood that the invention includes all modifications, equivalents, and substitutions that fall within the spirit and scope of the invention. Similar reference numerals have been used for similar components in the description of each drawing.

[0038] Terms such as first, second, A, B, etc., may be used to describe various components, but said components should not be limited by said terms. These terms are used solely for the purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, the first component may be named the second component, and similarly, the second component may be named the first component. The term "and / or" includes a combination of a plurality of related described items or any of a plurality of related described items.

[0039] When it is stated that one component is "connected" or "connected" to another component, it should be understood that while it may be directly connected or connected to that other component, there may also be other components in between. On the other hand, when it is stated that one component is "directly connected" or "directly connected" to another component, it should be understood that there are no other components in between.

[0040] The terms used in this application are used merely to describe specific embodiments and are not intended to limit the invention. The singular expression includes the plural expression unless the context clearly indicates otherwise. In this application, terms such as "comprising" or "having" should be understood as not precluding the existence or addition of the features, numbers, steps, actions, components, parts, or combinations thereof described in the specification.

[0041] Unless otherwise defined, all terms used herein, including technical or scientific terms, have the same meaning as generally understood by those skilled in the art to which this invention pertains.

[0042] Terms such as those defined in commonly used dictionaries should be interpreted as having meanings consistent with their meanings in the context of the relevant technology, and should not be interpreted in an ideal or overly formal sense unless explicitly defined in this application.

[0043] In addition, each component, process, procedure, or method included in each embodiment of the present invention may be shared within a scope that is not technically contradictory to one another.

[0044] FIG. 1 is a diagram illustrating the configuration of a light-emitting element according to a first embodiment of the present invention.

[0045] Referring to FIG. 1, a light-emitting element (100) according to a first embodiment of the present invention comprises a substrate (110), a buffer layer (120), an n-type cladding layer (130), an active layer (140), a p-type semiconductor layer (150), a first reflective portion (160), a second reflective portion (170), a protective layer (175), a first electrode (180), a second electrode (185), and a passivation layer (190).

[0046] The light-emitting element (100) is a light-emitting element in the form of an LED or LD having a cavity structure, and unlike conventional light-emitting elements, it can output light with high luminous efficiency and improved directionality. The light-emitting element can improve luminous efficiency by reducing internal stress as it contains a zinc oxide (ZnO)-based oxide semiconductor inside. In addition, the light-emitting element (100) includes a cavity structure to output light with improved directionality, but unlike VCSELs, it may not output a lasing beam.

[0047] The substrate (110) provides a space in which the remaining components within the light-emitting element (100) can be implemented. The substrate (110) provides a space in which the remaining components within the light-emitting element (100) can be formed on one or both sides thereof. The substrate can be implemented with materials such as GaN, Al2O3, Si, SiC, ScAlMgO, LiAlO2, MgAl2O4, or MoS2 that allow for epitaxial deposition, and can be implemented with materials such as GaN doped with an n-type dopant.

[0048] A buffer layer (120) is formed on a substrate (110) and allows a first reflective portion (160) to grow on its upper side.

[0049] The n-type cladding layer (130) is deposited vertically on the upper part of the buffer layer (120) (more specifically, on the upper part of the first reflective section) and is implemented with a semiconductor material doped with an n-type dopant to provide electrons to the active layer (140). The n-type cladding layer (130) may be deposited on the first reflective section (160), which will be described later, by an epitaxy single crystal deposition method. The n-type cladding layer (120) may be implemented with n-type gallium nitride (n-GaN), but is not necessarily limited thereto and may be replaced with n-type InGaN, n-type AlGaN, or n-type AlInGaN, or a combination thereof.

[0050] The active layer (140) is deposited on the n-type cladding layer (130), and electrons provided by the n-type cladding layer (130) and holes provided by the p-type semiconductor layer (150) meet and recombine in the active layer (140) to generate light. The active layer (140) includes a well layer (not shown) with a relatively small energy bandgap and a barrier layer (not shown) with a relatively large energy bandgap. The active layer (130) can be implemented as an InGaN layer with different In concentrations, an InGaN / GaN layer, a GaN / AlGaN layer, or an AlGaN layer with different Al concentrations, or as a combination thereof. The active layer (140) includes two or more barrier layers and one or more well layers.

[0051] A p-type semiconductor layer (150) is deposited on an active layer (140) and provides holes to the active layer (140). As the p-type semiconductor layer (150) is implemented in the structure shown in FIG. 2, internal pressure (Strain) can be minimized so that the light-emitting device (100) can have high luminous efficiency.

[0052] FIG. 2 is a diagram illustrating the configuration of a p-type semiconductor layer according to one embodiment of the present invention, and FIG. 5 is a diagram illustrating crystal lattice constants according to the components of the semiconductor layer and the active layer according to one embodiment of the present invention.

[0053] Referring to FIG. 2, a p-type semiconductor layer (150) according to one embodiment of the present invention may include a p-type cladding layer (210) and a p-type oxide layer (220).

[0054] A p-type cladding layer (210) is deposited directly on top of the active layer (140). The p-type cladding layer (210) is implemented as a semiconductor material doped with a p-type dopant and provides holes to be delivered to the active layer (140). The p-type cladding layer (210) can be deposited on the active layer (140) by an epitaxy single crystal deposition method. The p-type cladding layer (210) can be implemented as p-type gallium nitride (p-GaN) as in the past, but is not necessarily limited thereto and can be replaced with p-type InGaN, p-type AlGaN, or p-type AlInGaN, or a combination thereof.

[0055] A p-type oxide layer (220) is deposited on a p-type cladding layer (210) to relieve internal pressure that may occur between the active layer (140) and the p-type cladding layer (210) and to improve the transfer rate of holes.

[0056] The p-type oxide layer (220) is implemented with a zinc oxide (ZnO)-based compound and can be deposited on the p-type cladding layer (210) by epitaxial single crystal deposition, chemical vapor deposition (CVD), molecular beam epitaxy (MBE), pulsed laser deposition (PLD), or a hybrid form of each deposition method. The p-type oxide layer (220) can be deposited on the p-type cladding layer (210) with a thickness between 10 and 1000 nm.

[0057] The p-type oxide layer (220) may be implemented with zinc oxide (ZnO) having a hexagonal crystal structure, or with an oxide containing zinc (Zn) and including Group 2 and Group 6 elements on the periodic table. For example, the internal pressure relief layer (220) may be implemented with ZnO, BeZnO, MgZnO, BeMgZnO, ZnSO, ZnSeO, ZnSSeO, ZnCdO, or ZnCdSeO. The p-type oxide layer (220) implemented in this way has a larger crystal lattice constant and a higher hole concentration compared to the p-type cladding layer (210), so it can reduce the internal pressure existing between the active layer (140) and the p-type cladding layer (210). This can be seen in FIG. 5.

[0058] Referring to FIG. 5, it can be seen that AlN, GaN, and InN all have different crystal lattice constants. Due to these differences in crystal lattice constants, internal pressure is generated between the active layer (140) and the p-type cladding layer (210). The p-type oxide layer (220) has a larger crystal lattice constant and a higher hole concentration compared to the p-type cladding layer (210), thereby relieving the internal pressure existing between the active layer (140) and the p-type cladding layer (210).

[0059] When the internal pressure between the active layer (140) and the p-type cladding layer (210) is reduced, it can be confirmed that the light-emitting element (100) has a relatively small flat band voltage and piezo voltage, and as a result, has a relatively wide depletion layer width. Accordingly, the injection of holes into the active layer (140) becomes easier, and the internal quantum efficiency can also be significantly increased.

[0060] The p-type oxide layer (220) can be doped with p-type impurities at a preset concentration or without impurity doping to inject more holes into the active layer (140), thereby creating Zn vacancies. The p-type oxide layer (220) can be doped with p-type impurities within a preset concentration range. The impurities being doped may be p-type acceptor impurities, for example, one or more of H, Li, Na, K, Rb, Cs, Fr, Cu, Ag, N, P, As, Sb, and Bi. These p-type acceptor impurities may be doped into a zinc oxide-based compound to form the p-type oxide layer (220), and the p-type acceptor impurities may be doped at a preset concentration. The preset concentration is 1*10 17 Up to 1*10 20 atomic / cm -3 It can be, and more preferably 5*10 18 Up to 5*10 19 atomic / cm -3 It could be.

[0061] Meanwhile, the p-type oxide layer (220) can generate Zn vacancies without doping with impurities. After an undoped zinc oxide-based compound is deposited on the surface of the p-type cladding layer, it can be heat-treated in an oxygen-containing gas atmosphere to form the p-type oxide layer (220). The heat treatment can be performed in the said atmosphere at a temperature of 400 to 700°C, more preferably at a temperature of 450 to 550°C for 1 to 600 minutes, more preferably at 10 to 60 minutes. When the zinc oxide-based compound is heat-treated in the said atmosphere, a phenomenon occurs in which the content of metal atoms constituting the zinc oxide-based compound, such as zinc, becomes insufficient. The p-type oxide layer (220) undergoes the said process, thereby minimizing internal pressure that may occur between the active layer (140) and the p-type cladding layer (210) and facilitating the injection of holes into the active layer (140).

[0062] Referring again to FIG. 1, the first reflector (160) is implemented on the buffer layer (120) and may be composed of a semiconductor material doped with an n-type dopant. The first reflector (160) is composed of a plurality of DBR (Distributed Bragg Reflector, or 'Distributed Bragg Reflector') pairs. The first reflector (160) may have a superlattice formed by alternating a thin film layer of n-type GaN or n-type InGaN with a relatively high refractive index and a thin film layer of n-type AlGaN or InAlGaN with a relatively low refractive index.

[0063] Each thin film layer intersected within the first reflective section (160) has a preset thickness. Here, the preset thickness is determined according to the wavelength of the light to be reflected (light output from the active layer), and may be a value obtained by dividing the wavelength (λ) of the light by four times the refractive index (n) of the thin film layer (λ / 4n) or an odd multiple thereof. As each thin film layer within the first reflective section (160) is implemented with a preset thickness, light can be reflected with an optimal number of layers.

[0064] The second reflector (170) is implemented on a p-type semiconductor layer (150), more specifically, a p-type oxide layer (220), and may be composed of a semiconductor material doped with a p-type dopant. The second reflector (170) is also composed of a plurality of DBR pairs. The second reflector (170) may have a superlattice formed by combining the first thin film layer and the second thin film layer so as to have low electrical resistance and not absorb light to be reflected (light output from the active layer). The first thin film layer is implemented such that its energy band has an energy band greater than or equal to a preset reference value and its refractive index in the wavelength band of light to be reflected (light output from the active layer) has a refractive index greater than or equal to a preset reference value. The second thin film layer is implemented such that its refractive index in the wavelength band of light to be reflected (light output from the active layer) has a refractive index less than or equal to a preset reference value. Here, the first thin film layer comprises zinc (Zn) or magnesium (Mg) and is composed of elements of Group 2 and Group 6 on the periodic table, and can be implemented as ZnSe, ZnS, ZnTe, MgS, ZnSeS, ZnSeTe, ZnSTe, ZnMgSe, ZnMgS, ZnMgSeTe, ZnMgSTe, or ZnMgSeS. The second thin film layer can be implemented as ITO, IGZO, ZnO, MgO, ZnMgO, or Ga2O3.

[0065] Each thin film layer in the second reflective section (170) can also be implemented with a preset thickness, just like each thin film layer in the first reflective section (160).

[0066] The first reflective part (160) and the second reflective part (170) have reflective characteristics as shown in FIGS. 3 and 4.

[0067] FIG. 3 is a graph illustrating the reflection characteristics of a first reflector according to an embodiment of the present invention, and FIG. 4 is a graph illustrating the reflection characteristics of a second reflector according to an embodiment of the present invention.

[0068] Referring to FIG. 3, the first reflective portion (160) has a reflectivity of 50 to 90%, and more preferably has a reflectivity of 60 to 80%.

[0069] On the other hand, referring to FIG. 4, the second reflective part (170) has a reflectivity of 90% or more, more preferably 95% or more.

[0070] Referring again to FIG. 1, as such, a first reflective portion (160) and a second reflective portion (170) are each included, and as the components of the thin film layers within both reflective portions are implemented differently, one being a nitride-based component and the other being a zinc or magnesium-based component, the n-type cladding layer (130), the active layer (140), and the p-type semiconductor layer (150) form a cavity structure. At this time, the total thickness of each layer (130 to 150) forming the cavity structure is determined according to the wavelength of light output from the active layer (140), and may be a value (λ / 2n) obtained by dividing the wavelength (λ) of the light mentioned above by twice the refractive index (n) of the material forming the cavity structure, or an integer multiple thereof. The aforementioned first reflective part (160) and second reflective part (170) are each included, and as the cavity structure has the aforementioned thickness, the light output from the light-emitting element (100) can have a linearity in which only linear light is resonantly amplified and not dispersed.

[0071] A protective layer (175) is deposited on a p-type semiconductor layer (150) to protect the p-type semiconductor layer (150) from the external environment and to allow a second reflective portion (170) to grow on the p-type semiconductor layer (150) together with a p-type oxide layer (220). The protective layer (175) may be implemented as an oxide comprising ITO, a zinc oxide-based compound, or zinc (Zn), and including Group 2 and Group 6 elements on the periodic table. The protective layer (175) is implemented on the p-type semiconductor layer (150) with the aforementioned components, but is implemented as a transparent thin film layer.

[0072] A protective layer (175) is deposited on top of a p-type semiconductor layer (150), more specifically a p-type oxide layer (220), to protect the p-type oxide layer (220) from various chemicals used in the manufacturing process of the light-emitting device (100), and to inject holes uniformly and efficiently throughout the p-type semiconductor layer (150) when the device is operated.

[0073] The protective layer (175) allows a second reflective portion (170) with a different composition to grow on the p-type semiconductor layer (150) together with the p-type oxide layer (220). The p-type semiconductor layer (150), more specifically the p-type cladding layer (210), is implemented with a gallium nitride-based compound as described above, but the second reflective portion (170) is implemented with a zinc oxide-based compound, etc. Since the two have different compositions, it may be difficult to grow the second reflective portion (170). To prevent this problem, the protective layer (175) is positioned between the two so that a second reflective portion (170) with a different composition can grow on the p-type semiconductor layer (150).

[0074] Additionally, the protective layer (175) prevents the first reflective portion (160) or each cladding layer (130, 210), which is implemented with a gallium nitride-based compound, from being exposed to an oxygen atmosphere. As the protective layer (175) is implemented with oxide or ITO as described above, no change in composition or properties occurs even if it is exposed to an oxygen atmosphere. On the other hand, the aforementioned components implemented with a gallium nitride-based compound will undergo a change in composition or properties if exposed to an oxygen atmosphere. In the deposition or growth of the p-type oxide layer (220) or the second reflective portion (170), exposure to an oxygen atmosphere may occur, and the protective layer (175) is deposited at the aforementioned location to protect the first reflective portion (160) or each cladding layer (130, 210), which is implemented with a gallium nitride-based compound, from oxygen.

[0075] The first electrode (180) electrically contacts the surface of the etched and exposed buffer layer (120) to supply power to the n-type cladding layer (130).

[0076] The second electrode (185) is formed on the second reflective portion (170) to supply power to the p-type semiconductor layer (150). As described above, the second reflective portion (170) has a structure in which the first thin film layer and the second thin film layer are alternately combined. At this time, since the first thin film layer and the second thin film layer have excellent electrical conductivity (low electrical resistance), the second reflective portion (170) can directly transmit power supplied from the second electrode (185) to the p-type semiconductor layer (150) without the need for a separate configuration or the implementation of an additional structure. Accordingly, the second electrode (185) is formed directly on the second reflective portion (170) to supply power to the p-type semiconductor layer (150).

[0077] The passivation layer (190) is applied to each component within the light-emitting element (100), more specifically to the side of the n-type cladding layer (130) to the second electrode (185) and to the upper surface of the buffer layer (120) and the second electrode (185), thereby protecting each component (120 to 185) from the outside. Meanwhile, the passivation layer (190) includes a through hole so that the first electrode (180) can electrically contact the surface of the buffer layer (120) to transmit power.

[0078] The light-emitting element (100) includes nitride and oxide semiconductors and has a cavity structure, thereby having high luminous efficiency and being able to output light with improved linearity.

[0079] FIG. 6 is a diagram illustrating the configuration of a light-emitting element according to a second embodiment of the present invention.

[0080] Referring to FIG. 6, the light-emitting element (600) according to the second embodiment of the present invention may further include a metal layer (610).

[0081] The metal layer (610) is implemented with a metal having excellent reflectivity (reflectivity greater than a preset reference value) on the uppermost surface of the second reflective part (170). For example, the metal layer (610) may be implemented with aluminum or silver, or may be implemented by forming a layer of aluminum or silver and then additionally depositing another layer of nickel (Ni), titanium (Ti), chromium (Cr), or gold (Au). Since the metal layer (610) is implemented with a metal having excellent reflectivity on the uppermost surface of the second reflective part (170), it can simultaneously perform the role of the second reflective part (170), thereby allowing the thickness of the second reflective part (170) to be reduced relatively. In addition, the metal layer (610) can facilitate the formation of the second electrode (185).

[0082] FIG. 7 is a diagram illustrating the configuration of a light-emitting element according to a third embodiment of the present invention.

[0083] Referring to FIG. 7, the light-emitting element (700) according to the third embodiment of the present invention includes the same configuration as the light-emitting element (100), but has a different shape.

[0084] Unlike the first electrode (180) in the light-emitting element (100), the first electrode (180) in the light-emitting element (700) can be implemented on the opposite side of the side where the buffer layer (120) of the substrate (110) is formed. The first electrode (180) supplies power to the n-type cladding layer (130) via the substrate (110) on the opposite side of the substrate (110).

[0085] Meanwhile, since the first electrode (180) is implemented on the opposite side of the substrate (110), the passivation layer (190) may not include a through hole, and prevents the side or top surface of each component within the light-emitting element (100), more specifically the n-type cladding layer (130) to the second reflective part (170), from being exposed to the outside.

[0086] FIGS. 8 to 18 are drawings illustrating the manufacturing process of a light-emitting element according to one embodiment of the present invention.

[0087] Referring to FIG. 8, a buffer layer (120) is formed on a substrate (110).

[0088] Referring to FIG. 9, a first reflection part (160) is implemented on the buffer layer (120).

[0089] Referring to FIG. 10, an n-type cladding layer (130) is deposited on the first reflective portion (160).

[0090] Referring to FIG. 11, an active layer (140) is deposited on an n-type cladding layer (130).

[0091] Referring to FIG. 12, a p-type semiconductor layer (150) is deposited on an active layer (140).

[0092] Referring to FIG. 13, a protective layer (175) is deposited on a p-type semiconductor layer (150).

[0093] Referring to FIG. 14a, a second reflective portion (170) is implemented on the protective layer (175).

[0094] Meanwhile, in the case of a light-emitting element (600), a metal layer (610) is additionally implemented on the second reflective part (170) as shown in FIG. 14b.

[0095] Referring to FIG. 15, etching is performed vertically at both ends from the second reflective layer (170) or metal layer (610) to the n-type cladding layer (130). Accordingly, a mesa structure can be formed on the n-type cladding layer (130) to the second reflective layer (170) or metal layer (610).

[0096] Referring to FIG. 16, a second electrode (185) is formed on the second reflective part (170) or the metal layer (610).

[0097] Referring to FIG. 17, a passivation layer (190) is applied to the side of the n-type cladding layer (130) to the second electrode (185) and to the upper surface of the buffer layer (120) and the second electrode (185).

[0098] Referring to FIG. 18, a through hole is formed in the passivation layer (190), and the first electrode (180) is formed to make electrical contact with the surface of the buffer layer (120).

[0099] Meanwhile, in the case of the light-emitting element (700), instead of a through hole being formed in the passivation layer (190), a first electrode (180) is implemented on the opposite side of the substrate (110).

[0100] The above description is merely an illustrative explanation of the technical concept of the present embodiment, and a person skilled in the art to which the present embodiment belongs would be able to make various modifications and variations within the scope of the essential characteristics of the present embodiment. Accordingly, the present embodiments are intended to explain, not limit, the technical concept of the present embodiment, and the scope of the technical concept of the present embodiment is not limited by these embodiments. The scope of protection of the present embodiment shall be interpreted by the claims below, and all technical concepts within an equivalent scope shall be interpreted as being included within the scope of rights of the present embodiment.

[0101]

[0102] CROSS-REFERENCE TO RELATED APPLICATION

[0103] If this patent application claims priority under Section 119(a) of the U.S. Patent Act (35 USC § 119(a)) to Korean Patent Application No. 10-2024-0178465 filed on December 4, 2024, all of the contents thereof shall be incorporated into this patent application by reference. Furthermore, if this patent application claims priority in countries other than the United States for the same reasons as above, all of the contents thereof shall be incorporated into this patent application by reference.

Claims

1. In a light-emitting element, Substrate; A buffer layer formed on the above substrate; A first reflection part implemented on the above buffer layer and composed of a plurality of DBR (Distributed Bragg Reflector) pairs; An n-type cladding layer deposited on the top of the first reflective portion and implemented as a semiconductor material doped with an n-type dopant to provide electrons; An active layer deposited on the above n-type cladding layer, which generates light by recombining provided electrons and holes; A p-type semiconductor layer deposited on the active layer and providing holes to the active layer; A second reflection portion implemented on the above p-type semiconductor layer and composed of a plurality of DBR pairs; A first electrode that electrically contacts the buffer layer and supplies power to the n-type cladding layer; A second electrode formed on the second reflective portion above and supplying power to the p-type semiconductor layer; and A passivation layer applied to the side or top surface of each component of the above-mentioned light-emitting element to protect each component from the outside. A light-emitting element characterized by including 2. In Paragraph 1, A light-emitting device characterized by further including a protective layer deposited on the p-type semiconductor layer to protect the p-type semiconductor layer from an external environment.

3. In Paragraph 1, The above p-type semiconductor layer is, A p-type cladding layer deposited immediately above the active layer and implemented as a semiconductor material doped with a p-type dopant to provide holes delivered to the active layer; and A light-emitting device characterized by including a p-type oxide layer deposited on the p-type cladding layer, which relieves internal pressure that may occur between the active layer and the p-type cladding layer and improves the hole transfer rate.

4. In Paragraph 3, The above p-type cladding layer is, A light-emitting device characterized by being implemented with p-type GaN, p-type InGaN, p-type AlGaN, or p-type AlInGaN, or a combination thereof.

5. In Paragraph 3, The above p-type oxide layer is, A light-emitting device characterized by being implemented with zinc oxide (ZnO) or with an oxide containing zinc (Zn) and including Group 2 and Group 6 elements on the periodic table.

6. In a light-emitting element, Substrate; A buffer layer formed on the above substrate; A first reflection part implemented on the above buffer layer and composed of a plurality of DBR (Distributed Bragg Reflector) pairs; An n-type cladding layer deposited on the top of the first reflective portion and implemented as a semiconductor material doped with an n-type dopant to provide electrons; An active layer deposited on the above n-type cladding layer, which generates light by recombining provided electrons and holes; A p-type semiconductor layer deposited on the active layer and providing holes to the active layer; A second reflection portion implemented on the above p-type semiconductor layer and composed of a plurality of DBR pairs; A metal layer implemented on the uppermost surface of the second reflective part; A first electrode that supplies power to the above n-type cladding layer; A second electrode formed on the second reflective portion above and supplying power to the p-type semiconductor layer; and A passivation layer applied to the side or top surface of each component of the above-mentioned light-emitting element to protect each component from the outside. A light-emitting element characterized by including 7. In Paragraph 6, The above metal layer is, A light-emitting element characterized by being implemented with a metal having a reflectivity greater than or equal to a preset standard value.

8. In Paragraph 7, The above metal layer is, A light-emitting element characterized by being implemented in aluminum or silver.

9. In Paragraph 6, The above metal layer is, A light-emitting element characterized by reducing the thickness of the second reflective portion and facilitating the formation of the second electrode.

10. In a light-emitting element, Substrate; A buffer layer formed on the above substrate; A first reflection part implemented on the above buffer layer and composed of a plurality of DBR (Distributed Bragg Reflector) pairs; An n-type cladding layer deposited on the top of the first reflective portion and implemented as a semiconductor material doped with an n-type dopant to provide electrons; An active layer deposited on the above n-type cladding layer, which generates light by recombining provided electrons and holes; A p-type semiconductor layer deposited on the active layer and providing holes to the active layer; A second reflection portion implemented on the above p-type semiconductor layer and composed of a plurality of DBR pairs; A first electrode implemented on the opposite side of the side on which the buffer layer of the substrate is formed, and which supplies power to the n-type cladding layer; A second electrode formed on the second reflective portion above and supplying power to the p-type semiconductor layer; and A passivation layer applied to the side or top surface of each component of the above-mentioned light-emitting element to protect each component from the outside. A light-emitting element characterized by including 11. In Paragraph 1, Paragraph 6, or Paragraph 10, The above substrate is, A light-emitting device characterized by being implemented with GaN, Al2O3, Si, SiC, ScAlMgO, LiAlO2, MgAl2O4, or MoS2.

12. In Paragraph 1, Paragraph 6, or Paragraph 10, The above first reflector is, A light-emitting device characterized by being formed by alternatingly combining an n-type GaN or n-type InGaN thin film layer with a relatively high refractive index and an n-type AlGaN or InAlGaN thin film layer with a relatively low refractive index.

13. In Paragraph 12, Each thin film layer is, A light-emitting element characterized by being implemented with a preset thickness.

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