LED chip and light-emitting device

Abstract

The present application relates to the technical field of LEDs, and provides an LED chip and a light-emitting device. The structural parameters of the LED chip comprise the distance between the bottom of an N electrode and a sidewall of a Mesa step structure, the height of the Mesa step structure, the height of the N electrode, and the sidewall angle of the side of the N electrode facing the Mesa step structure. Compared with the prior art, the technical solution of the present application does not involve additional process steps. On the basis of the structure of the LED chip, optimization of merely at least one of the structural parameters of the LED chip is required to reduce the number of light reflections between the N electrode and the Mesa step structure, reduce light loss caused by the N electrode, and achieve the purpose of simple implementation solution and improvement of luminous efficiency of the LED chip.

Description

An LED chip and light-emitting device

[0001] This application claims priority to Chinese Patent Application No. 202411818266.7, entitled "An LED Chip and Light-Emitting Device", filed on December 11, 2024, and Chinese Patent Application No. 202423053522.6, entitled "An LED Chip and Light-Emitting Device", the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of LED technology, and in particular to an LED chip and a light-emitting device. Background Technology

[0003] LEDs (light-emitting diodes) are widely used in lighting fixtures worldwide. They offer advantages such as small size, high brightness, low power consumption, low heat generation, long lifespan, and environmental friendliness, and come in a wide variety of colors, making them popular with consumers. Meanwhile, LED chips play an indispensable role as backlights in electronic products requiring displays, such as mobile phones and televisions. As the size of electronic products continues to shrink, there is a growing demand for significantly smaller LED chips. Therefore, major LED chip manufacturers worldwide are constantly dedicated to developing high-efficiency chip structures.

[0004] However, the light energy generated by carrier recombination in LED chips is often lost due to multiple reflections and absorptions within the chip, leading to a decrease in the final luminous efficiency. Previous technologies have addressed improving luminous efficiency through methods such as surface roughening, increasing the reflectivity of the reflective layer, and reducing interfacial total internal reflection. While these methods can effectively improve LED chip luminous efficiency, their implementation is often relatively complex. For example, surface roughening involves micro-nano etching processes; increasing the reflectivity of the reflective layer may involve the deposition and passivation of reflective metals such as Ag and Al; and reducing interfacial total internal reflection often requires the deposition of high-refractive-index inorganic passivation layers such as SiN.

[0005] Therefore, how to optimize the structure of LED chips to provide a technology with a simple implementation plan that can improve the luminous efficiency of LED chips is a technical problem that urgently needs to be solved by those skilled in the art. Summary of the Invention

[0006] In view of the above problems, this application provides an LED chip and a light-emitting device, which achieves the purpose of simple implementation and improved luminous efficiency of LED chips. The specific solution is as follows:

[0007] A first aspect of this application provides an LED chip, the LED chip comprising:

[0008] Substrate;

[0009] An epitaxial wafer located on one side of the substrate, the epitaxial wafer comprising an N-type semiconductor layer, a multiple quantum well layer and a P-type semiconductor layer sequentially stacked on the substrate;

[0010] The epitaxial wafer has grooves that expose a portion of the surface of the N-type semiconductor layer to form a Mesa step structure on the epitaxial wafer;

[0011] The N electrode is located within the groove;

[0012] The structural parameters of the LED chip include the distance between the bottom of the N electrode and the sidewall of the Mesa step structure, the height of the Mesa step structure, the height of the N electrode, and the sidewall angle of the N electrode facing the Mesa step structure.

[0013] At least one of the structural parameters of the LED chip is optimized to reduce the number of light reflections between the N electrode and the Mesa step structure.

[0014] Preferably, in the above-mentioned LED chip, at least one of the structural parameters of the LED chip is optimized based on the performance parameters of the LED chip.

[0015] Preferably, in the above-mentioned LED chip, the performance parameter of the LED chip is current density;

[0016] When the current density is less than 0.1 mA / mil 2 At that time, the distance between the bottom of the N electrode and the sidewall of the Mesa stepped structure ranges from 9 μm to 15 μm.

[0017] Preferably, in the above-mentioned LED chip, the performance parameter of the LED chip is current density;

[0018] When the current density is greater than or equal to 0.1 mA / mil 2 And less than or equal to 0.2 mA / mil 2 At that time, the distance between the bottom of the N electrode and the sidewall of the Mesa stepped structure ranges from 6μm to 12μm.

[0019] Preferably, in the above-mentioned LED chip, the performance parameter of the LED chip is current density;

[0020] When the current density is greater than 0.2 mA / mil 2At that time, the distance between the bottom of the N electrode and the sidewall of the Mesa stepped structure ranges from 3μm to 9μm.

[0021] Preferably, in the above-mentioned LED chip, the performance parameter of the LED chip is current density;

[0022] When the current density is less than 0.2 mA / mil 2 At that time, the height of the N electrode ranged from 16,000 angstroms to 20,000 angstroms.

[0023] Preferably, in the above-mentioned LED chip, the performance parameter of the LED chip is current density;

[0024] When the current density is less than 0.2 mA / mil 2 At that time, the sidewall angle of the N electrode facing the Mesa stepped structure is in the range of 50°-70°.

[0025] Preferably, in the above-mentioned LED chip, the performance parameter of the LED chip is current density;

[0026] When the current density is greater than or equal to 0.2 mA / mil 2 At that time, the height of the N electrode ranged from 25,000 angstroms to 30,000 angstroms.

[0027] Preferably, in the above-mentioned LED chip, the performance parameter of the LED chip is current density;

[0028] When the current density is greater than or equal to 0.2 mA / mil 2 At that time, the sidewall angle of the N electrode facing the Mesa stepped structure is in the range of 70°-90°.

[0029] Preferably, in the above-mentioned LED chip, the height range of the Mesa step structure is 11,000 angstroms to 13,000 angstroms.

[0030] A second aspect of this application provides a light-emitting device, the light-emitting device comprising the LED chip described in any of the preceding claims.

[0031] By employing the above technical solution, this application provides an LED chip and a light-emitting device. The structural parameters of the LED chip include the distance between the bottom of the N electrode and the sidewall of the Mesa step structure, the height of the Mesa step structure, the height of the N electrode, and the sidewall angle of the N electrode facing the Mesa step structure. Compared with the prior art, the technical solution of this application does not involve additional process steps. Based on the structure of the LED chip, it is only necessary to optimize at least one of the structural parameters of the LED chip to reduce the number of light reflections between the N electrode and the Mesa step structure, reduce the light loss of the N electrode, and achieve the goal of simple implementation and improved luminous efficiency of the LED chip. Attached Figure Description

[0032] The above and other features, advantages, and aspects of the embodiments of this disclosure will become more apparent from the accompanying drawings and the following detailed description. Throughout the drawings, the same or similar reference numerals denote the same or similar elements. It should be understood that the drawings are schematic, and the originals and elements are not necessarily drawn to scale.

[0033] Figure 1 is a schematic diagram of the structure of an LED chip provided in an embodiment of this application;

[0034] Figure 2 is a schematic diagram of another LED chip provided in an embodiment of this application;

[0035] Figure 3 is a flowchart illustrating a method for fabricating an LED chip according to an embodiment of this application;

[0036] Figures 4-8 are schematic diagrams of some structures corresponding to the preparation method shown in Figure 3. Detailed Implementation

[0037] The embodiments of this application are described below with reference to the accompanying drawings. The terminology used in the implementation section of this application is only for explaining specific embodiments and is not intended to limit the application. Those skilled in the art will recognize that, with technological advancements and the emergence of new scenarios, the technical solutions provided in the embodiments of this application are also applicable to similar technical problems.

[0038] It should be noted that the directional terms appearing in this application are based on the relative positional relationships shown in the attached drawings and should not be taken as absolute limitations on this application.

[0039] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0040] Referring to Figure 1, which is a schematic diagram of the structure of an LED chip provided in an embodiment of this application, the LED chip provided in this embodiment includes a substrate 11.

[0041] An epitaxial wafer located on one side of the substrate 11, the epitaxial wafer comprising an N-type semiconductor layer 12, a multiple quantum well layer 13 and a P-type semiconductor layer 14 sequentially stacked on the substrate 11.

[0042] The epitaxial wafer has a groove 15 that exposes a portion of the surface of the N-type semiconductor layer 12 to form a Mesa step structure on the epitaxial wafer.

[0043] The N electrode 16 is located within the groove 15.

[0044] The structural parameters of the LED chip include the distance L between the bottom of the N electrode 16 and the sidewall of the Mesa step structure, the height H1 of the Mesa step structure, the height H2 of the N electrode 16, and the sidewall angle β of the N electrode 16 facing the Mesa step structure.

[0045] At least one of the structural parameters of the LED chip is optimized to reduce the number of light reflections between the N electrode 16 and the Mesa step structure.

[0046] It should be noted that the height of the Mesa step structure can also be understood to some extent as the depth of the groove 15.

[0047] Specifically, in this embodiment, the structural parameters of the LED chip include the distance L between the bottom of the N electrode 16 and the sidewall of the Mesa step structure, the height H1 of the Mesa step structure, the height H2 of the N electrode 16, and the sidewall angle β of the N electrode 16 facing the Mesa step structure. Compared with the prior art, the technical solution of this application does not involve additional process steps. Based on the structure of the LED chip, it is only necessary to optimize at least one of the structural parameters of the LED chip to reduce the number of light reflections between the N electrode 16 and the Mesa step structure, reduce the light loss of the N electrode 16, and achieve the goal of simple implementation and improved luminous efficiency of the LED chip.

[0048] In an optional embodiment of this application, at least one of the structural parameters of the LED chip is optimized based on the performance parameters of the LED chip.

[0049] In an optional embodiment of this application, the performance parameter of the LED chip is current density.

[0050] When the current density is less than 0.1 mA / mil 2 At that time, the distance between the bottom of the N electrode 16 and the sidewall of the Mesa step structure is in the range of 9μm-15μm, that is, 9μm≤L≤15μm.

[0051] When the current density is greater than or equal to 0.1 mA / mil 2 And less than or equal to 0.2 mA / mil 2 At that time, the distance between the bottom of the N electrode 16 and the sidewall of the Mesa step structure is in the range of 6μm-12μm, that is, 6μm≤L≤12μm.

[0052] When the current density is greater than 0.2 mA / mil 2 At that time, the distance between the bottom of the N electrode and the sidewall of the Mesa stepped structure is in the range of 3μm-9μm, that is, 3μm≤L≤9μm.

[0053] Specifically, the technical effects achievable by the technical solution of this application are illustrated by comparison in the embodiments of this application.

[0054] In the comparative scheme, the distance between the bottom of the N electrode and the sidewall of the Mesa step structure is 5 μm, the height of the Mesa step structure is 14,000 angstroms, the height of the N electrode is 30,000 angstroms, and the sidewall angle of the N electrode facing the Mesa step structure is 80°.

[0055] In a specific embodiment, the distance L between the bottom of the N electrode 16 and the sidewall of the Mesa step structure is 7 μm, the height H1 of the Mesa step structure is 14000 angstroms, the height H2 of the N electrode 16 is 30000 angstroms, and the sidewall angle β of the N electrode 16 facing the Mesa step structure is 80°.

[0056] Actual testing revealed that the current density of the LED chip was 0.1 mA / mil. 2 When the distance L between the bottom of the N electrode 16 and the sidewall of the Mesa stepped structure was adjusted from 5 μm to 7 μm, the luminous efficiency of the prepared LED chip was increased by 0.8%.

[0057] In an optional embodiment of this application, the performance parameter of the LED chip is current density.

[0058] When the current density is less than 0.2 mA / mil 2 At that time, the height of the N electrode 16 ranges from 16,000 angstroms to 20,000 angstroms, that is, 16,000 angstroms ≤ H2 ≤ 20,000 angstroms.

[0059] When the current density is greater than or equal to 0.2 mA / mil 2 At that time, the height range of the N electrode 16 is 25,000 angstroms to 30,000 angstroms, that is, 25,000 angstroms ≤ H2 ≤ 30,000 angstroms.

[0060] Specifically, the technical effects achievable by the technical solution of this application are illustrated by comparison in the embodiments of this application.

[0061] In the comparative scheme, the distance between the bottom of the N electrode and the sidewall of the Mesa step structure is 5 μm, the height of the Mesa step structure is 14,000 angstroms, the height of the N electrode is 30,000 angstroms, and the sidewall angle of the N electrode facing the Mesa step structure is 80°.

[0062] In a specific embodiment, the distance L between the bottom of the N electrode 16 and the sidewall of the Mesa step structure is 5 μm, the height H1 of the Mesa step structure is 14000 angstroms, the height H2 of the N electrode 16 is 18000 angstroms, and the sidewall angle β of the N electrode 16 facing the Mesa step structure is 80°.

[0063] Actual testing revealed that the current density of the LED chip was 0.05 mA / mil. 2 When the height H2 of the N electrode 16 is adjusted from 30,000 angstroms to 18,000 angstroms, the luminous efficiency of the prepared LED chip is increased by 0.5%.

[0064] In an optional embodiment of this application, the performance parameter of the LED chip is current density.

[0065] When the current density is less than 0.2 mA / mil 2 At that time, the sidewall angle of the N electrode facing the Mesa step structure is in the range of 50°-70°, that is, 50°≤β≤70°.

[0066] When the current density is greater than or equal to 0.2 mA / mil 2 At that time, the sidewall angle of the N electrode facing the Mesa step structure is in the range of 70°-90°, that is, 70°≤β≤90°.

[0067] Specifically, the technical effects achievable by the technical solution of this application are illustrated by comparison in the embodiments of this application.

[0068] In the comparative scheme, the distance between the bottom of the N electrode and the sidewall of the Mesa step structure is 5 μm, the height of the Mesa step structure is 14,000 angstroms, the height of the N electrode is 30,000 angstroms, and the sidewall angle of the N electrode facing the Mesa step structure is 80°.

[0069] In a specific embodiment, the distance L between the bottom of the N electrode 16 and the sidewall of the Mesa step structure is 5 μm, the height H1 of the Mesa step structure is 14000 angstroms, the height H2 of the N electrode 16 is 30000 angstroms, and the sidewall angle β of the N electrode 16 facing the Mesa step structure is 60°.

[0070] Actual testing revealed that the current density of the LED chip was 0.05 mA / mil. 2 When the sidewall angle β of the N electrode 16 facing the Mesa stepped structure is adjusted from 80° to 60°, the luminous efficiency of the prepared LED chip will increase by 0.4%.

[0071] In an optional embodiment of this application, the height H1 of the Mesa step structure ranges from 11,000 angstroms to 13,000 angstroms.

[0072] Specifically, the technical effects achievable by the technical solution of this application are illustrated by comparison in the embodiments of this application.

[0073] In the comparative scheme, the distance between the bottom of the N electrode and the sidewall of the Mesa step structure is 5 μm, the height of the Mesa step structure is 14,000 angstroms, the height of the N electrode is 30,000 angstroms, and the sidewall angle of the N electrode facing the Mesa step structure is 80°.

[0074] In a specific embodiment, the distance L between the bottom of the N electrode 16 and the sidewall of the Mesa step structure is 5 μm, the height H1 of the Mesa step structure is 12000 angstroms, the height H2 of the N electrode 16 is 30000 angstroms, and the sidewall angle β of the N electrode 16 facing the Mesa step structure is 80°.

[0075] Actual testing revealed that the current density of the LED chip was 0.08 mA / mil. 2 When the height of the Mesa step structure H1 is adjusted from 14,000 angstroms to 12,000 angstroms, the luminous efficiency of the prepared LED chip increases by 0.3%.

[0076] As described above, the technical solution of this application improves the luminous efficiency of LED chips by optimizing the structural design of LED chips without adding extra production processes. The technical solution of this application can be implemented based on existing equipment and raw materials for LED chip production, thereby reducing the number of light reflections between the N electrode 16 and the Mesa step structure, reducing the light loss of the N electrode 16, and ultimately achieving the goal of a simple implementation scheme that can improve the luminous efficiency of LED chips.

[0077] It should be noted that the technical solution of this application is for high luminous efficiency LED chips operating at low current density. After optimization by the technical solution of this application, the luminous efficiency of the LED chip can be improved by 0.3%-1.0%.

[0078] In an optional embodiment of this application, referring to FIG2, FIG2 is a schematic diagram of another LED chip structure provided in an embodiment of this application. The LED chip provided in this embodiment of the application further includes:

[0079] A current spreading layer 17 is located on the side of the P-type semiconductor layer 14 away from the substrate 11.

[0080] The current blocking layer 18 and the P electrode 19 are located on the side of the current spreading layer 17 opposite to the substrate 11.

[0081] Specifically, in the embodiments of this application, the material of the current spreading layer 17 includes, but is not limited to, ITO material; the material of the current blocking layer 18 includes, but is not limited to, SiO2 material; the material of the P electrode 19 can be the same as or different from the material of the N electrode 16; and the electrode material includes, but is not limited to, metal material.

[0082] It should be noted that the LED chip provided in this application embodiment may also include other functional film layers, such as surface passivation layer and DBR reflector. Since these functional film layers have not been improved in this application, they will not be described in detail here. Only the current spreading layer 17, the current blocking layer 18 and the P electrode 19 are shown as examples.

[0083] Based on the above embodiments of this application, another embodiment of this application also provides a method for fabricating an LED chip. Referring to FIG3, FIG3 is a schematic flowchart of a method for fabricating an LED chip provided in an embodiment of this application. The method for fabricating an LED chip provided in this embodiment of this application includes:

[0084] S101: As shown in Figure 4, a substrate 11 is provided.

[0085] S102: As shown in FIG5, an epitaxial wafer is formed on one side of the substrate 11. The epitaxial wafer includes an N-type semiconductor layer 12, a multiple quantum well layer 13 and a P-type semiconductor layer 14 sequentially stacked on the substrate 11.

[0086] S103: As shown in FIG6, the epitaxial wafer is processed to give the epitaxial wafer a groove 15, the groove 15 exposing a portion of the surface of the N-type semiconductor layer 12, so as to form a Mesa step structure on the epitaxial wafer.

[0087] Specifically, this step includes, but is not limited to, cleaning the epitaxial wafer prepared in Figure 5 with a mixed solution of sulfuric acid and hydrogen peroxide, and then etching the epitaxial wafer to form a Mesa step structure.

[0088] S104: As shown in FIG7, a current spreading layer 17 is formed on the side of the P-type semiconductor layer 14 opposite to the substrate 11.

[0089] Specifically, this step includes, but is not limited to, fabricating a patterned current spreading layer 17 using methods such as deposition, photolithography, and etching.

[0090] S105: As shown in FIG8, a current blocking layer 18 is formed on the side of the current spreading layer 17 opposite to the substrate 11.

[0091] Specifically, this step includes, but is not limited to, fabricating a patterned current blocking layer 18 using methods such as deposition, photolithography, and etching.

[0092] S106: As shown in Figure 2, an N-electrode 16 and a P-electrode 19 are fabricated. The N-electrode 16 is located within the groove 15, and the P-electrode 19 is located on the side of the current spreading layer 17 facing away from the substrate 11. The structural parameters of the LED chip include the distance L between the bottom of the N-electrode 16 and the sidewall of the Mesa step structure, the height H1 of the Mesa step structure, the height H2 of the N-electrode 16, and the sidewall angle β of the N-electrode 16 facing the Mesa step structure. At least one of the structural parameters of the LED chip is optimized to reduce the number of light reflections between the N-electrode 16 and the Mesa step structure.

[0093] Specifically, this step includes, but is not limited to, using a negative gel lift-off process to prepare the N electrode 16 and the P electrode 19.

[0094] Based on the above embodiments of this application, another embodiment of this application also provides a light-emitting device, which includes the LED chip described in the above embodiments.

[0095] The above provides a detailed description of an LED chip and light-emitting device provided in this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.

[0096] It should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatus disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to the method section.

[0097] It should also be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that elements inherent to a process, method, article, or apparatus that comprises a list of elements, or elements inherent to such processes, methods, articles, or apparatus, are also included. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0098] The above description of the disclosed embodiments enables those skilled in the art to make or use this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. An LED chip, characterized in that, The LED chip includes: Substrate; An epitaxial wafer located on one side of the substrate, the epitaxial wafer comprising an N-type semiconductor layer, a multiple quantum well layer and a P-type semiconductor layer sequentially stacked on the substrate; The epitaxial wafer has grooves that expose a portion of the surface of the N-type semiconductor layer to form a Mesa step structure on the epitaxial wafer; The N electrode is located within the groove; wherein the structural parameters of the LED chip include the distance between the bottom of the N electrode and the sidewall of the Mesa step structure, the height of the Mesa step structure, the height of the N electrode, and the sidewall angle of the N electrode facing the Mesa step structure. At least one of the structural parameters of the LED chip is optimized to reduce the number of light reflections between the N electrode and the Mesa step structure.

2. The LED chip according to claim 1, characterized in that, At least one of the structural parameters of the LED chip is obtained by optimizing the performance parameters of the LED chip.

3. The LED chip according to claim 2, characterized in that, The performance parameter of the LED chip is current density; When the current density is less than 0.1 mA / mil 2 At that time, the distance between the bottom of the N electrode and the sidewall of the Mesa stepped structure ranges from 9 μm to 15 μm.

4. The LED chip according to claim 2, characterized in that, The performance parameter of the LED chip is current density; When the current density is greater than or equal to 0.1 mA / mil 2 And less than or equal to 0.2 mA / mil 2 At that time, the distance between the bottom of the N electrode and the sidewall of the Mesa stepped structure ranges from 6μm to 12μm.

5. The LED chip according to claim 2, characterized in that, The performance parameter of the LED chip is current density; When the current density is greater than 0.2 mA / mil 2 At that time, the distance between the bottom of the N electrode and the sidewall of the Mesa stepped structure ranges from 3μm to 9μm.

6. The LED chip according to claim 2, characterized in that, The performance parameter of the LED chip is current density; When the current density is less than 0.2 mA / mil 2 At that time, the height of the N electrode ranged from 16,000 angstroms to 20,000 angstroms.

7. The LED chip according to claim 2, characterized in that, The performance parameter of the LED chip is current density; When the current density is less than 0.2 mA / mil 2 At that time, the sidewall angle of the N electrode facing the Mesa stepped structure is in the range of 50°-70°.

8. The LED chip according to claim 2, characterized in that, The performance parameter of the LED chip is current density; When the current density is greater than or equal to 0.2 mA / mil 2 At that time, the height of the N electrode ranged from 25,000 angstroms to 30,000 angstroms.

9. The LED chip according to claim 2, characterized in that, The performance parameter of the LED chip is current density; When the current density is greater than or equal to 0.2 mA / mil 2 At that time, the sidewall angle of the N electrode facing the Mesa stepped structure is in the range of 70°-90°.

10. The LED chip according to any one of claims 1-9, characterized in that, The height of the Mesa step structure ranges from 11,000 angstroms to 13,000 angstroms.

11. A light-emitting device, characterized in that, The light-emitting device includes the LED chip according to any one of claims 1-10.

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