Variable capacitance element and design method thereof

Abstract

Provided are a variable capacitance element in which the capacitance variation rate can be easily increased and the withstand voltage can be easily increased, and a method for designing such a variable capacitance element. The variable capacitance element (1) includes a conductive film (10), a dielectric layer (20), and a semiconductor layer (30), wherein the semiconductor layer (30) is formed of an oxide semiconductor.

Description

Variable capacitance element and method for designing variable capacitance element 【0001】 The present invention relates to a variable capacitance element and a method for designing a variable capacitance element. 【0002】 A variable capacitance element having a stacked structure of a conductive film - an insulating film - a semiconductor layer is known. For example, Patent Document 1 discloses a variable capacitance element in which the semiconductor layer has two regions with different conductivity types. 【0003】 Japanese Patent Application Laid-Open No. 2000-223722 【0004】 By the way, conventional variable capacitance elements have problems such as a small capacitance change rate and a small breakdown voltage. Furthermore, there is a problem that it is difficult to achieve both an increase in the capacitance change rate and an increase in the breakdown voltage in conventional variable capacitance elements. 【0005】 Therefore, an object of the present invention is to provide a variable capacitance element in which it is easy to increase the capacitance change rate and it is easy to increase the breakdown voltage, and a method for designing such a variable capacitance element. 【0006】 The variable capacitance element of the present invention is a variable capacitance element including a conductive film, a dielectric layer, and a semiconductor layer, wherein the semiconductor layer is formed of an oxide semiconductor. 【0007】 The method for designing a variable capacitance element of the present invention is a method for designing a variable capacitance element including a conductive film, a dielectric layer, and a semiconductor layer, wherein the semiconductor layer is formed of an oxide semiconductor, and an applied voltage V applied to the dielectric layer and the semiconductor layer １ The maximum value V of １ＭＡＸ And the dielectric breakdown field E of the dielectric layer ＢＤ From, Equation: E ＢＤ × d Ｉ > |V １ＭＡＸ | To calculate the dielectric layer thickness d which is the reference film thickness of the dielectric layer Ｉ And the step of calculating Ｉ And the capacitance change rate X of the dielectric layer and the semiconductor layer, the relative permittivity ε of the dielectric layer ｒＩ And the relative permittivity ε of the semiconductor layer ｒＤ From, Equation: X = (ε ｒＩy Ｄ / ε ｒＤ d Ｉ ) + 1 is the standard width of the depletion layer, which is the depletion layer width y. Ｄ The steps of calculating the dielectric layer thickness d Ｉ The above values ​​are set, and the thickness of the semiconductor layer is set to the depletion layer width y Ｄ It has a step defined by the above values. 【0008】 According to the present invention, it is possible to provide a variable capacitance element that can easily increase the capacitance change rate and can easily increase the withstand voltage, and a method for designing such a variable capacitance element. 【0009】 Figure 1 shows the configuration of a variable capacitance element according to an embodiment of the present invention. Figure 2 shows the equivalent circuit of the variable capacitance element according to an embodiment of the present invention. This is a circuit diagram showing an example of a phase shifter according to this embodiment. This is a circuit diagram showing another example of a phase shifter according to this embodiment. 【0010】 (Variable Capacitance Element) Embodiments for carrying out the present invention will be described with reference to the drawings. Figure 1 is a diagram showing the configuration of the variable capacitance element 1 of the present invention. Figure 2 is a diagram showing the equivalent circuit of the variable capacitance element 1 of the present invention. 【0011】 As shown in Figure 1, the variable capacitance element 1 comprises a dielectric layer-side conductive film 10, a dielectric layer 20, and a semiconductor layer 30. The dielectric layer-side conductive film 10, the dielectric layer 20, and the semiconductor layer 30 are stacked in this order. The arrow T in Figure 1 indicates the stacking direction. 【0012】 The end face of the dielectric layer 20 facing the dielectric layer conductive film 10 is called the first dielectric layer end face 21. The end face of the dielectric layer 20 facing the semiconductor layer 30 is called the second dielectric layer end face 22. 【0013】 The end face of the semiconductor layer 30 facing the dielectric layer 20 is called the first semiconductor layer end face 31. The end face of the semiconductor layer 30 opposite to the first semiconductor layer end face 31 is called the second semiconductor layer end face 32. 【0014】The end face 32 of the second semiconductor layer is grounded, for example, via the semiconductor-side conductive film 12. The potential of the dielectric-side conductive film 10 is defined as potential V1. By applying a voltage to the semiconductor layer 30 and the dielectric layer 20, charge is stored in the semiconductor layer 30 and the dielectric layer 20. The variable capacitance element 1 functions as a capacitor. The capacitance of the voltage semiconductor layer 30 is given by the potential V １ It changes depending on the value of . As a result, the variable capacitance element 1 functions as a variable capacitance capacitor. The variable capacitance element 1 may have both the dielectric layer side conductive film 10 and the semiconductor side conductive film 12, or it may have either the dielectric layer side conductive film 10 or the semiconductor side conductive film 12. 【0015】 Figure 2 shows the equivalent circuit of the variable capacitance element 1 of the present invention. Figure 2 C Ｉ The capacitance C of the dielectric layer 20 Ｉ This is shown in Figure 2, C. Ｄ The capacitance C formed in the semiconductor layer 30 is Ｄ This shows the capacitance C of the dielectric layer 20. Ｉ The capacitance C formed in the semiconductor layer 30 is constant. Ｄ It is variable. Capacitance is sometimes simply referred to as capacitance. The following explains each layer in order. 【0016】 (Semiconductor layer) The semiconductor layer 30 is formed of an oxide semiconductor. Examples of oxide semiconductors include oxides of indium (In), gallium (Ga), zinc (Zn), tin (Sn), and zirconium (Zr). However, oxide semiconductors are not limited to these. 【0017】 Oxide semiconductors have a large hand gap. By forming the semiconductor layer 30 with an oxide semiconductor, it becomes easier to increase the capacitance change rate of the variable capacitance element 1. 【0018】 By using oxides such as indium (In), gallium (Ga), zinc (Zn), tin (Sn), and zirconium (Zr) as oxide semiconductors, it is possible to achieve a large capacity change rate even with a low carrier concentration. 【0019】Oxide semiconductors can be either n-type or p-type. The following explanation will use the case where the oxide semiconductor is n-type as an example. 【0020】 Potential V １ The voltage is reduced to less than 0V. This increases the density of positive charges at the first dielectric layer end face 21 of the dielectric layer 20. Consequently, as shown in the box R1 in Figure 1, the density of negative charges increases at the second dielectric layer end face 22 of the dielectric layer 20. 【0021】 As the density of negative charges increases at the second dielectric layer end face 22 of the dielectric layer 20, the density of positive charges increases at the first semiconductor layer end face 31 of the semiconductor layer 30, as shown in the box R2 in Figure 1. As a result, a depletion layer 40 is formed in the semiconductor layer 30, extending from the vicinity of the first semiconductor layer end face 31 toward the second semiconductor layer end face 32. 【0022】 The formation of the depletion layer 40 causes charge to be stored in the semiconductor layer 30. As a result, the semiconductor layer 30 functions as a capacitor. 【0023】 Figure 1 shows the width of the depletion layer 40, and the width of the depletion layer y. Ｄ This is shown as follows. The width is the length in the stacking direction T. Capacitance C of semiconductor layer 30 Ｄ The width of the depletion layer is y. Ｄ It changes depending on the depletion layer width y. Ｄ As the range of change increases, the capacitance C of the semiconductor layer 30 Ｄ The range of change also increases. In order to increase the capacitance change rate of the variable capacitance element 1, the depletion layer width y Ｄ It is preferable to increase the range of change. 【0024】 Depletion layer width y Ｄ The range of change is influenced by the band gap of the semiconductor material forming the semiconductor layer 30. When the band gap of the semiconductor material is large, the depletion layer width y Ｄ The range of change becomes larger. When the band gap of a semiconductor material is small, the depletion layer width y Ｄ The range of change will become smaller. 【0025】 Note that d in Figure 1 Ｉ This is the dielectric layer thickness d of the dielectric layer 20.Ｉ This is shown in Figure 1, d. Ｓ This is the semiconductor layer thickness d of the semiconductor layer 30. Ｓ This indicates. 【0026】 The semiconductor layer 30 is formed of an oxide semiconductor. Oxide semiconductors generally have a large band gap. Therefore, in the variable capacitance element 1 of this embodiment, the depletion layer width y Ｄ It is easy to increase the range of change. As a result, in the variable capacitance element 1 of this embodiment, it is easy to increase the capacitance change rate of the variable capacitance element 1. 【0027】 (Dielectric layer thickness) The following will explain in detail the thickness of each layer, including the breakdown voltage of the variable capacitance element 1. Applied voltage V applied to the dielectric layer 20 and semiconductor layer 30 １ The maximum value of the maximum applied voltage V １ＭＡＸ The dielectric breakdown field of the dielectric layer 20 is defined as the dielectric breakdown field E. ＢＤ Let's assume that the dielectric breakdown field E ＢＤ , dielectric layer thickness d Ｉ and maximum applied voltage V １ＭＡＸ The relationship is as shown in the following equation. Equation 1: E ＢＤ ×d Ｉ >|V １ＭＡＸ In other words, in order to suppress the dielectric breakdown field of the dielectric layer 20, the dielectric layer thickness d of the dielectric layer 20 Ｉ This must be greater than the value calculated by Equation 1. Note that the maximum applied voltage V １ＭＡＸ This is determined by the application of the device in which the variable capacitance element 1 is used. 【0028】 (Depletion layer width) Capacity change rate X and depletion layer width y Ｄ The relationship will be explained. The capacitance change rate X is the ratio of the maximum capacitance to the minimum capacitance in the variable capacitance element 1. The capacitance change rate X is calculated by the following equation 2. Equation 2: X = C ＯＮ / C ＯＦＦ C ＯＮ This is the maximum capacitance of the variable capacitance element 1. ＯＦＦ This is the minimum capacitance of the variable capacitance element 1. The capacitance of the variable capacitance element 1 is the capacitance C of the dielectric layer 20. Ｉ and the capacitance C of the semiconductor layer 30 ＤIt can be obtained by combining and 【0029】 The relative permittivity of the dielectric layer 20 is the relative permittivity ε ｒＩ The relative permittivity of the semiconductor layer 30 is defined as relative permittivity ε ｒＤ Let's assume that equation 2 can be transformed into equation 3 below. Equation 3: X = (ε ｒＩ y Ｄ / ε ｒＤ d Ｉ ) + 1 【0030】 The variable capacitance element 1 has a depletion layer width y such that equation 3 is satisfied for a desired capacitance change rate X. Ｄ and dielectric layer thickness d Ｉ By having this feature, a variable capacitance element 1 that satisfies both the desired capacitance change rate and the desired withstand voltage can be realized. 【0031】 For more details, consider the depletion layer width y that satisfies Equation 3. Ｄ A semiconductor layer 30 having the above width, and a dielectric layer thickness d that satisfies Equation 3. Ｉ A variable capacitance element 1 having a dielectric layer 20 having the above-mentioned film thickness can provide a variable capacitance element with a large capacitance change rate and a high dielectric strength. Specifically, for example, a variable capacitance element 1 can be provided with a dielectric strength greater than 10V and a capacitance change rate X greater than 2. 【0032】 As described above, the variable capacitance element 1 of this embodiment has a laminated structure in which conductive films are formed on the upper and lower parts of a laminated film of a dielectric layer and a semiconductor layer, and the maximum value of the applied voltage V １ＭＡＸ and the dielectric breakdown field E of the MIS capacitor ＢＤ The dielectric layer thickness d is calculated from Equation 1. Ｉ And this d Ｉ And the depletion layer width calculated from the rate of change of capacity X using Equation 3 is y Ｄ When that happens, d Ｉ A dielectric layer having the above thickness, and y Ｄ This is a capacitor element consisting of a semiconductor layer having the above thickness. In other words, the thickness d of the dielectric layer calculated by Equation 1. Ｉ This serves as a reference for determining the thickness of the dielectric layer of the variable capacitance element 1 in this embodiment. Also, the depletion layer width y calculated by Equation 3 ＤThis serves as a reference when determining the film thickness of the semiconductor layer of the variable capacitance element 1 of the present embodiment. 【0033】 In Equation 1, V １ＭＡＸ = 8V, E ＢＤ = 2.5 MV / cm, the film thickness of the dielectric layer is set to d Ｉ > 40 nm, and from Equation 3, the width y of the depletion layer of the semiconductor layer for realizing a capacitance change rate X = 2 Ｄ > 8 nm is defined, and a capacitance change rate four times larger than that of the prior art is obtained. 【0034】 Note that y Ｄ depends on the semiconductor material and also changes depending on the electron concentration of the semiconductor material. Therefore, when it is desired to make X even larger, the electron concentration of the semiconductor material may be decreased so that y Ｄ becomes larger. Alternatively, the thickness of the dielectric layer may be decreased, or a material with a small relative permittivity may be selected as the material of the dielectric layer. 【0035】 Also, in the variable capacitance element 1 of the present embodiment, for the semiconductor layer film thickness d Ｓ and the dielectric layer film thickness d Ｉ it is possible to satisfy the expression 1 / 20 ≤ d Ｓ / d Ｉ ≤ 3 / 4. This relational expression can be realized by, for example, the relative permittivity ε ｒＩ of the dielectric layer being ≥ 5, the capacitance change rate X of the semiconductor layer being ≥ 2 times, the maximum value V １ of the applied voltage V applied to the semiconductor layer being 10 V or more and 25 V or less, and the depletion layer width y １ＭＡＸ being the maximum depletion layer width determined by the semiconductor physical properties. Ｄ 【0036】 (Bandgap) An example of the bandgap will be described. The depletion layer width y Ｄ can be calculated by the following Equation 4. Equation 4: y Ｄ = ((2ε ０ ε ｒｓ / qN) × φ Ｓ ) 1 / 2 φ Ｓ is the depletion layer potential, ε ０ is the permittivity of vacuum, ε ｒｓφ represents the relative permittivity of the semiconductor material, and N represents the carrier concentration. When the band gap becomes large, φ Ｓ It gets bigger. φ Ｓ As y increases Ｄ It becomes larger. In other words, as the band gap increases, the depletion layer width y Ｄ It will get bigger. 【0037】 Generally, the band gap of oxide semiconductors is larger than that of silicon semiconductors, for example. The band gap of oxide semiconductors is, for example, between 3.0 eV and 4.0 eV. In contrast, the band gap of silicon semiconductors is 1.12 eV. 【0038】 Thus, the band gap of oxide semiconductors is larger than that of silicon semiconductors. Therefore, in the variable capacitance element 1 of this embodiment, the depletion layer width y Ｄ It is easy to increase the range of change. As a result, the capacitance change rate X can be increased in the variable capacitance element 1 of this embodiment. 【0039】 (Band curvature) Depletion layer width y Ｄ This also depends on the amount of band bending. In silicon semiconductors, a weak inversion state occurs when the amount of band bending exceeds the difference between the Fermi state and the intrinsic Fermi state. In the weak inversion state, the amount of band bending is limited, and applying a voltage higher than this limit does not increase the depletion layer width y. Ｄ The band does not expand. Therefore, in silicon semiconductors, the band only bends to a potential amount corresponding to about 25% to 35% of the band gap of 1.12 eV. 【0040】 In contrast, in oxide semiconductors, the depletion layer width y Ｄ Even at the band bending amount where the value is maximum, inversion hardly occurs. Therefore, in oxide semiconductors, the band bending occurs in the range of potentials corresponding to approximately 50% to 70% in the band gap between 3.0 eV and 4.0 eV. 【0041】As described above, oxide semiconductors have a wider band gap than silicon semiconductors, and they can be used in a wider range to cause band bending within that band gap than silicon semiconductors. Therefore, in the variable capacitance element 1 of this embodiment, which uses an oxide semiconductor, it is easy to increase the capacitance change rate. 【0042】 Same ε ｒｓ When compared with N, the maximum depletion layer width y Ｄ The band gap of oxide semiconductors is more than four times but less than seven times larger than that of silicon semiconductors. Also, the band bending relative to the band gap is about twice as large for oxide semiconductors as for silicon semiconductors. 【0043】 (Dielectric Layer) The dielectric material forming the dielectric layer 20 will now be described. The dielectric material preferably has a dielectric constant of more than 5, for example. It is more preferable that the dielectric material has a large dielectric constant of more than 10, for example. By increasing the dielectric constant of the dielectric material, the capacitance change rate of the variable capacitance element 1 can be increased. 【0044】 Specifically, the dielectric material can be, for example, a paraelectric material with a relative permittivity of 30 or higher. This allows for a larger capacitance change rate to be obtained. 【0045】 Furthermore, the dielectric material can be a ferroelectric. This allows for a larger capacitance change rate, enables nonlinear capacitance changes, and provides non-volatile memory properties for the capacitance. 【0046】 Furthermore, the dielectric material can be an antiferroelectric. This allows for a larger capacitance change rate and enables nonlinear capacitance changes. 【0047】Furthermore, the dielectric material may contain at least one of the following elements: hafnium (Hf), zirconium (Zr), aluminum (Al), nitrogen (N), magnesium (Mg), lithium (Li), strontium (Sr), calcium (Ca), barium (Ba), lanthanum (La), tantalum (Ta), samarium (Sm), and titanium (Ti). This makes it possible to manufacture the variable capacitance element 1 without significantly changing the conventional manufacturing process. In addition, it is possible to obtain a variable capacitance element 1 with low leakage current. 【0048】 (Relationship between dielectric layer and semiconductor layer) The dielectric material forming the dielectric layer 20 is preferably an oxide material. In the variable capacitance element 1 of this embodiment, the material of the semiconductor layer 30 is an oxide semiconductor. When the material of the dielectric layer 20 is an oxide dielectric, both the semiconductor layer 30 and the dielectric layer 20 become oxides. Therefore, an interface layer is unlikely to form at the interface between the semiconductor layer 30 and the dielectric layer 20. 【0049】 Even if an interfacial layer is formed, SiO ２ When neither the dielectric layer 20 nor the semiconductor layer 30 contains a metal that results in a low dielectric constant, a significant decrease in dielectric constant (capacitance) is suppressed. In the variable capacitance element 1 of this embodiment, even when an interface layer is formed, the dielectric constant does not become very low. 【0050】 In contrast, in conventional variable capacitance elements where the semiconductor layer is made of silicon, during the manufacturing process of the variable capacitance element, SiO is formed at the interface between the dielectric layer and the silicon semiconductor layer. ２ A low dielectric constant interface layer, such as one with a relative permittivity of less than 5, is easily formed. As a result, the dielectric constant of the entire dielectric layer, and consequently the capacitance, tends to decrease. Consequently, it becomes difficult to obtain the desired capacitance change rate. 【0051】 As described above, the structure in which an oxide semiconductor as a semiconductor layer is bonded to a dielectric layer differs from the case in which silicon is used as the semiconductor layer, SiO ２ This has the advantage of making it difficult to form low dielectric constant interface layers. 【0052】If a low-dielectric-constant interface layer is formed between a semiconductor layer and a dielectric layer, and the capacitance of the low-dielectric-constant interface layer is connected in series with the capacitance of the semiconductor layer and the dielectric layer, the capacitance value in the ON state, i.e., the high-capacitance state, decreases. As a result, the capacitance change rate becomes smaller. 【0053】 In contrast, the variable capacitance element 1 of this embodiment uses an oxide semiconductor for the conductive layer, which suppresses the decrease in capacitance value in the ON state, i.e., the high capacitance state. As a result, a larger capacitance change rate can be achieved than when silicon is used as the semiconductor layer material. 【0054】 In the following, a phase shifter will be described as an example of a device that applies the above-described variable capacitance element 1 as a digital variable reactance element. Note that the digital variable reactance element in this embodiment is not limited to these, and can be applied to various devices requiring variable reactance or impedance, such as variable loads, MRI (Magnetic Resonance Imaging) detection circuits, VCOs (Voltage Controlled Oscillators), phase-locked circuits, and frequency synthesizers. 【0055】 (Phase Shifter of this Embodiment) Figure 3 is a circuit diagram showing an example of a phase shifter according to this embodiment, and Figure 4 is a circuit diagram showing another example of a phase shifter according to this embodiment. Note that the phase shifter is just one example of an application of the variable capacitance element 1. The applications of the variable capacitance element 1 are not limited to a phase shifter. Other applications of the variable capacitance element 1 include, for example, a resonant converter (output modulation), a bypass capacitor (noise removal in high-frequency circuits), and a snubber circuit (protection element for circuit switching). 【0056】The phase shifter 210 shown in Figure 3 is a hybrid-coupled high-frequency (RF) phase shifter composed of quarter-wavelength lines 211 and 212 with characteristic impedance Z0 and quarter-wavelength lines 213 and 214 with characteristic impedance Z0 / √2. The phase shifter 210 has one end of line 211 as the input terminal RF_IN and the other end of line 211 as the output terminal RF_OUT. The phase shifter 210 is equipped with the aforementioned variable reactance elements 201 (201A, 201B) that terminate the output terminal 213_OUT on the line 213 side and the output terminal 214_OUT on the line 14 side, respectively. 【0057】 In the phase shifter 210, the RF signal input from the input terminal RF_IN is distributed through hybrid-coupled lines 211, 212, 213, and 214, and transmitted to the output terminal 213_OUT on line 213 and the output terminal 214_OUT on line 214. Since these output terminals 213_OUT and 214_OUT are terminated by the variable reactance elements 201 (201A, 201B) described above, the signals transmitted to these output terminals undergo a phase shift dependent on the reactance amount of the variable reactance elements 201 (201A, 201B) and are reflected. The signals reflected at these output terminals 213_OUT and 214_OUT are combined again in the hybrid-coupled type lines 211, 212, 213, and 214 and output from output terminal RF_OUT. At this time, the output signal undergoes a phase shift dependent on the reactance amount of the variable reactance elements 201 (201A, 201B) described above, and by changing the reactance amount of the variable reactance elements, it operates as a phase shifter. 【0058】 In Figure 3, an example is shown in which the above-described variable reactance elements 201 (201A, 201B) are applied to a hybrid-coupled type phase shifter 210. However, as shown in Figure 4, the above-described variable reactance elements 201 (201A, 201B) may also be applied to a loaded-line type phase shifter 210 composed of a quarter-wavelength transmission line 11 with a characteristic impedance of Z0. 【0059】 Thus, with the high-frequency phase shifter using the digital variable reactance element of the above-described embodiment, the reactance can be broadly varied in both capacitive and inductive ways, making it possible to realize a low-loss high-frequency (RF) phase shifter with a large phase shift range. 【0060】 The embodiments of the present invention have been described above. The present invention is not limited to the embodiments described above, and various modifications, variations, and combinations are possible. 【0061】 1 Variable capacitance element 10 Conductive film on the dielectric layer side 12 Conductive film on the semiconductor side 20 Dielectric layer 21 End face of the first dielectric layer 22 End face of the second dielectric layer 30 Semiconductor layer 31 End face of the first semiconductor layer 32 End face of the second semiconductor layer 40 Depletion layer

Claims

1. A variable capacitance element comprising a conductive film, a dielectric layer, and a semiconductor layer, wherein the semiconductor layer is formed of an oxide semiconductor.

2. The applied voltage V applied to the dielectric layer and the semiconductor layer １ with a maximum value V １ＭＡＸ and the dielectric breakdown field E of the dielectric layer ＢＤ from which the formula: E ＢＤ × d Ｉ > |V １ＭＡＸ | is used to calculate the film thickness of the dielectric layer as the dielectric layer film thickness d Ｉ and the film thickness d Ｉ and the capacitance change rate X of the dielectric layer and the semiconductor layer, the relative permittivity ε of the dielectric layer ｒＩ and the relative permittivity ε of the semiconductor layer ｒＤ from which the formula: X = (ε ｒＩ y Ｄ / ε ｒＤ d Ｉ )+1 is used to calculate the width of the depletion layer as the depletion layer width y Ｄ when the film thickness of the dielectric layer is equal to or greater than the dielectric layer film thickness d Ｉ and the film thickness of the semiconductor layer is equal to or greater than the depletion layer width y Ｄ The variable capacitance element according to claim 1.

3. The aforementioned maximum value V １ＭＡＸ A variable capacitance element according to claim 1 or 2, satisfying at least one of >10V and the capacitance change rate X > 2.

4. The dielectric layer has a relative permittivity ε ｒＩ A variable capacitance element according to any one of claims 1 to 3, wherein the element is formed of 5 or more paraelectric materials.

5. The thickness of the semiconductor layer is defined as semiconductor layer thickness d. Ｓ In that case, 1 / 20 ≤ d Ｓ / d Ｉ A variable capacitance element according to any one of claims 1 to 4, wherein the capacitance is ≤ 3 / 4.

6. The variable capacitance element according to any one of claims 1 to 5, wherein the dielectric layer is made of a ferroelectric material.

7. The variable capacitance element according to any one of claims 1 to 6, wherein the dielectric layer is formed of an antiferroelectric material.

8. The variable capacitance element according to any one of claims 1 to 7, wherein the semiconductor layer is formed of an oxide semiconductor containing at least one element from In, Ga, Zn, Sn, and Zr.

9. The variable capacitance element according to any one of claims 1 to 8, wherein the dielectric layer is formed of an oxide material.

10. The variable capacitance element according to any one of claims 1 to 9, wherein the dielectric layer is formed of a dielectric material containing at least one element from among Hf, Zr, Al, N, Mg, Li, Sr, Ca, Ba, La, Ta, Sm, and Ti.

11. A method for designing a variable capacitance element comprising a conductive film, a dielectric layer, and a semiconductor layer, wherein the semiconductor layer is formed of an oxide semiconductor, and an applied voltage V is applied to the dielectric layer and the semiconductor layer. １ The maximum value V １ＭＡＸ And the dielectric breakdown field E of the dielectric layer ＢＤ And, therefore, formula: E ＢＤ ×d Ｉ >|V １ＭＡＸ | The dielectric layer thickness d is the reference thickness of the dielectric layer. Ｉ The steps of calculating the film thickness d Ｉ The capacitance change rate X of the dielectric layer and the semiconductor layer, and the relative permittivity ε of the dielectric layer. ｒＩ And the relative permittivity ε of the semiconductor layer ｒＤ Therefore, the equation is: X = (ε ｒＩ y Ｄ / ε ｒＤ d Ｉ ) + 1 is the standard width of the depletion layer, which is the depletion layer width y. Ｄ The steps of calculating the dielectric layer thickness d Ｉ The above values ​​are set, and the thickness of the semiconductor layer is set to the depletion layer width y Ｄ A method for designing a variable capacitance element, comprising the steps defined above.

12. The thickness of the semiconductor layer is the depletion layer width y Ｄ A method for designing a variable capacitance element according to claim 11, wherein the electron concentration of the semiconductor layer is adjusted when setting the above value.

13. The thickness of the semiconductor layer is defined as semiconductor layer thickness d Ｓ In that case, 1 / 20 ≤ d Ｓ / d Ｉ A method for designing a variable capacitance element according to claim 11 or 12, wherein the ratio is ≤ 3 / 4.

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