Imaging element and imaging device
The image sensor's stacked structure with adaptable signal processing circuits addresses the challenge of improving image quality by dynamically optimizing signal processing for enhanced image capture and processing under diverse lighting conditions.
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- NIKON CORP
- Filing Date
- 2025-12-05
- Publication Date
- 2026-06-18
AI Technical Summary
Existing image sensors with two-dimensional pixel arrays face challenges in improving image quality, particularly in efficiently converting and processing light signals into digital data.
The image sensor employs a stacked structure with multiple semiconductor substrates, each containing photoelectric conversion units that convert light into electric charge, and signal processing circuits that dynamically adjust the configuration ratio of counter latch circuits to optimize signal processing, allowing for real-time adaptation to lighting conditions.
This approach enhances image quality by expanding the dynamic range and improving signal processing efficiency, enabling better image capture and processing, especially under varying lighting conditions.
Smart Images

Figure JP2025042608_18062026_PF_FP_ABST
Abstract
Description
Image sensor and imaging device 【0001】 The present invention relates to an image sensor and an imaging device. 【0002】 Image sensors in which multiple pixels are arranged in a two-dimensional array are known (for example, Patent Document 1). Improvement of image quality has been desired for some time. [Prior Art Documents] [Patent Documents] [Patent Document 1] JP 2008-186894 General disclosure 【0003】 In a first embodiment of the present invention, an image sensor is provided. The image sensor may include a first photoelectric conversion unit that converts light into electric charge. The image sensor may include a second photoelectric conversion unit that converts light into electric charge. The image sensor may include a first conversion unit that converts a signal based on the electric charge converted by the first photoelectric conversion unit into a first digital signal. The image sensor may include a second conversion unit that converts a signal based on the electric charge converted by the second photoelectric conversion unit into a second digital signal. The image sensor may include a first holding unit that holds the first digital signal converted by the first conversion unit. The image sensor may include a second holding unit that holds the second digital signal converted by the second conversion unit. The image sensor may include a connecting unit that electrically connects the first holding unit and the second holding unit. 【0004】 In a second embodiment of the present invention, an imaging device is provided. The imaging device may include any of the image sensors described above. 【0005】 It should be noted that the above summary of the invention does not enumerate all of its features. Furthermore, subcombinations of these features may also constitute an invention. 【0006】This is a block diagram of the imaging device 10 according to the first embodiment. This is a schematic diagram showing the overall functional block of the image sensor 100 according to the first embodiment. This schematically shows the positional relationship between the region where the pixel section 50 is located and the region where the processing circuit section 160 is located in the image sensor 100 according to the first embodiment. This schematically shows an example of the circuit configuration of the two pixels 202 and the signal processing circuit group 220, as well as the peripheral circuit section 500, in the first embodiment. This shows an example of the operation flow of the imaging method according to the first embodiment. This shows an example of changing the configuration ratio of the counter latch circuits of the two counters 226 in the circuit configuration of Figure 4. This shows another example of changing the configuration ratio of the counter latch circuits of the two counters 226 in the circuit configuration of Figure 4. This shows another example of changing the configuration ratio of the counter latch circuits of the two counters 226 in the circuit configuration of Figure 4. This shows another example of the operation flow of the imaging method according to the first embodiment. This schematically shows an example of the circuit configuration of the two pixels 202 and the signal processing circuit group 220, as well as the peripheral circuit section 500 and the image processing unit 24, in the second embodiment. Figure 11 schematically shows an example of the circuit configuration of the two pixels 202 and the signal processing circuit group 220-1, as well as the peripheral circuit section 500, in the third embodiment. In the circuit configuration of Figure 11, an example of changing the configuration ratio of the counter latch circuits of the two counters 226 is shown. In the circuit configuration of Figure 11, another example of changing the configuration ratio of the counter latch circuits of the two counters 226 is shown. In the circuit configuration of Figure 11, another example of changing the configuration ratio of the counter latch circuits of the two counters 226 is shown. 【0007】 The present invention will be described below through embodiments, but these embodiments are not intended to limit the scope of the claims. Furthermore, not all combinations of features described in the embodiments are necessarily essential to the solution of the invention. 【0008】 Figure 1 is a block diagram of an imaging device 10 according to a first embodiment. The imaging device 10 includes an optical system 20, an image sensor 100, an image processing unit 24, a control unit 26, a recording unit 28, an operation unit 30, a display unit 32, and a power supply unit 34. The image sensor 100, image processing unit 24, control unit 26, recording unit 28, operation unit 30, display unit 32, and power supply unit 34 are interconnected via a bus line 36. Note that the imaging device 10 is an example of an imaging unit. 【0009】 The optical system 20 has a group of lenses and forms an image of the incident light from the subject onto the imaging surface of the image sensor 100 along the optical axis 22. In Figure 1, the Z-axis is shown parallel to the optical axis 22, and the X-axis and Y-axis are shown perpendicular to the Z-axis, and the same applies to subsequent figures. 【0010】 The image sensor 100 is, for example, a stacked type. As will be described in more detail later, the image sensor 100 comprises a plurality of stacked semiconductor substrates, and each of these semiconductor substrates has a plurality of photoelectric conversion units that convert light emitted from the optical system 20 into electric charge. More specifically, the image sensor 100 converts the amount of incident light imaged onto the imaging surface by the optical system 20 into an electrical signal for each of the plurality of pixels, each of which contains at least one photoelectric conversion unit, to obtain an analog pixel signal. The image sensor 100 further outputs a pixel signal that has undergone signal processing, such as converting the analog signal into a digital signal. Unless otherwise specified, the "pixel signal" may be in either an analog or digital signal state. 【0011】 In the following explanation, the basic time unit for obtaining data for one image may be referred to as one frame. One frame includes the storage time of the photoelectric conversion unit and the readout time of the pixel values from the photoelectric conversion unit during a single imaging cycle. 【0012】 The image sensor 100 also has a plurality of semiconductor substrates, which, as will be described in more detail later, include a plurality of conversion units that convert signals based on charge converted by the plurality of photoelectric conversion units described above into digital signals. 【0013】 The image processing unit 24 is, for example, an ISP (Image Signal Processor) and performs image processing on the pixel signals output from the image sensor 100. This processing includes, for example, color interpolation, grayscale conversion, and compression. 【0014】 The control unit 26 controls the entire imaging device 10, and controls the image sensor 100, image processing unit 24, recording unit 28, operation unit 30, display unit 32, and power supply unit 34 via the bus line 36. 【0015】The recording unit 28 records the image data of the subject imaged by the imaging device 100 on a recording medium such as a hard disk or a semiconductor memory. The image data is, for example, moving image data. Also, the image data is, for example, still image data. The operation unit 30 receives operations by the user. The operation unit 30 issues operation commands for various functions of the imaging device 10 under the received operations. The display unit 32 is a panel-type display device such as a liquid crystal panel or an organic EL (Electro Luminescence) panel. The display unit 32 displays an image (moving image or still image) of the subject imaged by the imaging device 100. The power supply unit 34 supplies various power sources that serve as the operating power for the imaging device 100, the image processing unit 24, the control unit 26, the recording unit 28, the operation unit 30, and the display unit 32 to these supply targets. 【0016】 FIG. 2 is a schematic diagram showing the functional blocks of the entire imaging device 100 according to the first embodiment. FIG. 2 shows the relationship of transmission and reception of signals between each functional block and does not show the spatial arrangement in the imaging device 100. 【0017】 The imaging device 100 includes a pixel unit 50, a drive control unit 60, a vertical drive unit 62, a signal processing unit 64, a horizontal drive unit 68, and an output unit 70. 【0018】 The pixel unit 50 has a plurality of pixels. The plurality of pixels are arranged in the pixel unit 50 along a first direction and a second direction. The second direction is a direction intersecting the first direction. The first direction is, for example, the row direction. The second direction is, for example, the column direction. Note that the first direction and the second direction may be orthogonal. The plurality of pixels are arranged two-dimensionally in the pixel unit 50. Each of the plurality of pixels includes at least one photoelectric conversion unit. The photoelectric conversion unit photoelectrically converts the image light from the optical system 20. 【0019】The drive control unit 60 drives the imaging device 100. Specifically, the drive control unit 60 receives a clock signal and a signal for commanding an operation mode and the like from the control unit 26, and drives the imaging device 100. For example, the drive control unit 60 generates a clock signal and a control signal that serve as the basis for the operations of the vertical drive unit 62, the signal processing unit 64, the horizontal drive unit 68, etc. based on the vertical synchronization signal, the horizontal synchronization signal, and the master clock, and outputs them to the vertical drive unit 62, the signal processing unit 64, and the horizontal drive unit 68. Note that the drive control unit 60 receives image information, phase difference information, etc. from the pixel unit 50 via the signal processing unit 64, and controls a plurality of pixels of the pixel unit 50 via the vertical drive unit 62, etc. to change the accumulation time, for example, for each pixel or for each of several pixel groups. 【0020】 The vertical drive unit 62 drives pixels, for example, in units of rows based on the above control signal. It can be said that the vertical drive unit 62 controls the accumulation of pixels by the control signal. Also, it can be said that the vertical drive unit 62 controls the accumulation time of the charges converted by the photoelectric conversion unit by the control signal. The signal processing unit 64 performs signal processing on the pixel signals from the pixels selected by the vertical drive unit 62. For example, the signal processing unit 64 converts the pixel signal of the analog signal read from the pixel into a pixel signal of a digital signal. The signal processing unit 64 has a conversion unit that converts the pixel signal of the analog signal read from the pixel into a pixel signal of a digital signal. Also, the signal processing unit 64 has a noise removal unit that removes the noise included in the pixel signal read from the pixel. Also, the signal processing unit 64 has a storage unit that temporarily stores the pixel signal after the signal processing is performed. The horizontal drive unit 68 sequentially reads out the pixel signals stored in the storage unit of the signal processing unit 64 and outputs them to the output unit 70. 【0021】 The output unit 70 outputs the pixel signal. The output unit 70 may perform a specific process on the pixel signal read from the storage unit of the signal processing unit 64 and output it to the image processing unit 24. The specific process by the output unit 70 is, for example, buffering processing. 【0022】Figure 3 schematically shows the positional relationship between the region where the pixel section 50 is located and the region where the processing circuit section 160 is located in the image sensor 100 according to the first embodiment. The image sensor 100 has a first semiconductor substrate 140 and a second semiconductor substrate 150. The first semiconductor substrate 140 and the second semiconductor substrate 150 are stacked in this order in the positive Z-axis direction in Figure 3. 【0023】 The pixel unit 50 is arranged on the first semiconductor substrate 140. In the following description, the first semiconductor substrate 140 may be referred to as a pixel chip. The pixel unit 50 has a plurality of pixel units 142. The plurality of pixel units 142 are arranged in the pixel unit 50 along a first direction (for example, the row direction) and a second direction (for example, the column direction). The plurality of pixel units 142 are arranged two-dimensionally in the pixel unit 50. In the pixel unit 50 shown in Figure 3, for simplicity, only 16 pixel units 142 arranged in a two-dimensional 4x4 arrangement are shown. Each of the pixel units 142 contains a plurality of pixels 202. In this embodiment, each pixel unit 142 contains two pixels 202. In Figure 3, typically, only two pixels 202-1 and 202-2 included in one pixel unit 142 are shown. The plurality of pixels 202 are arranged in the pixel unit 50 along a first direction (for example, the row direction) and a second direction (for example, the column direction). Multiple pixels 202 are arranged in a two-dimensional manner in the pixel unit 50. Each of the multiple pixels 202 includes at least one photoelectric conversion unit. The pixels 202 output signals used to generate an image. The number of rows, columns, and total number of pixels in the pixel unit 142 and pixels 202 are not limited to those described above. 【0024】 The processing circuit section 160 and the peripheral circuit section 500 are arranged on the second semiconductor substrate 150. The second semiconductor substrate 150 is sometimes referred to as a signal processing chip. 【0025】Corresponding to the fact that the pixel unit 50 has a plurality of pixel units 142 arranged in two dimensions, the processing circuit unit 160 has a plurality of signal processing circuit groups 220 arranged in two dimensions. In the processing circuit unit 160 shown in Figure 3, only 16 signal processing circuit groups 220 arranged in a 4x4 two-dimensional layout are shown for simplicity, corresponding to the plurality of pixel units 142. Each of the plurality of signal processing circuit groups 220 includes a plurality of signal processing circuits 222 that perform signal processing on signals output from a plurality of pixels 202 of the corresponding pixel unit 142, and a modification unit 221 that changes the connection configuration of a plurality of counter latch circuits in the plurality of signal processing circuits 222. With respect to the signal processing circuits 222, in this embodiment, corresponding to the fact that each pixel unit 142 contains two pixels 202, each signal processing circuit group 220 contains two signal processing circuits 222. In Figure 3, typically only two signal processing circuits 222-1, 222-2 and one modification unit 221 included in one signal processing circuit group 220 are shown. The signal processing circuit group 220 may include, for example, some or all of the vertical drive unit 62, signal processing unit 64, and horizontal drive unit 68 shown in Figure 2. The number of rows, columns, and total number of the signal processing circuit group 220, signal processing circuit 222, and modification unit 221 are not limited to those stated above. 【0026】 In this example, the processing circuit unit 160 is positioned opposite the pixel unit 50 in the stacking direction in which the first semiconductor substrate 140 and the second semiconductor substrate 150 are stacked. That is, the processing circuit unit 160 is positioned so as to overlap with the pixel unit 50 in the stacking direction. In this case, either the pixel unit 50 or the processing circuit unit 160 may partially overlap the other in the stacking direction. 【0027】Furthermore, the signal processing circuit group 220 is positioned opposite the corresponding pixel unit 142 in the stacking direction. For example, the first signal processing circuit group that performs signal processing for the first pixel unit among the multiple pixel units 142 is arranged so as to overlap with the first pixel unit in the stacking direction. In this case, in the stacking direction, one of the first pixel unit and the first signal processing circuit group may partially overlap with the other. Similarly, the second signal processing circuit group that performs signal processing for the second pixel unit adjacent to the first pixel unit in the first or second direction among the multiple pixel units 142 is arranged so as to overlap with the second pixel unit in the stacking direction. In this case, in the stacking direction, one of the second pixel unit and the second signal processing circuit group may partially overlap with the other. 【0028】 The peripheral circuit section 500 is arranged on the second semiconductor substrate 150 around the processing circuit section 160. Furthermore, the peripheral circuit section 500 is arranged on the second semiconductor substrate 150 outside the processing circuit section 160. The peripheral circuit section 500 performs control common to multiple pixel units 142. The peripheral circuit section 500 is, so to speak, a global circuit section, provided in common to multiple signal processing circuit groups 220 included in the processing circuit section 160. For example, the peripheral circuit section 500 may be a part of the vertical drive unit 62, horizontal drive unit 68, and output unit 70 shown in Figure 2, other than the part included in the signal processing circuit group 220. 【0029】 Furthermore, the image sensor 100 may have a third semiconductor substrate stacked in addition to the first semiconductor substrate 140 and the second semiconductor substrate 150. For example, the third semiconductor substrate performs image processing according to the signal output by the second semiconductor substrate 150. The third semiconductor substrate also has a storage unit for recording the processed signal. The structure of the image sensor 100 may be back-illuminated or front-illuminated. 【0030】 Figure 4 schematically shows an example of the circuit configuration of the two pixels 202 and the signal processing circuit group 220, as well as the peripheral circuit section 500, in the first embodiment. 【0031】The signal processing circuit 222 included in the signal processing circuit group 220 processes the pixel signal of the pixel 202 based on control signals from the peripheral circuit section 500. In Figure 4, the signal processing circuit 222 is shown to include a conversion unit 224 that converts the charge-based signal converted by the photoelectric conversion unit of the pixel 202 into a digital signal, that is, a conversion unit that converts the analog pixel signal into a digital pixel signal, and a counter latch 226 that holds the digital signal, that is, a counter latch that holds the digital pixel signal. 【0032】 In addition to the above, the signal processing circuit 222 may also include other processing circuits such as digital and / or analog CDS circuits (correlated double sampling). The pixel signals from the signal processing circuit 222 are output to the peripheral circuit section 500 via the horizontal line 502. 【0033】 In Figure 4, the pixel 202 and the conversion unit 224 and counter latch 226 included in the signal processing circuit 222 are shown by dashed lines. More specifically, Figure 4 shows a pair of pixels 202-1 and the conversion unit 224-1 and counter latch 226-1 included in the signal processing circuit 222-1, a pair of pixels 202-2 and the conversion unit 224-2 and counter latch 226-2 included in the signal processing circuit 222-2, and the modification unit 221. Furthermore, since the conversion unit 224-1 and counter latch 226-1 included in a pair of pixels 202-1 and signal processing circuit 222-1, and the conversion unit 224-2 and counter latch 226-2 included in a pair of pixels 202-2 and signal processing circuit 222-2, have similar configurations and functions, in the following description, pixels 202-1 and 202-2 may be referred to as pixels 202 without distinction, signal processing circuits 222-1 and 222-2 may be referred to as signal processing circuit 222 without distinction, conversion units 224-1 and 224-2 may be referred to as conversion unit 224 without distinction, and counter latches 226-1 and 226-2 may be referred to as counter latch 226 without distinction. 【0034】The multiple pixels 202 in the pixel section 50 may, for example, be arranged in a Bayer array as a whole, or in a quad Bayer array where four pixels of the same color share a microlens, or in a nonacell where nine pixels of the same color share a microlens, or all may be provided with a green, red, or blue color filter, or all may be provided with a monochrome filter. 【0035】 Each of the multiple pixels 202 has a photoelectric conversion unit 120 capable of outputting a pixel signal and a reset unit 126. The photoelectric conversion unit 120 can provide image information. The photoelectric conversion unit 120 is, for example, a photodiode. The photoelectric conversion units 120 of the two pixels 202-1 and 202-2 shown in Figure 5 are examples of a first photoelectric conversion unit, a second photoelectric conversion unit, etc. 【0036】 As an example, the two photoelectric conversion units 120 of pixels 202-1 and 202-2 shown in Figure 4 are arranged next to each other. In this specification, the two adjacent photoelectric conversion units 120 may be, for example, two photoelectric conversion elements of a red R pixel and a green Gr pixel arranged vertically and horizontally in a Bayer array and adjacent to each other, or two photoelectric conversion elements of a green Gr pixel and a green Gb pixel arranged diagonally and adjacent to each other. The two adjacent photoelectric conversion units 120 may also be, for example, two photoelectric conversion elements of a green Gr pixel and a green Gb pixel arranged vertically and horizontally in a quad Bayer array and adjacent to each other. In Figure 4 and subsequent figures, the photoelectric conversion units 120 of the two pixels 202 may be, for example, two photoelectric conversion elements of two green Gr pixels arranged vertically and horizontally in a Bayer array with a red R pixel in between, or two photoelectric conversion elements of two blue B pixels arranged vertically and horizontally with a green Gb pixel in between. 【0037】The charge converted by the photoelectric conversion unit 120 is input to the conversion unit 224 via node 122. The conversion unit 224 has a comparison unit 224A that compares multiple signal values. Specifically, the comparison unit 224A has a first input terminal 224A-1 to which a signal based on the charge converted by the photoelectric conversion unit 120 is input, a second input terminal 224A-2 to which a reference signal having a constant voltage value is input, and an output terminal 224A-3 that outputs the comparison result obtained by comparing the value of the signal input to the first input terminal 224A-1 and the value of the signal input to the second input terminal 224A-2 as an output signal. Node 122 has a diffusion unit 122A to which the charge converted by the photoelectric conversion unit 120 is input, and wiring 122B that electrically connects the diffusion unit 122A and the first input terminal 224A-1. 【0038】 The reset unit 126 discharges the charge from the pixel 202 to the power supply wiring to which the power supply voltage VDD is supplied. In this way, the reset unit 126 discharges the charge from the photoelectric conversion unit 120 to the power supply wiring. Furthermore, since the reset unit 126 is electrically connected to the output terminal 224A-3 of the comparison unit 224A, when the photoelectric conversion unit 120 discharges charge, the output signal output from the output terminal 224A-3 of the comparison unit 224A is input to the reset unit 126 as a reset control signal φRST. In this way, the reset unit 126 discharges the charge from the photoelectric conversion unit 120 to the power supply wiring. That is, the voltage of the photoelectric conversion unit 120 is reset. In this example, the reset unit 126 is described as an N-channel FET, but the type of transistor is not limited to this. 【0039】 The conversion unit 224 outputs, for example, the result of comparing the value of the signal based on the charge converted by the photoelectric conversion unit 120 with the value of the reference signal. More specifically, the conversion unit 224 emits a pulse as the digital signal described above each time the value of the signal based on the charge converted by the photoelectric conversion unit 120 exceeds the value of the reference signal. The value of the reference signal is an example of a threshold. The reset unit 126 simultaneously resets the charge of the pixel 202. The conversion unit 224 repeats this operation for the duration of one frame. Note that conversion units 224-1 and 224-2 are examples of the first and second conversion units. 【0040】The counter latch 226, as an example, counts and holds the number of pulses transmitted from the conversion unit 224. More specifically, the counter latch 226 counts the number of pulses output from the conversion unit 224 during one frame period, that is, the number of pulses corresponding to the amount of incident light to the pixel 202. The counter latch 226 outputs the counted number of pulses to the peripheral circuit unit 500 via the horizontal line 502 as a digital pixel signal. 【0041】 The counter latch 226, as an example, has a plurality of counter latch circuits that hold the value of each bit of the digital signal. More specifically, as shown in FIG. 4, the counter latch 226-1 has a plurality of counter latch circuits X 0 , X 1 , …, X m , X m+1 , …, X n (n, m are integers). Similarly, the counter latch 226-2 has a plurality of counter latch circuits Y 0 , Y 1 , …, Y m , Y m+1 , …, Y n (n, m are integers). The number of the plurality of counter latch circuits X 0 etc. and the number of the plurality of counter latch circuits Y 0 etc. are, as an example, the same n each other, and may be, for example, n = 12, 16, 17, etc. 【0042】 The plurality of counter latch circuits X 0 etc. and the plurality of counter latch circuits Y 0 etc. are, as an example, n flip-flop circuits, and each time a pulse is input from the conversion units 224-1, 224-2, it counts up the number of pulses to be held to hold the value of each bit, and changes the output in the range of 0 to 2 n . Thereby, the outputs of the plurality of counter latch circuits X 0 etc. and the plurality of counter latch circuits Y 0 etc. indicate the counted number of pulses. In this case, the counter latch 226 can also be referred to as an n-bit counter. 【0043】As shown in Figure 4, counter latches 226-1 and 226-2 are electrically connected to each other. That is, multiple counter latch circuits X 0 Multiple counter latch circuits Y 0 These components are electrically connected to each other. More specifically, counter latches 226-1 and 226-2 are provided with, for example, two switches 227-1 and 227-2, and multiple counter latch circuits X are formed by switching the two switches 227-1 and 227-2. 0 Etc. and multiple counter latch circuits Y 0 Some or all of these components can be electrically connected to each other. Note that counter latches 226-1 and 226-2 are examples of the first and second holding parts, and a plurality of counter latch circuits X 0 Multiple counter latch circuits Y 0 These are examples of multiple first holding circuits and multiple second holding circuits. 【0044】 Multiple counter latch circuits X 0 Etc. and multiple counter latch circuits Y 0 At least one of the counter latch circuits X is selectively used as the other additional counter latch circuit. In this embodiment, the modification unit 221 of the signal processing circuit group 220 controls the multiple counter latch circuits X 0 Etc. and multiple counter latch circuits Y 0 At least one of the counter latch circuits is selectively used as the other additional counter latch circuit. 【0045】 The modification unit 221 controls the switching of two switches 227-1 and 227-2 of counter latches 226-1 and 226-2, respectively, thereby creating multiple counter latch circuits X 0 Etc. and multiple counter latch circuits Y 0 Some or all of these are electrically connected to each other. That is, the modification unit 221 connects a plurality of counter latch circuits X 0 Etc. and multiple counter latch circuits Y 0In this embodiment, the number of counter latch circuits used as additional counter latch circuits for one of the other is dynamically changed. 【0046】 Figure 5 shows an example of the operation flow of the imaging method according to the first embodiment. In the example in Figure 5, the image sensor 100 pre-images the subject before capturing one frame of a still image of the subject (step S100). Pre-images may be preliminary imaging such as autofocus or photometering, i.e., calibration. Step S100 includes converting light into electric charge using a plurality of photoelectric conversion units 120 of the image sensor 100. 【0047】 The image sensor 100 determines, based on the information obtained by pre-imaging of the subject, whether to use one holding circuit as an additional holding circuit for the other holding circuit (step S101), and if it is to use it as an additional holding circuit (step S101: YES), it determines the number of such holding circuits (step S103). If step S101 is NO, the process proceeds to step S107. Step S101 may refer to the image sensor 100 determining, through pre-imaging, what the color balance of the subject is, whether it is white light, etc. Note that in white light, the output of green may be relatively high. 【0048】 Regarding the details of steps S101 to S103, in the example in Figure 4, the modification unit 221 modifies the counter latch circuit X of the counter latch 226-1 corresponding to pixel 202-1 for pixels 202-1 and pixels 202-2 which started accumulating together. m The bit value of the digital signal output from and the counter latch circuit Y of the counter latch 226-2 corresponding to pixel 202-2 m The bit values of the digital signals output from the device are read in real time. 【0049】Steps S101 to S103 also include converting the charge-based signals converted by the multiple photoelectric conversion units 120 of the image sensor 100 into digital signals. Steps S101 to S103 also include the modification unit 221 of the image sensor 100 selectively using at least one of the multiple counter latch circuits of one counter 226 as an additional counter latch circuit for the multiple counter latch circuits of the other counter latch 226. This means that the modification unit 221 of the image sensor 100 uses the multiple counter latch circuits X 0 The transition of the value of each bit of a digital signal held by the above, and multiple counter latch circuits Y 0 This includes dynamically changing the number of counter latch circuits used as the additional counter latch circuits described above, based on the changes in the value of each bit of the digital signal held by the above. 【0050】 The image sensor 100 switches switches 227-1 and 227-2 in the counter latch 226 appropriately according to the number of holding circuits determined in step S103 (step S105), then captures an image of the subject (step S107), outputs the image information to the image processing unit 24 of the imaging device 10 (step S109), and ends the flow. 【0051】 Following step S109, the image processing unit 24 of the imaging device 10 may demodulate the image based on the image data received from the image sensor 100, which includes multiple digital signals from multiple photoelectric conversion units 120. In this case, the modification unit 221 of the image sensor 100 transmits, along with the image data, information to the image processing unit 24 via the peripheral circuit unit 500 indicating the number of the above-mentioned numbers corresponding to the image data, that is, the number of other holding circuits used as additional holding circuits for one holding unit when outputting the digital signals included in the image data. The image processing unit 24 can demodulate the image based on this information and the image data. 【0052】The modification unit 221 retains the information until the counting for one frame period by the multiple counter latches 226 is completed. When the counting result from the multiple counter latches 226, i.e., image information, is output, the modification unit 221 may output the information together with the image information, for example as an image information header, to the peripheral circuit unit 500. 【0053】 This information can also be described as information indicating how multiple counter latch circuits were distributed among multiple counter latches 226. This information may, for example, be a 2-bit control signal. In this case, for example, the control signal
[00] indicates that the multiple counter latch circuits were not distributed, the control signal
[01] indicates that the upper 4 bits of one counter latch 226 are used as an additional holding circuit for the other counter latch 226, and the control signal
[10] indicates the opposite. 【0054】 Figure 6 shows an example of changing the configuration ratio of the two counter latch circuits 226 in the circuit configuration of Figure 4. In the example of Figure 6, the photoelectric conversion unit 120 of pixel 202-1 is configured to convert red light into electric charge, and the photoelectric conversion unit 120 of pixel 202-2 is configured to convert green light into electric charge. Alternatively, pixel 202-1 may be a blue B pixel and pixel 202-2 may be a green Gr pixel or Gb pixel. 【0055】 In the example shown in Figure 6, for example, if it is known through pre-imaging that white light is received, at least one of the multiple counter latch circuits of counter latch 226-1 corresponding to pixel 202-1 is used as an additional counter latch circuit of counter latch 226-2 corresponding to pixel 202-2. More specifically, as shown in Figure 6, the modification unit 221 switches the switch 227-1 of counter latch 226-1 to change the (m+1) to (n) counter latch circuits of counter latch 226-1 to the additional counter latch circuit Y of counter latch 226-2. n+1 From Y p It may be used as such. 【0056】Since the green output may be about twice the red output when using white light, instead of reducing the number of counter latches 226-1 corresponding to pixels 202-1 equipped with a red color filter, the number of counter latch circuits 226-2 corresponding to pixels 202-2 equipped with a green color filter can be increased to avoid saturation of the pulse count for pixels 202-2. 【0057】 Figure 7 shows another example of the configuration ratio of the two counter latch circuits 226 in the circuit configuration of Figure 4. In the first example of Figure 7, the photoelectric conversion unit 120 of pixel 202-1 and the photoelectric conversion unit 120 of pixel 202-2 are configured to convert light of the same specific color into electric charge. Pixels 202-1 and 202-2 may be, for example, both blue B pixels in a Bayer array, both red R pixels, both green Gr pixels, or green Gr pixels and Gb pixels. 【0058】 In the first example of Figure 7, the photoelectric conversion unit 120 of pixel 202-1 and the photoelectric conversion unit 120 of pixel 202-2 may receive, for example, white light. At least one of the multiple counter latch circuits of the counter latch 226-1 corresponding to pixel 202-1 is used as an additional counter latch circuit of the counter latch 226-2 corresponding to pixel 202-2. When these two pixels 202 are arranged close to each other, for example adjacent to each other, the output values of these pixels 202 are almost the same, and the higher bits are common to each other. In this case, the value of each bit of the digital signal held by the additional counter latch circuit of counter latch 226-2 may be a common value for the photoelectric conversion unit 120 of pixel 202-1 and the photoelectric conversion unit 120 of pixel 202-2. 【0059】 More specifically, as shown in Figure 7, the modification unit 221 switches the switch 227-1 of the counter latch 226-1, thereby changing the m+1 to n counter latch circuits of the counter latch 226-1, and the additional counter latch circuit Y of the counter latch 226-2. c(n+1) From Y c(p)It may also be used as follows. In this case, the counter latch circuit Y is the higher bit of the counter latch 226-2. c(m+1) From Y c(n) and additional anti-latch circuit Y c(n+1) From Y c(p) The modification unit 221 may instruct the peripheral circuit unit 500 to set the count value to a common value for the photoelectric conversion unit 120 of pixel 202-1 and the photoelectric conversion unit 120 of pixel 202-2. Note that, as shown in Figures 7 and 8, even if the higher bits of one counter latch 226 are used as additional higher bits of the other counter latch 226, the output value of the remaining lower bits of that counter latch 226 is retained. 【0060】 In the first example of Figure 7, pixels 202-1 and 202-2 are identical color pixels in a Bayer array, and the case of receiving white light was described. Alternatively, in the first example of Figure 7, pixels 202-1 and 202-2 may have a green, red, or blue color filter provided across the entire pixel section 50, or they may receive light in a special environment where a specific color of light, such as green light, red light, or blue light, is irradiated. 【0061】In the second example of Figure 7, the photoelectric conversion unit 120 of pixel 202-1 and the photoelectric conversion unit 120 of pixel 202-2 are configured to convert light of the same specific color into electric charge and to provide phase difference information. For example, these two pixels 202 are two of the four pixels of the same color in the quad Bayer array that shares a microlens, as described above, and are phase difference pixels, i.e., AF pixels. Furthermore, in this case, when the light of the specific color is incident on the two photoelectric conversion units 120 as a telephoto ray, that is, when the light of the specific color is incident perpendicularly, the light is incident on the two photoelectric conversion units 120 almost equally, so the output values of these pixels 202 are almost the same, and the higher bits are common to each other. Therefore, when light is incident perpendicularly on the two photoelectric conversion units 120, the value of each bit of the digital signal held by the additional counter latch circuit of the counter latch 226-2 may be set to a common value for both the photoelectric conversion unit 120 of pixel 202-1 and the photoelectric conversion unit 120 of pixel 202-2. 【0062】 On the other hand, when light of a specific color is incident at an oblique angle on the two photoelectric conversion units 120, the intensity of the light received by the two photoelectric conversion units 120 is likely to differ significantly, and the output values of these pixels 202 may differ significantly. As an example, let's assume that the light received intensity of pixel 202-2 is much greater than the light received intensity of pixel 202-1. Therefore, when light is incident at an oblique angle on the two photoelectric conversion units 120, as in the example in Figure 6, the value of each bit of the digital signal held by the multiple counter latch circuits and additional counter latch circuits of counter latch 226-2 may be set as the value of pixel 202-2, and the value of each bit of the digital signal held by the remaining counter latch circuits of counter latch 226-1 may be set as the value of pixel 202-1. 【0063】Furthermore, if the image sensor 100 implements both examples in Figure 6 and Figure 7, the information that the image sensor 100 provides to the image processing unit 24, indicating the number of the other holding circuits used as additional holding circuits for one holding unit when outputting a digital signal, may include information that distinguishes whether it is the example in Figure 6 or the example in Figure 7. For example, the control information
[11] as the two bits of control information described above may indicate that the upper bits of one holding unit have been transferred to the other holding unit, as in Figure 6, or that the upper bits of one holding unit have been made common to both holding units, as in Figure 7. 【0064】 Figure 8 shows another example of a change in the configuration ratio of the two counter latch circuits 226 in the circuit configuration of Figure 4. In the example of Figure 8, the photoelectric conversion unit 120 of pixel 202-1 and the photoelectric conversion unit 120 of pixel 202-2 are configured to convert light of the same specific color into electric charge. 【0065】 In the example shown in Figure 8, if it is known, for example, through pre-imaging, that the sensor receives light of a specific color, all of the multiple counter latch circuits of the counter latch 226-1 corresponding to pixel 202-1 are used as additional counter latch circuits for the counter latch 226-2 corresponding to pixel 202-2. When these two pixels 202 are arranged close to each other, for example adjacent to each other, the output values of these pixels 202 are almost the same. Therefore, if the modification unit 221 of the image sensor 100 determines that it needs to improve the sensitivity of light of a specific color, all of the multiple counter latch circuits of the counter latch 226-1 corresponding to pixel 202-1 may be used as additional counter latch circuits for the counter latch 226-2 corresponding to pixel 202-2. The image sensor 100 may operate in this manner when the user provides input to the operation unit 30 of the imaging device 10 to improve the sensitivity of light of a specific color. 【0066】 More specifically, as shown in Figure 8, the modification unit 221 switches the switch 227-1 of the counter latch 226-1, thereby changing the first to nth counter latch circuits of the counter latch 226-1, and the additional counter latch circuit Y of the counter latch 226-2.n+1 From Y q It may be used as such. 【0067】 For illustrative purposes in Figures 6 to 8, as an example, each counter latch 226 has two switches 227-1 and 227-2 placed at the locations shown in each figure. The number and arrangement of switches on each counter latch 226 are not limited to the illustrated example, and other numbers and arrangements may be adopted. Where to place the switches may be determined during circuit design according to the application of the imaging device 10. If this cannot be determined during circuit design, that is, if there is a possibility of applying it to at least one of the multi-purpose applications, multiple switches may be provided and switched as appropriate, or the number may be determined according to the expectation that this will generally cover the applications. 【0068】 Figure 9 shows another example of the operation flow of the imaging method according to the first embodiment. In the example in Figure 9, the image sensor 100 starts imaging to capture multiple frames of a moving image of the subject (step S200). Step S200 includes converting light into electric charge using multiple photoelectric conversion units 120 of the image sensor 100. 【0069】 Based on the information acquired by imaging the first frame, the image sensor 100 determines whether to use some or all of the multiple holding circuits of one holding unit as additional holding circuits of the other holding unit (step S201). Steps S203 to S205 are the same as steps S103 to S105 in the operation flow of Figure 5, so redundant explanations are omitted. 【0070】 The image sensor 100, following step S205, outputs the image information of the first frame to the image processing unit 24, etc. (step S207). If there is a next frame, it returns to step S201 (step S209: YES). If there is no next frame (step S209: NO), the flow ends. 【0071】As shown in the operation flow, the configuration ratio of the multiple holding units may be switched sequentially using the previous frame at the timing when the shutter button of the imaging device 10 is half-pressed, or during live view or video recording. For example, when imaging white light, the configuration ratio of the multiple holding units may be switched according to the user's manual setting of the white mode of the imaging device 10. 【0072】 With the image sensor 100 of this embodiment, which includes such a conversion unit 224 and counter latch 226, the dynamic range can be expanded and the counter latching can be made more efficient by autonomously and in real time changing the configuration ratio of multiple counter latch circuits in multiple counter latches 226. Furthermore, with the image sensor 100, it is possible to avoid increasing the circuit size by adding counter latch circuits. The image sensor 100, which includes such a conversion unit 224 and counter latch 226, may also be called a pulse count type image sensor. 【0073】 Figure 10 schematically shows an example of the circuit configuration of the two pixels 202 and the signal processing circuit group 220, as well as the peripheral circuit section 500 and the image processing unit 24 in the second embodiment. The image sensor 100 in the second embodiment differs from the image sensor 100 in the first embodiment in that, instead of a modification unit 221 that autonomously changes the ratio of the multiple holding units, it changes the ratio of the multiple holding units in response to instructions from, for example, the image processing unit 24, from a configuration outside the image sensor 100 of the imaging device 10. Another difference is that the peripheral circuit section 500 of the image sensor 100 includes a bit control signal generation unit 501. Other configurations of the image sensor 100 in the second embodiment are the same as the corresponding configurations of the image sensor 100 in the first embodiment, so the same reference numerals are used and redundant explanations are omitted. The same applies to subsequent embodiments. 【0074】 In this case, the image sensor 100 transmits image data from the peripheral circuit section 500 to the image processing unit 24. The image processing unit 24 demodulates the image based on the image data received from the image sensor. The image processing unit 24 further processes a plurality of counter latch circuits X based on the image data. 0Etc. and multiple counter latch circuits Y 0 The image sensor 100 receives a control signal indicating the number of counter latch circuits to be used as additional counter latch circuits for one of the other. The image sensor 100 then receives a control signal indicating the number of counter latch circuits X 0 Etc. and multiple counter latch circuits Y 0 This sets the number of counter latch circuits to be used as additional counter latch circuits for one of the other. 【0075】 More specifically, the bit control signal generation unit 501 of the peripheral circuit unit 500 may receive a set value from the image processing unit 24 via serial communication such as SPI communication, and write it to a register of the peripheral circuit unit 500. Based on the set value, the bit control signal generation unit 501 may determine a bit signal to set the number for each modification unit 221 of the plurality of signal processing circuit groups 220, and cause each modification unit 221 to hold the number. The set value may be a value set individually for each signal processing 162, or a value set commonly for the entire pixel unit 50. The set value may also be set for each pixel. Each modification unit 221 may have a shift register for holding the number. The image sensor 100 according to the second embodiment has the same effects as the image sensor 100 according to the first embodiment. 【0076】 In the above embodiments, the image sensor 100 was described as a pulse-count type image sensor. Compared to the time-integration type, which only shows whether the counter latch has saturated or not, the pulse-count type can measure in real time. The image sensor 100 can also be applied to AD conversion methods other than the pulse-count type. 【0077】 Figure 11 schematically shows an example of the circuit configuration of the two pixels 202 and the signal processing circuit group 220-1, as well as the peripheral circuit section 500, in the third embodiment. The image sensor 100 in the third embodiment is a single-slope type. The signal processing circuit group 220-1 in the third embodiment additionally includes a counter generation unit 223. 【0078】As shown in Figure 11, the conversion unit 224 uses a single-slope method and receives an analog value converted from the pixel 202 to a voltage level and a ramp wave that changes linearly on the time axis from a ramp voltage source. The conversion unit 224 outputs a "High" signal when the analog value is higher than the value of the ramp wave, and a "Low" signal when it is lower. The settings of the conversion unit 224 may be reversed. 【0079】 The counter generation unit 223 inputs the clock signal to the counter latch circuits of each bit of counter latches 226-1 and 226-2, and when the PWM signal described above is input to the counter latch circuit of each bit, all bits of counter latches 226-1 and 226-2 are simultaneously determined. 【0080】 In the signal processing circuit group 220 having such a configuration, the modification unit 221 can change the configuration ratio of the counter latch circuit for each bit by appropriately switching the two switches 227-1 and 227-2 in the two counter latches 226-1 and 226-2. 【0081】 Figures 12 to 14 show examples of changes in the configuration ratio of the two counter latch circuits 226 in the circuit configuration of Figure 11. The example in Figure 12 corresponds to the example in Figure 6 of the first embodiment, the example in Figure 13 corresponds to the example in Figure 7 of the first embodiment, and the example in Figure 14 corresponds to the example in Figure 8 of the first embodiment. Excessive explanations of these examples are omitted. The image sensor 100 according to the third embodiment also has the same effects as the image sensor 100 according to the first embodiment. 【0082】 In the above embodiments, the modified part 221 further comprises a plurality of counter latch circuits X 0 The transition of the value of each bit of a digital signal held by the above, and multiple counter latch circuits Y 0 The number of counter latch circuits used as the additional counter latch circuits described above may be dynamically changed based on the changes in the value of each bit of the digital signal held by the above. 【0083】 The modification unit 221, for example, controls the counter latch circuit X within a predetermined threshold time. mand counter latch circuit Y m If the output value of one of the counter latch circuits changes, it may be decided to use a portion of the other counter latch circuit as an additional counter latch circuit for the counter latch 226 that includes the one counter latch circuit. The modification unit 221 is the counter latch circuit X m and counter latch circuit Y m Among these, the one whose m-th bit output value changes earlier may be considered to have a higher probability of the pulse count of the corresponding pixel 202 saturating earlier. In this case, the modification unit 221 causes the other counter latch 226 to use the (m+1)th to nth bits, i.e., the (m+1)th to nth bits, as an additional counter latch circuit for the counter latch circuit of the counter latch 226 corresponding to the pixel 202. 【0084】 In the above embodiments, the pair of photoelectric conversion units 120 provided on at least one pair of pixels 202, etc., included in the plurality of pixel units 142 in the pixel section 50 may be symmetrically half-shielded from each other in order to provide phase difference information; that is, the pixel unit 142 including the pair of pixels 202, etc. may be of a discrete half-shielded type. The pixel signals output from the pair of pixels 202, etc., can be used not only as phase difference information but also as image information. Specifically, the pair of pixels 202, etc., can be arranged in close proximity to each other, and the separately outputting pixel signals can be added together to provide image information. 【0085】 Although the present invention has been described above using embodiments, the technical scope of the present invention is not limited to the scope described in the above embodiments. It will be apparent to those skilled in the art that various modifications or improvements can be made to the above embodiments. It will be clear from the claims that such modified or improved forms may also be included in the technical scope of the present invention. 【0086】It should be noted that the execution order of operations, procedures, steps, and stages in the apparatus, systems, programs, and methods shown in the claims, specifications, and drawings is not explicitly stated as "before," "prior to," etc., and that unless the output of a previous operation is used in a later operation, the operations can be performed in any order. Even if the operation flow in the claims, specifications, and drawings is described using phrases such as "first," "next," etc. for convenience, it does not mean that it is necessary to perform the operations in that order. [Other possible items] [Item 1] An image sensor comprising: a first photoelectric conversion unit that converts light into electric charge; a second photoelectric conversion unit that converts light into electric charge; a first conversion unit that converts a first signal based on the electric charge converted by the first photoelectric conversion unit into a first digital signal; a second conversion unit that converts a second signal based on the electric charge converted by the second photoelectric conversion unit into a second digital signal; a first holding unit that holds the first digital signal; and a second holding unit that holds the second digital signal and is electrically connected to the first holding unit. [Item 2] The image sensor according to Item 1, wherein the second photoelectric conversion unit is adjacent to the first photoelectric conversion unit. [Item 3] The image sensor according to Item 1, wherein the first conversion unit emits a pulse as the first digital signal each time the value of the first signal based on the charge converted by the first photoelectric conversion unit exceeds a threshold, the second conversion unit emits a pulse as the second digital signal each time the value of the second signal based on the charge converted by the second photoelectric conversion unit exceeds a threshold, the first holding unit counts and holds the number of pulses emitted from the first conversion unit, and the second holding unit counts and holds the number of pulses emitted from the second conversion unit. [Item 4] The image sensor according to any one of Items 1 to 3, wherein the first holding unit has a plurality of first holding circuits that hold the value of each bit of the first digital signal, and the second holding unit has a plurality of second holding circuits that hold the value of each bit of the second digital signal. [Item 5] The image sensor according to Item 4, wherein at least one of the plurality of first holding circuits is selectively used as an additional holding circuit for the second holding unit.[Item 6] The image sensor according to Item 4, wherein the first photoelectric conversion unit is configured to convert red light into electric charge, the second photoelectric conversion unit is configured to convert green light into electric charge, and when white light is received, at least one of the plurality of first holding circuits is used as an additional holding circuit for the second holding unit. [Item 7] The image sensor according to Item 4, wherein the first photoelectric conversion unit and the second photoelectric conversion unit are configured to convert light of the same specific color into electric charge, and at least one of the plurality of first holding circuits is used as an additional holding circuit for the second holding unit. [Item 8] The image sensor according to Item 7, wherein the value of each bit of the second digital signal held by the additional holding circuit of the second holding unit is a value common to the first photoelectric conversion unit and the second photoelectric conversion unit. [Item 9] The image sensor according to Item 7, wherein the first photoelectric conversion unit and the second photoelectric conversion unit are configured to provide phase difference information, and when light of a specific color is incident on the first photoelectric conversion unit and the second photoelectric conversion unit as a telephoto ray, the value of each bit of the second digital signal held by the additional holding circuit of the second holding unit is set to a value common to the first photoelectric conversion unit and the second photoelectric conversion unit. [Item 10] The image sensor according to Item 9, wherein when light of a specific color is incident on the first photoelectric conversion unit and the second photoelectric conversion unit at an oblique angle, the value of each bit of the second digital signal held by the plurality of second holding circuits and the additional holding circuit of the second holding unit is set to the value of the second photoelectric conversion unit, and the value of each bit of the first digital signal held by the remaining holding circuit of the first holding unit is set to the value of the first photoelectric conversion unit. [Item 11] The image sensor according to Item 4, further comprising a modification unit for dynamically changing the number of first holding circuits among the plurality of first holding circuits to be used as additional holding circuits for the second holding unit.[Item 12] The image sensor according to Item 11, wherein the modification unit dynamically changes the number based on the transition of the values of each bit of the first digital signal held by the plurality of first holding circuits, and the transition of the values of each bit of the second digital signal held by the plurality of second holding circuits. [Item 13] An imaging unit comprising the image sensor according to Item 11, and an image processing unit that demodulates an image based on image data including the first digital signal and the second digital signal received from the image sensor, wherein the image sensor transmits information indicating the number corresponding to the image data, along with the image data, to the image processing unit. [Item 14] Imaging unit comprising: an image sensor as described in Item 4; and an image processing unit that demodulates an image based on image data including the first digital signal and the second digital signal received from the image sensor, wherein the image processing unit transmits a control signal to the image sensor indicating the number of first holding circuits from among the plurality of first holding circuits to be used as additional holding circuits for the second holding unit, based on the image data; and the image sensor sets the number of first holding circuits from among the plurality of first holding circuits to be used as additional holding circuits for the second holding unit according to the control signal. [Item 15] An imaging method comprising: converting light into electric charge in a first photoelectric conversion unit; converting light into electric charge in a second photoelectric conversion unit; converting a first signal based on the electric charge converted by the first photoelectric conversion unit into a first digital signal; converting a second signal based on the electric charge converted by the second photoelectric conversion unit into a second digital signal; and selectively using at least one first holding circuit from a plurality of first holding circuits for holding the value of each bit of the first digital signal as an additional holding circuit for a plurality of second holding circuits for holding the value of each bit of the second digital signal.[Item 16] The imaging method according to Item 15, wherein selectively using at least one first holding circuit as the additional holding circuit includes dynamically changing the number of first holding circuits to be used as the additional holding circuit based on the transition of the values of each bit of the first digital signal held by the plurality of first holding circuits and the transition of the values of each bit of the second digital signal held by the plurality of second holding circuits. 【0087】 10 Imaging device 20 Optical system 22 Optical axis 24 Image processing unit 26 Control unit 28 Recording unit 30 Operation unit 32 Display unit 34 Power supply unit 36 Bus line 50 Pixel unit 60 Drive control unit 62 Vertical drive unit 64 Signal processing unit 68 Horizontal drive unit 70 Output unit 100 Image sensor 120 Photoelectric conversion unit 122 Node 122A Diffusion unit 122B Wiring 126 Reset unit 140 First semiconductor substrate 142 Pixel unit 150 Second semiconductor substrate 202, 202-1, 202-2 Pixel 220 Signal processing circuit group 221 Modification unit 222, 222-1, 222-2 Signal processing circuit 223 Counter generation unit 224, 224-1, 224-2 Conversion unit 224A Comparison section 224A-1 First input terminal 224A-2 Second input terminal 224A-3 Output terminal 226, 226-1, 226-2 Counter latch 227-1, 227-2, 227-3, 227-4 Switch 500 Peripheral circuit section 501 Bit control signal generation section 502 Horizontal line
Claims
1. An image sensor comprising: a first photoelectric conversion unit that converts light into electric charge; a second photoelectric conversion unit that converts light into electric charge; a first conversion unit that converts a signal based on the electric charge converted by the first photoelectric conversion unit into a first digital signal; a second conversion unit that converts a signal based on the electric charge converted by the second photoelectric conversion unit into a second digital signal; a first holding unit that holds the first digital signal converted by the first conversion unit; a second holding unit that holds the second digital signal converted by the second conversion unit; and a connecting unit that electrically connects the first holding unit and the second holding unit.
2. The image sensor according to claim 1, wherein the first holding portion has a first holding region for holding a digital signal and a second holding region for holding a digital signal, and the connecting portion is an image sensor that connects the first holding region and the second holding portion.
3. The image sensor according to claim 2, wherein the connection portion connects the first holding region and the second holding portion in series.
4. An image sensor according to claim 3, wherein the first digital signal is held in the second holding region, and the second digital signal is held in the first holding region and the second holding portion.
5. The image sensor according to claim 4, wherein the first photoelectric conversion unit converts light transmitted through a first filter that transmits light in a first wavelength range into an electric charge, and the second photoelectric conversion unit converts light transmitted through a second filter that transmits light in a second wavelength range into an electric charge.
6. The image sensor according to claim 4, wherein the first photoelectric conversion unit converts light transmitted through a first filter that transmits light in a first wavelength range into an electric charge, and the second photoelectric conversion unit converts light transmitted through a second filter that transmits light in the first wavelength range into an electric charge.
7. An image sensor according to claim 4, wherein the first digital signal is used for focus detection, and the second digital signal is used for focus detection.
8. The image sensor according to claim 1, wherein the first holding portion has a first holding region for holding a digital signal and a second holding region for holding a digital signal, the second holding portion has a third holding region for holding a digital signal and a fourth holding region for holding a digital signal, and the connecting portion is an image sensor that connects the first holding region and the third holding region.
9. The image sensor according to claim 8, wherein the connection portion connects the first holding region and the third holding region in series.
10. An image sensor according to claim 9, wherein the first digital signal is held in the first holding region, the third holding region and the second holding region, and the second digital signal is held in the first holding region, the third holding region and the fourth holding region.
11. The image sensor according to claim 10, wherein the first photoelectric conversion unit converts light transmitted through a first filter that transmits light in a first wavelength range into an electric charge, and the second photoelectric conversion unit converts light transmitted through a second filter that transmits light in a second wavelength range into an electric charge.
12. An image sensor according to claim 10, wherein the first photoelectric conversion unit converts light transmitted through a first filter that transmits light in a first wavelength range into an electric charge, and the second photoelectric conversion unit converts light transmitted through a second filter that transmits light in the first wavelength range into an electric charge.
13. An image sensor according to claim 8, wherein the first digital signal is used for focus detection, and the second digital signal is used for focus detection.
14. An image sensor according to claim 8, wherein the first holding region is a region of higher bits than the second holding region, and the third holding region is a region of higher bits than the fourth holding region.
15. An image sensor according to claim 1, wherein the connection portion connects the first holding portion and the second holding portion in series.
16. An image sensor according to claim 15, wherein the first digital signal is held in the first holding unit and the second holding unit.
17. The image sensor according to claim 16, wherein the first photoelectric conversion unit converts light transmitted through a first filter that transmits light in a first wavelength range into an electric charge, and the second photoelectric conversion unit converts light transmitted through a second filter that transmits light in a second wavelength range into an electric charge.
18. An image sensor according to claim 16, wherein the first photoelectric conversion unit converts light transmitted through a first filter that transmits light in a first wavelength range into an electric charge, and the second photoelectric conversion unit converts light transmitted through a second filter that transmits light in the first wavelength range into an electric charge.
19. The image sensor according to claim 15, wherein the first holding portion is an image sensor having higher bits than the second holding portion.
20. The image sensor according to claim 1, wherein the connection portion controls the connection between the first holding portion and the second holding portion in a second period following the first period, based on a first digital signal based on the charge converted by the first photoelectric conversion portion in a first period and a second digital signal based on the charge converted by the second photoelectric conversion portion in a first period.
21. An image sensor according to claim 20, wherein the first holding portion has a first holding region for holding a digital signal and a second holding region for holding a digital signal, and the connecting portion connects the first holding region and the second holding portion in the second period based on a first digital signal based on a charge converted by the first photoelectric conversion portion in the first period and a second digital signal based on a charge converted by the second photoelectric conversion portion in the first period.
22. The image sensor according to claim 21, wherein the connecting portion connects the first holding region and the second holding portion during the second period when the difference between the signal value of the second digital signal and the signal value of the first digital signal is greater than a predetermined value during the first period.
23. The image sensor according to claim 22, wherein the connection portion connects the first holding region and the second holding portion in series.
24. An image sensor according to claim 23, wherein the first digital signal is held in the second holding region, and the second digital signal is held in the first holding region and the second holding portion.
25. The image sensor according to claim 20, wherein the first holding portion has a first holding region for holding a digital signal and a second holding region for holding a digital signal, the second holding portion has a third holding region for holding a digital signal and a fourth holding region for holding a digital signal, and the connecting portion connects the first holding region and the third holding region in the second period based on a first digital signal based on a charge converted by the first photoelectric conversion unit in the first period and a second digital signal based on a charge converted by the second photoelectric conversion unit in the first period.
26. The image sensor according to claim 25, wherein the connecting portion connects the first holding region and the third holding region during the second period when the difference between the signal value of the second digital signal and the signal value of the first digital signal is less than a predetermined value during the first period.
27. An image sensor according to claim 20, wherein the connection portion connects the first holding portion and the second holding portion in series during the second period based on a first digital signal based on a charge converted by the first photoelectric conversion portion during the first period and a second digital signal based on a charge converted by the second photoelectric conversion portion during the first period.
28. The image sensor according to claim 27, wherein the connection portion connects the first holding portion and the second holding portion in series during the second period when the difference between the signal value of the second digital signal and the signal value of the first digital signal is greater than a predetermined value during the first period.
29. An imaging device comprising the image sensor described in any one of claims 1 to 28.