Photovoltaic cell, module and photovoltaic system

Abstract

The present disclosure is applicable to the technical field of photovoltaics. Provided are a photovoltaic cell, a module and a photovoltaic system. The cell comprises: a first tunneling layer; a first doped layer; a second tunneling layer stacked in second regions and in preset regions of spacing regions and in contact with the first doped layer; an insulating dielectric layer; and a second doped layer covering a first portion and a wrapping portion of the second tunneling layer.

Description

Photovoltaic cells, modules and photovoltaic systems

[0001] Cross-references

[0002] This disclosure incorporates, in its entirety, Chinese Patent Application No. 202423107288.0, filed on December 16, 2024, entitled “A Back Contact Battery, Battery Module and Photovoltaic System”. Technical Field

[0003] This disclosure belongs to the field of photovoltaic technology, and in particular relates to a back contact battery, battery module and photovoltaic system. Background Technology

[0004] Currently, in solar cells, back-contact cells are cells where both the emitter and base contact electrodes are placed on the back (not the front) of the cell. The front of the cell is not obstructed by any metal electrodes, thus effectively improving the efficiency of back-contact cells.

[0005] During module operation, when external obstructions block the solar cells, hot spots can appear on the blocked cells. At high temperatures, this can easily lead to carbonization of the encapsulation film and even cause a fire. In back-contact solar cells of relevant technologies, two different doped layers are typically electrically connected at a local location to form a leakage point, reducing the reverse breakdown voltage and thus improving the hot spot resistance and reducing the risk of hot spots. However, while current back-contact solar cells can improve hot spot resistance, they also result in poor performance and low conversion efficiency.

[0006] Therefore, how to improve the heat spot resistance of back contact batteries while ensuring their conversion efficiency has become a technical problem that engineers urgently need to solve.

[0007] Public content

[0008] This disclosure provides a back-contact battery designed to address the issue of improving the heat-spot resistance of the back-contact battery while maintaining its conversion efficiency.

[0009] This disclosure is achieved as follows: a back contact battery includes:

[0010] A silicon substrate having a backlight surface and a light-facing surface disposed opposite to each other, wherein a first region, a spaced region and a second region are alternately disposed on the backlight surface of the silicon substrate along a first direction, the first region, the spaced region and the second region extend along a second direction, and the second direction intersects the first direction;

[0011] A first tunneling layer is stacked in the first region;

[0012] A first doped layer is stacked on the first tunneling layer;

[0013] The second tunneling layer is stacked in a predetermined area of ​​the second region and the interval region, and extends along the sidewall of the predetermined area near the first region to contact the side of the first doped layer near the second region in the first direction;

[0014] An insulating dielectric layer is stacked on the first doped layer, and within a predetermined region of the spacer region, the insulating dielectric layer has an extension portion extending in a first direction to the spacer region, wherein the extension portion extends beyond the first doped layer in the first direction.

[0015] The second doped layer covers a first portion and a wrapping portion above the second tunneling layer. The wrapping portion wraps around two opposing sides of the insulating dielectric layer along the thickness direction of the cell and the side of the insulating dielectric layer close to the second doped layer along a first direction. The second doped layer has a different polarity from the first doped layer.

[0016] In some embodiments, the difference in distance between different locations of the extension portion and the surface of the silicon substrate along the first cross section in the first direction is less than or equal to 30 nm.

[0017] In some embodiments, along the second cross section in the first direction, the extension portion extends toward the bottom surface of the interval region, and one end of the wrapping portion along the first direction does not contact the first portion.

[0018] In some embodiments, along a third cross section in the first direction, the extension portion extends toward the bottom surface of the interval region, the end of the wrapping portion near the second region contacts the first portion, and a cavity is formed between the wrapping portion and the first portion.

[0019] In some embodiments, along a fourth cross section in the first direction, the extension extends toward the bottom surface of the interval region, and the extension does not contact the second tunneling layer, the wrapping portion contacts the first portion, and there is no void between the wrapping portion and the first portion.

[0020] In some embodiments, along the fifth section in the first direction, the extension extends toward the bottom surface of the interval region and contacts the second tunneling layer, and there is no void between the wrapping portion and the first portion.

[0021] In some embodiments, a through-hole is formed on the extension portion, the through-hole connecting a second doped layer on both sides of the extension portion.

[0022] In some embodiments, the outer diameter of the cavity is 10 nm to 500 nm.

[0023] In some embodiments, along the first direction, the first doped layer has a protrusion extending into the spacer region, and the second tunneling layer covers the surface of the protrusion toward the silicon substrate.

[0024] In some embodiments, the angle between the surface of the first doped layer and the second doped layer that forms a leakage contact and the surface of the silicon substrate is an acute angle, and the side of the first doped layer facing the second region has a first recessed area.

[0025] In some implementations, the side surface of the first doped layer is curved.

[0026] In some embodiments, in the first direction, the silicon substrate has a silicon wafer extension that extends and is suspended over the spacer, the silicon wafer extension also having the first doped layer, the cross-sectional profile of the silicon wafer extension being triangular, and the angle between the surface of the silicon wafer extension facing the second region and the surface of the first region being an acute angle.

[0027] In some embodiments, the silicon wafer extension has an extension length of 0.1 μm to 3 μm in the first direction.

[0028] This disclosure also provides a battery assembly including the aforementioned back contact battery.

[0029] This disclosure also provides a photovoltaic system including the aforementioned battery module.

[0030] The beneficial effects achieved by this disclosure are as follows: a first tunneling layer and a first doped layer are disposed on a first region; a second tunneling layer is stacked on a predetermined region of the second region and the spacer region, extending along the sidewall of the predetermined region near the first region to contact the side of the first doped layer near the second region in a first direction. An insulating dielectric layer is stacked on the first doped layer, and within the predetermined region of the spacer region, the insulating dielectric layer has an extension portion extending along the first direction into the spacer region. The second doped layer covers and surrounds the outer contours of the second tunneling layer and the insulating dielectric layer. The second doped layer and the first doped layer form a leakage contact at the sidewall position of the predetermined region near the first region, thereby improving the hot spot resistance of the back contact battery. Simultaneously, the extension portion of the insulating dielectric layer enhances the passivation effect at the leakage contact location, optimizing the efficiency of the back contact battery. Furthermore, the wrapping design of the second doped layer increases the contact area with the second tunneling layer, ensuring more reliable electrical contacts in the second region and the spacer region, thus contributing to improved charge collection efficiency. Attached Figure Description

[0031] Figure 1 is a schematic diagram of the planar structure of the back contact battery provided in an embodiment of this disclosure;

[0032] Figure 2 is a cross-sectional view of the back contact battery along line AA in Figure 1.

[0033] Figure 3 is a cross-sectional view of the back contact battery along line BB in Figure 1;

[0034] Figure 4 is a cross-sectional view of the back contact battery along line CC in Figure 1.

[0035] Figure 5 is a cross-sectional view of the back contact battery along line DD in Figure 1.

[0036] Figure 6 is a cross-sectional view of the back contact battery along line EE in Figure 1;

[0037] Figure 7 is a cross-sectional view of the back contact battery along line FF in Figure 1;

[0038] Figure 8 is a cross-sectional schematic diagram of a back contact battery provided in an embodiment of this disclosure;

[0039] Figure 9 is another cross-sectional view of the back contact battery provided in an embodiment of this disclosure;

[0040] Explanation of reference numerals in the attached drawings: 100, back contact cell; 101, silicon substrate; 1011, silicon wafer extension; 110, first region; 120, second region; 130, spacer region; 1301, preset position; 102, first tunneling layer; 103, first doped layer; 1031, protruding portion; 1032, first recessed region; 104, second tunneling layer; 105, insulating dielectric layer; 1051, extension portion; 1052, through-hole; 106, second doped layer; 1061, first portion; 1062, wrapping portion; 1063, void. Detailed Implementation

[0041] To make the objectives, technical solutions, and advantages of this disclosure clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this disclosure, and should not be construed as limiting this disclosure. Furthermore, it should be understood that the specific embodiments described herein are merely for explaining this disclosure and are not intended to limit this disclosure.

[0042] In the description of this disclosure, it should be understood that the terms “length”, “width”, “upper”, “lower”, “left”, “right”, “horizontal”, “top”, “bottom”, etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this disclosure and simplifying the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this disclosure.

[0043] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the stated features. In the description of this disclosure, "a plurality of" means two or more, unless otherwise explicitly specified.

[0044] In the description of this disclosure, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linkage" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection, an electrical connection, or a connection that allows communication between them; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication between two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this disclosure according to the specific circumstances.

[0045] In this disclosure, unless otherwise expressly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0046] The following disclosure provides numerous different embodiments or examples for implementing various structures of this disclosure. To simplify the disclosure, specific examples of components and arrangements are described below. These are merely examples and are not intended to limit the scope of this disclosure. Furthermore, reference numerals and / or letters may be repeated in different examples; such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed. In addition, various specific examples of processes and materials are provided in this disclosure, but those skilled in the art will recognize the application of other processes and / or the use of other materials.

[0047] In this disclosure, a first tunneling layer and a first doped layer are disposed on a first region. A second tunneling layer is stacked on a predetermined region of a second region and a spacer region, extending along the sidewall of the predetermined region near the first region to contact the side of the first doped layer near the second region along a first direction. An insulating dielectric layer is stacked on the first doped layer, and within the predetermined region of the spacer region, the insulating dielectric layer has an extension portion extending along the first direction into the spacer region. The second doped layer covers and surrounds the outer contours of the second tunneling layer and the insulating dielectric layer. The second doped layer and the first doped layer form a leakage contact at the sidewall position of the predetermined region near the first region, thereby improving the hot spot resistance of the back contact battery. Simultaneously, the extension portion of the insulating dielectric layer enhances the passivation effect, optimizing the efficiency of the back contact battery. Furthermore, the wrapping design of the second doped layer increases the contact area with the second tunneling layer, ensuring more reliable electrical contacts in the second region and the spacer region, thus contributing to improved charge collection efficiency.

[0048] Example 1

[0049] As shown in Figures 1 and 2, this embodiment provides a back contact battery 100, comprising:

[0050] A silicon substrate 101 has a backlight surface and a light-facing surface disposed opposite to each other. A first region 110, a spacer region 130 and a second region 120 are alternately disposed on the backlight surface of the silicon substrate 101 along a first direction. The first region 110, the spacer region 130 and the second region 120 extend along a second direction and intersect with the first direction.

[0051] The first tunnel layer 102 is stacked in the first region 110;

[0052] A first doped layer 103 is stacked on the first tunneling layer 102;

[0053] The second tunneling layer 104 is stacked in a preset region of the second region 120 and the spacer region 130, and extends along the side wall of the preset region near the first region 110, and contacts the side of the first doped layer 103 near the second region 120 in the first direction.

[0054] An insulating dielectric layer 105 is stacked on the first doped layer 103 and has an extension portion 1051 extending in a first direction to the spacer region 130, wherein the extension portion 1051 extends in the first direction beyond the first doped layer 103.

[0055] The second doped layer 106 covers the first portion 1061 and the wrapping portion above the second tunneling layer 104. The wrapping portion wraps around the insulating dielectric layer 105 on both sides opposite to each other along the thickness direction of the cell, and on the side of the insulating dielectric layer 105 close to the second doped layer 106 along the first direction. The second doped layer 106 has a different polarity from the first doped layer 103.

[0056] The silicon substrate 101 has two main surfaces: a light-facing surface and a back-lighting surface. The light-facing surface directly faces the sunlight, while the back-lighting surface is on the other side. The two surfaces are positioned opposite each other.

[0057] Three distinct regions—a first region 110, a spacer region 130, and a second region 120—are arranged alternately on the backlight surface of the silicon substrate 101. Specifically, a plurality of first regions 110 and a plurality of second regions 120 are alternately arranged along a first direction. A spacer region 130 is provided between the first regions 110 and the second regions 120, meaning adjacent first regions 110 and second regions 120 are separated by the spacer region 130. The first regions 110, spacer regions 130, and second regions 120 all extend along a second direction, which intersects the first direction. The first regions 110, spacer regions 130, and second regions 120 can be alternately arranged along the transverse direction of the silicon substrate 101 and both extend along the longitudinal direction. That is, the first direction can be the transverse direction of the back contact battery 100, and the second direction can be the longitudinal direction of the back contact battery 100, with the two directions perpendicular to each other. Of course, in other embodiments, the first and second directions can also be other directions; for example, they can be the diagonal directions of the silicon substrate 101, and no specific limitation is made here.

[0058] As one example, as shown in Figure 2, in the direction from the light-facing surface to the backlight-facing surface, the surface of the first region 110 may be higher than the surfaces of the spacer region 130 and the second region 120. That is, in the thickness direction of the silicon substrate 101, the spacer region 130 and the second region 120 are closer to the light-facing surface of the silicon substrate region than the first region 110.

[0059] A first tunneling layer 102 is stacked on the first region 110, and a first doped layer 103 is stacked on the first tunneling layer 102. The tunneling layer can be made of materials such as silicon oxide (SiOx) or silicon nitride (SiNx), forming a tunneling effect that allows electrons or holes to pass through efficiently, reducing resistance loss and improving the extraction efficiency of charge carriers.

[0060] The second tunneling layer 104 is stacked in the second region 120 and the predetermined region of the isolation region, and extends along the sidewall of the isolation region near the first region 110, and contacts the first doped layer 103. It is understood that since the first doped layer 103 and the first tunneling layer 102 are stacked, the side of the first tunneling layer 102 near the spacer region 130 becomes part of the sidewall of the isolation region near the first region 110. As the second tunneling layer 104 extends along the sidewall of the isolation region near the first region 110 until it contacts the first doped layer 103, it will inevitably contact the first tunneling layer 102; that is, the second tunneling layer 104 contacts both the first tunneling layer 102 and the first doped layer 103. The second tunneling layer 104 can be made of the same material as the first tunneling layer 102, or a different material; no limitation is made here.

[0061] An insulating dielectric layer 105 is stacked on at least a portion of the first doped layer 103, and within a predetermined region of the spacer region, the insulating dielectric layer 105 has an extension portion 1051 extending along a first direction to the spacer region 130. The extension portion 1051 extends in the first direction beyond the first doped layer 103. That is, the extension portion 1051 extends in the first direction to protrude (or, in other words, exceed) the first doped layer 103.

[0062] The second doped layer 106 includes a first portion 1061 covering the second tunneling layer 104 and a wrapping portion. The wrapping portion wraps around the insulating dielectric layer 105 on both sides opposite each other along the thickness direction of the solar cell, and on the side of the insulating dielectric layer 105 close to the second doped layer 106 along a first direction. The second doped layer 106 has a different polarity than the first doped layer 103. The first portion 1061 covers the second tunneling layer 104, meaning that regardless of the position and orientation of the second tunneling layer 104, its outer layer always covers the first portion 1061. The second doped layer 106 is configured to cover and wrap around the outermost exposed contour of the already arranged first tunneling layer 102, first doped layer 103, second tunneling layer 104, and insulating dielectric layer 105 (in reality, only the second tunneling layer 104 and the insulating dielectric layer 105 are exposed on the outermost layer).

[0063] The first doped layer 103 and the second doped layer 106 have opposite polarities. Specifically, the first doped layer 103 can be a P-type doped layer and the second doped layer 106 can be an N-type doped layer, or the first doped layer 103 can be an N-type doped layer and the second doped layer 106 can be a P-type doped layer. The first and second polar doped layers form regions with different electrical characteristics, supporting the formation of the PN junction and the separation of charge carriers.

[0064] Within the first region 110, an insulating dielectric layer 105 is disposed between the first doped layer 103 and the second doped layer 106, providing electrical isolation between them and preventing large-area electrical contact from forming between them within the first region 110. Near the sidewall of the first region 110 in a predetermined area, a leakage contact is formed between the second doped layer 106 and the first doped layer 103 through a second tunneling layer 104. In this document, "leakage contact" refers to a point where there is no insulation between the first doped layer 103 and the second doped layer 106, but rather leakage current conduction forms a leakage point.

[0065] When the solar cell is generating electricity normally, the leakage contact areas of the first doped layer 103 and the second doped layer 106 also perform photoelectric conversion to generate electricity, thereby increasing the power output of the solar cell. When the solar cell is shaded, insufficient light will cause the current output of the shaded part to decrease, thereby increasing the voltage of that part. The leakage contact area forms a conductive path, and other solar cells connected in series with it provide reverse current to the shaded solar cell. A composite leakage current of appropriate magnitude can be generated between the first doped layer 103 and the second doped layer 106 of the solar cell, reducing the voltage across the shaded solar cell (exemplarily, the voltage is less than the sum of the voltages of other solar cells connected in series with this solar cell and not shaded). The heat generation power of the solar cell will decrease, thereby reducing the high heat risk of hot spot effect.

[0066] It should be noted that in the embodiments of this disclosure, "preset position 1301" can be understood as the entire interval region 130 or a part of the interval region 130, and there is no specific limitation here. As shown in FIG1, in some embodiments, the preset position 1301 is preferably a part of the interval region 130. In this case, the number of preset positions 1301 in each interval region 130 can be single or multiple. As shown in FIG1, in a single interval region 130, multiple preset positions 1301 can be spaced apart along the second direction, and there is no specific limitation here.

[0067] Furthermore, in the embodiments of this disclosure, the number of interval regions 130 with preset positions 1301 can be single or multiple, and there is no specific limitation herein. In some embodiments, the number of preset positions 1301 can be multiple, which can be evenly distributed on the back side of the back contact battery 100.

[0068] The insulating dielectric layer 105 may be a dielectric layer with insulating function. For example, in some embodiments, the insulating dielectric layer 105 may be a borosilicate glass layer, a phosphosilicate glass layer, or a borosilicate phosphosilicate glass layer. In other embodiments, the insulating dielectric layer 105 may have an insulating silicon oxide layer, a silicon nitride layer, etc. Furthermore, in some embodiments, the insulating dielectric layer 105 may be a single-layer structure or a multi-layer structure; no specific limitation is made herein.

[0069] In this embodiment, a first tunneling layer 102 and a first doped layer 103 are disposed on a first region 110. A second tunneling layer 104 is stacked on a predetermined region of a second region 120 and a spacer region 130, extending along the sidewall of the predetermined region near the first region 110 to contact the side of the first doped layer 103 near the second region 120 in a first direction. An insulating dielectric layer 105 is stacked on the first doped layer 103, and within the predetermined region of the spacer region, the insulating dielectric layer 105 has an extension portion 1051 extending along the first direction to the spacer region 130. A second doped layer 106 covers and surrounds the outer contours of the second tunneling layer 104 and the insulating dielectric layer 105. The second doped layer 106 and the first doped layer 103 form a leakage contact at the sidewall position of the predetermined region near the first region 110, thereby improving the hot spot resistance of the back contact battery 100. Simultaneously, the extension portion 1051 of the insulating dielectric layer 105 enhances the passivation effect at the leakage contact location, optimizing the efficiency of the back contact battery 100. Furthermore, the wrapping design of the second doped layer 106 can increase the contact area with the second tunneling layer 104, ensuring more reliable electrical contacts in the second region 120 and the isolation region, and helping to improve charge collection efficiency.

[0070] Furthermore, in embodiments of this disclosure, the back contact battery 100 may further include a first electrode (not shown) and a second electrode (not shown). A back passivation film (not shown) may also be provided on the back side of the silicon substrate 101, which may cover the entire back side. The first electrode may be located in the first region 110 and penetrate the back passivation film to form an ohmic contact with the first doped layer 103 and be insulated from the second doped layer 106. For example, the first electrode may be located at a position where the first doped layer 103 is not covered by the extended portion 1051, and the second electrode may be located in the second region 120 and penetrate the back passivation film to form an ohmic contact with the second doped layer 106.

[0071] Example 2

[0072] In some embodiments, the difference in distance between different locations of the extension portion 1051 and the surface of the silicon substrate 101 along the first cross section in the first direction is less than or equal to 30 nm.

[0073] As shown in Figure 2, at a first cross-section along the first direction (Figure 2 is a schematic cross-sectional view of the first cross-section, which is the cross-section formed along line AA in Figure 1), the extension portion 1051 extends into the interval region 130. That is, along the first direction, the extension portion 1051 has multiple cross-sections, which are arranged parallel to each other along the second direction. At one of the cross-sections of the extension portion 1051, the extension portion 1051 extends into the interval region 130. It should be noted that, in this document, the cross-section along the first direction refers to the cross-section taken from the back contact battery 100 along the first direction.

[0074] At the first cross-section, the extension portion 1051 extends in a direction parallel to the surface of the silicon substrate 101, and the extension portion 1051 is approximately parallel to the surface of the silicon substrate 101. The wrapping portion of the second doped layer 106 wraps around the extension portion 1051, that is, the wrapping portion 1062 is attached to the outer surface of the extension portion 1051. Since the extension portion 1051 has a regular shape, it is beneficial for the second doped layer 106 to attach. At the location where the second doped layer 106 and the first doped layer 103 form leakage doping, a stable doped structure can also be formed, which helps to stably reduce the reverse breakdown voltage at this location, reduce the risk of breakdown under high reverse voltage, increase the leakage effect of the bypass diode when the cell has hot spots, effectively bypass the current, and reduce local overheating.

[0075] Example 3

[0076] As shown in Figure 3, in some embodiments, the second cross section along the first direction (Figure 3 is a cross-sectional schematic diagram of the second cross section; exemplarily, the second cross section can be the cross section formed along line BB in Figure 1), the extension portion 1051 extends toward the bottom surface of the spacing region 130, and one end of the wrapping portion along the first direction does not contact the first portion 1061.

[0077] It is understood that by adopting the solution of this embodiment, setting the extension portion 1051 to extend toward the bottom surface of the spacer region 130, the process difficulty can be significantly reduced; and during the formation of the film layer (e.g., the second tunneling layer, the second doped layer), the extension portion 1051 extending toward the bottom surface of the spacer region 130 will not have a significant impact on the deposition process, thus a stable leakage contact structure can be formed.

[0078] Furthermore, it is understood that incident light entering the interior of the solar cell from the light-facing surface may further reach the extension portion 1051 from multiple directions. Therefore, the extension portion 1051 is configured in various forms, such as the forms in Embodiment 2 and Embodiment 3, so that the incident light reaching the extension portion 1051 can be further reflected into the interior of the solar cell, thereby improving the light absorption rate.

[0079] Example 4

[0080] As shown in Figure 4, in some embodiments, along the third section in the first direction (Figure 4 is a cross-sectional view of the fourth section; exemplarily, the fourth section can be the section formed along line CC in Figure 1), the extension portion 1051 extends toward the bottom surface of the interval region 130, the end of the wrapping portion near the second region 120 contacts the first portion 1061, and a cavity 1063 is formed between the wrapping portion and the first portion 1061.

[0081] It is understood that by adopting the solution of this embodiment, the difficulty of further depositing a passivation layer and an antireflection layer on the second doped layer can be reduced, the quality of the passivation layer and the antireflection layer can be improved, and the passivation and antireflection effects can be enhanced.

[0082] Furthermore, it is understood that incident light entering the interior of the solar cell from the light-facing surface of the solar cell may reach the extension portion 1051 from multiple directions. Therefore, the extension portion 1051 is configured in various forms, such as the forms in Embodiment 2 and Embodiment 4, so that the incident light reaching the extension portion 1051 can be further reflected into the interior of the solar cell, thereby improving the light absorption rate.

[0083] In some embodiments, the outer diameter of the cavity 1063 is 10 nm to 500 nm.

[0084] In this way, while ensuring that the void 1063 can release the local stress of the second doped layer 106, the contact area of ​​the second doped layer 106 forming a leakage contact with the first doped layer 103 through the second tunneling layer 104 is not affected.

[0085] Specifically, in such an embodiment, the outer diameter of the cavity 1063 can be, for example, any value between 10nm, 20nm, 30nm, 40nm, 50nm, 60nm, 70nm, 80nm, 90nm, 100nm, 150nm, 200nm, 250nm, 300nm, 350nm, 400nm, 450nm, 500nm, or 10nm-500nm.

[0086] Example 5

[0087] As shown in Figure 5, in some embodiments, along the fourth section in the first direction (Figure 5 is a cross-sectional view of the fourth section; exemplarily, the fourth section can be the section formed along line DD in Figure 1), the extension portion 1051 extends toward the bottom surface of the interval region 130, and the extension portion 1051 does not contact the second tunneling layer 104, the wrapping portion contacts the first portion 1061, and there is no void 1063 between the wrapping portion and the first portion 1061.

[0088] It is understood that by adopting the solution of this embodiment, the difficulty of further depositing a passivation layer and an antireflection layer on the second doped layer can be reduced, the quality of the passivation layer and the antireflection layer can be improved, and the passivation and antireflection effects can be enhanced.

[0089] Furthermore, it is understood that incident light entering the interior of the solar cell from the light-facing surface of the solar cell may further reach the extension portion 1051 from multiple directions. Therefore, the extension portion 1051 is configured in various forms, such as the forms in Embodiment 2 and Embodiment 5, so that the incident light reaching the extension portion 1051 can be further reflected into the interior of the solar cell, thereby improving the light absorption rate.

[0090] Example 6

[0091] As shown in Figure 6, in some embodiments, along the fifth section in the first direction (Figure 6 is a cross-sectional schematic diagram of the fifth section; exemplarily, the fifth section can be the section formed along line EE in Figure 1), the extension portion 1051 extends toward the bottom surface of the interval region 130, and the extension portion 1051 contacts the second tunneling layer 104, and there is no void 1063 between the wrapping portion and the first portion 1061.

[0092] The extension portion 1051 extends toward the bottom surface of the spacer region 130 until it contacts the second tunneling layer 104, that is, the extension portion 1051 and the second tunneling layer 104 form a closed space. Parts of the wrapping portion 1062 and the first portion 1061 of the second doped layer 106 are enclosed within this closed space, while other portions are located outside the closed space. There is no gap between the wrapping portion 1062 and the first portion 1061; that is, the wrapping portion 1062 and the first portion 1061 enclosing the closed space completely fill the closed space (the second doped layer 106 completely fills the closed space), and the wrapping portion 1062 and the first portion 1061 located outside the closed space are in contact with each other without any voids 1063 at the contact point.

[0093] The design of this enclosed space surrounds the side of the extension 1051 facing the silicon substrate 101 inside the back contact cell 100, thereby relatively reducing its specific surface area. A smaller specific surface area can reduce the surface state density per unit area of ​​the cell, reduce the surface recombination rate, which is beneficial to improving the open circuit voltage and conversion efficiency of the cell, as well as extending the carrier lifetime, allowing more carriers to participate in energy conversion and improving the overall performance of the cell.

[0094] In summary, in this disclosure, at different cross-sections, the extension portion 1051 and the second tunnel layer 104 form different shapes; at some cross-sections, they form a closed shape, and at some cross-sections, they form a non-closed shape.

[0095] As shown in FIG7, in some embodiments, a through hole 1052 is formed on the extension portion 1051 (FIG7 is a cross-sectional view at the sixth section, and by way of example, the sixth section can be the section formed along line FF in FIG1). The through hole 1052 connects the second doped layer 106 on both sides of the extension portion 1051.

[0096] Compared to the fifth section, the sixth section has a through-hole 1052 on the extension 1051. By forming the through-hole 1052 on the extension 1051, it is convenient to deposit the second doped layer 106 in the closed space enclosed by the extension 1051 and the second tunneling layer 104. At the same time, the second doped layer 106 inside and outside the closed space can form a conductive contact through the through-hole 1052. In other continuous positions, the second doped layer 106 inside and outside the closed space is isolated by the extension 1051, which can avoid the second doped layer 106 inside and outside the closed space from forming contact and causing excessive efficiency loss, and can also improve the passivation effect.

[0097] Specifically, in such an embodiment, the through hole 1052 on the extension portion 1051 can be single or multiple, and no specific limitation is made here.

[0098] As shown in Figure 7, at the sixth cross-section, the extension 1051 and the second tunneling layer 104 form a closed pattern. At the fifth cross-section, the extension 1051 and the second tunneling layer 104 together form a non-closed pattern with an opening, which allows the second doped layer 106 to connect through the opening of the non-closed pattern, thereby enabling the first doped layer 103 and the second doped layer 106 to form a leakage contact. This design of the extension 1051 reduces the efficiency loss caused by leakage contact.

[0099] Example 7

[0100] As shown in FIG8, in some embodiments, along a first direction, a first doped layer 103 has a protrusion 1031 extending into a spacer region 130, and a second tunneling layer 104 covers the surface of the protrusion 1031 toward the silicon substrate 101.

[0101] Both the extension portion 1051 and the protrusion portion 1031 extend towards the spacer region 130, but the extension length of the extension portion 1051 is greater than that of the protrusion portion 1031. The side of the protrusion portion facing away from the silicon substrate 101 contacts the insulating dielectric layer 105, and the side of the protrusion portion facing the silicon substrate 101 is covered by a second doped layer 106. The protrusion portion is part of the first doped layer 103, and the side of the protrusion portion near the spacer region 130 is the side of the first doped layer 103, which contacts the second tunneling layer 104. The second doped layer 106 covers the second tunneling layer 104, and also correspondingly covers the second tunneling layer 104 on the side of the protrusion portion facing the silicon substrate 101. The protrusion portion 1031 increases the contact area for leakage contact between the first doped layer 103 and the second doped layer 106, thereby optimizing electrical contact and charge transport performance.

[0102] Example 8

[0103] As shown in FIG9, in some embodiments, the angle between the surface of the first doped layer 103 and the second doped layer 106 forming a leakage contact and the surface of the silicon substrate 101 is an acute angle, and the first doped layer 103 has a first recessed region 1032 on the side facing the second region 120.

[0104] Thus, by setting the angle between the leakage contact surface of the first doped layer 103 and the surface of the first region 110 to an acute angle and forming a first recessed region 1032201 on the leakage contact surface, the second doped layer 106 can be deposited more easily to form a leakage contact with the first doped layer 103.

[0105] In some embodiments, the surfaces where the first doped layer 103 and the second doped layer 106 form a leakage contact are curved. This increases the leakage contact area between the first doped layer 103 and the second doped layer 106, thereby improving the resistance to hot spots.

[0106] It is understood that in any preset region of the solar cell, or in different preset regions, the multiple cross sections along the first direction can be one of Embodiments 2 to 8, or a combination of at least two of them. Specifically, it can be a combination of Embodiments 2 and 3, a combination of Embodiments 3 and 4, a combination of Embodiments 4, 5, and 6, a combination of Embodiments 2, 4, 6, and 7, a combination of Embodiments 3, 5, 7, and 8, or all combinations of Embodiments 2 to 8. No exhaustive list has been given, and other combinations are not excluded. The adjacent cross sections are parallel to each other along the second direction. Incident light entering the interior of the solar cell from the light-facing surface may further reach the extension portion 1051 from multiple directions. Therefore, the extension portion 1051 is configured in various forms to further reflect the incident light reaching the extension portion 1051 into the interior of the solar cell, thereby improving the light absorption rate.

[0107] Example 9

[0108] As shown in Figures 8 and 9, in some embodiments, in a first direction, the silicon substrate 101 has a silicon wafer extension 1011 extending and suspended over the spacer, and the silicon wafer extension 1011 is also provided with a first doped layer 103. The cross-sectional profile of the silicon wafer extension 1011 is triangular, and the angle between the surface of the silicon wafer extension 1011 facing the second region 120 and the surface of the first region is an acute angle.

[0109] In a first direction, the silicon substrate 101 has a silicon wafer extension 1011 extending and suspended over the spacer region 130. The silicon wafer extension 1011 is also provided with a first doped layer 103 (i.e., the upper surface of the silicon wafer extension 1011 shown in the figure is provided with the first doped layer 103). The cross-sectional profile of the silicon wafer extension 1011 is triangular, and the angle between the surface of the silicon wafer extension 1011 facing the spacer region 130 and the surface of the first region 110 (i.e., the lower surface of the silicon wafer extension 1011 shown in the figure) is an acute angle.

[0110] Thus, by controlling the etching process, the side of the spacer region 130 of the silicon substrate 101 can have a recessed structure, which can play a role in limiting the gas source during the deposition process of the second doped layer 106. The diffusion of the gas source is restricted here, which can effectively reduce the doping concentration at the interface between the second doped layer 106 and the silicon substrate, reduce the interface recombination rate, increase the collection probability of charge carriers, and effectively eliminate local stress.

[0111] In some embodiments, the extension length of the silicon wafer extension 1011 in the first direction may be 0.1 μm-3 μm.

[0112] Thus, by controlling the extension length of the silicon wafer extension 1011 within this reasonable range, the interface recombination rate can be further optimized to achieve better carrier collection efficiency.

[0113] Specifically, the extension length of the silicon wafer extension 1011 in the first direction can be, for example, any value between 0.1μm, 0.2μm, 0.4μm, 0.6μm, 0.8μm, 1μm, 1.2μm, 1.4μm, 1.6μm, 1.8μm, 2μm, 2.2μm, 2.4μm, 2.6μm, 2.8μm, 3μm, or 0.1μm-3μm.

[0114] Example 9

[0115] This embodiment also provides a battery assembly, including the back contact battery 100 described above.

[0116] A battery module may include multiple back-contact solar cells. These multiple back-contact solar cells in the battery module can be connected in series to form a battery string. The battery strings can be connected in series, in parallel, or in a series-parallel combination to achieve current collection and output. For example, the connection between the individual cells can be achieved by welding solder strips, or the connection between the individual battery strings can be achieved by busbars.

[0117] The battery module may also include a metal frame, a backsheet, photovoltaic glass, and an encapsulating film (not shown in the figures). The encapsulating film may be filled between the front and photovoltaic glass, the back and backsheet of the back contact cell 100, and adjacent cells. As a filler, it may be a transparent colloid with good light transmittance and aging resistance. For example, the encapsulating film may be an EVA film or a POE film. The specific choice can be made according to the actual situation and is not limited here.

[0118] Photovoltaic glass can be applied to the encapsulating film on the front side of the back contact cell 100. The photovoltaic glass can be ultra-clear glass, which has high light transmittance, high transparency, and superior physical, mechanical, and optical properties. For example, ultra-clear glass can achieve a light transmittance of over 92%. It can protect the back contact cell 100 while minimizing impact on its efficiency. Simultaneously, the encapsulating film bonds the photovoltaic glass and the back contact cell 100 together, providing sealing, insulation, and waterproofing / moisture protection for the back contact cell 100.

[0119] The backsheet can be attached to the adhesive film on the back of the back contact cell 100. The backsheet provides protection and support for the back contact cell 100, and has reliable insulation, water resistance, and aging resistance. Multiple options are available for the backsheet, typically tempered glass, acrylic glass, aluminum alloy TPT composite adhesive film, etc., and the specific choice is determined based on the specific circumstances and is not limited here. The backsheet, back contact cell 100, adhesive film, and photovoltaic glass can be mounted on a metal frame. The metal frame serves as the main external support structure for the entire battery module, providing stable support and installation. For example, the battery module can be installed at the desired location using the metal frame.

[0120] The beneficial effects of the battery assembly in this embodiment are equivalent to those of the back contact battery 100 described above, and will not be repeated here.

[0121] Example 10

[0122] This embodiment also provides a photovoltaic system, including the battery module described above.

[0123] Photovoltaic systems can be applied in photovoltaic power plants, such as ground-mounted, rooftop, and floating power plants, as well as in equipment or devices that utilize solar energy to generate electricity, such as user solar power supplies, solar streetlights, solar cars, and solar buildings. Of course, it's understandable that the application scenarios of photovoltaic systems are not limited to these; that is, photovoltaic systems can be applied in all fields that require solar energy to generate electricity. Taking a photovoltaic power generation network as an example, a photovoltaic system can include photovoltaic arrays, combiner boxes, and inverters. A photovoltaic array can be a combination of multiple battery modules; for example, multiple battery modules can form multiple photovoltaic arrays. The photovoltaic arrays are connected to combiner boxes, which collect the current generated by the photovoltaic arrays. The collected current flows through an inverter and is converted into AC power required by the mains grid before being connected to the mains grid to achieve solar power supply.

[0124] The beneficial effects of the photovoltaic system in this embodiment are equivalent to the beneficial effects of the battery module described above, and will not be repeated here.

[0125] The above are merely preferred embodiments of this disclosure and are not intended to limit this disclosure. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this disclosure should be included within the scope of protection of this disclosure.

Claims

1. A back contact cell, comprising: a silicon substrate having a back surface and a front surface oppositely arranged, a first region, a spacer region and a second region being alternately arranged along a first direction on the back surface of the silicon substrate, the first region, the spacer region and the second region extending along a second direction intersecting the first direction; a first tunnel layer being stacked on the first region; a first doped layer being stacked on the first tunnel layer; a second tunnel layer being stacked on the second region and the spacer region at a preset region, and extending along a side wall of the preset region close to the first region, and contacting a side of the first doped layer close to the second region along the first direction; an insulating medium layer being stacked on the first doped layer, and having an extension part extending to the spacer region along the first direction at the preset region of the spacer region, wherein the extension part extends to beyond the first doped layer along the first direction; a second doped layer including a first part covering the second tunnel layer and a wrapping part wrapping two sides of the insulating medium layer opposite along a thickness direction of the cell, and a side of the insulating medium layer close to the second doped layer along the first direction, the second doped layer having a polarity different from that of the first doped layer. A distance difference between different positions of the extension part and a surface of the silicon substrate along a first cross section in the first direction is less than or equal to 30 nm. Along a second cross section in the first direction, the extension part extends towards a bottom surface of the spacer region, and an end of the wrapping part along the first direction is not in contact with the first part. Along a third cross section in the first direction, the extension part extends towards the bottom surface of the spacer region, an end of the wrapping part close to the second region is in contact with the first part, and a cavity is formed between the wrapping part and the first part. Along a fourth cross section in the first direction, the extension part extends towards the bottom surface of the spacer region, the extension part is not in contact with the second tunnel layer, the wrapping part is in contact with the first part, and no cavity is formed between the wrapping part and the first part. Along a fifth cross section in the first direction, the extension part extends towards the bottom surface of the spacer region, the extension part is in contact with the second tunnel layer, and no cavity is formed between the wrapping part and the first part. A via hole is formed on the extension part, and the via hole is in communication with the second doped layer on both sides of the extension part. An outer diameter of the cavity is 10 nm-500 nm. Along the first direction, the first doped layer has a protruding part extending outwards to the spacer region, and the second tunnel layer covers a surface of the protruding part towards the surface of the silicon substrate. An included angle between a surface of the first doped layer forming a leakage contact with the second doped layer and a surface of the silicon substrate is an acute angle, and a first recessed region is formed on a side of the first doped layer towards the second region. The side of the first doped layer is a curved surface. ​ ​ ​ ​ ​ ​ 2. The back contact cell of claim 1, wherein, ​ 3. The back contact cell of claim 1, wherein, ​ 4. The back contact cell of claim 1, wherein, ​ 5. The back contact cell of claim 1, wherein, ​ 6. The back contact cell of claim 1, wherein, ​ 7. The back contact cell of claim 6, wherein, ​ 8. The back contact cell of claim 4, wherein, ​ 9. The back contact cell of claim 1, wherein, ​ 10. The back contact cell of claim 1, wherein, ​ 11. The back contact cell of claim 10, wherein, ​ 12. The back contact cell of claim 1, wherein, In the first direction, the silicon substrate has a silicon wafer extension that extends and is suspended over the spacer. The silicon wafer extension is also provided with the first doped layer. The cross-sectional profile of the silicon wafer extension is triangular, and the angle between the surface of the silicon wafer extension facing the second region and the surface of the first region is an acute angle.

13. The back contact cell of claim 12, wherein, The silicon wafer extension has an extension length of 0.1 μm to 3 μm in the first direction.

14. A battery assembly comprising a back contact battery as described in any one of claims 1-13.

15. A photovoltaic system comprising the battery module of claim 14.