AOV-based signal processing apparatus and method, and electronic device
By using the event detection and response interface group of MCU and SOC chips in AOV mode, combined with switching circuit and RC delay circuit, the problems of event loss and system crash during state switching in AOV mode are solved, and reliable transmission and processing of event signals are realized.
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- ZHEJIANG UNIVIEW TECH CO LTD
- Filing Date
- 2025-07-01
- Publication Date
- 2026-07-02
Smart Images
Figure CN2025106470_02072026_PF_FP_ABST
Abstract
Description
Signal processing device and method based on AOV, and electronic equipment
[0001] Cross-reference of related applications
[0002] This disclosure claims priority to Chinese Patent Application No. 2024119506362, filed on December 27, 2024, entitled “AOV-based signal processing apparatus and method, and electronic device”, which is incorporated herein by reference in its entirety. Technical Field
[0003] This disclosure relates to the field of AOV camera technology, such as an AOV-based signal processing apparatus and method, and electronic equipment. Background Technology
[0004] AOV (Always On-line Video) is a low-power, all-time recording technology. When a camera enters AOV mode, it captures an image at set intervals, analyzes the image to see if a specific target (such as a person or vehicle) is present. If a target is found, the camera switches to wake-up mode (normal operation); otherwise, it remains in sleep mode (low-power standby). AOV mode solves many problems inherent in traditional passive infrared (PIR) sensors, such as the inability to record 24 / 7, susceptibility to false alarms and missed alarms, and short detection range. Furthermore, AOV mode has a wide range of applications, suitable for locations requiring 24 / 7 monitoring, such as scenic areas, rural areas, agricultural and pastoral areas, forestry areas, and aquaculture areas. These areas may lack power grid or network connectivity; AOV mode enables low-frame-rate recording.
[0005] In practice, during the transition from sleep to wake-up mode in AOV mode, event loss is common, causing numerous inconveniences. Summary of the Invention
[0006] This disclosure provides a signal processing device and method based on AOV, as well as an electronic device, to solve the problem of event loss that easily occurs during the transition from sleep state to wake-up state after entering AOV mode in the prior art, and to prevent the occurrence of event loss in AOV mode.
[0007] This disclosure provides a signal processing device based on AOV (Area of Effect) technology, including a microcontroller unit (MCU) chip and a system-on-a-chip (SOC) chip. The MCU chip includes multiple event detection interface groups and a first processing unit. The SOC chip includes a non-electrical module, which includes multiple event response interface groups corresponding to the multiple event detection interface groups, and a second processing unit. When the first processing unit detects an event, it sends the event to the first event response interface group corresponding to the first event detection interface group in the SOC chip through the first event detection interface group. The event transmission occurs during the period when the non-electrical module switches from a sleep state to a wake-up state in AOV mode. The second processing unit detects the multiple event response interface groups and, if the first event response interface group receives an event, acquires the event.
[0008] According to the AOV-based signal processing device provided in this disclosure, it further includes: a switching circuit; the MCU chip further includes: a first interface configured to transmit an interrupt signal; the SOC chip further includes a constant-power module, the constant-power module including a second interface configured to receive an interrupt signal, and the non-constant-power module further includes a third interface configured to control its power-on; the first interface, the second interface, and the third interface are all connected to the switching circuit; in AOV mode, when the non-constant-power module switches from a sleep state to a wake-up state, the level on the third interface undergoes a first change from low level to high level, and the switching circuit switches from interrupt to conduction after the first change occurs, and communication between the first interface and the second interface is interrupted when the switching circuit is conduction; in AOV mode, when the non-constant-power module switches from a wake-up state to a sleep state, the level on the third interface undergoes a second change from high level to low level, and the switching circuit switches from conduction to interruption after the second change occurs, and communication between the first interface and the second interface is normal when the switching circuit is interrupted.
[0009] According to the signal processing device based on AOV provided in this disclosure, it further includes: an RC delay circuit, which is disposed between the first interface and the second interface.
[0010] According to the AOV-based signal processing apparatus provided in this disclosure, each of the multiple event detection interface groups includes an event notification interface and an event confirmation interface; each of the multiple event response interface groups includes an event receiving interface and an event response interface; when a first processing unit detects an event, it sends the event to the first event response interface group corresponding to the first event detection interface group in the SOC chip through the first event detection interface group, including: when the first processing unit detects an event, it sends an event signal of the event to the event receiving interface in the first event response interface group through the event notification interface in the first event detection interface group; and, if the event confirmation interface in the first event detection interface group receives a confirmation signal within a set time interval, it determines that the event reception was successful; when a second processing unit detects that the first event response interface group has received an event, it acquires the event, including: when the second processing unit detects that the event receiving interface in the first event response interface group has received an event signal, it acquires the event; and, if the event response interface in the first event response interface group receives a confirmation signal, it sends a confirmation signal to the event confirmation interface in the first event detection interface group.
[0011] According to the AOV-based signal processing device provided in this disclosure, when a first processing unit detects an event, it sends the event to a first event response interface group corresponding to the first event detection interface group in the SOC chip through a first event detection interface group among multiple event detection interface groups. The device further includes: if the first processing unit detects that the event confirmation interface in the first event detection interface group has not received a confirmation signal within a set time interval, it determines a second event detection interface group among the multiple event detection interface groups; the first processing unit sends an event signal of the event to the event receiving interface in the second event response interface group through an event notification interface in the second event detection interface group; the second event response interface group corresponds to the second event detection interface group.
[0012] This disclosure also provides an AOV-based signal processing method, applied to a SOC chip in any of the above-mentioned AOV signal processing devices. The method includes: detecting multiple event response interface groups; and acquiring an event when a first event response interface group among the multiple event response interface groups receives an event. The event originates from an MCU chip, and when the MCU chip detects an event, it sends the event to a first event response interface group corresponding to the first event detection interface group in the SOC chip through the first event detection interface group among the multiple event detection interface groups. The event transmission occurs during the period when the non-electric module in AOV mode switches from a sleep state to a wake-up state.
[0013] According to the signal processing method based on AOV provided in this disclosure, each of the multiple event detection interface groups includes: an event notification interface and an event confirmation interface; each of the multiple event response interface groups includes: an event receiving interface and an event response interface; when an event is detected to be received by the first event response interface group in the multiple event response interface groups, the event is acquired, including: when an event signal is detected to be received by the event receiving interface in the first event response interface group, the event is acquired; and, through the event response interface in the first event response interface group, an confirmation signal is sent to the event confirmation interface in the first event detection interface group.
[0014] This disclosure also provides an AOV-based signal processing method, applied to an MCU chip in any of the above-mentioned AOV signal processing devices. The method includes: detecting whether an event has occurred; when an event is detected, sending the event to a first event response interface group corresponding to the first event detection interface group in the SOC chip through a first event detection interface group among a plurality of event detection interface groups, so as to instruct the SOC chip to acquire the event when it detects that the first event response interface group has received the event; wherein the sending of the event occurs during the period when the non-electric module in AOV mode switches from a sleep state to a wake-up state.
[0015] According to the AOV-based signal processing method provided in this disclosure, each of the multiple event detection interface groups includes an event notification interface and an event confirmation interface; each of the multiple event response interface groups includes an event receiving interface and an event response interface; when an event is detected, the event is sent to the first event response interface group corresponding to the first event detection interface group in the SOC chip through the first event detection interface group, including: when an event is detected, sending an event signal of the event through the event notification interface in the first event detection interface group; if the event confirmation interface in the first event detection interface group receives the event signal of the event within a set time interval, it is determined that the event reception was successful.
[0016] This disclosure also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement any of the above-described AOV-based signal processing methods.
[0017] This disclosure also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the AOV-based signal processing method as described above.
[0018] This disclosure also provides a computer program product, including a computer program that, when executed by a processor, implements the AOV-based signal processing method as described above.
[0019] The signal processing apparatus and method based on AOV, and the electronic device disclosed herein, include an AOV-based signal processing apparatus comprising an MCU chip and a SOC chip. The MCU chip includes multiple event detection interface groups and a first processing unit. The SOC chip includes a non-electrical module, which includes multiple event response interface groups corresponding to the multiple event detection interface groups, and a second processing unit. When the first processing unit detects an event, it sends the event to the first event response interface group corresponding to the first event detection interface group in the SOC chip through the first event detection interface group. The event transmission occurs during the transition of the non-electrical module from a sleep state to a wake-up state in AOV mode. The second processing unit detects the multiple event response interface groups and, upon detecting that the first event response interface group has received an event, acquires the event. Therefore, this disclosure provides a device capable of entering AOV mode that notifies and acquires events by setting multiple event detection interface groups and multiple event response interface groups. In this case, the notification and acquisition of events are no longer affected by the switching process between wake-up and sleep states in AOV mode. Attached Figure Description
[0020] Figure 1 is a schematic diagram of the interaction between the MCU chip and the SOC chip in the AOV mode in the prior art.
[0021] Figure 2 is a schematic diagram of the level change on the power supply control pin of the SOC chip in the AOV mode in the prior art.
[0022] Figure 3 is one of the structural schematic diagrams of the AOV-based signal processing device provided in the embodiments of this disclosure.
[0023] Figure 4 is a second schematic diagram of the structure of the AOV-based signal processing device provided in the embodiments of this disclosure.
[0024] Figure 5 is a third schematic diagram of the structure of the AOV-based signal processing device provided in the embodiments of this disclosure.
[0025] Figure 6 is a fourth schematic diagram of the AOV-based signal processing device provided in the embodiments of this disclosure.
[0026] Figure 7 is the fifth schematic diagram of the AOV-based signal processing device provided in the embodiments of this disclosure.
[0027] Figure 8 is a schematic diagram of the structure of the AOV-based signal processing device provided in the embodiments of this disclosure.
[0028] Figure 9 is one of the flowcharts of the AOV-based signal processing method provided in the embodiments of this disclosure.
[0029] Figure 10 is a second schematic flowchart of the AOV-based signal processing method provided in the embodiments of this disclosure.
[0030] Figure 11 is a schematic diagram of the structure of the electronic device provided in this disclosure. Detailed Implementation
[0031] The technical solutions in this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are some embodiments of this disclosure, but not all embodiments.
[0032] As shown in Figure 1, the implementation of AOV relies on a System-on-Chip (SOC) chip and a Microcontroller Unit (MCU) chip. The SOC chip and the MCU chip can exchange signals.
[0033] Please refer to Figure 1. The SOC chip includes a constant-power module and a non-constant-power module. The constant-power module has an uninterruptible power-on (UPS) I / O interface, which includes a power supply control pin (not shown in Figure 1). The MCU chip has an external trigger interface, which includes an external trigger pin (not shown in Figure 1). The UPS I / O interface is electrically connected to the external trigger interface.
[0034] Referring to Figure 2, the arrows in Figure 2 indicate the changes in the power supply control pin level in each of the first to sixth stages of the prior art. When the arrow points horizontally (e.g., in the first, third, fourth, and fifth stages of Figure 2), it indicates that the power supply control pin level remains unchanged. When the arrow points diagonally upward (e.g., in the second stage of Figure 2), it indicates that the power supply control pin level changes from low to high. When the arrow points diagonally downward (e.g., in the fifth stage of Figure 2), it indicates that the power supply control pin level changes from high to low. It is evident that the level changes on the power supply control pin in the second and sixth stages are unique compared to the level changes in other stages. The main problem this application aims to solve occurs in the aforementioned second stage (event loss). Furthermore, in addition to addressing the event loss problem in the second stage, other technical means can be added to solve the problem in the sixth stage. The problems caused by the level changes on the power supply control pin in the second and sixth stages will be explained below.
[0035] Combining Figures 1 and 2, the power-on process (i.e., switching from sleep state to wake-up state) and power-off process (switching from wake-up state to sleep state) of the SOC chip in AOV mode can be divided into the following six stages.
[0036] Phase 1: The SOC chip is in sleep mode. At this time, the non-electric module is powered off, the power supply control pin is at a low level, and the external trigger pin on the MCU chip is at a low level.
[0037] The second stage: Every preset time interval (similar to a heartbeat mechanism, such as every 1 second), the SOC chip pulls the level on the power supply control pin high, so that the low level on the power supply control pin becomes a high level. Under this condition, the hardware in the SOC chip (including hardware components such as the power supply control pin and each pin) starts to power on.
[0038] During hardware power-up, when a new external trigger signal is loaded onto the external trigger interface, the power supply control pin is already at a high level, making it impossible to respond to the new external trigger signal. Simultaneously, since the SOC software only starts powering on after the SOC hardware has finished powering on, it also cannot respond to the new external trigger signal based on the SOC software. Ultimately, although a new external trigger signal arrives, it cannot be responded to, resulting in event loss.
[0039] Phase 3: After the SOC hardware is powered on, the SOC software begins to power on.
[0040] When the SOC software starts powering on, it can begin receiving and responding to externally triggered signals, processing the events corresponding to those signals. During this process, the SOC software checks for external triggers (i.e., whether it has received an external trigger signal) at set time intervals. If an external trigger is detected, it remains awake; otherwise, it enters sleep mode.
[0041] Phase 4: After the SOC software powers on, it enters normal operating mode. During this phase, external triggers are handled in the same way as in Phase 3.
[0042] Fifth stage: The SOC software detects that there is no external trigger within the set time interval and starts to power down. If an external trigger is received during this process, the handling method for the external trigger is the same as in the third stage above. In the fifth stage, the power supply control pin level is still high.
[0043] Phase 6: The SOC software power-down is complete, and the SOC hardware begins to power down. During this period, the power supply control pin changes from high level to low level.
[0044] During the initial power-down phase of the SOC hardware, the SOC chip normally enters a sleep state after this phase ends. Then, after a preset time, the SOC chip pulls the power supply control pin high again to enter a wake-up state. However, in the sixth phase, during the falling edge of the power supply control pin, the pin has already started to go low. If an external trigger signal (such as an alarm detection or active current pulling signal) is received at this time, the chip will respond by pulling the power supply control pin high again. This causes the SOC hardware to be powered on again before it is fully powered down. In this situation, the power supply control pin may not change from low to high (because the level has not yet been pulled low before being pulled high again), thus not triggering a SOC software restart. Meanwhile, the SOC software has already been powered down and entered a suspend process. This results in a situation where the SOC software cannot be started regardless of external triggers, leading to a system crash.
[0045] The AOV-based signal processing device provided in the embodiments of this disclosure is described below with reference to Figure 3.
[0046] Figure 3 is one of the structural schematic diagrams of the AOV-based signal processing device provided in this disclosure. As shown in Figure 3, the AOV-based signal processing device 30 includes: an MCU chip 31 and a SOC chip 32.
[0047] Referring to Figure 3, the MCU chip 31 includes multiple event detection interface groups 3110 and a first processing unit 3120.
[0048] One or more interfaces can be set in the multiple event detection interface group 3110.
[0049] Referring to Figure 3, the SOC chip 32 includes an uninterruptible module 321, which includes multiple event response interface groups 3211 and a second processing unit 3212.
[0050] Multiple event response interface groups 3211 correspond one-to-one with multiple event detection interface groups 3110.
[0051] As shown in Figure 3, each of the multiple event detection interface groups 3110 is electrically connected to its corresponding event response interface group 3211. In this case, each event detection interface group 3110 and its corresponding event response interface group 3211 can transmit electrical signals.
[0052] The first processing unit 3120 is configured to, upon detecting an event, send the event to the first event response interface group corresponding to the first event detection interface group in the SOC chip via the first event detection interface group among the multiple event detection interface groups 3110. The sending of this event occurs during the transition of the non-electric module from sleep state to wake-up state in AOV mode.
[0053] The second processing unit 3212 is configured to detect multiple event response interface groups 3211, and acquire the event when the first event response interface group receives an event.
[0054] In some embodiments, the first event detection interface group can be any one of multiple event detection interface groups.
[0055] In some embodiments, corresponding event detection interface groups can be set in advance for events of different types or importance based on information such as the type and importance of the event. Each event is sent to the event response interface group corresponding to the event detection interface group in the SOC chip through its corresponding event detection interface group.
[0056] Based on the aforementioned AOV-based signal processing device 30, in AOV mode, during the transition from sleep state to wake-up state, after the power supply control pin is pulled high, when an event occurs, the MCU chip can send the event to the corresponding event response interface group in the SOC chip through one of the multiple event detection interface groups. After the SOC chip switches from sleep state to wake-up state, the software in the non-electric module 321 in the SOC chip has been powered on, and the second processing unit 3212 can obtain the event through the event response interface group, thereby solving the problem of event loss during the transition from sleep state to wake-up state in AOV mode and effectively preventing the occurrence of event loss in AOV mode.
[0057] In some embodiments, as shown in FIG4, the MCU chip 31 further includes a first interface 312 configured to send an interrupt signal (i.e., the externally triggered signal mentioned above). The SOC chip 32 further includes a constant power module 322, which includes a second interface 3221 configured to receive the interrupt signal. The non-constant power module 321 in the SOC chip further includes a third interface 3213 configured to control its power-on. In this case, the AOV signal processing device 30 further includes a switching circuit 33.
[0058] As shown in Figure 4, the first interface 312, the second interface 3221 and the third interface 3213 are all connected to the switching circuit 33.
[0059] The second interface 3221 is electrically connected to the first interface 312, and in this case, the second interface 3221 and the first interface 312 can communicate with each other.
[0060] A pin (not shown in Figure 4) can be provided in the first interface 312, which has the same function as the external trigger pin described in the prior art.
[0061] A pin (not shown in Figure 4) can be set in the second interface 3221, which has the same function as the power supply control pin described in the prior art.
[0062] The third interface 3213 can be configured with a pin, which can be any internal pull-up resistor (PU) that is a general purpose input / output (GPIO). GPIO is a function-multiplexed pin brought out from inside the chip.
[0063] Referring to Figure 4, in AOV mode, the non-electric module 321 switches from sleep state to wake-up state, and the level on the third interface 3213 changes from low level to high level. After the first change occurs, the switch circuit 33 switches from interrupt to conduction. When the switch circuit 33 is on, the communication between the first interface 312 and the second interface 3221 is interrupted.
[0064] It should be noted that when the switch circuit 33 is on, the signal link between the first interface 312 and the second interface 3221 is turned off by the internal circuit, for example, by grounding the first interface 312 and the second interface 3221. The third interface 3213 is not electrically connected to the first interface 312 and the second interface 3221 through the switch circuit 33.
[0065] Referring to Figure 4, in AOV mode, the non-electric module 321 switches from the wake-up state to the sleep state, and the level on the third interface 3213 changes from high level to low level. After the second change occurs, the switch circuit 33 switches from conduction to interruption. When the switch circuit 33 is interrupted, the first interface 312 and the second interface 3221 communicate normally.
[0066] Among them, the switching circuit 33 can be, for example, an analog switch or a circuit that can realize the function of an analog switch.
[0067] For example, as shown in Figure 5, the switching circuit 33 can be, for example, an NMOS transistor 331.
[0068] Please refer to Figure 5. The drain of NMOS transistor 331 (pin D in Figure 5) is connected to the first interface 312 and the second interface 3221. The gate of NMOS transistor 331 (pin G in Figure 5) is connected to the third interface 3213. The source of NMOS transistor 331 (pin S in Figure 5) is grounded.
[0069] The NMOS transistor can be an enhancement-mode NMOS transistor, and its gate threshold voltage VGSth should be as small as possible, for example, it can be below 1V.
[0070] As shown in Figure 5, in AOV mode, during the transition from wake-up state to sleep state of the non-powered module 321, referring to the relevant description of stage six in the prior art, the non-powered module 321 first undergoes software power-down, followed by hardware power-down. During hardware power-down, the level of the pin in the third interface 3213 changes from high to low. This decrease in the level causes the NMOS transistor to slowly transition from being on (i.e., the D and S terminals of the NMOS transistor are on) to being off. For the second interface 3221, the NMOS transistor can shield the external trigger signal from the first interface 312 during its on-state, preventing the external trigger signal from the first interface 312 from being sent to the second interface 3221. Therefore, the second interface 3221 will not experience a situation where the level on the pin has started to decrease but is not fully powered down and is then forcibly pulled high. This avoids the crash situation described in the prior art and solves the problem of crashes that easily occur during the transition from wake-up state to sleep state in AOV mode. After the NMOS transistor is completely turned off, the communication between the first interface 312 and the second interface 3221 returns to normal, and the second interface 3221 can receive the externally triggered signal from the first interface 312 normally.
[0071] Please refer to Figure 5. During the hardware power-down process, the voltage on the gate of NMOS transistor 331 (pin G in Figure 5) can drop to 1V. At this time, NMOS transistor 331 is already turned off and cannot shield the external trigger signal from the first interface 312. If the hardware power-down is not yet complete, the level on the first interface 312 may still be pulled high due to the external trigger signal, causing the level on the pin of the second interface 3221 to be forcibly pulled high before the power-down is complete, which still poses a risk of system crash. Based on this, in order to further reduce the risk of system crash during the transition from wake-up state to sleep state in AOV mode, the interrupt signal sent by the first interface 312 can be delayed based on the setting of the switching circuit 33. This further ensures that the level on the pin of the second interface 3221 will not be forcibly pulled high due to the interrupt signal during the hardware power-down process of the non-powered module 321, further reducing the risk of system crash.
[0072] As shown in Figure 6, the AOV-based signal processing device 30 may further include a resistor-capacitance circuit (RC) delay circuit 34. The RC delay circuit 34 is connected to the third interface 3213 and configured to delay the power-down time of the third interface 3213.
[0073] Taking the NMOS transistor 331 as an example of the switching circuit 33, as shown in Figures 5 and 6, the RC delay circuit 34 can be set between the third interface 3213 and the gate of the NMOS transistor 331 to slow down the process of the voltage on the gate of the NMOS transistor 331 being pulled down. In this case, the conduction time of the NMOS transistor 331 during the process of slowly transitioning from conduction to turn-off becomes longer, thereby ensuring that the NMOS transistor is turned off after the hardware is completely powered down. Thus, the situation where the level on the pin of the second interface 3221 is forcibly pulled up before it has been pulled down will not occur.
[0074] In some embodiments, as shown in FIG7, the RC delay circuit 34 can also be located near the second interface 3221 or on a pin of the second interface 3221 (FIG7 only shows the case where the RC delay circuit 34 is located near the second interface 3221), so that the process of the level on the pin of the second interface 3221 being pulled high by the interrupt signal is slowed down, thereby delaying the interrupt signal. For example, if the interrupt signal 0.7VPP is high, the time for the pin of the second interface 3221 to go from 0 to 0.7VPP is 10ms. After setting the RC delay circuit 34, the time for the pin of the second interface 3221 to go from 0 to 0.7VPP is 20ms, thereby achieving the purpose of delaying the interrupt signal.
[0075] The event detection interface group and event response interface group in the embodiments of this disclosure will be described in detail below.
[0076] In some embodiments, as shown in FIG7, each event detection interface group 3110 may be provided with one interface (see the first event interface in FIG7). Each event response interface group 3211 may be provided with one interface (see the second event interface in FIG7). In this case, when the first processing unit 3120 detects an event, it can send the event signal of the event to the second event interface in the first event response interface group through the first event interface in the first event detection interface group. If the second processing unit 3212 detects that a second event interface has received the event signal, it acquires the event. The first event detection interface group and the first event response interface group correspond to each other.
[0077] In some embodiments, to further reduce the risk of event loss, as shown in FIG8, each of the multiple event detection interface groups 3110 may include an event notification interface 31101 and an event confirmation interface 31102. Each of the multiple event response interface groups 3211 may include an event receiving interface 32111 and an event response interface 32112.
[0078] Multiple event detection interface groups 3110 may include, for example, event detection interface group A1, event detection interface group A2, ..., event detection interface group An as shown in FIG8, where n is a natural number and n is greater than 1. Multiple event response interface groups 3211 may include, for example, event response interface group B1, event response interface group B2, ..., event response interface group Bn as shown in FIG8. Event detection interface group Am and event response interface group Bm correspond to each other, where m is a natural number and n≤m≤1. In this case, the first processing unit 3120 is configured to: when an event is detected, send the event signal of the detected event to the event receiving interface in the first event response interface group through the event notification interface in the first event detection interface group.
[0079] The first event detection interface group can be any one of multiple event detection interface groups. For example, the first event detection interface group is event detection interface group A1 in Figure 8. When an event is detected, the first processing unit 3120 generates an event signal for the event and sends the event signal to the event receiving interface B11 in the event response interface group B1 through the event notification interface A11.
[0080] On one side of the second processing unit 3212, the second processing unit 3212 checks at regular intervals whether an event signal has been received on the event receiving interface in each event response interface group 3211. If an event signal is detected that an event has been received on the event receiving interface in the first event response interface group, the event is acquired.
[0081] For example, please continue to refer to Figure 8. If the second processing unit 3212 detects that the event receiving interface B11 has received an event signal, it acquires the event.
[0082] After the second processing unit 3212 acquires an event through the event receiving interface in the first event response interface group, it can respond to the MCU chip 31 as follows: The second processing unit 3212 can send an acknowledgment signal to the event confirmation interface in the first event detection interface group through the event response interface in the first event response interface group, thereby informing the MCU chip 31 that the event has been successfully acquired.
[0083] For example, please continue to refer to Figure 8. After the second processing unit 3212 detects that the event signal of the event has been received by the event receiving interface B11 and acquires the event, it sends an acknowledgment signal to the event confirmation interface A12 through the event response interface B12 to inform the MCU chip 31 that the event has been successfully acquired.
[0084] For the first processing unit 3120 of MCU chip 31, after sending the event signal, it detects whether the event confirmation interface in the first event detection interface group has received a confirmation signal within a set time interval (which can be set by those skilled in the art according to the actual situation). If the detection result is yes, that is, the event confirmation interface in the first event detection interface group has received a confirmation signal within the set time interval, it is determined that the event reception was successful.
[0085] In some embodiments, for the first processing unit 3120 of the MCU chip 31, after sending the event signal, if the event confirmation interface in the first event detection interface group does not receive a confirmation signal within a set time interval, it is determined that the event reception has failed. In this case, the first processing unit 3120 can determine a second event detection interface group (the second event detection interface group is different from the first event detection interface group) from among multiple event detection interface groups, and send the event signal of the event to the event receiving interface in the second event response interface group through the event notification interface in the second event detection interface group; the second event response interface group corresponds to the second event detection interface group. This can further avoid the occurrence of event loss and reduce the risk of event loss.
[0086] For example, referring to Figure 8, after the first processing unit 3120 sends the event signal of an event to the event receiving interface B11 via the event notification interface A11, it detects that the event confirmation interface A12 has received a confirmation signal within a set time interval, and in this case, it determines that the event reception was successful. If the event confirmation interface A12 does not receive a confirmation signal within the set time interval, it determines the event detection interface group A2 among multiple event detection interface groups, and sends the event signal of the event to the event receiving interface B21 in the event response interface group B2 through the event notification interface A21 in the event detection interface group A2. The confirmation method for whether the event response interface group B2 has received the event signal of the event is the same as that for the event response interface group B1. If it is confirmed that the event response interface group B2 has also not received the event signal of the event, another event detection interface group can be selected from multiple event detection interface groups to send the event signal of the event.
[0087] In some embodiments, the plurality of event detection interface groups 3110 include: at least one event detection interface group corresponding to each type of event among the multiple types of events, and the event detection interface groups corresponding to different types of events are different.
[0088] For example, multiple event types include Type 1 events, Type 2 events, and Type 3 events. Referring to Figure 8, event detection interface group A1 can correspond to Type 1 events, each event detection interface group in A2 to A3 can correspond to Type 2 events, and each event detection interface group in A4 to An can correspond to Type 3 events.
[0089] Of course, it is understood that the multiple events listed above, including the first type of event, the second type of event, and the third type of event, are merely examples. In practice, the number of multiple event categories may include, but is not limited to, three.
[0090] In a scenario where each type of event corresponds to at least one event detection interface group, and different types of events correspond to different event detection interface groups, the first processing unit 3120 generates an event signal for the event. This includes: the first processing unit 3120 generating a preset signal corresponding to the event type, and determining the preset signal as the event signal. In other words, the first processing unit 3120 generates the same event signal for events of the same type. In this case, after generating the event signal, the first processing unit 3120 is further configured to: determine at least one target event detection interface group corresponding to the event from among the multiple event detection interface groups, and send the event signal through the target event detection interface group.
[0091] Taking the AOV-based signal processing device 30 shown in Figure 8 as an example, the implementation process of the six stages of the SOC chip 32 in AOV mode, namely the power-on process (i.e., switching from sleep state to wake-up state) and the power-off process (switching from wake-up state to sleep state), is as follows.
[0092] Phase 1: Referring to Figure 8, the SOC chip 32 is in sleep mode, and the voltage level on the pin of the second interface 3221 (not shown in Figure 3) is low. At this time, the non-electric module 321 is powered off, the voltage level on the third interface 3213 is low, and the switch circuit 33 is disconnected. Under these circumstances, the first interface 312 and the second interface 3221 communicate normally, and the second interface 3221 can receive the external trigger signal on the first interface 312.
[0093] Phase Two: In AOV mode, the state switches every preset time interval (from sleep to wake-up, or from wake-up to sleep). During the switch from sleep to wake-up, the low level on the pin of the second interface 3221 is pulled high, and the SOC chip 32's hardware powers on. The level on the third interface 3213 changes from low to high, the switching circuit 33 switches from interrupt to conduction, and the communication state between the first interface 312 and the second interface 3221 changes from normal communication to communication interruption. Therefore, the second interface 3221 cannot receive new externally triggered signals (i.e., interrupt signals) loaded on the first interface 312.
[0094] During the hardware power-up process, the first interface 312 sends an interrupt signal (i.e., an event signal for a certain event) to the second interface 3221. This signal can be sent to the SOC chip 32 in the following way. Referring to Figure 8, when the level on the pin of the third interface 3213 is pulled high, when a new event occurs, the first processing unit 3120 generates an event signal for the event after detecting the event, such as 0101. Taking the first event detection interface group as event detection interface group A1 as an example, this event signal is sent to the event receiving interface B11 in the event response interface group B1 through the event notification interface A11 in the event detection interface group A1. After the software (i.e., the second processing unit 3212) in the SOC chip is powered on, the second processing unit 3212 detects the level signal on the event receiving interface B11, acquires the level signal, and thus acquires the event. At this time, the second processing unit 3212 modifies the level on the event response interface B12 (for example, changing the low level to a high level, or the high level to a low level). The level of the event confirmation interface A12 in the event detection interface group A1 also changes accordingly. When the MCU chip 31 detects the level change on the event confirmation interface A12 within a set time interval, it determines that the event has been successfully received by the SOC chip 32. In this case, the problem of not being able to respond to the event sent by the MCU chip 31 in this stage can be effectively avoided, and the event loss can be effectively prevented. If the MCU chip 31 does not detect the level change on the event confirmation interface A12 within the set time interval, it can be determined that the event has not been successfully received by the SOC chip 32, and the event signal of the event can be reloaded on the event notification interface A21.
[0095] It should be noted that, since multiple event detection interface groups are set up, when multiple external events occur, the signals of different events can be loaded onto the event notification interfaces of different event detection interface groups. After the software in the SOC chip 32 is powered on, it simultaneously detects the event receiving interface in each event response interface group.
[0096] Third stage: After the hardware in the SOC chip 32 is powered on, the software in the SOC chip 32 (i.e., the second processing unit 3212) is powered on.
[0097] When the second processing unit 3212 is powered on, the voltage level on the third interface 3213 is high, the switching circuit 33 remains continuously conducting, and communication between the first interface 312 and the second interface 3221 is interrupted. The second processing unit 3212 acquires external events through multiple event response interface groups. The process of the second processing unit 3212 acquiring external events can be found in the above-described event acquisition process after the second processing unit 3212 is powered on, and will not be repeated here. During this process, the second processing unit 3212 can check for external events at regular intervals. If an external event is detected, it remains awake; if no external event is detected, it enters a sleep state.
[0098] Fourth stage: After the second processing unit 3212 is powered on, it enters normal operating state. During this stage, the switching circuit 33 remains on, and communication between the first interface 312 and the second interface 3221 remains interrupted.
[0099] Fifth stage: The second processing unit 3212 detects that there are no external events within the set time interval and begins to power down, that is, to enter the sleep state. During this stage, the switching circuit 33 remains on, and communication between the first interface 312 and the second interface 3221 is interrupted.
[0100] Phase 6: After the second processing unit 3212 completes its power-down, the hardware in the SOC chip 32 begins to power down. The voltage level on the pins of the third interface 3213 changes from high to low. During this process, the switching circuit 33 switches from on to off, and the communication between the first interface 312 and the second interface 3221 switches from interrupted to normal. Before the switching circuit 33 has fully switched to off, the communication between the first interface 312 and the second interface 3221 remains interrupted. In this case, even if an external trigger signal is applied to the first interface 312, the pins of the second interface 3221 will not receive the external trigger signal during the power-down process. Therefore, during the power-down process of the pins of the second interface 3221, the voltage on the pins will not be pulled low and then forcibly pulled high. This also prevents the hardware in the non-power-off module 321 from being fully powered down and then having to be powered on again, thus effectively avoiding the occurrence of system crashes.
[0101] The AOV-based signal processing device disclosed herein includes an MCU chip and a SOC chip. The MCU chip includes multiple event detection interface groups and a first processing unit. The SOC chip includes a non-electric module, which includes multiple event response interface groups corresponding to the multiple event detection interface groups, and a second processing unit. When the first processing unit detects an event, it sends the event to the first event response interface group corresponding to the first event detection interface group in the SOC chip through the first event detection interface group. The event transmission occurs during the period when the non-electric module switches from a sleep state to a wake-up state in AOV mode. The second processing unit detects the multiple event response interface groups and, when it detects that the first event response interface group has received an event, acquires the event. Therefore, this disclosure provides a device capable of entering AOV mode by setting up multiple event detection interface groups and multiple event response interface groups to notify and obtain the events that occur. In this case, the notification and acquisition of events are no longer affected by the switching process between the wake-up state and the sleep state in AOV mode. This can solve the problem in the prior art that events are easily lost when switching from the sleep state to the wake-up state after entering AOV mode, and can prevent the occurrence of event loss in AOV mode.
[0102] Based on solving the problem of lost events, the embodiments of this disclosure can also effectively prevent the SOC chip from freezing during the hardware power-down phase in AOV mode by setting a switching circuit between the MCU chip and the SOC chip, thereby optimizing the performance of the device in AOV mode and bringing many conveniences to actual production and life.
[0103] The AOV-based signal processing method provided in this disclosure is described below. The AOV-based signal processing method described below and the AOV-based signal processing device described above can be referred to in correspondence.
[0104] Figure 9 is a flowchart of an AOV-based signal processing method provided in an embodiment of this disclosure. This method is applied to the SOC chip in the AOV-based signal processing device 30 described above, and includes steps S910 to S920.
[0105] S910: Detects multiple event response interface groups.
[0106] Detect whether each of the multiple event response interface groups has received an event.
[0107] S920: When an event is detected in the first event response interface group among multiple event response interface groups, the event is acquired; wherein, the event comes from the MCU chip, and when the MCU chip detects that the event has occurred, it sends the event to the first event response interface group corresponding to the first event detection interface group in the SOC chip through the first event detection interface group among multiple event detection interface groups; the above event is sent during the period when the non-electric module switches from sleep state to wake-up state in AOV mode.
[0108] In some embodiments, each of the plurality of event detection interface groups includes: an event notification interface and an event confirmation interface; each of the plurality of event response interface groups includes: an event receiving interface and an event response interface; when an event is detected to be received by a first event response interface group in the plurality of event response interface groups, acquiring the event includes: acquiring the event when an event signal is detected to be received by the event receiving interface in the first event response interface group; and sending a confirmation signal to the event confirmation interface in the first event detection interface group through the event response interface in the first event response interface group.
[0109] Figure 10 is a flowchart of an AOV-based signal processing method provided in an embodiment of this disclosure. This method is applied to the MCU chip in the AOV-based signal processing device 30 described above, and includes the following steps S1010 to S1020.
[0110] S1010: Detect whether an event has occurred.
[0111] S1020: When an event is detected, the event is sent to the first event response interface group corresponding to the first event detection interface group in the SOC chip through the first event detection interface group in the multiple event detection interface groups, so as to instruct the SOC chip to acquire the event when it is detected that the first event response interface group has received the event; the above event is sent during the period when the non-electric module switches from sleep state to wake-up state in AOV mode.
[0112] In some embodiments, each of the multiple event detection interface groups includes an event notification interface and an event confirmation interface; each of the multiple event response interface groups includes an event receiving interface and an event response interface; when an event is detected, the event is sent to the first event response interface group corresponding to the first event detection interface group in the SOC chip through the first event detection interface group, including: when an event is detected, sending an event signal of the event through the event notification interface in the first event detection interface group; if the event confirmation interface in the first event detection interface group receives the event signal of the event within a set time interval, it is determined that the event reception was successful.
[0113] Figure 11 illustrates a schematic diagram of the physical structure of an electronic device. As shown in Figure 11, the electronic device may include: a processor 1110, a communication interface 1120, a memory 1130, and a communication bus 1140, wherein the processor 1110, the communication interface 1120, and the memory 1130 communicate with each other through the communication bus 1140. The processor 1110 can call logic instructions in the memory 1130 to execute an AOV signal processing method. This method is applied to the SOC chip or MCU chip in the aforementioned AOV-based signal processing device. When the method is applied to the SOC chip in the aforementioned AOV-based signal processing device, the method includes: detecting multiple event response interface groups; and acquiring the event when the first event response interface group among the multiple event response interface groups receives an event. The event originates from the MCU chip, and when the MCU chip detects the occurrence of the event, it sends the event to the first event response interface group corresponding to the first event detection interface group in the SOC chip through the first event detection interface group among the multiple event detection interface groups. The sending of the event occurs during the period when the non-electric module switches from a sleep state to a wake-up state in AOV mode.
[0114] When this method is applied to the MCU chip in the aforementioned AOV-based signal processing device, the method includes: detecting whether an event has occurred; when an event is detected, sending the event to a first event response interface group corresponding to the first event detection interface group in the SOC chip through a first event detection interface group among multiple event detection interface groups, so as to instruct the SOC chip to acquire the event when it detects that the first event response interface group has received the event; wherein, the sending of the event occurs during the period when the non-electric module switches from a sleep state to a wake-up state in AOV mode.
[0115] Furthermore, the logical instructions in the aforementioned memory 1130 can be implemented as software functional units and, when sold or used as independent products, can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this disclosure, in essence, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in each embodiment of this disclosure. The aforementioned storage medium includes: USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks, etc., media capable of storing program code.
[0116] On the other hand, this disclosure also provides a computer program product, which includes a computer program that can be stored on a computer-readable storage medium. When the computer program is executed by a processor, the computer is able to execute the AOV-based signal processing method provided by the above method. This method is applied to the SOC chip or MCU chip in the above-mentioned AOV-based signal processing device.
[0117] When this method is applied to the SOC chip in the aforementioned AOV-based signal processing device, the method includes: detecting multiple event response interface groups; when an event is detected in the first event response interface group among the multiple event response interface groups, acquiring the event; wherein the event originates from the MCU chip, and when the MCU chip detects the occurrence of the event, it sends the event to the first event response interface group corresponding to the first event detection interface group in the SOC chip through the first event detection interface group among the multiple event detection interface groups; wherein the sending of the event occurs during the period when the non-electric module switches from a sleep state to a wake-up state in AOV mode.
[0118] When this method is applied to the MCU chip in the aforementioned AOV-based signal processing device, the method includes: detecting whether an event has occurred; when an event is detected, sending the event to a first event response interface group corresponding to the first event detection interface group in the SOC chip through a first event detection interface group among multiple event detection interface groups, so as to instruct the SOC chip to acquire the event when it detects that the first event response interface group has received the event; wherein, the sending of the event occurs during the period when the non-electric module switches from a sleep state to a wake-up state in AOV mode.
[0119] In another aspect, this disclosure also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which is implemented when executed by a processor to perform the AOV-based signal processing method provided above, the method being applied to a SOC chip or MCU chip in the above-mentioned AOV-based signal processing device;
[0120] When this method is applied to the SOC chip in the aforementioned AOV-based signal processing device, the method includes: detecting multiple event response interface groups; when an event is detected in the first event response interface group among the multiple event response interface groups, acquiring the event; wherein the event originates from the MCU chip, and when the MCU chip detects the occurrence of the event, it sends the event to the first event response interface group corresponding to the first event detection interface group in the SOC chip through the first event detection interface group among the multiple event detection interface groups; wherein the sending of the event occurs during the period when the non-electric module switches from a sleep state to a wake-up state in AOV mode.
[0121] When this method is applied to the MCU chip in the aforementioned AOV-based signal processing device, the method includes: detecting whether an event has occurred; when an event is detected, sending the event to a first event response interface group corresponding to the first event detection interface group in the SOC chip through a first event detection interface group among multiple event detection interface groups, so as to instruct the SOC chip to acquire the event when it detects that the first event response interface group has received the event; wherein, the sending of the event occurs during the period when the non-electric module switches from a sleep state to a wake-up state in AOV mode.
[0122] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without any creative effort.
[0123] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus necessary general-purpose hardware platforms, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in each embodiment or some parts of the embodiments.
[0124] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this disclosure, and are not intended to limit them. Although this disclosure has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in each of the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of each embodiment of this disclosure.
Claims
1. An apparatus for signal processing based on Always On Video (AOV) with low power consumption, comprising: Microcontroller unit (MCU) chips and system-on-a-chip (SOC) chips; The MCU chip includes multiple event detection interface groups and a first processing unit; The SOC chip includes a non-electric module, which includes multiple event response interface groups corresponding one-to-one with the multiple event detection interface groups, and a second processing unit; When the first processing unit detects an event, it sends the event to the first event response interface group in the SOC chip corresponding to the first event detection interface group through the first event detection interface group among the plurality of event detection interface groups; wherein, the sending of the event occurs during the period when the non-electric module switches from sleep state to wake-up state in AOV mode; The second processing unit detects the plurality of event response interface groups, and if it detects that the first event response interface group has received the event, it acquires the event.
2. The AOV-based signal processing apparatus of claim 1, wherein, Also includes: Switching circuit; The MCU chip further includes: a first interface configured to send an interrupt signal; the SOC chip further includes a constant power module, the constant power module includes a second interface configured to receive the interrupt signal, and the non-constant power module further includes a third interface configured to control its power-on. The first interface, the second interface, and the third interface are all connected to the switching circuit; In AOV mode, when the non-electric module switches from sleep mode to wake-up mode, the level on the third interface changes from low level to high level. After the first change occurs, the switching circuit switches from interrupt to conduction. When the switching circuit is on, communication between the first interface and the second interface is interrupted. In AOV mode, when the non-electric module switches from wake-up state to sleep state, the level on the third interface changes from high level to low level. After the second change occurs, the switching circuit switches from conduction to interruption. When the switching circuit is interrupted, the first interface and the second interface communicate normally.
3. The AOV-based signal processing device according to claim 2, wherein, Also includes: An RC delay circuit is disposed between the first interface and the second interface.
4. The AOV-based signal processing device according to claim 3, wherein, The RC delay circuit is connected to the third interface, and the RC delay circuit is configured to delay the power-off time of the third interface.
5. The AOV-based signal processing device according to claim 1, wherein, Each of the plurality of event detection interface groups includes: an event notification interface and an event confirmation interface; each of the plurality of event response interface groups includes: an event receiving interface and an event response interface; When the first processing unit detects an event, it sends the event to the first event response interface group corresponding to the first event detection interface group in the SOC chip through the first event detection interface group among the plurality of event detection interface groups, including: When the first processing unit detects that the event has occurred, it sends an event signal of the event to the event receiving interface in the first event response interface group through the event notification interface in the first event detection interface group; if the event confirmation interface in the first event detection interface group receives a confirmation signal within a set time interval, it determines that the event was successfully received. When the second processing unit detects that the first event response interface group has received the event, it acquires the event, including: When the second processing unit detects that the event signal of the event has been received by the event receiving interface in the first event response interface group, it acquires the event; and sends the confirmation signal to the event confirmation interface in the first event detection interface group through the event response interface in the first event response interface group.
6. The AOV-based signal processing device according to claim 5, wherein, When the first processing unit detects an event, it sends the event to the first event response interface group corresponding to the first event detection interface group in the SOC chip through the first event detection interface group among the plurality of event detection interface groups, and further includes: If the first processing unit detects that the event confirmation interface in the first event detection interface group has not received the confirmation signal within a set time interval, it determines a second event detection interface group among the plurality of event detection interface groups. The first processing unit sends the event signal of the event to the event receiving interface in the second event response interface group through the event notification interface in the second event detection interface group; the second event response interface group corresponds to the second event detection interface group.
7. The AOV-based signal processing device according to claim 1, wherein, The plurality of event detection interface groups includes at least one event detection interface group corresponding to the type and / or importance of the event. When the first processing unit detects an event, it sends the event to the first event response interface group corresponding to the first event detection interface group in the SOC chip through the first event detection interface group among the plurality of event detection interface groups. The processing unit also includes: When the first processing unit detects an event, it determines at least one first event detection interface group from the plurality of event detection interface groups that corresponds to the type and / or importance of the event, based on the type of the event and / or the importance of the event. Then, it sends the event to the first event response interface group in the SOC chip that corresponds to the first event detection interface group through the first event detection interface group.
8. The AOV-based signal processing device according to claim 1, wherein, The multiple event detection interface groups include: at least one event detection interface group corresponding to each type of event in the multiple event types, and the event detection interface groups corresponding to different types of events are different.
9. An AOV-based signal processing method, applied to a SOC chip in an AOV signal processing device as described in any one of claims 1-8, the method comprising: Detect multiple event response interface groups; When an event is detected in the first event response interface group among the plurality of event response interface groups, the event is acquired; wherein the event originates from the MCU chip, and when the MCU chip detects the occurrence of the event, it sends the event to the first event response interface group corresponding to the first event detection interface group in the SOC chip through the first event detection interface group among the plurality of event detection interface groups; wherein the sending of the event occurs during the period when the non-electric module switches from sleep state to wake-up state in AOV mode.
10. The signal processing method based on AOV according to claim 9, wherein, Each of the plurality of event detection interface groups includes: an event notification interface and an event confirmation interface; each of the plurality of event response interface groups includes: an event receiving interface and an event response interface; The step of acquiring the event when an event is detected in the first event response interface group among the plurality of event response interface groups includes: If the event signal of the event is received by the event receiving interface in the first event response interface group, the event is acquired; and, The confirmation signal is sent to the event confirmation interface in the first event detection interface group through the event response interface in the first event response interface group.
11. The signal processing method based on AOV according to claim 9, wherein, The multiple event detection interface groups include: at least one event detection interface group corresponding to each type of event in the multiple event types, and the event detection interface groups corresponding to different types of events are different.
12. An AOV-based signal processing method, applied to an MCU chip in an AOV signal processing device as described in any one of claims 1-8, the method comprising: Detect whether an event has occurred; When an event is detected, the event is sent to the first event response interface group corresponding to the first event detection interface group in the SOC chip through the first event detection interface group in the multiple event detection interface groups, so as to instruct the SOC chip to acquire the event when it is detected that the first event response interface group has received the event; wherein, the event is sent during the period when the non-electric module switches from sleep state to wake-up state in AOV mode.
13. The signal processing method based on AOV according to claim 12, wherein, Each of the plurality of event detection interface groups includes: an event notification interface and an event confirmation interface; each of the plurality of event response interface groups includes: an event receiving interface and an event response interface; The step of sending the event to the first event response interface group corresponding to the first event detection interface group in the SOC chip through the first event detection interface group among the plurality of event detection interface groups when an event is detected includes: When the event is detected, an event signal is sent through the event notification interface in the first event detection interface group. If the event confirmation interface in the first event detection interface group receives the event signal within a set time interval, it is determined that the event was successfully received.
14. The signal processing method based on AOV according to claim 12, wherein, The plurality of event detection interface groups includes at least one event detection interface group corresponding to the type and / or importance of the event. The step of sending the event to a first event response interface group corresponding to the first event detection interface group in the SOC chip through a first event detection interface group when an event is detected further includes: When an event is detected, at least one first event detection interface group corresponding to the type and / or importance of the event is determined from the plurality of event detection interface groups, based on the type of the event and / or the importance of the event. The event is then sent to the first event response interface group in the SOC chip corresponding to the first event detection interface group through the first event detection interface group.
15. The signal processing method based on AOV according to claim 12, wherein, The multiple event detection interface groups include: at least one event detection interface group corresponding to each type of event in the multiple event types, and the event detection interface groups corresponding to different types of events are different.
16. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor, when executing the computer program, implements the AOV-based signal processing method as described in any one of claims 9 to 11, or the AOV-based signal processing method as described in any one of claims 12 to 15.
17. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the AOV-based signal processing method as described in any one of claims 9 to 11, or the AOV-based signal processing method as described in any one of claims 12 to 15.
18. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the AOV-based signal processing method as described in any one of claims 9 to 11, or the AOV-based signal processing method as described in any one of claims 12 to 15.