Display panel and manufacturing method therefor, and display device
By setting grooves in the pixel definition layer to prevent the septum pillars from collapsing, the problem of inconsistent height during the curing process of the septum pillars is solved, enabling efficient production and high-quality packaging of the display panel.
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- BOE TECHNOLOGY GROUP CO LTD
- Filing Date
- 2026-01-04
- Publication Date
- 2026-07-09
AI Technical Summary
In existing technologies, the septum columns are prone to collapse during the curing process, resulting in inconsistent heights of the silicone sealant and causing uneven deposition of Newton's rings and luminescent materials.
A groove is set on the side of the pixel definition layer away from the substrate. The groove extends along the circumferential edge of the septum pillar to prevent the septum pillar from collapsing in the direction parallel to the substrate. The septum pillar and the groove are formed simultaneously through the patterning process of the halftone mask.
It effectively prevents the septum columns from collapsing, ensures that the height of the septum columns and glass glue is consistent, avoids uneven evaporation of Newton's rings and light-emitting materials, and improves the production efficiency and quality of display panels.
Smart Images

Figure CN2026070188_09072026_PF_FP_ABST
Abstract
Description
Display panel and its manufacturing method, display device
[0001] This application claims priority to Chinese Patent Application No. 202510019086.0, filed on January 6, 2025, entitled “Display Panel and Method for Preparing the Same, Display Device”, the contents of which are to be understood as incorporated herein by reference. Technical Field
[0002] This disclosure relates to, but is not limited to, display technology, and in particular to a display panel and its manufacturing method, and a display device. Background Technology
[0003] Organic light-emitting diodes (OLEDs) and quantum dot light-emitting diodes (QLEDs) are active light-emitting display devices with advantages such as self-illumination, wide viewing angle, high contrast, low power consumption, extremely high response speed, thinness, flexibility, and low cost. Summary of the Invention
[0004] The following is an overview of the subject matter described in detail herein. This overview is not intended to limit the scope of the claims.
[0005] This application provides a display panel, including:
[0006] Base;
[0007] A light-emitting structure layer is disposed on the substrate, the light-emitting structure layer including a pixel definition layer;
[0008] Multiple spacer pillars are located on the side of the pixel definition layer away from the substrate;
[0009] The pixel definition layer has a groove on its end face away from the substrate. The groove is located on the outer periphery of the septum post and extends along the circumferential edge of the septum post. The groove is configured to prevent the septum post from collapsing in a direction parallel to the substrate.
[0010] In some exemplary embodiments, the groove width is set to d, where 0.5μm≤d≤1.5μm.
[0011] In some exemplary embodiments, d = 1 μm.
[0012] In some exemplary embodiments, the light-emitting structure layer includes a first electrode located on the side of the pixel definition layer near the substrate, and the pixel definition layer has a pixel opening for exposing the first electrode;
[0013] The orthographic projection of the groove on the substrate does not overlap with the orthographic projection of the pixel opening on the substrate.
[0014] In some exemplary embodiments, the orthographic projection of the groove on the substrate is configured not to overlap with the orthographic projection of the first electrode on the substrate.
[0015] In some exemplary embodiments, the orthographic projection of the septum post on the substrate does not overlap with the orthographic projection of the first electrode on the substrate, and the groove forms an annular shape.
[0016] In some exemplary embodiments, the orthographic projection of the first electrode on the substrate overlaps with the orthographic projection of the septum post on the substrate;
[0017] The orthographic projection of the groove onto the substrate is set as a semi-enclosed shape with an opening;
[0018] The orthographic projection of the first electrode on the substrate includes a first projection, one end of which is located within the orthographic projection of the septum post on the substrate, and the other end extends out of the opening from the semi-enclosed pattern.
[0019] In some exemplary embodiments, the groove includes a first groove and a second groove that are connected end to end, and the first groove and the second groove together form an annular shape;
[0020] The orthographic projection of the first groove on the substrate overlaps with the orthographic projection of the first electrode on the substrate, while the orthographic projection of the second groove on the substrate does not overlap with the orthographic projection of the first electrode on the substrate;
[0021] The width of the first groove is set to d1, and the width of the second groove is set to d2, where d1 < d2.
[0022] In some exemplary embodiments, d1 ≤ 0.8 μm.
[0023] In some exemplary embodiments, the groove depth of the first groove is set to h1, and the groove depth of the second groove is set to h2, where h1 > h2.
[0024] In some exemplary embodiments, the first electrode includes a first segment and a second segment arranged sequentially along a first direction, wherein the orthographic projection of the first segment on the substrate does not overlap with the orthographic projection of the groove on the substrate, and the orthographic projection of the second segment on the substrate overlaps with the orthographic projection of the groove on the substrate, wherein the first direction is parallel to the substrate;
[0025] The width of the first segment is L1, and the width of the second segment is L2, where L1 > L2;
[0026] The width of the first segment is set to the minimum dimension of the first segment in the second direction, and the width of the second segment is set to the minimum dimension of the second segment in the second direction, wherein the second direction is parallel to the base and perpendicular to the first direction.
[0027] In some exemplary embodiments, the cross-section of the septum post is configured as H-shaped or cross-shaped.
[0028] In some exemplary embodiments, the groove width gradually decreases along the direction close to the substrate.
[0029] In some exemplary embodiments, the groove depth is set to h, and the thickness of the pixel definition layer is set to H, where 1 / 5 ≤ h / H ≤ 3 / 4.
[0030] In some exemplary embodiments, the minimum distance between the end of the groove near the substrate and the end face of the pixel definition layer near the substrate in the direction perpendicular to the substrate is set to h3, where h3 ≥ 0.5 μm.
[0031] This application provides a method for manufacturing a display panel, including:
[0032] A light-emitting structure layer and a plurality of spacer pillars are formed on a substrate. The light-emitting structure layer includes a pixel definition layer. The plurality of spacer pillars are located on the side of the pixel definition layer away from the substrate. The end face of the pixel definition layer away from the substrate is provided with a groove. The groove is located on the outer periphery of the spacer pillar and extends along the circumferential edge of the spacer pillar. The groove is configured to prevent the spacer pillar from collapsing in a direction parallel to the substrate.
[0033] In some exemplary embodiments, forming the light-emitting structure layer and the plurality of spacer pillars on the substrate includes:
[0034] Deposited pixel-defined thin film;
[0035] The pixel-defining film is simultaneously patterned using a halftone mask process to form a first pattern, the first pattern including the plurality of spacer pillars and the groove.
[0036] In some exemplary embodiments, the pixel-defining film is simultaneously formed with a halftone mask patterning process to form a first pattern, the first pattern including the plurality of spacer pillars and the groove, including:
[0037] Photoresist is coated onto the pixel definition film;
[0038] Optical proximity correction technology is used for exposure.
[0039] This application provides a display device including the display panel described above.
[0040] The display panel of this application embodiment features a slotted design in the pixel definition layer, i.e., grooves are created to prevent the spacer pillars from collapsing and reducing their height during the curing process. This avoids problems such as Newton's rings caused by inconsistent heights between the spacer pillars and the silicone sealant. In the display panel of this application embodiment, the groove width is reduced at the anode overlap location to address issues such as uneven evaporation of the luminescent material, which can lead to fine lines and color shifts.
[0041] After reading and understanding the accompanying diagrams and detailed descriptions, the other aspects can be understood.
[0042] Overview of the attached figures
[0043] The accompanying drawings are used to provide an understanding of the technical solutions of this application and constitute a part of the specification. They are used together with the embodiments of this application to explain the technical solutions of this application and do not constitute a limitation on the technical solutions of this application.
[0044] Figure 1 is a schematic diagram of a display device;
[0045] Figure 2 is a schematic diagram of the planar structure of a display panel;
[0046] Figure 3 is a schematic cross-sectional view of a display panel.
[0047] Figure 4 is a schematic diagram of the encapsulation structure layer of a display panel;
[0048] Figure 5 is a schematic diagram of a display panel according to an exemplary embodiment of this invention;
[0049] Figure 6 is a schematic diagram of the AA-direction section in Figure 5;
[0050] Figure 7 is a cross-sectional schematic diagram of another display panel of this exemplary embodiment;
[0051] Figure 8 is a schematic diagram of another display panel according to this exemplary embodiment;
[0052] Figure 9 is a schematic diagram of the BB-direction section in Figure 8;
[0053] Figure 10 is a schematic diagram of another display panel of this exemplary embodiment;
[0054] Figure 11 is a schematic diagram of the CC-direction section in Figure 10;
[0055] Figure 12 is a schematic diagram of the projection onto the substrate in Figure 11;
[0056] Figure 13 is a schematic diagram of another display panel according to this exemplary embodiment;
[0057] Figure 14 is a schematic diagram of another display panel of this exemplary embodiment;
[0058] Figure 15 is a schematic diagram of the DD-direction section in Figure 14;
[0059] Figure 16 is a magnified view of part E in Figure 14;
[0060] Figure 17 is a schematic diagram of another display panel according to this exemplary embodiment;
[0061] Figure 18 is a schematic diagram of the first electrode in Figure 17;
[0062] Figure 19 is a schematic cross-sectional view of a diaphragm column according to this exemplary embodiment;
[0063] Figure 20 is a cross-sectional schematic diagram of another type of diaphragm column according to this exemplary embodiment.
[0064] Detailed Explanation
[0065] This application describes several embodiments, but these descriptions are exemplary and not limiting, and it will be apparent to those skilled in the art that many more embodiments and implementations are possible within the scope of the embodiments described herein. Although many possible combinations of features are shown in the drawings and discussed in the detailed description, many other combinations of the disclosed features are also possible. Unless specifically limited, any feature or element of any embodiment may be used in combination with, or may replace, any feature or element of any other embodiment.
[0066] This application includes and contemplates combinations of features and elements known to those skilled in the art. The embodiments, features, and elements disclosed in this application can also be combined with any conventional features or elements to form unique inventive solutions. Any feature or element of any embodiment can also be combined with features or elements from other inventive solutions to form another unique inventive solution. Therefore, it should be understood that any feature shown and / or discussed in this application can be implemented individually or in any suitable combination. Therefore, the embodiments are not limited except by the limitations imposed by the appended claims and their equivalents. Furthermore, various modifications and changes can be made within the scope of the appended claims.
[0067] Furthermore, in describing representative embodiments, the specification may have presented methods and / or processes as a specific sequence of steps. However, the method or process should not be limited to the specific order of steps described herein, to the extent that it does not depend on such a specific order. As will be understood by those skilled in the art, other sequences of steps are also possible. Therefore, the specific order of steps set forth in the specification should not be construed as a limitation of the claims. Moreover, the claims concerning the method and / or process should not be limited to the steps performed in the written order, and those skilled in the art will readily understand that these orders can be varied and still remain within the spirit and scope of the embodiments of this application.
[0068] In some exemplary embodiments, a display panel includes:
[0069] Base;
[0070] A light-emitting structure layer is disposed on the substrate, the light-emitting structure layer including a pixel definition layer;
[0071] Multiple spacer pillars are located on the side of the pixel definition layer away from the substrate;
[0072] The pixel definition layer has a groove on its end face away from the substrate. The groove is located on the outer periphery of the septum post and extends along the circumferential edge of the septum post. The groove is configured to prevent the septum post from collapsing in a direction parallel to the substrate.
[0073] In some exemplary embodiments, the groove width is set to d, where 0.5μm≤d≤1.5μm.
[0074] In some exemplary embodiments, d = 1 μm.
[0075] In some exemplary embodiments, the light-emitting structure layer includes a first electrode located on the side of the pixel definition layer near the substrate, and the pixel definition layer has a pixel opening for exposing the first electrode;
[0076] The orthographic projection of the groove on the substrate does not overlap with the orthographic projection of the pixel opening on the substrate.
[0077] In some exemplary embodiments, the orthographic projection of the groove on the substrate is configured not to overlap with the orthographic projection of the first electrode on the substrate.
[0078] In some exemplary embodiments, the orthographic projection of the septum post on the substrate does not overlap with the orthographic projection of the first electrode on the substrate, and the groove forms an annular shape.
[0079] In some exemplary embodiments, the orthographic projection of the first electrode on the substrate overlaps with the orthographic projection of the septum post on the substrate;
[0080] The orthographic projection of the groove onto the substrate is set as a semi-enclosed shape with an opening;
[0081] The orthographic projection of the first electrode on the substrate includes a first projection, one end of which is located within the orthographic projection of the septum post on the substrate, and the other end extends out of the opening from the semi-enclosed pattern.
[0082] In some exemplary embodiments, the groove includes a first groove and a second groove that are connected end to end, and the first groove and the second groove together form an annular shape;
[0083] The orthographic projection of the first groove on the substrate overlaps with the orthographic projection of the first electrode on the substrate, while the orthographic projection of the second groove on the substrate does not overlap with the orthographic projection of the first electrode on the substrate;
[0084] The width of the first groove is set to d1, and the width of the second groove is set to d2, where d1 < d2.
[0085] In some exemplary embodiments, the first electrode includes a first segment and a second segment arranged sequentially along a first direction, wherein the orthographic projection of the first segment on the substrate does not overlap with the orthographic projection of the groove on the substrate, and the orthographic projection of the second segment on the substrate overlaps with the orthographic projection of the groove on the substrate, wherein the first direction is parallel to the substrate;
[0086] The width of the first segment is L1, and the width of the second segment is L2, where L1 > L2;
[0087] The width of the first segment is set to the minimum dimension of the first segment in the second direction, and the width of the second segment is set to the minimum dimension of the second segment in the second direction, wherein the second direction is parallel to the base and perpendicular to the first direction.
[0088] Figure 1 is a schematic diagram of a display device. As shown in Figure 1, the display device may include a timing controller, a data driver, a scan driver, a light-emitting driver, and a pixel array. The timing controller is connected to the data driver, the scan driver, and the light-emitting driver. The data driver is connected to multiple data signal lines (D1 to Dn), the scan driver is connected to multiple scan signal lines (S1 to Sm), and the light-emitting driver is connected to multiple light-emitting signal lines (E1 to Eo). The pixel array may include multiple sub-pixels Pxij, where i and j can be natural numbers. At least one sub-pixel Pxij may include a circuit unit and a light-emitting unit connected to the circuit unit. The circuit unit may include a pixel driving circuit, which is connected to the scan signal lines, the light-emitting signal lines, and the data signal lines. In an exemplary embodiment, the timing controller can provide grayscale values and control signals of specifications suitable for the data driver to the data driver, provide clock signals, scan start signals, etc. of specifications suitable for the scan driver to the scan driver, and provide clock signals, transmit stop signals, etc. of specifications suitable for the light-emitting driver to the light-emitting driver. The data driver can use grayscale values and control signals received from the timing controller to generate data voltages to be provided to data signal lines D1, D2, D3, ..., Dn. For example, the data driver can sample grayscale values using a clock signal and apply the data voltage corresponding to the grayscale value to data signal lines D1 to Dn in unit rows, where n can be a natural number. The scan driver can receive clock signals, scan start signals, etc., from the timing controller to generate scan signals to be provided to scan signal lines S1, S2, S3, ..., Sm. For example, the scan driver can sequentially provide scan signals with on-level pulses to scan signal lines S1 to Sm. For example, the scan driver can be configured as a shift register and can generate scan signals by sequentially transmitting scan start signals in the form of on-level pulses to the next stage circuit under the control of a clock signal, where m can be a natural number. The LED driver can receive clock signals, transmit stop signals, etc., from the timing controller to generate transmit signals to LED signal lines E1, E2, E3, ..., Eo. For example, the light-emitting driver can sequentially provide transmit signals with cutoff level pulses to the light-emitting signal lines E1 to Eo. For example, the light-emitting driver can be configured as a shift register and can generate transmit signals by sequentially transmitting transmit stop signals in the form of cutoff level pulses to the next stage circuit under the control of a clock signal, where o can be a natural number. In an exemplary embodiment, a pixel array can be disposed on a display panel.
[0089] Figure 2 is a schematic diagram of a planar structure of a display panel. As shown in Figure 2, the display panel may include multiple pixel units P arranged in a matrix. At least one pixel unit P may include a first sub-pixel P1 emitting a first color light, a second sub-pixel P2 emitting a second color light, and a third sub-pixel P3 emitting a third color light. Each sub-pixel may include a circuit unit and a light-emitting unit. The circuit unit may include at least a pixel driving circuit. The pixel driving circuit is connected to a scan signal line, a light-emitting signal line, and a data signal line, respectively. The pixel driving circuit is configured to receive the data voltage transmitted by the data signal line and output a corresponding current to the light-emitting unit under the control of the scan signal line and the light-emitting signal line. The light-emitting unit in each sub-pixel is connected to the pixel driving circuit of its respective sub-pixel. The light-emitting unit is configured to emit light of a corresponding brightness in response to the current output by the pixel driving circuit of its respective sub-pixel.
[0090] In some exemplary embodiments, the first sub-pixel P1 may be a red sub-pixel (R) emitting red light, the second sub-pixel P2 may be a blue sub-pixel (B) emitting blue light, and the third sub-pixel P3 may be a green sub-pixel (G) emitting green light. In exemplary embodiments, the shape of the sub-pixels may be rectangular, rhomboid, pentagonal, or hexagonal, and the three sub-pixels P may be arranged horizontally side-by-side, vertically side-by-side, or in a triangular arrangement, etc., without limitation herein. In some exemplary embodiments, the first sub-pixel P1, the second sub-pixel P2, and the third sub-pixel P3 may be arranged along a straight line, but are not limited thereto; for example, the first sub-pixel P1, the second sub-pixel P2, and the third sub-pixel P3 may be arranged in a non-linear arrangement such as a triangular shape. In some exemplary embodiments, a pixel unit P may include four sub-pixels, and the four sub-pixels may be arranged horizontally side-by-side, vertically side-by-side, or in a square arrangement, without limitation herein.
[0091] Figure 3 is a schematic cross-sectional view of a display panel. As shown in Figure 3, on a plane perpendicular to the display panel, the display panel may include a circuit structure layer 200 disposed on a substrate 100, a light-emitting structure layer 300 disposed on the side of the circuit structure layer 200 away from the substrate 100, and an encapsulation structure layer 400 disposed on the side of the light-emitting structure layer 300 away from the substrate 100. In some possible implementations, the display panel may include other film layers, such as a touch structure layer, etc., which are not limited herein.
[0092] In some exemplary embodiments, the substrate 100 may be a rigid substrate. The rigid substrate may be, but is not limited to, one or more of glass and quartz, while the flexible substrate may be, but is not limited to, one or more of polyethylene terephthalate, polyethylene terephthalate, polyetheretherketone, polystyrene, polycarbonate, polyarylate, polyarylate, polyimide, polyvinyl chloride, polyethylene, and textile fibers. However, it is not limited to these; for example, the substrate 100 may be a flexible substrate.
[0093] In some exemplary embodiments, the light-emitting structure layer 300 may include a pixel definition layer and a plurality of light-emitting units. Each light-emitting unit may include at least an anode, an organic light-emitting layer, and a cathode. The anode is connected to the second electrode of a transistor via a connecting electrode. The organic light-emitting layer is connected to the anode, the cathode is connected to the organic light-emitting layer, and the cathode is connected to a second power line. The organic light-emitting layer emits light under the drive of the anode and cathode. In exemplary embodiments, the organic light-emitting layer may include a light-emitting layer (EML), and any one or more of the following: a hole injection layer (HIL), a hole transport layer (HTL), an electron blocking layer (EBL), a hole blocking layer (HBL), an electron transport layer (ETL), and an electron injection layer (EIL). The pixel definition layer may have multiple pixel openings, and each pixel opening may expose at least a portion of the surface of a corresponding anode.
[0094] Figure 4 is a schematic diagram of an encapsulation structure layer for a display panel. In some exemplary embodiments, as shown in Figure 4, the encapsulation structure layer includes an encapsulation glass 401, pressure-sensitive adhesive (not shown), and glass adhesive 402 (Frit). The pressure-sensitive adhesive and glass adhesive 402 (Frit) can bond the encapsulation glass 401 to the light-emitting structure layer 300. A septum post 403 is provided on the side away from the substrate 100, and the septum post 403 and glass adhesive 402 can support the encapsulation glass 401. In the display panel, the structure composed of metal and organic materials in the light-emitting structure layer 300 is extremely sensitive to moisture and oxygen. If moisture and oxygen penetrate into the interior of the light-emitting structure layer 300, it will cause device performance aging and shorten device lifespan. Furthermore, once the light-emitting structure layer 300 is exposed to moisture and oxygen, the organic light-emitting layer and cathode will oxidize, and it will also cause shrinkage of the light-emitting area (Pixel Shrinkage). Therefore, an encapsulation structure layer is needed to encapsulate the light-emitting structure layer 300.
[0095] In some exemplary embodiments, as shown in Figures 3 and 4, if the heights of the glass adhesive 402 and the spacer pillar 403 are inconsistent, it will cause uneven thickness of the encapsulated box, resulting in interference fringes (i.e., Newton's rings) due to light interference. Therefore, during the manufacturing process, it is usually necessary to make the heights of the glass adhesive 402 and the spacer pillar 403 as consistent as possible to prevent uneven force on the upper part, which could cause deformation and indentation of the glass adhesive 402, resulting in Newton's rings and a "Not Good" drop ball test. The drop ball test is a test method used to evaluate the performance and durability of materials or products under impact. A "Not Good" drop ball test means that the result is poor or unqualified. In addition, the spacer pillar 403 also supports the mask in the subsequent mask patterning process to prevent it from deforming under external force, thereby affecting the evaporation accuracy of the organic light-emitting material, causing the position of the evaporated material to shift, resulting in color mixing, especially at the boundary of the light-emitting area.
[0096] In some exemplary embodiments, as shown in Figures 3 and 4, the septum pillars 403 and the pixel definition layer of the light-emitting structure layer 300 can be simultaneously formed using a halftone mask patterning process. The halftone process can avoid equipment switching, thereby solving production bottlenecks, increasing production capacity, and improving efficiency. However, the applicant has found that the height of the septum pillars 403 formed simultaneously using the halftone mask patterning process is usually lower than the height of the silicone sealant 402, and research has revealed that this is because the septum pillars 403 collapse during the curing process.
[0097] The technical solutions of the embodiments of the present invention will be described in detail below through specific examples.
[0098] Figure 5 is a schematic diagram of a display panel according to an exemplary embodiment of this invention, and Figure 6 is a cross-sectional view along direction AA in Figure 5. This embodiment provides a display panel, as shown in Figures 5 and 6. The display panel may include a substrate 100, a light-emitting structural layer 300, and a plurality of spacer pillars 401. The light-emitting structural layer 300 may be disposed on the substrate 100, and the light-emitting structural layer 300 may include a pixel definition layer 301. The plurality of spacer pillars 401 are located on the side of the pixel definition layer 301 away from the substrate 100. A groove 302 may be provided on the end face of the pixel definition layer 301 away from the substrate 100. The groove 302 is located on the outer periphery of the spacer pillar 401 and extends along the circumferential edge of the spacer pillar 401. The groove 302 is configured to prevent the spacer pillar 401 from collapsing in a direction parallel to the substrate 100. Therefore, the display panel of this embodiment performs a slit treatment on the pixel definition layer, i.e., creates a groove, to prevent the spacer pillars from collapsing and reducing their height during the curing process, ensuring the height of the spacer pillars and avoiding problems such as Newton's rings caused by inconsistent heights between the spacer pillars and the silicone sealant.
[0099] In some exemplary embodiments, as shown in Figures 5 and 6, the light-emitting structure layer of the display panel may include a plurality of regularly arranged light-emitting units 303 on a plane parallel to the substrate 100. These multiple light-emitting units 303 may constitute multiple sub-pixel rows and multiple sub-pixel columns. A sub-pixel row may include multiple light-emitting units 303 arranged sequentially along a first direction, and a sub-pixel column may include multiple light-emitting units 303 arranged sequentially along a second direction. Both the first and second directions are parallel to the substrate 100, and the first direction is perpendicular to the second direction. The multiple light-emitting units 303 may include red light-emitting units emitting red light, blue light-emitting units emitting blue light, and green light-emitting units emitting green light. The red, blue, and green light-emitting units in each sub-pixel row may be periodically arranged in the first direction. The red, blue, and green light-emitting units in odd-numbered and even-numbered sub-pixel rows are staggered, with six light-emitting units sharing a surrounding light-emitting unit, forming a Delta pixel arrangement. The Delta pixel arrangement has the characteristic of a large pixel aperture ratio. However, this is not limited to this; the multiple light-emitting units 303 may also form a Magic pixel arrangement, etc. In each sub-pixel row, there is a spacer post 401 between two adjacent light-emitting units 303, thereby the multiple spacer posts 401 are arranged in an array uniformly in the direction parallel to the substrate 100.
[0100] In some exemplary embodiments, as shown in Figures 5 and 6, the spacer pillars 401 and the pixel definition layer 301 may be made of the same material, and the spacer pillars 401 and the pixel definition layer 301 are on the same layer. The materials of the spacer pillars 401 and the pixel definition layer 301 may include polyimide or acrylic, etc. The pixel definition layer 301 is provided with pixel openings (not shown in the figures), and the light-emitting units 303 are arranged one-to-one with the pixel openings. The spacer pillars 401 may be staggered with the pixel openings, that is, the orthographic projection of the groove 302 on the substrate 100 does not overlap with the orthographic projection of the pixel opening on the substrate 100. In some exemplary embodiments, the spacer pillars 401 and the pixel definition layer 301 may be formed simultaneously using a halftone mask patterning process, that is, the pattern formed by the halftone mask patterning process includes the spacer pillars 401 and the pixel openings.
[0101] In some exemplary embodiments, as shown in Figures 5 and 6, the cross-section of the spacer post 401 can be rectangular. The cross-section of the spacer post 401 can be a section on a plane parallel to the substrate 100, but is not limited to this. The cross-section of the spacer post 401 can be a regular shape such as a rhombus, trapezoid, parallelogram, triangle, pentagon, or hexagon, or it can be an irregular shape. The groove 302 can be formed by recessing the end face of the pixel definition layer 301 away from the substrate 100 into the substrate 100. The groove 302 can be formed simultaneously with the spacer post 401 and the pixel definition layer 301 through a halftone mask patterning process. That is, the pattern formed by the halftone mask patterning process includes not only the spacer post 401 and the pixel opening, but also the groove 302. The groove depth of the groove 302 can be the maximum dimension of the groove 302 in a third direction, which is perpendicular to the substrate.
[0102] In some exemplary embodiments, as shown in Figures 5 and 6, the groove 302 extends in a plane parallel to the base 100. The groove 302 is located on the outer periphery of the spacer post 401 and extends along the circumferential edge of the spacer post 401. The circumferential edge of the spacer post 401 can be the outer edge of the spacer post 401 in the direction parallel to the base 100. The groove 302 can be formed into a ring. Based on the fact that the cross-section of the spacer post 401 is rectangular, the groove 302 can be a rectangular ring surrounding the spacer post 401, but it is not limited to this. For example, when the cross-section of the spacer post 401 is rhomboid, the groove 302 can be a rhomboid ring surrounding the spacer post 401; as another example, when the cross-section of the spacer post 401 is trapezoidal, the groove 302 can be a trapezoidal ring surrounding the spacer post 401; as yet another example, when the cross-section of the spacer post 401 is hexagonal, the groove 302 can be a hexagonal ring surrounding the spacer post 401.
[0103] Figure 7 is a cross-sectional schematic diagram of another display panel according to this exemplary embodiment. In some exemplary embodiments, as shown in Figures 5 to 7, the groove width of the groove 302 can be a dimension perpendicular to the extension direction of the groove 302 and parallel to the base 100. In some exemplary embodiments, the extension direction of a portion of the groove 302 is a second direction, and the groove width of that portion of the groove 302 can be the dimension of the groove 302 in a first direction. In some exemplary embodiments, the groove width of the groove 302 can be d, where 0.5μm≤d≤1.5μm. In some exemplary embodiments, the groove width of the groove 302 remains unchanged along a third direction, and the groove width of the groove 302 at the end near the base 100 and the groove width of the groove 302 at the end away from the base 100 are equal. In this example, d = 1μm, which can effectively prevent the collapse of the spacer column 401 without affecting the arrangement of other components, and is convenient for processing and forming, but is not limited to this, for example d = 0.8μm, or d = 1.5μm, or d = 1.2μm. As shown in Figure 6, the groove width of the groove 302 gradually decreases along the direction close to the base 100, so that the cross section of the groove 302 can be an inverted trapezoid, but is not limited to this. For example, the groove wall of the groove 302 can be arc-shaped, as shown in Figure 7, and the cross section of the groove 302 can be semi-elliptical.
[0104] In some exemplary embodiments, as shown in Figures 5 and 6, the groove depth of the groove 302 is set to h, which can be the maximum dimension of the groove 302 in the direction perpendicular to the substrate 100 (third direction). In some exemplary embodiments, the value of h can be from 0.1 μm to 0.8 μm. The thickness of the pixel definition layer 301 is set to H, which can be the maximum dimension of the pixel definition layer 301 in the direction perpendicular to the substrate 100 (third direction), where 1 / 5 ≤ h / H ≤ 3 / 4. The minimum distance between the end of the groove 302 near the substrate 100 and the end face of the pixel definition layer 301 near the substrate 100 in the direction perpendicular to the substrate 100 is set to h3, where h3 ≥ 0.5 μm. The groove 302 does not penetrate the pixel definition layer 301 in the direction perpendicular to the substrate 100 (third direction), but is not limited thereto; the groove 302 can penetrate the pixel definition layer 301 in the direction perpendicular to the substrate 100 (third direction).
[0105] Figure 8 is a schematic diagram of another display panel according to this exemplary embodiment, and Figure 9 is a cross-sectional view along the BB direction in Figure 8. In some exemplary embodiments, as shown in Figures 8 and 9, the light-emitting units 303 of the light-emitting structure layer can form a Magic pixel arrangement. The light-emitting units 303 of the light-emitting structure layer can include a first electrode 304, which can be located on the side of the pixel definition layer 301 near the substrate 100. The first electrode 304 and the pixel opening 305 are arranged in a one-to-one correspondence, and the pixel opening 305 can expose a portion of the first electrode 304. The orthographic projection of the spacer post 401 on the substrate 100 can be non-overlapping with the orthographic projection of the first electrode 304 on the substrate 100, and the orthographic projection of the groove 302 on the substrate 100 can be non-overlapping with the orthographic projection of the first electrode 304 on the substrate 100. The groove 302 forms a ring.
[0106] Figure 10 is a schematic diagram of another display panel according to this exemplary embodiment, Figure 11 is a cross-sectional view along the CC direction in Figure 10, and Figure 12 is a projection view on the substrate in Figure 11. In some exemplary embodiments, as shown in Figures 10 to 12, one end of the first electrode 304 may extend to the side of the partition post 401 near the substrate 100, such that the orthographic projection of the first electrode 304 on the substrate 100 overlaps with the orthographic projection of the partition post 401 on the substrate 100. The groove 302 is offset from the first electrode 304 in a direction perpendicular to the substrate 100 (i.e., a third direction), that is, the orthographic projection of the groove 302 on the substrate 100 may not overlap with the orthographic projection of the first electrode 304 on the substrate 100.
[0107] In some exemplary embodiments, as shown in Figures 10 to 12, the cross-section of the spacer post 401 may be rectangular, and the groove 302 extends along the circumferential edge of the spacer post 401 and forms a semi-enclosed shape. In this example, the groove 302 may start from point a of the pixel definition layer 301 and extend along the circumferential edge of the spacer post 401 to point b of the pixel definition layer 301. The groove 302 may form a C-shape, so that the groove 302 does not form a ring. The pixel definition layer 301 does not have a groove 302 between points a and b. The portion of the pixel definition layer 301 between points a and b is the middle portion 306. One end of the first electrode 304 may be arranged in the third direction corresponding to the middle portion 306, so that the first electrode 304 is offset from the groove 302 in the direction perpendicular to the substrate 100 (i.e., the third direction).
[0108] In some exemplary embodiments, as shown in Figures 10 to 12, the orthographic projection of the first electrode 304 on the substrate 100 includes a first projection s1, and the orthographic projection of the groove 302 on the substrate 100 includes a second projection s2. The second projection s2 may be a semi-enclosed pattern with an opening 307. In this example, the semi-enclosed pattern may be C-shaped, and the position of the opening 307 may correspond to the aforementioned middle portion 306 in a third direction. One end of the first projection s1 may be located within the orthographic projection of the spacer post 401 on the substrate 100, and the other end of the first projection s1 extends out of the opening 307 along a first direction into the semi-enclosed pattern formed by the second projection s2, such that the second projection s2 and the first projection s1 do not overlap.
[0109] In some exemplary embodiments, as shown in Figures 10 to 12, there are multiple spacer pillars 401, all of which have the same rectangular cross-section. All grooves 302 extend along the circumferential edge of the spacer pillars 401 and can form a C-shape. Thus, all spacer pillars 401 have the same outer contour, and all grooves 302 form the same shape. However, this is not the only possibility; for example, the outer contours of the multiple spacer pillars 401 may also be different, and the shapes formed by the multiple grooves 302 may also be different.
[0110] Figure 13 is a schematic diagram of another display panel according to this exemplary embodiment. In some exemplary embodiments, as shown in Figure 13, the plurality of spacer pillars 401 may include a first spacer pillar 401-1 and a second partition pillar 401-2. The outer contours of the first spacer pillar 401-1 and the second partition pillar 401-2 are consistent, and the cross-sections of the first spacer pillar 401-1 and the second partition pillar 401-2 are the same and both are rectangular. The groove 302 located on the outer periphery of the first spacer pillar 401-1 may be the first groove 302-1, and the groove 302 located on the outer periphery of the second partition pillar 401-2 may be the second groove 302-2. The first groove 302-1 extends along the circumferential edge of the first septum post 401-1 and forms a semi-enclosed shape. The orthographic projection of the first septum post 401-1 on the substrate 100 may overlap with the orthographic projection of the first electrode 304 on the substrate 100. However, the first groove 302-1 may be offset from the first electrode 304 in a direction perpendicular to the substrate 100 (a third direction), and the orthographic projection of the first groove 302-1 on the substrate 100 may not overlap with the orthographic projection of the first electrode 304 on the substrate 100. The second groove 302-2 extends along the circumferential edge of the second septum post 401-2 and forms a rectangular ring, so that the shapes formed by the second groove 302-2 and the first groove 302-1 are inconsistent. The orthographic projection of the second septum post 401-2 on the substrate 100 does not overlap with the orthographic projection of the first electrode 304 on the substrate 100, while the second groove 302-2 can be offset from the first electrode 304 in the direction perpendicular to the substrate 100 (third direction), and the orthographic projection of the second groove 302-2 on the substrate 100 does not overlap with the orthographic projection of the first electrode 304 on the substrate 100.
[0111] Figure 14 is a schematic diagram of another display panel according to this exemplary embodiment, Figure 15 is a cross-sectional view along the DD direction in Figure 14, and Figure 16 is a partially enlarged view of point E in Figure 14. In some exemplary embodiments, as shown in Figures 14 to 16, the orthographic projection of the groove 302 on the substrate 100 may overlap with the orthographic projection of the first electrode 304 on the substrate 100. Because the electrode material of the first electrode 304 has a strong reflective effect, the exposure at the groove 302 overlapping with the first electrode 304 is greater than the exposure at the groove 302 not overlapping with the first electrode 304. When the groove 302 overlapping with the first electrode 304 is formed, it may be etched through, which may lead to color mixing. In some exemplary embodiments, the groove width of the overlapping portion of the groove 302 and the first electrode 304 may be correspondingly narrowed to avoid etching through.
[0112] In some exemplary embodiments, as shown in Figures 14 to 16, the cross-section of the spacer post 401 may be rectangular, and the groove 302 includes a first groove 302-1 and a second groove 302-2 connected end to end, which together form an annular shape. In this example, the second groove 302-2 may start from point c of the pixel definition layer 301 and extend along the circumferential edge of the spacer post 401 to point f of the pixel definition layer 301, forming a semi-enclosed shape. The first groove 302-1 may also start from point c of the pixel definition layer 301 and extend along the circumferential edge of the spacer post 401 to point f of the pixel definition layer 301, such that the first groove 302-1 may be a groove extending along a second direction.
[0113] In some exemplary embodiments, as shown in Figures 14 to 16, the width of the first groove 302-1 is set to d1, and the width of the second groove 302-2 is set to d2. The width of the second groove 302-2 is smaller than the width of the first groove 302-1, i.e., d1 < d2, to prevent the second groove 302-2 from penetrating the pixel definition layer 301. In some exemplary embodiments, d1 ≤ 0.8 μm. In this example, d1 = 0.5 μm, but it is not limited to this. For example, d1 = 0.6 μm, or d1 = 0.7 μm, or d1 = 0.9 μm. The groove depth of the first groove 302-1 is set to h1, and the groove depth of the second groove 302-2 is set to h2. The groove depth of the second groove 302-2 is greater than the groove depth of the first groove 302-1, i.e., h1 > h2. The groove depth of the first groove 302-1 can be the maximum dimension of the first groove 302-1 in the third direction, and the groove depth of the second groove 302-2 can be the maximum dimension of the second groove 302-2 in the third direction.
[0114] In some exemplary embodiments, as shown in Figures 14 to 16, the plurality of septum posts 401 may include a first septum post 401-1 and a second septum post 401-2. The outer contours of the first septum post 401-1 and the second septum post 401-2 are identical, and the cross-sections of the first septum post 401-1 and the second septum post 401-2 are identical and both are rectangular. The orthographic projection of the first septum post 401-1 on the substrate 100 may overlap with the orthographic projection of the first electrode 304 on the substrate 100, while the orthographic projection of the second septum post 401-2 on the substrate 100 may not overlap with the orthographic projection of the first electrode 304 on the substrate 100. The groove 302 on the outer periphery of the first spacer post 401-1 may include a first groove 302-1 and a second groove 302-2 forming an annular shape. The groove 302 on the outer periphery of the second spacer post 401-2 may be an annular groove with a uniform groove width. Thus, the shapes of the multiple grooves 302 are different. Some grooves 302 have a first groove 302-1 and a second groove 302-2, while the grooves 302 of other parts have a groove width of d at all points in the circumference. However, it is not limited to this. For example, all grooves 302 may have a first groove 302-1 and a second groove 302-2.
[0115] In some exemplary embodiments, as shown in Figures 14 to 16, the orthographic projection of the first groove 302-1 on the substrate 100 overlaps with the orthographic projection of the first electrode 304 on the substrate 100, and the second groove 302-2 may be offset from the first electrode 304 in a third direction, and the orthographic projection of the second groove 302-2 on the substrate 100 does not overlap with the orthographic projection of the first electrode 304 on the substrate 100.
[0116] Figure 17 is a schematic diagram of another display panel according to this exemplary embodiment, and Figure 18 is a schematic diagram of the first electrode in Figure 17. In some exemplary embodiments, as shown in Figures 17 and 18, the orthographic projection of at least one groove 302 on the substrate 100 may overlap with the orthographic projection of the first electrode 304 on the substrate 100. A plurality of first electrodes 304 include at least one first electrode unit 308, and a plurality of grooves 302 include at least one first groove 302-1. The orthographic projection of the first groove 302-1 on the substrate 100 may overlap with the orthographic projection of the first electrode unit 308 on the substrate 100. In some exemplary embodiments, to prevent the groove 302 from penetrating the pixel definition layer 301, the overlapping portion of the first electrode 304 and the groove 302 may be narrowed, and the overlapping area of the first electrode 304 and the groove 302 may be reduced.
[0117] In some exemplary embodiments, as shown in Figures 17 and 18, the first electrode 304 includes a first segment 304-1 and a second segment 304-2 arranged sequentially along a first direction. Both the first segment 304-1 and the second segment 304-2 extend along the first direction, and the second segment 304-2 may be located on the side of the first segment 304-1 near the septum post 401 in the first direction. The orthographic projection of the first segment 304-1 on the substrate 100 does not overlap with the orthographic projection of the groove 302 on the substrate 100, while the orthographic projection of the second segment 304-2 on the substrate 100 overlaps with the orthographic projection of the groove 302 on the substrate 100. The width of the first segment 304-1 is set to the minimum dimension of the first segment 304-1 in the second direction, and the width of the second segment 304-2 is set to the minimum dimension of the second segment 304-2 in the second direction. The second direction is perpendicular to the first direction and parallel to the base 100. The width of the first segment 304-1 is L1, the width of the second segment 304-2 is L2, and the width of the second segment 304-2 is less than the width of the first segment 304-1, i.e., L1 > L2.
[0118] In some exemplary embodiments, as shown in Figures 17 and 18, the first electrode 304 further includes a third segment 304-3, which may be located on the side of the second segment 304-2 away from the first segment 304-1. The orthographic projection of the third segment 304-3 on the substrate 100 may overlap with the orthographic projection of the septum post 401 on the substrate 100. The width of the third segment 304-3 is set to be the minimum dimension of the third segment 304-3 in the second direction, wherein the width of the second segment 304-2 is L2, the width of the third segment 304-3 is L3, and the width of the second segment 304-2 is less than the width of the third segment 304-3, i.e., L3 > L2.
[0119] Figure 19 is a schematic cross-sectional view of a septum column according to an exemplary embodiment of the present invention, and Figure 20 is a schematic cross-sectional view of another septum column according to an exemplary embodiment of the present invention. In some exemplary embodiments, as shown in Figure 19, the septum column 401 can extend along a first direction, and the septum column 401 has protrusions 404 at both ends in the first direction that protrude in a second direction, so that the cross-section of the septum column 401 is H-shaped rather than rectangular, so that the septum column 401 flows with the material during the curing process, but the septum column 401 can still maintain a good shape and height. However, it is not limited to this. For example, as shown in Figure 20, the septum column 401 has notches 405 at the four corners, so that the cross-section of the septum column 401 is no longer rectangular, but forms a "+" shape, which can also make the septum column 401 maintain a good shape and height after the curing process.
[0120] The following description uses the fabrication process of a display panel as an example. The "patterning process" described in this disclosure includes, for metallic, inorganic, or transparent conductive materials, processes such as photoresist coating, mask exposure, development, etching, and photoresist stripping; for organic materials, it includes processes such as organic material coating, mask exposure, and development. Deposition can be performed using any one or more of sputtering, evaporation, and chemical vapor deposition; coating can be performed using any one or more of spraying, spin coating, and inkjet printing; etching can be performed using any one or more of dry etching and wet etching. This disclosure does not limit the methods used. A "thin film" refers to a thin film made of a certain material on a substrate 100 using deposition, coating, or other processes. If the "thin film" does not require a patterning process during the entire fabrication process, it can also be called a "layer." If the "thin film" requires a patterning process during the entire fabrication process, it is called a "thin film" before the patterning process and a "layer" after the patterning process. The "layer" after the patterning process contains at least one "pattern." The phrase "A and B are arranged in the same layer" in this disclosure means that A and B are formed simultaneously through the same patterning process, and the "thickness" of the film layer is the dimension of the film layer in the direction perpendicular to the display panel. In the exemplary embodiments of this disclosure, "the orthographic projection of B is within the range of the orthographic projection of A" or "the orthographic projection of A includes the orthographic projection of B" means that the boundary of the orthographic projection of B falls within the boundary range of the orthographic projection of A, or the boundary of the orthographic projection of A overlaps with the boundary of the orthographic projection of B.
[0121] In an exemplary embodiment, the manufacturing process of the display panel may include the following steps.
[0122] Step 1: Form a circuit structure layer on the substrate.
[0123] The fabrication process of the completed circuit structure layer forms a pixel driving circuit, which may include transistors and capacitors. The substrate 100 may be a rigid substrate 100 or a flexible substrate 100. The rigid substrate 100 may be made of materials such as glass or quartz, and the flexible substrate 100 may be made of materials such as polyimide (PI). The flexible substrate 100 may be a single-layer structure or a stacked structure composed of inorganic material layers and flexible material layers, which is not limited herein.
[0124] Step 2: Form the anode (i.e., the first electrode).
[0125] A conductive thin film is deposited on the substrate 100 on which the pattern of the previous step was formed. The conductive thin film is patterned by a patterning process to form an anode electrode layer pattern. The anode electrode layer pattern of each sub-pixel may include at least a first electrode.
[0126] The conductive film can be made of metal materials, transparent conductive materials, or a multilayer composite structure of metal materials and transparent conductive materials. The metal materials can include any one or more of silver (Ag), copper (Cu), aluminum (Al), titanium (Ti) and molybdenum (Mo), or alloys of the above metals. The transparent conductive materials can include indium tin oxide (ITO) or indium zinc oxide (IZO). The multilayer composite structure can be ITO / Al / ITO, etc.
[0127] Step 3: Form the pixel definition layer and spacer pillars.
[0128] A pixel definition film is coated on the substrate 100 on which the aforementioned pattern is formed. The pixel definition film is patterned by a patterning process to form a pixel definition layer 301 and spacer pillars 401. The pixel definition layer 301 is provided with pixel openings. The pixel definition film inside the pixel openings is removed to expose the surface of the first electrode.
[0129] In some exemplary embodiments, the material of the pixel-defining film may include polyimide or acrylic, etc. The patterning process may be a half-tone mask patterning process, forming a first pattern including pixel openings, spacer pillars 401, and grooves 302. The patterning process may include first coating the pixel-defining film with photoresist; then, performing exposure using optical proximity correction (OPC) technology, which helps maintain the shape and height of the spacer pillars 401; followed by sequential development and etching.
[0130] Subsequently, on the substrate 100 where the first pattern is formed, an organic light-emitting layer is formed on each sub-pixel by vapor deposition or inkjet printing. The organic light-emitting layer is connected to the first electrode through a pixel opening. In an exemplary embodiment, the organic light-emitting layer may include a light-emitting layer (EML), and any one or more of the following: a hole injection layer (HIL), a hole transport layer (HTL), an electron blocking layer (EBL), a hole blocking layer (HBL), an electron transport layer (ETL), and an electron injection layer (EIL).
[0131] In some exemplary embodiments, the organic light-emitting layer can be fabricated as follows: First, a hole injection layer, a hole transport layer, and an electron blocking layer are sequentially formed using an open mask (OPM) vapor deposition process or an inkjet printing process, forming a common layer of the hole injection layer, hole transport layer, and electron blocking layer on the display panel. Then, a fine metal mask (FMM) vapor deposition process or an inkjet printing process is used to form different light-emitting layers in different sub-pixels. The light-emitting layers of adjacent sub-pixels may have a small amount of overlap (e.g., the overlapping portion occupies less than 10% of the area of their respective light-emitting layer patterns), or they may be isolated. Finally, a hole blocking layer, an electron transport layer, and an electron injection layer are sequentially formed using an open mask vapor deposition process or an inkjet printing process, forming a common layer of the hole blocking layer, electron transport layer, and electron injection layer on the display panel.
[0132] In some exemplary embodiments, the organic light-emitting layer may include a microcavity conditioning layer, such that the thickness of the organic light-emitting layer between the cathode and the anode meets the design of the microcavity length. In some exemplary embodiments, a hole transport layer, an electron blocking layer, or an electron transport layer may be used as the microcavity conditioning layer, and this disclosure is not limited thereto.
[0133] Subsequently, a cathode pattern is formed using an open-mask vapor deposition method. In some exemplary embodiments, the cathode material can be any one or more of magnesium (Mg), silver (Ag), aluminum (Al), copper (Cu), and lithium (Li), or an alloy made of any one or more of the aforementioned metals. At this point, the light-emitting structure layer pattern is complete. Subsequent processes involving the formation of the encapsulation structure layer, optical structure layer, and cover plate yield the display panel.
[0134] In some exemplary embodiments, a display device includes the aforementioned display panel. The display device provided in this disclosure can be applied to electronic devices, which can be mobile phones, tablets, televisions, monitors, laptops, digital photo frames, navigators, in-vehicle displays, or any product or component with display functionality, such as wearable devices, smartwatches, smart bracelets, smart glasses, smart headphones, smart clothing, head-mounted displays, etc.
[0135] In some exemplary embodiments, a method for manufacturing a display panel includes:
[0136] A light-emitting structure layer and a plurality of spacer pillars are formed on a substrate. The light-emitting structure layer includes a pixel definition layer. The plurality of spacer pillars are located on the side of the pixel definition layer away from the substrate. The end face of the pixel definition layer away from the substrate is provided with a groove. The groove is located on the outer periphery of the spacer pillar and extends along the circumferential edge of the spacer pillar. The groove is configured to prevent the spacer pillar from collapsing in a direction parallel to the substrate.
[0137] In the description of this application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc., indicating the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.
[0138] Furthermore, the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first," "second," etc., may explicitly or implicitly include at least one of those features.
[0139] In the description of this application, "multiple" means at least two, such as two, three, etc., unless otherwise expressly and specifically limited.
[0140] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "joining," "fixing," etc., should be interpreted broadly. For example, "connection" can be a fixed connection, a detachable connection, or an integral part; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium; it can be the internal communication of two components or the interaction between two components, unless otherwise expressly limited. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.
[0141] In this application, unless otherwise expressly specified and limited, "above" or "below" the second feature can mean that the first and second features are in direct contact, or that the first and second features are in indirect contact through an intermediate medium. Furthermore, "above," "over," and "on top" of the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.
[0142] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.
[0143] Although embodiments of this application have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting this application. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of this application.
Claims
1. A display panel, wherein, include: Base; A light-emitting structure layer is disposed on the substrate, the light-emitting structure layer including a pixel definition layer; Multiple spacer pillars are located on the side of the pixel definition layer away from the substrate; The pixel definition layer has a groove on its end face away from the substrate. The groove is located on the outer periphery of the septum post and extends along the circumferential edge of the septum post. The groove is configured to prevent the septum post from collapsing in a direction parallel to the substrate.
2. The display panel according to claim 1, wherein, The groove width is set to d, where 0.5μm≤d≤1.5μm.
3. The display panel according to claim 2, wherein, d = 1 μm.
4. The display panel according to claim 1, wherein, The light-emitting structure layer includes a first electrode located on the side of the pixel definition layer near the substrate, and the pixel definition layer has a pixel opening for exposing the first electrode; The orthographic projection of the groove on the substrate does not overlap with the orthographic projection of the pixel opening on the substrate.
5. The display panel according to claim 4, wherein, The orthographic projection of the groove on the substrate is configured not to overlap with the orthographic projection of the first electrode on the substrate.
6. The display panel according to claim 5, wherein, The orthographic projection of the septum post on the substrate does not overlap with the orthographic projection of the first electrode on the substrate, and the groove forms a ring.
7. The display panel according to claim 5, wherein, The orthographic projection of the first electrode on the substrate overlaps with the orthographic projection of the septum post on the substrate; The orthographic projection of the groove onto the substrate is set as a semi-enclosed shape with an opening; The orthographic projection of the first electrode on the substrate includes a first projection, one end of which is located within the orthographic projection of the septum post on the substrate, and the other end extends out of the opening from the semi-enclosed pattern.
8. The display panel according to claim 4, wherein, The groove includes a first groove and a second groove that are connected end to end, and the first groove and the second groove together form a ring; The orthographic projection of the first groove on the substrate overlaps with the orthographic projection of the first electrode on the substrate, while the orthographic projection of the second groove on the substrate does not overlap with the orthographic projection of the first electrode on the substrate; The width of the first groove is set to d1, and the width of the second groove is set to d2, where d1 < d2.
9. The display panel according to claim 8, wherein, d1≤0.8μm.
10. The display panel according to claim 8, wherein, The depth of the first groove is set to h1, and the depth of the second groove is set to h2, where h1 > h2.
11. The display panel according to claim 4, wherein, The first electrode includes a first segment and a second segment arranged sequentially along a first direction. The orthographic projection of the first segment on the substrate does not overlap with the orthographic projection of the groove on the substrate, while the orthographic projection of the second segment on the substrate overlaps with the orthographic projection of the groove on the substrate. The first direction is parallel to the substrate. The width of the first segment is L1, and the width of the second segment is L2, where L1 > L2; The width of the first segment is set to the minimum dimension of the first segment in the second direction, and the width of the second segment is set to the minimum dimension of the second segment in the second direction, wherein the second direction is parallel to the base and perpendicular to the first direction.
12. The display panel according to any one of claims 1 to 11, wherein, The cross-section of the septum column is set to H-shape or cross-shape.
13. The display panel according to any one of claims 1 to 11, wherein, The width of the groove gradually decreases along the direction close to the base.
14. The display panel according to any one of claims 1 to 11, wherein, The groove depth is set to h, and the pixel definition layer thickness is set to H, where 1 / 5 ≤ h / H ≤ 3 / 4.
15. The display panel according to any one of claims 1 to 11, wherein, The minimum distance between the end of the groove near the substrate and the end face of the pixel definition layer near the substrate in the direction perpendicular to the substrate is set to h3, where h3 ≥ 0.5 μm.
16. A method for manufacturing a display panel, wherein, include: A light-emitting structure layer and a plurality of spacer pillars are formed on a substrate, wherein the light-emitting structure layer is disposed on the substrate and the light-emitting structure layer includes a pixel definition layer; The plurality of spacer pillars are located on the side of the pixel definition layer away from the substrate; the end face of the pixel definition layer away from the substrate is provided with a groove, the groove being located on the outer periphery of the spacer pillar and extending along the circumferential edge of the spacer pillar, the groove being configured to prevent the spacer pillar from collapsing in a direction parallel to the substrate.
17. The method for manufacturing a display panel according to claim 16, wherein, The process of forming a light-emitting structural layer and multiple septum pillars on the substrate includes: Deposited pixel-defined thin film; The pixel-defining film is simultaneously patterned using a halftone mask process to form a first pattern, the first pattern including the plurality of spacer pillars and the groove.
18. The method for manufacturing a display panel according to claim 17, wherein, The pixel-defining film is simultaneously patterned using a halftone mask to form a first pattern, the first pattern including the plurality of spacer pillars and the groove, including: Photoresist is coated onto the pixel definition film; Optical proximity correction technology is used for exposure.
19. A display device, wherein, Includes the display panel as described in any one of claims 1 to 15.