Gate driver circuit with current control

Abstract

The present invention relates to a method for switching operations of a high power inverter circuit, with a plurality of parallel inverter legs, each leg comprises at least two semiconductor power switch devices, the method comprises, calculating a setpoint current (I) for the individual parallel inverter leg, based on a power (P, Q) setpoints and the number of parallel inverter legs wherein the parallel inverter legs share the current, measuring by means of a low bandwidth current sensor an output current of the individual parallel inverter leg, comparing the setpoint current (I) and the measured current, to obtain a current error, feeding the current error into a PI controller, which is outputting a voltage change (∆V_(i)), feeding the voltage change to a gate driver unit, which outputs individual gate-source voltage to the at least two power switch devices, thereby continuously adjusting the output current in the individual parallel inverter leg in a closed loop control.

Description

[0001] GATE DRIVER CIRCUIT WITH CURRENT CONTROL

[0002] FIELD OF THE INVENTION

[0003] The invention is relevant for multi megawatt power converters, where parallel semiconductors are used to achieve the high-power rating and the high-power density, while operated under medium voltage levels.

[0004] BACKGROUND OF THE INVENTION

[0005] The idea of applying a variation of gate voltage values to the semiconductor switch connected in parallel is commonly share in the academics. These strategies are based on the modification of transistor gate-source VGs or gateemitter control voltage VGE by using an active gate driver circuit, whether the switch is of the MOSFET or IGBT type. They demand a fast and accurate measurement on the individual current, which is typically based on the high-bandwidth Rogowski coils or shunt resistors. Moreover, they also require the high frequency analog-to-digital converters, the high frequency FPGA and DSP to process the signals.

[0006] Prior art shows an application of the plasma science, i.e. a 20-kA solid-state modulator with multiple pulse generators in parallel. Its current output is a single or several pulses. The study is aiming for precisely controlling the parallel IGBTs' pulses at a specific output-current-level (5kA in this case) and not continuously adjusting them. In other words, the control aim of the prior art is to find the optimized gate pulses for a specific high-current level quickly and precisely.

[0007] To achieve this aim, the idea needs a fast and accurate Rogowski current sensor coil (to detect the current peak and edges) and the high frequency FPGA and DSP to spontaneously change the pulse timing and voltage levels.

[0008] These strategies are too complex and expensive for some industrial applications, i.e., the power converters in the renewable areas, but not limited to, because, the required components are exposed to a complex EMC environment (resulting in plenty of disturbances) and prone to mis-behave; and any suddenly / spontaneously change on the voltage can cause significantoscillations and damage the converter immediately; and last but not least the required components are expensive.

[0009] It is therefore the objective of the present idea to improve the drawback of the prior art and develop a simpler and more reliable system.

[0010] SUMMARY

[0011] This summary is provided to introduce a selection of concepts in a simplified form that are further described below in the Detailed Description. This Summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter.

[0012] In a first aspect of the invention, method for switching operations of a high power inverter circuit, with a plurality of parallel inverter legs, each leg comprises at least two semiconductor power switch devices, the method comprises: calculating a setpoint current (I) for the individual parallel inverter leg, based on a power (P, Q) setpoints and the number of parallel inverter legs wherein the parallel inverter legs share the current,

[0013] measuring by means of a low bandwidth current sensor an output current (I_meas_i, I_meas_n) of the individual parallel inverter leg,

[0014] comparing the setpoint current (I) and the measured current (I_meas_i), to obtain a current error,

[0015] feeding the current error into a PI controller, which is outputting a voltage change (AV_(i)),

[0016] feeding the voltage change (AV_(i)) to a gate driver unit, which outputs individual gate-source voltage (Vgs_(i)) to the at least two power switch devices, thereby continuously adjusting the output current in the individual parallel inverter leg in a closed loop control.

[0017] Advantageously, the controller will calculate the phase current by means of adding each semiconductor's measurement current in the parallel configuration. Then the controller executes the phase current control model, to obtain the phase current control target.Based on the phase current control target, the controller further executes the individual semiconductor's current control model to obtain the individual semiconductor's Vgs and GDU power supplies' voltage target, and outputs the control action to the converter system.

[0018] According to an embodiment the step of measuring the output current further comprises, calculating a rms value (Irms_meas_i) of the measured current or a peak current value (I_peak_i) during a fundamental period of output current. According to an embodiment the closed loop control is updating the voltage levels at a low frequency, such as 1 to 10 times the fundamental period of output current.

[0019] According to an embodiment the closed loop control is updating the voltage levels at a low frequency, such as 10 to 100 times the fundamental period of output current.

[0020] An advantage of the low bandwidth of the controller, or the low updating frequency is that the controller is immune to EMC disturbances, which can avoid the suddenly / spontaneously change on the voltage caused by EMC disturbances. According to an embodiment the power inverter is operated in the medium voltage range, i.e. above lOOOVac.

[0021] According to an embodiment the semiconductor power switch devices are based on silicon carbide. Power switch devices most relevant for the invention would be switches in a group of Silicon Carbide (SiC) based, this is often of a MOSFET type, but not limited to this type. Similarly the invention can in an embodiment be used with Silicon based switches.

[0022] According to an embodiment the current sensors are operated at a sampling frequency lower than 1000Hz. Alternatively, they are operated at a sampling frequency in a range of 1kHz to 5kHz.

[0023] According to an embodiment the current sensors are operated at a sampling frequency around 8kHz.

[0024] The proposed idea can adopt some commercial sensors with lower sampling frequency (e.g., some hall effect-based sensors at kHz-level), besides the Rogowski coils.Dealing with imbalance caused not only by the semiconductors' electrical parameters' initial variance, but also by the degradation on the semiconductor and circuit electrical parameters (e.g. circuit stray inductance).

[0025] A second aspect of the invention relates to a high power inverter circuit is implemented in a wind turbine generator (100).

[0026] A third aspect of the invention relates to a gate driver circuit operated according to any of the preceding claims.

[0027] According to an embodiment the current sensor is mounted to a PCB board of the gate driver circuit.

[0028] According to an embodiment the current sensor is a built-in hall effect current sensor or a built-in Rogowski coil, or a combined sensor with both hall effect and Rogowski coil.

[0029] Advantageously the gate driver interface board with PCB (printed-circuit-board) based integrated current sensors can measure and feedback individual semiconductor's phase out AC current.

[0030] The individual semiconductor's phase out AC current information, together with the individual power supplying voltage control, can assist the individual semiconductor's current control, thus reducing the design margin of the converter ratings when paralleling semiconductors. Therefore, the invention can increase the converter power ratings. The integration of both signal transferring functionality, the current sensing functionality and the GDU power supplying functionality can reduce the volume of the converter, thus increasing the converter's power density.

[0031] Many of the attendant features will be more readily appreciated as the same become better understood by reference to the following detailed description considered in connection with the accompanying drawings. The preferred features may be combined as appropriate, as would be apparent to a skilled person, and may be combined with any of the aspects of the invention.BRIEF DESCRIPTION OF THE DRAWINGS

[0032] So that it may be more fully understood, the invention will now be described, by way of example only, with reference to the following drawings, in which like features are assigned like reference numerals, and in which:

[0033] Figure 1 shows a circuit diagram of a typical inverter bridge;

[0034] Figure 2 shows an example of the un-balanced current sharing among parallel semiconductors;

[0035] Figure 3 shows the configuration of parallel semiconductors and the peripheral components;

[0036] Figure 4 shows a typical MOSFET output characteristic waveform;

[0037] Figure 5 shows an illustration on the current sensing functionality of the invention; Figure 6 shows the method with a plurality of parallel connected inverter phase legs.

[0038] Figure 7 shows the benefits of comparing the peak currents.

[0039] Figure 8 shows a summarization of the steps of the invention.

[0040] Figure 9 shows a wind turbine as described in the description.

[0041] Figure 10 shows an example of a power system of a wind turbine or a power generating unit.

[0042] DESCRIPTION OF EMBODIMENTS

[0043] The present invention is relevant for mega watt power converters, where parallel semiconductors are used to achieve the high-power rating and the high-power density, especially, but not limited to, medium voltage silicon carbide power switches.

[0044] The invention is about a gate driver interface circuit, which can be installed on a PCB (printed-circuit-board) with integrated current sensors, as well as the power supplies for the individual gate driver.

[0045] A gate driver interface circuit, often mounted on a printed circuit board, is normally used for transferring the signals between a controller board and the gate drivers ofthe semiconductors. The gate driver interface circuit usually transfers the following signals for the Converter:

[0046] Command signals for the semiconductors (e.g., turn-on and turn-off signals)

[0047] - Status signals from the semiconductors (error status, temperature measurement, etc.)

[0048] The present invention is relevant for different converter topologies, where there is a need for large medium voltage power converters, with parallel switches. Different applications in the renewable energy sector, such as wind and solar. Wind turbine generators both in full scale or double-fed systems with parallel semiconductors, are seen as candidates for such large power converters, but not limited to this use. One evolution of wind turbines is larger turbines with increased power. Meanwhile, the requirement on the converter volume demands increasing the power density. One common method to increase the converter power rating / power density is to add more parallel power semiconductors. However, the converter power ratings are not increasing linearly with the number of parallel power semiconductors, and plenty of design margins on the power rating are required.

[0049] When parallel semiconductors, there are several aspects that will lead to large design margins and further limit the power ratings increasing.

[0050] Figure 1 shows an example of an inverter bridge with 3 phase legs connected to a DC capacitor bank 3, which is also understood as a DC intermediate link. Each phase leg 10 comprises two power switches, an upper la and a lower lb switch connecting between the positive and negative DC link terminal. The midpoint between the upper and a lower switch is the output terminal 2 of the phase leg. The output current is measured by means of a current sensor 20. Such inverter bridges are known to the skilled person. When discussing parallel connection several phase leg, one can also see Figure 1 as an illustration of three parallel phase legs, and thus the figure only represents a single phase inverter bridge.

[0051] The variances on the semiconductor's electrical parameters. During the mass production of the semiconductors, the variance among products is not avoidable due to the machine accuracy, materials properties, and so on. For instance, the differences of the on-state resistance will result in the un-balanced current sharing among the parallel semiconductors.The degradation on the semiconductor's electrical parameters during the converter operation lifetime. For instance, the on-state resistance can increase eventually due to the bond-wires lift-off, the cracks on the solder layer, etc., another example is the MOSFETs' turn-on threshold voltage Vgs_th can drift within the lifetime.

[0052] The variances on the electrical parameters of the circuit configuration. When paralleling the semiconductors, it is unavoidable to create variable electrical parameters in the circuit. For instance, the differences on the stray inductance of the individual semiconductor's electrical path will lead to an un-balanced current sharing among the parallel semiconductors, especially during the conduction phase. As illustrated in Figure 2, when there are plenty of semiconductors in parallel, even the average current is below the rated current, some semiconductor's currents (e.g., h in the figure) can be higher than the rated current and be prone to fail, which is due to the un-balanced current sharing. Thus, if the current in the individual phase leg isn't controlled the operational current has to be lowered, which leads to low utilization of the capacity.

[0053] Therefore, the un-balanced current sharing among the parallel semiconductors leads to plenty of design margins on the converter current ratings, thus limit the increase on the converter power ratings when paralleling semiconductors.

[0054] The present invention is about proposing an apparatus to improve the current sharing among the parallel semiconductors by means of integrating the individual semiconductor's current sensing and the individual gate driver unit's (GDU) power supplying into the gate driver interface board.

[0055] Figure 3 shows three parallel phase legs 33, each controlled by a gate driver unit (GDU) 35 with its own power supply 38. The gate driver unit (GDU) feeds gate signals to upper and lower switch according to controller. The gate signals from the GDU are of course ensured to prevent both the upper 31 and lower switch to be turned on at the same time, by means of some interlocking time period, and other housekeeping features to prevent failures. The output current of the phase current is measured by a current sensor. Each GDU 35 is controlled by a GDU interface board 36, which again receives control signals from a main controller board 37, which is to be seen as the inverter controller, from where the active and reactive power / current references are calculated. The active and reactive power / current references of the power converter or inverter bridge translates into a phase legreference depending on the total number of phase legs and / or inverter bridges, this is known to the skilled person.

[0056] For the most of gate-controlled semiconductors (e.g., MOSFETs, IGBTs), the conducting current is a function of the conducting voltage drop and the gate voltage. In figure 4, a typical MOSFET's output characteristic waveform is shown, where the drain current (Id) is increasing with both the drain-source voltage (Vds) and the gate-source voltage (Vgs), i.e., Vgsl>Vgs2>Vgs3. It means that, to increase the individual semiconductor's conducting current Id, a feasible method is to increase the Vgs. By means of implementing the individual power supplies with adjustable DC voltage outputs for each GDU in the parallel configuration, an individual Vgs can be obtained for a given current level through the switch.

[0057] IGBTs have the similar output characteristic waveforms, thus the present invention can also be used for IGBT-based converters.

[0058] The gate driver interface board is installed between the controller board and the gate drivers (GDU), as shown in Figure 3. The current sensors on each phase leg semiconductor's AC output are integrated into the gate driver interface circuit by means of a PCB-based solution, to make the design more reliable and easier to manufacture. The current sensor can be a built-in hall effect current sensor or a built-in Rogowski coil, or a combined sensor with both hall effect and Rogowski coil. The benefit of the present invention is to be able to use current sensors with reduced frequency bandwidth, so it is not required to use a Rogowski coil type sensor, but it is not excluded from the invention.

[0059] The gate driver interface board with integrated current sensors will feedback the individual semiconductor's measured current to the controller. The controller will calculate the phase current by means of adding each semiconductor's measurement current in the parallel configuration. Then the controller executes the phase current control model, to obtain the phase current control target.

[0060] Based on the phase current control target, the controller further executes the individual semiconductors current control model to obtain the individual semiconductor's Vgs and GDU power supplies' voltage target, and outputs the control action to the converter system, according to the specific semiconductors curve, similar to Figure 4.The power converter in wind turbines has the continuous PWM operations, which needs adjusting the current sharing in a continuously and long-term manner, i.e. dealing with imbalance caused not only by the semiconductors' electrical parameters' initial variance, but also by the degradation on the semiconductor and circuit electrical parameters (e.g. circuit stray inductance).

[0061] The proposed idea can adopt commercial current sensors with lower sampling frequency (e.g., some hall effect-based sensors at kHz-level), besides the Rogowski coils.

[0062] Figure 5 shows the closed loop current control loop aiming at updating the voltage levels gently and slowly with a low updating rate of delta_V, which can avoid the suddenly / spontaneously change on the voltage by EMC disturbances 56. The individual switch leg RMS current reference 51 is compared with the measured individual switch leg RMS current 58, and the error is fed into a controller block 53, which feeds the output signal as adjusted delta_V to converter system 54 which is a simplification of the system, as it in fact operates at phase leg level. The system outputs a current 5, which is measured and processed in the PCB based integrated current sensors 55.

[0063] As explained in the background section the required components are exposed to a complex EMC environment (resulting in plenty of disturbances) and prone to mis-behave; and any suddenly / spontaneously change on the voltage can cause significant oscillations and damage the converter immediately. It is therefore important to have the use the proposed method.

[0064] The working principle is:

[0065] 1) Based on the P / Q setting points, the controller calculates the required rms current value Irms_cal, and / or the accordingly peak current value as a control reference 61.

[0066] I_ref = V2 x Irms_cal

[0067] 2) The individual current sensors measure the semiconductor AC output current I_meas_i 65.

[0068] 3) The measured current I_meas_i feeds into an ADC / processor 69, whichcalculates the rms value Irms_meas_i 68 and the peak current value I_peak_i during the fundamental period (e.g., one period of the 50Hz or 60Hz).

[0069] I_peak_i = 2 x Irms_meas_i

[0070] 4) The peak current value I_peak_i is compared 66 with the reference peak current value I_ref 61.

[0071] 5) The difference of the two currents feeds into a PI controller 62 and output the needed A7_(i).

[0072] 6) The needed A7_(i) info further feeds into the Gate driver unit 63, which outputs the individual gate-source voltage or gate-emitter voltage Vge ^i),w'th additional adjusted contribution from the A7_(i).

[0073] The ADC / processor 69 takes the analogue current signal output of the current sensor and converts it into a digital signal, thus ADC.

[0074] Figure 6 is trying to illustrate how the individual gate driver units (GDU) are operated in the parallel inverter phase leg configuration, where it is the peak current that is used in the comparison, the reference peak current value I_ref for all the phase legs, similar to Figure 5. The difference here is that the semiconductors are part of the closed loop.

[0075] The updated gate driver unit voltage leads to a higher current flow in the phase leg according to Figure 4.

[0076] Figure 7 illustrates another reason to focus on controlling the peak current value, as the current imbalance is much larger in the peak zone of a sine wave.

[0077] Figure 8 shows a summarization of the steps of the method performed by the controller in accordance examples of the invention; Step 801 is obtaining the measured current in the semiconductor, step 802 is calculate each phase's measured current, step 803 is execute phase current control model, step 804 is obtain phase current control target, step 805 is executing individual semiconductor's current control model, step 806 is obtaining the individual semiconductor GDU power supplies voltage target, and step 807 is outputting the control action by updating the output voltage of the gate driver unit.Figure 9 shows a wind turbine as an example of where the invention can be implemented, the wind turbine generator 100 (WTG) comprising a tower 101 and a rotor 102 with at least one rotor blade 103, such as three blades. The rotor is connected to a nacelle 104 which is mounted on top of the tower 101 and being adapted to drive a generator situated inside the nacelle via a drive train. The rotor 102 is rotatable by action of the wind. The wind induced rotational energy of the rotor blades 103 is transferred via a shaft to the generator. Thus, the wind turbine 100 is capable of converting kinetic energy of the wind into mechanical energy by means of the rotor blades and, subsequently, into electric power by means of the generator. The generator is connected with a power converter which comprises a generator side converter and a line side converter. The generator side converter converts the generator AC power into DC power and the line side converter converts the DC power into an AC power for injection into the utility grid.

[0078] Figure 10 shows an example of a power system 200 of a wind turbine 100 according to an embodiment. The power system comprises a generator 201 and a power converter 202. The power converter 202 comprises a machine side converter 203, a line side converter 204, a DC-link 205 and a resistor 207 connected with a controllable switch 206. The resistor and switch forms a power dissipation device, also known as a chopper 209, for dissipating active power. The DC-link 205 comprises on or more DC-link capacitors which are charged by the DC output current from the generator side converter 203 and which supplies DC power to the line side converter 204. The output AC current from the line side converter 204 is supplied via output inductors 206 and possibly via a wind turbine transformer 208 to the power line 220. Harmonic filter capacitors 216 arranged between the conductors of the output, together with the inductors 206, forms a harmonic filter which converts the square wave voltage signals from the the line side converter 204 to voltage sinusoidal signals.

[0079] Since power system 200 also applies to other power generating unit configured with a full scale power converter 202, the examples and embodiments of the present invention applies equally to other power generating units such as renewable power generating units such as solar power units, e.g. photovoltaic power generating units. That is, the generator 201 may be embodied by solar power generator.The power line 220 may be a medium voltage power bus which receives power from other wind turbines 100. The power line 220 may be connected with a high voltage network, e.g. via further transformers. Thus, the power line 220 and one or more power systems 200 of corresponding wind turbines constitutes a wind power plant or park arranged to supply power to a utility grid for distribution of electrical power.

[0080] The power converter 202 may be full-scale converter configured according to different principles including forced -com mutated and line-commutated converters. The power system 200 is principally illustrated and therefore does not explicitly reveal that the system may be a three phase system. However, principles of the described embodiments apply both to single and multi-phase systems.

[0081] The line side converter 204 uses some variant of pulse width modulation (PWM) for converting the DC power into AC power. The control system 250 is used for controlling the modulation of the line side converter 204 and for controlling the active power P and the reactive power Q generated by the line side converter 204. Any range or device value given herein may be extended or altered without losing the effect sought, as will be apparent to the skilled person.

[0082] It will be understood that the benefits and advantages described above may relate to one embodiment or may relate to several embodiments. It will further be understood that reference to 'an' item refer to one or more of those items.

[0083] It will be understood that the above description of a preferred embodiment is given by way of example only and that various modifications may be made by those skilled in the art. The above specification, examples and data provide a complete description of the structure and use of exemplary embodiments of the invention. Although various embodiments of the invention have been described above with a certain degree of particularity, or with reference to one or more individual embodiments, those skilled in the art could make numerous alterations to the disclosed embodiments without departing from the spirit or scope of this invention.

Claims

CLAIMS1. A method for switching operations of a high power inverter circuit, with a plurality of parallel inverter legs, each leg comprises at least two semiconductor power switch devices, the method comprises:calculating a setpoint current (I) for the individual parallel inverter leg, based on a power (P, Q) setpoints and the number of parallel inverter legs wherein the parallel inverter legs share the current,measuring by means of a low bandwidth current sensor an output current (I_meas_i, I_meas_n) of the individual parallel inverter leg,comparing the setpoint current (I) and the measured current (I_meas_i), to obtain a current error,feeding the current error into a PI controller, which is outputting a voltage change (AV_(i)),feeding the voltage change (AV_(i)) to a gate driver unit, which outputs individual adjustable gate-source voltage (Vgs_(i)) to the at least two power switch devices, thereby continuously adjusting the output current in the individual parallel inverter leg in a closed loop control.

2. A method according to claim 1, wherein the step of measuring the output current further comprises:calculating a rms value (Irms_meas_i) of the measured current or a peak current value (I_peak_i) during a fundamental period of output current.

3. A method according to claim 1, wherein the closed loop control is updating the voltage levels at a low frequency, such as 1 to 10 times the fundamental period of output current.

4. A method according to claim 1, wherein the closed loop control is updating the voltage levels at a low frequency, such as 10 to 100 times the fundamental period of output current.

5. A method according to claim 1, wherein the power inverter is operated in the medium voltage range, i.e. above lOOOVac.

6. A method according to claim 1, wherein the semiconductor power switch devices are based on silicon carbide.

7. A method according to claim 1, wherein the current sensors are operated at a sampling frequency lower than 1000Hz.

8. A method according to claim 1, wherein the current sensors are operated at a sampling frequency in a range of 1kHz to 5kHz.

9. A method according to any of the preceding claims, wherein the high power inverter circuit is implemented in a wind turbine generator (100).

10. A gate driver circuit operated according to any of the preceding claims.

11. A gate driver circuit according to claim 10, wherein the current sensor is mounted to a PCB board of the gate driver circuit.

12. A gate driver circuit according to claim 10, wherein the current sensor is a built-in hall effect current sensor or a built-in Rogowski coil, or a combined sensor with both hall effect and Rogowski coil.

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