Improved training of variational quantum algorithms through delegation to quantum and classical resources

Abstract

According to an embodiment, a quantum circuit including first quantum gates is created. First parameters of first quantum gates are determined, based on a classical hardware. A precision level associated with the quantum circuit is determined and operations are executed based on the precision level. The operations include adding second quantum gates to the quantum circuit, based on the precision level. First parameter gradients of the first quantum gates are determined, based on the classical hardware and a quantum hardware. The first parameters are updated, based on the first parameter gradients, using the classical hardware. Second parameter gradients of the second quantum gates are determined, based on the quantum hardware. The second parameters are updated based on the second parameter gradients, using the classical hardware. Optimized parameters of the quantum circuit are obtained by iteratively executing the operations based on the precision level.

Description

[0001] IMPROVED TRAINING OF VARIATIONAL QUANTUM ALGORITHMS THROUGH DELEGATION TO QUANTUM AND CLASSICAL RESOURCES

[0002] FIELD

[0003] The embodiments discussed in the present disclosure are related to improved training of variational quantum algorithms through delegation to quantum and classical resources.

[0004] BACKGROUND

[0005] Advancements in quantum computing and machine learning have led to the development of hybrid quantum-classical computers. The quantum algorithms facilitate the execution of machine learning tasks, such as pattern recognition, by leveraging quantum computing. As machine learning evolved, the scale and complexity of tasks have increased, necessitating a shift from classical to quantum domains. Quantum computers, which may surpass classical computers (hosting classical deep learning models) in computational efficiency, accuracy, or latency, can facilitate this transition. However, despite their potential to scale beyond classical methods, quantum computers face challenges such as high gate noise, limited scalability (to a few hundred qubits), and the lack of reliable error detection and mitigation algorithms. To address these limitations, researchers have developed quantum-classical algorithms, such as variational quantum algorithms (VQAs), which serve as a bridge between quantum and classical methods. Such hybrid algorithms may enable the execution of complex, large-scale machine learning tasks on quantum computers by optimizing their performance using classical computing resources.The subject matter claimed in the present disclosure is not limited to embodiments that solve any disadvantages or that operate only in environments such as those described above. Rather, this background is only provided to illustrate one example of the technological area where some embodiments described in the present disclosure may be practiced.

[0006] SUMMARY

[0007] According to an aspect of an embodiment, a method may include a set of operations. The set of operations includes generating a quantum circuit based on an energy operator and a mathematical object. The quantum circuit includes a set of first quantum gates. The set of operations may further include determining first parameters of the set of first quantum gates, based on a classical hardware. A precision level associated with the quantum circuit may be determined, based on the first parameters. A set of first operations may be executed based on the precision level. The set of first operations may include adding a set of second quantum gates to the quantum circuit, based on the precision level. The set of first operations may further include determining first parameter gradients of the set of first quantum gates, based on each of the classical hardware and a quantum hardware. The first parameters may be updated, based on the first parameter gradients, using the classical hardware. The set of first operations may include determining second parameter gradients of the set of second quantum gates, based on the quantum hardware and updating the second parameters based on the second parameter gradients, using the classical hardware. The set of first operations may further include determining the precision level associated with the quantum circuit, basedon the first parameters and the second parameters to obtain optimized parameters of the quantum circuit by iteratively executing the set of first operations based on the precision level.

[0008] The objects and advantages of the embodiments will be realized and achieved at least by the elements, features, and combinations particularly pointed out in the claims.

[0009] Both the foregoing general description and the following detailed description are given as examples and are explanatory and are not restrictive of the invention, as claimed.

[0010] BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Example embodiments will be described and explained with additional specificity and detail through the use of the accompanying drawings in which:

[0012] FIG. 1 is a diagram representing an example environment related to improved training of Variational Quantum Algorithms (VQAs) through delegation to quantum and classical resources;

[0013] FIG. 2 is a block diagram that illustrates an exemplary electronic device of FIG. 1 for improved training of VQA through delegation to quantum and classical resources;

[0014] FIG. 3 is a diagram that illustrates a flowchart of an example method for a Variational Quantum Eigen solver (VQE) task for improved training of VQA through delegation to quantum and classical resources;FIG. 4A is a diagram that illustrates a flowchart of alternate optimization method for improved training of VQA through delegation to quantum and classical resources;

[0015] FIG. 4B is a diagram that illustrates a flowchart of modified full optimization method for improved training of VQA through delegation to quantum and classical resources;

[0016] FIG. 5 is a diagram that illustrates an exemplary execution pipeline for determining quantum measurements based on pseudo-algorithm of g-sim;

[0017] FIG. 6 is a diagram that illustrates a flowchart of an example method for optimal resource allocation based on determination of expectation value of dynamical Lie algebra (DLA) operators;

[0018] FIG. 7 is a diagram that illustrates a flowchart of an example method for optimal resource allocation based on an alternate and modified full optimization, and an expectation value of DLA operators;

[0019] FIG. 8 is a diagram that illustrates an example scenario for training variational quantum algorithms through delegation to quantum and classical resources for optimal resource allocation;

[0020] FIG. 9 is a graph diagram illustrating an exemplary comparison of convergence value between the PSR, g-sim, and alternate optimization;

[0021] FIG. 10A and FIG. 10B are graph diagrams that collectively illustrate partial derivatives of parameters of g-sim, PSR for layer 1 and Hardware-Efficient Ansatz (HEA) with 50 layers respectively;FIG. 11A and FIG. 11B are graph diagrams that collectively illustrate partial derivatives of parameters of g-sim, PSR for layer 3 and Hardware-Efficient Ansatz (HEA) with 50 layers respectively;

[0022] FIG. 12A and FIG. 12B are graph diagrams that collectively illustrate partial derivatives of parameters of g-sim, PSR for layer 6 and Hardware-Efficient Ansatz (HEA) with 50 layers respectively;

[0023] FIG. 13A and FIG. 13B are graph diagrams that collectively illustrate partial derivatives of parameters of g-sim, PSR for layer 9 and Hardware-Efficient Ansatz (HEA) with 50 layers respectively;

[0024] FIG. 14 is a diagram that illustrates a flowchart for an example method for improved training variational quantum algorithms through delegation to quantum and classical resources;

[0025] all according to at least one embodiment described in the present disclosure.

[0026] DESCRIPTION OF EMBODIMENTS

[0027] Some embodiments described in the present disclosure relate to methods and electronic devices for improved training of variational quantum algorithms through delegation to quantum and classical resources. Herein, a quantum circuit (for example, a Variational Quantum Circuit (VQC)) may be prepared on quantum hardware (for example, a quantum computer) to implement a Quantum Neural Network (QNN). The quantum circuit generation may be based on an energy operator and a mathematical object. The quantum circuit may include a set of first quantum gates. First parameters may be determined of the set of first quantum gates, basedon a classical hardware. A precision level may be determined associated with the quantum circuit, based on the first parameters to execute a set of first operations based on the precision level. The set of first operations may include adding a set of second quantum gates including second parameters, based on the precision level. First parameter gradients of the set of first quantum gates may be determined, based on each of the classical hardware and a quantum hardware. The first parameters may be updated based on the first parameter gradients, using the classical hardware. The second parameter gradients of the set of second quantum gates may be determined based on the quantum hardware. The second parameters may be updated based on the second parameter gradients, using the classical hardware to determine the precision level associated with the quantum circuit. The precision level may be determined based on the first parameters and the second parameters. Finally, optimized parameters of the quantum circuit may be obtained by iteratively executing the set of first operations based on the precision level. The determined optimized parameters may be used to determine an output of the QNN, such that a cost function associated with the QNN is minimized.

[0028] Quantum computing may enable execution of a set of operations using a QNN. The QNN may be trained using training data {xi, y. The training data may be encoded into quantum states and implemented using a quantum circuit (for example, a parameterized quantum circuit) on the quantum hardware. The quantum circuit may be generated based on the energy operator (for example, a Hamiltonian operator) and a mathematical object (for example, an object associated with a DLA). The quantum circuit may include the set of quantum gates (for example, the set of first quantum gates). Traditionally, optimizing the quantum circuit (for example, theparameterized quantum circuit) may involve using a gradient-based technique (for example, gradient-based algorithm), such as gradient descent, executed on the quantum hardware through a Parameter Shift Rule (PSR). For each parameter (e.g., first parameters or second parameters), multiple circuits may be run with slight shifts in parameter values, and these values may be combined to determine derivative (s) with respect to that parameter. The first parameters and the second parameters may be trainable parameters. This process may be repeated for each parameter in the quantum circuit, requiring at least "2p" quantum circuit executions for a circuit with “p" parameters (for example, trainable parameters) to obtain gradients. The gradient-based algorithm may compute a gradient with respect to a previously computed cost function associated with the QNN on the quantum hardware. The computed gradient may be then provided to the quantum hardware for determining a set of optimized parameters. In contrast, classical hardware requires only a single run of the model per iteration, along with some additional memory, to obtain gradients of the loss function, regardless of the number of parameters.

[0029] In some existing methods, the quantum circuits may be designed to group quantum gates which may commute and anti-commute with other groups. In some other existing methods, gradient computation may be offloaded to classical resources, by using mathematical objects of the quantum circuit. The quantum circuit may be partially processed on the quantum hardware and the measurement outcomes may be passed on to the classical hardware, which may perform fast and efficient gradient estimation. Both methods have limitations regarding the types ofcircuit structures they can support and corresponding quantum loss functions that can be evaluated using them.

[0030] According to one or more embodiments of the present disclosure, the technological field of quantum machine learning may be improved by enhancing g-sim by incorporating it into a hybrid routine. Such an enhancement of the "g-sim" may reduce quantum resource requirements as compared to the PSR method. An embodiment of the present disclosure may use the "g-sim" using the mathematical objects (for example, DLA). Further, the present disclosure may use hybrid quantum classical architecture where both quantum hardware and the classical hardware may be used to evaluate a loss function. The disclosure proposes a method and an electronic device that includes a processor for improved training of variational quantum algorithms through delegation to quantum and classical resources.

[0031] The electronic device may generate a quantum circuit based on an energy operator and a mathematical object. The quantum circuit may include a set of first quantum gates and determine first parameters (for example, first trainable parameters) of the set of first quantum gates, based on a classical hardware. A precision level associated with the quantum circuit may be determined, based on the first parameters. The electronic device may execute a set of first operations based on the precision level, wherein the set of first operations may include adding a set of second quantum gates to the quantum circuit including second parameters, based on the precision level. The set of first operations includes determining first parameter gradients of the set of first quantum gates, based on each of the classical hardware and the quantum hardware. The set of first operations may include updating the first parameters based on the classical hardware and determining second parametergradients of the set of second quantum gates, based on the quantum hardware. The set of first operations includes updating the second parameters based on the second parameter gradients, using the classical hardware and determining the precision level associated with the quantum circuit, based on the first parameters and the second parameters. Furthermore, the electronic device may be configured to obtain optimized parameters of the quantum circuit by iteratively executing the set of first operations based on the precision level. The electronic device may reduce a requirement of quantum resources for training / updating parameters (e.g., the first parameters and / or the second parameters) on the quantum circuit. The electronic device may reduce an impact of hardware noise from quantum circuit by efficient delegation to quantum and classical resources. The delegation of the resources may make training comparatively faster. Also, a vanishing gradient issue of traditional techniques may be overcome in the proposed method.

[0032] Embodiments of the present disclosure are explained with reference to the accompanying drawings.

[0033] FIG. 1 is a diagram representing an example environment related to improved training of Variational Quantum Algorithms (VQA) through delegation to quantum and classical resources, in accordance with at least one embodiment described in the present disclosure. With reference to FIG. 1, there is shown a computing environment 100. In the computing environment 100, there is shown an electronic device 102, a user device 104, and a display device 106. The electronic device 102, the user device 104, and the display device 106 may be communicatively coupled to each other, via a communication network 108. The electronic device 102 may include a quantum computer 110, optimizer network 120 and a database 112.As further shown, a quantum hardware 114 and a classical hardware 116 may be implemented on the quantum computer 110. FIG. 1 further shows training data 118 that may be received from various components of the electronic device 102 and the user device 104. The training data 118 may be stored in database 112.

[0034] The electronic device 102 may be a part of an on-premises computing environment or a cloud computing environment. The electronic device 102 may include suitable logic, circuitry, and interfaces that may be configured to execute operations associated with training the quantum computer 110 including the quantum hardware 114 and the classical hardware 116 for performing machine learning tasks. The quantum circuit may include a set of first quantum gates. The electronic device 102 may determine first parameters of the set of first quantum gates, based on the classical hardware 116. The quantum computer 110 may be trained using a hybrid quantum-classical algorithm that may obtain optimized parameters. The optimization of the quantum computer 110 (e.g., a Quantum Neural Network (QNN)) may correspond to determination of optimized parameters associated with the quantum circuit by iteratively executing a set of first operations based on a precision level. The electronic device 102 may be configured to obtain the optimized parameters by adding a set of second quantum gates (for example, new gates including second parameters), based on the precision level and determining first parameter gradients of the set of first quantum gates, based on each of the classical hardware 116 and the quantum hardware 114. Various parameters (for example, first parameters of the set of first quantum gates) may be updated based on the first parameter gradients using the classical hardware 116. The electronic device 102 may be configured to determine second parameter gradients of the set of secondquantum gates, based on the quantum hardware 114 and update the second parameters based on the second parameter gradients, using the classical hardware 116. In some embodiments, the electronic device 102 may be configured to obtain the optimized parameters of the quantum circuit by iteratively executing the set of first operations based on the precision level. Examples of the electronic device 102 may include, but are not limited to, a computing device, a smartphone, a cellular phone, a mobile phone, a gaming device, a mainframe machine, a server, a computer work-station, a consumer electronic (CE) device, a quantum computer, a quantum simulator, and / or a computer including quantum and classical hardware.

[0035] The electronic device 102 may include suitable logic, circuitry, and interfaces that may be configured to execute program instructions associated with the quantum computer 110. The electronic device 102 may be a classical computer (i.e., a transistor-based computer with semiconductor-based digital circuitry) that operates in tandem or in conjunction with the quantum computer 110 to perform machine learning tasks. The electronic device 102 may include both quantum hardware 114 and the classical hardware 116 configured to perform machine learning tasks.

[0036] The user device 104 may include suitable logic, circuitry, and interfaces that may be configured to render a user interface (UI) with option(s) to configure and submit a dataset (i.e., input data points and labels corresponding to the input data points) that may be associated with training of the quantum computer 110. The UI may further render parameters of the quantum computer 110 and a cost function value associated with the quantum computer 110, which may be determined at each time-step. The user device 104 may communicate with the electronic device 102 viaa network interface. Examples of the user device 104 may include, but are not limited to, a mobile device, a desktop computer, a laptop, a virtual machine, a computer workstation, or a server (such as a cloud server).

[0037] The display device 106 may include suitable logic, circuitry, and interfaces that may be configured to display inputs provided by the user device 104, training data 118 from the database 112, and outputs (for example, the optimized parameters) generated by the electronic device 102. In certain embodiments, the display device 106 may enable a user to provide a user input via a touch-screen enabled display device 106. The display device 106 may be realized through several known technologies such as, but not limited to, a Liquid Crystal Display (LCD) display, a Light Emitting Diode (LED) display, a plasma display, or an Organic LED (OLED) display technology, or other display devices. In accordance with an embodiment, the display device 106 may refer to a display screen of a head mounted device (HMD), a smart-glass device, a see-through display, a projection-based display, an electro-chromic display, or a transparent display.

[0038] The communication network 108 may include a communication medium through which the electronic device 102, the user device 104, and the display device 106 may communicate with each other. The communication network 108 may be one of a wired connection or a wireless connection. Examples of the communication network 108 may include, but are not limited to, the Internet, a cloud network, Cellular or Wireless Mobile Network (such as Long-Term Evolution and 5G New Radio), a Wireless Fidelity (Wi-Fi) network, a Personal Area Network (PAN), a Local Area Network (LAN), or a Metropolitan Area Network (MAN). Various devices in the computing environment 100 may be configured to connect to the communicationnetwork 108 in accordance with various wired and wireless communication protocols. Examples of such wired and wireless communication protocols may include, but are not limited to, at least one of a Transmission Control Protocol and Internet Protocol (TCP / IP), User Datagram Protocol (UDP), Hypertext Transfer Protocol (HTTP), File Transfer Protocol (FTP), Zig Bee, EDGE, IEEE 802.11, light fidelity (Li-Fi), 802.16, IEEE 802.11s, IEEE 802.11g, multi-hop communication, wireless access point (AP), device to device communication, cellular communication protocols, and Bluetooth (BT) communication protocols.

[0039] The quantum computer 110 may be a quantum gate-based computing device that may be configured to receive an input and transform the input in accordance with a unitary operation (that may be defined as a sequence of quantum logic gate operations and measurements). The unitary operation of the quantum computer 110 may be performed based on the quantum hardware 114 and the classical hardware 116, to function as the QNN. The quantum hardware 114 may be designed to manipulate and control qubits (i.e., quantum bits). The classical hardware 116 may handle the training in traditional computing systems.

[0040] In one or more embodiments of the disclosure, the quantum computer 110 may be implemented as a generalized quantum computing device that may be hosted on a cloud optimization system. The cloud optimization system may be implemented as one of a private cloud, a public cloud, or a hybrid cloud. In such an implementation, the generalized quantum computing device may use specialized optimization solving software applications or simulation software at an application layer to implement hybrid quantum-classical algorithms and obtain the optimized parameters of the quantum computer 110.The generalized quantum computing device may be different from a digital bit-based computing device, such as digital devices that are based on transistor-based digital circuits. The generalized quantum computing device may include one or more quantum logic gates that use quantum bits (hereinafter referred to as "qubits") to perform computations for different information processing applications. In general, a qubit can represent "0", "1", or a superposition of both "0" and "1". In most cases, the generalized quantum computing device may need a carefully controlled cryogenic environment to function properly. The generalized quantum computing device may use certain properties found in quantum mechanical systems, such as quantum fluctuations, quantum superposition of Eigenstates, quantum tunneling, and quantum entanglement. These properties may help the generalized quantum computing device to perform computations for solving certain mathematical problems to exhibit quantum advantage. Typically, these problems may be computationally intractable for conventional computing devices (e.g., classical computers that use transistor-based circuits). Examples of the generalized quantum computing device may include, but are not limited to, a silicon-based nuclear spin quantum computer, a trapped ion quantum computer, a cavity quantumelectrodynamics (QED) computer, a quantum computer based on nuclear spins, a quantum computer based on electron spins in quantum dots, a superconducting quantum computer that uses superconducting loops and Josephson junctions, and a nuclear magnetic resonance quantum computer.

[0041] In some other embodiments, the quantum computer 110 may be a specialpurpose quantum computer that may be designed, and hardware / software optimized to perform quantum machine learning tasks. Similar to a generalizedquantum computing device, the special-purpose quantum computer may use qubits and may require a carefully controlled cryogenic environment to function properly.

[0042] In some other embodiments, the quantum computer 110 maybe a digital quantum-computing processor. More specifically, the quantum computer 110 may be implemented as a quantum simulation software that may be executable on a digital computer with a semiconductor-based processor. The quantum simulation software may be designed to model the functionality of the quantum computer 110 on a digital circuitry. The digital computer may operate at a room temperature and may not require a cryogenic environment to function. The quantum computer 110 may perform computations using quantum-mechanical phenomena, such as, superposition and entanglement. It uses quantum bits (qubits) to process information in ways that classical computers cannot. A quantum circuit (not shown in FIG. 1) may be a model used to describe a sequence of quantum operations (i.e., quantum gates) applied to qubits. The quantum computer 110 may be a hardware, while the quantum circuit may be the set of instructions or the program that runs on this hardware.

[0043] In some other embodiments, the quantum computer 110 may include a processor to execute software instructions such as subroutines for Variational Quantum Circuit (VQC) functioning as a QNN. Example implementations of the processor may include, but are not limited to, a Reduced Instruction Set Computing (RISC) processor, an Application-Specific Integrated Circuit (ASIC) processor, a Complex Instruction Set Computing (CISC) processor, a Graphical Processing Unit (GPU), a co-processor, and / or a combination thereof.The database 112 may include suitable logic, interfaces, circuitry, and / or code that may be configured to store the training data 118. The database 112 may be derived from data off a relational or non-relational database, or a set of comma-separated values (csv) files in conventional or big-data storage. The database 112 may be stored or cached on a device, such as, a server or the electronic device 102. The device storing the database 112 may be configured to receive a query to request an energy operator and a mathematical object and may extract and transmit the energy operator and the mathematical object to the electronic device 102 and / or the user device 104.

[0044] In some embodiments, the database 112 may be hosted on a plurality of servers stored at the same or different locations. The operations of the database 112 may be executed using hardware including a processor, a microprocessor (e.g., to perform or control performance of one or more operations), a field-programmable gate array (FPGA), or an application-specific integrated circuit (ASIC). In some other instances, the database 112 may be implemented using software.

[0045] The optimizer network 120 may be a software program, a routine, or a subroutine which, when executed by the electronic device 102, may compute values for parameters of the quantum computer 110 (functioning as the QNN) based on the value of a cost function associated with the QNN. The optimizer network 120 may be similar to an optimizer used in machine learning. The optimizer network 120 may define a hyper-surface (i.e., a cost landscape), and the optimizer's task may be to navigate the landscape and find a global maximum (or minima) on the hyper-surface. Examples of the optimizer network 120 may include, but are not limited to, a Long- Short Term Memory (LSTM) network associated with meta-parameters andconfigured to maintain a hidden state of the LSTM network. The usage of the LSTM network as the optimizer network 120 may enable optimization of the quantum computer 110 without using gradient-based algorithms.

[0046] In operation, the electronic device 102 may receive a dataset (e.g., the training data 118) associated with a machine learning task. In accordance with an embodiment, the received dataset may be used to train the quantum computer 110 to perform the machine learning task (such as classification, clustering, reinforcement machine learning, discriminative machine learning, or so on) and may include a set of datapoints and a set of labels that correspond to the set of datapoints. By way of example, and not limitation, the set of datapoints may belong to an Iris dataset, a Gaussian 2-dimensional (2D) dataset, or a Spirals 2D dataset. The quantum computer 110 may have to be trained to predict a label for each datapoint of the dataset and an unseen datapoint of a new dataset different from the received dataset.

[0047] The electronic device 102 may prepare an input quantum state (for example, a first quantum state or a second quantum state) based on the received dataset. In accordance with an embodiment, an encoding circuit may be applied on the received dataset for preparation of the input quantum state. The encoding circuit may encode each component of each datapoint of the set of datapoints (i.e., the received dataset) into a quantum state. For example, if each datapoint includes “D" components (i.e., each data point is a “D" dimensional data vector), the encoding circuit may encode a corresponding data point into an input quantum state comprising "log(D)" qubits.

[0048] The electronic device 102 may generate a quantum circuit based on the energy operator and a mathematical object, wherein the quantum circuit may includea set of first quantum gates. The energy operator may correspond to a Hamiltonian operator. The Hamiltonian may be used to define a cost function or trainable parameters that need to be optimized, based on determination of an expectation value of the Hamiltonian. Hamiltonian may indicate a measure of the quantum circuit’s energy associated with trainable parameters (e.g., first parameters). The mathematical object may correspond to the quantum operator associated with the DLA. The preparation of the quantum circuit may be based on the formation of a composition of a predefined number of quantum gates. Thus, the quantum computer 110, may be represented as a product of a predefined number of parameterized matrices. The quantum gates of the quantum computer 110 may be parameterized using real-valued parameters. The quantum gates may include a corresponding trainable parameter, for instance, first parameters or second parameters.

[0049] The electronic device 102 may determine first parameters of the set of first quantum gates, based on the classical hardware 116. The electronic device 102 may determine a precision level associated with the quantum circuit, based on the first parameters. The classical hardware 116 may use a g-sim technique to determine the first parameters. The first parameters may be associated with the Lie gates (corresponding to a DLA). The electronic device 102 may execute a set of first operations based on the precision level.

[0050] The set of first operations may include, for example, adding a set of second quantum gates to the quantum circuit, determining first parameter gradients, updating the first parameters, determining second parameter gradients, updating the second parameters, and determining the precision level associated with the quantum circuit. The addition of the set of second quantum gates to the quantumcircuit may be based on the precision level. The parameter gradients (i.e., the first parameter gradients) of the set of first quantum gates may be determined based on each of the classical hardware 116 and the quantum hardware 114. The first parameters may be updated based on the first parameter gradients, using the classical hardware 116. The classical hardware 116 may correspond to a g-sim technique. The parameter gradients (i.e., the second parameter gradients) of the set of second quantum gates may be determined, based on the quantum hardware 114 (e.g., using a parameter-shift rule). The second parameters may be updated based on the second parameter gradients, using the classical hardware 116.

[0051] In an embodiment, the quantum hardware 114 may use the PSR technique for determining parameter gradients of a set of quantum gates. For each parameter, multiple circuits may be run with shifts in the parameter (for example, trainable parameters such as, the first parameters and / or the second parameters), and in the end combined to get the derivative with respect to that trainable parameter. This process may be repeated for each parameter in the quantum circuit requiring at least '2p' quantum circuit executions for the quantum circuit with 'p' parameters, finally obtaining the parameter gradients. This process may be repeated for each iteration of training the quantum circuit.

[0052] The electronic device 102 may determine the precision level associated with the quantum circuit based on the first parameters and the second parameters. The electronic device 102 may obtain optimized parameters associated with the quantum circuit, iteratively executing the set of first operations based on the precision level. In an embodiment, the first parameters may be different from the second parameters.In an embodiment, the electronic device 102 may be configured to determine third parameters of a set of third quantum gates, based on the classical hardware 116 and determine a convergence value associated with the quantum circuit, based on the third parameters. Further, the electronic device 102 may be configured to execute a set of second operations based on the convergence value. The set of second operations may include determining fourth parameter gradients of the set of fourth quantum gates (based on the quantum hardware 114) and updating the fourth parameters based on the fourth parameter gradients, using the classical hardware 116. The updated fourth parameters may be used to create new unitary gates. The set of second operations may include preparing a quantum state (for example, a first quantum state), based on applying the updated fourth parameters and measuring a first expectation value of the DLA operator based on the first quantum state. The set of second operations may include determining third parameter gradients of a set of third quantum gates, based on the first expectation value of the DLA operator using the classical hardware 116 and quantum hardware 114. The set of third quantum gates may include third parameters. The set of second operations may further include updating the third parameters based on the third parameter gradients. Further, the set of second operations may include determining the convergence value, based on the third parameters and the fourth parameters. The optimized parameters may be obtained by iteratively executing the set of second operations based on the convergence value.

[0053] In another embodiment, the electronic device 102 may be configured to receive the optimized parameters of the quantum circuit by iteratively executing the set of second operations for a predetermined iteration(s). The electronic device 102may be configured to execute a set of third operations based on the convergence value. The set of third operations include determining fifth parameter gradients for the optimized parameters, based on the quantum hardware 114 and updating fifth parameters based on the fifth parameter gradients. The electronic device 102 may be configured to determine a second quantum state based on non-updated fifth parameters and measuring a second expectation value of the DLA operator based on the second quantum state. The electronic device 102 may be configured to transmit the second expectation value of the DLA operator to the classical hardware 116 and determine sixth parameter gradients of a set of sixth quantum gates, based on the transmitted second expectation value. The electronic device 102 may be configured to determine sixth parameter gradients of the set of sixth quantum gates, based on the transmitted second expectation values and update the sixth parameters based on the sixth parameter gradients. The convergence value may be determined, based on the fifth parameters and the sixth parameters. The electronic device 102 may obtain the optimized parameters of the quantum circuit by iteratively executing the set of third operations based on the convergence value.

[0054] Modifications, additions, or omissions may be made to FIG. 1 without departing from the scope of the present disclosure. For example, the environment 100 may include more or fewer elements than those illustrated and described in the present disclosure.

[0055] FIG. 2 is a block diagram that illustrates an exemplary electronic device of FIG. 1, for improved training of variational quantum algorithms (VQAs) through delegation to quantum and classical resources, in accordance with at least one embodiment described in the present disclosure. FIG. 2 is explained in conjunctionwith elements from FIG. 1. With reference to FIG. 2, there is shown a block diagram 200 of the electronic device 102. The electronic device 102 may include a quantum computer configuration 202 and a classical computer construction 204. As shown, for example, the quantum computer configuration 202 may further include a quantum arithmetic processor 206. The quantum arithmetic processor 206 may include a qubit device 208 and a qubit control signal generator 210. The classical computer construction 204 may include a central processing unit 212, an auxiliary storage 214, an input / output (I / O) device 216, and a main storage 218. The quantum computer configuration 202 and elements (such as, the central processing unit (CPU) 212, the auxiliary storage 214, the I / O device 216, and the main storage 218) of the classical computer construction 204 may be connected with one another via a wired or wireless communication medium, such as, an internal connectivity bus 234 of the electronic device 102.

[0056] The quantum computer configuration 202 may include a quantum compiler (not shown in figures). Typically, a compiler may be a computer program that is configured to translate computer code between two languages, i.e., source and target languages. Since quantum algorithms require error-free qubits and logic gates, the quantum compiler maybe configured to translate quantum gate operations used in a quantum domain into machine-level operations and reduce loss of quantum information because of decoherence. A compiler for a gate-based quantum computer 110 may perform synthesis of quantum gates at both physical and logical layers. The quantum compiler may operate on a sequence of instructions (for example, instructions executed on the quantum hardware 114 and classical hardware 116) to ensure that such instructions are executable on the quantum computer 110. Suchinstructions may utilize quantum instruction sets to turn high-level algorithms into physical instructions that may be executable on the quantum arithmetic processor 206.

[0057] The quantum arithmetic processor 206 (also referred to as a quantum processing unit (QPU)) may refer to a physical device (for example, a chip) that may include a set of interconnected qubits. The quantum arithmetic processor 206 may typically include a housing environment (e.g., a cooling mechanism to achieve a cryogenic temperature), a control system for the quantum arithmetic processor 206, and the like.

[0058] Although not illustrated, the quantum computer 110 may have a hierarchical architecture with layers such as a physical layer, a virtual layer, an error correction layer, a logical layer, and an application layer. The physical layer may include hardware including, but not limited to, physical qubits and control operations. The virtual layer may incorporate error cancellation and may be responsible for collecting quantum dynamics of qubits and shaping them into virtual qubits and quantum gates. The error correction layer may incorporate quantum error correction logic for fault-tolerant quantum computing. The logical layer may support universal quantum computing by acting as a hardware-independent layer. The application layer may be a hardware independent layer that relies on logical qubits. The application layer may receive quantum algorithm as a sequence of high-level operations, including the QNN.

[0059] The quantum arithmetic processor 206 may include the qubit device 208 and the qubit control signal generator 210. The qubit device 208 may be generated based on superconducting materials to create qubits that operate at lowtemperatures. The qubit device 208 may store and process the quantum information, and the qubit control signal generator 210 may be essential for manipulating these qubits to perform computations.

[0060] The central processing unit 212 may include suitable logic, circuitry, and / or interfaces that may be configured to execute program instructions associated with different operations to be executed by the electronic device 102. The central processing unit 212 may include any suitable special-purpose or general-purpose computer, computing entity, or processing device including various computer hardware or software modules and maybe configured to execute instructions stored on any applicable computer-readable storage media. For example, the central processing unit 212 may include a microprocessor, a microcontroller, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a Field-Programmable Gate Array (FPGA), or any other digital or analog circuitry configured to interpret and / or to execute program instructions and / or to process data. Although illustrated as a single processor in FIG.2, the central processing unit 212 may include any number of processors configured to, individually or collectively, perform or direct performance of any number of operations of the electronic device 102, as described in the present disclosure.

[0061] In some embodiments, the central processing unit 212 may be configured to interpret and / or execute program instructions and / or process data stored in random-access memory 232 of main storage 218 and / or the external memory 230 in I / O device 216. In some embodiments, the central processing unit 212 may fetch program instructions from the external memory 230 and load the program instructions in the random-access memory 232. After the program instructions areloaded into the random-access memory 232, the central processing unit 212 may execute the program instructions. Some of the examples of the central processing unit 212 may be a GPU, a CPU, a RISC processor, an ASIC processor, a CISC processor, a co-processor, and / or a combination thereof.

[0062] The external memory 230 may include suitable logic, circuitry, and / or interfaces that may be configured to store program instructions executable by the central processing unit 212. In certain embodiments, the external memory 230 may be configured to store a dataset associated with a machine learning task, parameters associated with the QNN (i.e., the quantum computer 110), and values of cost function associated with the QNN (i.e., the quantum computer 110). The external memory 230 may include computer-readable storage media for carrying or having computer-executable instructions or data structures stored thereon. Such computer-readable storage media may include any available media that may be accessed by a general-purpose or special-purpose computer, such as the central processing unit 212.

[0063] By way of example, and not limitation, such computer-readable storage media may include tangible or non-transitory computer-readable storage media including random-access memory 232, Read-Only Memory (ROM), Electrically Erasable Programmable Read-Only Memory (EEPROM), Compact Disc Read-Only Memory (CD-ROM) or other optical disk storage, magnetic disk storage or other magnetic storage devices, flash memory devices (e.g., solid state memory devices), or any other storage medium which may be used to carry or store particular program code in the form of computer-executable instructions or data structures and which may be accessed by a general-purpose or special-purpose computer. Combinationsof the above may also be included within the scope of computer-readable storage media. Computer-executable instructions may include, for example, instructions and data configured to cause the central processing unit 212 to perform a certain operation or group of operations associated with the electronic device 102.

[0064] The auxiliary storage 214 may include suitable logic, circuitry, and / or interfaces that may be configured to store program instructions executable by the central processing unit 212. The auxiliary storage 214 of a QNN maybe an additional storage used to support the operations of the QNN. This storage may hold intermediate data, parameters, and other necessary information required during the training and execution of the QNN. The auxiliary storage 214 may enable management of the data flow and maintenance of the state of the quantum neural network during computations.

[0065] The auxiliary storage 214 may include an operating system 220, a quantum circuit program 222, and a quantum computational control program 224. In certain embodiments, the auxiliary storage 214 may be configured to store a dataset associated with a machine learning task, or the parameters (for example, the trainable parameters, such as, the first parameters or the second parameters) received from the quantum computer configuration 202, and parameters associated with the QNN (i.e., the quantum computer 110), and values of cost function associated with the QNN (i.e., the quantum computer 110). The auxiliary storage 214 may include computer-readable storage media for carrying or having computerexecutable instructions or data structures stored thereon. Such computer-readable storage media may include any available media that may be accessed by a generalpurpose or special-purpose computer, such as the central processing unit 212.By way of example, and not limitation, such computer-readable storage media may include tangible or non-transitory computer-readable storage media including random-access memory 232, Read-Only Memory (ROM), Electrically Erasable Programmable Read-Only Memory (EEPROM), Compact Disc Read-Only Memory (CD-ROM) or other optical disk storage, magnetic disk storage or other magnetic storage devices, flash memory devices (e.g., solid state memory devices), or any other storage medium which may be used to carry or store particular program code in the form of computer-executable instructions or data structures and which may be accessed by a general-purpose or special-purpose computer. Combinations of the above may also be included within the scope of computer-readable storage media. Computer-executable instructions may include, for example, instructions and data configured to cause the central processing unit 212 to perform a certain operation or group of operations associated with the electronic device 102.

[0066] The Operating System (OS) 220 may be a fundamental software configured to manage computer hardware and software resources and provides common services for computer programs. In the context of quantum computing, the OS 220 may manage the quantum hardware 114, and may handle task scheduling, resource allocation, and provide an interface for running quantum programs.

[0067] The quantum circuit program 222 may be a sequence of quantum gates and measurements that may be configured to be designed to perform a specific computation on the quantum computer 110. These programs may be typically represented as circuits where qubits (quantum bits) may be manipulated using quantum gates to achieve a desired computational outcome. The program may define the operations that need to be performed on the qubits to solve a particular problem.The quantum computational control program 224 may be a software that may be configured to manage and control the execution of quantum circuits on a quantum computer 110. It ensures that the quantum operations may be carried out correctly and efficiently. This program may handle the coordination between the quantum hardware 114 and the quantum circuit program 222, managing tasks such as error correction, qubit initialization, and measurement.

[0068] The main storage 218 having RAM 232 may include suitable logic, circuitry, and / or interfaces that may be configured to store program instructions executable by the central processing unit 212, operating systems, and / or application-specific information, such as logs and application-specific databases. The main storage 218 may be configured to store information, such as the set of mathematical formulations associated with the optimization of the parameters of the quantum computers 110. The main storage 218 may include computer-readable storage media for carrying or having computer-executable instructions or data structures stored thereon. Such computer-readable storage media may include any available media that may be accessed by a general-purpose or special-purpose computer, such as the central processing unit 212.

[0069] By way of example, and not limitation, such computer-readable storage media may include tangible or non-transitory computer-readable storage media including Compact Disc Read-Only Memory (CD-ROM) or other optical disk storage, magnetic disk storage or other magnetic storage devices (e.g., Hard-Disk Drive (HDD)), flash memory devices (e.g., Solid State Drive (SSD), Secure Digital (SD) card, other solid state memory devices), or any other storage medium which may be used to carry or store particular program code in the form of computer-executableinstructions or data structures and which may be accessed by a general-purpose or special-purpose computer. Combinations of the above may also be included within the scope of computer-readable storage media. Computer-executable instructions may include, for example, instructions and data configured to cause the processor 204a to perform a certain operation or group of operations associated with the electronic device 102.

[0070] The I / O device 216 may include suitable logic, circuitry, interfaces, and / or code that may be configured to receive an input and provide an output based on the received input. For example, the I / O device 216 may receive an input indicative of the training data 118, an energy operator, and / or a mathematical object. The I / O device 216 may be further configured to display a user-interface associated with the optimization of quantum circuit parameters. The I / O device 216 may include various input and output devices, which may be configured to communicate with the central processing unit 212. The I / O device 216 may include a display 226. Examples of the I / O device 216 may include, but are not limited to, a touch screen, the display 226, a keyboard / mouse 228, a joystick, a microphone, or a speaker. Examples of the I / O device 216 may further include braille I / O devices, such as, braille keyboards and braille readers.

[0071] The display 226 may be a touch screen which may enable a user to provide a user-input via the display 226. The touch screen may be at least one of a resistive touch screen, a capacitive touch screen, or a thermal touch screen. The display 226 may be realized through several known technologies such as, but not limited to, at least one of a Liquid Crystal Display (LCD) display, a Light Emitting Diode (LED) display, a plasma display, or an Organic LED (OLED) display technology, or otherdisplay devices. In accordance with an embodiment, the display 226 may refer to a display screen of a head mounted device (HMD), a smart-glass device, a see-through display, a projection-based display, an electro-chromic display, or a transparent display.

[0072] The keyboard / mouse 228 may include suitable logic, circuitry, interfaces, and / or code that may be configured to enable a user to provide an input. For example, the keyboard / mouse 228 may be used to select a set of training data 118 available across various sites or stored within the external memory 230.

[0073] The internal connectivity bus 234 may include suitable logic, circuitry, interfaces, and / or code that may be configured to transfer data and instructions between various components within the electronic device 102. For example, the internal connectivity bus 234 may connect the quantum computer configuration 202 and elements (such as, the CPU 212, the auxiliary storage 214, the I / O device 216, and the main storage 218) of the classical computer construction 204. The internal connectivity bus 234 may have a bus architecture that facilitates efficient data exchange and coordination among internal hardware components, ensuring optimal performance and functionality. The internal connectivity bus 234 may include address, data, and control lines that manage the flow of information and commands. The design and implementation of the internal connectivity bus 234 may be crucial for achieving high-speed data transfer rates and minimizing latency in computing operations. Examples of the internal connectivity bus 234 may include a Front-Side Bus (FSB), a Peripheral Component Interconnect (PCI) Bus, PCI Express (PCIe) Bus, a Universal Serial Bus (USB), and a Serial Advanced Technology Attachment (SATA) Bus.Modifications, additions, or omissions may be made to the electronic device 102 without departing from the scope of the present disclosure. For example, in some embodiments, the electronic device 102 may include any number of other components that may not be explicitly illustrated or described.

[0074] FIG. 3 is a diagram that illustrates a flowchart of an example method for a Variational Quantum Eigen-solver (VQE) task for improved training of the Variational Quantum Algorithm (VQA) through delegation to quantum and classical resources, in accordance with at least one embodiment described in the present disclosure. FIG. 3 is described in conjunction with elements from FIG. 1 and FIG. 2. With reference to FIG. 3, there is shown a flowchart 300. The method illustrated in the flowchart 300 may include operations that may be performed by any suitable system, apparatus, or device, such as, by the example electronic device 102 of FIG. 1, or the central processing unit 212 of FIG.2. Although illustrated with discrete blocks, the steps and operations associated with one or more of the blocks of the flowchart 300 maybe divided into additional blocks, combined into fewer blocks, or eliminated, depending on the implementation. The flowchart 300 may start at 302 and proceed to 304.

[0075] At 304, an operation of reception of an energy operator may be performed. The electronic device 102 may be configured to receive an input including the energy operator input from a user. The energy operator may be a Hamiltonian operator. The Hamiltonian operator may be denoted as (H) and may represent a total energy of a quantum system. Mathematically, a Hamiltonian operator has real eigenvalues, which correspond to the possible energy levels of a quantum system. An exampletask may correspond to a task to determine a ground state (i.e., a lowest energy state) of Hamiltonian.

[0076] At 306, an operation of creation of a mathematical object may be performed. The electronic device 102 maybe configured to create the mathematical object based on the energy operator. The energy operator may correspond to a quantum operator. The mathematical object may correspond to a DLA. The quantum operator may be the mathematical object that may act on a state space of the quantum system. The quantum operator may represent various physical quantum mechanical quantities such as, for example, position, momentum, and spin. The DLA may be a mathematical structure that consists of a set of elements (i.e., generators) and a binary operation known as Lie bracket (i.e., commutator). The Lie bracket of two elements, for example, A and B, may be represented as ([A, B]) and may be defined as [[A, B] =AB-BA] for a set of operators to form the DLA. The set may be closed under a Lie bracket operation, meaning that the commutator of any two elements in the set is also an element of the set. In order to create a DLA using the quantum operator, the set of quantum operators maybe chosen. The set of quantum operators may be, but are not limited to Pauli matrices, Hamiltonian, or other relevant quantum operators.

[0077] At 308, an operation of quantum gates creation may be performed. The electronic device 102 may be configured to create quantum gates from the DLA based on the quantum operators. The DLA may be associated with determining continuous symmetries and their associated operators. In quantum computing, the DLA may be used to describe the generators of unitary transformations, which may be a basis of the quantum gates. Pauli matrices may be used to construct the quantum operators,and an exponential map of the DLA elements may be used, based on the trainable parameters (i.e., parameterizing the quantum operators). The trainable parameters may be optimized using the classical hardware 116.

[0078] At 310, an operation of trainable parameters initialization may be performed at the start of the training. The electronic device 102 may be configured to initialize the trainable parameters randomly at the start of the training. Initializing parameters randomly and leveraging both quantum and classical resources, the training process of VQAs may be improved.

[0079] At 312, an operation of quantum circuit optimization using g-sim may be performed. The electronic device 102 may be configured to classically optimize the quantum circuit based on the g-sim technique. The quantum circuit with parameterized gates (for example, the first parameters of the set of first quantum gates) may be used to determine a cost function that quantifies a performance of the quantum circuit. To optimize the parameters, the cost function may be evaluated using the g-sim technique, and an automatic-differentiation software, such as, " Pytorch" to obtain gradients using classical hardware 116.

[0080] At 314, an operation of determination of the precision level associated with the quantum circuit maybe performed. The electronic device 102 maybe configured to determine the precision level associated with the quantum circuit. The precision level may be based on an accuracy of the optimized quantum circuit. In case, the precision level is accurate, control may pass to end. Otherwise, control may proceed to 316.

[0081] At 316, an operation of adding new quantum gates to the quantum circuit may be performed. The electronic device 102 may be configured to add new quantumgates (e.g., second quantum gates including the second parameters) to the quantum circuit. The addition of the new quantum gates may involve specifying the sequence of operations that may be applied to the qubits. The quantum circuit may be initialized with a specified number of qubits and optionally, classical bits for measurements. This may be performed using a quantum computing framework like " Qiskit", " Cirq", or others. The quantum gates may be added to the quantum circuit by specifying the type of gate and qubits it acts on. For example, some common gates may be, single-qubit gates, multi-qubit gates, and the like. The single-qubit gates may be, for example, but not limited to, a Hadamard Gate(H), a Pauli-X gate, and rotation gates. The multi-qubit gates may be, for example, but not limited to, a CNOT gate and controller-U gates.

[0082] At 318, an operation of alternate or modified full optimization may be performed. The alternate or modified full optimization may include alternatively optimizing the new quantum gates (for example, the optimization of the second quantum gates) 316A and the Lie gates (for example, the optimization of the first quantum gates) 316B. At 318A, an operation for optimization of new gates may be performed. The electronic device 102 may be configured to optimize the new quantum gates (for example, the second quantum gates) based on the quantum hardware 114 using the PSR technique. The quantum gates, including the second parameters may be added based on the precision level. The PSR may be used in quantum computing to estimate the parameter gradients (for example, the second parameter gradients) of the second quantum gates. A determination of the second parameter gradients of the second quantum gates may be performed on the quantum hardware 114. For each parameter in the quantum circuit, the PSR involves runningthe quantum circuit multiple times with shift in the parameter value. The results of the shifted parameters may be combined to determine the derivative (for example, a gradient) with respect to the parameters. The process may be repeated for each parameter in the quantum circuit. If the circuit includes “p" parameters (for example, trainable parameters), at least "2p" quantum circuit executions may be required to be performed to obtain the gradients for all the parameters. The optimization of second quantum gates is described in detail, for example, in FIG.4.

[0083] At 318B, an operation of Lie gate optimization may be performed. The electronic device 102 may be configured to optimize the Lie gates (e.g., the first quantum gates) based on the classical hardware 116 and the quantum hardware 114 using the g-sim technique. The g-sim technique may be used to determine parameter gradients for quantum circuits, using a mathematical structure known as the DLA. This approach may optimize the process by offloading some of the computational burden from the quantum hardware 114 to the classical hardware 116. Once the measurement outcomes are obtained from the quantum hardware 114, the measurement outcomes may be passed to the classical hardware 116. The classical hardware 116 may use these outcomes along with the mathematical framework provided by the DLA to perform fast and efficient parameter gradient estimation. By offloading some of the parameter gradient calculations to the classical hardware 116, the overall process may be made more efficient. The classical hardware 116 may handle large-scale computations quickly, which may significantly speed up the parameter gradient estimation process compared to performing all calculations on the quantum hardware 114 alone. The optimization of the first quantum gates is described in detail, for example, in FIG. 4.At 320, an operation of obtaining optimized parameters may be performed. The electronic device 102 may be configured to obtain the optimized parameters of the quantum circuit by iteratively executing the set of first operations (i.e., the operations 316 to 318) based on the precision level (determined after each iteration at 314). The determination of optimized parameters is described further, for example, in FIG.4. Control may pass to end.

[0084] Quantum computing may enable execution of a set of operations using a QNN. The QNN may be trained using training data {xi, y. The training data 118 may be encoded into quantum states and implemented using a quantum circuit (for example, a parameterized quantum circuit) on the quantum hardware 114. The quantum circuit may be generated based on the energy operator (for example, a Hamiltonian operator) and a mathematical object (for example, an object associated with a DLA). The quantum circuit may include the set of first quantum gates. Traditionally, optimizing the quantum circuit (for example, the parameterized quantum circuit) may involve using a gradient-based technique (for example, gradient-based algorithm), such as gradient descent, executed on quantum hardware through a Parameter Shift Rule (PSR). For each parameter (for example, first parameters or second parameters), multiple circuits may be run with slight shifts in parameter values, and these values may be combined to determine derivative with respect to that parameter. The first parameters and the second parameters may be trainable parameters. This process may be repeated for each parameter in the quantum circuit, requiring at least "2p" quantum circuit executions for a circuit with “p" parameters (for example, trainable parameters) to obtain gradients. The gradient-based algorithm may compute a gradient with respect to a previouslycomputed cost function associated with the QNN on the quantum hardware. The computed gradient maybe then provided to the quantum hardware for determining a set of optimized parameters. In contrast, the classical hardware 116 may require only a single run of the model per iteration, along with some additional memory, to obtain gradients of the loss function, regardless of the number of parameters.

[0085] In some existing methods, the quantum circuits may be designed to group quantum gates which may commute and anti-commute with other groups. In some other existing methods, gradient computation may be offloaded to classical resources, by using mathematical objects of the quantum circuit. The quantum circuit may be partially processed on the quantum hardware 114 and the measurement outcomes may be passed on to the classical hardware 116, which may perform fast and efficient gradient estimation. Both methods have limitations regarding the types of circuit structures they can support and corresponding quantum loss functions that can be evaluated using them.

[0086] In an embodiment of the present disclosure, the "g-sim" may be executed using the mathematical objects (for example, DLA). Further, the present disclosure may use hybrid quantum classical architecture where both the quantum hardware 114 and the classical hardware 116 may be used to evaluate a loss function. The disclosure proposes improved training of variational quantum algorithms through delegation to quantum and classical resources. The electronic device 102 may reduce a requirement of quantum resources for training / updating parameters (e.g., the first parameters and / or the second parameters) on the quantum circuit. The electronic device 102 may reduce an impact of hardware noise from the quantum circuit by efficient delegation to quantum and classical resources. The delegation of theresources may make training comparatively faster. Also, a vanishing gradient issue of traditional techniques may be overcome in the proposed method.

[0087] FIG. 4A is a diagram that illustrates a flowchart of alternate optimization method for improved training of VQA through delegation to quantum and classical resources, in accordance with at least one embodiment described in the present disclosure. FIG. 4A is described in conjunction with elements from FIG. 1, FIG. 2, and FIG. 3. With reference to FIG. 4A, there is shown a flowchart 400A of an alternate optimization method 402. The method (i.e., an alternate optimization method 402) illustrated in the flowchart 400A may be performed by any suitable system, apparatus, or device, such as, by the example the electronic device 102 of FIG. 1, or the central processing unit 212 of FIG. 2. Although illustrated with discrete blocks, the steps and operations associated with one or more of the blocks of the flowchart 400A may be divided into additional blocks, combined into fewer blocks, or eliminated, depending on the implementation. The flowchart 400A may start at 404.

[0088] Referring to FIG.4A, an operation of determination of trainable parameters (for example, the first parameters or the second parameters) may be performed. The electronic device 102 may be configured to determine the first parameters. The determination of the trainable parameters may be performed as described, for example, in FIG. 3 at 304 to 310. The trainable parameters may be randomly initialized. The electronic device 102 may be configured to determine the precision level of the trainable parameters. In case, the precision level of the quantum circuit is accurate, then the determination of the trainable parameters ends. However, in case, the precision level of the trainable parameters is inaccurate, then new quantum gates (for example, the set of second quantum gates) may be added to the quantumcircuit. The electronic device 102 may be configured to add trainable new gates (NGs), which may extend the size of the DLA. The additional parameters along with the second quantum gates introduced into the quantum circuit may be adjusted or trained during the optimization process. The addition of the set of second quantum gates may increase a dimensionality of the DLA associated with the quantum circuit. An ansatz may be a specific form or structure of the quantum circuit used as a starting point for the optimization. The YZ linear ansatz may refer to a type of quantum circuit where the entangling gates (for example, CNOT gates) may be arranged in a linear sequence, and the operators may involve rotations around the YZ axes of the Bloch sphere. This type of ansatz may be chosen for its simplicity and effectiveness in certain types of quantum techniques. The quantum circuit may consist of a sequence of entangling gates that perform rotations around the Y and Z axes. These entangling gates may be parameterized by angles, which may correspond to the trainable parameters. Each entangling gate in the YZ linear ansatz may have associated angles that may be adjusted during the training process. By optimizing the angles, the quantum circuit may be tuned to perform a specific task more efficiently. By introducing additional parameters (for example NGs), the DLA may be extended, allowing the quantum circuit to perform a wider variety of transformations. This may lead to better performance in tasks, such as, variational quantum techniques.

[0089] At 404, an operation of determining second parameter gradients of the NGs (for example, the set of second quantum gates) may be performed using only the quantum hardware 114. The electronic device 102 may be configured to determine the second parameter gradients of the NGs using only the quantum hardware 114 through PSR. The PSR may be used to estimate the parameter gradients of thequantum circuit with respect to its parameters by running the quantum circuit with slight shifts in the parameter values. For each NGs, the quantum circuit may be executed with the parameter shifted, and the measurement outcomes may be used to calculate the parameter gradients.

[0090] At 406, an operation of updating the parameter gradients (for example, the second parameter gradients) of the set of second quantum gates (for example, NGs) may be performed using the classical hardware 116. The electronic device 102 may be configured to update the second parameter gradients of the set of second quantum gates based on the classical hardware 116. The second parameter gradients may be updated based on the determined parameter (for example, second parameters) of the NGs (for example, the second quantum gates).

[0091] At 408, an operation of determination of parameter gradients (for example, the first parameter gradients) of one or more quantum gates (for example, the Lie Gates (LGs)) may be performed using both the classical hardware 116 and the quantum hardware 114 based on the updated parameters of NGs. The electronic device 102 may be configured to determine the first parameter gradients of the set of first quantum gates. The determination of the first parameter gradients may be performed by executing the set of first operations based on the precision level.

[0092] As shown in 408A and 408B, the first parameter gradients of LGs (for example, the first quantum gates) may be determined on the quantum hardware 114 and classical hardware 116 using the DLA operators associated with the quantum circuit. The electronic device 102 may be configured to perform quantum measurement of DLA operators using the quantum hardware 114. The electronic device 102 may be configured to perform classical processing (on the quantummeasurement) using the classical hardware 116 based on the g-sim technique. The DLA may provide a structured way to describe infinitesimal transformations generated by the LGs. Based on the quantum hardware 114 and the classical hardware 116, the first parameter gradients may be estimated by leveraging the structure of the DLA. The first parameter gradients may be processed on both the quantum hardware 114 and the classical hardware 116.

[0093] At 410, an operation of updating the first parameters based on the first parameter gradients of the LGs (for example, first quantum gates) using the classical hardware 116 may be performed. The electronic device 102 may be configured to update the parameters (e.g., the first parameters) of the LGs using the classical hardware 116, based on the first parameter gradients.

[0094] The operations 404 to 410 may be performed based on the precision level (associated with the quantum circuit) to obtain the optimized parameters of the quantum circuit. The electronic device 102 may be configured to obtain the optimized parameters of the quantum circuit by iteratively executing the set of first operations (404 to 410), when the precision level is inaccurate.

[0095] FIG. 4B is a diagram that illustrates a flowchart of modified full optimization method for improved training of VQA through delegation to quantum and classical resources, in accordance with at least one embodiment described in the present disclosure. FIG.4B is described in conjunction with elements from FIG. 1, FIG.

[0096] 2, FIG. 3 and FIG. 4A. With reference to FIG.4B, there is shown a flowchart 400B of a modified full optimization method 412. The method (i.e., the modified full optimization method 412) illustrated in the flowchart 400B may be performed by any suitable system, apparatus, or device, such as, by the example the electronicdevice 102 of FIG. 1, or the central processing unit 212 of FIG. 2. Although illustrated with discrete blocks, the steps and operations associated with one or more of the blocks of the flowchart 400B may be divided into additional blocks, combined into fewer blocks, or eliminated, depending on the implementation. The flowchart 400B may start at 414. The optimized parameters of the quantum circuit may be received by iteratively executing operations described at 404 to 410, for predetermined iterations. The predetermined iterations may be, but not limited to, 400 iterations, as an example. The flowchart 400B may start at 414.

[0097] At 414, an operation of determining parameter gradients of the NGs may be performed using only the quantum hardware 114. The electronic device 102 may be configured to determine the parameter gradients of the NGs using only the quantum hardware 114 through the PSR technique. The PSR technique may be used to estimate the parameter gradients of the quantum circuit with respect to its parameters by running the quantum circuit with slight shifts in the parameter values. For each NG, the quantum circuit maybe executed with the shifted parameter values, and the measurement outcomes may be used to calculate the parameter gradients.

[0098] At 416, an operation of updating the parameter gradients of the NGs may be performed using the classical hardware 116. The electronic device 102 may be configured to update the parameter gradients of the new quantum gates (NGs) based on the classical hardware 116. The parameter gradients of the NGs may be updated based on the determined parameter gradients of the NGs.

[0099] At 418, an operation of determination of parameter gradients of the Lie Gates (LGs) may be performed using both the classical hardware 116 and the quantum hardware 114 based on non-updated parameters of the NGs. The electronicdevice 102 maybe configured to determine the parameter gradients of the NGs, using both the classical hardware 116 and the quantum hardware 114 based on nonupdated parameters of the NGs. The parameter gradients of the NGs may be determined based on execution of a set of operations till a convergence value is reached.

[0100] As shown in 418A and 418B, the parameter gradients of LGs may be determined on the quantum hardware 114 and classical hardware 116 using the DLA operators associated with the quantum circuit. The electronic device 102 may be configured to perform quantum measurement of DLA operators using the quantum hardware 114. The electronic device 102 may be configured to perform classical processing (on the quantum measurement) using the classical hardware 116 based on the g-sim technique. The DLA may provide a structured way to describe infinitesimal transformations generated by the LGs. Based on the quantum hardware 114 and the classical hardware 116, the parameter gradients of the LGs may be estimated by leveraging the structure of the DLA. The parameter gradients of the LGs may be processed on both the quantum hardware 114 and the classical hardware 116.

[0101] At 420, an operation of updating the parameters of the LGs based on the parameter gradients of the LGs may be performed, using the classical hardware 116. The electronic device 102 may be configured to update the parameters of the LGs using the classical hardware 116, based on the parameter gradients of the LGs.

[0102] The operations 414 to 420 may be performed based on a convergence value (associated with the quantum circuit) to obtain the optimized parameters of the quantum circuit. The electronic device 102 may be configured to obtain theoptimized parameters of the quantum circuit by iteratively executing a set of operations (414 to 420), until the convergence value is achieved.

[0103] FIG. 5 is a diagram that illustrates an exemplary execution pipeline for determination of quantum measurements based on a pseudo-algorithm of g-sim, in accordance with at least one embodiment described in the present disclosure. FIG. 5 is described in conjunction with elements from FIG. 1, FIG. 2, FIG. 3, FIG. 4A and FIG.

[0104] 4B. With reference to FIG. 5, there is shown an exemplary execution pipeline 500. The execution pipeline 500 may include operations (e.g., operations 502 to 512) that may be performed by any suitable system, apparatus, or device, such as, by the example the electronic device 102 of FIG. 1, or the central processing unit 212 of FIG.

[0105] 2. The execution pipeline 500 of FIG. 5 may further include quantum states 508A. Although illustrated with discrete blocks, the steps and operations associated with one or more of the blocks of the execution pipeline 500 may be divided into additional blocks, combined into fewer blocks, or eliminated, depending on the implementation.

[0106] At 502, an operation of usage of a quantum operator to create the dynamical Lie algebra (i.e., mathematical object) may be performed. The electronic device 102 may be configured to use the quantum operator to create the dynamical Lie algebra. The quantum operator may be represented as " P_i" and quantum gates may be represented as " U(0)". The quantum operators (“Pj") may define commutation relations between the operators. For example, (Pj, Pj)= C{i,j}kP_k, where (C{i,j}k) are structure constants of the dynamical Lie algebra.

[0107] At 504, an operation for random initialization of trainable parameters at a start of a training of a QNN may be performed. The electronic device 102 may beconfigured to randomly initialize trainable parameters of a QNN at the start of the training of the QNN. Random initialization of the parameters (such as, weights) of the QNN may correspond to assignment of non-zero random weights to neuron paths of the QNN. For example, the random initialization may be performed by techniques, such as, but not limited to, a random normal initialization or a random uniform initialization.

[0108] At 506, an operation of creation of the set of quantum gates (for example, the first quantum gates or the second quantum gates) with trainable parameters from the DLA may be performed. The electronic device 102 may create the set of quantum gates with trainable parameters from the DLA. An optimization method may be applied on the created set of quantum gates to update the parameters. The new parameter values may be calculated based on the parameter gradients and a learning rate. The updated parameters may be fed back into the quantum circuit for a next iteration of the training process. The quantum operators from the DLA may be used to create parameterized quantum gates, which may have trainable parameters that are optimized during the training process. The parameterized quantum gates may be combined to form the quantum circuit.

[0109] At 508, an operation of quantum measurements on encoded quantum states (e.g., the quantum states 506A) may be performed with operators from the DLA. The electronic device 102 may be configured to determine quantum measurements on the encoded quantum states 506A, based on the quantum operators from the DLA. The quantum states 506A may be obtained from the training data 118. The training data 118 may be represented as {Xi, Yi}. The training data 118 may be encoded into quantum states 506A for every datapoint Xi. The training data118 may be received from the user. The quantum states 506A {P(Xi)} may be obtained based on the training data 118. The quantum operators maybe Hamiltonian operators for cost function determination. The Hamiltonian may be represented as per equation 1, as follows:

[0110] H = ΣiaiPi(1)

[0111] where, “H" may represent the Hamiltonian operator,

[0112] "ai" may represent an ithweight of the quantum circuit, and

[0113] " P_i" may represent the quantum operator.

[0114] The quantum operators may be the elements of the DLA. The quantum operators may be Pauli matrices, rotation operators, or other Hermitian operators. The training datapoints Xi may be encoded to the quantum states 506A. The quantum operators may be applied from the DLA to the encoded quantum state 506A. This may involve adding corresponding gates to the quantum circuit. The measurements may be performed on the quantum state 506A using the specified operators by adding operations to the quantum circuit and executing the quantum circuit on the quantum hardware 114.

[0115] At 510, an operation of combining the quantum measurement outcome and structure constants may be performed to obtain a full cost function. The electronic device 102 may be configured to combine the quantum measurement outcomes and structure constants to obtain the full cost function. The structure constants may be a mathematical quantity that is calculated from DLA. The structure constants may describe the commutation relations between the operators. The electronic device 102 may combine the quantum measurement outcomes and the structure constant to obtain the full cost function. The full cost function may typically represent anobjective function that needs to be minimized or maximized. The measurement outcomes may be collected from the quantum circuit. The pre-calculated constants from the DLA may be used to combine the measurement outcomes and structure constants to compute the full cost function.

[0116] At 512, an operation of parameters training with low classical resources and without additional quantum resources may be performed. The electronic device 102 may be configured to train the trainable parameters with low classical resources and without additional quantum resources. The initial set of parameters may be used to compute the cost function. The cost function may be used to determine the gradients of the parameters. A classical optimization algorithm (e.g., g-sim) may be applied to update the trainable parameters based on the computed gradients.

[0117] FIG. 6 is a diagram that illustrates a flowchart of an example method for optimal resource allocation based on determination of an expectation value of the DLA operators, in accordance with at least one embodiment described in the present disclosure. FIG.6 is described in conjunction with elements from FIG. 1, FIG.2, FIG.3, FIG. 4A, FIG. 4B and FIG. 5. With reference to FIG. 6, there is shown a flowchart 600 including operations 602 to 628. The method illustrated in the flowchart 600 may be performed by any suitable system, apparatus, or device, such as, by the example the electronic device 102 of FIG. 1, or the central processing unit 212 of FIG. 2. Although illustrated with discrete blocks, the steps and operations associated with one or more of the blocks of the flowchart 600 may be divided into additional blocks, combined into fewer blocks, or eliminated, depending on the implementation. Control may start at 602 and proceed to 604.At 604, a quantum state may be received based on a given task. The electronic device 102 maybe configured to receive quantum state based on the given task. The input quantum state may be represented as | t i >. The quantum state maybe represented based on training data or Hartree-Fock states from quantum chemistry.

[0118] At 606, the trainable parameters may be randomly initialized at the start of the training. The electronic device 102 may be configured to initialize the trainable parameters randomly at the start of the training of the QNN. The electronic device 102 may be configured to randomly initialize trainable parameters of a QNN at the start of the training of the QNN. Random initialization of the parameters (such as, weights) of the QNN may correspond to assignment of non-zero random weights to neuron paths of the QNN. For example, the random initialization may be performed by techniques, such as, but not limited to, a random normal initialization or a random uniform initialization.

[0119] At 608, third parameters of the set of third quantum gates may be determined, based on the classical hardware. The electronic device 102 may be configured to determine the third parameters of the set of third quantum gates, based on the classical hardware 116. The quantum gates (e.g., the set of third quantum gates) may be parameterized to perform specific rotations or transformations. The third parameters may be selected randomly and executed on a quantum simulator or hardware to determine gradients of the cost function. The third parameters may be updated, and the execution may be repeated until a convergence threshold is reached.

[0120] At 610, a set of second operations may be executed based on a convergence value. The electronic device 102 may be configured to determine the convergencevalue of the quantum circuit based on an accuracy associated with the third parameters. The electronic device 102 may be configured to execute the set of second operations based on the convergence value. The set of second operations may include operations 612 to 624.

[0121] At 612, fourth parameter gradients of the set of fourth quantum gates may be determined based on the quantum hardware 114. The electronic device 102 may be configured to determine the fourth parameter gradients (associated with, for example, the fourth parameters) of the set of quantum gates (for example, the set of fourth quantum gates), based on the quantum hardware 114. The parameter gradients for the quantum gates (" Ui(0)") may be determined based on the PSR technique. Once the fourth parameter gradients are obtained, the fourth parameters may be updated to minimize an objective function.

[0122] At 614, the fourth parameters may be updated based on the fourth parameter gradients, using the classical hardware. The electronic device 102 may be configured to update the fourth parameters based on the fourth parameter gradients, using the classical hardware 116. The fourth parameters may be updated using the measured gradients, to get new unitary quantum gates (" Ui(6’)"). The quantum hardware 114 may use the PSR technique to estimate parameter gradients (for example, fourth parameter gradients), and update trainable parameters associated with the quantum circuit. In an example, the trainable parameters may be the third parameters and the fourth parameters.

[0123] At 616, a quantum state (for example, a first quantum state) may be prepared for the quantum circuit, based on applying the updated fourth parameters. The electronic device 102 may be configured to prepare the first quantum state,based on applying updated fourth parameters. The first quantum state | UJ 1 (0’) >=U 1 (0’) | UJ > may be prepared by applying the updated unitary gates Ui(0’) to the input state. The quantum circuits may be initialized to a known state, for instance, a ground state for all qubits. To prepare a specific quantum state, a series of quantum gates may be applied to the initialized state.

[0124] At 618, a first expectation value of the DLA operators may be measured based on the first quantum state. The electronic device 102 may be configured to measure the first expectation value of the DLA operators based on the first quantum state. The expectation value may be stored in the main storage 218. The first expectation value may be measured based on an average value associated with the DLA operators.

[0125] At 620, third parameter gradients of a set of third gates may be determined, based on the first expectation value of the DLA operators, using the classical hardware 116 and quantum hardware 114. The electronic device 102 may be configured to determine the third parameter gradients of the set of third gates, based on the first expectation value of DLA operators using the classical hardware 116 and the quantum hardware 114. The first expectation value may be transmitted to the classical hardware 116 to evaluate gradients for "U2(θ)". The third parameter gradients may be determined by the classical hardware 116 and the quantum hardware 114 based on the first expectation value of the DLA operator.

[0126] At 622, third parameters may be updated based on the third parameter gradients. The electronic device 102 may be configured to update the third parameters based on the third parameter gradients. The third parameters of thethird quantum gates " U2G " may be updated using the third parameter gradients, to get the new unitary gates " U2( ’)".

[0127] At 624, the convergence value may be determined based on the third parameters and the fourth parameters. The electronic device 102 may be configured to determine the convergence value based on the third parameters and the fourth parameters. The determination of the convergence value may be further based on the objective function value, parameter updates, and parameter gradient values. The value of the objective function may be monitored across iterations, and the electronic device 102 may determine whether a variation in the value of the objective function is slower than a threshold. The updates to the parameters of the quantum circuit may be observed to check whether such updates become negligible. Also, the electronic device 102 may determine whether the parameter gradients are close to zero for a certain iteration, indicating that the parameters are close to an optimal value. Thus, the electronic device 102 may determine that the optimization process has reached convergence when variation in the value of the objective function is slower than a threshold, updates to the parameters becomes negligible, and / or the parameter gradients are close to zero.

[0128] At 626, it may be checked whether the convergence is reached. The electronic device 102 may be configured to determine whether the convergence has been reached. For example, as described at 624, it may be determined whether the convergence is reached based on the objective function value, parameter updates, and parameter gradient values. In case the convergence is reached, the optimized parameters of the quantum circuit may be obtained, and control may pass to 628. Ifthe convergence is not yet reached, control may pass to another iteration of the operations 612 to 624 to be executed.

[0129] At 628, the optimized parameters for the quantum circuit may be obtained by iteratively executing the set of second operations based on the convergence value. The electronic device 102 may be configured to obtain the optimized parameters of the quantum circuit by iteratively executing the set of second operations based on the convergence value. Another iteration of the operations from 612 to 624 may be executed in case when the convergence value is not yet reached. Once the convergence value is reached, the electronic device 102 may obtain the optimized parameters of the quantum circuit. Control may pass to end.

[0130] FIG. 7 is a diagram that illustrates a flowchart of an example method for optimal resource allocation based on an alternate and modified full optimization, and an expectation value of DLA operators, in accordance with at least one embodiment described in the present disclosure. FIG. 7 is described in conjunction with elements from FIG. 1, FIG. 2, FIG. 3, FIG. 4A, FIG. 4B, FIG. 5 and FIG. 6. With reference to FIG. 7, there is shown a flowchart 700 including operations 702 to 728. The method illustrated in the flowchart 700 maybe performed by any suitable system, apparatus, or device, such as, by the example the electronic device 102 of FIG. 1, or the central processing unit 212 of FIG. 2. Although illustrated with discrete blocks, the steps and operations associated with one or more of the blocks of the flowchart 700 may be divided into additional blocks, combined into fewer blocks, or eliminated, depending on the implementation. Control may start at 702 and proceed to 704.

[0131] At 704, the trainable parameters may be randomly initialized at the start of the training. The electronic device 102 may be configured to randomly initialize thetrainable parameters at the start of the training of the QNN. The input quantum state may be prepared based on a given task (e.g., a task input). The electronic device 102 may be configured to prepare the input quantum state based on a task input. The quantum state may be prepared based on the training data 118 or the trainable parameters given as the input (xi,yi). The training data 118 may be encoded into quantum states |vP(xi)> for every datapoint xi. The electronic device 102 may randomly initialize trainable parameters of a QNN at the start of the training of the QNN. The random initialization of the parameters (such as, weights) of the QNN may correspond to assignment of non-zero random weights to neuron paths of the QNN. For example, the random initialization may be performed by techniques, such as, but not limited to, a random normal initialization or a random uniform initialization.

[0132] At 706, optimized parameters of the quantum circuit may be received by iterative execution the set of second operations for predetermined iterations. The electronic device 102 may be configured to receive optimized parameters of the quantum circuit by iteratively executing the set of second operations (for example, operations 612 to 624 of FIG. 6) for a predetermined iteration. The predetermined iteration may be for example, but not limited to, 500 iterations. The optimization of the parameters may be performed by alternatively executing and updating the quantum gates on the quantum hardware 114 and the classical hardware 116. The quantum gates may be the first quantum gates, the second quantum gates, the third quantum gates, or the fourth quantum gates. Fifth parameter gradients may be determined based on the input quantum state (for example, the first quantum state) and the optimized parameters of the quantum circuit.At 708, a set of third operations may be executed based on a convergence value. The electronic device 102 may be configured to determine the convergence value of the quantum circuit based on an accuracy level associated with the fifth parameters. The electronic device 102 may be configured to execute the set of second operations based on the convergence value. The set of third operations may include operations 710 to 724.

[0133] At 710, the fifth parameter gradients may be determined for the optimized parameters based on the quantum hardware. The electronic device 102 may be configured to determine the fifth parameter gradients for the optimized parameters based on the quantum hardware 114. The fifth parameter gradients may be obtained by running "2p" circuit evaluations on the quantum circuit based on the PSR (for a circuit with “p" parameters). The PSR method may be used to compute the fifth parameter gradients of the quantum circuit with respect to its fifth parameters, which may be used for the optimization tasks in the VQA. The "2p" circuit evaluation (for a circuit with “p" parameters) may involve running the quantum circuit twice for each parameter, each time with the parameter shifted in opposite directions. The results of these evaluations may then be used to compute the fifth parameter gradients.

[0134] At 712, the fifth parameters may be updated based on the fifth parameter gradients. The electronic device 102 may be configured to update the fifth parameters based on the fifth parameter gradients. The fifth parameters may be updated to get new unitary gates " IhfO’)". The unitary gates may be used to manipulate qubits. The parameters of such unitary gates may be adjusted to achieve desired quantum states or operations. The electronic device 102 may determine asecond quantum state, based on the updated fifth parameters. The fifth parameter gradients may be used to determine the direction of the magnitude of changes needed to minimize or maximize the objective function. Once the fifth parameter gradients are known, the fifth parameters may be updated. The updated fifth parameters may be used to define the new unitary gates and determine the second quantum state based on the new unitary gates. The updated gates may then be used in the quantum circuit to obtain the optimized parameters.

[0135] At 714, a second quantum state may be determined based on non-updated fifth parameters. The electronic device 102 may be configured to determine the second quantum state based on non-updated fifth parameters. The second quantum state may be prepared by applying the non-updated fifth parameters. The second quantum state |UJ2(0’)>=U2(0’)|UJ> may be prepared by applying the non-updated unitary gates U2(0’) to the input state. The quantum circuits may be initialized to a known state, for instance, a ground state for all qubits. To prepare a specific quantum state, a series of quantum gates may be applied to the initialized state.

[0136] At 716, a second expectation value of the DLA operators may be measured based on the second quantum state. The electronic device 102 maybe configured to measure the second expectation value of the DLA based on the second quantum state. The second quantum state may be prepared by updating the quantum gates to the input state and applying the non-updated quantum gates. Once the quantum states are prepared, the electronic device 102 may determine the expectation value (i.e., the second expectation value) of the DLA operators. The second expectation value may be a statistical measure of an average output of the quantum measurement over apredetermined iteration. The second expectation value may be stored in the main storage 218 or the external memory 230.

[0137] At 718, the second expectation value of the DLA operator may be transmitted to the classical hardware. The electronic device 102 may be configured to transmit the second expectation value of the DLA operator to the classical hardware 116. The transmission of the second expectation value of the DLA operator may be through a wired communication or a wireless communication medium.

[0138] At 720, sixth parameter gradients of a set of sixth quantum gates may be determined, based on the transmitted second expectation value. The electronic device 102 may be configured to determine the sixth parameter gradients of the set of sixth quantum gates, based on the transmitted second expectation value. The parameter gradients (for example, the sixth parameter gradients) of the quantum gates (for example, the set of sixth quantum gates) may be determined using the g-sim technique, based on the classical hardware 116 and the quantum hardware 114.

[0139] At 722, sixth parameters may be updated based on the sixth parameter gradients. The electronic device 102 may be configured to update the sixth parameters based on the sixth parameter gradients. The sixth parameter gradients may indicate a direction and a rate of change of the loss / cost function. The update of the sixth parameter updating may be executed using the classical hardware 116.

[0140] At 724, a convergence value may be determined based on the fifth parameters and the sixth parameters. The electronic device 102 may be configured to determine the convergence value based on the fifth parameters and the sixth parameters. The determination of the convergence value maybe further based on the objective function value, parameter updates, and parameter gradient values. Thevalue of the objective function maybe monitored across iterations, and the electronic device 102 may determine whether a variation in the value of the objective function is slower than a threshold. The updates to the parameters of the quantum circuit may be observed to check whether such updates become negligible. Also, the electronic device 102 may determine whether the parameter gradients are close to zero for a certain iteration, indicating that the parameters are close to an optimal value. Thus, the electronic device 102 may determine that the optimization process has reached convergence when variation in the value of the objective function is slower than a threshold, updates to the parameters becomes negligible, and / or the parameter gradients are close to zero.

[0141] At 726, it may be checked whether the convergence is reached. The electronic device 102 may be configured to determine whether the convergence has been reached. For example, as described at 724, it may be determined whether the convergence is reached based on the objective function value, parameter updates, and parameter gradient values. In case the convergence is reached, the optimized parameters of the quantum circuit may be obtained, and control may pass to 728. If the convergence is not yet reached, control may pass to another iteration of the operations 710 to 724 maybe executed.

[0142] At 728, the optimized parameters for the quantum circuit may be obtained by iteratively executing the set of third operations based on the convergence value. The electronic device 102 may be configured to obtain the optimized parameters of the quantum circuit by iteratively executing the set of second operations based on the convergence value. Another iteration of the operations from 710 to 724 may be executed in case the convergence value is not yet reached. Once the convergencevalue is reached, the electronic device 102 may obtain the optimized parameters of the quantum circuit. Control may pass to end.

[0143] FIG. 8 is a diagram that illustrates an example scenario for training variational quantum algorithms through delegation to quantum and classical resources for optimal resource allocation, in accordance with at least one embodiment described in the present disclosure. FIG. 8 is described in conjunction with elements from FIG. 1, FIG. 2, FIG. 3, FIG. 4A, FIG. 4B, FIG. 5, FIG. 6, and FIG. 7. With reference to FIG. 8, there is shown an example scenario 800. The scenario 800 include an input (e.g., a quantum state) 802, a quantum circuit 804, first quantum gates 806, second quantum gates 808, and an output (e.g., quantum measurement) 810.

[0144] The electronic device 102 may receive the input 802 and feed the input 802 to the quantum circuit 804. The input 802 may be an encoded quantum state of the training data 118. The first quantum gates 806 may run on the classical hardware 116 using the g-sim method. The second quantum gates 808 may run on the quantum hardware 114 using the PSR technique. A first count of trainable parameters allocated to the quantum hardware 114 may be less than or equal to a second count of trainable parameters allocated to the classical hardware 116. An advantage of allocating lesser trainable parameters to the quantum hardware 114 than trainable parameters allocated the classical hardware 116 may be because the quantum hardware 114 may be expensive and noisy to operate, while the classical hardware 116 may be cheaper and noise-free.

[0145] The electronic device 102 may be configured to perform quantum measurement across the quantum gates of the quantum circuit 804 in a direction ofinformation processing (e.g., a left-to-right associated with the quantum circuit 804), as shown in FIG.8. The PSR technique may be used to compute the second parameter gradients of the second quantum gates 808. This may be particularly useful in variational quantum algorithms where the parameters may be optimized to minimize or maximize the objective function. The g-sim may be another method to estimate the first parameter gradients of the first quantum gates 806. In order to optimize the input trainable parameters of the quantum gates using the PSR and the g-sim techniques in alternate turns, the g-sim technique may be used to compute the gradients of the objective function with respect to the trainable parameters and update the trainable parameters using the gradient descent or any other optimization method. Similarly, in a successive iteration, the PSR technique may be used to compute the gradients of the objective function with respect to the trainable parameters. Thus, the first quantum gates 806 and the second quantum gates 808 may be trained alternatively at successive iterations. The trained parameters may be obtained at the end of the training.

[0146] By alternating between the PSR and the g-sim, the strengths of both methods may be leveraged to potentially achieve better optimization performance. The DLA basis elements may be measured on the quantum states generated after the second quantum gates are applied on data-encoded quantum states for each iteration. The measured DLA may be mapped to the classical computation via the Liealgebra properties. The optimized parameters may be determined based on the cost function determined based on the measured DLA. The updated parameters may be represented as given in equation 2, as follows.

[0147] 6 a! — 62 — a—dc

[0148] de (2)where,

[0149] 01may represent an updated value of the parameter,

[0150] 6 may represent a value of the parameter at the start of the training iteration, a may represent a weight, such as, a learning rate associated with the training, and 5 C

[0151] -=; may represent a value of the parameter gradient for the training iteration.

[0152] The electronic device 102 may be configured to determine an output (e.g., the output 810) of the optimized quantum measurements. Based on the alternate training of the quantum circuit 804 using the g-sim technique (for the first quantum gates 806) and using the PSR technique (for the second quantum gates 808), the electronic device 102 may determine the optimized parameters of the quantum circuit 804. The optimized parameters may correspond to the trained quantum circuit 804. Based on the optimized parameters, the electronic device 102 may determine the output 810 of the optimized quantum measurements.

[0153] FIG. 9 is a graph diagram illustrating an exemplary comparison of convergence value between the PSR, g-sim and alternate optimization methods, in accordance with at least one embodiment described in the present disclosure. FIG. 9 is described in conjunction with elements from FIG. 1, FIG. 2, FIG. 3, FIG. 4A, FIG. 4B, FIG. 5, FIG. 6, FIG. 7, and FIG. 8. With reference to FIG. 9, there is shown an exemplary graph 900. The exemplary graph 900 includes a graph plot showing comparison of number of iterations versus the convergence of the solution.

[0154] In g-sim method, all basis elements of the DLA may be used in quantum gates with 66 parameters, but this approach may not converge to the solution within 500 iterations. The PSR approach may use a YZ linear ansatz with 3 layers, totalling 36 parameters. This approach may also fail to converge to the correct solution within500 iterations. The alternate optimization method combines all the DLA elements (66 parameters) with 3 YZ linear layers (36 parameters), resulting in total of 102 parameters. This hybrid approach may be able to achieve better accuracy and convergence compared to the individual g-sim and PSR approaches. While both the g-sim and PSR approaches struggle to converge within 500 iterations, the alternate hybrid protocol that combines elements from both methods may shows improved performance and accuracy. This suggests that the hybrid approach leverages the strengths of both parameterization strategies, leading to better results.

[0155] It should be noted that graph 900 of FIG. 9 presents experimental data for exemplary purposes and should not be construed to limit the scope of the disclosure.

[0156] Referring to FIGs. 10A, 10B, 11A, 11B, 12A, 12B, 13A and 13B, the variance of gradients for the first parameter from each of the g-sim and PSR parts of the ansatz over multiple training runs is shown. The plot is organized into four columns (for example, FIGs. 10A and 10B, FIGs. 11A and 11B, FIGs. 12A and 12B, and FIGs. 13A and 13B) each representing different configurations with YZ Linear Layers: 1, 3, 6, and 9. FIGs. 10A, 11A, 12A, and 13A show the variance of the first parameter from the g-sim section (except the HEA50). FIGs.10B, 11B, 12B, and 13B show the variance of the first parameter from the PSR section (except the HEA50). The HEA50 represents an example case of a 50-layer Hardware-Efficient Ansatz (HEA) where the vanishing gradient issue may be identified (used as a reference to compare with the alternative optimization method). This plot helps visualize the effectiveness of the new training methods by comparing the variance of gradients across different configurations and training approaches.FIG. 10A and FIG. 10B are graph diagrams that collectively illustrate partial derivatives of parameters of g-sim, PSR for layer 1 and Hardware-Efficient Ansatz (HEA) with 50 layers respectively, in accordance with at least one embodiment described in the present disclosure. FIG. 10A and FIG. 10B are described in conjunction with elements from FIG. 1, FIG. 2, FIG. 3, FIG. 4A, FIG. 4B, FIG. 5, FIG. 6, FIG. 7, FIG. 8, and FIG. 9. With reference to FIG. 10A and 10B, there are shown exemplary graphs 1000A and 1000B, respectively. The exemplary graphs 1000A and 1000B include graph plots showing partial derivatives of parameters of g-sim, PSR for layer 1 and Hardware-Efficient Ansatz (HEA) with 50 layers respectively. A first configuration (configuration 1) may include layer YZ linear ansatz and XY Hamiltonian DLA. The result data for the configuration 1 may be as shown in table 1 and table 2. The table 1 shows the result values in comparison with the fully classical method, fully quantum method and alternate optimization method. The table 2 shows the result values in comparison with the fully classical method, fully quantum method and the modified full optimization method. Here, Error = (

[0157]

[0158] Eg- Eg) / Eg, Eg, that is, true ground state energy estimate, Eg - Lowest energy reached in current trial, success = trials reaching below 10-3error, resource reduction, fraction of QPU calls reduced, and all statistics are for successful trails.

[0159] Qubits g-sim Full Alternate Error*(le- Success Error*(le- Succes Error*(le- Resource 5) 5) 5) Reduction (%)

[0160] 6 12897+ / - 81.25 0.1260+ / - 70.31 0.1166 + / - 6.24 + / - 90 0.0029 0.0072 4.11 8 7116+ / -13 70.31 0.0449+ / - 59.38 0.0370 + / - 22.30 + / - 0.0023 0.0418 11.77

[0161]

[0162] 10 362+ / -6 29.69 4.0548+ / - 48.44 1.4123 + / - 3.07 + / - 10.1852 4.7682 1.66

[0163] 12 1702+ / - 65.62 4.9674+ / - 70.31 3.5183 + / - 20.81 + / - 3425 9.5245 5.6936 10.40 14 950+ / -27 51.56 0.0551+ / - 51.56 0.0373 + / - 16.70 + / - 0.0057 0.0129 9.61

[0164] 16 433+ / -22 21.88 5.1286+ / - 43.75 3.1015 + / - 38.39 + / - 9.2108 10.7294 17.20 18 120+ / -8 35.94 1.1551+ / - 50 1.4296 + / - 16.71 + / - 3.4561 5.6432 7.33

[0165]

[0166] Table. 1

[0167] Qubits g-sim Full Alternate+Modified full Error*(le- Success Error*(le- Succes Error*(le-5) Resource 5) 5) Reduction (%) 6 12897+ / - 81.25 0.1260+ / - 90.62 0.1175 + / - -33.27 + / - 90 0.0029 0.0053 17.07 8 7116+ / -13 70.31 0.0449+ / - 75.00 0.0343 + / - 27.53 + / - 0.0023 0.0054 13.20 10 362+ / -6 29.69 4.0548+ / - 50.00 0.0398 + / - 41.88 + / - 10.1852 0.0092 21.81 12 1702+ / - 65.62 4.9674+ / - 90.62 2.2430 + / - 45.25 + / - 3425 9.5245 1.4256 21.95 14 950+ / -27 51.56 0.0551+ / - 51.56 0.0468 + / - 32.07 + / - 0.0057 0.0091 15.24 16 433+ / -22 21.88 5.1286+ / - 48.44 0.0468 + / - 60.00 + / - 9.2108 0.0122 25.11 18 120+ / -8 35.94 1.1551+ / - 54.69 0.0748 + / - 46.81 + / - 3.4561 0.0455 26.52

[0168]

[0169] Table. 2

[0170] Referring to FIGs.10A and 10B, the graph plots show the variance of partial derivative of the first parameter of the g-sim part and the PSR part, for alternateoptimization and full PSR optimization training. The QML models may show exponentially decreasing gradients with increasing qubits rendering higher qubit models effectively untrainable. The alternate optimization under the alternating scheme and full PSR optimization do not encounter the vanishing gradient issue for this choice of ansatz. The g-sim gradient full (full PSR optimization) and g-sim gradient alt (alternate optimization), PSR gradient full (full PSR optimization) and PSR gradient alt (alternate optimization) decrease much slower than the HEA50.

[0171] It should be noted that the graphs 1000A and 1000B of FIGs. 10A and 10B, respectively, and the tables 1 and 2, present experimental data for exemplary purposes and should not be construed to limit the scope of the disclosure.

[0172] FIG. 11A and FIG. 11B are graph diagrams that collectively illustrate partial derivatives of parameters of g-sim, PSR for layer 3 and Hardware-Efficient Ansatz (HEA) with 50 layers respectively, in accordance with at least one embodiment described in the present disclosure. FIG. 11A and FIG. 11B are described in conjunction with elements from FIG. 1, FIG. 2, FIG. 3, FIG. 4A, FIG. 4B, FIG. 5, FIG. 6, FIG. 7, FIG. 8, FIG.9, FIG. 10A, and FIG. 10B. With reference to FIG. 11A and 11B, there are shown exemplary graphs 1100A and 1100B, respectively. The exemplary graphs 1100A and 1100B include graph plots showing partial derivatives of parameters of g-sim, PSR, for layer 3 and Hardware-Efficient Ansatz (HEA) with 50 layers respectively. A second configuration (configuration 2) with layer 3 may include layer YZ linear ansatz and XY Hamiltonian DLA. The result data for the configuration 2 may be shown in table 3 and table 4. The table 3 shows the result values in comparison with the fully classical method, fully quantum method and alternate optimization method. The table 4 shows the result values in comparison with the fully classicalmethod, fully quantum method and the modified full optimization method. Here, Error = (Eg- Eg / Eg, Eg, that is, true ground state energy estimate, Eg - Lowest energy reached in current trial, success = trials reaching below 10-3error, resource reduction, fraction of QPU calls reduced, and all statistics are for successful trails. Qubits g-sim Full Alternate Error*(le- Success Error*(le- Succes Error*(le-5) Resource 5) 5) Reduction (%) 6 12897+ / - 75 0.1986 + / - 81.25 0.2495 + / - 12.87 + / - 90 0.1988 0.4595 6.93 8 7116+ / - 68.75 0.1189 + / - 65.62 0.1319 + / - 20.84 + / - 13 0.1516 0.2363 8.15 10 362+ / -6 37.5 4.4209 + / - 40.62 4.5274 + / - 17.42 + / - 18.0261 12.4124 3.63 12 1702+ / - 59.38 6.7940 + / - 70.31 4.1516 + / - 23.94 + / - 3425 15.0542 4.9460 7.51 14 950+ / -27 40.62 0.1323 + / - 40.62 1.6039 + / - 34.77 + / - 0.1335 4.0555 13.92 16 433+ / -22 21. 0.4418 + / - 34.38 4.7023 + / - 33.62 + / - 29.69 0.6060 12.9575 9.45 18 120+ / -8 25 4.7560 + / - 34.38 5.9944 + / - 37.31 + / - 17.5169 7.3429 10.55

[0173]

[0174] Table. 3

[0175] Qubits g-sim Full A ternate+Modified full Error*(le- Success Error*(le- Succes Error*(le-5) Resource 5) 5) Reduction (%) 6 12897+ / - 75 0.1986 + / - 75.00 0.1214 + / - 22.62 + / - 90 0.1988 0.0069 12.21 8 7116+ / -13 68.75 0.1189 + / - 68.75 0.0348 + / - 36.58 + / - 0.1516 0.0085 15.15 10 362+ / -6 37.5 4.4209 + / - 48.44 0.0472 + / - 49.32 + / - 18.0261 0.0058 18.98

[0176]

[0177] 12 1702+ / - 59.38 6.7940 + / - 73.44 1.6274 + / - 43.24 + / - 3425 15.0542 1.5190 16.37 14 950+ / -27 40.62 0.1323 + / - 43.75 0.0554 + / - 47.99 + / - 0.1335 0.0120 20.32

[0178] 16 433+ / -22 21. 0.4418 + / - 34.38 0.0521 + / - 56.12 + / - 29.69 0.6060 0.0122 21.31 18 120+ / -8 25 4.7560 + / - 42.19 0.0780 + / - 52.63 + / - 17.5169 0.0263 22.83

[0179]

[0180] Table. 4

[0181] Referring to FIGs. 11A and 11B, the graph plots show the variance of partial derivative of the first parameter of the g-sim part and the PSR part, for alternate optimization and full PSR optimization training. The QML models may show exponentially decreasing gradients with increasing qubits rendering higher qubit models effectively untrainable. The alternate optimization under the alternating scheme and full PSR optimization do not encounter the vanishing gradient issue for this choice of ansatz. The g-sim gradient full (full PSR optimization) and g-sim gradient alt (alternate optimization), PSR gradient full (full PSR optimization) and PSR gradient alt (alternate optimization) decrease much slower than the HEA50.

[0182] It should be noted that the graphs 1100A and 1100B of FIGs. 11A and 11B, respectively, and the tables 3 and 4, present experimental data for exemplary purposes and should not be construed to limit the scope of the disclosure.

[0183] FIG. 12A and FIG. 12B are graph diagrams that collectively illustrate partial derivatives of parameters of g-sim, PSR for layer 6 and Hardware-Efficient Ansatz (HEA) with 50 layers respectively, in accordance with at least one embodiment described in the present disclosure. FIG. 12A and FIG. 12B is described in conjunction with elements from FIG. 1, FIG. 2, FIG. 3, FIG. 4A, FIG. 4B, FIG. 5, FIG. 6, FIG. 7, FIG. 8,FIG. 9, FIG. 10A, FIG. 10B, FIG. 11A and FIG. 11B. With reference to FIG. 12A and 12B, there are shown exemplary graphs 1200A and 1200B, respectively. The exemplary graphs 1200A and 1200B include graph plots showing partial derivatives of parameters of g-sim, PSR for layer 6 and Hardware-Efficient Ansatz (HEA) with 50 layers respectively. A third configuration (configuration 3) with layer 6 may include layer YZ linear ansatz and XY Hamiltonian DLA. The result data for the configuration 3 may be as shown in table 5 and table 6. The table 5 shows the result data in comparison with the fully classical method, fully quantum method and alternate optimization method. The table 6 shows the result values in comparison with the fully classical method, fully quantum method and the modified full optimization method. Here, Error = (

[0184]

[0185] Eg- Eg} / Eg, Eg, that is, true ground state energy estimate, Eg

[0186] - Lowest energy reached in current trial, success = trials reaching below 10-3error, resource reduction, fraction of QPU calls reduced, all statistics are for successful trails.

[0187] Qubits g-sim Full Alternate Error*(le- Success Error*(le- Success Error*(le- Resource 5) 5) 5) Reduction (%) 6 12897+ / - 82.81 1.6670 + / - 79.69 1.3919 + / - 20.65 + / - 90 3.7428 1.9324 6.97 8 7116+ / - 79.69 1.6670 + / - 81.25 1.6945 + / - 14.76 + / - 13 3.7428 3.8986 4.22 10 362+ / -6 43.75 1.6670 + / - 45.31 2.2075 + / - 26.49 + / - 3.7428 2.0881 6.88 12 1702+ / - 64.06 2.4086 + / - 75 6.0877 + / - 27.05 + / - 3425 2.5768 10.8268 8.21 14 950+ / -27 40.62 0.2578 + / - 35.94 4.3721 + / - 34.59 + / - 0.4190 6.9066 13.91

[0188]

[0189] 16 433+ / -22 23.44 0.4738 + / - 32.81 10.9442 + / - 32.50 + / - 0.9148 16.9424 10.92 18 120+ / -8 28.12 4.5659 + / - 37.5 10.3035 + / - 32.84 + / - 18.0367 10.1838 12.19

[0190]

[0191] Table. 5

[0192] Qubits g-sim Full Alternate +Modified Full Error*(le- Success Error*(le- Success Error*(le-5) Resource 5) 5) Reduction (%) 6 12897+ / - 82.81 1.6670 + / - 81.25 0.2047 + / - 7.93 + / - 90 3.7428 0.3206 3.25 8 7116+ / - 79.69 1.6670 + / - 79.69 0.0472 + / - 22.87 + / - 13 3.7428 0.0141 8.77 10 362+ / -6 43.75 1.6670 + / - 54.69 0.0687 + / - 32.82 + / - 3.7428 0.0325 14.19 12 1702+ / - 64.06 2.4086 + / - 81.25 1.5121 + / - 22.63 + / - 3425 2.5768 1.4794 8.37 14 950+ / -27 40.62 0.2578 + / - 46.88 0.0585 + / - 46.14 + / - 0.4190 0.0106 17.34 16 433+ / -22 23.44 0.4738 + / - 37.50 0.0625 + / - 50.88 + / - 0.9148 0.0197 19.61 18 120+ / -8 28.12 4.5659 + / - 37.50 0.0891 + / - 45.45 + / - 18.0367 0.0224 20.12

[0193]

[0194] Table. 6

[0195] Referring to FIGs.12A and 12B, the graph plots show the variance of partial derivative of the first parameter of the g-sim part and the PSR part, for alternate optimization and full PSR optimization training. The QML models may show exponentially decreasing gradients with increasing qubits rendering higher qubit models effectively untrainable. The alternate optimization under the alternating scheme and full PSR optimization do not encounter the vanishing gradient issue forthis choice of ansatz. The g-sim gradient full (full PSR optimization) and g-sim gradient alt (alternate optimization), PSR gradient full (full PSR optimization) and PSR gradient alt (alternate optimization) decrease much slower than the HEA50.

[0196] It should be noted that the graphs 1200A and 1200B of FIGs. 12A and 12B, respectively, and the tables 5 and 6, present experimental data for exemplary purposes and should not be construed to limit the scope of the disclosure.

[0197] FIG. 13A and FIG. 13B are graph diagrams that collectively illustrate partial derivatives of parameters of g-sim, PSR for layer 9 and Hardware-Efficient Ansatz (HEA) with 50 layers respectively, in accordance with at least one embodiment described in the present disclosure. FIG. 13A and FIG. 13B is described in conjunction with elements from FIG. 1, FIG. 2, FIG. 3, FIG. 4A, FIG. 4B, FIG. 5, FIG. 6, FIG. 7, FIG. 8, FIG. 9, FIG. 10A, FIG. 10B, FIG. 11A, FIG. 11B, FIG. 12A, and FIG. 12B. With reference to FIG. 13A and 13B, there are shown exemplary graphs 1300A and 1300B, respectively. The exemplary graphs 1300A and 1300B include graph plots showing partial derivatives of parameters of g-sim, PSR for layer 9 and Hardware-Efficient Ansatz (HEA) with 50 layers respectively. A fourth configuration (configuration 4) with layer 9 may include layer YZ linear ansatz and XY Hamiltonian DLA. The result data for the configuration 4 may be as shown in table 7 and table 8. The table 7 shows the result data in comparison with the fully classical method, fully quantum method and alternate optimization method. The table 8 shows the result values in comparison with the fully classical method, fully quantum method and the modified full optimization method. Here, Error = (

[0198]

[0199] Eg- Eg / Eg, Eg that is true ground state energy estimate, Eg - Lowest energy reached in current trial, success = trialsreaching below 10-3error, resource reduction, fraction of QPU calls reduced, all statistics are for successful trails.

[0200] Qubits g-sim Full Alternate Error*(le- Success Error*(le-5) Success Error*(le-5) Resource 5) Reduction (%) 6 12897+ / - 82.81 4.7147 + / - 81.25 6.2339 + / - -4.49 + / - 90 13.2183 10.3905 1.42 8 7116+ / - 54.69 6.2611 + / - 57.81 5.1675 + / - 18.62 + / - 13 20.9209 7.0008 5.19 10 362+ / -6 43.75 1.2041 + / - 43.75 5.5878 + / - 14.12 + / - 2.1570 8.2595 3.01 12 1702+ / - 71.88 2.2582 + / - 85.94 7.3490 + / - 26.85 + / - 3425 2.4786 7.7809 8.69 14 950+ / -27 57.81 0.1431 + / - 48.44 6.5440 + / - 23.44 + / - 0.0908 9.5461 6.54 16 433+ / -22 42.19 1.9142 + / - 43.75 8.0349 + / - 20.59 + / - 7.1109 7.6733 4.86 18 120+ / -8 28.12 0.3037 + / - 29.69 10.9171 + / - 20.32 + / - 0.4702 9.2509 4.83

[0201]

[0202] Table. 7

[0203] Qubits g-sim Full Alternate +Modified Full Error*(le- Success Error*(le-5) Success Error*(le-5) Resource 5) Reduction (%) 6 12897+ / - 82.81 1.6670 + / - 98.44 6.3607 + / - -4.70 + / - 90 3.7428 20.0239 2.13 8 7116+ / - 79.69 1.6670 + / - 60.94 1.5307 + / - 17.64 + / - 13 3.7428 8.2507 7.73 10 362+ / -6 43.75 1.6670 + / - 54.69 1.8711 + / - 22.70 + / - 3.7428 9.6989 10.14 12 1702+ / - 64.06 2.4086 + / - 90.62 1.5412 + / - 13.74 + / - 3425 2.5768 1.4719 3.93

[0204]

[0205] 14 950+ / -27 40.62 0.2578 + / - 53.12 0.0868 + / ' 38.17 + / - 0.4190 0.0322 14.61 16 433+ / -22 23.44 0.4738 + / - 37.50 0.1642 + / ' 44.47 + / - 0.9148 0.3449 19.66 18 120+ / -8 28.12 4.5659 + / - 54.69 0.1158 + / ' 39.07 + / - 18.0367 0.0830 15.71

[0206]

[0207] s Table. 8

[0208] Referring to FIGs. 12A and 12B, the graph plots show the variance of partial derivative of the first parameter of the g-sim part and the PSR part, for alternate optimization and full PSR optimization training. The QML models may show exponentially decreasing gradients with increasing qubits rendering higher qubit models effectively untrainable. The alternate optimization and full PSR optimization under the alternating scheme do not encounter the vanishing gradient issue for this choice of ansatz. The g-sim gradient full (full PSR optimization) and g-sim gradient alt (alternate optimization), PSR gradient full (full PSR optimization) and PSR gradient alt (alternate optimization) decrease much slower than the HEA50.

[0209] It should be noted that the graphs 1300A and 1300B of FIGs. 13A and 13B, respectively, and the tables 7 and 8, present experimental data for exemplary purposes and should not be construed to limit the scope of the disclosure.

[0210] FIG. 14 is a diagram that illustrates a flowchart for an example method for improved training variational quantum algorithms through delegation to quantum and classical resources, in accordance with at least one embodiment described in the present disclosure. FIG. 14 is described in conjunction with elements from FIG. 1, FIG.

[0211] 2, FIG. 3, FIG. 4A, FIG. 4B, FIG. 5, FIG. 6, FIG. 7, FIG. 8, FIG. 9, FIG. 10A, FIG. 10B, FIG.

[0212] 11A, FIG. 11B, FIG. 12A, FIG. 12B, FIG.13A, and FIG. 13B. With reference to FIG. 14,there is shown a flowchart 1400. The flowchart 1400 illustrates a method that may start at 1402 and may be performed by any suitable system, apparatus, or device, such as, by the example the electronic device 102 of FIG. 1, or the central processing unit 212 of FIG. 2. Although illustrated with discrete blocks, the steps and operations associated with one or more of the blocks of the flowchart 1400 may be divided into additional blocks, combined into fewer blocks, or eliminated, depending on the implementation.

[0213] At 1402, the quantum circuit may be generated based on the energy operator and the mathematical object, wherein the quantum circuit may include the set of quantum gates. The electronic device 102 may be configured to generate quantum circuit 804 based on the energy operator and the mathematical object. The quantum circuit 804 may include the set of first quantum gates. The energy operator may correspond to the Hamiltonian operator. The mathematical object may correspond to the quantum operator associated with the dynamical Lie algebra. The electronic device 102 may prepare an input quantum state from the energy operator and the mathematical object based on an application of an encoding circuit on the training data 118. The prepared input quantum state maybe: |'TF= Uo(xj)|0), where U0(xi)=e'1XiG, may be a unitary gate that may encode each component of a “d" dimensional data vector into the input quantum state comprising "q=log(d)” qubits. The “d" dimensional data vector may be representative of the datapoint “xj" included in the training data 118. Further, “G" may be a quantum gate of the parameterized quantum circuit 804 in the quantum computer 110 that may generate a Hamiltonian matrix. The Hamiltonian matrix may then be used in simulation within the quantum computer 110.At 1404, the first parameters of the set of first quantum gates may be determined based on the classical hardware. The electronic device 102 may be configured to determine the first parameters of the set of first quantum gates, based on the classical hardware 116. The classical hardware 116 may utilize the g-sim technique to determine the first parameters.

[0214] At 1406, the precision level associated with the quantum circuit may be determined, based on the first parameters. The electronic device 102 may be configured to determine the precision level associated with the quantum circuit, based on the first parameters. The precision level may be associated with the accuracy of the optimized parameters. When the precision level of the optimized parameters is accurate then the operation may be ended (i.e., control may pass to end) and when the precision level of the optimized parameters is inaccurate, then the control may be passed to 1408.

[0215] At 1408, the set of first operations may be executed based on the precision level. The electronic device 102 may be configured to execute the set of first operations based on the precision level. The set of first operations may include operations from 1408A-1408F. The set of first operations may include adding the set of second quantum gates including the second parameters to the quantum circuit, determining the first parameter gradients of the set of first quantum gates, updating the first parameters using the classical hardware 116, determining the second parameter gradients based on the quantum hardware 114, updating the second parameters using the classical hardware 116, and determining the precision level associated with the quantum circuit.At 1408A, an operation of addition of the set of second quantum gates to the quantum circuit 804 may be performed. The electronic device 102 may be configured to add the set of second quantum gates 808 including second parameters, based on the precision level. The addition of quantum gates (for example, second quantum gates 808) may involve specifying the sequence of operations that may be applied to the qubits. The quantum circuit 804 may be initialized with a specified number of qubits and optionally, classical bits for measurements. The quantum gates may be added to the quantum circuit 804 by specifying the type of gate and qubits it acts on. By adding the trainable new gates, i.e., NGs (for example, the NGs may include the second trainable parameters) may increase the dimensionality of the DLA associated with the quantum circuit. By introducing additional trainable parameters, the DLA may be extended, allowing the quantum circuit to perform a wider variety of transformations. This may lead to better performance in tasks such as variational quantum techniques.

[0216] At 1408B, an operation of determination of the first parameter gradients of the set of first quantum gates may be performed. The electronic device 102 may be configured to determine the first parameter gradients of the set of first quantum gates based on each of the classical hardware 116 and the quantum hardware 114. The first parameter gradients may be determined based on the classical hardware 116 (using the g-sim technique) and the quantum hardware 114 (using the PSR technique).

[0217] At 1408C, an operation of updating the first parameters based on the first parameter gradients, using the classical hardware 116 may be performed. The electronic device 102 may be configured to update the first parameters based on thefirst parameter gradients, using the classical hardware 116. The first parameters may be for instance, but not limited to, rotation angles, universal gate parameters, controlled rotation gates, variational parameters, and data re-uploading parameters. The quantum gates of the quantum circuit may include corresponding trainable parameters of the first parameters or the second parameters. The first parameters may be different from the second parameters.

[0218] At 1408D, an operation of determination of the second parameter gradients of the set of second quantum gates, using the quantum hardware 114, may be performed. The electronic device 102 may be configured to determine the second parameter gradients of the set of second quantum gates 908, based on the quantum hardware 114. The second quantum gates 808 may correspond to Hardware-Efficient Ansatz (HEA) gates including a YZ linear ansatz. The second parameter gradients may be determined based on the updated first parameters.

[0219] At 1408E, an operation of updating the second parameters based on the second parameter gradients, using the classical hardware, may be performed. The electronic device 102 may be configured to update the second parameters based on the second parameter gradients, using the classical hardware 116. In some embodiments, the second quantum gates 808 (for example, new gates) may receive input from the first quantum gates 806 (for example, the Lie gates). The first quantum gates 806 and the second quantum gates 808 may include the set of trainable parameters (for example, the first trainable parameters and the second trainable parameters).

[0220] At 1408F, an operation of determination of the precision level associated with the quantum circuit may be performed. The electronic device 102 may beconfigured to determine the precision level associated with the quantum circuit, based on the first parameters and the second parameters. When the precision level of the updated second trainable parameters is accurate, then control may pass to 1410. When the precision level of the optimized parameters of the quantum circuit is below the precision level, then control may be passed to 1408A.

[0221] At 1410, the optimized parameters of the quantum circuit may be determined by iteratively executing the set of first operations based on the precision level. The electronic device 102 may be configured to obtain the optimized parameters of the quantum circuit 804 by iteratively executing the set of first operations based on the precision level. When the precision level of the updated second trainable parameters is accurate, the optimized parameters of the quantum circuit may be determined, and control may pass to end.

[0222] Various embodiments of the disclosure may provide one or more non-transitory computer-readable storage media configured to store instructions that, in response to being executed, cause an electronic device (such as, the electronic device 102) to perform a set of operations. The set of operations may include generating a quantum circuit based on an energy operator and a mathematical object. The quantum circuit may include a set of first quantum gates. The set of operations may further include determining a first parameters of the set of first quantum gates, based on a classical hardware (e.g., the classical hardware 116). A precision level associated with the quantum circuit may be determined, based on the first parameters. The electronic device 102 may further execute a set of first set of operations based on the precision level, wherein the set of first operations includes: adding a set of second quantum gates to the quantum circuit, based on the precision level. The set of firstoperations may further include determining first parameter gradients of the set of first quantum gates, based on each of the classical hardware 116 and a quantum hardware (e.g., the quantum hardware 114). The first parameters may be updated, based on the first parameter gradients, using the classical hardware 116. The set of first operations may further include determining second parameter gradients of the set of second quantum gates, based on the quantum hardware 114 and updating the second parameters based on the second parameter gradients, using the classical hardware 116. The set of first operations may further include determining the precision level associated with the quantum circuit, based on the first parameters and the second parameters to obtain optimized parameters of the quantum circuit by iteratively executing the set of first operations based on the precision level.

[0223] As used in the present disclosure, the terms "module" or "component" may refer to specific hardware implementations configured to perform the actions of the module or component and / or software objects or software routines that may be stored on and / or executed by general purpose hardware (e.g., computer-readable media, processing devices, etc.) of the computing system. In some embodiments, the different components, modules, engines, and services described in the present disclosure may be implemented as objects or processes that execute on the computing system (e.g., as separate threads). While some of the systems and methods described in the present disclosure are generally described as being implemented in software (stored on and / or executed by general purpose hardware), specific hardware implementations or a combination of software and specific hardware implementations are also possible and contemplated. In this description, a computing entity" may be any computing system as previously defined in thepresent disclosure, or any module or combination of modulates running on a computing system.

[0224] Terms used in the present disclosure and especially in the appended claims (e.g., bodies of the appended claims) are generally intended as "open" terms (e.g., the term "including" should be interpreted as "including, but not limited to," the term "having" should be interpreted as "having at least," the term "includes" should be interpreted as "includes, but is not limited to," etc.).

[0225] Additionally, if a specific number of an introduced claim recitation is intended, such an intent will be explicitly recited in the claim, and in the absence of such recitation no such intent is present. For example, as an aid to understanding, the following appended claims may contain usage of the introductory phrases "at least one" and "one or more" to introduce claim recitations. However, the use of such phrases should not be construed to imply that the introduction of a claim recitation by the indefinite articles "a" or "an" limits any particular claim containing such introduced claim recitation to embodiments containing only one such recitation, even when the same claim includes the introductory phrases "one or more" or "at least one" and indefinite articles such as "a" or "an" (e.g., “a” and / or “an” should be interpreted to mean “at least one” or “one or more”); the same holds true for the use of definite articles used to introduce claim recitations.

[0226] In addition, even if a specific number of an introduced claim recitation is explicitly recited, those skilled in the art will recognize that such recitation should be interpreted to mean at least the recited number (e.g., the bare recitation of "two recitations," without other modifiers, means at least two recitations, or two or more recitations). Furthermore, in those instances where a convention analogous to “atleast one of A, B, and C, etc." or "one or more of A, B, and C, etc." is used, in general such a construction is intended to include A alone, B alone, C alone, A and B together, A and C together, B and C together, or A, B, and C together, etc.

[0227] Further, any disjunctive word or phrase presenting two or more alternative terms, whether in the description, claims, or drawings, should be understood to contemplate the possibilities of including one of the terms, either of the terms, or both terms. For example, the phrase " A or B" should be understood to include the possibilities of " A" or " B" or " A and B."

[0228] All examples and conditional language recited in the present disclosure are intended for pedagogical objects to aid the reader in understanding the present disclosure and the concepts contributed by the inventor to furthering the art and are to be construed as being without limitation to such specifically recited examples and conditions. Although embodiments of the present disclosure have been described in detail, various changes, substitutions, and alterations could be made hereto without departing from the spirit and scope of the present disclosure.

Claims

We Claim:

1. A method, executed by a processor, comprising:generating a quantum circuit based on an energy operator and a mathematical object, the quantum circuit including a set of first quantum gates;determining first parameters of the set of first quantum gates, based on a classical hardware;determining a precision level associated with the quantum circuit, based on the first parameters;executing a set of first operations based on the precision level, the set of first operations including:adding, to the quantum circuit, a set of second quantum gates including second parameters, based on the precision level, determining first parameter gradients of the set of first quantum gates, based on each of the classical hardware and a quantum hardware;updating the first parameters based on the first parameter gradients, using the classical hardware,determining second parameter gradients of the set of second quantum gates, based on the quantum hardware,updating the second parameters based on the second parameter gradients, using the classical hardware, anddetermining the precision level associated with the quantum circuit, based on the first parameters and the second parameters; andobtaining optimized parameters of the quantum circuit by iteratively executing the set of first operations based on the precision level.

2. The method according to claim 1, the method comprises:determining third parameters of a set of third quantum gates, based on a classical hardware;determining a convergence value associated with the quantum circuit, based on the third parameters;executing a set of second operations based on the convergence value, the set of second operations including:determining fourth parameter gradients of the set of fourth quantum gates, based on the quantum hardware,updating fourth parameters based on the fourth parameter gradients, using the classical hardware,preparing a first quantum state, based on applying the updated fourth parameters,measuring a first expectation value of a Dynamical Lie Algebra (DLA) operator based on the first quantum state,determining third parameter gradients of a set of third quantum gates, based on the first expectation value of the DLA operator using the classical hardware and quantum hardware,updating third parameters based on the third parameter gradients, anddetermining the convergence value, based on the third parameters and the fourth parameters; andobtaining optimized parameters of the quantum circuit by iteratively executing the set of second operations based on the convergence value.

3. The method according to claim 2,receiving the optimized parameters of the quantum circuit by iteratively executing the set of second operations for predetermined iterations;executing a set of third operations based on the convergence value, the set of third operations including:determining fifth parameter gradients for the optimized parameters using the optimized parameters, based on the quantum hardware,updating fifth parameters based on the fifth parameter gradients, determining a second quantum state, based on non-updated fifth parameters,measuring a second expectation value of the DLA operator based on the second quantum state,transmitting the second expectation value of the DLA operator to the classical hardware,determining sixth parameter gradients of a set of sixth quantum gates, based on the transmitted second expectation value,updating sixth parameters based on the sixth parameter gradients, anddetermining the convergence value, based on the fifth parameters and the sixth parameters; andobtaining optimized parameters of the quantum circuit by iteratively executing the set of third operations based on the convergence value.

4. The method according to claim 1, wherein the set of second quantum gates correspond to Hardware-Efficient Ansatz (HEA) gates including a YZ linear ansatz.

5. The method according to claim 1, wherein each quantum gate of the quantum circuit includes a corresponding trainable parameter of the first parameters or the second parameters.

6. The method according to claim 1, wherein the energy operator corresponds to a Hamiltonian operator.

7. The method according to claim 1, wherein the mathematical object corresponds to a Quantum operator associated with a DLA.

8. The method according to claim 1, wherein the parameter gradient determination, based on the quantum hardware uses a Parameter-Shift Rule (PSR) technique.

9. The method according to claim 1, wherein the classical hardware and the quantum hardware use a g-sim technique.

10. The method according to claim 1, wherein the first parameters are different from the second parameters.

11. A non-transitory computer-readable storage medium configured to store instructions that, in response to being executed, causes an electronic device to perform operations, the operations comprising:generating a quantum circuit based on an energy operator and a mathematical object, the quantum circuit including a set of first quantum gates;determining first parameters of the set of first quantum gates, based on a classical hardware;determining a precision level associated with the quantum circuit, based on the first parameters;executing a set of first operations based on the precision level, the set of first operations including:adding, to the quantum circuit, a set of second quantum gates including second parameters, based on the precision level, determining first parameter gradients of the set of first quantum gates, based on each of the classical hardware and a quantum hardware;updating the first parameters based on the first parameter gradients, using the classical hardware,determining second parameter gradients of the set of second quantum gates, based on the quantum hardware,updating the second parameters based on the second parameter gradients, using the classical hardware, anddetermining the precision level associated with the quantum circuit, based on the first parameters and the second parameters; and obtaining optimized parameters of the quantum circuit by iteratively executing the set of first operations based on the precision level.

12. The non-transitory computer-readable storage medium according to claim 11, wherein the set of second quantum gates correspond to Hardware-Efficient Ansatz (HEA) gates including a YZ linear ansatz.

13. The non-transitory computer-readable storage medium according to claim 11, wherein each quantum gate of the quantum circuit includes a corresponding trainable parameter of the first parameters or the second parameters.

14. The non-transitory computer-readable storage medium according to claim 11, wherein the mathematical object corresponds to a Quantum operator associated with a DLA.

15. The non-transitory computer-readable storage medium according to claim 11, wherein the parameter gradient determination, based on the quantum hardware uses a Parameter-Shift Rule (PSR) technique.

16. The non-transitory computer-readable storage medium according to claim 11, wherein the classical hardware and the quantum hardware use a g-sim technique.

17. An electronic device, comprising:a memory configured to store instructions; anda processor, coupled to the memory, configured to execute the instructions to perform a process comprising:generating a quantum circuit based on an energy operator and a mathematical object, the quantum circuit including a set of first quantum gates;determining first parameters of the set of first quantum gates, based on a classical hardware;determining a precision level associated with the quantum circuit, based on the first parameters;executing a set of first operations based on the precision level, the set of first operations including:adding, to the quantum circuit, a set of second quantum gates including second parameters, based on the precision level, determining first parameter gradients of the set of first quantum gates, based on each of the classical hardware and a quantum hardware;updating the first parameters based on the first parameter gradients, using the classical hardware,determining second parameter gradients of the set of second quantum gates, based on the quantum hardware, updating the second parameters based on the second parameter gradients, using the classical hardware, and determining the precision level associated with the quantum circuit, based on the first parameters and the second parameters; andobtaining optimized parameters of the quantum circuit by iteratively executing the set of first operations based on the precision level.

18. The electronic device according to claim 17, wherein the mathematical object corresponds to a Quantum operator associated with a DLA.

19. The electronic device according to claim 17, wherein the parameter gradient determination, based on the quantum hardware uses a Parameter-Shift Rule (PSR) technique.

20. The electronic device according to claim 17, wherein the classical hardware and the quantum hardware use a g-sim technique.

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