Display apparatus and driving method therefor

Abstract

Provided in the present application are a display apparatus and a driving method therefor. The display apparatus comprises a plurality of sub-pixels, a plurality of data lines, and a plurality of first control circuits corresponding to the plurality of sub-pixels. When the absolute value of the difference between two grayscale values of a sub-pixel in two adjacent frames is less than or equal to a first preset difference, corresponding first control circuits are used for controlling, in the latter one of the two adjacent frames, a corresponding data line to electrically disconnect from the sub-pixel.

Description

Display device and driving method thereof

[0001] This application claims priority to Chinese Patent Application No. 202510087992.4, filed on January 20, 2025, the entire contents of which are incorporated herein by reference. TECHNICAL FIELD

[0002] The present application relates to the technical field of display, in particular to a display device and a driving method thereof. BACKGROUND

[0003] In the environment of static picture, the previously stored data can be remapped to the screen through the PSR (Panel Self-Refresh) technology, so as to alleviate the operation pressure of the GPU (Graphics Processing Unit), thereby achieving the purpose of reducing power consumption.

[0004] However, since the data update is still carried out in the display panel in the PSR technology, the power consumption of the display panel itself is still high. SUMMARY

[0005] The present application aims to provide a display device and a driving method thereof, so as to solve the problem that the power consumption of the display panel itself is still high in the existing static picture.

[0006] In a first aspect, the embodiments of the present application provide a display device, comprising:

[0007] a plurality of sub-pixels;

[0008] a plurality of data lines, the data lines being electrically connected to the corresponding plurality of sub-pixels;

[0009] a plurality of first control circuits corresponding to the plurality of sub-pixels, the first control circuits being configured to control the corresponding sub-pixels and the corresponding data lines to be electrically connected or electrically disconnected;

[0010] When the absolute value of the difference between the two gray scale values of the sub-pixel in the adjacent two frames is less than or equal to a first preset difference, the corresponding first control circuit is configured to control the corresponding data line and the sub-pixel to be electrically disconnected in the later one of the adjacent two frames.

[0011] When the two gray scale values of the sub-pixel in the adjacent two frames are equal, the corresponding first control circuit is configured to control the corresponding data line and the sub-pixel to be electrically disconnected in the later one of the adjacent two frames.

[0012] The control end and the input end of the first control circuit are electrically connected to the corresponding data line, and the output end of the first control circuit is electrically connected to the corresponding sub-pixel.

[0013] The first control circuit is configured to control the electrical connection or disconnection of the corresponding data line and the corresponding sub-pixel according to the data signal transmitted by the data line.

[0014] In a second aspect, the embodiments of the present application provide a display device, comprising:

[0015] A plurality of sub-pixels;

[0016] A plurality of data lines, which are electrically connected to the corresponding plurality of sub-pixels;

[0017] A plurality of first control circuits, which correspond to the plurality of sub-pixels, and are configured to control the electrical connection or disconnection of the corresponding sub-pixel and the corresponding data line;

[0018] When the absolute value of the difference between the two gray scale values of the sub-pixel in the adjacent two frames is less than or equal to a first preset difference, the corresponding first control circuit is configured to control the electrical disconnection of the corresponding data line and the sub-pixel in the later one of the adjacent two frames.

[0019] In a third aspect, the embodiments of the present application further provide a driving method of a display device, comprising:

[0020] Controlling a plurality of data lines to output a plurality of data signals corresponding to a plurality of sub-pixels;

[0021] Judging whether the absolute value of the difference between the two gray scale values of the sub-pixel in the adjacent two frames is less than or equal to a first preset difference;

[0022] When the absolute value of the difference between the two gray scale values of the sub-pixel in the adjacent two frames is less than or equal to the first preset difference, the corresponding first control circuit is configured to control the electrical disconnection of the corresponding data line and the sub-pixel in the later one of the adjacent two frames.

[0023] Beneficial effects: The present application provides a display device and a driving method thereof. The display device comprises a plurality of sub-pixels and a plurality of data lines, which are electrically connected to the corresponding plurality of sub-pixels. A plurality of first control circuits corresponding to the plurality of sub-pixels are provided, and when the absolute value of the difference between the two gray scale values of the sub-pixel in the two adjacent frames is less than or equal to a first preset difference, the corresponding first control circuit is configured for controlling the electrical disconnection of the corresponding data line and the sub-pixel in the later one of two adjacent frames. Thus, the power consumption of the display panel in the display device can be reduced while avoiding the low accuracy of the brightness of the display panel. BRIEF DESCRIPTION OF DRAWINGS

[0024] The present application will be further described below with reference to the accompanying drawings. It should be noted that the accompanying drawings described below are merely for explaining some embodiments of the present application. Those skilled in the art can obtain other drawings based on these drawings without any creative effort.

[0025] Figure 1 is a structural diagram of the display device provided in an embodiment of this application.

[0026] Figures 2 and 3 are circuit diagrams of the pixel circuit and the first control circuit provided in the embodiments of this application, respectively.

[0027] Figure 4 is a block diagram of the source driver provided in an embodiment of this application.

[0028] Figure 5 is a schematic diagram of the signal flow of the display device provided in the embodiment of this application.

[0029] Figure 6 is a flowchart of the driving method of the display device provided in the embodiment of this application. Implementation methods of this application

[0030] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0031] In the description of this application, the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the stated features. In the description of this application, "a plurality of" means two or more, unless otherwise explicitly specified. "Electrical connection" means that the two are connected by a conductor or semiconductor, and that an "electrical connection" can be achieved between the two under external control or under any circumstances, i.e., a current path is formed, and that an "electrical disconnection" can also be achieved between the two under external control.

[0032] In addition, it should be noted that the accompanying drawings only provide structures and steps that are closely related to this application, and omit some details that are not closely related to the application. The purpose is to simplify the drawings and make the application points clear at a glance, rather than indicating that the actual device is exactly the same as the drawings, and it is not intended to limit the actual device.

[0033] This application provides a display device, which may include, but is not limited to, the following embodiments and combinations thereof.

[0034] In some embodiments, as shown in FIG1, the display device 100 includes: a plurality of sub-pixels P; a plurality of data lines 10 electrically connected to the corresponding plurality of sub-pixels P; and a plurality of first control circuits 20 corresponding to the plurality of sub-pixels P, wherein the first control circuits 20 are used to control the corresponding sub-pixel P and the corresponding data line 10 to be electrically connected or electrically disconnected; wherein, when the absolute value of the difference between two grayscale values ​​of the sub-pixel P in two adjacent frames is less than or equal to a first preset difference, the corresponding first control circuit 20 is used to control the corresponding data line 10 to be electrically disconnected from the sub-pixel P in the later of the two adjacent frames.

[0035] The display device 100 is, but is not limited to, an organic self-emissive display device, an inorganic self-emissive direct-view display device, or a liquid crystal display device. As shown in Figure 1, taking the arrangement of multiple sub-pixels P as an example, the display device 100 may also include multiple gate lines 30, multiple pixel circuits 40 corresponding to the multiple sub-pixels P, a source driver 501 electrically connected to multiple data lines 10, and a gate driver 502 electrically connected to the multiple gate lines 30. The multiple gate lines 30, multiple data lines 10, multiple sub-pixels P, and multiple pixel circuits 40 may be located on a substrate (i.e., the display panel 60 included in the display device 100). The gate driver 502 may be a gate driving circuit located on the substrate of the display device 100 or a chip independently of the substrate (the figure only illustrates the former case). The figure only uses a liquid crystal display device as an example, meaning that the sub-pixels P may include corresponding pixel electrodes.

[0036] Specifically, each sub-pixel P is electrically connected to the corresponding pixel circuit 40, and each gate line 30 is electrically connected to the multiple pixel circuits 40 corresponding to the multiple sub-pixels P in the corresponding row, and outputs the corresponding gate signal gate to them. Under normal circumstances, in each frame, the gate signal gate includes a gate pulse p for controlling the multiple pixel circuits 40 to turn on. The multiple row pixel circuits 40 are turned on sequentially under the control of the multiple gate pulses p in the multiple gate signals gate. Each data line 10 is electrically connected to the multiple pixel circuits 40 corresponding to the multiple sub-pixels P in the corresponding column to output the corresponding data signal data. The multiple data signals data corresponding to the multiple columns of sub-pixels P are set to transmit the corresponding multiple valid data voltages to the multiple sub-pixels P in the corresponding row through the multiple data lines 10 when each row of sub-pixels P is turned on.

[0037] Understandably, this embodiment sets up multiple first control circuits 20 corresponding to multiple sub-pixels P. When the absolute value of the difference between the two grayscale values ​​of sub-pixel P in two adjacent frames is less than or equal to a first preset difference, that is, when the grayscale value of sub-pixel P changes little in two adjacent frames, the corresponding first control circuit 20 controls the corresponding data line 10 to be electrically disconnected from sub-pixel P in the latter of the two adjacent frames. That is, the sub-pixel P no longer acquires the corresponding effective data voltage in the latter of the two adjacent frames, so that the potential of the corresponding node of the corresponding pixel circuit 40 is maintained at the original potential and is no longer updated by the new effective data voltage. This avoids the pixel circuit 40 from refreshing the effective data voltage again and generating corresponding power consumption. Furthermore, the brightness value of sub-pixel P changes little in two adjacent frames. Therefore, directly maintaining the brightness of the previous frame as the brightness of the later frame will not significantly reduce the accuracy of the brightness of sub-pixel P in the later frame. Thus, while reducing the power consumption of the display panel 60 in the display device 100, it can also avoid the display panel 60 having low brightness accuracy.

[0038] The first preset difference can be set based on the difference between the two grayscale values ​​corresponding to the brightness change of the sub-pixel P in two adjacent frames, which can be recognized by the human eye. For example, the first preset difference can be 0, that is, when the two grayscale values ​​of the sub-pixel P do not change in two adjacent frames. Alternatively, the first preset difference can also be 1, 2, 3 or other small integers, that is, when the change in the two grayscale values ​​of the sub-pixel P in two adjacent frames is small, the corresponding first control circuit 20 controls the corresponding data line 10 to be electrically disconnected from the sub-pixel P in the latter of the two adjacent frames.

[0039] Specifically, if the grayscale value of sub-pixel P changes little within consecutive frames, the first control circuit 20 can control the sub-pixel P to be electrically disconnected from the corresponding data line 10 from the second frame to the last frame, so as to maintain the brightness of the sub-pixel P basically consistent with the brightness of the first frame.

[0040] Specifically, for data line 10, within a frame, the effective data voltage corresponding to the portion of sub-pixels P that are still electrically connected to the data line 10 among the multiple sub-pixels P in the corresponding column can be output in a timing sequence, while the effective data voltage corresponding to the portion of sub-pixels P that are electrically disconnected from the data line 10 can not be output, for example, it can be replaced by invalid data voltage and output, or it can still output the corresponding effective data voltage.

[0041] In some embodiments, as shown in FIG1, when the two grayscale values ​​of the sub-pixel P are equal in two adjacent frames, the corresponding first control circuit 20 is used to control the corresponding data line 10 to be electrically disconnected from the sub-pixel P in the later one of the two adjacent frames.

[0042] That is, in this embodiment, only when the grayscale value of sub-pixel P does not change in the two adjacent frames, the sub-pixel P is controlled to no longer acquire the corresponding valid data voltage in the latter of the two adjacent frames, so as to maintain the brightness of the former frame. This brightness is also the same as the brightness required to be presented in the former frame. Therefore, while reducing the power consumption of the display panel in the display device 100, the low accuracy of the brightness of the display panel can be further avoided.

[0043] In some embodiments, as shown in Figures 1 to 3, the control terminal 011 and input terminal 012 of the first control circuit 20 are both electrically connected to the corresponding data line 10, and the output terminal 013 of the first control circuit 20 is electrically connected to the corresponding sub-pixel P; wherein, the first control circuit 20 is used to control the corresponding data line 10 to be electrically connected or electrically disconnected from the corresponding sub-pixel P according to the data signal data transmitted by the data line 10.

[0044] Specifically, the data signal data includes multiple data voltages to be transmitted to multiple sub-pixels P in the corresponding column. The display device 100 also includes the aforementioned source driver 501, which is electrically connected to multiple data lines 10. When the absolute value of the difference between two grayscale values ​​of the sub-pixel P in two adjacent frames is less than or equal to the first preset difference, the source driver 501 is used to control the data voltage corresponding to the sub-pixel P in the later one of the two adjacent frames to be a first control voltage (referred to as an invalid data voltage). The corresponding first control circuit 20 is used to control the corresponding data line 10 to be electrically disconnected from the sub-pixel P according to the first control voltage.

[0045] Conversely, when the absolute value of the difference between the two grayscale values ​​of the sub-pixel P in two adjacent frames is greater than the first preset difference, the source driver 501 is used to control the data voltage corresponding to the sub-pixel P in the later one of the two adjacent frames to be the effective data voltage, and the corresponding first control circuit 20 is used to control the corresponding data line 10 to be electrically connected to the sub-pixel P according to the effective data voltage.

[0046] Specifically, when the pixel circuit 40 of the row where the sub-pixel P is located is turned on in the next frame, if the grayscale value of the sub-pixel P changes little between the two adjacent frames, then the data voltage of the data signal data is invalid. The first control circuit 20 controls the sub-pixel P to be electrically disconnected from the data line 10 based on the invalid data voltage at this time. Therefore, the sub-pixel P remains in the state of being affected by the valid data voltage of the previous frame. If the grayscale value of the sub-pixel P changes significantly between the two adjacent frames, then the data voltage of the data signal data is valid. The first control circuit 20 can control the sub-pixel P to be electrically connected to the data line 10 based on the valid data voltage at this time. Therefore, the sub-pixel P becomes the state of being affected by the valid data voltage of the next frame.

[0047] Understandably, in this embodiment, the data signal data transmitted by the data line 10 is set to act on the first control circuit 20 to control the data line 10 to be electrically connected or electrically disconnected from the corresponding sub-pixel P. This realizes the multiplexing of the data signal data transmitted by the data line 10, avoids setting up additional lines to transmit new signals to act on the control terminal of the first control circuit 20, and saves costs.

[0048] Of course, in other embodiments, each data signal data includes multiple data voltages that can be valid data voltages. An additional signal can be set to control the first control circuit 20. It is only necessary to ensure that when the grayscale value of the sub-pixel P changes little between two adjacent frames, the additional signal can control the potential of the corresponding node of the corresponding pixel circuit 40 to remain at the original potential through the first control circuit 20 and not be updated by the new valid data voltage. This can also avoid the pixel circuit 40 from refreshing the valid data voltage again and generating corresponding power consumption.

[0049] In some embodiments, as shown in Figures 1 to 3, the display device 100 further includes: a plurality of gate lines 30 as described above, the gate lines 30 being electrically connected to a corresponding plurality of sub-pixels P; a plurality of pixel circuits 40 as described above, corresponding to a plurality of sub-pixels P, the pixel circuit 40 including at least a driving transistor Td, the gate of the driving transistor Td being electrically connected to a corresponding gate line 30; wherein, the first control circuit 20 includes at least a first control transistor T1, the gate of the first control transistor T1 being electrically connected to a corresponding data line 10, and the first control transistor T1 and the driving transistor Td being connected in series between the corresponding data line 10 and the corresponding sub-pixel P.

[0050] Taking the display panel 60 as an example of a liquid crystal display, the pixel circuit 40 may also include a storage capacitor C formed between the sub-pixel P and the common electrode (not shown). The storage capacitor C can maintain the original voltage when the voltage of the sub-pixel P is not refreshed.

[0051] The gate of the first control transistor T1 can be directly or indirectly electrically connected to the corresponding data line 10. Figure 3 illustrates only the indirect connection, meaning the gate of the first control transistor T1 also needs to be electrically connected to the data line 10 through other components. Of course, if the characteristics of the first control transistor T1 are properly configured, it can also be directly electrically connected to the data line 10. In this case, the valid data voltage and invalid data voltage in the data signal data need to be able to control the first control transistor T1 to turn on and off, respectively.

[0052] The driving transistor Td is controlled by the gate signal gate transmitted by the corresponding gate line 30. When the gate pulse p in the gate signal gate appears, the driving transistor Td is turned on. Furthermore, the first control transistor T1 is turned on or off to control the electrical connection or disconnection between the data line 10 and the corresponding sub-pixel.

[0053] Therefore, in this embodiment, the first control transistor T1 and the driving transistor Td are connected in series between the corresponding data line 10 and the corresponding sub-pixel P. Based on the gate signal gate transmitted by the gate line 30 controlling the driving transistors Td of multiple sub-pixels P in a row to be turned on, the first control transistor T1 in the first control circuit 20 can further control each driving transistor Td to be directly electrically connected or electrically disconnected from the corresponding sub-pixel P, thereby controlling whether each sub-pixel P in the row is electrically connected to the corresponding data line 10.

[0054] It should be noted that in this embodiment, there is no limitation on which of the first control transistor T1 and the driving transistor Td is directly electrically connected to the data line 10 and which is directly electrically connected to the sub-pixel P. Figure 3 only shows that the first control transistor T1 is directly electrically connected to the sub-pixel P and the driving transistor Td is directly electrically connected to the data line 10, but the electrical connection positions of the two can also be replaced.

[0055] In some embodiments, as shown in Figures 1 to 3, the first control circuit 20 further includes: a first control unit 201, wherein the control terminal 021 of the first control unit 201 is electrically connected to the control terminal 011 of the first control circuit 20 to obtain a data signal data, the first input terminal 0221 of the first control unit 201 is electrically connected to a first voltage line to obtain a first voltage signal VGL, and the output terminal 023 of the first control unit 201 is electrically connected to the gate of the first control transistor T1 and a second voltage line to obtain a second voltage signal VGH.

[0056] As discussed above, in this embodiment, the gate of the first control transistor T1 is indirectly electrically connected to the corresponding data line 10. Specifically, it is electrically connected to the corresponding data line 10 through the first control unit 201. The first control unit 201 can determine the gate signal of the first control transistor T1 based on the data signal data, the first voltage signal VGL, and the second voltage signal VGH, thereby controlling the first control transistor T1 to be turned on or off. For example, the first voltage signal VGL transmitted by the first voltage line is used to turn off the first control transistor T1, and the second voltage signal VGH transmitted by the second voltage line is used to turn on the first control transistor T1.

[0057] Specifically, as shown in Figure 3, the first control unit 201 includes: a second control transistor T2, the gate of which is electrically connected to the control terminal 021 of the first control unit to obtain a data signal data; one of the source and drain of the second control transistor T2 is electrically connected to the third voltage line to obtain a third voltage signal AVDD; and a third control transistor T3, the gate of the third control transistor T3, the other of the source and drain of the second control transistor T2, and one of the source and drain of the third control transistor T3 are all electrically connected to the first voltage line to obtain a first voltage signal VGL; the other of the source and drain of the third control transistor T3 is electrically connected to the gate of the first control transistor T1. The third voltage line is electrically connected to the second input terminal 0222 of the first control unit 201.

[0058] For example, as shown in Figure 3, the source of the second control transistor T2 is loaded with a third voltage signal AVDD, the drain of the second control transistor T2 and the source and gate of the third control transistor T3 are both loaded with a first voltage signal VGL, the drain of the third control transistor T3 is electrically connected to the gate of the first control transistor T1, the source of the driving transistor Td is electrically connected to the corresponding data line 10, the drain of the driving transistor Td is electrically connected to the source of the first control transistor T1, and the drain of the first control transistor T1 is electrically connected to the sub-pixel P.

[0059] In this embodiment, the first voltage signal VGL, the second voltage signal VGH, and the third voltage signal AVDD can all be constant voltage signals. The amplitude relationship between the three signals and the types of the multiple control transistors are not limited in this embodiment, but it should be understood that these two aspects need to be configured in a related manner. Of course, one of the source and drain terminals of the third control transistor T3 (for example, the source) can also be electrically connected to a different voltage line than the first voltage line to obtain a voltage signal different from the first voltage signal VGL.

[0060] To facilitate the explanation of the working principle of the first control circuit 20, Figure 3 only shows the case where the amplitudes of the third voltage signal AVDD and the second voltage signal VGH are greater than the amplitude of the first voltage signal VGL. The relationship between the amplitudes of the two is not limited. The first control transistor T1, the second control transistor T2, and the third control transistor T3 can all be N-type transistors as an example.

[0061] When the gate signal gate controls the multiple driving transistors Td of the corresponding row to be turned on, if the grayscale value of at least one sub-pixel P in this row changes little or no compared to the previous frame, its corresponding data voltage is invalid data voltage. The amplitude of the invalid data voltage (for example, its amplitude is the same as the amplitude of the second voltage signal VGH) and the amplitude of the third voltage signal AVDD can control the second control transistor T2 to be turned on; therefore, the third voltage signal AVDD is transmitted to the gate of the third control transistor T3, so that the potential of the gate of the third control transistor T3 is pulled up from the potential close to the first voltage signal VGL to the potential close to the third voltage signal AVD. The potential of D is turned on, and the third control transistor T3 is turned on; therefore, the first voltage signal VGL is transmitted to the gate of the first control transistor T1, so that the potential of the gate of the first control transistor T1 is pulled down from the potential close to the potential of the second voltage signal VGH to the potential close to the potential of the first voltage signal VGL, and then the first control transistor T1 is turned off; even if multiple driving transistors Td in this row are turned on at this time, the voltage loaded on at least one sub-pixel P corresponding to at least one first control transistor T1 in the off state will not be refreshed by the current invalid data voltage, and thus the corresponding liquid crystal molecules maintain the angle deflected in the previous frame and maintain the previous brightness.

[0062] When the gate signal gate controls the multiple driving transistors Td of the corresponding row to be turned on, if the grayscale value of at least one sub-pixel P in this row changes significantly compared to the previous frame, its corresponding data voltage is the effective data voltage. The amplitude of the effective data voltage and the amplitude of the third voltage signal AVDD can control the second control transistor T2 to be turned off. Therefore, the potential of the gate of the third control transistor T3 is close to the potential of the first voltage signal VGL, and thus the third control transistor T3 is turned off. Therefore, the first voltage signal VGL cannot be transmitted to the gate of the first control transistor T1, and the potential of the gate of the first control transistor T1 is close to the potential of the second voltage signal VGH, and thus the first control transistor T1 is turned on. Therefore, the current effective data voltage is transmitted to the corresponding at least one sub-pixel P, so that the voltage loaded on it is refreshed to the current effective data voltage, and thus the corresponding liquid crystal molecules deflect at the corresponding angle, presenting the corresponding brightness.

[0063] In some embodiments, as shown in Figures 1 to 4, the source driver 501 includes: a plurality of selection units 5011 corresponding to a plurality of data lines 10; wherein, when the absolute value of the difference between two grayscale values ​​of the sub-pixel P in two adjacent frames is less than or equal to the first preset difference, the selection unit 5011 is used to control the corresponding data line 10 to be electrically connected to a grayscale line 701 for transmitting a grayscale voltage (i.e., the above-mentioned effective data voltage) corresponding to the grayscale value in the latter of the two adjacent frames; when the absolute value of the difference between two grayscale values ​​of the sub-pixel P in two adjacent frames is greater than the first preset difference, the selection unit 5011 is used to control the corresponding data line 10 to be electrically connected to a first control line voltage line 702 for transmitting the first control voltage (i.e., the above-mentioned invalid data voltage) in the latter of the two adjacent frames.

[0064] Specifically, as shown in Figure 4, the first input terminal of the selection unit 5011 is electrically connected to the grayscale line, the second input terminal of the selection unit 5011 is electrically connected to a control line voltage line, and the output terminal of the selection unit 5011 is electrically connected to the corresponding data line 10. The source driver 501 may further include a subtractor and a comparator. The subtractor can calculate the difference between two grayscale values ​​of the same subpixel P in two adjacent frames or the difference between two corresponding effective data voltages. The comparator can output a corresponding result signal based on the relationship between the aforementioned difference and the corresponding first preset difference or voltage preset difference. Furthermore, this result signal can act on the selection unit 5011 to control the selection unit 5011 to electrically connect the data line 10 to the grayscale line 701 or the first control line voltage line 702.

[0065] Therefore, in this embodiment, by setting multiple selection units 5011 in the source driver 501, the corresponding data line 10 can be controlled to select the output of valid data voltage or invalid data voltage according to the change of the gray level value of the corresponding sub-pixel P relative to the previous frame when outputting each data voltage. That is, the corresponding data voltage is selectively output for each row of sub-pixels P.

[0066] In some embodiments, as shown in Figures 1 and 5, the display device 100 further includes: a plurality of gate lines 30 as described above, the gate lines 30 being electrically connected to a plurality of corresponding sub-pixels P; a gate driver 502 as described above, electrically connected to the plurality of gate lines 30; and a plurality of second control circuits 80 corresponding to the plurality of gate lines 30, the second control circuits 80 being used to control the corresponding gate line 30 and the gate driver 502 to be electrically connected or electrically disconnected; wherein, when the absolute value of the difference between the two grayscale values ​​of each sub-pixel P electrically connected to the gate line 30 in two adjacent frames is less than a second preset difference, the corresponding second control circuit 80 is used to control the corresponding gate line 30 to be electrically disconnected from the gate driver 502 in the later of the two adjacent frames.

[0067] The second preset difference can also be set according to the difference between the two grayscale values ​​corresponding to the brightness change of multiple sub-pixels P in the display panel within two adjacent frames, which can be recognized by the human eye. The second preset difference can be the same as or different from the first preset difference.

[0068] Specifically, if the grayscale values ​​of multiple sub-pixels P in the same row change little in two adjacent frames, the second control circuit 80 can control the corresponding gate line 30 to be electrically disconnected from the gate driver 502 in the later frame. That is, the gate line 30 cannot obtain the corresponding gate signal gate, causing the driving transistor Td of the row to be turned off. At this time, the multiple sub-pixels P in the row cannot obtain the corresponding data voltage (regardless of whether the data voltage is valid or invalid). Thus, the brightness of the multiple sub-pixels P in the row is maintained at the brightness of the previous frame, and the potential of the corresponding nodes of the multiple pixel circuits 40 in the corresponding row is also maintained at the original potential and is no longer updated by the new valid data voltage, avoiding the multiple pixel circuits 40 in the corresponding row from refreshing the valid data voltage again and generating corresponding power consumption.

[0069] Specifically, the display device 100 also includes a timing controller 503 electrically connected to the gate driver 502 and the source driver 501 (the source driver 501, gate driver 502, and timing controller 503 can be collectively referred to as driver 50). The timing controller 503 can receive image signals output by the transmitter 902 (which may include, but is not limited to, a graphics processor or a central processing unit), and analyze the image signals in conjunction with its own generated clock signals to obtain multiple frame image signals corresponding to multiple frames. The timing controller 503 can also generate timing control signals. The timing controller 503 can send timing control signals to the gate driver 502, and the gate driver 502 generates multiple gate signals according to the timing control signals. The timing controller 503 can send timing control signals and frame image signals to the source driver 501, and the source driver 501 analyzes the frame image signals according to the timing control signals to generate multiple data signals corresponding to multiple data lines 10.

[0070] As shown in Figure 5, in this application, for a still image (i.e., the absolute value of the difference between the two grayscale values ​​of all rows of sub-pixels P in two adjacent frames is less than the second preset difference), the data transmission link between the transmitter 902 and the driver 50 is closed in the corresponding frame (the transmitter 902 does not output image signals) to save power consumption at the system end. In addition, the gate signal gate output by the gate driver 502 in this frame may include a gate pulse p to turn off all driving transistors Td. By avoiding all pixel circuits 40 from refreshing the effective data voltage again, power consumption at the panel end is saved. If the number of frames of the still image is large, in order to reduce the risk of leakage, the gate driver 502 can use a lower refresh rate than the dynamic image to scan multiple rows of sub-pixels P.

[0071] For ease of description, the display area of ​​the display panel 60 will be divided into 9 areas distributed in a 3*3 pattern, as an example for illustrating the screen update process:

[0072] If the image update is for a partial area (e.g., the area in the first row and the second column), the transmitter 902 can send only the signal of the area to be updated in the image signal (i.e., the signal of the area in the first row and the second column). The corresponding multiple second control circuits 80 can control the gate driver 502 to be electrically connected to the gate line 30 corresponding to the area to be updated, so as to turn on the multiple driving transistors Td of the corresponding row. Only the multiple first control circuits 20 of the corresponding columns of the area to be updated control the first control transistors T1 of the columns to be turned on, so that the multiple sub-pixels P of the corresponding columns can obtain the updated multiple valid data voltages. The multiple first control circuits 20 of the columns of other areas control the first control transistors T1 of the columns to be turned off, thereby saving power consumption at the panel end by avoiding the pixel circuits 40 of the columns of other areas from refreshing the data voltage again.

[0073] If the entire area of ​​the screen is to be updated, the transmitter 902 needs to send the complete image signal, and all the second control circuits 80 control the gate driver 502 to be electrically connected between all the gate lines 30 to turn on the multiple driving transistors Td of all rows one by one. All the first control circuits 20 control all the first control transistors T1 to be turned on so that each sub-pixel P can obtain the updated valid data voltage.

[0074] As shown in Figure 1, the second control circuit 80 may include a fourth control transistor T4. The control terminal of the fourth control transistor T4 may be electrically connected to the timing controller 503 to obtain a corresponding second control signal. The second control signal may be generated by the timing controller 503 based on the image signal it receives. For example, when the timing controller 503 receives a complete image signal, each second control signal generated may control each fourth control transistor T4 to be turned on. Or, when the timing controller 503 receives an incomplete image signal, it may parse the area of ​​screen update corresponding to the incomplete image signal to generate multiple second control signals. The multiple second control signals corresponding to the area of ​​screen update may control the multiple fourth control transistors T4 to be turned on, while the multiple second control signals of other areas may control the multiple fourth control transistors T4 to be turned off.

[0075] Of course, unlike the embodiment shown in Figure 1, in other embodiments, it is not necessary to set up the above-mentioned multiple second control circuits 80. Instead, the gate driver 502 can be directly set to have the following function: when the absolute value of the difference between the two gray levels of each sub-pixel P electrically connected to the gate line 30 in two adjacent frames is less than a second preset difference, the gate driver 502 is used to control the gate signal gate transmitted to the corresponding gate line 30 in the later one of the two adjacent frames, excluding the corresponding gate pulse p.

[0076] That is, the gate driver 502 can control whether each of its multiple output gate signals includes the corresponding gate pulse p, thereby controlling whether the corresponding row drive transistor Td is turned on. Specifically, the cascading function in the gate driver 502 can be retained, but the multiple output functions in the gate driver 502 corresponding to multiple gate lines 30 can be modified to output or not output the corresponding gate pulse p.

[0077] To better illustrate the above-described display device, this application also provides a driving method for the display device, as shown in FIG6. The method may include, but is not limited to, the following steps and combinations thereof.

[0078] S1 controls multiple data lines to output multiple data signals corresponding to multiple sub-pixels.

[0079] As discussed above, each data line 10 is electrically connected to the multiple pixel circuits 40 corresponding to the multiple sub-pixels P in the corresponding column to output the corresponding data signal data. The multiple data signals data corresponding to the multiple columns of sub-pixels P are set to be the multiple effective data voltages of the multiple sub-pixels P in the corresponding row when each row of sub-pixels P is turned on.

[0080] S2, determine whether the absolute value of the difference between the two grayscale values ​​of the sub-pixel in two adjacent frames is less than or equal to a first preset difference.

[0081] As discussed above, when the absolute value of the difference between the two grayscale values ​​of sub-pixel P in two adjacent frames is greater than the first preset difference, it indicates that the difference between the two grayscale values ​​of sub-pixel P in two adjacent frames is large. At this time, the corresponding first control circuit 20 controls the corresponding data line 10 to be electrically connected to the sub-pixel P in the later frame of the two adjacent frames, so that the corresponding data voltage needs to be transmitted to the sub-pixel P in the later frame.

[0082] When the absolute value of the difference between the two grayscale values ​​of the sub-pixel in two adjacent frames is less than or equal to the first preset difference, the following is executed:

[0083] S3, the first control circuit controls the corresponding data line to be electrically disconnected from the sub-pixel in the later of two adjacent frames.

[0084] As discussed above, when the absolute value of the difference between the two grayscale values ​​of sub-pixel P in two adjacent frames is less than or equal to the first preset difference, it indicates that the difference between the two grayscale values ​​of sub-pixel P in two adjacent frames is small. At this time, the corresponding first control circuit 20 controls the corresponding data line 10 to be electrically disconnected from the sub-pixel P in the later frame of the two adjacent frames, so that the sub-pixel P maintains the data voltage of the previous frame in the later frame.

[0085] Specifically, in step S3, the transmitter 902 can send only the signal of the area that needs to be updated in the image signal (which may be the entire image signal or a part of the image signal). The timing controller 503 can control the driving transistor Td of each row to be turned on or off according to the received entire image signal or part of the image signal through the gate driver 502 or multiple second control circuits 80. The source driver 501 controls the first control transistor T1 of each column to be turned on or off through the first control circuit 20, thereby locking the area that needs to be updated and turning on only the multiple driving transistors Td and the first control transistor T1 in that area, so that only the pixel circuit 40 in that area refreshes the effective data voltage again, while the pixel circuits 40 in other areas are avoided from refreshing the effective data voltage. This reduces the power consumption of the display panel 60 and avoids low accuracy of the brightness of the display panel 60.

[0086] It should be noted that the gate driver 502, timing controller 503, source driver 501, selection unit 5011, transmitter 902, driver 50, etc. mentioned in this application can actually be composed of at least one transistor device, and may also include at least one of capacitors and resistors, as well as wires electrically connected between different components. For specific configuration details, please refer to the above discussion.

[0087] The structure of a display device and its driving method provided in the embodiments of this application has been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the technical solutions and core ideas of this application. Those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. These modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A display device, wherein, include: Multiple sub-pixels; Multiple data lines, wherein the data lines are electrically connected to the corresponding multiple sub-pixels; Multiple first control circuits, corresponding to multiple sub-pixels, are used to control the corresponding sub-pixel and the corresponding data line to be electrically connected or electrically disconnected; Wherein, when the absolute value of the difference between the two grayscale values ​​of the sub-pixel in two adjacent frames is less than or equal to a first preset difference, the corresponding first control circuit is used to control the corresponding data line to be electrically disconnected from the sub-pixel in the latter of the two adjacent frames. Wherein, when the two grayscale values ​​of the sub-pixel are equal in two adjacent frames, the corresponding first control circuit is used to control the corresponding data line to be electrically disconnected from the sub-pixel in the latter of the two adjacent frames. The control terminal and input terminal of the first control circuit are electrically connected to the corresponding data line, and the output terminal of the first control circuit is electrically connected to the corresponding sub-pixel. The first control circuit is used to control the corresponding data line to be electrically connected or electrically disconnected from the corresponding sub-pixel according to the data signal transmitted by the data line.

2. The display device as claimed in claim 1, wherein, Also includes: Multiple gate lines, wherein the gate lines are electrically connected to the corresponding multiple sub-pixels; Multiple pixel circuits, corresponding to multiple sub-pixels, each pixel circuit including at least a driving transistor, the gate of which is electrically connected to a corresponding gate line; The first control circuit includes at least a first control transistor, the gate of which is electrically connected to the corresponding data line, and the first control transistor and the driving transistor are connected in series between the corresponding data line and the corresponding sub-pixel.

3. The display device as claimed in claim 2, wherein, The first control circuit further includes: The first control unit has its control terminal electrically connected to the control terminal of the first control circuit, its first input terminal electrically connected to the first voltage line, and its output terminal electrically connected to the gate of the first control transistor and the second voltage line.

4. The display device as claimed in claim 3, wherein, The first voltage signal transmitted by the first voltage line is used to turn off the first control transistor, and the second voltage signal transmitted by the second voltage line is used to turn on the first control transistor.

5. The display device as claimed in claim 3 or 4, wherein, The first control unit includes: The second control transistor has its gate electrically connected to the control terminal of the first control unit, and one of its source and drain is electrically connected to the third voltage line. The third control transistor, the gate of the third control transistor, the other of the source and drain of the second control transistor, and the source and drain of the third control transistor are all electrically connected to the first voltage line, and the other of the source and drain of the third control transistor is electrically connected to the gate of the first control transistor.

6. The display device as claimed in claim 1, wherein, The data signal includes multiple data voltages to be transmitted to the multiple sub-pixels, and the display device further includes: The source driver is electrically connected to multiple of the data lines. Wherein, when the absolute value of the difference between the two grayscale values ​​of the sub-pixel in two adjacent frames is less than or equal to the first preset difference, the source driver is used to control the data voltage corresponding to the sub-pixel in the later one of the two adjacent frames to be the first control voltage, and the corresponding first control circuit is used to control the corresponding data line to be electrically disconnected from the sub-pixel according to the first control voltage.

7. The display device as claimed in claim 6, wherein, The source driver includes: Multiple selection units, corresponding to multiple data lines; Wherein, when the absolute value of the difference between the two grayscale values ​​of the sub-pixel in two adjacent frames is less than or equal to the first preset difference, the selection unit is used to control the corresponding data line to be electrically connected to the grayscale line for transmitting the grayscale voltage corresponding to the grayscale value in the later of the two adjacent frames. When the absolute value of the difference between the two grayscale values ​​of the sub-pixel in two adjacent frames is greater than the first preset difference, the selection unit is used to control the corresponding data line to be electrically connected to the first control line voltage line for transmitting the first control voltage in the later of the two adjacent frames.

8. The display device according to any one of claims 1 to 4, 6, and 7, wherein, Also includes: Multiple gate lines, wherein the gate lines are electrically connected to the corresponding multiple sub-pixels; A gate driver, electrically connected to the plurality of said gate lines; Multiple second control circuits, corresponding to multiple gate lines, are used to control the corresponding gate line and the gate driver to be electrically connected or electrically disconnected; Wherein, when the absolute value of the difference between the two grayscale values ​​of each sub-pixel electrically connected by the gate line in two adjacent frames is less than a second preset difference, the corresponding second control circuit is used to control the corresponding gate line to be electrically disconnected from the gate driver in the latter of the two adjacent frames.

9. A display device, wherein, include: Multiple sub-pixels; Multiple data lines, wherein the data lines are electrically connected to the corresponding multiple sub-pixels; Multiple first control circuits, corresponding to multiple sub-pixels, are used to control the corresponding sub-pixel and the corresponding data line to be electrically connected or electrically disconnected; Wherein, when the absolute value of the difference between the two grayscale values ​​of the sub-pixel in two adjacent frames is less than or equal to a first preset difference, the corresponding first control circuit is used to control the corresponding data line to be electrically disconnected from the sub-pixel in the latter of the two adjacent frames.

10. The display device as claimed in claim 9, wherein, When the two grayscale values ​​of the sub-pixel are equal in two adjacent frames, the corresponding first control circuit is used to control the corresponding data line to be electrically disconnected from the sub-pixel in the latter of the two adjacent frames.

11. The display device as claimed in claim 9, wherein, The control terminal and input terminal of the first control circuit are both electrically connected to the corresponding data line, and the output terminal of the first control circuit is electrically connected to the corresponding sub-pixel; The first control circuit is used to control the corresponding data line to be electrically connected or electrically disconnected from the corresponding sub-pixel according to the data signal transmitted by the data line.

12. The display device as claimed in claim 11, wherein, Also includes: Multiple gate lines, wherein the gate lines are electrically connected to the corresponding multiple sub-pixels; Multiple pixel circuits, corresponding to multiple sub-pixels, each pixel circuit including at least a driving transistor, the gate of which is electrically connected to a corresponding gate line; The first control circuit includes at least a first control transistor, the gate of which is electrically connected to the corresponding data line, and the first control transistor and the driving transistor are connected in series between the corresponding data line and the corresponding sub-pixel.

13. The display device as claimed in claim 12, wherein, The first control circuit further includes: The first control unit has its control terminal electrically connected to the control terminal of the first control circuit, its first input terminal electrically connected to the first voltage line, and its output terminal electrically connected to the gate of the first control transistor and the second voltage line.

14. The display device as claimed in claim 13, wherein, The first voltage signal transmitted by the first voltage line is used to turn off the first control transistor, and the second voltage signal transmitted by the second voltage line is used to turn on the first control transistor.

15. The display device as claimed in claim 13 or 14, wherein, The first control unit includes: The second control transistor has its gate electrically connected to the control terminal of the first control unit, and one of its source and drain is electrically connected to the third voltage line. The third control transistor, the gate of the third control transistor, the other of the source and drain of the second control transistor, and the source and drain of the third control transistor are all electrically connected to the first voltage line, and the other of the source and drain of the third control transistor is electrically connected to the gate of the first control transistor.

16. The display device as claimed in claim 11, wherein, The data signal includes multiple data voltages to be transmitted to the multiple sub-pixels, and the display device further includes: The source driver is electrically connected to multiple of the data lines. Wherein, when the absolute value of the difference between the two grayscale values ​​of the sub-pixel in two adjacent frames is less than or equal to the first preset difference, the source driver is used to control the data voltage corresponding to the sub-pixel in the later one of the two adjacent frames to be the first control voltage, and the corresponding first control circuit is used to control the corresponding data line to be electrically disconnected from the sub-pixel according to the first control voltage.

17. The display device as claimed in claim 16, wherein, The source driver includes: Multiple selection units, corresponding to multiple data lines; Wherein, when the absolute value of the difference between the two grayscale values ​​of the sub-pixel in two adjacent frames is less than or equal to the first preset difference, the selection unit is used to control the corresponding data line to be electrically connected to the grayscale line for transmitting the grayscale voltage corresponding to the grayscale value in the later of the two adjacent frames. When the absolute value of the difference between the two grayscale values ​​of the sub-pixel in two adjacent frames is greater than the first preset difference, the selection unit is used to control the corresponding data line to be electrically connected to the first control line voltage line for transmitting the first control voltage in the later of the two adjacent frames.

18. The display device according to any one of claims 9 to 14, 16, and 17, wherein, Also includes: Multiple gate lines, wherein the gate lines are electrically connected to the corresponding multiple sub-pixels; A gate driver, electrically connected to the plurality of said gate lines; Multiple second control circuits, corresponding to multiple gate lines, are used to control the corresponding gate line and the gate driver to be electrically connected or electrically disconnected; Wherein, when the absolute value of the difference between the two grayscale values ​​of each sub-pixel electrically connected by the gate line in two adjacent frames is less than a second preset difference, the corresponding second control circuit is used to control the corresponding gate line to be electrically disconnected from the gate driver in the latter of the two adjacent frames.

19. The display device according to any one of claims 9 to 14, 16, and 17, wherein, Also includes: Multiple gate lines, wherein the gate lines are electrically connected to the corresponding multiple sub-pixels; A gate driver, electrically connected to the plurality of said gate lines; Wherein, when the absolute value of the difference between the two grayscale values ​​of each sub-pixel electrically connected to the gate line in two adjacent frames is less than a second preset difference, the gate driver is used to control the gate signal transmitted to the corresponding gate line in the later of the two adjacent frames, excluding the corresponding gate pulse.

20. A driving method for a display device, wherein, include: Control multiple data lines to output multiple data signals corresponding to multiple sub-pixels; Determine whether the absolute value of the difference between the two grayscale values ​​of the sub-pixel in two adjacent frames is less than or equal to a first preset difference; When the absolute value of the difference between the two grayscale values ​​of the sub-pixel in two adjacent frames is less than or equal to the first preset difference, the data line corresponding to the sub-pixel is electrically disconnected in the latter of the two adjacent frames by the first control circuit.

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