Photovoltaic cell, module and system

Abstract

The present disclosure is applicable to the technical field of solar cells, and provides a photovoltaic cell, module and system. The back surface of a silicon wafer comprises first morphology regions and second morphology regions; all of the first morphology regions and the second morphology regions are polished surfaces; and the longest diagonal length of the largest first pyramid base in the first morphology regions is smaller than the longest diagonal length of the largest second pyramid base in the second morphology regions.

Description

Photovoltaic cells, modules and systems

[0001] Cross-references to related applications

[0002] This disclosure claims priority to Chinese Patent Application No. 202510059390.8, filed on January 14, 2025, entitled “A Back Contact Solar Cell, Photovoltaic Module and Photovoltaic System”, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This disclosure relates to the field of solar cell technology, specifically to a back-contact solar cell, photovoltaic module, and photovoltaic system. Background Technology

[0004] Interdigitated back contact (IBC) solar cells, also known as interdigitated back contact cells, have both positive and negative electrode grids located on the back of the cell. This completely eliminates the shading of the metal grids on the front surface, preventing optical losses caused by grid obstruction. Furthermore, the electrode grids can be designed to be wider than existing types, reducing series resistance losses and significantly improving cell conversion efficiency. Additionally, the absence of electrode grids on the front results in a more aesthetically pleasing product, making it suitable for various applications.

[0005] In the prior art, the entire P-type or N-type region of the back contact solar cell is usually a polished surface with the same morphology, which results in a low bifaciality of the back contact solar cell. However, if the P-type and N-type regions are directly made into a textured surface, although the bifaciality of the cell can be improved, it will lead to a large recombination loss on the back side and affect the passivation effect on the back side, which will reduce the cell efficiency. Therefore, it is difficult to improve the bifaciality while maintaining a small recombination loss on the back side of the cell. Summary of the Invention

[0006] This disclosure provides a back-contact solar cell, which aims to solve the problem that existing back-contact solar cells are difficult to improve bifaciality while maintaining a small recombination loss on the back side of the cell.

[0007] This disclosure provides a back-contact solar cell, including a silicon wafer. The back side of the silicon wafer includes a plurality of first regions, which are P-type regions or N-type regions. At least one first region includes a first morphology region and a second morphology region, both of which are polished surfaces.

[0008] The first morphological region includes several first bases, and the second morphological region includes several second bases. The longest diagonal length of the largest first base in the first morphological region is less than the longest diagonal length of the largest second base in the second morphological region.

[0009] The back-contact solar cell disclosed herein comprises at least one first region on the back side of a silicon wafer, including a first topographic region and a second topographic region. Both the first and second topographic regions are polished surfaces. The longest diagonal length of the largest first base in the first topographic region is less than the longest diagonal length of the largest second base in the second topographic region. By reducing the base size of the first topographic region, the roughness of the first topographic region is increased, thereby reducing the light reflectivity on the back side of the silicon wafer and improving the bifaciality of the cell. Moreover, since the first base size of the polished first topographic region is only smaller than the second base size of the second topographic region, the bifaciality of the cell can be improved while maintaining a small recombination loss on the back side, reducing the impact on the passivation effect on the back side. This achieves a balance between the two effects, effectively improving the efficiency of the back side of the cell, increasing the power of the photovoltaic module, and increasing the photovoltaic power generation.

[0010] In some embodiments, the back side of the silicon wafer further includes a plurality of second regions, wherein the first region and the second region are alternately arranged in sequence, and one of the first region and the other of the second region is a P-type region and the other is an N-type region;

[0011] At least one second region includes a third morphological region and a fourth morphological region, both of which are polished surfaces;

[0012] The third morphological region includes several third bases, and the fourth morphological region includes several fourth bases. The longest diagonal length of the largest third base in the third morphological region is less than the longest diagonal length of the largest fourth base in the fourth morphological region.

[0013] This disclosure, under the premise of setting a first morphology region in the first region, further sets at least one second region to include a third morphology region and a fourth morphology region, which can further improve the bifaciality of the battery and maintain a low back recombination loss, achieving a balance between the two effects. This can further improve the back efficiency of the battery, increase the power of the photovoltaic module, and increase the photovoltaic power generation.

[0014] In some embodiments, the first region is a P-type region and the second region is an N-type region; the longest diagonal length of the largest first base of the first morphological region is greater than the longest diagonal length of the largest third base of the third morphological region.

[0015] The longest diagonal length of the largest first base in the first morphological region of this disclosure is greater than the longest diagonal length of the largest third base in the third morphological region, making the P-type region flatter than the N-type region. This reduces the passivation effect of the first morphological region on the P-type region and ensures good battery efficiency.

[0016] In some embodiments, the area of ​​the first morphological region is less than or equal to the area of ​​the second morphological region.

[0017] This disclosure achieves a balance between the two effects by controlling the area of ​​the first morphology region to be less than or equal to the area of ​​the second morphology region, thereby increasing the back reflectivity of the first region while maintaining a low surface recombination loss in the first region and reducing the impact on the back passivation effect of the first region.

[0018] In some embodiments, the first region is a P-type region, and the total area of ​​the first morphological region accounts for 5% to 50% of the total area of ​​the first region.

[0019] This disclosure reduces the light reflectivity of the back side of the P-type region by controlling the total area of ​​the first morphology region to be 5% to 50% of the total area of ​​the first region, thereby improving the bifaciality of the battery and ensuring that the P-type region has a small surface recombination loss.

[0020] In some embodiments, the second region is an N-type region, and the total area of ​​the third morphological region accounts for 10% to 70% of the total area of ​​the second region.

[0021] This disclosure reduces the light reflectivity of the back side of the second region by controlling the total area of ​​the third morphology region to be 10% to 70% of the total area of ​​the second region, thereby improving the bifaciality of the battery and ensuring that the second region has a small surface recombination loss and a good passivation effect.

[0022] In some embodiments, the sum of the areas of the first morphology region and the third morphology region accounts for 10% to 48% of the back surface area of ​​the silicon wafer.

[0023] This disclosure reduces the light reflectivity of the back surface of the silicon wafer by controlling the sum of the areas of the first morphology region and the third morphology region to account for 10% to 48% of the back surface area of ​​the silicon wafer, thereby improving the bifaciality of the cell and ensuring that the back surface of the silicon wafer has a small surface recombination loss and a good passivation effect, thus achieving a balance between the two effects.

[0024] In some embodiments, the first region is a P-type region and the second region is an N-type region; the area of ​​the first morphology region is smaller than the area of ​​the third morphology region, which can make the surface recombination loss of the P-type region less than that of the N-type region, thereby balancing the passivation performance of the P-type region and further improving battery efficiency.

[0025] In some embodiments, the silicon wafer has an edge region, and the first morphology region and the third morphology region are located in the edge region, which can reduce the recombination loss caused by the first morphology region and the third morphology region, thereby maintaining good cell efficiency.

[0026] In some embodiments, at least one first region includes a plurality of first morphology regions, which are equally spaced within the first region, so that two surfaces with different roughnesses are alternately arranged. The uniform distribution of the plurality of first morphology regions is beneficial to further reduce the surface composite loss of the first region.

[0027] In some embodiments, at least one second region includes a plurality of third morphology regions, which are equally spaced within the second region, so that two surfaces with different roughnesses are alternately arranged. The uniform distribution of the plurality of third morphology regions is beneficial to further reduce the surface composite loss of the second region.

[0028] In some embodiments, the longest diagonal length of the largest first base in the first morphology region is 5–20 μm, and the longest diagonal length of the largest second base in the second morphology region is 10–40 μm. The design of the first and second bases can increase the roughness of the first morphology region, reduce the light reflectivity on the back of the silicon wafer, thereby improving the bifaciality of the cell, and ensure that both the first and second morphology regions have small surface recombination losses, resulting in a better passivation effect.

[0029] In some embodiments, the longest diagonal length of the largest third base in the third morphology region is 3–15 μm, and the longest diagonal length of the largest fourth base in the fourth morphology region is 5–50 μm. This can increase the roughness of the third morphology region, reduce the light reflectivity on the back of the silicon wafer, thereby improving the bifaciality of the cell, and ensure that both the third and fourth morphology regions have small surface recombination losses, resulting in a better passivation effect.

[0030] In some embodiments, the ratio of the longest diagonal length of the largest second base in the second morphology region to the longest diagonal length of the largest first base in the first morphology region is 1.2 to 10. By reasonably controlling the range of the ratio, the diagonal lengths of the first base and the second base are designed in a coordinated manner. This can increase the roughness of the first morphology region, reduce the light reflectivity on the back of the silicon wafer, thereby improving the bifaciality of the cell, and ensure that both the first and second morphology regions have small surface recombination losses, resulting in a better passivation effect.

[0031] In some embodiments, the ratio of the longest diagonal of the largest fourth base in the fourth morphology region to the longest diagonal of the largest third base in the third morphology region is 1.2 to 18. This design, which matches the diagonal lengths of the third and fourth bases, can increase the roughness of the third morphology region, reduce the light reflectivity on the back of the silicon wafer, thereby improving the bifaciality of the cell, and ensure that both the third and fourth morphology regions have small surface recombination losses, resulting in a better passivation effect.

[0032] In some embodiments, the silicon wafer includes a first edge and a second edge disposed opposite to each other along a first direction, a third edge and a fourth edge disposed opposite to each other along a second direction, and a first region and a second region are alternately disposed on the back side of the silicon wafer along the first direction;

[0033] The silicon wafer has a first edge region and a second edge region spaced apart. The first edge is located in the first edge region, and the second edge is located in the second edge region. The first region located in both the first edge region and the second edge region is provided with a first morphology region, and the second region located in both the first edge region and the second edge region is provided with a third morphology region. The first morphology region and the third morphology region are staggered in a second direction, so that the back-side recombination loss of the first morphology region and the third morphology region is uniformly distributed, reducing the impact of surface recombination loss on the battery and improving battery efficiency.

[0034] In some embodiments, at least one first region located in the middle of the silicon wafer is provided with a first morphology region in contact with a third edge, and at least one second region located in the middle of the silicon wafer is provided with a third morphology region in contact with a fourth edge, which can further improve the bifaciality of the battery.

[0035] In some embodiments, the area of ​​the first morphology region near the center of the silicon wafer is smaller than the area of ​​the first morphology region near the edge of the silicon wafer. This can reduce the surface recombination loss in the middle region of the silicon wafer caused by the design of the first morphology region, thereby better balancing the bifaciality of the cell and the surface recombination loss.

[0036] In some embodiments, the area of ​​the third morphology region in the second region near the center of the silicon wafer is smaller than the area of ​​the third morphology region in the second region near the edge of the silicon wafer. This can reduce the surface recombination loss in the middle region of the silicon wafer caused by the design of the third morphology region, thereby better balancing the bifaciality of the cell and the surface recombination loss.

[0037] This disclosure also provides a photovoltaic module, including the aforementioned back-contact solar cell.

[0038] This disclosure also provides a photovoltaic system including the photovoltaic module described above. Attached Figure Description

[0039] Figure 1 is a schematic diagram of the back side of a back-contact solar cell provided in an embodiment of this disclosure;

[0040] Figure 2 is a schematic diagram of the back side of the second type of back-contact solar cell provided in the embodiments of this disclosure;

[0041] Figure 3 is a SEM image of the first morphology region of a back-contact solar cell provided in an embodiment of this disclosure;

[0042] Figure 4 is a SEM image of the second morphology region of a back-contact solar cell provided in an embodiment of this disclosure;

[0043] Figure 5 is a schematic diagram of the back side of the third type of back-contact solar cell provided in the embodiments of this disclosure;

[0044] Figure 6 is a schematic diagram of the back side of the fourth type of back-contact solar cell provided in the embodiments of this disclosure.

[0045] Figure 7 is a SEM image of the third morphology region of a back-contact solar cell provided in an embodiment of this disclosure;

[0046] Figure 8 is a SEM image of the fourth morphology region of a back-contact solar cell provided in an embodiment of this disclosure.

[0047] 1. First region; 2. Second region; 10. Silicon wafer; 101. First edge; 102. Second edge; 103. Third edge; 104. Fourth edge; 11. First morphological region; 12. Second morphological region; 111. First tower base; 121. Second tower base; 21. Third morphological region; 211. Third tower base; 22. Fourth morphological region; 221. Fourth tower base. Detailed Implementation

[0048] To make the objectives, technical solutions, and advantages of this disclosure clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this disclosure.

[0049] This disclosure provides a back-contact solar cell where at least one first region on the back side of a silicon wafer is configured to include a first topographic region and a second topographic region. Both the first and second topographic regions are polished surfaces. The longest diagonal length of the largest first base in the first topographic region is less than the longest diagonal length of the largest second base in the second topographic region. By reducing the base size of the first topographic region, the roughness of the first topographic region is increased, reducing the light reflectivity on the back side of the silicon wafer, thereby improving the bifaciality of the cell. Moreover, since the first base size of the polished first topographic region is only required to be smaller than the second base size of the second topographic region, the bifaciality of the cell can be improved while maintaining a small recombination loss on the back side, reducing the impact on the passivation effect on the back side. This achieves a balance between the two effects, effectively improving the efficiency of the back side of the cell, increasing the power of the photovoltaic module, and increasing photovoltaic power generation.

[0050] Please refer to Figures 1-4. This disclosure provides a back contact solar cell, including a silicon wafer 10. The back side of the silicon wafer 10 includes a plurality of first regions 1. The first regions 1 are P-type regions or N-type regions. At least one first region 1 includes a first morphology region 11 and a second morphology region 12. Both the first morphology region 11 and the second morphology region 12 are polished surfaces.

[0051] The first topographic region 11 includes several first bases 111, and the second topographic region 12 includes several second bases 121. The longest diagonal length L1 of the largest first base 111 in the first topographic region 11 is less than the longest diagonal length L2 of the largest second base 121 in the second topographic region 12.

[0052] In this embodiment, the silicon wafer 10 includes a front side and a back side disposed opposite to each other. The front side is the side facing sunlight when the back-contact solar cell is working, and the back side is the side facing away from sunlight when the back-contact solar cell is working. The back side of the silicon wafer 10 includes a first region 1 of unlimited number, which can be a P-type region or an N-type region. The back side of the silicon wafer 10 also includes a plurality of second regions 2 of unlimited number. The first regions 1 and the second regions 2 are arranged alternately and alternately, with one of the first regions 1 and the other of the second region 2 being a P-type region and the other an N-type region.

[0053] The P-type region is the region where a P-type doped layer is set. The P-type doped layer can be one or a combination of P-type doped polycrystalline silicon, P-type doped amorphous silicon, or P-type doped microcrystalline silicon. The N-type region is the region where an N-type doped layer is set. The N-type doped layer can be one or a combination of N-type doped polycrystalline silicon, N-type doped amorphous silicon, or N-type doped microcrystalline silicon.

[0054] In this embodiment, a passivation film layer is further provided on the back side of the P-type doped layer and the N-type doped layer to further improve the passivation performance of the battery back side.

[0055] As an optional embodiment of this disclosure, the back surface of the silicon wafer 10 includes a plurality of first regions 1, which are sequentially spaced along a first direction X. A first morphology region 11 is disposed within the first region 1 along a second direction Y, with the first direction X perpendicular to the second direction Y. Alternatively, only one of the first regions 1 may include a first morphology region 11 and a second morphology region 12, while the other first regions 1 may only include the second morphology region 12. Conversely, two or more of the first regions 1 may include both a first morphology region 11 and a second morphology region 12, while the other first regions 1 without a first morphology region 11 may only include the second morphology region 12. Figure 1 only illustrates three first regions 1 including both a first morphology region 11 and a second morphology region 12, while the other first regions 1 only include the second morphology region 12. Figure 2 only illustrates four first regions 1 including both a first morphology region 11 and a second morphology region 12, while the other first regions 1 only include the second morphology region 12. In practical applications, the specific location of the first morphological region 11 in the first region 1, the number of the first morphological regions 11, and the area can be flexibly set according to actual needs.

[0056] As an optional embodiment of this disclosure, the first morphological region 11 and the second morphological region 12 are alternately disposed in the first region 1 along the second direction Y, which is more conducive to reducing the recombination loss on the back of the battery. Alternatively, the first morphological region 11 and the second morphological region 12 can also be arranged in an array in the first region 1, which is also conducive to reducing the recombination loss on the back of the battery.

[0057] In this embodiment, both the first morphological region 11 and the second morphological region 12 are polished surfaces. This means that the surfaces of the first morphological region 11 and the second morphological region 12 have a solar reflectivity of over 20%, and both surfaces have a base structure rather than a textured surface. The specific shapes of the first morphological region 11 and the second morphological region 12 are not limited; for example, both can be square, circular, triangular, trapezoidal, polygonal, or irregular.

[0058] This disclosure provides a back-contact solar cell where at least one first region 1 is configured to include a first topographic region 11 and a second topographic region 12. Both the first topographic region 11 and the second topographic region 12 are polished surfaces. The longest diagonal length L1 of the largest first base 111 of the first topographic region 11 is less than the longest diagonal length L2 of the largest second base 121 of the second topographic region 12. That is, by reducing the base size of the first topographic region 11, the longest diagonal length L1 of the largest first base 111 of the first topographic region 11 is made less than the longest diagonal length L2 of the largest second base 121 of the second topographic region 12, thereby increasing the roughness of the first topographic region 11 and reducing... The light reflectivity of the back side of the silicon wafer 10 is improved, thereby increasing the bifaciality of the cell. Moreover, since the first base 111 of the first morphological region 11 with a polished surface only needs to be made smaller, it is not necessary to make the first morphological region 11 with a textured surface. Compared with the textured structure, the first morphological region 11 with a polished surface can keep the first region 1 with a lower recombination loss. While improving the back light reflectivity of the first region 1, the back side of the cell can be kept with a lower recombination loss, reducing the impact on the back passivation effect. Therefore, this disclosure can improve the bifaciality of the cell and keep the back surface of the back contact solar cell with a small recombination loss, achieving a balance between the two effects. It can improve the back efficiency of the cell, increase the power of the photovoltaic module, and increase the power generation.

[0059] In this embodiment of the disclosure, a first morphology region 11 and a second morphology region 12 with two different polished morphologies can be formed in the first region 1 by a wet etching process using an alkaline solution or an acid solution. When using an acid solution for wet etching, corrosive acidic solutions such as hydrofluoric acid or nitric acid can be used, while corrosive alkaline solutions such as potassium hydroxide or sodium hydroxide can be used.

[0060] For example, by simultaneously polishing with an alkaline solution or an acid solution to form a first morphological region 11 and a second morphological region 12, and using a mask to block the first morphological region 11, the corrosion rate of the first morphological region 11 is less than that of the second morphological region 12. As a result, the polishing degree of the first morphological region 11 is less than that of the second morphological region 12. Consequently, the longest diagonal length L1 of the maximum first base 111 of the first morphological region 11 is less than the longest diagonal length L2 of the maximum second base 121 of the second morphological region 12. The roughness of the first morphological region 11 is greater than that of the second morphological region 12, which is more conducive to reducing the reflectivity of sunlight on the back side.

[0061] For example, by controlling the concentration, reaction time, and reaction temperature of the alkaline or acidic solution used for polishing the first morphology region 11 and the second morphology region 12, different tower base morphologies can be formed for the first morphology region 11 and the second morphology region 12. For instance, the wet etching process for the first morphology region 11 uses a potassium hydroxide concentration of 1–3%, an additive concentration of 0.5–1.5%, a reaction temperature of 60–80°C, and a reaction time of 100–400 seconds; the wet etching process for the second morphology region 12 uses a potassium hydroxide concentration of 3–10%, an additive concentration of 0.5–1.5%, a reaction temperature of 70–90°C, and a reaction time of 100–300 seconds.

[0062] Referring to Figures 3 and 4, in this embodiment of the present disclosure, the first base 111 of the first morphological region 11 can be a linear array, which can increase the structural stability of the first morphological region 11; of course, the first base 111 of the first morphological region 11 can also be arranged randomly. The second base 121 of the second morphological region 12 can be a linear array; of course, the second base 121 of the second morphological region 12 can also be arranged randomly.

[0063] In this embodiment of the disclosure, the top view of each first base 111 in the first topographic region 11 is a quadrilateral, an approximate quadrilateral, or a polygon. Each first base 111 may have multiple diagonals, and the lengths of the diagonals of each first base 111 may be equal or different. The top view of each second base 121 in the second topographic region 12 is a quadrilateral, an approximate quadrilateral, or a polygon; each second base 121 may have multiple diagonals, and the lengths of the diagonals of each second base 121 may be the same or different. Generally speaking, the longer the maximum diagonal length of the base, the larger the base area, and the flatter the surface on which the base is located; conversely, the shorter the diagonal length of each base, the smaller the base area, and the rougher the surface on which the base is located.

[0064] In this embodiment of the disclosure, the largest first base 111 of the first topographic region 11 refers to the first base 111 with the largest area within the first topographic region 11; the longest diagonal length L1 of the largest first base 111 of the first topographic region 11 refers to the longest diagonal length of the largest first base 111. The largest second base 121 of the second topographic region 12 refers to the second base 121 with the largest area within the second topographic region 12; the longest diagonal length L2 of the largest second base 121 of the second topographic region 12 refers to the longest diagonal length of the largest second base 121 within the second topographic region 12.

[0065] In this embodiment, the longest diagonal length L1 of the largest first base 111 in the first topographic region 11 is less than the longest diagonal length L2 of the largest second base 121 in the second topographic region 12. This can be understood as the diagonal length of the largest first base 111 within the same unit area of ​​the first topographic region 11 being less than the diagonal length of the largest second base 121 in the second topographic region 12. Alternatively, the longest diagonal length L1 of the largest first base 111 in the entire first topographic region 11 may be less than the longest diagonal length L2 of the largest second base 121 in the entire second topographic region 12, making the first topographic region 11 rougher than the second topographic region 12.

[0066] Of course, the longest side length of the first base 111 can also be compared with the longest side length of the second base 121. That is, the side length of the largest first base 111 in the first morphological region 11 within the same unit area is greater than the side length of the largest first base 111 in the second morphological region 12, which also makes the first morphological region 11 rougher than the second morphological region 12.

[0067] As an embodiment of this disclosure, the area of ​​the first morphological region 11 is less than or equal to the area of ​​the second morphological region 12.

[0068] In this embodiment, by controlling the area of ​​the first morphological region 11 to be less than or equal to the area of ​​the second morphological region 12, the back light reflectivity of the first region 1 is improved while the surface recombination loss of the first region 1 is kept low, thereby reducing the impact on the passivation effect of the back of the first region 1 and further achieving a balance between the two effects.

[0069] As an embodiment of this disclosure, the first region 1 is a P-type region, and the total area of ​​the first morphological region 11 accounts for 5% to 50% of the total area of ​​the first region 1.

[0070] In this embodiment, the total area of ​​the first morphology region 11 is the sum of the areas of all the first morphology regions 11, and the total area of ​​the first region 1 is the sum of the areas of all the first regions 1. In this embodiment, the first region 1 is a P-type region, and the total area of ​​the first morphology region 11 is set to account for only 5% to 50% of the total area of ​​the first region 1. This can control the increase in roughness of 15% to 50% of the area of ​​the P-type region, reduce the light reflectivity on the back side of the P-type region, thereby improving the bifaciality of the battery, and ensure that the P-type region has a small surface recombination loss and a good passivation effect, thus achieving a balance between the two effects.

[0071] The total area of ​​the first morphological region 11 can be any value among 5%, 6%, 7%, 8%, 9%, 10%, 12%, 15%, 19%, 20%, 22%, 25%, 28%, 30%, 32%, 34%, 35%, 39%, 40%, 42%, 45%, 48%, and 50% of the total area of ​​the first region 1.

[0072] Referring to Figures 5-8, as an embodiment of this disclosure, the back side of the silicon wafer 10 further includes a plurality of second regions 2, with the first region 1 and the second region 2 arranged alternately in sequence, one of the first region 1 and the other of the second region 2 being a P-type region and the other being an N-type region;

[0073] At least one second region 2 includes a third morphological region 21 and a fourth morphological region 22, both of which are polished surfaces;

[0074] The third morphological region 21 includes several third bases 211, and the fourth morphological region 22 includes several fourth bases 221. The longest diagonal length L3 of the largest third base 211 in the third morphological region 21 is less than the longest diagonal length L4 of the largest fourth base 221 in the fourth morphological region 22.

[0075] In this embodiment, the first region 1 and the second region 2 are respectively a P-type region and an N-type region, and the first region 1 and the second region 2 are alternately disposed on the back side of the silicon wafer 10 along the first direction.

[0076] In this embodiment, given that the first morphological region is set in the first region 1, at least one second region 2 is further configured to include a third morphological region 21 and a fourth morphological region 22. Both the third morphological region 21 and the fourth morphological region 22 are polished surfaces. The longest diagonal length L3 of the largest third base 211 of the third morphological region 21 is less than the longest diagonal length L4 of the largest fourth base 221 of the fourth morphological region 22. That is, by reducing the base size of the third morphological region 21, the longest diagonal length L3 of the largest third base 211 of the third morphological region 21 is less than... The longest diagonal length L4 of the fourth base 221 in the fourth morphology region 22 increases the roughness of the third morphology region 21, further reducing the light reflectivity on the back side of the silicon wafer 10, thereby further improving the bifaciality of the cell. Moreover, while improving the back light reflectivity of the second region 2, it keeps the recombination loss on the back side of the cell low, reducing the impact on the back passivation effect. This can further improve the bifaciality of the cell and maintain a low back recombination loss, achieving a balance between the two effects. This can further improve the efficiency of the back side of the cell, increase the power of the photovoltaic module, and increase the photovoltaic power generation.

[0077] In this embodiment, the back surface of the silicon wafer 10 includes a number of second regions 2, which is not limited. In some embodiments, the back surface includes multiple second regions 2, which are alternately and alternately disposed on the back surface with the first region 1, and an isolation region may be provided between the second regions 2 and the first region 1. Specifically, only one second region 2 may be configured to include both a third morphological region 21 and a fourth morphological region 22, while the other second regions 2 may only include the fourth morphological region 22. Alternatively, two or more second regions 2 may be configured to include both the third morphological region 21 and the fourth morphological region 22, while the second regions 2 without the third morphological region 21 may only include the fourth morphological region 22.

[0078] As an optional embodiment of this disclosure, the third morphological region 21 and the fourth morphological region 22 are alternately disposed in the second region 2 along the second direction Y, which is more conducive to reducing recombination losses on the back side of the battery. Alternatively, the third morphological region 21 and the fourth morphological region 22 can also be arranged in an array in the second region 2, which is also conducive to reducing recombination losses on the back side of the battery.

[0079] In this embodiment, a third morphology region 21 and a fourth morphology region 22 with two different polished morphologies can be formed in the second region 2 by a wet etching process using an alkaline solution or an acid solution. When using an acid solution for wet etching, corrosive acidic solutions such as hydrofluoric acid or nitric acid can be used, while corrosive alkaline solutions such as potassium hydroxide or sodium hydroxide can be used.

[0080] For example, by simultaneously polishing with an alkaline solution or an acid solution to form a third morphological region 21 and a fourth morphological region 22, and using a mask to block the third morphological region 21, the corrosion rate of the third morphological region 21 is made less than that of the fourth morphological region 22. As a result, the polishing degree of the third morphological region 21 is less than that of the fourth morphological region 22. Consequently, the longest diagonal length L3 of the maximum third base 211 of the third morphological region 21 is less than the longest diagonal length L4 of the maximum fourth base 221 of the fourth morphological region 22. The roughness of the third morphological region 21 is greater than that of the fourth morphological region 22, which is more conducive to reducing the solar reflectivity on the back side.

[0081] For example, by controlling the concentration of the alkaline or acidic solution used for polishing the third morphology region 21 and the fourth morphology region 22, the reaction time, and the reaction temperature can be controlled, and the third morphology region 21 and the fourth morphology region 22 with different tower base morphologies can also be formed.

[0082] As one embodiment of this disclosure, the second region 2 is an N-type region, and the total area of ​​the third morphological region 21 accounts for 10%-70% of the total area of ​​the second region 2.

[0083] In this embodiment, the total area of ​​the third morphology region 21 is the sum of the areas of all third morphology regions 21, and the total area of ​​the second region 2 is the sum of the areas of all second regions 2. In this embodiment, the second region 2 is an N-type region. Setting the total area of ​​the third morphology region 21 to account for 10%-70% of the total area of ​​the second region 2 can control the increase in roughness of 20%-70% of the area of ​​the second region, reduce the light reflectivity on the back side of the second region 2, thereby improving the bifaciality of the battery, and ensure that the second region 2 has a small surface recombination loss and a good passivation effect, achieving a balance between the two effects.

[0084] As an embodiment of this disclosure, the sum of the areas of the first morphological region 11 and the third morphological region 21 accounts for 10% to 48% of the back surface area of ​​the silicon wafer 10.

[0085] In this embodiment, the sum of the areas of the first morphology region 11 and the third morphology region 21 accounts for 10% to 48% of the back surface area of ​​the silicon wafer 10. This can control the roughness of some areas of the first region 1 and the second region 2, reduce the light reflectivity of the back surface of the silicon wafer 10, thereby improving the bifaciality of the battery. It can also ensure that the back surface of the silicon wafer 10 has a small surface recombination loss and a good passivation effect, achieving a balance between the two effects.

[0086] As an embodiment of this disclosure, the first region 1 is a P-type region and the second region 2 is an N-type region; the area of ​​the first morphological region 11 is smaller than the area of ​​the third morphological region 21.

[0087] In this embodiment, since the passivation performance of the P-type doped layer is worse than that of the N-type doped layer, the area of ​​the first morphology region 11 of the P-type region is smaller than the area of ​​the third morphology region 21 of the N-type region. This makes the surface recombination loss of the first morphology region 11 smaller than that of the third morphology region 21, thereby balancing the passivation performance of the P-type and N-type regions and further improving the battery efficiency.

[0088] The ratio of the area of ​​the third morphological region 21 to the area of ​​the first morphological region 11 can be flexibly set. For example, the ratio of the area of ​​the third morphological region 21 to the area of ​​the first morphological region 11 can be 1.2 to 1.5, so that the areas of the first morphological region 11 of the P-type region and the third morphological region 21 of the N-type region are reasonably designed. This can maintain the good passivation performance of the P-type and N-type regions, improve the local roughness of the P-type and N-type regions, reduce the local light reflectivity of the P-type and N-type regions, and thus improve the battery efficiency.

[0089] As one embodiment of this disclosure, the silicon wafer 10 has an edge region, with a first topographic region 11 and a third topographic region 21 located in the edge region, i.e., the first topographic region 11 and the third topographic region 21 are disposed close to the edge of the silicon wafer 10. It is understood that the silicon wafer 10 can be divided into a central region and an edge region surrounding the central region.

[0090] In this embodiment, since the recombination loss at the edge of the silicon wafer 10 is large and the middle region of the silicon wafer 10 is small, the first morphology region 11 and the third morphology region 21 are set at the edge of the silicon wafer 10, which can further reduce the recombination loss caused by the first morphology region 11 and the third morphology region 21, thereby maintaining good battery efficiency.

[0091] As an embodiment of this disclosure, at least one first region 1 includes a plurality of first morphological regions 11, and the plurality of first morphological regions 11 are equally spaced within the first region 1.

[0092] In this embodiment, multiple first morphological regions 11 are equally spaced within the first region 1. The multiple first morphological regions 11 reduce the reflection of sunlight in the first region 1 and increase the absorption of sunlight. The multiple first morphological regions 11 are evenly distributed within the first region 1, forming a structure in which the first morphological regions 11 and the second morphological regions 12 are alternately arranged. This allows for the alternation of two surfaces with different roughnesses. The even distribution of the multiple first morphological regions 11 is beneficial for further reducing the surface composite loss of the first region 1.

[0093] As an embodiment of this disclosure, at least one second region 2 includes a plurality of third morphological regions 21, which are equally spaced within the second region 2.

[0094] In this embodiment, multiple third morphological regions 21 are equally spaced within the second region 2. The multiple third morphological regions 21 reduce the reflection of sunlight in the second region 2 and increase the absorption of sunlight. Furthermore, the multiple third morphological regions 21 are evenly distributed within the second region 2, forming a structure in which the third morphological regions 21 and the fourth morphological regions 22 are alternately arranged. This alternating arrangement of two surfaces with different roughness is beneficial for further reducing the surface composite loss of the second region 2.

[0095] Please refer to Figure 6. As an embodiment of this disclosure, the area of ​​the first morphological region 11 of the first region 1 near the center of the silicon wafer is smaller than the area of ​​the first morphological region 11 of the first region 1 near the edge of the silicon wafer.

[0096] In this embodiment, since the recombination loss at the edge of the silicon wafer 10 is large and the middle region of the silicon wafer 10 is small, the area of ​​the first morphology region 11 of the first region 1 near the center of the silicon wafer 10 is smaller than the area of ​​the first morphology region 11 of the first region 1 near the edge of the silicon wafer 10. This can reduce the recombination loss caused by the design of the first morphology region 11 to the middle region of the silicon wafer 10, thereby better balancing the bifaciality of the cell and the surface recombination loss.

[0097] In actual comparison, any two adjacent first regions 1 can be selected, wherein the area of ​​the first morphological region 11 of the first region 1 closer to the center of the silicon wafer 10 is smaller than the area of ​​the first morphological region 11 of the other first region 1 closer to the edge of the silicon wafer 10.

[0098] As an embodiment of this disclosure, the area of ​​the third morphological region 21 of the second region 2 located near the center of the silicon wafer 10 is smaller than the area of ​​the third morphological region 21 of the second region 2 located near the edge of the silicon wafer 10.

[0099] In this embodiment, since the recombination loss at the edge of the silicon wafer 10 is large and the middle region of the silicon wafer 10 is small, the area of ​​the third morphological region 21 of the second region 2 near the center of the silicon wafer 10 is smaller than the area of ​​the third morphological region 21 of the second region 2 near the edge of the silicon wafer 10. This can reduce the recombination loss caused by the design of the third morphological region 21 to the middle region of the silicon wafer 10, thereby better balancing the bifaciality of the cell and the surface recombination loss.

[0100] In actual comparison, any two adjacent second regions 2 can be selected, wherein the area of ​​the third morphological region 21 of the second region 2 closer to the center of the silicon wafer 10 is smaller than the area of ​​the third morphological region 21 of the other second region 2 closer to the edge of the silicon wafer 10.

[0101] As an embodiment of this disclosure, the silicon wafer 10 includes a first edge 101 and a second edge 102 disposed opposite to each other along a first direction X, a third edge 103 and a fourth edge 104 disposed opposite to each other along a second direction Y, and a first region 1 and a second region 2 are alternately disposed on the back side of the silicon wafer 10 along the first direction X.

[0102] The silicon wafer 10 has a first edge region and a second edge region spaced apart. The first edge 101 is located in the first edge region, and the second edge 102 is located in the second edge region. The first region 1 located in the first edge region and the second edge region is provided with a first morphological region 11. It can be understood that the first region 1 near the first edge 101 and the second edge 102 is provided with a first morphological region 11. The second region 2 located in the first edge region and the second edge region is provided with a third morphological region 21. It can be understood that the second region 2 near the first edge 101 and the second edge 102 is provided with a third morphological region 21, and the first morphological region 11 and the third morphological region 21 are staggered in the second direction Y.

[0103] In this embodiment, a first morphology region 11 is provided near both the first edge and the second edge of the first region 1; a third morphology region 21 is provided near both the first edge and the second edge of the second region 2, and the first morphology region 11 and the third morphology region 21 are staggered in the second direction Y. Since the first morphology region 11 and the third morphology region 21 are staggered in the second direction, the back-side recombination loss of the first morphology region 11 and the third morphology region 21 can be evenly distributed, reducing the impact of recombination loss and improving battery efficiency.

[0104] As an embodiment of this disclosure, at least one first region 1 located in the middle of the silicon wafer 10 is provided with a first morphological region 11 that contacts the third edge 103, and at least one second region 2 located in the middle of the silicon wafer 10 is provided with a third morphological region 21 that contacts the fourth edge 104.

[0105] In this embodiment, a first morphological region 11 and a third morphological region 21 are provided in the middle of the silicon wafer 10, which can further improve the bifaciality of the battery. At the same time, the first morphological region 11 is in contact with the third edge, and the third morphological region 21 is in contact with the fourth edge. This makes the first morphological region 11 of at least one first region 1 in the middle of the silicon wafer 10 and the third morphological region 21 of at least one second region 2 in the middle of the silicon wafer 10 located close to different edges, which can further improve the bifaciality of the battery.

[0106] Please refer to Figures 5-6. As an embodiment of this disclosure, the first region 1 is a P-type region and the second region 2 is an N-type region. The longest diagonal length L1 of the largest first base 111 in the first morphological region 11 is greater than the longest diagonal length L3 of the largest third base 211 in the third morphological region 21.

[0107] In this embodiment, the longest diagonal length L1 of the largest first base 111 in the first topographic region 11 is greater than the longest diagonal length L3 of the largest third base 211 in the third topographic region 21. This allows the size of the first base 111 in the P-type region to be larger than the size of the third base 211 in the N-type region, making the P-type region flatter than the N-type region. This reduces the passivation effect of the first topographic region 11 on the P-type region and ensures good battery efficiency.

[0108] As an embodiment of this disclosure, the longest diagonal length L1 of the largest first base 111 in the first morphological region 11 is 5 to 20 μm, and the longest diagonal length L2 of the largest second base 121 in the second morphological region 12 is 10 to 40 μm.

[0109] In this embodiment, the longest diagonal length L1 of the first tower base 111 is 5-20 μm, and the longest diagonal length L2 of the second tower base 121 is 10-40 μm. The design of the first tower base 111 and the second tower base 121 can increase the roughness of the first morphology region 11, reduce the light reflectivity of the back side of the silicon wafer 10, thereby improving the bifaciality of the battery, and ensure that both the first morphology region 11 and the second morphology region 12 have small surface recombination losses and good passivation effect.

[0110] For example, the longest diagonal length L1 of the largest first base 111 in the first morphological region 11 can be any value among 5μm, 5.5μm, 6μm, 6.2μm, 7μm, 7.5μm, 9μm, 9.6μm, 10μm, 11μm, 13μm, 14μm, 15μm, 16μm, 17μm, 18μm, 19μm, and 20μm; the longest diagonal length L2 of the largest second base 121 in the second morphological region 12 can be 10μm, ... Any value among 2μm, 11μm, 12μm, 12.3μm, 14μm, 14.8μm, 15μm, 16μm, 18μm, 20μm, 22μm, 25μm, 26μm, 27μm, 28μm, 30μm, 32μm, 34μm, 35μm, 37μm, 38μm, 39μm, and 40μm is acceptable, as long as the longest diagonal length L1 of the first base 111 is less than the longest diagonal length L3 of the third base 211.

[0111] As an embodiment of this disclosure, the ratio of the longest diagonal length L2 of the largest second base 121 of the second morphological region 12 to the longest diagonal length of the largest first base 111 of the first morphological region 11 is 1.2 to 10.

[0112] In this embodiment, the ratio of the longest diagonal length L2 of the largest second base 121 of the second morphological region 12 to the longest diagonal length of the largest first base 111 of the first morphological region 11 is 1.2 to 10. By reasonably controlling the range of the ratio, the diagonal lengths of the first base 111 and the second base 121 are designed in a coordinated manner. This can increase the roughness of the first morphological region 11, reduce the light reflectivity of the back side of the silicon wafer 10, thereby improving the bifaciality of the battery, and ensure that both the first morphological region 11 and the second morphological region 12 have small surface recombination losses and good passivation effect.

[0113] As an embodiment of this disclosure, the longest diagonal length L3 of the largest third base 211 in the third morphological region 21 is 3 to 15 μm, and the longest diagonal length L4 of the largest fourth base 221 in the fourth morphological region 22 is 5 to 50 μm.

[0114] In this embodiment, the longest diagonal length L3 of the third base 211 is 3-15 μm, and the longest diagonal length L4 of the fourth base 221 is 5-50 μm. The design of the third base 211 and the fourth base 221 can increase the roughness of the third morphology region 21, reduce the light reflectivity of the back side of the silicon wafer 10, thereby improving the bifaciality of the cell, and ensure that both the third morphology region 21 and the fourth morphology region 22 have small surface recombination losses and good passivation effect.

[0115] For example, the longest diagonal length L3 of the maximum third base 211 of the third morphological region 21 can be any value among 3μm, 3.5μm, 4μm, 5μm, 7μm, 7.5μm, 9μm, 9.2μm, 10μm, 11μm, 13μm, 14μm, and 15μm; the longest diagonal length L4 of the maximum fourth base 221 of the fourth morphological region 22 can be 5μm, 6μm, 8μm, 10μm, 12μm, and 14μm. Any value among 15μm, 16μm, 18μm, 20μm, 22μm, 25μm, 26μm, 27μm, 28μm, 30μm, 32μm, 34μm, 35μm, 37μm, 38μm, 39μm, 40μm, 45μm, 47μm, 48μm, and 50μm is acceptable, as long as the longest diagonal length L3 of the largest third base 211 is less than the longest diagonal length L4 of the largest fourth base 221.

[0116] As an embodiment of this disclosure, the ratio of the longest diagonal of the largest fourth base 221 of the fourth morphological region 22 to the longest diagonal length L3 of the largest third base 211 of the third morphological region 21 is 1.2 to 18.

[0117] In this embodiment, the ratio of the longest diagonal length L4 of the largest fourth base 221 of the fourth morphological region 22 to the longest diagonal length of the largest third base 211 of the third morphological region 21 is 1.2 to 10. By reasonably controlling the range of the ratio, the diagonal lengths of the third base 211 and the fourth base 221 are designed to match, which can increase the roughness of the third morphological region 21, reduce the light reflectivity of the back side of the silicon wafer 10, thereby improving the bifaciality of the cell, and ensure that both the third morphological region 21 and the fourth morphological region 22 have small surface recombination losses and good passivation effect.

[0118] This disclosure also provides a photovoltaic module, which includes the back-contact solar cell described in the above embodiments. It should be noted that this photovoltaic module has the same or similar beneficial effects as the back-contact solar cell, and the related aspects between the two can be referred to each other; to avoid repetition, they will not be repeated here.

[0119] In this embodiment, multiple back-contact solar cells in the photovoltaic module can be connected in series to form a cell string, thereby achieving series current collection and output. For example, the cells can be connected in series by setting solder strips (busbars, interconnecting strips), conductive backplates, etc.

[0120] It is understood that in such embodiments, the photovoltaic module may also include a metal frame, a backsheet, photovoltaic glass, and an encapsulating film. The encapsulating film can be filled between the front and back of the back-contact solar cell, the photovoltaic glass, adjacent cells, etc. As a filler, it can be a transparent colloid with good light transmittance and aging resistance. For example, the encapsulating film can be EVA film or POE film, and the specific choice can be made according to the actual situation, without limitation.

[0121] Photovoltaic glass can be applied to the encapsulating film on the front side of the back-contact solar cell. This photovoltaic glass can be ultra-clear glass, possessing high light transmittance, high transparency, and superior physical, mechanical, and optical properties. For example, ultra-clear glass can achieve a light transmittance of over 92%. It can protect the back-contact solar cell while minimizing impact on its efficiency. Simultaneously, the encapsulating film bonds the photovoltaic glass and the back-contact solar cell together, providing sealing, insulation, and waterproofing / moisture protection for the back-contact solar cell.

[0122] The backsheet can be attached to the encapsulating film on the back of the back-contact solar cell. The backsheet protects and supports the solar cell, providing reliable insulation, water resistance, and aging resistance. Multiple backsheet options are available, typically including tempered glass, acrylic glass, and aluminum alloy TPT composite encapsulating film, etc. The specific choice depends on the specific circumstances and is not limited here. The backsheet, back-contact solar cell, encapsulating film, and photovoltaic glass can be mounted on a metal frame. The metal frame serves as the main external support structure for the entire back-contact photovoltaic module, providing stable support and installation. For example, the back-contact photovoltaic module can be installed at the desired location using the metal frame.

[0123] This disclosure also provides a photovoltaic system, which includes the photovoltaic modules described in the above embodiments. It should be noted that this photovoltaic system has the same or similar beneficial effects as the back-contact solar cell described above, and the related aspects between the two can be referred to each other; to avoid repetition, they will not be repeated here.

[0124] In this embodiment, the photovoltaic system can be applied in photovoltaic power plants, such as ground-mounted power plants, rooftop power plants, and floating power plants. It can also be applied to equipment or devices that utilize solar energy to generate electricity, such as user solar power supplies, solar streetlights, solar cars, and solar buildings. Of course, it is understood that the application scenarios of the photovoltaic system are not limited to these; that is, the photovoltaic system can be applied in all fields that require solar energy to generate electricity. Taking a photovoltaic power generation system network as an example, the photovoltaic system may include a photovoltaic array, a combiner box, and an inverter. The photovoltaic array may be an array combination of multiple back-contact solar photovoltaic modules. For example, multiple back-contact solar photovoltaic modules can form multiple photovoltaic arrays. The photovoltaic array is connected to the combiner box, which can collect the current generated by the photovoltaic array. The collected current flows through the inverter and is converted into AC power required by the mains power grid before being connected to the mains power grid to achieve solar power supply.

[0125] The above are merely preferred embodiments of this disclosure and are not intended to limit this disclosure. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this disclosure should be included within the scope of protection of this disclosure.

Claims

1. A back-contact solar cell, characterized in that, The silicon wafer includes a plurality of first regions on its back side, wherein the first regions are P-type regions or N-type regions, and at least one of the first regions includes a first morphological region and a second morphological region, wherein both the first morphological region and the second morphological region are polished surfaces. The first morphological region includes several first tower bases, and the second morphological region includes several second tower bases. The longest diagonal length of the largest first tower base in the first morphological region is less than the longest diagonal length of the largest second tower base in the second morphological region.

2. The back-contact solar cell according to claim 1, wherein, The back side of the silicon wafer also includes several second regions, and the first region and the second region are arranged alternately in sequence. One of the first region and the second region is a P-type region and the other is an N-type region. At least one of the second regions includes a third morphological region and a fourth morphological region, wherein both the third morphological region and the fourth morphological region are polished surfaces; The third morphological region includes several third tower bases, and the fourth morphological region includes several fourth tower bases. The longest diagonal length of the largest third tower base in the third morphological region is less than the longest diagonal length of the largest fourth tower base in the fourth morphological region.

3. The back-contact solar cell according to claim 2, wherein, The first region is a P-type region, and the second region is an N-type region; the longest diagonal length of the first base in the first morphological region is greater than the longest diagonal length of the third base in the third morphological region.

4. The back-contact solar cell according to claim 1, wherein, The area of ​​the first morphological region is less than or equal to the area of ​​the second morphological region.

5. The back-contact solar cell according to claim 1, wherein, The first region is a P-type region, and the total area of ​​the first morphological region accounts for 5% to 50% of the total area of ​​the first region.

6. The back-contact solar cell according to claim 2, wherein, The second region is an N-type region, and the total area of ​​the third morphological region accounts for 10% to 70% of the total area of ​​the second region.

7. The back-contact solar cell according to claim 2, wherein, The sum of the areas of the first morphological region and the third morphological region accounts for 10% to 48% of the back surface area of ​​the silicon wafer.

8. The back-contact solar cell according to claim 2, wherein, The first region is a P-type region, and the second region is an N-type region; the area of ​​the first morphological region is smaller than the area of ​​the third morphological region.

9. The back-contact solar cell according to claim 2, wherein, The silicon wafer has an edge region, and the first morphological region and the third morphological region are located in the edge region.

10. The back-contact solar cell according to claim 1, wherein, At least one of the first regions includes a plurality of first topographic regions, which are equally spaced within the first region.

11. The back-contact solar cell according to claim 2, wherein, At least one of the second regions includes a plurality of the third morphological regions, which are equally spaced within the second region.

12. The back-contact solar cell according to claim 1, wherein, The longest diagonal length of the first tower base in the first morphological region is 5–20 μm, and the longest diagonal length of the second tower base in the second morphological region is 10–40 μm.

13. The back-contact solar cell according to claim 2, wherein, The longest diagonal length of the largest third tower base in the third morphological region is 3 to 15 μm, and the longest diagonal length of the largest fourth tower base in the fourth morphological region is 5 to 50 μm.

14. The back-contact solar cell according to claim 1, wherein, The ratio of the longest diagonal length of the largest second base in the second morphological region to the longest diagonal length of the largest first base in the first morphological region is 1.2 to 10.

15. The back-contact solar cell according to claim 2, wherein, The ratio of the longest diagonal of the largest fourth base in the fourth morphological region to the longest diagonal of the largest third base in the third morphological region is 1.2 to 18.

16. The back-contact solar cell according to claim 2, wherein, The silicon wafer includes a first edge and a second edge disposed opposite to each other along a first direction, and a third edge and a fourth edge disposed opposite to each other along a second direction. The first region and the second region are alternately disposed on the back side of the silicon wafer along the first direction. The silicon wafer has a first edge region and a second edge region spaced apart. The first edge is located in the first edge region, and the second edge is located in the second edge region. The first region located in both the first edge region and the second edge region is provided with the first morphological region. The second region located in both the first edge region and the second edge region is provided with the third morphological region. The first morphological region and the third morphological region are staggered in the second direction.

17. The back-contact solar cell according to claim 16, wherein, At least one first region located in the middle of the silicon wafer is provided with a first morphology region that contacts the third edge, and at least one second region located in the middle of the silicon wafer is provided with a third morphology region that contacts the fourth edge.

18. The back-contact solar cell according to claim 1, wherein, The area of ​​the first morphological region in the first region near the center of the silicon wafer is smaller than the area of ​​the first morphological region in the first region near the edge of the silicon wafer.

19. The back-contact solar cell according to claim 2, wherein, The area of ​​the third morphological region in the second region near the center of the silicon wafer is smaller than the area of ​​the third morphological region in the second region near the edge of the silicon wafer.

20. A photovoltaic module comprising a back-contact solar cell as described in any one of claims 1 to 19.

21. A photovoltaic system comprising the photovoltaic module as described in claim 20.

Images