Signal transmission method, main control chip, and ranging device

Abstract

The present application relates to the technical field of chips. Disclosed are a signal transmission method, a main control chip, and a ranging device. In the method, a main control chip acquires jump situations of sampling signals generated by means of a receiving chip on a trigger edge of a first clock signal in response to trigger signals of different delays with respect to receiving delays for which the trigger signals are received, that is, when the difference between a second receiving delay corresponding to a second sampling signal and a first receiving delay corresponding to a first sampling signal is greater than half a cycle of the first clock signal, an actual moment at which the receiving chip has received the trigger signal delayed by the second sending delay may fall before the trigger edge of the first clock signal or be located at the edge position of the trigger edge. In this way, the delay for sending a ranging trigger signal can be adjusted to alleviate the problem of sampling jitters occurring when the receiving chip performs sampling on the ranging trigger signal sent by the main control chip, thereby improving the accuracy of time measurement, and thus improving the ranging precision of a ranging device.

Description

Signal transmission method, main control chip and ranging equipment

[0001] This application claims priority to Chinese Patent Application No. 202510088229.3, filed on January 20, 2025, entitled “Signal Transmission Method, Main Control Chip and Ranging Device”, the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of chip technology, and in particular to a signal transmission method, a main control chip, and a ranging device. Background Technology

[0003] Currently, ranging devices such as lidar detect target objects by emitting laser beams. Based on the echo signals reflected from the target objects, precise distance and orientation information of the target objects and / or areas can be calculated. In the process of determining the timing of laser beam transmission and reception for timing purposes, to improve the processing capability of the echo signals, laser beam transmission and reception are controlled by different chips. The main control chip triggers the receiving chip to start timing, forming an asynchronous clock system.

[0004] However, due to the phase uncertainty of asynchronous clocks between different chips or the possible deviation between the actual clock period and the ideal, stable clock period, there may be uncertainty in the arrival time of the clock edge when the main control chip and the receiving chip transmit signals across clock domains. This causes sampling jitter in the receiving chip, affecting the ranging accuracy of the ranging device. Summary of the Invention

[0005] Embodiments of this application provide a signal transmission method, a main control chip, and a ranging device to improve the problem of sampling jitter when the receiving chip samples the signal sent by the main control chip.

[0006] To achieve the above objectives, the embodiments of this application adopt the following technical solutions:

[0007] In a first aspect, this application provides a signal transmission method applied to a ranging device, the ranging device including a main control chip, a receiving chip, and a laser. The method includes: the main control chip sending a first trigger signal to the receiving chip in a first detection cycle, and sending a second trigger signal to the receiving chip in a second detection cycle, wherein the first detection cycle and the second detection cycle are adjacent detection cycles, the first transmission delay corresponding to the first trigger signal is less than the second transmission delay corresponding to the second trigger signal, and the transmission delay is the time difference between the generation of the trigger signal and the transmission of the trigger signal by the main control chip in each detection cycle; the main control chip receiving a first sampling signal and a second sampling signal fed back by the receiving chip, wherein the first sampling signal is the received... The chip generates a sampling signal in response to the first trigger signal at the trigger edge of the first clock signal. The second sampling signal is generated by the receiving chip in response to the second trigger signal at the trigger edge of the first clock signal. In the third detection cycle, the main control chip sends a ranging trigger signal to the receiving chip and the laser according to the second transmission delay. The third transmission delay corresponding to the ranging trigger signal is the sum of the set delay and the second transmission delay. The difference between the second reception delay corresponding to the second sampling signal and the first reception delay corresponding to the first sampling signal is greater than half a cycle of the first clock signal. The reception delay is the time difference between the sampling signal corresponding to the trigger signal sent by the main control chip and the sampling signal corresponding to the trigger signal received in each detection cycle.

[0008] In the signal transmission method provided in this application embodiment, the main control chip acquires the sampling signal generated by the receiving chip in response to trigger signals with different delays at the trigger edge of the first clock signal. Based on the jump of the received sampling signal relative to the receiving delay of the corresponding trigger signal, the main control chip determines the trigger edge region of the first clock signal in the receiving chip. That is, when the difference between the second receiving delay corresponding to the second sampling signal and the first receiving delay corresponding to the first sampling signal is greater than half a period of the first clock signal, the actual time when the receiving chip receives the trigger signal with the second transmission delay may be located at or before the trigger edge of the first clock signal. Therefore, by adjusting the delay of the ranging trigger signal sent by the main control chip to the receiving chip and the laser in each detection cycle, the position of the trigger edge of the first clock signal can be avoided, thereby improving the sampling jitter problem when the receiving chip samples the ranging trigger signal sent by the main control chip. Furthermore, using the above signal transmission method in the ranging device improves the accuracy of time measurement, thereby enhancing the ranging accuracy of the ranging device. It also fully utilizes the existing components in the ranging device, eliminating the need for additional components and reducing manufacturing costs.

[0009] In one possible implementation, the main control chip sends a first trigger signal to the receiving chip in the first detection cycle and sends a second trigger signal to the receiving chip in the second detection cycle, including: the main control chip sends a trigger signal in each detection cycle; the main control chip gradually increases the delay of each sent trigger signal according to a set step size, and sequentially sends multiple trigger signals with different transmission delays to the receiving chip, the multiple trigger signals including at least the first trigger signal and the second trigger signal.

[0010] In this embodiment, during the measurement of the clock deviation between the main control chip and the receiving chip, the delay of each sent trigger signal is gradually increased according to a set step size, so that the main control chip can accurately locate the trigger edge region of the first clock signal in the receiving chip within multiple detection cycles. Thus, by adjusting the delay of the main control chip sending the ranging trigger signal to the receiving chip and the laser in each detection cycle, the position of the trigger edge of the first clock signal can be avoided.

[0011] In one possible implementation, the main control chip sends a trigger signal in each detection cycle, including: the main control chip counts the number of pulses of the second clock signal, and generates a counting signal when the number of pulses of the second clock signal increases by a set number; the main control chip sends a trigger signal in response to the counting signal on the trigger edge of the second clock signal.

[0012] In this embodiment, the counting signal is sampled using a second clock signal, thereby realizing a triggering mechanism based on time quantization (indirectly representing time by the number of clock pulses), which enables the main control chip to issue a trigger signal according to a pre-set time interval (i.e., one detection cycle).

[0013] In one possible implementation, the period of the first clock signal is N times the period of the second clock signal, where N is an integer greater than or equal to 2.

[0014] In this embodiment, since the period of the first clock signal is N times the period of the second clock signal, by precisely setting the number of pulses counted in each detection cycle, the duration of a detection cycle can be controlled more accurately. The duration of a detection cycle can also be easily changed by adjusting the number of counted pulses, thus meeting the requirements of accurate timing coordination between the main control chip and the receiving chip.

[0015] In one possible implementation, the step size is set to be less than or equal to one-quarter of the cycle of the first clock signal.

[0016] In this embodiment, by setting a step size less than or equal to one-quarter of the cycle of the first clock signal, the trigger edge region of the first clock signal in the receiving chip can be accurately located by gradually increasing the delay of each sent trigger signal according to the set step size. The smaller the set step size, the higher the positioning accuracy.

[0017] In one possible implementation, the main control chip sends a ranging trigger signal to the receiving chip and the laser based on the transmission delay of the second trigger signal in the third detection cycle. The period of the third transmission delay, the setting delay, the second transmission delay and the period of the first clock signal satisfy: Delay3=Delay2+(n+1 / 2)T1,0≤n≤T / T1-2;

[0018] Where n is an integer, Delay3 is the third transmission delay, Delay2 is the second transmission delay, (n+1 / 2)T1 is the set delay, T1 is the period of the first clock signal, and T is the duration of each detection period.

[0019] In this embodiment, after the main control chip locates the trigger edge region of the first clock signal and determines the second transmission delay, it can send a ranging trigger signal to the receiving chip and the laser according to the second transmission delay and the set delay, thereby improving the problem of sampling jitter in the receiving chip when sampling the trigger signal after the delay.

[0020] In one possible implementation, the trigger edge is either the rising edge or the falling edge of the first clock signal.

[0021] Secondly, this application provides a main control chip for use in a ranging device. The ranging device includes a receiving chip, a laser, and the main control chip. The main control chip is used to implement the signal transmission method provided in the first aspect and any embodiment above. The main control chip includes: a signal transmitting module, which is used to transmit a first trigger signal to the receiving chip in a first detection cycle and a second trigger signal to the receiving chip in a second detection cycle. The first detection cycle and the second detection cycle are adjacent detection cycles. The first transmission delay corresponding to the first trigger signal is less than the second transmission delay corresponding to the second trigger signal. The transmission delay is the time difference between the generation of the trigger signal and the transmission of the trigger signal by the signal transmitting module in each detection cycle; and a signal receiving module, which is used to receive the first sampled signal fed back by the receiving chip. The signal transmitting module is configured to transmit a ranging trigger signal to the receiving chip and the laser in the third detection cycle according to a second transmitting delay. The third transmitting delay corresponding to the ranging trigger signal is the sum of the set delay and the second transmitting delay. The difference between the second receiving delay corresponding to the second sampling signal and the first receiving delay corresponding to the first sampling signal is greater than half a cycle of the first clock signal. The receiving delay is the time difference between the signal transmitting module transmitting the trigger signal and the signal receiving module receiving the sampling signal corresponding to the trigger signal in each detection cycle.

[0022] Thirdly, this application provides a ranging device, which includes a receiving chip, a laser, and a main control chip provided in the second aspect above; wherein, the main control chip is used to send a ranging trigger signal to the receiving chip and the laser; the receiving chip is used to count the number of pulses of the first clock signal in response to the received ranging trigger signal on the trigger edge of the first clock signal; and the laser is used to emit a laser beam in response to the received ranging trigger signal.

[0023] In one possible implementation, the receiving chip is further configured to stop counting the number of pulses of the first clock signal on the trigger edge of the first clock signal in response to the received laser beam reflected by the target object, and send the ranging signal generated by the counting to the main control chip; the main control chip is configured to determine the relative distance between the ranging device and the target object based on the ranging signal.

[0024] The beneficial effects of the second and third aspects can be referred to the description of the first aspect and any of its implementations, and will not be repeated here. Based on the implementations provided in the above aspects, this application can be further combined to provide more implementations. Attached Figure Description

[0025] Figure 1 is a structural schematic diagram of a ranging device provided in an embodiment of this application;

[0026] Figure 2 is a signal timing diagram of a ranging device provided in an embodiment of this application;

[0027] Figure 3 is a flowchart illustrating a signal transmission method provided in an embodiment of this application;

[0028] Figure 4 is a timing diagram of a trigger signal transmission provided in an embodiment of this application;

[0029] Figure 5 is a timing diagram of the transmission of a ranging trigger signal provided in an embodiment of this application;

[0030] Figure 6 is a flowchart illustrating another signal transmission method provided in an embodiment of this application;

[0031] Figure 7 is a flowchart illustrating another signal transmission method provided in an embodiment of this application;

[0032] Figure 8 is a timing diagram of another trigger signal transmission provided in an embodiment of this application;

[0033] Figure 9 is a schematic diagram of the structure of a main control chip provided in an embodiment of this application;

[0034] Figure 10 is a schematic diagram of another main control chip provided in an embodiment of this application. Detailed Implementation

[0035] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0036] The terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, unless otherwise stated, "a plurality of" means two or more.

[0037] In embodiments of the invention, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, article, or apparatus that includes that element.

[0038] In embodiments of the present invention, the terms "exemplary" or "for example" are used to indicate that something is an example, illustration, or description. Any embodiment or design described as "exemplary" or "for example" in embodiments of the present invention should not be construed as being more preferred or advantageous than other embodiments or designs. Rather, the use of the terms "exemplary" or "for example" is intended to present the relevant concepts in a specific manner.

[0039] The signal transmission method provided in this application embodiment can be applied to ranging devices, as shown in Figure 1, which is a structural schematic diagram of a ranging device 1 provided in this application embodiment. The ranging device 1 in this application embodiment includes at least a main control chip 110, a receiving chip 120, and a laser 130.

[0040] In some embodiments, the ranging device 1 calculates the distance to the target object by measuring the time it takes for the laser beam emitted by the laser 130 to travel from emission to reception of the laser beam reflected from the target object. The ranging device 1 can be applied to fields such as autonomous driving, robotics, and drones, without limitation. When applied to autonomous driving, the vehicle uses the ranging device 1 to scan the surrounding environment and obtain precise distance and angle information, enabling obstacle detection, positioning and navigation, lane recognition, and automatic parking, helping the vehicle perceive its surroundings and make decisions regarding speed, steering, acceleration, and braking. The receiving chip 120 may include at least a photodetector chip, and the ranging device 1 includes, but is not limited to, lidar and laser rangefinders. In other embodiments, the laser 130 in the ranging device 1 can be replaced by an ultrasonic transmitter, electromagnetic wave transmitter, etc., meaning the ranging device 1 can also be ultrasonic radar, millimeter-wave radar, etc., without limitation.

[0041] In this embodiment, the main control chip 110 sends a ranging trigger signal to the receiving chip 120 and the laser 130. The receiving chip 120, in response to the received ranging trigger signal, starts timing at a first time t1, meaning the ranging signal in the receiving chip 120 changes level, for example, from low to high. The laser 130, in response to the received ranging trigger signal, emits a laser beam at the first time t1. After the laser beam emitted by the laser 130 is projected onto the target object, it is reflected back to the receiving chip 120. The receiving chip 120, in response to receiving the laser beam reflected from the target object, stops timing at a second time t2, meaning the ranging signal changes from high to low at the second time t2, and the ranging signal is fed back to the main control chip 110.

[0042] Optionally, after determining the distance between the ranging device 1 and the target object based on the timing result, the receiving chip 120 generates a ranging signal based on the distance information and feeds it back to the main control chip 110. Alternatively, the receiving chip 120 generates a ranging signal based on the timing result and feeds it back to the main control chip 110, and the main control chip 110 determines the distance between the ranging device 1 and the target object based on the ranging signal obtained from the receiving chip 120.

[0043] The receiving chip 120 and the laser 130 may receive the ranging trigger signal at different times. A high-precision measuring instrument can be used to record the time when the ranging trigger signal arrives at the receiving chip 120 and the laser 130. The time difference can be calculated based on the measurement data, and the error between the time when the receiving chip 120 and the laser 130 receive the ranging trigger signal can be compensated through a calibration algorithm to improve the ranging accuracy.

[0044] It is understood that the structure illustrated in this embodiment does not constitute a specific limitation on the ranging device 1. In other embodiments, the ranging device 1 may include more or fewer components than illustrated, or combine some components, or split some components, or have different component arrangements. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

[0045] In this embodiment, the distance between the ranging device 1 and the target object satisfies:

[0046] L = C*(t2-t1) / 2;

[0047] Where L is the distance between the ranging device 1 and the target object, and C is the speed of light.

[0048] When the main control chip 110 and the receiving chip 120 have different clock signals—that is, the first clock signal in the receiving chip 120 and the second clock signal in the main control chip 110 are asynchronous clock signals—when the receiving chip 120 samples the ranging trigger signal sent from the main control chip 110 to the receiving chip 120 based on the first clock signal, the arrival time of the clock edge of the ranging trigger signal in the first clock signal is uncertain due to the phase uncertainty between different clocks or the possible deviation between the actual clock period and the ideal, stable clock period. This results in an uncertain sampling time for the receiving chip 120 to sample the ranging trigger signal using the first clock signal. This uncertainty in sampling time is called sampling jitter. Sampling jitter causes the time data of the first time t1 obtained by the receiving chip 120 in each sampling to not accurately reflect the true value of the actual time t0 at which the receiving chip 120 receives the ranging trigger signal.

[0049] If the actual time t0 at which the receiving chip 120 receives the ranging trigger signal happens to be near the edge of the trigger edge of the first clock signal, since the receiving chip 120 samples the ranging trigger signal at the actual time t0 and then uses the first time t1 when the first clock signal appears as the initial timing time, the uncertainty of the sampling time may cause a timing error of one cycle between the actual time t0 at which the receiving chip 120 receives the ranging trigger signal and the first time t1 when timing begins.

[0050] For example, as shown in Figure 2, which is a signal timing diagram of a ranging device 1 provided in an embodiment of this application. As shown in Figure 2(a), if the trigger edge of the first clock signal is some time after the actual time t0A when the receiving chip 120 receives the ranging trigger signal, the sampled value may be 1. The ranging signal changes from low level to high level at the first time t1A, and the time difference between t1A and t0A is Δt1. As shown in Figure 2(b), if the trigger edge of the first clock signal is some time before the actual time t0B when the receiving chip 120 receives the ranging trigger signal, the sampled value may be 0. The ranging signal changes from low level to high level at the first time t1B, and the time difference between t1B and t0B is Δt2. The time difference between Δt2 and Δt1 is close to one cycle of the first clock signal, that is, the uncertainty of the sampled value may lead to a timing error of one clock cycle.

[0051] Therefore, when the main control chip 110 sends a ranging trigger signal to the receiving chip 120 for signal transmission, a clock cycle jitter may occur when the receiving chip 120 samples the ranging trigger signal. This can lead to a clock cycle timing error at the starting point of the ranging process, resulting in insufficient ranging accuracy when measuring the target object. When the ranging device 1 is applied in the field of autonomous driving, for applications requiring high-precision measurement, such as accurate judgment of obstacle distance in autonomous driving, the accumulation of this ranging error will seriously affect the accuracy of system decisions.

[0052] To address the sampling jitter issue that occurs when signals are transmitted across clock domains between different chips, one method to eliminate sampling jitter is to directly transmit the on-chip clock signal of the main control chip 110 between the main control chip 110 and the receiving chip 120. Specifically, the main control chip 110 directly transmits its internally generated second clock signal to the receiving chip 120, allowing the main control chip 110 and the receiving chip 120 to share the second clock signal. The receiving chip 120 then samples the ranging trigger signal sent from the main control chip 110 to the receiving chip 120 based on the second clock signal, thereby improving the sampling jitter caused by clock differences between the main control chip 110 and the receiving chip 120.

[0053] However, when the on-chip clock signal is transmitted from one chip to another, problems such as clock signal attenuation, reflection, and distortion may occur due to the characteristics of the transmission line. Furthermore, the shorter the wavelength of the clock signal, the more pronounced the transmission line effect becomes. When the operating frequency of the second clock signal in the main control chip 110 is high, for example, exceeding 100MHz, the wavelength of the second clock signal becomes very short. This short wavelength exacerbates problems such as reflection, crosstalk, and attenuation when the second clock signal is transmitted to the receiving chip 120, severely affecting the quality of the second clock signal received by the receiving chip 120. Consequently, accurate clock synchronization cannot be achieved to solve the sampling jitter problem in the receiving chip 120.

[0054] Against this background, this application provides a signal transmission method. During signal transmission between the main control chip 110 and the receiving chip 120, the ranging trigger signal sent by the main control chip 110 is delayed by measuring the clock deviation between the main control chip 110 and the receiving chip 120, thereby improving the problem of sampling jitter in the receiving chip 120 when sampling the delayed ranging trigger signal.

[0055] As shown in Figure 3, which is a flowchart of a signal transmission method provided in an embodiment of this application, the signal transmission method provided in this application includes the following steps S210 to S230.

[0056] S210: The main control chip sends a first trigger signal to the receiving chip in the first detection cycle and sends a second trigger signal to the receiving chip in the second detection cycle.

[0057] The first detection cycle and the second detection cycle are adjacent detection cycles. The first transmission delay corresponding to the first trigger signal is less than the second transmission delay corresponding to the second trigger signal. The transmission delay is the time difference between the main control chip generating the trigger signal and transmitting the trigger signal in each detection cycle. For example, the first transmission delay is the time difference between the main control chip generating the first trigger signal and transmitting the first trigger signal in the first detection cycle, and the second transmission delay is the time difference between the main control chip generating the second trigger signal and transmitting the second trigger signal in the second detection cycle.

[0058] In one implementation, the on-chip clock signals of the main control chip and the receiving chip are preset. The on-chip clock signal of the main control chip is a second clock signal, and the on-chip clock signal of the receiving chip is a first clock signal. The main control chip is used to send a trigger signal in each detection cycle. The duration of one detection cycle is an integer multiple of the period of the first clock signal in the receiving chip, and the period of the first clock signal is N times the period of the second clock signal, where N is an integer greater than or equal to 2. That is, one detection cycle is also an integer multiple of the period of the second clock signal in the main control chip.

[0059] In this embodiment, during the process of measuring the clock deviation between the main control chip and the receiving chip, the main control chip delays the trigger signal generated in each detection cycle and sequentially sends a trigger signal with a different delay duration to the receiving chip in each detection cycle. Thus, multiple trigger signals with different delay durations are sent to the receiving chip in multiple detection cycles. The delay of the multiple trigger signals sent by the main control chip to the receiving chip gradually increases according to a set step size.

[0060] In one embodiment, as shown in FIG4, FIG4 is a timing diagram of a trigger signal transmission provided in an embodiment of the present application.

[0061] For example, when the period of the first clock signal is 4 times the period of the second clock signal, and one detection period is 10 times the period of the first clock signal in the receiving chip, one detection period is 40 times the period of the second clock signal in the main control chip. That is, the main control chip generates and sends a trigger signal to the receiving chip after every 40 pulses of the second clock signal.

[0062] The multiple detection cycles include at least a first detection cycle and a second detection cycle, with the first and second detection cycles being adjacent. The main control chip sends a first trigger signal to the receiving chip during the first detection cycle. The time difference between the moment the main control chip generates the first trigger signal and the moment it sends the first trigger signal after a delay within the first detection cycle is called the first transmission delay Δt3. The main control chip also sends a second trigger signal to the receiving chip during the second detection cycle. The time difference between the moment the main control chip generates the second trigger signal and the moment it sends the second trigger signal after a delay within the second detection cycle is called the second transmission delay Δt4. The first transmission delay Δt3 corresponding to the first trigger signal is less than the second transmission delay Δt4 corresponding to the second trigger signal.

[0063] S220: The main control chip receives the first sampling signal and the second sampling signal fed back by the receiving chip.

[0064] The first sampling signal is a sampling signal generated by the receiving chip in response to the first trigger signal at the trigger edge of the first clock signal, and the second sampling signal is a sampling signal generated by the receiving chip in response to the second trigger signal at the trigger edge of the first clock signal.

[0065] The trigger edge of the first clock signal can be either the rising edge or the falling edge of the first clock signal.

[0066] Optionally, during the measurement of the clock deviation between the main control chip and the receiving chip, the receiving chip is used to receive the trigger signal sent by the main control chip, sample the trigger signal using its on-chip first clock signal, and feed back the sampled signal to the main control chip.

[0067] In one embodiment, after the main control chip sends a first trigger signal to the receiving chip during a first detection cycle, the receiving chip generates a first sampling signal in response to the first trigger signal at the trigger edge of a first clock signal and feeds the first sampling signal back to the main control chip. The main control chip is used to receive the first sampling signal corresponding to the first trigger signal fed back by the receiving chip. The main control chip is also used to send a second trigger signal to the receiving chip during a second detection cycle, after the receiving chip generates a second sampling signal in response to the second trigger signal at the trigger edge of a second clock signal and feeds the second sampling signal back to the main control chip. The main control chip is used to receive the second sampling signal corresponding to the second trigger signal fed back by the receiving chip.

[0068] S230: In the third detection cycle, the main control chip sends a ranging trigger signal to the receiving chip and the laser according to the second transmission delay.

[0069] Among them, the third transmission delay corresponding to the ranging trigger signal is the sum of the set delay and the second transmission delay. The difference between the second receiving delay corresponding to the second sampling signal and the first receiving delay corresponding to the first sampling signal is greater than half a period of the first clock signal. The receiving delay is the time difference between the main control chip sending the trigger signal and receiving the sampling signal corresponding to the trigger signal in each detection cycle.

[0070] Within each detection cycle, the main control chip records the transmission delay of the trigger signal sent to the receiving chip and the transmission time of the trigger signal. The main control chip also records the reception time of the feedback signal corresponding to the trigger signal fed back by the receiving chip, thereby determining the reception delay based on the transmission time of the trigger signal sent to the receiving chip and the reception time of the feedback signal corresponding to the trigger signal fed back by the receiving chip.

[0071] In one embodiment, the main control chip delays the trigger signals generated in each detection cycle and sequentially sends multiple trigger signals with different delay durations to the receiving chip, as well as receives the sampling signals corresponding to each trigger signal fed back by the receiving chip. If the difference between the receiving delay of the sampling signal corresponding to a certain detection cycle and the receiving delay of the sampling signal corresponding to the previous detection cycle is greater than half a cycle of the first clock signal, then the certain detection cycle is designated as the second detection cycle among multiple detection cycles, and the previous detection cycle is designated as the first detection cycle among multiple detection cycles.

[0072] In one implementation, as shown in Figure 4, the main control chip determines the first receiving delay Δt5 corresponding to the first sampled signal based on the transmission time of the first trigger signal sent to the receiving chip within the first detection cycle and the reception time of the first feedback signal corresponding to the first trigger signal fed back by the receiving chip. The main control chip determines the second receiving delay Δt6 corresponding to the second sampled signal based on the transmission time of the second trigger signal sent to the receiving chip within the second detection cycle and the reception time of the second feedback signal corresponding to the second trigger signal fed back by the receiving chip. Since the first transmission delay Δt3 corresponding to the first trigger signal is less than the second transmission delay Δt4 corresponding to the second trigger signal, if the difference between the second receiving delay Δt6 of the second sampled signal corresponding to the second trigger signal and the first receiving delay Δt5 of the first sampled signal corresponding to the first trigger signal is greater than half the period of the first clock signal, it indicates that when the receiving chip receives the first trigger signal, the first trigger signal falls before the trigger edge of the first clock signal, and when the receiving chip receives the second trigger signal, the second trigger signal falls after the trigger edge of the first clock signal.

[0073] For example, if the trigger edge of the first clock signal is the rising edge of the first clock signal, when the moment the trigger signal is received is at the edge of the rising edge of the first clock signal, the sampling signal generated by the receiving chip based on the first clock signal in response to the second trigger signal may be either low or high at that instant. When the main control chip delays the trigger signal generated in each detection cycle by a first transmission delay corresponding to the first trigger signal and sends the delayed trigger signal to the receiving chip, the actual moment the receiving chip receives the trigger signal delayed by the first transmission delay may be at the edge of the falling edge or the rising edge of the first clock signal; when the main control chip delays the trigger signal generated in each detection cycle by a second transmission delay corresponding to the second trigger signal and sends the delayed trigger signal to the receiving chip, the actual moment the receiving chip receives the trigger signal delayed by the second transmission delay may be at the rising edge of the first clock signal or at the edge of the rising edge.

[0074] Based on this, when the trigger edge of the first clock signal is the rising edge of the first clock signal, to ensure that the actual time when the receiving chip receives and samples the delayed trigger signal after the main control chip delays the trigger signal generated in each detection cycle, the receiving chip is located at the falling edge of the first clock signal in each detection cycle, and stably avoids the edge of the rising edge of the first clock signal. Furthermore, the receiving chip sends the sampling signal to the main control chip when the next rising edge arrives. In this way, the reception delay of the sampling signal corresponding to the trigger signal of each detection cycle received by the main control chip is much smaller than the cycle of one first clock signal, improving the sampling jitter problem that occurs when the receiving chip samples the delayed trigger signal. Moreover, since there is no clock signal transmission between the main control chip and the receiving chip, when the operating frequency of the on-chip clock signal in the main control chip or the receiving chip is higher than 100MHz, the solution of this application can still improve the sampling jitter problem that occurs when the receiving chip samples the received signal.

[0075] In one implementation, if the main control chip determines that the difference between the second receiving delay corresponding to the second sampling signal and the first receiving delay corresponding to the first sampling signal is greater than half a period of the first clock signal, then the main control chip sends a ranging trigger signal to the receiving chip and the laser in the third detection period according to the second transmitting delay. The third transmitting delay corresponding to the ranging trigger signal is the sum of the set delay and the second transmitting delay. The third detection period can be any detection period after the second detection period.

[0076] It should be understood that during the measurement of the clock deviation between the main control chip and the receiving chip, the main control chip sends a trigger signal to the receiving chip in each detection cycle. The receiving chip samples the trigger signal using its on-chip first clock signal and feeds back a sampled signal to the main control chip. The sampled signal is used to indicate the sampling time information of the receiving chip in response to the trigger signal based on the first clock signal. After measuring the clock deviation between the main control chip and the receiving chip, during the ranging process, the main control chip sends a ranging trigger signal to the receiving chip and the laser in each detection cycle. The receiving chip starts timing in response to receiving the ranging trigger signal using its on-chip first clock signal and stops timing in response to receiving the laser beam reflected by the target object, feeding back a ranging signal to the main control chip. The ranging signal is used to indicate the timing duration or the distance information between the ranging device and the target object.

[0077] In one possible implementation, the main control chip sends a ranging trigger signal to the receiving chip and the laser based on the transmission delay of the second trigger signal during the third detection cycle. The periods of the third transmission delay, the setting delay, the second transmission delay, and the first clock signal satisfy the following:

[0078] Delay3=Delay2+(n+1 / 2)T1, 0≤n≤T / T1-2;

[0079] Where n is an integer, Delay3 is the third transmission delay, Delay2 is the second transmission delay, (n+1 / 2)T1 is the set delay, T1 is the period of the first clock signal, and T is the duration of each detection period.

[0080] In one possible implementation, the main control chip gradually increases the delay of each transmitted trigger signal according to a set step size over multiple detection cycles, and sequentially sends multiple trigger signals with different transmission delays to the receiving chip. The set step size is less than or equal to one-quarter of the first clock signal cycle; for example, the set step size can be one-quarter, one-fifth, one-sixth, etc., of the first clock signal cycle, without limitation. Furthermore, the set delay can also be greater than or equal to (n+1 / 2)T1 and less than (n+1)T1 - the set step size. For example, when the set step size is one-quarter of the first clock signal cycle, (n+1 / 2)T1 ≤ set delay < (n+3 / 4)T1, without limitation. In this way, after the main control chip delays the ranging trigger signal based on the second transmission delay and the set delay, the sampling delay of the receiving chip after receiving the ranging trigger signal is much less than one cycle of the first clock signal, improving the sampling jitter problem that occurs when sampling the ranging trigger signal in the receiving chip.

[0081] As shown in Figure 5, which is a timing diagram of a ranging trigger signal transmission according to an embodiment of this application, in the third detection cycle, the main control chip sends the ranging trigger signal to the receiving chip after a third transmission delay of Delay3. The third transmission delay of Delay3 is the sum of the second transmission delay of Delay2 and half the period of the first clock signal (i.e., 1 / 2T1). After the receiving chip samples the ranging trigger signal using the first clock signal, the ranging signal generated by the receiving chip changes from low level to high level at the first moment t1. The actual moment t0 when the receiving chip receives the ranging trigger signal and the first moment t1 when the ranging signal starts timing are much smaller than the period of the first clock signal, thereby improving the problem of sampling jitter when the receiving chip samples the ranging trigger signal.

[0082] In this embodiment, the main control chip determines the trigger edge region of the first clock signal in the receiving chip by acquiring the transition of the sampling signal generated by the receiving chip in response to trigger signals with different delays at the trigger edge of the first clock signal. That is, when the difference between the second receiving delay corresponding to the second sampling signal and the first receiving delay corresponding to the first sampling signal is greater than half a period of the first clock signal, the actual time when the receiving chip receives the trigger signal with the second transmission delay may be after the trigger edge of the first clock signal or at the edge of the trigger edge. Therefore, by adjusting the delay of the ranging trigger signal sent by the main control chip to the receiving chip and the laser in each detection cycle, the edge of the trigger edge of the first clock signal can be avoided, thereby improving the sampling jitter problem when the receiving chip samples the ranging trigger signal sent by the main control chip. In addition, the above signal transmission method improves the accuracy of time measurement in the ranging device, thereby improving the ranging accuracy of the ranging device, and makes full use of the original components in the ranging device, eliminating the need for additional components and reducing manufacturing costs.

[0083] In one implementation, referring to Figure 3, the main control chip sequentially sends multiple trigger signals with different transmission delays to the receiving chip, as shown in Figure 6. The main control chip sends a first trigger signal to the receiving chip in the first detection cycle and a second trigger signal to the receiving chip in the second detection cycle, specifically including steps S211 to S212:

[0084] S211: The main control chip sends a trigger signal in each detection cycle.

[0085] In some implementations, the main control chip is used to send a trigger signal in each detection cycle, where a detection cycle is an integer multiple of the period of the first clock signal in the receiving chip. Since the period of the first clock signal is N times the period of the second clock signal in the main control chip, where N is an integer greater than or equal to 2, a detection cycle is also an integer multiple of the period of the second clock signal in the main control chip.

[0086] In one implementation, the main control chip sends a trigger signal in each detection cycle by counting pulses of its on-chip second clock signal. As shown in Figure 7, the main control chip sends a trigger signal in each detection cycle, which may specifically include steps S2111 to S2112:

[0087] S2111: The main control chip counts the number of pulses of the second clock signal and generates a counting signal every time the number of pulses of the second clock signal increases by a set number.

[0088] In this embodiment, the main control chip first generates a second clock signal, which will periodically output pulses at a fixed frequency. The main control chip counts the number of pulses of the second clock signal. When the cumulative count reaches a set number, that is, when the number of pulses of the second clock signal increases by a set number, the main control chip will trigger the corresponding logic circuit to generate a counting signal.

[0089] S2112: The main control chip sends a trigger signal in response to the counting signal on the trigger edge of the second clock signal.

[0090] In this embodiment, the main control chip samples the counting signal using a second clock signal, and sends a trigger signal in response to the counting signal on the trigger edge of the second clock signal. This implements a triggering mechanism based on time quantization (indirectly representing time by the number of clock pulses), enabling the main control chip to issue trigger signals according to a pre-set time interval (i.e., one detection cycle).

[0091] In one implementation, the main control chip is used to count the number of pulses of the second clock signal, and triggers the corresponding logic circuit to directly generate a trigger signal every time the number of pulses of the second clock signal increases by a set number.

[0092] Since the period of the first clock signal is N times the period of the second clock signal in the main control chip, where N is an integer greater than or equal to 2, one detection cycle is a common multiple of the periods of the first and second clock signals. By precisely setting the preset number of pulses, the duration of one detection cycle can be controlled relatively accurately, and the duration of one detection cycle can be easily changed by adjusting the preset number of pulses, thus meeting the requirements for accurate timing coordination between the main control chip and the receiving chip.

[0093] S212: The main control chip gradually increases the delay of each sent trigger signal according to the set step size, and sequentially sends multiple trigger signals with different transmission delays to the receiving chip.

[0094] Among them, the multiple trigger signals include at least a first trigger signal and a second trigger signal.

[0095] In this embodiment, after the main control chip sends a trigger signal in each detection cycle, it is also used to delay the generated trigger signal and gradually increase the delay of each sent trigger signal. The main control chip is also used to send multiple trigger signals with different transmission delays to the receiving chip in sequence.

[0096] In one implementation, the main control chip sequentially sends trigger signals with progressively increasing delays to the receiving chip and receives a sampled signal corresponding to the trigger signal fed back by the receiving chip in each detection cycle. If the difference between the receiving delay of the sampled signal corresponding to the current detection cycle and the receiving delay of the sampled signal corresponding to the previous detection cycle is greater than half a cycle of the first clock signal, then the previous detection cycle is taken as the first detection cycle, and the current detection cycle is taken as the second detection cycle. When the main control chip determines that the current detection cycle is the second detection cycle, it can determine the delay required for the main control chip to output the ranging trigger signal in each detection cycle during the ranging process based on the second transmission delay and the set delay. The main control chip takes the next detection cycle of the current detection cycle as the third detection cycle, and sends the ranging trigger signal to the receiving chip and the laser according to the second transmission delay and the set delay in the third detection cycle, without sending a trigger signal to the receiving chip again.

[0097] In another implementation, as shown in FIG8, FIG8 is a timing diagram of another trigger signal transmission provided in an embodiment of this application. In this embodiment, the main control chip is used to sequentially send trigger signals with gradually increasing delays to the receiving chip within a set number of detection cycles, and to receive the sampling signal corresponding to the trigger signal fed back by the chip in each detection cycle.

[0098] In this case, the main control chip gradually increases the delay of each sent trigger signal according to the set step size. The set step size is less than or equal to one-quarter of the first clock signal cycle. The total delay step size of the trigger signal covers at least one cycle of the first clock signal, that is, the trigger signal needs to be delayed at least four times.

[0099] For example, as shown in Figure 8, if the step size is set to one-quarter of the first clock signal: In the first detection cycle of the set multiple detection cycles, the main control chip does not delay the generated trigger signal, and sends the trigger signal trigA to the receiving chip in the first detection cycle. The main control chip receives the sampling signal generated by the receiving chip in response to the trigger signal trigA at the trigger edge of the first clock signal; In the second detection cycle, the main control chip delays the generated trigger signal by 1 / 4T1, and sends the delayed trigger signal trigB to the receiving chip. The main control chip receives the sampling signal generated by the receiving chip in response to the trigger signal trigB at the trigger edge of the first clock signal; In the third to fifth detection cycles, the main control chip gradually increases the delay of the trigger signal according to the step size of 1 / 4T1, and sends the delayed trigger signals trigC, trigD and trigE to the receiving chip respectively, and receives the sampling signal generated by the receiving chip in response to the trigger signal at the trigger edge of the first clock signal in each detection cycle. If the difference between the reception delay of the sampling signal corresponding to the second detection period and the reception delay of the sampling signal corresponding to the first detection period is greater than half a period of the first clock signal, then the second detection period is taken as the second detection period and the first detection period is taken as the first detection period.

[0100] In this embodiment, after detecting the clock deviation of the main control chip and the receiving chip within a set plurality of detection cycles, the first detection cycle after the set plurality of detection cycles is designated as the third detection cycle. In the third detection cycle, a ranging trigger signal is sent to the receiving chip and the laser according to the second transmission delay and a set delay, but no further trigger signal is sent to the receiving chip. The second transmission delay is the delay of the trigger signal within the second detection cycle determined from the set plurality of detection cycles.

[0101] In one implementation, the clock deviation of the main control chip and the receiving chip is detected within multiple consecutive detection cycles. The average receiving delay between the trigger signal and the sampling signal in detection cycles with the same total delay step size is taken as the receiving delay corresponding to that step size. By comparing the average receiving delay of different total step sizes in consecutive detection cycles, if the difference between the average receiving delay of the sampling signal corresponding to the target step size and the average receiving delay of the sampling signal corresponding to the previous detection cycle is greater than half a cycle of the first clock signal, the total delay step size corresponding to the second detection cycle is determined as the target step size. By detecting clock deviation in multiple consecutive cycles, detection errors can be avoided, the positioning accuracy of the region where the trigger edge of the first clock signal is located can be improved, thereby improving the accuracy of time measurement.

[0102] In this embodiment, during the measurement of the clock deviation between the main control chip and the receiving chip, the delay of each transmitted trigger signal is gradually increased according to a set step size. This allows the main control chip to accurately locate the trigger edge region of the first clock signal in the receiving chip within multiple detection cycles. By adjusting the delay of the ranging trigger signal sent by the main control chip to the receiving chip and the laser in each detection cycle, the position of the trigger edge of the first clock signal can be avoided. Furthermore, by reducing the set step size in the delay process, the positioning accuracy of the region where the trigger edge of the first clock signal is located can be improved, thereby improving the accuracy of time measurement.

[0103] As shown in Figure 9, Figure 9 is a schematic diagram of the structure of a main control chip 110 provided in an embodiment of this application. Referring to Figure 9, the main control chip 110 includes at least a second clock generation circuit 111, a trigger signal generation circuit 112, a phase shifter 113, and a control circuit 114.

[0104] In this embodiment, the trigger signal generation circuit 112 is connected to the second clock generation circuit 111. The second clock generation circuit 111 is used to generate the on-chip second clock signal of the main control chip 110. The trigger signal generation circuit 112 is used to count the number of pulses of the second clock signal. A trigger signal is generated when the number of pulses of the second clock signal increases by a set number. The trigger signal generation circuit 112 may include a counter and a trigger, which are not limited here.

[0105] Optionally, the output of the trigger signal generation circuit 112 is connected to the phase shifter 113, and the control circuit 114 is used to control the phase shifter 113 to gradually increase the delay of each transmitted trigger signal according to a set step size, so that the trigger signal after the delay by the phase shifter 113 is output to the receiving chip 120. The control circuit 114 is also used to record the time of trigger signal generation in each detection cycle and the delay of the trigger signal by the phase shifter 113.

[0106] In one embodiment, the receiving chip 120 includes a first clock generation circuit 121 and a sampling circuit 122. The first clock generation circuit 121 generates an on-chip first clock signal for the receiving chip 120. The sampling circuit 122 in the receiving chip 120 is connected to the first clock generation circuit 121 and the main control chip 110. The sampling circuit 122 receives a trigger signal sent by the main control chip 110, samples the trigger signal using the first clock signal, and feeds back the sampled signal to the main control chip 110. The sampling circuit 122 can be two flip-flops connected in series. By connecting the two flip-flops in series, the trigger signal can be sampled and processed twice, thereby reducing noise and interference in the trigger signal, improving the anti-interference capability of the sampling circuit 122, and increasing the delay time of the sampling circuit 122, allowing the sampled signal more time to stabilize during transmission, thus improving the stability of the sampling circuit 122.

[0107] In this embodiment, the control circuit 114 is also used to acquire the sampling signal corresponding to the trigger signal fed back by the receiving chip 120, and record the time when the sampling signal is received, so as to determine the receiving delay based on the time when the trigger signal is generated within the current detection cycle, the delay of the phase shifter 113 on the trigger signal, and the time when the sampling signal is received. Furthermore, after completing the measurement of the clock deviation between the main control chip 110 and the receiving chip 120, the control circuit 114 is also used to adjust the transmission delay of the ranging trigger signal by the phase shifter 113 when the main control chip 110 sends the ranging trigger signal, so as to improve the sampling jitter problem that occurs when the receiving chip 120 samples the delayed ranging trigger signal.

[0108] In one embodiment, when the trigger signal and the ranging trigger signal are the same signal, the control circuit 114 is also used to connect to the receiving chip 120 to instruct the receiving chip 120 to provide feedback sampling signal / ranging signal based on the signal received from the main control chip 110.

[0109] In one embodiment, when the trigger signal and the ranging trigger signal are different signals, the control circuit 114 is further connected to the trigger signal generation circuit 112 to instruct the trigger signal generation circuit 112 to generate a trigger signal / ranging trigger signal in the current detection cycle. The receiving chip 120 feeds back a sampling signal based on the trigger signal received from the main control chip 110, and the receiving chip 120 feeds back a ranging signal based on the ranging trigger signal received from the main control chip 110.

[0110] As shown in Figure 10, Figure 10 is a schematic diagram of another main control chip 110 provided in an embodiment of this application. Referring to Figure 10, the main control chip 110 includes at least a signal transmitting module 115 and a signal receiving module 116.

[0111] The signal transmitting module 115 is used to transmit a first trigger signal to the receiving chip in the first detection cycle and a second trigger signal to the receiving chip in the second detection cycle. The first detection cycle and the second detection cycle are adjacent detection cycles. The first transmission delay corresponding to the first trigger signal is less than the second transmission delay corresponding to the second trigger signal. The transmission delay is the time difference between the generation of the trigger signal and the transmission of the trigger signal by the signal transmitting module 115 in each detection cycle.

[0112] The signal receiving module 116 is used to receive a first sampling signal and a second sampling signal fed back by the receiving chip. The first sampling signal is a sampling signal generated by the receiving chip in response to the first trigger signal at the trigger edge of the first clock signal, and the second sampling signal is a sampling signal generated by the receiving chip in response to the second trigger signal at the trigger edge of the first clock signal.

[0113] The signal transmitting module 115 is also used to transmit a ranging trigger signal to the receiving chip and the laser according to the second transmitting delay in the third detection cycle. The third transmitting delay corresponding to the ranging trigger signal is the sum of the set delay and the second transmitting delay. The difference between the second receiving delay corresponding to the second sampling signal and the first receiving delay corresponding to the first sampling signal is greater than half a cycle of the first clock signal. The receiving delay is the time difference between the signal transmitting module 115 transmitting the trigger signal in each detection cycle and the signal receiving module 116 receiving the sampling signal corresponding to the trigger signal.

[0114] In one implementation, the signal transmission module 115 includes a trigger signal transmission module 115 and a delay module; wherein, the trigger signal transmission module 115 is used to transmit a trigger signal in each detection cycle; the delay module is used to gradually increase the delay of each transmitted trigger signal according to a set step size, and sequentially transmit multiple trigger signals with different transmission delays to the receiving chip, the multiple trigger signals including at least a first trigger signal and a second trigger signal.

[0115] Optionally, the trigger signal sending module 115 is further configured to: count the number of pulses of the second clock signal, and generate a counting signal when the number of pulses of the second clock signal increases by a set number; and send a trigger signal in response to the counting signal on the trigger edge of the second clock signal.

[0116] In one implementation, the period of the first clock signal is N times the period of the second clock signal, where N is an integer greater than or equal to 2.

[0117] In one implementation, the step size is set to be less than or equal to one-quarter of the cycle of the first clock signal.

[0118] In one implementation, the signal transmitting module 115 is specifically used to transmit a ranging trigger signal to the receiving chip and the laser based on the transmission delay of the second trigger signal during the third detection cycle. The third transmission delay, the setting delay, the second transmission delay, and the period of the first clock signal satisfy the following:

[0119] Delay3=Delay2+(n+1 / 2)T1, 0≤n≤T / T1-2;

[0120] Where n is an integer, Delay3 is the third transmission delay, Delay2 is the second transmission delay, (n+1 / 2)T1 is the set delay, T1 is the period of the first clock signal, and T is the duration of each detection period.

[0121] In one implementation, the trigger edge is either the rising edge or the falling edge of the first clock signal.

[0122] It should be noted that, for the sake of convenience and brevity, the above-described division of functional modules is used as an example. In practical applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above.

[0123] Regarding the apparatus in the above embodiments, the specific manner in which each module performs its operation has been described in detail in the embodiments related to the method, and will not be elaborated upon here.

[0124] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another apparatus, or some features may be ignored or not executed. Furthermore, the mutual coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0125] The units described as separate components may or may not be physically separate. A component shown as a unit can be one or more physical units; that is, it can be located in one place or distributed in multiple different locations. Some or all of the classified units can be selected to achieve the purpose of this embodiment, depending on actual needs.

[0126] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0127] The above are merely specific embodiments of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A signal transmission method, characterized in that, The method is applied to a ranging device, which includes a main control chip, a receiver chip, and a laser. The method includes: The main control chip sends a first trigger signal to the receiving chip in the first detection cycle and sends a second trigger signal to the receiving chip in the second detection cycle. The first detection cycle and the second detection cycle are adjacent detection cycles. The first transmission delay corresponding to the first trigger signal is less than the second transmission delay corresponding to the second trigger signal. The transmission delay is the time difference between the main control chip generating the trigger signal and transmitting the trigger signal in each detection cycle. The main control chip receives a first sampling signal and a second sampling signal fed back by the receiving chip. The first sampling signal is a sampling signal generated by the receiving chip in response to the first trigger signal at the trigger edge of the first clock signal. The second sampling signal is a sampling signal generated by the receiving chip in response to the second trigger signal at the trigger edge of the first clock signal. In the third detection cycle, the main control chip sends a ranging trigger signal to the receiving chip and the laser according to the second sending delay. The third sending delay corresponding to the ranging trigger signal is the sum of the set delay and the second sending delay. The difference between the second receiving delay corresponding to the second sampling signal and the first receiving delay corresponding to the first sampling signal is greater than half a cycle of the first clock signal. The receiving delay is the time difference between the main control chip sending the trigger signal and receiving the sampling signal corresponding to the trigger signal in each detection cycle.

2. The method according to claim 1, characterized in that, The main control chip sends a first trigger signal to the receiving chip in the first detection cycle, and sends a second trigger signal to the receiving chip in the second detection cycle, including: The main control chip sends a trigger signal in each detection cycle; The main control chip gradually increases the delay of each sent trigger signal according to a set step size, and sequentially sends multiple trigger signals with different transmission delays to the receiving chip. The multiple trigger signals include at least the first trigger signal and the second trigger signal.

3. The method according to claim 2, characterized in that, The main control chip sends a trigger signal in each detection cycle, including: The main control chip counts the number of pulses of the second clock signal and generates a counting signal every time the number of pulses of the second clock signal increases by a set number. The main control chip sends a trigger signal in response to the counting signal on the trigger edge of the second clock signal.

4. The method according to claim 3, characterized in that, The period of the first clock signal is N times the period of the second clock signal, where N is an integer greater than or equal to 2.

5. The method according to claim 2, characterized in that, The set step size is less than or equal to one-quarter of the cycle of the first clock signal.

6. The method according to any one of claims 1 to 5, characterized in that, The main control chip sends a ranging trigger signal to the receiving chip and the laser based on the transmission delay of the second trigger signal in the third detection cycle. The period of the third transmission delay, the set delay, the second transmission delay and the first clock signal satisfy: Delay3=Delay2+(n+1 / 2)T1,0≤n≤T / T1-2; Where n is an integer, Delay3 is the third transmission delay, Delay2 is the second transmission delay, (n+1 / 2)T1 is the set delay, T1 is the period of the first clock signal, and T is the duration of each detection period.

7. The method according to any one of claims 1 to 6, characterized in that, The trigger edge is either the rising edge or the falling edge of the first clock signal.

8. A main control chip, characterized in that, The main control chip is applied to a ranging device, which includes a receiver chip, a laser, and the main control chip. The main control chip is used to implement the method according to any one of claims 1 to 7, and the main control chip includes: A signal transmitting module is configured to transmit a first trigger signal to the receiving chip in a first detection cycle and a second trigger signal to the receiving chip in a second detection cycle. The first detection cycle and the second detection cycle are adjacent detection cycles. The first transmission delay corresponding to the first trigger signal is less than the second transmission delay corresponding to the second trigger signal. The transmission delay is the time difference between the generation of the trigger signal and the transmission of the trigger signal by the signal transmitting module in each detection cycle. A signal receiving module is configured to receive a first sampling signal and a second sampling signal fed back by the receiving chip. The first sampling signal is a sampling signal generated by the receiving chip in response to the first trigger signal at the trigger edge of the first clock signal, and the second sampling signal is a sampling signal generated by the receiving chip in response to the second trigger signal at the trigger edge of the first clock signal. The signal transmitting module is further configured to transmit a ranging trigger signal to the receiving chip and the laser in the third detection cycle according to the second transmitting delay. The third transmitting delay corresponding to the ranging trigger signal is the sum of the set delay and the second transmitting delay. The difference between the second receiving delay corresponding to the second sampling signal and the first receiving delay corresponding to the first sampling signal is greater than half a cycle of the first clock signal. The receiving delay is the time difference between the signal transmitting module transmitting the trigger signal in each detection cycle and the signal receiving module receiving the sampling signal corresponding to the trigger signal.

9. A ranging device, characterized in that, The ranging device includes a receiving chip, a laser, and the main control chip as described in claim 8; wherein... The main control chip is used to send ranging trigger signals to the receiving chip and the laser; The receiving chip is used to count the number of pulses of the first clock signal in response to the received ranging trigger signal on the trigger edge of the first clock signal; The laser is used to emit a laser beam in response to the received ranging trigger signal.

10. The ranging device according to claim 9, characterized in that, The receiving chip is also used to stop counting the number of pulses of the first clock signal at the trigger edge of the first clock signal in response to the received laser beam reflected by the target object, and to send the ranging signal generated by the counting to the main control chip. The main control chip is used to determine the relative distance between the ranging device and the target object based on the ranging signal.

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