Semiconductor process device and control method therefor

By configuring multiple alarm types and their corresponding fault-tolerant control operations in semiconductor process equipment, the problem of reduced product quality and production capacity caused by the single fault-tolerant control in the existing technology is solved, and safety and production capacity are improved when alarms occur.

WO2026153164A1PCT designated stage Publication Date: 2026-07-23BEIJING NAURA MICROELECTRONICS EQUIP CO LTD
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Patent Information

Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
BEIJING NAURA MICROELECTRONICS EQUIP CO LTD
Filing Date
2026-01-05
Publication Date
2026-07-23

AI Technical Summary

Technical Problem

The existing fault-tolerant control methods of semiconductor process equipment are too simplistic, resulting in only the current process being stopped when an alarm is triggered, which affects product quality and production capacity.

Method used

In semiconductor process equipment, multiple alarm types and their corresponding fault-tolerant control operations are configured. The target fault-tolerant control operation is determined according to the alarm type, and the equipment is controlled to operate according to the target operation to achieve flexible fault-tolerant control.

Benefits of technology

Flexible fault-tolerant control measures ensured the safety of semiconductor process equipment and product quality during alarms, thereby increasing equipment capacity.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present application provides a semiconductor process device and a control method therefor. During the execution of each process step of a process recipe by the semiconductor process device, if an alarm is generated in a current process step, an alarm type is determined. A plurality of alarm types and a fault-tolerant control operation corresponding to each alarm type are configured in the process recipe. The fault-tolerant control operation is used for representing a remedial measure for ensuring that the semiconductor process device is in a safe state when an alarm occurs. A corresponding target fault-tolerant control operation is determined on the basis of the alarm type, and the semiconductor process device is controlled to operate according to the target fault-tolerant control operation, so as to remedy a product when the alarm occurs, thereby flexibly performing fault-tolerant control by means of the alarm type, and ensuring the product quality and production capacity of the semiconductor process device.
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Description

Semiconductor process equipment and control methods Technical Field

[0001] This application relates to the field of semiconductor technology, and in particular to semiconductor process equipment and control methods thereof. Background Technology

[0002] In the semiconductor industry, semiconductor process equipment such as thermal processing equipment is used for batch processing of products. In practical applications, with the increase in the number of products processed per batch and the rising cost of advanced process integrated circuits, the requirements for the stability and reliability of thermal processing equipment are becoming increasingly stringent. In addition to ensuring the personal safety of operators and the safety of the equipment during operation, fault-tolerant control can maximize the protection of product quality, reduce the probability of product scrap due to equipment failure, and minimize economic losses.

[0003] Fault-tolerant control refers to appropriate emergency handling measures for abnormal equipment conditions (such as alarm occurrences). Since heat treatment processes involve the use of hazardous chemicals in high-temperature, low-pressure process chambers, deviations in any critical process parameters (such as temperature, pressure, and flow rate) can affect process results, cause hazardous accidents, or lead to product scrapping. Therefore, configuring fault-tolerant control for heat treatment equipment and responding appropriately to alarms during operation is of great significance. However, existing fault-tolerant controls are relatively simplistic; when an alarm occurs, they only issue an alarm notification and halt the current process, posing safety hazards. This not only affects process results but also reduces product quality and semiconductor process equipment capacity. Summary of the Invention

[0004] In view of this, the purpose of this application is to provide semiconductor process equipment and control methods thereof to alleviate the problem that existing fault-tolerant control is relatively simple, which reduces the product quality and production capacity of semiconductor process equipment.

[0005] In a first aspect, embodiments of this application provide a semiconductor process equipment control method, the method comprising: during each process step of a process recipe being executed by the semiconductor process equipment, if an alarm is generated in the current process step, determining the alarm type; wherein, the process recipe is configured with multiple alarm types and a fault-tolerant control operation corresponding to each alarm type, the fault-tolerant control operation being used to characterize remedial measures to ensure that the semiconductor process equipment is in a safe state when an alarm occurs; determining the corresponding target fault-tolerant control operation according to the alarm type, and controlling the semiconductor process equipment to operate according to the target fault-tolerant control operation.

[0006] In some embodiments, alarm types include level 1 alarms, level 2 alarms, and level 3 alarms; fault-tolerant control operations include: process stop control operations, process alarm control operations, and alarm notification control operations; the step of determining the corresponding target fault-tolerant control operation based on the alarm type includes: if the alarm type is a level 1 alarm, determining the target fault-tolerant control operation as a process stop control operation; or, if the alarm type is a level 2 alarm, determining the target fault-tolerant control operation as a process alarm control operation; or, if the alarm type is a level 3 alarm, determining the target fault-tolerant control operation as an alarm notification control operation.

[0007] In some embodiments, the process alarm control operation is implemented through a corresponding process alarm recipe. If the target fault-tolerant control operation is a process alarm control operation, the step of controlling the semiconductor process equipment to run according to the target fault-tolerant control operation includes: controlling the semiconductor process equipment to switch from the current process step to execute the process alarm recipe, and when the execution reaches the end step of the process alarm recipe, determining the target mode of the end step; wherein, the target mode includes a first mode and a second mode, the first mode is used to characterize the mode of automatically returning to the process recipe after the process alarm recipe is executed, and the second mode is used to characterize the mode of staying at the end step after the process alarm recipe is executed; controlling the semiconductor process equipment to run according to the target mode to complete the process alarm recipe.

[0008] In some embodiments, the step of controlling the semiconductor process equipment to operate according to a target mode includes: if the target mode is a first mode, controlling the semiconductor process equipment to automatically return to the process recipe after the process alarm recipe is executed, and to run according to the next process step of the current process step.

[0009] In some embodiments, the step of controlling a semiconductor process apparatus to operate according to a target mode includes: if the target mode is a second mode, controlling the semiconductor process apparatus to remain at the end step; and acquiring user operations and controlling the operation of the semiconductor process apparatus according to the user operations; wherein the user operations include jump operations and continue operations.

[0010] In some embodiments, the step of controlling the operation of semiconductor process equipment according to user operation includes: if the user operation is to continue, controlling the semiconductor process equipment to return to the process recipe and run according to the next process step of the current process step.

[0011] In some embodiments, the step of controlling the operation of semiconductor process equipment according to user operation includes: if the user operation is a jump operation, controlling the semiconductor process equipment to jump to any process step of the process recipe; or, controlling the semiconductor process equipment to jump to any process step of the process alarm recipe.

[0012] In some embodiments, the process recipe includes a main process recipe and a sub-process recipe. The method further includes: when the sub-process recipe is called at the target process step of the main process recipe, and the current process step that generates the alarm is the end step of the sub-process recipe, obtaining the number of times the sub-process recipe is run after the process alarm recipe is executed; if the number of runs reaches a preset number, controlling the semiconductor process equipment to return to the next process step of the target process step.

[0013] In some embodiments, the method further includes: if the number of runs has not reached a preset number, controlling the semiconductor process equipment to re-execute the sub-process recipe until the number of runs reaches the preset number.

[0014] In some embodiments, the step of controlling the semiconductor process equipment to operate according to a target fault-tolerant control operation includes: if the target fault-tolerant control operation is a process stop control operation, controlling the semiconductor process equipment to operate according to the process stop recipe corresponding to the process stop control operation, and controlling the semiconductor process equipment to be in an idle state after the operation is completed; or, if the target fault-tolerant control operation is an alarm prompt control operation, controlling the semiconductor process equipment to issue an alarm prompt, and continuing to operate according to the process recipe.

[0015] Secondly, embodiments of this application also provide a semiconductor process apparatus, including a controller, the controller including at least one processor and at least one memory, the memory storing a computer program, the computer program being executed by the processor to implement the method described in the first aspect.

[0016] Thirdly, embodiments of this application also provide a computer-readable storage medium storing a computer program, which, when executed by a processor, performs the method described in the first aspect.

[0017] The embodiments of this application bring the following beneficial effects:

[0018] This application provides a semiconductor process equipment and its control method. During each process step of the semiconductor process equipment executing a process recipe, if an alarm occurs in the current process step, the alarm type is determined. The process recipe includes multiple alarm types and corresponding fault-tolerant control operations for each alarm type. These fault-tolerant control operations characterize remedial measures to ensure the semiconductor process equipment remains in a safe state when an alarm occurs. A target fault-tolerant control operation is determined based on the alarm type, and the semiconductor process equipment is controlled to operate according to the target fault-tolerant control operation. In this control method, when an alarm occurs during the execution of a process recipe, a corresponding target fault-tolerant control operation is determined based on the alarm type, and the semiconductor process equipment is controlled to operate according to the target fault-tolerant control operation to remedy the product failure caused by the alarm. This flexible fault-tolerant control through alarm types ensures the product quality and production capacity of the semiconductor process equipment.

[0019] Other features and advantages of this application will be set forth in the following description and will be apparent in part from the description or may be learned by practicing the application. The objectives and other advantages of this application are realized and obtained through the structures particularly pointed out in the description and the accompanying drawings.

[0020] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description

[0021] To more clearly illustrate the technical solutions in the specific embodiments of this application or the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0022] Figure 1 is a flowchart of the existing equipment status switching process;

[0023] Figure 2 is a flowchart of a semiconductor process equipment control method provided in an embodiment of this application;

[0024] Figure 3 is a schematic flowchart illustrating the switching between process recipes provided in an embodiment of this application;

[0025] Figure 4 is a schematic diagram of the air intake and exhaust of a process chamber provided in an embodiment of this application;

[0026] Figure 5 is a flowchart of another semiconductor process equipment control method provided in an embodiment of this application;

[0027] Figure 6 is a flowchart of another semiconductor process equipment control method provided in an embodiment of this application;

[0028] Figure 7 is a schematic diagram of the structure of a controller in a semiconductor process equipment provided in an embodiment of this application. Detailed Implementation

[0029] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0030] In related technologies, the control system of semiconductor process equipment adopts an automatic operation mode, and manages the process equipment through equipment state scheduling. The equipment states mainly include: Unknown, Initialize, Idle, Standby, Ready, Run, Hold, and Abort. As shown in Figure 1, the switching process between each equipment state is as follows:

[0031] (1) When the semiconductor process equipment is in an unknown state, the semiconductor process equipment is formatted; at this time, the semiconductor process equipment is in a formatted state.

[0032] (2) After the semiconductor process equipment is formatted, the equipment state is switched by running different process recipes. Among them, the existing recipes mainly include: Idle Recipe, Main Recipe, Sub Recipe and Abort Recipe.

[0033] When a semiconductor process equipment is running an Idle Recipe, its status is displayed as Idle. During this idle state, the equipment automatically performs relevant temperature and pressure controls. After control is complete, the equipment status changes to Standby to prepare for the next process flow. In Standby mode, the semiconductor process equipment can run the Main Recipe at any time. When running the Main Recipe, the equipment status changes to Ready, Run, or End. Ready represents the preparation phase, quickly bringing the equipment's parameters to the target state. Run represents the entire process of running the Main Recipe. When the Main Recipe reaches its final step (End Step), the equipment status changes to End. Furthermore, after the Main Recipe completes execution, the equipment status switches to Idle or Standby to prepare for the next process flow.

[0034] In practical applications, the Main Recipe is the standard process for semiconductor process equipment to handle wafers. Within each process step of the Main Recipe, Sub Recipes can also be called. However, in practice, Sub Recipes cannot be started directly in idle mode; they must be called through the Main Recipe. Furthermore, the same Sub Recipe can be called multiple times within the same process step in the Main Recipe, and different process steps can call different Sub Recipes. When the semiconductor process equipment is running a Sub Recipe, the equipment status displays as running.

[0035] Furthermore, the human-machine interface of semiconductor process equipment provides a Hold button. When the equipment is in a hold state, operators can perform emergency procedures through manual control. Also, when the equipment is in running state, if an alarm occurs, the control system executes the Abort Recipe, at which point the equipment state switches to an aborted state. When the execution reaches the End Step of the Abort Recipe, the control system displays the completed state. Therefore, the Abort Recipe can be understood as a process for stopping abnormal states and restoring equipment to a safe state.

[0036] However, the fault-tolerant control adopted by the relevant technologies is relatively simple. When an alarm occurs, it only issues an alarm notification and stops the current process, which poses a safety hazard. This not only affects the process results but also reduces product quality and the production capacity of semiconductor process equipment.

[0037] Based on this, embodiments of this application provide semiconductor process equipment and its control method. When an alarm occurs during the execution of a process recipe by the semiconductor process equipment, the corresponding target fault-tolerant control operation is determined according to the alarm type, and the semiconductor process equipment is controlled to run according to the target fault-tolerant control operation to remedy the product when the alarm occurs. Thus, fault-tolerant control is flexibly performed through alarm type, ensuring the product quality and production capacity of the semiconductor process equipment.

[0038] To facilitate understanding of this embodiment, the embodiments of this application will be described in detail below.

[0039] Example 1

[0040] This application provides a semiconductor process equipment control method, as shown in FIG2, which includes the following steps:

[0041] Step S202: During each process step of the process recipe being executed in the semiconductor process equipment, if an alarm is generated in the current process step, determine the alarm type.

[0042] The process recipe is configured with multiple alarm types and corresponding fault-tolerant control operations for each alarm type. These operations characterize remedial measures to ensure the semiconductor process equipment remains in a safe state when an alarm occurs. In practical applications, the process recipe includes multiple process steps. During each process step executed by the semiconductor process equipment, the system monitors in real time whether an alarm is generated. When an alarm occurs in the current process step, the alarm type is determined, and the corresponding fault-tolerant control operation is then selected based on the alarm type. This allows for flexible invocation of the appropriate fault-tolerant control operation based on different alarm types to remedy product issues when an alarm occurs, thus ensuring the product quality of the semiconductor process equipment.

[0043] Step S204: Determine the corresponding target fault-tolerant control operation based on the alarm type, and control the semiconductor process equipment to run according to the target fault-tolerant control operation.

[0044] The above-mentioned semiconductor process equipment control method determines the corresponding target fault-tolerant control operation based on the alarm type when the semiconductor process equipment triggers an alarm during the execution of the process recipe. It then controls the semiconductor process equipment to operate according to the target fault-tolerant control operation to remedy the product when the alarm occurs. This flexible fault-tolerant control based on alarm type ensures the product quality of the semiconductor process equipment.

[0045] In one implementation, the alarm types include Level 1 alarm, Level 2 alarm, and Level 3 alarm; the fault-tolerant control operations include: process stop control operation, process alarm control operation, and alarm notification control operation; the step of determining the corresponding target fault-tolerant control operation based on the alarm type includes: if the alarm type is Level 1 alarm, determining the target fault-tolerant control operation as a process stop control operation; or, if the alarm type is Level 2 alarm, determining the target fault-tolerant control operation as a process alarm control operation; or, if the alarm type is Level 3 alarm, determining the target fault-tolerant control operation as an alarm notification control operation.

[0046] In practical applications, alarms for semiconductor process equipment are mainly divided into equipment status abnormality alarms and process abnormality alarms. Multiple alarm types and corresponding fault-tolerant control operations (i.e., fault-tolerant control measures) can be set for each process step in the process recipe. Alarm types and fault-tolerant control operations are implemented by attaching an alarm table. During each process step of the semiconductor process equipment executing the process recipe, the equipment operating status, the working status of each device, and the status of process quantities are monitored in real time. When an abnormality occurs, an alarm is generated, and the corresponding fault-tolerant control operation is determined in the alarm table based on the alarm type.

[0047] Specifically, based on the severity of various alarms, alarm types are divided into Level 1 alarms, Level 2 alarms, and Level 3 alarms. Among them, Level 1 alarms are more dangerous, while Level 3 alarms are less dangerous. Alarms that are between Level 1 and Level 3 alarms and are less dangerous or moderately dangerous are collectively referred to as Level 2 alarms.

[0048] Similarly, fault-tolerant control operations include: process abort control operations, process alarm control operations, and alarm notification control operations. Process abort control operations are implemented through the corresponding Abort Recipe, process alarm control operations are implemented through the corresponding Alarm Recipe, and alarm notification control operations are implemented through alarm notifications. The corresponding Alarm table is shown in Table 1 below.

[0049] Table 1

[0050] As shown in Table 1 above, when the alarm type is a Level 1 alarm, the target fault-tolerant control operation is determined to be a process abort control operation. An alarm is issued and the semiconductor process equipment is controlled to jump from the current process step to the Abort Recipe. When the alarm type is a Level 2 alarm, the target fault-tolerant control operation is determined to be a process alarm control operation. An alarm is issued and the semiconductor process equipment is controlled to jump from the current process step to the Alarm Recipe. When the alarm type is a Level 3 alarm, the target fault-tolerant control operation is determined to be an alarm notification control operation. The semiconductor process equipment only issues an alarm notification. At this time, the process recipe continues to run without being affected, that is, it does not jump to other recipes and can be ignored.

[0051] Furthermore, to avoid conflicts between fault-tolerant control operations, and based on the principle of better protecting personal safety, equipment safety, and product safety, the response priorities of fault-tolerant control operations are divided. This division is generally agreed upon with the user to ensure that customers can configure the alarm table according to their actual needs when using semiconductor process equipment. Since level 1 alarms, level 2 alarms, and level 3 alarms are arranged in order of priority, the priority in fault-tolerant control operations is, in order: process stop control operation > process alarm control operation > alarm notification control operation.

[0052] Among these, the highest priority process stop control operations typically assign level 1 alarms that may pose equipment safety risks, such as fire alarms and smoke alarms, as process stop control operations. The lowest priority alarm notifications typically assign level 1 alarms such as abnormal intake pressure and device malfunctions as alarm notification control operations. The remaining level 2 alarms are assigned as process alarm control operations. In practical applications, without prioritization, if only alarm notifications are executed when device malfunction alarms and smoke alarms occur simultaneously, it will pose equipment risks. Therefore, by configuring corresponding fault-tolerant control operations for different alarm types using the aforementioned Alarm Table, the safety of semiconductor process equipment is ensured during alarm notifications through corresponding remedial measures. Furthermore, when multiple alarm types occur, fault-tolerant control is performed according to priority, further effectively guaranteeing the safety of semiconductor process equipment, and consequently ensuring product quality and production capacity.

[0053] In one implementation, the process alarm control operation is implemented through a corresponding process alarm recipe. If the target fault-tolerant control operation is a process alarm control operation, the process of controlling the semiconductor process equipment to run according to the target fault-tolerant control operation is as follows: the semiconductor process equipment is controlled to switch from the current process step to execute the process alarm recipe, and when the execution reaches the end step of the process alarm recipe, the target mode of the end step is determined; wherein, the target mode includes a first mode and a second mode, the first mode is used to characterize the mode of automatically returning to the process recipe after the process alarm recipe is executed, and the second mode is used to characterize the mode of staying at the end step after the process alarm recipe is executed; the semiconductor process equipment is controlled to run according to the target mode to complete the process alarm recipe.

[0054] Specifically, during the operation of semiconductor process equipment according to the process recipe, if a level 2 alarm is generated at the current process step, the process recipe currently in operation is immediately stopped. According to Table 1, the target fault-tolerant control operation is determined to be the process alarm control operation. Since the process alarm control operation is implemented through the corresponding process alarm recipe (Alarm Recipe), the semiconductor process equipment jumps from the process recipe to the Alarm Recipe. Because the Alarm Recipe includes corresponding remedial measures, the execution of the Alarm Recipe by the semiconductor process equipment ensures the safe state of the semiconductor process equipment and improves the product quality of the semiconductor process equipment.

[0055] Furthermore, Alarm Recipe differs from other Recipes. Alarm Recipe has different modes in its End Step, so that after executing Alarm Recipe, semiconductor process equipment does not enter Idle and wait to enter the next process state like other Recipes. Instead, it performs mode judgment, which not only ensures the safety of semiconductor process equipment when alarms occur, but also facilitates the maintenance of the output of semiconductor process equipment in batch production through different modes.

[0056] In practical applications, when the semiconductor process equipment executes the end step of the Alarm Recipe, the target mode of the end step is determined. The target mode includes a first mode and a second mode. The first mode can also be called the End mode, which is the mode in which the Alarm Recipe automatically returns to the process recipe after execution. The second mode can also be called the End+Hold mode, which is the mode in which the Alarm Recipe stays at the end step and enters the Hold state after execution.

[0057] Specifically, the process by which semiconductor process equipment operates according to the target mode is as follows:

[0058] (1) If the target mode is the first mode, the semiconductor process equipment will automatically return to the process recipe after the process alarm recipe is executed, and run according to the next process step of the current process step.

[0059] Specifically, when the Alarm Recipe's End Step is in End mode, the semiconductor process equipment automatically returns to the process recipe after executing the Alarm Recipe and runs according to the next process step after the current process step that called the Alarm Recipe in the process recipe. For example, when the third process step (Step 3) in the process recipe executes the Alarm Recipe due to a level 2 alarm, and the Alarm Recipe's End Step is in End mode, after the End Step is completed, the semiconductor process equipment automatically returns to the process recipe and continues running according to the fourth process step (Step 4).

[0060] Therefore, when the Alarm Recipe's End Step is in End mode, the Alarm Recipe is invoked when a Level 2 alarm occurs. After the Alarm Recipe is executed, it automatically returns to the process recipe to invoke the next process step of the Alarm Recipe and continues to run until the process is completed. This not only ensures the safety of the semiconductor process equipment when an alarm occurs, but also allows the equipment to return to the process to continue processing after the equipment is safe, avoiding wafer quality degradation due to process interruption, thereby improving the product quality and capacity of the semiconductor process equipment.

[0061] (2) If the target mode is the second mode, control the semiconductor process equipment to stay at the end step; and acquire user operations and control the operation of the semiconductor process equipment according to the user operations; wherein, the user operations include jump operations and continue operations.

[0062] Specifically, when the Alarm Recipe's End Step is in End+Hold mode, the semiconductor process equipment remains at the End Step after executing the Alarm Recipe and enters the Hold state. Simultaneously, the human-machine interface of the semiconductor process equipment provides operation buttons, including a Jump button and a Resume button. The operator selects the corresponding operation button based on the semiconductor process equipment's status and the current wafer processing status. The semiconductor process equipment receives the operator's input to the operation buttons and then runs accordingly.

[0063] In one operating mode, if the user selects "Continue," the semiconductor process equipment returns to the process recipe and proceeds to the next process step following the current one. Specifically, when the operator selects "Resume," the semiconductor process equipment returns to the process recipe that called the Alarm Recipe and proceeds to the next process step following the current one of the Alarm Recipe, continuing to process the wafer in the semiconductor process equipment until the process recipe is completed. This prevents the semiconductor process equipment from failing to complete the entire process, thereby ensuring product quality.

[0064] In another operating mode, if the user operation is a jump operation, the semiconductor process equipment is controlled to jump to any process step of the process recipe. Alternatively, if the user operation is a jump operation, the semiconductor process equipment is controlled to jump to any process step of the process alarm recipe. That is, when the operator performs a Jump operation, the semiconductor process equipment jumps to any process step in the process recipe that calls the Alarm Recipe, or jumps to any process step of the currently running Alarm Recipe, to ensure the semiconductor process equipment is in a safe state.

[0065] Therefore, when a level 2 alarm occurs, the Alarm Recipe is executed through the semiconductor process equipment, ensuring equipment safety; and by setting two modes in the End Step of the Alarm Recipe, the corresponding mode can be executed by the semiconductor process equipment according to the user's operation, thus enriching the application scenarios.

[0066] In one embodiment, the process recipe includes a main process recipe and a sub-process recipe. The method further includes: when the sub-process recipe is called at the target process step of the main process recipe, and the current process step that generates the alarm is the end step of the sub-process recipe, obtaining the number of times the sub-process recipe has been executed after the process alarm recipe is completed; if the number of executions reaches a preset number, controlling the semiconductor process equipment to return to the next process step of the target process step; if the number of executions does not reach the preset number, controlling the semiconductor process equipment to re-execute the sub-process recipe until the number of executions reaches the preset number.

[0067] Specifically, since a Sub Recipe can only be executed through a Main Recipe, let the process step in the Main Recipe that calls the Sub Recipe be the target process step. When a Level 2 alarm occurs, the process recipe is the Sub Recipe. Furthermore, when the current process step in the Sub Recipe that calls the Alarm Recipe is the End Step of the Sub Recipe, the semiconductor process equipment executes the Alarm Recipe. After the Alarm Recipe is completed, it obtains the number of times the Sub Recipe has been run. If the number of runs reaches a preset number, the semiconductor process equipment automatically returns to the next process step after the target process step in the Main Recipe that calls the Sub Recipe. Conversely, if the number of runs does not reach the preset number, the semiconductor process equipment automatically returns to executing the Sub Recipe until the preset number of runs is reached.

[0068] In addition to checking whether the number of runs has reached the preset number, when calling the Sub Recipe in the target process step, the remaining total number of runs (i.e., the preset number of runs) corresponding to the Sub Recipe can be directly obtained. After the Sub Recipe runs once, the remaining total number of runs is decremented by 1. For example, if the remaining total number of runs is set to 5, after the Sub Recipe runs once, the remaining total number of runs = the remaining total number of runs minus 1, at which point the remaining total number of runs is 4. After each run of the Sub Recipe, it is checked whether the remaining total number of runs is 0. If it is 0, it automatically returns to the next process step of the target process step that called the Sub Recipe in the Main Recipe. If it is not 0, it continues to execute the Sub Recipe until the remaining total number of runs is 0.

[0069] Therefore, in the process of semiconductor process equipment, as shown in Figure 3, the switching process between Recipes is as follows: (A1) First, the Idle Recipe is run to put the semiconductor process equipment in the Idle state to prepare for the process flow; then, it is determined whether to start the Main Recipe. If not, it remains in the Idle state; if yes, the Main Recipe is run; (A2) During the operation of each process step of the Main Recipe, it is determined whether to call the Sub Recipe. If not, the Main Recipe continues to run until its End Step is reached; if yes, the Sub Recipe is run, and during the operation, when the End Step of the Sub Recipe is reached, it is determined whether the remaining total number of runs is 0. If not, the Sub Recipe is run again, such as returning to the first process step of the Sub Recipe to start running until the remaining total number of runs is 0; if the remaining total number of runs is 0, it returns to the next process step of the Sub Recipe called in the Main Recipe to continue running until the End Step of the Main Recipe is reached, and returns to the Idle state when the Main Recipe reaches the End Step. The recipe is prepared in order to prepare for the next process flow.

[0070] It should be noted that when the End Step of the Sub Recipe calls the Alarm Recipe, after the Alarm Recipe is executed, it checks whether the remaining total number of runs of the Sub Recipe is 0. If it is 0, it automatically returns to the next process step after the target process step that called the Sub Recipe in the Main Recipe. If the remaining total number of runs is not 0, it automatically returns to execute the Sub Recipe and decrements the remaining total number of runs of the Sub Recipe by 1. When it runs to the End Step again, if the alarm still exists, it continues to call the Alarm Recipe, and after the Alarm Recipe is executed, it checks again whether the remaining total number of runs of the Sub Recipe is 0, and repeats the above process.

[0071] In addition, if the Alarm Recipe is called in any process step other than the End Step in the Sub Recipe, the process will jump back to the Sub Recipe after the Alarm Recipe is completed, and continue running according to the next process step in the Sub Recipe that called the Alarm Recipe. At the same time, the number of times the Sub Recipe has been run is checked until the number of times the Sub Recipe has been run reaches the preset number, or the total number of remaining runs is 0.

[0072] In one implementation, if the target fault-tolerant control operation is a process stop control operation, the process of controlling the semiconductor process equipment to run according to the target fault-tolerant control operation is as follows: controlling the semiconductor process equipment to run according to the process stop recipe corresponding to the process stop control operation, and controlling the semiconductor process equipment to be in an idle state after the operation is completed.

[0073] Specifically, as shown in Figure 3, if a Level 1 alarm is triggered during the operation of the semiconductor process equipment according to the process recipe, due to the high severity of the Level 1 alarm, the currently running process recipe is immediately stopped, and the semiconductor process equipment is controlled to run according to the process stop recipe corresponding to the process stop control operation, such as quickly removing the product from the process chamber to reduce the degree of damage to the product and the extent of damage in the event of a serious failure of the semiconductor process equipment. Furthermore, when the execution reaches the End Step of the Abort Recipe, it returns to the Idle Recipe to prepare for the next process flow. Therefore, by calling the Abort Recipe during a Level 1 alarm, equipment safety is ensured.

[0074] In one implementation, if the target fault-tolerant control operation is an alarm notification control operation, the process of controlling the semiconductor process equipment to operate according to the target fault-tolerant control operation is as follows: the semiconductor process equipment issues an alarm notification and continues to operate according to the process recipe. Since the level 3 alarm has a low hazard, in this case, the semiconductor process equipment only issues an alarm notification and continues to operate according to the process recipe to ensure the production capacity of the semiconductor process equipment.

[0075] In summary, during the semiconductor manufacturing process, existing fault-tolerant control methods typically halt the current process when an alarm occurs. However, this approach impacts the process outcome to varying degrees and fails to simultaneously restore the current process while quickly bringing the equipment to a safe state upon alarm occurrence. Therefore, the semiconductor manufacturing equipment control method provided in this application increases the flexibility of fault-tolerant control without affecting the equipment's alarm response. It offers an automatic recovery method or a method that allows the equipment to resume processing after the operator restores the equipment to a safe state. This enables the equipment to enter a safe state through reasonable remedial measures when an alarm occurs, while simultaneously resuming the current process smoothly. This ensures the successful completion of the current process and achieves the goals of protecting product quality and increasing production capacity.

[0076] To facilitate understanding, an example is provided below. For the ALD (Atomic Layer Deposition) process in semiconductor equipment, if a vacuum pump alarm occurs during the deposition process of the Main Recipe (this alarm type is a Level 2 alarm), the corresponding fault-tolerant control operation is the process alarm control operation. Simultaneously, the End Step mode of the process alarm recipe (Alarm Recipe) is set to End+Hold mode. At this point, the currently running Main Recipe is stopped, and the Alarm Recipe is run.

[0077] As shown in Figure 4, during the operation of Alarm Recipe, the valves corresponding to the air intake (valve 1, valve 2, and valve 3) are all closed, and the exhaust valve is also closed. This allows the semiconductor process equipment to enter a safe state and remain at the End Step of Alarm Recipe, waiting for the operator to perform vacuum pump maintenance. Once the vacuum pump is restored, the operator can click Resume to continue the process according to the process status. Compared with the direct termination method in related technology control schemes, this greatly improves the capacity and product quality of semiconductor process equipment.

[0078] Furthermore, in the in-situ cleaning (Dry Clean) process of semiconductor equipment, the exothermic reaction during Dry Clean can cause a rapid rise in the temperature of the exhaust pipes, potentially damaging the heating elements. In the Dry Clean process, an alarm indicating abnormal heating element temperature can be defined as a level two alarm, with the corresponding fault-tolerant control operation being the process alarm control operation. Simultaneously, the End Step mode of the Alarm Recipe is set to End mode. At this point, the currently running Main Recipe is stopped, and the Alarm Recipe is run. The Alarm Recipe first vents the Dry Clean gas from the process chamber and then introduces nitrogen (N2). After a period of time, the pipe temperature returns to normal. Upon completion of the Alarm Recipe, it automatically returns to the Dry Clean process to continue running. This not only ensures the safety of the semiconductor equipment but also improves the operating efficiency of the semiconductor equipment, thereby increasing its throughput.

[0079] Example 2

[0080] Based on the above method embodiments, this application provides another semiconductor process equipment control method. This method focuses on describing the process where the process recipe is a Main Recipe that does not call a Sub Recipe, but calls an Alarm Recipe during execution. As shown in Figure 5, the method includes the following steps:

[0081] Step S502: Run the Idle Recipe; at this time, the semiconductor process equipment is in the Idle state in order to prepare for the process flow.

[0082] Step S504: Determine whether to start Main Recipe; if not, continue in Idle state; if yes, proceed to step S506 to run Main Recipe.

[0083] Step S506: Run Main Recipe Step1; During the execution of Main Recipe, execute its multiple process steps Step in sequence. Here, execution starts from the first process step Step1 and is carried out in the order of the process steps.

[0084] Step S508: Run Main Recipe Stepn; where Stepn represents any process step after the first process step Step1.

[0085] Step S510: Is an alarm triggered? If not, proceed to step S524. If yes, the currently running Main Recipe is stopped, and step S512 is executed.

[0086] Step S512: The secondary alarm invokes the Alarm Recipe. At this time, the semiconductor process equipment switches from the Main Recipe to the process alarm control operation through the corresponding process alarm recipe Alarm Recipe and runs according to the Alarm Recipe. The operator adds corresponding remedial measures in the Alarm Recipe. These remedial measures can be set by the operator according to different secondary alarms. The purpose is to ensure the safe status of the equipment and at the same time provide preparation conditions for the smooth recovery of the process.

[0087] Step S514: Determine whether End Step is in End mode;

[0088] When the Alarm Recipe reaches its End Step, since the End Step has End mode and End+Hold mode, it is necessary to determine whether the End Step is in End mode. If it is, then execute step S516; otherwise, execute step S518.

[0089] Step S516: Determine whether the End Step has finished running. If yes, proceed to step S524: after the Alarm Recipe has finished running, return to the Main Recipe to call the next process step of the Alarm Recipe. If no, return to continue executing the End mode until the End Step has finished running.

[0090] Step S518: Stay at End Step and wait for operation processing; when End Step is not in End mode, End Step is in End+Hold mode. At this time, after executing the Alarm Recipe, the semiconductor process equipment stays at End Step and enters Hold state to wait for operation processing by the operator.

[0091] Step S520: Determine whether Resume has been clicked; that is, determine whether the operator has clicked the Resume button on the human-machine interface. If yes, proceed to step S524 and return to the Main Recipe to call the next process step of the Alarm Recipe; if no, proceed to step S522.

[0092] Step S522: Select the target Step; when the operator clicks Jump instead of Resume, and selects the target Step corresponding to Jump, the semiconductor process equipment jumps from the End Step of the Alarm Recipe to the target Step. The target Step can be any Step in the Main Recipe that calls the Alarm Recipe, or any Step in the Alarm Recipe itself; here, it is the End Step in the Main Recipe.

[0093] Step S524, run Main Recipe Step(n+1);

[0094] Step S526, run Main Recipe End Step;

[0095] Step S528: Determine whether the End Step has finished running. If not, return to continue executing the Main Recipe End Step until the End Step finishes running. If yes, return to step S502, that is, return to run the Idle Recipe after the Main Recipe has finished running, so as to prepare for the next process.

[0096] Furthermore, during the execution of the Main Recipe described above, when a Level 1 alarm occurs, as shown in Figure 5, after step S510, the following steps are executed first: Step S530, the Level 1 alarm calls the Abort Recipe, that is, it calls the process stop recipe Abort Recipe corresponding to the process stop control operation, and after the Abort Recipe is completed, it returns to run the Idle Recipe in order to prepare for the next process.

[0097] Therefore, during the execution of the Main Recipe without calling the Sub Recipe, when the Abort Recipe is called, it directly returns to the Idle Recipe after the Abort Recipe is completed. However, when the Alarm Recipe is called, it will, while ensuring the automatic continuation of the current Main Recipe, perform relevant processing based on the current state of the semiconductor process equipment and the process conditions, combined with the operator's actions. This allows the remedial measures in the Alarm Recipe to remedy the product after the alarm occurs, ensuring the completion of the process and the quality of the product.

[0098] Example 3

[0099] Based on the above method embodiments, this application provides another semiconductor process equipment control method. This method focuses on the process where the process recipe is a Main Recipe that calls a Sub Recipe, and an Alarm Recipe is called during execution. As shown in Figure 6, the method includes the following steps:

[0100] Step S602: Run the Idle Recipe; at this time, the semiconductor process equipment is in the Idle state in order to prepare for the process flow.

[0101] Step S604: Determine whether to start Main Recipe; if not, continue in Idle state; if yes, proceed to step S606 to run Main Recipe.

[0102] Step S606: Run Main Recipe Step1; During the execution of Main Recipe, execute its multiple process steps Step in sequence. Here, execution starts from the first process step Step1 and is carried out in the order of the process steps.

[0103] Step S608: Run Main Recipe Stepn; where Stepn represents any process step after the first process step Step1.

[0104] Step S610: Determine whether Sub Recipe is called. If yes, proceed to step S612; otherwise, proceed to step S638.

[0105] Step S612, run Sub Recipe Step1; during the running of Sub Recipe, execute its multiple process steps Step in sequence, starting from the first process step Step1, and executing them in the order of the process steps.

[0106] Step S614: Run Sub Recipe Stepm; where Stepm represents any process step after the first process step Step1 in Sub Recipe.

[0107] Step S616: Is an alarm triggered? If not, proceed to step S634; if yes, the currently running Sub Recipe is stopped, and step S618 is executed.

[0108] Step S618: The secondary alarm calls the Alarm Recipe. At this time, the semiconductor process equipment jumps from the Sub Recipe to the process alarm control operation through the corresponding process alarm recipe Alarm Recipe and runs according to the Alarm Recipe. The operator adds corresponding remedial measures in the Alarm Recipe. These remedial measures can be set by the operator according to different secondary alarms. The purpose is to ensure the safe status of the equipment and at the same time provide preparation conditions for the smooth recovery of the process.

[0109] Step S620: Determine whether End Step is in End mode;

[0110] When the Alarm Recipe reaches its End Step, since the End Step has End mode and End+Hold mode, it is necessary to determine whether the End Step is in End mode. If it is, then execute step S622; otherwise, execute step S624.

[0111] Step S622: Determine whether the End Step has finished running. If yes, proceed to step S632: after the Alarm Recipe has finished running, return to the Main Recipe and call the next process step of the Sub Recipe to run. If no, return to continue executing the End mode until the End Step has finished running.

[0112] Step S624: Stay at End Step and wait for operation processing; when End Step is not in End mode, End Step is in End+Hold mode. At this time, after executing the Alarm Recipe, the semiconductor process equipment stays at End Step and enters Hold state to wait for operation processing by the operator.

[0113] Step S626: Determine whether Resume has been clicked; that is, determine whether the operator has clicked the Resume button on the human-computer interaction interface. If yes, proceed to step S632; otherwise, proceed to step S628.

[0114] Step S628, select the target Step;

[0115] Step S630: Determine whether to jump to Sub Recipe; that is, determine whether the target Step is any step of Sub Recipe. If yes, return to step S614; otherwise, execute step S640.

[0116] Step S632: Determine whether Sub Recipe Step m is the End Step; that is, determine whether the step in Sub Recipe that calls Alarm Recipe is the last step. If yes, execute step S636; otherwise, execute step S634.

[0117] Step S634: Run the Sub Recipe End Step, and return to step S636 after the run is complete;

[0118] Step S636: Determine if the remaining number of times Sub Recipe is 0; that is, when the step in Sub Recipe that calls Alarm Recipe is End Step, call Alarm Recipe, and after Alarm Recipe finishes running, determine if the remaining number of times Sub Recipe is 0. If yes, proceed to step S638; otherwise, return to step S612 and re-execute Sub Recipe until the remaining number of times Sub Recipe is 0.

[0119] Step S638, run Main Recipe Step(n+1);

[0120] Step S640: Run the Main Recipe End Step;

[0121] Step S642: Determine whether the End Step has finished running. If not, return to continue executing the Main Recipe End Step until the End Step finishes running. If yes, return to step S602, that is, return to run the Idle Recipe after the Main Recipe has finished running, so as to prepare for the next process.

[0122] Furthermore, during the execution of the Main Recipe described above, when a Level 1 alarm occurs, as shown in Figure 6, after step S616, the following steps are executed first: Step S644, the Level 1 alarm calls the Abort Recipe, that is, it calls the process stop recipe AbortRecipe corresponding to the process stop control operation, and after the Abort Recipe is completed, it returns to run the Idle Recipe in order to prepare for the next process.

[0123] Therefore, during the execution of the Main Recipe when calling the Sub Recipe, when AbortRecipe is called, it returns directly to Idle Recipe after Abort Recipe is completed. However, when Alarm Recipe is called, it will ensure the automatic continuation of the current Main Recipe and the called Sub Recipe, and will perform relevant processing based on the current state of the semiconductor process equipment and process conditions, combined with the operator's actions. This allows the remedial measures in Alarm Recipe to remedy products after an alarm occurs, ensuring the completion of the process and product quality.

[0124] Example 4

[0125] This application also provides a semiconductor process apparatus, including a controller. The controller includes at least one processor and at least one memory. The memory stores a computer program, which, when executed by the processor, implements the above-described semiconductor process apparatus control method.

[0126] Referring to Figure 7, the controller includes a processor 100 and a memory 101. The memory 101 stores machine-executable instructions that can be executed by the processor 100. The processor 100 executes the machine-executable instructions to implement the above-described semiconductor process equipment control method.

[0127] Furthermore, the controller shown in Figure 7 also includes a bus 102 and a communication interface 103, and the processor 100, the communication interface 103 and the memory 101 are connected through the bus 102.

[0128] The memory 101 may include high-speed random access memory (RAM) or non-volatile memory, such as at least one disk storage device. Communication between this system network element and at least one other network element is achieved through at least one communication interface 103 (which can be wired or wireless), such as the Internet, wide area network, local area network, or metropolitan area network. The bus 102 may be an ISA (Industrial Standard Architecture) bus, a PCI (Peripheral Component Interconnect) bus, or an EISA (Enhanced Industry Standard Architecture) bus. These buses can be categorized as address buses, data buses, and control buses. For ease of illustration, only a single bidirectional arrow is used in Figure 7, but this does not imply that there is only one bus or one type of bus.

[0129] The processor 100 may be an integrated circuit chip with signal processing capabilities. In implementation, each step of the above method can be completed by the integrated logic circuitry in the hardware of the processor 100 or by instructions in software form. The processor 100 may be a general-purpose processor, including a Central Processing Unit (CPU), a Network Processor (NP), etc.; it may also be a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field-Programmable Gate Array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. It can implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of this application. The general-purpose processor may be a microprocessor or any conventional processor. The steps of the methods disclosed in the embodiments of this application can be directly manifested as execution by a hardware decoding processor, or execution by a combination of hardware and software modules in the decoding processor. The software module can reside in a readily available storage medium in the art, such as random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, or registers. This storage medium is located in memory 101, and the processor 100 reads the information from memory 101 and, in conjunction with its hardware, completes the steps of the method described in the foregoing embodiments.

[0130] The semiconductor process equipment provided in this application has the same technical features as the semiconductor process equipment control method provided in the above embodiments, so it can also solve the same technical problems and achieve the same technical effects.

[0131] This embodiment also provides a machine-readable storage medium storing machine-executable instructions. When the machine-executable instructions are invoked and executed by a processor, the machine-executable instructions cause the processor to implement the above-described semiconductor process equipment control method.

[0132] The semiconductor process equipment control method and the computer program product of the semiconductor process equipment provided in this application include a computer-readable storage medium storing program code. The instructions included in the program code can be used to execute the methods described in the preceding method embodiments. For specific implementation, please refer to the method embodiments, which will not be repeated here.

[0133] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working process of the system and apparatus described above can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0134] Furthermore, in the description of the embodiments of this application, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0135] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a processor-executable, non-volatile, computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0136] In the description of this application, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0137] Finally, it should be noted that the above-described embodiments are merely specific implementations of this application, used to illustrate the technical solutions of this application, and not to limit them. The protection scope of this application is not limited thereto. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that any person skilled in the art can still modify or easily conceive of changes to the technical solutions described in the foregoing embodiments, or make equivalent substitutions for some of the technical features, within the technical scope disclosed in this application. Such modifications, changes, or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be covered within the protection scope of this application. Therefore, the protection scope of this application should be determined by the protection scope of the claims.

Claims

1. A method for controlling semiconductor process equipment, characterized in that, The method includes: During each process step of the process recipe executed by the semiconductor process equipment, if an alarm is generated in the current process step, the alarm type is determined; wherein, the process recipe is configured with multiple alarm types and a fault-tolerant control operation corresponding to each alarm type, and the fault-tolerant control operation is used to characterize remedial measures to ensure that the semiconductor process equipment is in a safe state when an alarm occurs; The corresponding target fault-tolerant control operation is determined based on the alarm type, and the semiconductor process equipment is controlled to operate according to the target fault-tolerant control operation.

2. The method according to claim 1, characterized in that, The alarm types include Level 1 alarm, Level 2 alarm, and Level 3 alarm; the fault-tolerant control operations include: process stop control operation, process alarm control operation, and alarm notification control operation. The step of determining the corresponding target fault-tolerant control operation based on the alarm type includes: If the alarm type is the Level 1 alarm, then the target fault-tolerant control operation is determined to be the process stop control operation; or... If the alarm type is the level 2 alarm, then the target fault-tolerant control operation is determined to be the process alarm control operation; or... If the alarm type is the third-level alarm, then the target fault-tolerant control operation is determined to be the alarm prompt control operation.

3. The method according to claim 2, characterized in that, The process alarm control operation is implemented through a corresponding process alarm formula. If the target fault-tolerant control operation is the process alarm control operation, then the step of controlling the semiconductor process equipment to operate according to the target fault-tolerant control operation includes: The semiconductor process equipment is controlled to switch from the current process step to execute the process alarm recipe, and when the process alarm recipe is executed to the end step, the target mode of the end step is determined; wherein, the target mode includes a first mode and a second mode, the first mode is used to characterize the mode of automatically returning to the process recipe after the process alarm recipe is executed, and the second mode is used to characterize the mode of staying at the end step after the process alarm recipe is executed. The semiconductor process equipment is controlled to operate according to the target mode in order to complete the process alarm recipe.

4. The method according to claim 3, characterized in that, The step of controlling the semiconductor process equipment to operate according to the target mode includes: If the target mode is the first mode, the semiconductor process equipment is controlled to automatically return to the process recipe after the process alarm recipe is executed, and run according to the next process step of the current process step.

5. The method according to claim 3, characterized in that, The step of controlling the semiconductor process equipment to operate according to the target mode includes: If the target mode is the second mode, control the semiconductor process equipment to remain at the end step; and acquire user operations and control the semiconductor process equipment to run according to the user operations; wherein the user operations include jump operations and continue operations.

6. The method according to claim 5, characterized in that, The step of controlling the operation of the semiconductor process equipment according to the user operation includes: If the user operation is to continue, the semiconductor process equipment is controlled to return to the process recipe and run according to the next process step of the current process step.

7. The method according to claim 5, characterized in that, The step of controlling the operation of the semiconductor process equipment according to the user operation includes: If the user operation is the jump operation, control the semiconductor process equipment to jump to any process step of the process recipe; or, control the semiconductor process equipment to jump to any process step of the process alarm recipe.

8. The method according to claim 3, characterized in that, The process formulation includes a main process formulation and sub-process formulations, and the method further includes: When the sub-process recipe is called at the target process step of the main process recipe, and the current process step that generates the alarm is the end step of the sub-process recipe, the number of times the sub-process recipe has been run is obtained after the process alarm recipe has been executed. If the number of runs reaches a preset number, the semiconductor process equipment is controlled to return to the next process step of the target process step.

9. The method according to claim 8, characterized in that, The method further includes: If the number of runs does not reach the preset number, the semiconductor process equipment is controlled to continue executing the sub-process recipe until the number of runs reaches the preset number.

10. The method according to claim 2, characterized in that, The steps of controlling the semiconductor process equipment to operate according to the target fault-tolerant control operation include: If the target fault-tolerant control operation is the process abort control operation, control the semiconductor process equipment to run according to the process abort recipe corresponding to the process abort control operation, and control the semiconductor process equipment to be in an idle state after the operation is completed; or... If the target fault-tolerant control operation is the alarm prompt control operation, the semiconductor process equipment is controlled to issue an alarm prompt and continue to operate according to the process recipe.

11. A semiconductor process apparatus, comprising a controller, characterized in that, The controller includes at least one processor and at least one memory, the memory storing a computer program that, when executed by the processor, implements the method described in any one of claims 1-10.