Display panel and manufacturing method therefor, and display device

Abstract

Disclosed in the present disclosure are a display panel and a manufacturing method therefor, and a display device. The display panel comprises a base substrate (10), a first insulating layer (20), a first electrode layer (30), a light-emitting layer (40), and a second electrode layer (50). The first insulating layer (20) comprises first insulating structures (21), and the included angle between a side surface and a first bottom surface of each first insulating structure (21) is an acute angle. The first electrode layer (30) comprises first electrodes (31) and auxiliary electrodes (32), the first electrodes (31) cover partial areas of the first bottom surfaces, and the auxiliary electrodes (32) at least cover partial areas of the first bottom surfaces and the side surfaces of the first insulating structures (21). The light-emitting layer (40) is located on the side of the first electrode layer (30) distant from the base substrate (10). The second electrode layer (50) is located on the side of the light-emitting layer (40) distant from the base substrate (10).

Description

Display panel and its manufacturing method, display device Cross-references to related applications

[0001] This disclosure claims priority to Chinese patent application No. 202510080664.1, filed on January 17, 2025, the entire contents of which are incorporated herein by reference. Technical Field

[0002] This disclosure relates to the field of display technology, and in particular to a display panel, a method for manufacturing the same, and a display device. Background Technology

[0003] OLED (Organic Light-Emitting Diode) is a light-emitting diode that uses organic semiconductor materials and light-emitting materials to emit light through carrier injection and recombination under an electric field. With technological advancements, the demand for OLED display panels continues to increase. Summary of the Invention

[0004] This disclosure provides a display panel, a method for manufacturing the same, and a display device.

[0005] In a first aspect of this disclosure, a display panel is provided, the display panel comprising: a substrate having a plurality of mutually spaced pixel regions and an isolation region located between two adjacent pixel regions; a first insulating layer including a first insulating structure located in each of the pixel regions; the angle between a side surface of the first insulating structure and a first bottom surface is an acute angle, the first bottom surface being the surface of the first insulating structure away from the substrate; a first electrode layer including a first electrode and an auxiliary electrode located in each of the pixel regions and spaced apart from each other; the first electrode covering a portion of the first bottom surface; the auxiliary electrode covering at least a portion of the first bottom surface and a side surface of the first insulating structure; a light-emitting layer located on the side of the first electrode layer away from the substrate; and a second electrode layer located on the side of the light-emitting layer away from the substrate; the first electrode, the light-emitting layer and the second electrode layer of each pixel region forming a light-emitting structure.

[0006] In some embodiments, the light-emitting layer may be broken at the edge of the first bottom surface; the light-emitting layer is connected to the first electrode and the auxiliary electrode of the same pixel region, respectively.

[0007] In some embodiments, the second electrode layer may be continuously disposed on the side of the light-emitting layer away from the substrate and on the side of the auxiliary electrode away from the first insulating structure; the second electrode layer is respectively connected to the light-emitting layer and the auxiliary electrode in the same pixel region.

[0008] In some embodiments, the included angle between the side surface and the bottom surface of the first insulating structure can be 30° to 80°.

[0009] In some embodiments, the thickness of the first insulating layer in the direction perpendicular to the substrate can be 1.3 μm to 1.5 μm.

[0010] In some embodiments, the display panel may further include: a metal layer located between the first insulating layer and the substrate; the metal layer includes a transition portion located in each of the pixel regions, the first insulating structure of each pixel region having a first through hole, and the first electrode of each pixel region being connected to the transition portion of the same pixel region through the first through hole of the same pixel region.

[0011] In some embodiments, the display panel may further include: a driving circuit layer located between the metal layer and the substrate; the driving circuit layer including driving circuits for each of the pixel regions; and a second insulating layer located between the driving circuit layer and the metal layer; the second insulating layer having a second through hole located in each of the pixel regions, and the transition portion of each pixel region being connected to the driving circuit of the same pixel region through the second through hole of the same pixel region.

[0012] In some embodiments, the metal layer may further include conductive portions located in the isolation region and the pixel region, the conductive portions being spaced apart from the transition portion, and the auxiliary electrode being connected to the conductive portions.

[0013] In some embodiments, the conductive portion may be partially located between the second bottom surface of the first insulating structure and the substrate, wherein the second bottom surface is the surface of the first insulating structure near the substrate.

[0014] In some embodiments, the auxiliary electrode may include a first portion, a second portion, and a third portion connected in sequence, wherein the first portion covers a portion of the first bottom surface, the second portion covers the side surface of the first insulating structure, and the third portion covers a portion of the conductive portion away from the substrate.

[0015] In some embodiments, the orthographic projection of the third portion of the auxiliary electrode onto the substrate can be an annular shape.

[0016] In some embodiments, the width of the third portion of the auxiliary electrode in the direction close to the isolation region can be 1 μm to 3 μm.

[0017] In some embodiments, the width of the third portion of the auxiliary electrode in the direction near the isolation region can be 10% to 30% of the width of the conductive portion.

[0018] In some implementations, the first electrode layer, the light-emitting layer, and the second electrode layer can all be disconnected at the edge of the pixel region.

[0019] In some embodiments, the display panel may include a red light-emitting layer, a green light-emitting layer, and a blue light-emitting layer, wherein the pixel area where the red light-emitting layer is located is a red pixel area, the pixel area where the green light-emitting layer is located is a green pixel area, and the pixel area where the blue light-emitting layer is located is a blue pixel area; the conductive parts of the red pixel areas are interconnected, the conductive parts of the green pixel areas are interconnected, and the conductive parts of the blue pixel areas are interconnected.

[0020] In some embodiments, the conductive portions of the red pixel area, the green pixel area, and the blue pixel area may not be connected to each other.

[0021] In some embodiments, the conductive portions of the red pixel area, the green pixel area, and the blue pixel area can be interconnected.

[0022] In some embodiments, the isolation region may be located within the orthographic projection of the conductive portion onto the substrate.

[0023] In some embodiments, the substrate may have a display area and a border area at least partially surrounding the display area, the pixel area and the isolation area being located in the display area; the display panel further includes: a dam located in the border area; a first inorganic encapsulation layer located on the side of the dam and the second electrode layer away from the substrate and continuously disposed in the display area and the border area; an organic encapsulation layer located on the side of the first inorganic encapsulation layer away from the substrate and interrupted at the side of the dam facing the second electrode layer; and a second inorganic encapsulation layer located on the side of the organic encapsulation layer and the first inorganic encapsulation layer away from the substrate and continuously disposed in the display area and the border area.

[0024] In some embodiments, the display panel may further include: a pixel definition layer located between the first electrode layer and the light-emitting layer; the pixel definition layer having an opening that exposes the first electrode; the angle between the sidewall of the opening and the surface of the first electrode is an obtuse angle, and the light-emitting layer is continuously disposed inside and outside the opening and connected to the first electrode through the opening.

[0025] In some embodiments, the display panel may further include a pixel encapsulation layer covering the side of the second electrode layer away from the substrate.

[0026] In a second aspect of this disclosure, a display device is provided, which may include a display panel as provided in the first aspect.

[0027] In a third aspect of this disclosure, a method for manufacturing a display panel is provided. The method may include: providing a substrate having a plurality of mutually spaced pixel regions and an isolation region between two adjacent pixel regions; forming a first insulating layer on the substrate, the first insulating layer including a first insulating structure located in each of the pixel regions, the first insulating structure having an acute angle between a side surface and a first bottom surface, the first bottom surface being the surface of the first insulating structure away from the substrate; forming a first electrode layer on the first insulating layer, the first electrode layer including a first electrode and an auxiliary electrode located in each of the pixel regions and spaced apart from each other, the first electrode covering a portion of the first bottom surface, the auxiliary electrode covering at least a portion of the first bottom surface and a side surface of the first insulating structure; forming a light-emitting layer on the first electrode layer; and forming a second electrode layer on the light-emitting layer, wherein the first electrode, the light-emitting layer and the second electrode layer of each pixel region form a light-emitting structure.

[0028] In some embodiments, forming the first insulating layer on the substrate may include: depositing negative photoresist on the substrate; exposing a portion of the negative photoresist in each of the pixel areas using a photomask; and developing the exposed negative photoresist, with the remaining negative photoresist forming the first insulating structure.

[0029] In some embodiments, the first electrode layer and the second electrode layer may be formed using magnetron sputtering technology.

[0030] In some embodiments, the light-emitting layer can be formed using a high-temperature vapor deposition technique.

[0031] In some embodiments, after forming a second electrode layer on the light-emitting layer and the auxiliary electrode, the manufacturing method may further include: covering the second electrode layer with a pixel encapsulation layer; removing at least one of the pixel regions of the pixel encapsulation layer, the second electrode layer, and the light-emitting layer to expose the first electrode layer; and sequentially reforming the light-emitting layer, the second electrode layer, and the pixel encapsulation layer on the exposed first electrode layer, wherein the color of the reformed light-emitting layer is different from the color of the removed light-emitting layer. Attached Figure Description

[0032] To more clearly illustrate the technical solutions in the embodiments of this disclosure, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0033] Figure 1 shows a top view of a display panel according to one or more embodiments of the present disclosure.

[0034] Figure 2 shows a partial structural schematic diagram of the display panel of Figure 1 along the A-A' section line.

[0035] Figure 3 shows a schematic diagram of the conductive part connection method of a display panel according to another embodiment of the present disclosure.

[0036] Figure 4 shows a partial structural schematic diagram of a display panel according to another embodiment of the present disclosure.

[0037] Figure 5 shows a schematic flowchart of a method for manufacturing a display panel according to one or more embodiments of the present disclosure.

[0038] Figure 6 shows a schematic flowchart of step S102 in the manufacturing method of Figure 5.

[0039] Figure 7 shows a schematic flowchart of a method for manufacturing a display panel according to another embodiment of the present disclosure.

[0040] Figure 8 shows a schematic flowchart of a method for manufacturing a display panel according to yet another embodiment of the present disclosure.

[0041] Figure 9 shows a schematic flowchart of a method for manufacturing a display panel according to yet another embodiment of the present disclosure.

[0042] Figure 10 shows a partial structural schematic diagram of the display panel after step S501 of the manufacturing method in Figure 9 is performed.

[0043] Figure 11 shows a partial structural schematic diagram of the display panel after step S502 of the manufacturing method in Figure 9 is performed.

[0044] Figure 12 shows a top view of the display panel in Figure 11.

[0045] Figure 13 shows a partial structural schematic diagram of the display panel after step S503 of the manufacturing method in Figure 9 is performed.

[0046] Figure 14 shows a top view of the display panel in Figure 13.

[0047] Figure 15 shows a partial structural schematic diagram of the display panel after step S504 of the manufacturing method in Figure 9 is performed.

[0048] Figure 16 shows a top view of the display panel in Figure 15.

[0049] Figure 17 shows a schematic diagram of the structure of the display panel after step S505 is performed in the manufacturing method of Figure 9.

[0050] Figure 18 shows a schematic diagram of the display panel structure after step S506 is performed in the manufacturing method of Figure 9.

[0051] Figure 19 shows a schematic diagram of the structure of the display panel after step S507 of the manufacturing method in Figure 9 is performed.

[0052] Figure 20 shows a schematic diagram of the display panel structure after step S508 is performed in the manufacturing method of Figure 9.

[0053] Explanation of reference numerals in the attached figures: 10: Substrate; 11: Pixel area; 12: Isolation area; 13: Display area; 14: Border area; 20: First insulating layer; 21: First insulating structure; 210: First connecting hole; 30: First electrode layer; 31: First electrode; 32: Auxiliary electrode; 40: Light-emitting layer; 50: Second electrode layer; 60: Metal layer; 61: Transition part; 62: Conductive part; 71: Driving circuit; 72: Second insulating layer; 720: Second connecting hole; 81: Dike; 82: First inorganic encapsulation layer; 83: Organic encapsulation layer; 84: Second inorganic encapsulation layer; 91: Pixel definition layer; 910: Opening; 92: Pixel encapsulation layer. Detailed Implementation

[0054] To enable those skilled in the art to more clearly understand this disclosure, the technical solutions in the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this disclosure, and not all of them. Based on the embodiments of this disclosure, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this disclosure.

[0055] Figure 1 is a top view of the display panel in one or more embodiments of the present disclosure, and Figure 2 is a partial view of the display panel in Figure 1 along the A-A' section line. Referring to Figures 1 and 2, a first aspect of the present disclosure provides a display panel, which includes a substrate 10, a first insulating layer 20, a first electrode layer 30, a light-emitting layer 40, and a second electrode layer 50.

[0056] The substrate 10 has a plurality of mutually spaced pixel regions 11 and an isolation region 12 located between two adjacent pixel regions 11. The first insulating layer 20 includes a first insulating structure 21 located in each pixel region 11. The angle between the side surface of the first insulating structure 21 and the first bottom surface is an acute angle, and the first bottom surface is the surface of the first insulating structure 21 away from the substrate 10.

[0057] The first electrode layer 30 includes a first electrode 31 and an auxiliary electrode 32 located in each pixel region 11 and spaced apart from each other. The first electrode 31 covers a portion of the first bottom surface. The auxiliary electrode 32 covers at least a portion of the first bottom surface and the side surface of the first insulating structure 21. The light-emitting layer 40 is located on the side of the first electrode layer 30 away from the substrate 10. The second electrode layer 50 is located on the side of the light-emitting layer 40 away from the substrate 10. The first electrode 31, the light-emitting layer 40, and the second electrode layer 50 of each pixel region 11 form a light-emitting structure.

[0058] For example, the light-emitting layer 40 may be disconnected at the edge of the first bottom surface. The light-emitting layer 40 is connected to the first electrode 31 and the auxiliary electrode 32 of the same pixel area 11, respectively.

[0059] The second electrode layer 50 can be continuously disposed on the side of the light-emitting layer 40 away from the substrate 10 and on the side of the auxiliary electrode 32 away from the first insulating structure 21. The second electrode layer 50 is connected to the light-emitting layer 40 and the auxiliary electrode 32 in the same pixel area 11, respectively.

[0060] The aforementioned display panel includes a substrate 10, a first insulating layer 20, a first electrode layer 30, a light-emitting layer 40, and a second electrode layer 50. The substrate 10 has a plurality of mutually spaced pixel regions 11 and an isolation region 12 located between two adjacent pixel regions 11. The first electrode layer 30 includes a first electrode 31 and an auxiliary electrode 32 located in each pixel region 11 and spaced apart from each other. The light-emitting layer 40 is located on the side of the first electrode layer 30 away from the substrate 10 and is respectively connected to the first electrode 31 and the auxiliary electrode 32 of the same pixel region 11. The second electrode layer 50 is continuously disposed on the side of the light-emitting layer 40 and the auxiliary electrode 32 away from the substrate 10 and is respectively connected to the light-emitting layer 40 and the auxiliary electrode 32 of the same pixel region 11, so that the first electrode 31, the light-emitting layer 40, and the second electrode layer 50 of each pixel region 11 form a light-emitting structure.

[0061] OLED display panels have high pixel density, and functional layers such as the organic light-emitting layer are typically fabricated using FMM (Fine Metal Mask) through methods such as vapor deposition. However, FMM is insufficient to meet the ever-increasing demands of screens. The first insulating layer 20 in this disclosure includes first insulating structures 21 located in each pixel region 11. The angle between the side surface and the first bottom surface of the first insulating structure 21 is acute. The first bottom surface is the surface of the first insulating structure 21 away from the substrate 10. This allows the light-emitting layer 40 to automatically break at the edge of the first bottom surface, replacing FMM to pattern the light-emitting layer 40. This overcomes the limitations of FMM in terms of technology, supply, and processes, achieving higher precision pixel patterns, reducing the manufacturing cost of OLED display panels, and avoiding pixel crosstalk and other problems associated with FMM. This improves the display effect of OLED display panels and meets the ever-increasing screen demands of the market. Furthermore, the first insulating structures 21 form isolation trenches, and the light-emitting layer 40 breaks at these trenches, isolating moisture failure paths and achieving sub-pixel encapsulation.

[0062] In addition, the auxiliary electrode 32 covers at least a portion of the first bottom surface and the side of the first insulating structure 21. The second electrode layer 50 is continuously disposed on the side of the auxiliary electrode 32 away from the first insulating structure 21. Both the first electrode layer 30 and the second electrode layer 50 can be continuously disposed at the edge of the first bottom surface, which is beneficial for the cathode to be connected to the VSS (Voltage Source and Sink) at the isolation trench, reducing the VSS trace voltage drop, thereby reducing display power consumption, improving display uniformity, and enabling a narrow bezel design.

[0063] For example, the side surface of the first insulating structure 21 is the surface of the first insulating structure 21 facing the isolation region 12. An isolation groove is formed between two adjacent first insulating structures 21, and the side surface of the first insulating structure 21 is also the inner wall surface of the isolation groove.

[0064] The side surface of the first insulating structure 21 can be directly connected to the first bottom surface, or they can be connected through a connecting surface. The connecting surface can be a plane or a curved surface, such as the arc surface shown in Figure 2, which is beneficial for the auxiliary electrode 32 and the second electrode layer 50 to be continuously arranged at the edge of the first bottom surface.

[0065] For example, the angle between the side surface and the first bottom surface of the first insulating structure 21 in different pixel areas can be different. For instance, the pixel area 11 where the red light-emitting layer 40 is located is a red pixel area, the pixel area 11 where the green light-emitting layer 40 is located is a green pixel area, and the pixel area 11 where the blue light-emitting layer 40 is located is a blue pixel area. The angle between the side surface and the first bottom surface of the first insulating structure 21 in the blue pixel area can be smaller than the angle between the side surface and the first bottom surface of the first insulating structure 21 in the green pixel area, and it can also be smaller than the angle between the side surface and the first bottom surface of the first insulating structure 21 in the red pixel area. The blue pixel area has a higher operating voltage and is more prone to lateral leakage. The large angle between the side surface and the first bottom surface of the first insulating structure 21 in the blue pixel area can ensure that the blue light-emitting layer 40 is effectively isolated at the edge of the first bottom surface.

[0066] In some embodiments, referring to FIG1, multiple pixel areas 11 can be arranged in an array, with isolation areas 12 between adjacent rows of pixel areas 11 and isolation areas 12 between adjacent columns of pixel areas 11 arranged in a grid pattern.

[0067] For example, the light-emitting layer 30 of each pixel area 11 can be a light-emitting layer 30 of the same color or a light-emitting layer 30 of different colors.

[0068] The pixel areas 11 containing different colored light-emitting layers 30 can have the same or different shapes. For example, the pixel area 11 containing the red light-emitting layer 40 is a red pixel area, the pixel area 11 containing the green light-emitting layer 40 is a green pixel area, and the pixel area 11 containing the blue light-emitting layer 40 is a blue pixel area. The shapes of the red and blue pixel areas can be squares, while the shape of the green pixel area can be a rectangle.

[0069] The pixel areas 11 containing different colored emissive layers 30 can be the same or different. For example, the pixel area 11 containing the red emissive layer 40 is the red pixel area, the pixel area 11 containing the green emissive layer 40 is the green pixel area, and the pixel area 11 containing the blue emissive layer 40 is the blue pixel area. The area of ​​the blue pixel area can be larger than the area of ​​the red pixel area or the area of ​​the green pixel area. The human eye has lower sensitivity to blue, so a larger blue pixel area and a larger emissive area for blue pixels is beneficial for visual color balance. Furthermore, the lifespan of the emissive material in blue pixels is shorter, and a larger blue pixel area also helps to extend the lifespan of the display panel.

[0070] In some embodiments, the spacing between the first insulating structures 21 of two adjacent pixel regions 11, i.e., the width of the isolation trench, is related to the spacing between the first electrodes 31 of the two adjacent pixel regions 11. A smaller width for the isolation trench than the spacing between the first electrodes 31 of the two adjacent pixel regions 11 facilitates isolation between the first electrodes 31 of the two pixel regions 11. For example, if the spacing between the first electrodes 31 of the two adjacent pixel regions 11 is 10μm to 15μm, such as 10μm, 11μm, 12μm, 13μm, 14μm, 15μm, etc., then the width of the isolation trench can be 5μm to 10μm, such as 5μm, 6μm, 7μm, 8μm, 9μm, 10μm, etc.

[0071] For example, in the direction away from the isolation region 12, the length of the first electrode 31 can be 30μm to 35μm, such as 30μm, 31μm, 32μm, 33μm, 34μm, 35μm, etc. The ratio of the length of the first electrode 31 to the width of the isolation groove can be 3:1 to 4:1, such as 3:1, 16:5, 4:1, etc., which is beneficial for isolation between the first electrodes 31 of the two pixel regions 11.

[0072] In some embodiments, the first insulating layer 20 can be a negative photoresist layer. By using negative photoresist to form the first insulating structure 21, it is advantageous that the angle between the side surface and the first bottom surface of the first insulating structure 21 is an acute angle, and the first bottom surface is the surface of the first insulating structure 21 away from the substrate 10.

[0073] For example, the angle between the side surface and the first bottom surface of the first insulating structure 21 can be 30° to 80°, such as 30°, 40°, 50°, 51°, 52°, 53°, 54°, 55°, 56°, 57°, 58°, 59°, 60°, 70°, 80°, etc. When the first insulating layer 20 is a negative photoresist layer, the first insulating layer 20 is photolithographically ...

[0074] For example, in the direction perpendicular to the substrate 10, the thickness of the first insulating layer 20 can be 1.3μm to 1.5μm, such as 1.3μm, 1.35μm, 1.4μm, 1.45μm, 1.5μm, etc., which is beneficial for the light-emitting layer 40 to be broken at the edge of the first bottom surface.

[0075] In some embodiments, the first electrode layer 30 may include a first sublayer, a second sublayer, and a third sublayer stacked sequentially along a direction away from the substrate 10, wherein the first sublayer and the third sublayer are made of the same material, and the second sublayer and the third sublayer are made of different materials.

[0076] For example, the materials of the first and third sublayers can be ITO (Indium Tin Oxide), and the material of the second sublayer can be Ag.

[0077] For example, in the direction perpendicular to the substrate 10, the thickness of the first sublayer can be less than the thickness of the third sublayer, and the thickness of the second sublayer can be greater than the thickness of the third sublayer.

[0078] In the direction perpendicular to the substrate 10, the thickness of the first sublayer can be 25 angstroms to 35 angstroms, such as 25 angstroms, 26 angstroms, 27 angstroms, 28 angstroms, 29 angstroms, 30 angstroms, 31 angstroms, 32 angstroms, 33 angstroms, 34 angstroms, 35 angstroms, etc.

[0079] In the direction perpendicular to the substrate 10, the thickness of the second sublayer can be 800 angstroms to 900 angstroms, such as 800 angstroms, 810 angstroms, 820 angstroms, 830 angstroms, 840 angstroms, 850 angstroms, 860 angstroms, 870 angstroms, 880 angstroms, 890 angstroms, 900 angstroms, etc.

[0080] In the direction perpendicular to the substrate 10, the thickness of the third sublayer can be 60 angstroms to 80 angstroms, such as 60 angstroms, 65 angstroms, 70 angstroms, 75 angstroms, 80 angstroms, etc.

[0081] In some embodiments, referring to FIG2, the display panel may further include a metal layer 60, which is located between the first insulating layer 20 and the substrate 10. The metal layer 60 includes a transition portion 61 located in each pixel region 11. The first insulating structure 21 of each pixel region 11 has a first through hole 210. The first electrode 31 of each pixel region 11 is connected to the transition portion 61 of the same pixel region 11 through the first through hole 210 of the same pixel region 11.

[0082] Referring to FIG2, the display panel may further include a driving circuit layer and a second insulating layer 72. The driving circuit layer is located between the metal layer 60 and the substrate 10, and includes driving circuits 71 for each pixel region 11. The second insulating layer 72 is located between the driving circuit layer and the metal layer 60. The second insulating layer 72 has second through holes 720 located in each pixel region 11, and the transition portion 61 of each pixel region 11 is connected to the driving circuit 71 of the same pixel region 11 through the second through holes 720 of the same pixel region 11.

[0083] For example, the orthographic projection of the adapter 61 on the substrate 10 can be a subset of the orthographic projection of the first insulating structure 21 of the same pixel area 11 on the substrate 10. The orthographic projection of the first connecting hole 210 on the substrate 10 does not intersect with the orthographic projection of the isolation groove on the substrate 10.

[0084] For example, the orthographic projection of the adapter 61 on the substrate 10 may overlap with the orthographic projection of the first electrode 31 on the substrate 10 in the same pixel area 11. The orthographic projection of the first connecting hole 210 on the substrate 10 may be a subset of the overlapping area of ​​the adapter 61 and the orthographic projection of the first electrode 31 on the substrate 10 in the same pixel area 11.

[0085] The orthographic projection of the adapter 61 onto the substrate 10 can overlap with the orthographic projection of the driving circuit 71 in the same pixel area 11 onto the substrate 10. The orthographic projection of the second connecting hole 720 onto the substrate 10 can be a subset of the overlapping area of ​​the orthographic projections of the adapter 61 and the driving circuit 71 in the same pixel area 11 onto the substrate 10.

[0086] For example, the angle between the sidewall of the first connecting hole 210 and the first bottom surface can be the same as the angle between the side surface of the first insulating structure 21 and the first bottom surface. That is, the angle between the sidewall of the first connecting hole 210 and the first bottom surface is an acute angle. The angle between the sidewall of the first connecting hole 210 and the first bottom surface can be 50° to 60°, such as 50°, 51°, 52°, 53°, 54°, 55°, 56°, 57°, 58°, 59°, 60°, etc. Here, the opening width of the first connecting hole 210 on the side away from the substrate 10 is smaller than the opening width on the side closer to the substrate 10, which is beneficial to increasing the contact area between the first electrode 31 and the transition portion 61 in the first connecting hole 210 and reducing the contact resistance.

[0087] For example, the orthographic projection of the first connecting hole 210 onto the substrate 10 can be a rectangle. The length of the rectangle can be 3μm to 5μm, such as 3μm, 3.5μm, 4μm, 4.5μm, 5μm, etc. The width of the rectangle can be 2μm to 4μm, such as 2μm, 2.5μm, 3μm, 3.5μm, 4μm, etc. The ratio of the width of the rectangle to the width of the isolation trench can be 1:3 to 1:2, such as 1:3, 3:7, 1:2, etc., which is beneficial for isolation between the first electrodes 31 of the two pixel regions 11.

[0088] In some embodiments, referring to FIG2, the metal layer 60 may further include a conductive portion 62 located in the isolation region 12 and the pixel region 11. The conductive portion 62 is spaced apart from the transition portion 61, and the auxiliary electrode 32 is connected to the conductive portion 62. The second electrode layer 50 is connected to the conductive portion 62 through the auxiliary electrode 32, so that the cathode is connected to the VSS at the isolation trench. Compared with the cathode being connected to the VSS at the edge of the display panel, this can effectively reduce the VSS trace voltage drop, thereby reducing display power consumption and improving display uniformity. Moreover, the VSS traces at the edge of the display panel can be reduced or even eliminated, reducing the space occupied at the edge of the display panel and achieving a narrow bezel.

[0089] For example, referring to FIG2, the conductive portion 62 may be partially located between the second bottom surface of the first insulating structure 21 and the substrate 10, wherein the second bottom surface is the surface of the first insulating structure 21 near the substrate 10. The conductive portion 62 being partially sandwiched between the first insulating structure 21 and the substrate 10 ensures that it can be connected to the conductive portion 62 via the auxiliary electrode 32, allowing the second electrode layer 50 to be connected to the conductive portion 62 via the auxiliary electrode 32, reducing display power consumption, and enabling a narrow bezel design.

[0090] For example, referring to FIG2, the auxiliary electrode 32 may include a first part, a second part, and a third part connected in sequence. The first part covers a portion of the first bottom surface, the second part covers the side surface of the first insulating structure 21, and the third part covers a portion of the conductive part 62 away from the substrate 10. By covering the conductive part 62 with the auxiliary electrode 32, the contact area between the auxiliary electrode 32 and the conductive part 62 can be increased, ensuring that the auxiliary electrode 32 can be connected to the conductive part 62. This allows the second electrode layer 50 to be connected to the conductive part 62 through the auxiliary electrode 32, reducing display power consumption and enabling a narrow bezel design.

[0091] For example, the orthographic projection of the third portion of the auxiliary electrode 32 onto the substrate 10 can be an annular shape, such as a square ring.

[0092] For example, referring to Figure 2, the width W of the third part of the auxiliary electrode 32 in the direction near the isolation region 12 can be 1μm to 3μm, such as 1μm, 1.5μm, 2μm, 2.5μm, 3μm, etc.

[0093] For example, in the direction near the isolation region 12, the width of the third portion of the auxiliary electrode 32 can be 10% to 30% of the width of the conductive portion 62, such as 10%, 15%, 20%, 25%, 30%, etc. The width of the conductive portion 62 can be 8μm to 12μm, such as 8μm, 9μm, 10μm, 11μm, 12μm, etc.

[0094] In some embodiments, referring to FIG2, the first electrode layer 30, the light-emitting layer 40, and the second electrode layer 50 may both be disconnected at the edge of the pixel area 11.

[0095] In some embodiments, the display panel may include a red light-emitting layer 40, a green light-emitting layer 40, and a blue light-emitting layer 40. The pixel area 11 where the red light-emitting layer 40 is located is the red pixel area, the pixel area 11 where the green light-emitting layer 40 is located is the green pixel area, and the pixel area 11 where the blue light-emitting layer 40 is located is the blue pixel area.

[0096] For example, the conductive parts 62 in the red pixel area can be connected to each other, the conductive parts 62 in the green pixel area can be connected to each other, and the conductive parts 62 in the blue pixel area can be connected to each other.

[0097] Figure 3 is a schematic diagram of the connection method of the conductive parts of the display panel in another embodiment of this disclosure. Referring to Figure 3, in one possible embodiment, the conductive parts 62 of the red pixel area, the conductive parts 62 of the green pixel area, and the conductive parts 62 of the blue pixel area may not be connected to each other. The conductive parts 62 of the same pixel area 11 are connected to each other, and the conductive parts 62 of different pixel areas 11 are designed separately. In this way, the VSS of different color sub-pixels can be designed separately, which is beneficial to reduce display power consumption and improve display quality.

[0098] In another possible embodiment, referring to FIG1, the conductive portions 62 of the red pixel area, the green pixel area, and the blue pixel area can be interconnected. In this way, the conductive portions 62 of different pixel areas 11 can be wired on the same layer, connecting the VSS of the pixel areas 11 where the light-emitting layers 40 of different colors are located together, which can not only reduce power consumption, but also save on mask costs.

[0099] For example, referring to FIG2, the isolation region 12 may be located within the orthographic projection of the conductive portion 62 on the substrate 10.

[0100] In some embodiments, referring to FIG1, the substrate 10 has a display area 13 and a border area 14 that at least partially surrounds the display area 13, and a pixel area 11 and an isolation area 12 are located in the display area 13.

[0101] Figure 4 is a partial structural schematic diagram of a display panel in another embodiment of this disclosure. Referring to Figure 4, exemplarily, the display panel may further include a dike 81, a first inorganic encapsulation layer 82, an organic encapsulation layer 83, and a second inorganic encapsulation layer 84. The dike 81 is located in the border area 14. The first inorganic encapsulation layer 82 is located on the side of the dike 81 and the second electrode layer 50 away from the substrate 10, and is continuously disposed in the display area 13 and the border area 14. The organic encapsulation layer 83 is located on the side of the first inorganic encapsulation layer 82 away from the substrate 10, and is interrupted at the side of the dike 81 facing the second electrode layer 50. The second inorganic encapsulation layer 84 is located on the side of the organic encapsulation layer 83 and the first inorganic encapsulation layer 82 away from the substrate 10, and is continuously disposed in the display area 13 and the border area 14.

[0102] In the above embodiment, the organic encapsulation layer 83 is broken at the side of the dike 81 facing the second electrode layer 50. The first inorganic encapsulation layer 82 below the organic encapsulation layer 83 and the second inorganic encapsulation layer 84 above the organic encapsulation layer 83 both cross the dike 81 and are continuously arranged in the display area 13 and the frame area 14, which is beneficial for isolating water vapor.

[0103] For example, referring to Figure 4, the display panel may also include at least two dikes 81, which are arranged sequentially in a direction away from the display area 11.

[0104] In some embodiments, referring to Figures 2 and 4, the display panel may further include a pixel definition layer 91 located between the first electrode layer 30 and the light-emitting layer 40. The pixel definition layer 91 has an opening 910 exposing the first electrode 31, and the angle between the sidewall of the opening 910 and the surface of the first electrode 21 is an obtuse angle. The light-emitting layer 40 is continuously disposed inside and outside the opening 910 and is connected to the first electrode 31 through the opening 910.

[0105] For example, the sidewall of the opening 910 is the side of the pixel definition layer 91 facing the opening 910.

[0106] For example, the orthographic projection of the opening 910 on the substrate 10 can be a subset of the orthographic projection of the first electrode 31 on the substrate 10, or it can be non-intersecting with the orthographic projection of the first connecting hole 210 on the substrate 10 and the orthographic projection of the isolation trench on the substrate 10.

[0107] For example, the orthographic projection of the opening 910 onto the substrate 10 can be square. The side length of the square can be 25μm to 30μm, such as 25μm, 26μm, 27μm, 28μm, 29μm, 30μm, etc. The ratio of the side length of the square to the width of the isolation groove can be 3:1 to 5:1, such as 3:1, 7:2, 4:1, 9:2, 5:1, etc. The ratio of the side lengths of the orthographic projections of the opening 910 and the first connecting hole 210 onto the substrate 10 can be 7:1 to 10:1, such as 7:1, 8:1, 9:1, 28:3, 10:1, etc. The ratio of the side lengths of the orthographic projections of the opening 910 and the first electrode 31 onto the substrate 10 can be 5:6 to 9:10, such as 5:6, 6:7, 7:8, 8:9, 9:10, etc.

[0108] In some embodiments, referring to Figures 2 and 4, the display panel may also include a pixel encapsulation layer 92 that covers the side of the second electrode layer 50 away from the substrate 10.

[0109] A second aspect of this disclosure provides a display device that includes a display panel as provided in any of the above embodiments.

[0110] Figure 5 is a flowchart illustrating a method for manufacturing a display panel according to one or more embodiments of the present disclosure. Referring to Figure 5, a third aspect of the present disclosure provides a method for manufacturing a display panel, which includes the following steps S101 to S105.

[0111] Step S101: Provide a substrate having a plurality of mutually spaced pixel regions and an isolation region located between two adjacent pixel regions.

[0112] Step S102: A first insulating layer is formed on the substrate. The first insulating layer includes a first insulating structure located in each pixel area. The angle between the side surface of the first insulating structure and the first bottom surface is an acute angle. The first bottom surface is the surface of the first insulating structure away from the substrate.

[0113] Step S103: A first electrode layer is formed on the first insulating layer. The first electrode layer includes a first electrode and an auxiliary electrode located in each pixel area and spaced apart from each other. The first electrode covers a portion of the first bottom surface, and the auxiliary electrode covers at least a portion of the first bottom surface and the side surface of the first insulating structure.

[0114] For example, the first electrode layer can be formed using magnetron sputtering technology. Magnetron sputtering is a collision process between incident particles and the target material. After the target atoms gain sufficient energy, they leave the target material and form a coating by impacting the target material. The coating has the advantages of large thickness and good ductility. It can be continuously set at the edge of the first bottom surface, or the first electrode and the auxiliary electrode can be set at intervals.

[0115] Step S104: A light-emitting layer is formed on the first electrode layer.

[0116] For example, the light-emitting layer may be broken at the edge of the first bottom surface, and the light-emitting layer is connected to the first electrode and the auxiliary electrode in the same pixel area, respectively.

[0117] For example, the light-emitting layer can be formed using a high-temperature vapor deposition technique and can be automatically broken at the edge of the first bottom surface.

[0118] In step S105, a second electrode layer is formed on the light-emitting layer, and the first electrode, the light-emitting layer and the second electrode layer of each pixel area form a light-emitting structure.

[0119] For example, the second electrode layer can be continuously disposed on the side of the light-emitting layer away from the substrate and on the side of the auxiliary electrode away from the first insulating structure, and the second electrode layer is connected to the light-emitting layer and the auxiliary electrode in the same pixel area respectively.

[0120] For example, the second electrode layer can be formed using magnetron sputtering technology and can be continuously disposed at the edge of the first bottom surface.

[0121] The above manufacturing method first provides a substrate and forms a first insulating layer on the substrate. The substrate has multiple mutually spaced pixel regions and isolation regions located between adjacent pixel regions. The first insulating layer includes a first insulating structure located in each pixel region. The angle between the side surface of the first insulating structure and the first bottom surface is an acute angle. The first bottom surface is the surface of the first insulating structure away from the substrate. Next, a first electrode layer is formed on the first insulating layer. The first electrode layer includes a first electrode and an auxiliary electrode located in each pixel region and spaced apart from each other. The first electrode covers a portion of the first bottom surface, and the auxiliary electrode covers at least a portion of the first bottom surface and the side surface of the first insulating structure. The first electrode layer is made of a ductile metal material and can be continuously disposed at the edge of the first bottom surface.

[0122] Then, a light-emitting layer is formed on the first electrode layer, and the light-emitting layer is connected to the first electrode and auxiliary electrode in the same pixel area, respectively. The acute angle formed between the side surface of the first insulating structure and the first bottom surface away from the substrate causes the light-emitting layer on the first insulating structure to automatically disconnect at the edge of the first bottom surface. This can replace the FMM (Focused Mirror Model) for patterning the light-emitting layer, eliminating the limitations of FMM in technology, supply, and processes, achieving higher precision pixel patterns, reducing the implementation cost of OLED display panels, and avoiding pixel crosstalk and other problems that occur with FMM, thus improving the display effect of OLED display panels and meeting the ever-increasing screen demands of the market.

[0123] Finally, a second electrode layer is formed on the light-emitting layer and the auxiliary electrode. The second electrode layer is connected to the light-emitting layer and the auxiliary electrode of the same pixel area, respectively. The first electrode, the light-emitting layer and the second electrode layer of each pixel area form a light-emitting structure.

[0124] Figure 6 is a flowchart of step S102 in the manufacturing method of Figure 5. Referring to Figure 6, in some embodiments, step S102 may include steps S201 to S203.

[0125] Step S201: Lay negative photoresist on the substrate.

[0126] Step S202: Expose a portion of the negative photoresist in each pixel area using a photomask.

[0127] In step S203, the exposed negative photoresist is developed, and the remaining negative photoresist forms the first insulating structure.

[0128] In some embodiments, the first insulating structure of each pixel region has a first through hole. Figure 7 is a schematic flowchart of a method for manufacturing a display panel according to another embodiment of the present disclosure. Referring to Figure 7, before step S102, the manufacturing method may further include the following steps S301 to S303.

[0129] Step S301: A driving circuit layer is formed on the substrate, the driving circuit layer including driving circuits for each pixel area.

[0130] Step S302: A second insulating layer is formed on the driving circuit layer, the second insulating layer having second through holes located in each pixel area.

[0131] In step S303, a metal layer is formed on the second connecting hole and the second insulating layer. The metal layer includes a transition portion located in each pixel area. The transition portion of each pixel area is connected to the driving circuit of the same pixel area through the second connecting hole of the same pixel area. The first electrode of each pixel area is connected to the transition portion of the same pixel area through the first connecting hole of the same pixel area.

[0132] For example, the metal layer may also include conductive portions located in the isolation region and the pixel region, with the conductive portions spaced apart from the transition portions.

[0133] In some embodiments, prior to step S104, the manufacturing method may further include the following steps: forming a pixel definition layer on a first bottom surface and a first electrode layer on the first bottom surface, the pixel definition layer having an opening communicating with the first electrode.

[0134] Accordingly, step S104 may include the following steps: forming a light-emitting layer on the pixel definition layer, the first electrode inside the opening, and the auxiliary electrode, wherein the light-emitting layer is connected to the first electrode through the opening.

[0135] Figure 8 is a flowchart illustrating a method for manufacturing a display panel in another embodiment of this disclosure. Referring to Figure 8, in some embodiments, after step S105, the manufacturing method may further include steps S401 to S403.

[0136] Step S401: Cover the second electrode layer of each pixel region with a pixel encapsulation layer.

[0137] Step S402: Remove the pixel encapsulation layer, the second electrode layer, and the light-emitting layer of at least one pixel area to expose the first electrode layer.

[0138] In step S403, the light-emitting layer, the second electrode layer, and the pixel encapsulation layer are sequentially re-formed on the exposed first electrode layer. The color of the re-formed light-emitting layer is different from the color of the removed light-emitting layer.

[0139] Figure 9 is a flowchart illustrating a method for manufacturing a display panel in another embodiment of this disclosure. Referring to Figure 9, in some embodiments, the manufacturing method may include the following steps S501 to S508.

[0140] Step S501: Provide a substrate, and sequentially form a driving circuit layer, a second insulating layer, and a metal layer on the substrate.

[0141] For example, the substrate has a plurality of mutually spaced pixel regions and an isolation region located between two adjacent pixel regions. Figure 10 is a partial structural schematic diagram of the display panel after step S501 of the manufacturing method of Figure 9 is performed. Referring to Figure 10, the driving circuit layer includes driving circuits 71 for each pixel region 11. The second insulating layer 72 has second connecting holes 720 located in each pixel region 11. The metal layer 60 includes a transition portion 61 located in each pixel region 11, and the transition portion 61 of each pixel region 11 is connected to the driving circuit 71 of the same pixel region 11 through the second connecting hole 720 of the same pixel region 11. The metal layer 60 also includes conductive portions 62 located in the isolation region 12 and the pixel region 11, and the conductive portions 62 are spaced apart from the transition portions 61 so as to be subsequently connected to the second electrode layer through auxiliary electrodes.

[0142] Step S502: A first insulating layer is formed on the metal layer and the second insulating layer.

[0143] Figure 11 is a partial structural schematic diagram of the display panel after step S502 of the manufacturing method in Figure 9, and Figure 12 is a top view of the display panel in Figure 11. Referring to Figures 11 and 12, exemplarily, the first insulating layer 20 includes a first insulating structure 21 located in each pixel region 11. The angle between the side surface of the first insulating structure 21 and the first bottom surface is an acute angle, and the first bottom surface is the surface of the first insulating structure 21 away from the substrate 10. Each pixel region 11 has a first connecting hole 210, and the angle between the sidewall of the first connecting hole 210 and the first bottom surface is also an acute angle. The aperture of the first connecting hole 210 is smaller than the spacing between two adjacent first insulating structures 21.

[0144] For example, the pixel area containing the red emitting layer is called the red pixel area, the pixel area containing the green emitting layer is called the green pixel area, and the pixel area containing the blue emitting layer is called the blue pixel area. The first connecting holes in the same column of red pixels can be arranged collinearly, the first connecting holes in the same column of green pixels can be arranged collinearly, and the first connecting holes in the same column of blue pixels can be arranged collinearly. The first connecting holes in the red pixel area, the first connecting holes in the green pixel area, and the first connecting holes in the blue pixel area can be not arranged collinearly. Here, collinear arrangement means that the center points of the first connecting holes are located on the same straight line.

[0145] Step S503: A first electrode layer is formed on the first insulating layer and the metal layer.

[0146] Figure 13 is a partial structural schematic diagram of the display panel after step S503 of the manufacturing method in Figure 9 is performed, and Figure 14 is a top view of the display panel in Figure 13. Referring to Figures 13 and 14, exemplarily, the first electrode layer 30 includes first electrodes 31 and auxiliary electrodes 32 located in each pixel area 11 and spaced apart from each other. The first electrodes 31 fill the first connecting holes of the same pixel area 11 and are connected to the transition portion 61 of the same pixel area 11, and cover a portion of the first bottom surface. The auxiliary electrodes 32 at least cover a portion of the first bottom surface and the side surface of the first insulating structure 21, and are continuously disposed at the edge of the first bottom surface.

[0147] For example, referring to Figure 14, the auxiliary electrode 32 can be located on different sides of the first electrode 31, and the distance between the auxiliary electrode 32 and the first electrode 31 on different sides can be different.

[0148] Step S504: A pixel definition layer is formed on the first electrode layer and the first insulating layer.

[0149] Figure 15 is a partial structural schematic diagram of the display panel after step S504 of the manufacturing method in Figure 9 is performed, and Figure 16 is a top view of the display panel in Figure 15. Referring to Figures 15 and 16, exemplarily, the pixel definition layer 91 covers a portion of the first electrode layer 30 on the first bottom surface, as well as the exposed area on the first bottom surface between the first electrode 31 and the auxiliary electrode 32. The pixel definition layer 91 has an opening 910 communicating with the first electrode 31. The angle between the sidewall of the opening 910 and the bottom surface is an obtuse angle, so that the subsequent light-emitting layer 20 is continuously disposed inside and outside the opening 910.

[0150] For example, referring to FIG16, in the direction close to the isolation region 12, the width of the first part of the auxiliary electrode 32 on different sides of the first electrode 31 may be different, and the width of the third part of the auxiliary electrode 32 on different sides of the first electrode 31 may be different.

[0151] Step S505: A light-emitting layer and a second electrode layer are sequentially formed on the pixel definition layer and the first electrode layer.

[0152] Figure 17 is a schematic diagram of the display panel structure after step S505 of the manufacturing method in Figure 9 is performed. Referring to Figure 17, exemplarily, the light-emitting layer 40 is broken at the edge of the first bottom surface, covering only the first electrode 31 and auxiliary electrode 32 on the first bottom surface, and the auxiliary electrode 32 on the conductive part 62, and is connected to the first electrode 31 and auxiliary electrode 32 of the same pixel area respectively. The auxiliary electrode 32 on the side of the first insulating structure 21 is not covered by the light-emitting layer 40. The second electrode layer 50 is continuously disposed at the edge of the first bottom surface, and is connected to the light-emitting layer 40 and auxiliary electrode 32 of the same pixel area 11 respectively, thereby connecting to the conductive part 62 through the auxiliary electrode 32. The first electrode 31, the light-emitting layer 40 and the second electrode layer 50 of each pixel area 11 form a light-emitting structure.

[0153] Step S506: Cover the second electrode layer of each pixel region with a pixel encapsulation layer.

[0154] Figure 18 is a schematic diagram of the structure of the display panel after step S506 is performed in the manufacturing method of Figure 9. Referring to Figure 18, by way of example, the pixel encapsulation layer 92 covers the second electrode layer 50 and the conductive portion 62.

[0155] Step S507: Remove the pixel encapsulation layer, the second electrode layer, and the light-emitting layer of at least one pixel area to expose the first electrode layer.

[0156] Figure 19 is a schematic diagram of the display panel structure after step S507 of the manufacturing method in Figure 9 is performed. Referring to Figure 19, by way of example, the pixel encapsulation layer 92, the second electrode layer 50, and the light-emitting layer 40 of one pixel area 11 are retained, while the pixel encapsulation layer 92, the second electrode layer 50, and the light-emitting layer 40 of another pixel area 11 are removed, exposing the first electrode layer 30. In addition, the pixel encapsulation layer 92, the second electrode layer 50, and the light-emitting layer 40 of the isolation area 12 are also removed, exposing the conductive portion 62.

[0157] In step S508, the light-emitting layer, the second electrode layer, and the pixel encapsulation layer are sequentially re-formed on the exposed first electrode layer. The color of the re-formed light-emitting layer is different from the color of the removed light-emitting layer.

[0158] Figure 20 is a schematic diagram of the display panel structure after step S508 of the manufacturing method in Figure 9 is performed. Referring to Figure 20, exemplarily, the light-emitting layer 40, the second electrode layer 50, and the pixel encapsulation layer 92 are reformed on the exposed first electrode layer 30. After the light-emitting layers of all colors are formed, the first inorganic encapsulation layer, the organic encapsulation layer, and the second inorganic encapsulation layer are sequentially covered on each pixel encapsulation layer 92 and the isolation region 12.

[0159] In this disclosure, unless otherwise expressly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0160] In the description of this disclosure, it should be understood that the terms “center,” “longitudinal,” “lateral,” “length,” “width,” “thickness,” “upper,” “lower,” “front,” “rear,” “left,” “right,” “vertical,” “horizontal,” “top,” “bottom,” “inner,” “outer,” “clockwise,” and “counterclockwise” indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this disclosure and simplifying the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this disclosure.

[0161] In this disclosure, unless otherwise expressly specified and limited, the terms "connection," "fixed," etc., should be interpreted broadly. For example, "fixed" can mean a fixed connection, a detachable connection, or an integral part; it can mean a mechanical connection or an electrical connection; it can mean a direct connection or an indirect connection through an intermediate medium; it can mean the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this disclosure according to the specific circumstances.

[0162] Furthermore, the use of terms such as "first" and "second" in this disclosure is for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, features defined with "first" or "second" may explicitly or implicitly include one or more features. In the description of this disclosure, "multiple" means two or more, unless otherwise explicitly specified.

[0163] Although embodiments of the present disclosure have been shown and described, those skilled in the art will understand that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the present disclosure, the scope of which is defined by the claims and their equivalents.

Claims

1. A display panel, comprising: a substrate (10) having a plurality of mutually spaced pixel regions (11) and an isolation region (12) between two adjacent pixel regions (11); a first insulating layer (20) comprising a first insulating structure (21) in each pixel region (11); an included angle between a side surface of the first insulating structure (21) and a first bottom surface is an acute angle, the first bottom surface being a surface of the first insulating structure (21) away from the substrate (10); a first electrode layer (30) comprising a first electrode (31) and an auxiliary electrode (32) in each pixel region (11) and mutually spaced; the first electrode (31) covers a partial area of the first bottom surface; the auxiliary electrode (32) covers at least a partial area of the first bottom surface and a side surface of the first insulating structure (21); a light-emitting layer (40) away from the substrate (10) on a side of the first electrode layer (30); and a second electrode layer (50) away from the substrate (10) on a side of the light-emitting layer (40); the first electrode (31), the light-emitting layer (40) and the second electrode layer (50) in each pixel region (11) form a light-emitting structure.

2. The display panel of claim 1, wherein, The light-emitting layer (40) is disconnected at an edge of the first bottom surface; the light-emitting layer (40) is connected to the first electrode (31) and the auxiliary electrode (32) in the same pixel region (11) respectively.

3. The display panel of claim 2, wherein, The second electrode layer (50) is continuously arranged on a side of the light-emitting layer (40) away from the substrate (10) and a side of the auxiliary electrode (32) away from the first insulating structure (21); the second electrode layer (50) is connected to the light-emitting layer (40) and the auxiliary electrode (32) in the same pixel region (11) respectively.

4. The display panel of claim 1, wherein, The included angle between the side surface of the first insulating structure (21) and the first bottom surface is 30°-80°.

5. The display panel of claim 1, wherein, In a direction perpendicular to the substrate (10), a thickness of the first insulating layer (20) is 1.3-1.5 μm. 6.The display panel according to any one of claims 1-5, further comprising: a metal layer (60) between the first insulating layer (20) and the substrate (10); the metal layer (60) comprises a transfer portion (61) in each pixel region (11); the first insulating structure (21) in each pixel region (11) has a first communication hole (210); the first electrode (31) in each pixel region (11) is connected to the transfer portion (61) in the same pixel region (11) through the first communication hole (210) in the same pixel region (11). 7.The display panel according to claim 6, further comprising: a driving circuit layer between the metal layer (60) and the substrate (10); the driving circuit layer comprises a driving circuit (71) in each pixel region (11); and A second insulating layer (72) is located between the driving circuit layer and the metal layer (60); the second insulating layer (72) has a second communication hole (720) in each of the pixel regions (11), and the transition part (61) of each of the pixel regions (11) is connected to the driving circuit (71) of the same pixel region (11) through the second communication hole (720) of the same pixel region (11).

8. The display panel of claim 6, wherein, The metal layer (60) further comprises a conductive part (62) located in the isolation region (12) and the pixel region (11), and the conductive part (62) is arranged separately from the transition part (61), and the auxiliary electrode (32) is connected to the conductive part (62).

9. The display panel of claim 8, wherein, The conductive part (62) is partially located between the second bottom surface of the first insulating structure (21) and the substrate substrate (10), and the second bottom surface is the surface of the first insulating structure (21) close to the substrate substrate (10).

10. The display panel of claim 9, wherein, The auxiliary electrode (32) comprises a first part, a second part and a third part connected in sequence, the first part covers part of the area of the first bottom surface, the second part covers the side surface of the first insulating structure (21), and the third part covers part of the area of the conductive part (62) away from the substrate substrate (10).

11. The display panel of claim 10, wherein, The third part of the auxiliary electrode (32) has a circular shape in the orthographic projection on the substrate substrate (10).

12. The display panel of claim 10, wherein, In the direction close to the isolation region (12), the width of the third part of the auxiliary electrode (32) is 1-3 μm.

13. The display panel of claim 10, wherein, In the direction close to the isolation region (12), the width of the third part of the auxiliary electrode (32) is 10-30% of the width of the conductive part (62).

14. The display panel of any one of claims 1-5, wherein, The first electrode layer (30), the light-emitting layer (40) and the second electrode layer (50) are all disconnected at the edges of the pixel region (11).

15. The display panel of claim 8, wherein, The display panel comprises a red light-emitting layer (40), a green light-emitting layer (40) and a blue light-emitting layer (40), the pixel region (11) where the red light-emitting layer (40) is located is a red pixel region, the pixel region (11) where the green light-emitting layer (40) is located is a green pixel region, and the pixel region (11) where the blue light-emitting layer (40) is located is a blue pixel region. The conductive parts (62) of the red pixel regions are connected to each other, the conductive parts (62) of the green pixel regions are connected to each other, and the conductive parts (62) of the blue pixel regions are connected to each other.

16. The display panel of claim 15, wherein, The conductive parts (62) of the red pixel regions, the conductive parts (62) of the green pixel regions and the conductive parts (62) of the blue pixel regions are not connected to each other.

17. The display panel of claim 15, wherein, The conductive parts (62) of the red pixel regions, the conductive parts (62) of the green pixel regions and the conductive parts (62) of the blue pixel regions are connected to each other.

18. The display panel of claim 17, wherein, The isolation region (12) is located in the orthographic projection of the conductive part (62) on the substrate substrate (10).

19. The display panel of any one of claims 1-5, wherein, The substrate substrate (10) has a display area (13) and a frame area (14) at least partially surrounding the display area (13), the pixel area (11) and the isolation area (12) are located in the display area (13); Also includes: cofferdam (81), located in the frame area (14); The first inorganic encapsulation layer (82) is located on the side of the cofferdam (81) and the second electrode layer (50) away from the substrate substrate (10), and is continuously arranged in the display area (13) and the frame area (14); The organic encapsulation layer (83) is located on the side of the first inorganic encapsulation layer (82) away from the substrate substrate (10), and is discontinuous at the side of the cofferdam (81) towards the second electrode layer (50); and The second inorganic encapsulation layer (84) is located on the side of the organic encapsulation layer (83) and the first inorganic encapsulation layer (82) away from the substrate substrate (10), and is continuously arranged in the display area (13) and the frame area (14).

20. The display panel of any one of claims 1-5, further comprising: A pixel definition layer (91) is located between the first electrode layer (30) and the light-emitting layer (40); The pixel definition layer (91) has an opening (910) exposing the first electrode (31); the included angle between the side wall surface of the opening (910) and the surface of the first electrode (31) is obtuse, and the light-emitting layer (40) is continuously arranged inside and outside the opening (910) and connected with the first electrode (31) through the opening (910).

21. The display panel of any one of claims 1-5, further comprising: A pixel encapsulation layer (92) covers the side of the second electrode layer (50) away from the substrate substrate (10).

22. A display device comprising the display panel of any one of claims 1-21.

23. A manufacturing method of a display panel, comprising: Providing a substrate substrate having a plurality of mutually spaced pixel areas and an isolation area located between two adjacent pixel areas; Forming a first insulating layer on the substrate substrate, the first insulating layer comprising a first insulating structure in each pixel area, the included angle between the side surface of the first insulating structure and the first bottom surface is acute, and the first bottom surface is the surface of the first insulating structure away from the substrate substrate; Forming a first electrode layer on the first insulating layer, the first electrode layer comprising a first electrode and an auxiliary electrode located in each pixel area and spaced apart from each other, the first electrode covering part of the area of the first bottom surface, and the auxiliary electrode covering at least part of the area of the first bottom surface and the side surface of the first insulating structure; Forming a light-emitting layer on the first electrode layer; And Forming a second electrode layer on the light-emitting layer, the first electrode, the light-emitting layer and the second electrode layer of each pixel area forming a light-emitting structure.

24. The manufacturing method of claim 23, wherein, The first insulating layer formed on the substrate substrate comprises: Laying a negative photoresist on the substrate substrate; exposing portions of the negative photoresist of each of the pixel regions through a mask; and developing the exposed negative photoresist, the remaining negative photoresist forming the first insulating structure.

25. The manufacturing method of claim 23, wherein, The first electrode layer and the second electrode layer are formed by magnetron sputtering technology.

26. The manufacturing method of claim 23, wherein, The light-emitting layer is formed by high-temperature evaporation technology.

27. The manufacturing method of any one of claims 23-26, further comprising: after forming the second electrode layer on the light-emitting layer and the auxiliary electrode, covering a pixel encapsulation layer on the second electrode layer of each of the pixel regions; removing the pixel encapsulation layer, the second electrode layer, and the light-emitting layer of at least one of the pixel regions to expose the first electrode layer; and reforming the light-emitting layer, the second electrode layer, and the pixel encapsulation layer in sequence on the exposed first electrode layer, the reforming light-emitting layer having a different color from the removed light-emitting layer. ​

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