Communication method and apparatus

Abstract

A communication method and apparatus, which are used for improving decoding performance in scenarios such as high throughput scenarios or peak-rate scenarios. The method comprises: a first communication apparatus acquires information bits, the information bits comprising a first bit sequence and a second bit sequence; the first communication apparatus performs distribution matching on the first bit sequence, and obtains a distribution-matched first bit sequence; the first communication apparatus performs channel encoding on an input sequence for channel encoding, and acquires codeword sequences, the codeword sequences comprising a first codeword sequence corresponding to the distribution-matched first bit sequence, a second codeword sequence corresponding to the second bit sequence, and a check sequence; and the first communication apparatus obtains modulation symbols on the basis of modulation of the codeword sequences, part or all of the first codeword sequence corresponding to highest amplitude bits of the modulation symbols, part or all of the second codeword sequence corresponding to lowest amplitude bits of the modulation symbols, and part or all of the check sequence corresponding to sign bits of the modulation symbols.

Description

A communication method and apparatus

[0001] Cross-reference of related applications

[0002] This application claims priority to Chinese Patent Application No. 202510075854.4, filed on January 16, 2025, entitled "A Communication Method and Apparatus", the entire contents of which are incorporated herein by reference. Technical Field

[0003] This application relates to the field of mobile communication technology, and in particular to a communication method and apparatus. Background Technology

[0004] Low-density parity-check (LDPC) codes are a channel coding scheme very close to Shannon lines, characterized by high performance and low complexity. They have been selected by the 3rd Generation Partnership Project (3GPP) as the coding and decoding scheme for data channels in 5G communication. Mainstream LDPC codes have a quasi-cyclic (QC) structure, which avoids bad structures such as short cycles and improves code distance by setting the shift amount of each block.

[0005] Current encoding schemes do not consider additional protection for low-reliability bits, resulting in low decoding performance in high-throughput or peak-rate scenarios, which reduces transmission reliability in these scenarios. Summary of the Invention

[0006] This application provides a communication method and apparatus to improve transmission reliability in high-throughput or peak-rate scenarios.

[0007] Firstly, embodiments of this application provide a communication method, which can be executed by a first communication device or a first equipment, or in other words, the method can be applied to a first communication device. Unless otherwise specified, the "first communication device" in this application can refer to the first equipment itself, a component within the first equipment, or a logic module or software capable of implementing all or part of the first equipment. The first equipment can be a transmitting device and / or an encoding device. Specifically, the first equipment can be a terminal or a network device such as a base station. The components in this application may include, for example, at least one of a chip, a chip system, a processor, a transceiver, a processing unit, a transceiver unit, or other functional modules. Taking a first device as the executing entity as an example, the method includes: a first communication device acquiring information bits, the information bits including a first bit sequence and a second bit sequence; the first communication device performing distribution matching on the first bit sequence to obtain a distribution-matched first bit sequence; the first communication device performing channel coding on the input sequence of channel coding to obtain a codeword sequence, wherein the codeword sequence includes a first codeword sequence corresponding to the distribution-matched first bit sequence, a second codeword sequence corresponding to the second bit sequence, and a check sequence; the first communication device performing modulation according to the codeword sequence to obtain a modulation symbol, wherein some or all of the sequences in the first codeword sequence correspond to the highest amplitude bit of the modulation symbol, some or all of the sequences in the second codeword sequence correspond to the lowest amplitude bit of the modulation symbol, and some or all of the sequences in the check sequence correspond to the sign bit of the modulation symbol.

[0008] Based on the method described in the first aspect, part or all of the check sequence corresponds to the sign bit of the modulation symbol. The sign bit can be the position of the highest-energy bit in the modulation symbol. That is, by ensuring that a portion of the sign bit corresponds to the check bit, the energy of that portion or all of the check sequence is high, thus improving the reliability of the check sequence. This helps improve decoding performance in high-throughput or peak-rate scenarios, thereby enhancing transmission reliability in these scenarios.

[0009] In one possible implementation, the first bit sequence after distribution matching corresponds to the first column set in the basis matrix corresponding to the channel coding, and the second bit sequence corresponds to the second column set in the basis matrix, wherein the column weight corresponding to the first column set is less than or equal to the column weight corresponding to the second column set.

[0010] Based on this implementation, the first bit sequence or the first bit sequence after distribution matching can be assigned to the column with the smaller column weight in the base matrix, and / or the second bit sequence can be assigned to the column with the larger column weight in the base matrix. In other words, the reliability of the second bit sequence can be guaranteed first.

[0011] In one possible implementation, the column weight corresponding to the first column set is less than or equal to the column weight corresponding to the second column set, including one or more of the following: the maximum column weight in the first column set is less than or equal to the minimum column weight in the second column set; the average column weight in the first column set is less than or equal to the average column weight in the second column set.

[0012] Based on this implementation method, the first column set and the second column set can be flexibly determined.

[0013] In one possible implementation, the first set of columns and / or the second set of columns are related to the bit rate.

[0014] Based on this implementation method, the first column set and the second column set can be flexibly determined according to the bit rate. That is, different first column sets and second column sets can be sampled at different bit rates to adapt the implementation of this method to the bit rate.

[0015] In one possible implementation, before channel coding the input sequence for channel coding, the method further includes: interleaving (e.g., a first interleaving) the first bit sequence after distribution matching and the bit sequences of the information bits excluding the first bit sequence based on an index sequence to obtain the input sequence for channel coding; wherein the order of the indices in the index sequence is related to the column weights of the columns in the base matrix. In another possible implementation, the order of the indices in the index sequence being related to the column weights of the columns in the base matrix includes: the order of the indices in the index sequence being positively correlated with the column weights; the order of the indices in the index sequence being negatively correlated with the column weights; or, the index sequence includes a first index group and a second index group, wherein the column weight corresponding to the first index group is positively or negatively correlated with the index corresponding to the first group. Furthermore, the column weight corresponding to the second index group is positively or negatively correlated with the index corresponding to the second group.

[0016] Based on this implementation, before channel coding, the first bit sequence (or the first bit sequence after distribution matching) can be mapped to the first column set through first interleaving, and / or the second bit sequence can be mapped to the second column set. In the case of first interleaving, there is no need to modify the existing basis matrix; it can be adapted to the current basis matrix.

[0017] The first interleaving can be performed based on an index sequence, which can be used to indicate the column weights in the base matrix. Therefore, the first communication device does not need to recalculate the column weights in the base matrix, which can reduce computational complexity and achieve efficient encoding.

[0018] Alternatively, the basis matrix can be modified so that the columns are arranged in descending or ascending order of column weight. In this case, the correspondence between the first bit sequence (or the first bit sequence after distribution matching) and the first column set can be achieved without first interleaving, and / or the correspondence between the second bit sequence and the second column set can be achieved.

[0019] In one possible implementation, the order of multiple indexes within the first group is positively or negatively correlated with the column corresponding to the first index group, and / or the order of multiple indexes within the second group is positively or negatively correlated with the column corresponding to the second index group.

[0020] In one possible implementation, the step of modulating the codeword sequence to obtain a modulation symbol includes: interleaving the codeword sequence according to a first sequence (referred to as second interleaving), wherein the first element of the first sequence is the modulation order minus 1, the first element is the first element in the first sequence, the second element of the first sequence is 0, and the second element is the second element in the first sequence; and modulating the interleaved first sequence to obtain the modulation symbol.

[0021] Based on this implementation, the correspondence between the codeword sequence (or bit sequence) and the sign bit and / or amplitude bit of the modulation symbol can be achieved through the second interleaving.

[0022] In one possible implementation, the number of bits in the first bit sequence is related to one or more of the following: the number of symbols; the distribution matching code rate.

[0023] Based on this implementation, the length of the first bit sequence can be accurately determined according to the number of symbols and / or the distribution matching code rate, so as to support the mapping of the first bit sequence or the first bit sequence after distribution matching to the first column set in the basis matrix, i.e., the column with the smaller column weight.

[0024] In one possible implementation, the number of bits in the second bit sequence is related to the number of symbols.

[0025] Based on this implementation, the length of the second bit sequence can be accurately determined according to the number of transmitted symbols, so as to support the mapping of the second bit sequence to the second column set in the basis matrix, i.e., the column with a larger column weight.

[0026] In one possible implementation, the information bits further include a third bit sequence used for distribution matching of the first bit sequence, and the codeword sequence further includes a third codeword sequence corresponding to the third bit sequence, wherein some or all of the sequences in the third codeword sequence correspond to the second highest amplitude bit of the modulation symbol.

[0027] In this implementation, the third bit sequence is an auxiliary sequence for distribution matching, which can be used to assist in the distribution matching of the first bit sequence. Based on this implementation, the auxiliary bit or its corresponding codeword sequence can be mapped to the highest amplitude bit.

[0028] In one possible implementation, the number of bits in the third bit sequence is related to at least one of the following: the number of payload bits; the distribution matching code rate; the number of symbols; and the number of parity bits.

[0029] Based on this implementation, the length of the third bit sequence can be accurately determined to support the mapping of auxiliary bits or their corresponding codeword sequences to the highest amplitude bit.

[0030] In one possible implementation, at least one of the number of bits in the first bit sequence, the number of bits in the second bit sequence, and the number of bits in the third bit sequence is also related to the modulation order.

[0031] Based on this implementation, the grouping method can be accurately determined according to the modulation order, and the grouping of the first bit sequence, the second bit sequence, and the third bit sequence can be realized to support the implementation of the method shown in this application.

[0032] In one possible implementation, the information bits further include a fourth bit sequence that is not subjected to the distribution matching, and the codeword sequence further includes a fourth codeword sequence corresponding to the fourth bit sequence, wherein some or all of the sequences in the fourth codeword sequence correspond to the sign bit of the modulation symbol.

[0033] Based on this implementation, some sign bits of the modulation symbol can also correspond to a portion of the bit sequence in the information bits. For example, when the number of sign bits is greater than the length of the parity sequence, the sign bits can correspond to some or all of the bits in the fourth bit sequence, or to some or all of the sequence in the fourth codeword sequence, in addition to the parity sequence or parity bits.

[0034] Secondly, embodiments of this application provide a communication method, which can be executed by a second communication device or a second equipment, or in other words, the method can be applied to a second communication device. Unless otherwise specified, the "second communication device" in this application can refer to the second equipment itself, a component within the second equipment, or a logic module or software capable of implementing all or part of the second equipment. The second equipment can be a receiving device and / or a decoding device. Specifically, the second equipment can be a terminal or a network device such as a base station. The components in this application may include, for example, at least one of a chip, a chip system, a processor, a transceiver, a processing unit, a transceiver unit, or other functional modules. Taking the second communication device as the executing entity as an example, the method includes:

[0035] The second communication device obtains information to be decoded, which includes a first codeword sequence, a second codeword sequence, and a check sequence. Part or all of the first codeword sequence corresponds to the highest amplitude bit of the modulation symbol, part or all of the second codeword sequence corresponds to the lowest amplitude bit of the modulation symbol, and part or all of the check sequence corresponds to the sign bit of the modulation symbol. The second communication device performs channel decoding on the information to be decoded based on the check sequence to obtain a decoding output sequence. The decoding output sequence includes a fifth bit sequence corresponding to the first codeword and a second bit sequence corresponding to the second codeword. The second communication device performs dedistribution matching on the fifth bit sequence to obtain a first bit sequence. The second communication device obtains information bits, which include the first bit sequence and the second bit sequence.

[0036] In one possible implementation, the fifth bit sequence corresponds to the first column set in the basis matrix corresponding to the channel decoding, the second bit sequence corresponds to the second column set in the basis matrix, and the column weight corresponding to the first column set is less than or equal to the column weight corresponding to the second column set.

[0037] In one possible implementation, the column weight corresponding to the first column set is less than or equal to the column weight corresponding to the second column set, including one or more of the following: the maximum column weight in the first column set is less than or equal to the minimum column weight in the second column set; the average column weight in the first column set is less than or equal to the average column weight in the second column set.

[0038] In one possible implementation, the first set of columns and / or the second set of columns are related to the bit rate.

[0039] In one possible implementation, after performing channel decoding on the information to be decoded according to the check sequence, the method further includes: deinterleaving the fifth bit sequence and the sequences in the decoded output sequence excluding the fifth bit sequence based on an index sequence; wherein the order of the indices in the index sequence is related to the column weights in the base matrix.

[0040] In one possible implementation, the order of the indices in the index sequence is related to the column weight in the base matrix, including: the order of the indices in the index sequence is positively correlated with the column weight; the order of the indices in the index sequence is negatively correlated with the column weight; or, the index sequence includes a first index group and a second index group, wherein the column weight corresponding to the first index group is positively or negatively correlated with the index corresponding to the first group.

[0041] In one possible implementation, the order of multiple indexes within the first group is positively or negatively correlated with the column corresponding to the first index group, and / or the order of multiple indexes within the second group is positively or negatively correlated with the column corresponding to the second index group.

[0042] In one possible implementation, the step of performing channel decoding on the information to be decoded according to the check sequence to obtain a decoding output sequence includes: deinterleaving the information to be decoded according to a first sequence, wherein the first element of the first sequence is the modulation order minus 1, the first element is the first element in the first sequence, the second element of the first sequence is 0, and the second element is the second element in the first sequence; decoding the deinterleaved information to be decoded to obtain the decoding output sequence.

[0043] In one possible implementation, the number of bits in the first bit sequence is related to one or more of the following: the number of symbols; the distribution matching code rate.

[0044] In one possible implementation, the number of bits in the second bit sequence is related to the number of symbols.

[0045] In one possible implementation, the information to be decoded further includes a third codeword sequence corresponding to the third bit sequence, some or all of the sequences in the third codeword sequence correspond to the second highest amplitude bit of the modulation symbol, the decoded output sequence further includes the third bit sequence, the third bit sequence is used for the dedistribution matching of the fifth bit sequence, and the information bits further include the third bit sequence.

[0046] In one possible implementation, the number of bits in the third bit sequence is related to at least one of the following: the number of payload bits; the distribution matching code rate; the number of symbols; and the number of parity bits.

[0047] In one possible implementation, at least one of the number of bits in the first bit sequence, the number of bits in the second bit sequence, and the number of bits in the third bit sequence is also related to the modulation order.

[0048] In one possible implementation, the information to be decoded further includes a fourth codeword sequence, some or all of which correspond to the sign bit of the modulation symbol, and the information bits further include a fourth bit sequence corresponding to the fourth codeword sequence, which is not subjected to the dedistribution matching.

[0049] Thirdly, a communication device is provided. The device can implement the method described in any possible implementation of any of the first or second aspects described above. The device possesses the functions of the first or second communication device described above. The device is, for example, a terminal device, a functional module within a terminal device, a network device, or a functional module within a network device, etc.

[0050] In one optional implementation, the device may include modules corresponding one-to-one with the methods / operations / steps / actions performed in any possible implementation of any of the first to second aspects. These modules may be hardware circuits, software, or a combination of hardware circuits and software. In another optional implementation, the device includes a processing unit (sometimes also called a processing module) and a communication unit (sometimes also called a transceiver module or communication module, etc.). The transceiver unit is capable of both sending and receiving functions. When the transceiver unit performs the sending function, it may be called a sending unit (sometimes also called a sending module); when the transceiver unit performs the receiving function, it may be called a receiving unit (sometimes also called a receiving module). The sending unit and the receiving unit may be the same functional module, referred to as the transceiver unit, which performs both sending and receiving functions; or, the sending unit and the receiving unit may be different functional modules, with the transceiver unit being a collective term for these functional modules.

[0051] For example, when the apparatus is used to perform the method described in any one of the first to second aspects, the apparatus may include a communication unit and a processing unit.

[0052] Fourthly, embodiments of this application also provide a communication device, including a processor for executing a computer program (or computer-executable instructions) stored in a memory, such that when the computer program (or computer-executable instructions) is executed, the device performs the method as described in any possible implementation of any of the first to second aspects.

[0053] In one possible implementation, the processor and memory are integrated together;

[0054] In another possible implementation, the memory is located outside the communication device.

[0055] The communication device also includes a communication interface for communicating with other devices, such as sending or receiving data and / or signals. For example, the communication interface may be a transceiver, circuit, bus, module, or other type of communication interface.

[0056] Fifthly, a computer-readable storage medium is provided for storing a computer program or instructions that, when executed, enable the implementation of the method described in any possible implementation of any of the first to second aspects, and the method shown in any possible implementation of the first aspect.

[0057] A sixth aspect provides a computer program product containing instructions that, when run on a computer, enables the method described in any possible implementation of any of the first to second aspects to be implemented.

[0058] In a seventh aspect, embodiments of this application also provide a communication device for performing the method described in any possible implementation of any of the first to second aspects described above.

[0059] Eighthly, a chip system is provided, comprising logic circuitry (or, as understood, a processor, which may include logic circuitry, etc.), and further comprising input / output interfaces. The input / output interfaces can be used to input messages or to output messages. The input / output interfaces can be the same interface, i.e., the same interface can implement both sending and receiving functions; or, the input / output interface includes an input interface and an output interface, the input interface being used to implement the receiving function, i.e., to receive messages; and the output interface being used to implement the sending function, i.e., to send messages. The logic circuitry can be used to perform operations other than the sending and receiving functions in any possible implementation of any of the first to second aspects described above; the logic circuitry can also be used to transmit messages to the input / output interfaces or to receive messages from other communication devices from the input / output interfaces. The chip system can be used to implement the methods described in any possible implementation of any of the first to second aspects described above. The chip system can be composed of chips or can include chips and other discrete devices.

[0060] Optionally, the chip system may also include a memory, which can be used to store instructions, and the logic circuits can call the instructions stored in the memory to implement the corresponding functions.

[0061] Ninth aspect, a communication method is provided, which may include the method implemented by a first communication device as shown in the first aspect and any possible implementation thereof, and the method implemented by a second communication device as shown in the second aspect and any possible implementation thereof.

[0062] A tenth aspect provides a communication system that may include a first communication device and a second communication device. The first communication device may be used to implement the method shown in the first aspect and any possible implementation thereof, and the second communication device may be used to implement the method shown in the second aspect and any possible implementation thereof.

[0063] The technical effects brought about by the third to tenth aspects above can be found in the descriptions of the beneficial effects of the corresponding solutions in the first and second aspects above, and will not be repeated here. Attached Figure Description

[0064] Figure 1 is a schematic diagram of a communication system provided in an embodiment of this application;

[0065] Figure 2(a) is a schematic diagram of an encoding and decoding process;

[0066] Figure 2(b) is a schematic diagram of a process that includes probabilistic shaping and deprobabilistic shaping encoding and decoding;

[0067] Figure 2(c) is a schematic diagram of the constellation point distribution after probability shaping;

[0068] Figure 3 is a schematic diagram of a probabilistic shaping process;

[0069] Figure 4 shows the region division method of the basis matrix;

[0070] Figure 5 is a schematic diagram of the matrix regions corresponding to different code rates;

[0071] Figure 6 shows the mapping relationship between the energy bits in the system;

[0072] Figure 7 is a schematic diagram showing the correspondence between information bits and modulation symbol bits during the encoding process;

[0073] Figure 8 is a flowchart illustrating a communication method provided in an embodiment of this application;

[0074] Figures 9(a) and 9(b) are schematic diagrams showing the correspondence between information bits and modulation symbol bits in a communication method provided by an embodiment of this application.

[0075] Figure 10 is a schematic diagram showing the correspondence between codeword sequences and the bits of modulation symbols in a communication method provided in an embodiment of this application;

[0076] Figure 11 is a schematic diagram showing the correspondence between column sets and bits of modulation symbols in a communication method provided in an embodiment of this application;

[0077] Figures 12 and 13 show a distribution matching scheme involving auxiliary bits, respectively;

[0078] Figure 14 is a BLER performance simulation diagram of a communication method provided in an embodiment of this application;

[0079] Figure 15 is a flowchart illustrating another communication method provided in an embodiment of this application;

[0080] Figures 16 and 17 are schematic diagrams of a communication device provided in an embodiment of this application. Detailed Implementation

[0081] In the embodiments of this application, the terms "exemplarily" and "for example" are used to indicate examples, illustrations, or descriptions. Any embodiment or design scheme described as an "example" in this application should not be construed as being more preferred or advantageous than other embodiments or design schemes. Specifically, the use of the term "example" is intended to present concepts in a concrete manner. In the embodiments of this application, "of," "corresponding, relevant," and "corresponding" may sometimes be used interchangeably, and it should be noted that their intended meanings are consistent unless their distinction is emphasized.

[0082] In the embodiments of this application, "transmission" includes "sending" and / or "receiving." "Sending" and "receiving" indicate the direction of signal transmission. For example, "sending information to XX" can be understood as the destination of the information being XX, which can include direct transmission via the air interface or indirect transmission by other units or modules via the air interface. "Receiving information from YY" can be understood as the source of the information being YY, which can include direct reception from YY via the air interface or indirect reception from YY by other units or modules via the air interface. "Sending" can also be understood as the "output" of a chip interface, and "receiving" can also be understood as the "input" of a chip interface. In other words, sending and receiving can occur between devices, such as between access network devices and terminal devices, or within a device, such as between components, modules, chips, software modules, or hardware modules within the device via a bus, wiring, or interface.

[0083] The technical solutions of this application can be applied to various wireless communication systems, such as Universal Mobile Telecommunications System (UMTS), Wireless Local Area Network (WLAN), short-range wireless communication systems (such as sidelink, wireless fidelity, Wi-Fi, Bluetooth, etc.), wired networks, vehicle-to-everything (V2X) communication systems, device-to-device (D2D) communication systems, vehicle-to-everything (V2X) communication systems, 4th generation (4G) mobile communication systems (such as Long Term Evolution (LTE) systems), LTE Frequency Division Duplex (FDD) systems, LTE Time Division Duplex (TDD) systems, Worldwide Interoperability for Microwave Access (WiMAX) communication systems, 5G mobile communication systems (such as New Radio (NR) systems), Future Communications systems, or other similar communication systems, without limitation. This application describes the communication system shown in Figure 1 as an example. When applying the technical solution of this application to other communication systems, the devices, components, or modules in the embodiment can be replaced with corresponding devices, components, or modules in other communication systems without limitation.

[0084] Figure 1 is a schematic diagram of the architecture of the communication system applied in the embodiments of this application. As shown in Figure 1, the communication system includes an access network 100. Optionally, the communication system may also include a core network 200 and an Internet 300. The access network 100 may include at least one network device, such as 110a and 110b in Figure 1, and may also include at least one terminal device, such as 120a-120j in Figure 1. Specifically, 110a is a base station, 110b is a micro-station, 120a, 120e, 120f, and 120j are mobile phones, 120b is a car, 120c is a fuel dispenser, 120d is a home access point (HAP) deployed indoors or outdoors, 120g is a laptop computer, 120h is a printer, and 120i is a drone. The same terminal device or network device can provide different functions in different application scenarios. For example, the mobile phones in Figure 1 are 120a, 120e, 120f, and 120j. Mobile phone 120a can access base station 110a, connect to car 120b, communicate directly with mobile phone 120e, and access HAP. Car 120b can access HAP and communicate directly with mobile phone 120a. Mobile phone 120f can access micro-station 110b, connect to laptop 120g, and connect to printer 120h. Mobile phone 120j can control drone 120i.

[0085] (1) Network equipment

[0086] A network device is a network-side device with wireless transceiver capabilities. A network device can be a device in a radio access network (RAN) that provides wireless communication capabilities to terminal devices; this is called RAN equipment. The RAN can be an access network within the 3rd Generation Partnership Project (3GPP), such as 4G, 5G, or future networks. The RAN can also be an open RAN (O-RAN or ORAN), a cloud radio access network (CRAN), or a communication network combining two or more of these.

[0087] RAN equipment can also be a base station, an evolved NodeB (eNodeB), a transmission reception point (TRP), a next-generation NodeB (gNB) in a 5G mobile communication system, a base station in a future mobile communication system, or an access node in a WiFi system, etc.

[0088] RAN equipment can also be modules or units that perform some of the functions of a base station. For example, it can be a central unit (CU), a distributed unit (DU), or a radio unit (RU). The CU performs the functions of the radio resource control (RRC) and PDCP protocols of the base station, and can also perform the functions of the service data adaptation protocol (SDAP). The CU can be further divided into a CU control plane (CP) (i.e., CU-CP) and a CU user plane (UP) (i.e., CU-UP). The DU performs the functions of the RLC and MA layers of the base station, and can also perform some or all of the physical layer functions. For specific descriptions of the above protocol layers, please refer to the relevant 3GPP technical specifications. CU and DU can be set up separately, or they can be included in the same network element, such as in a baseband unit (BBU). The RU can be included in radio frequency equipment or radio frequency units, such as in a remote radio unit (RRU), an active antenna unit (AAU), or a remote radio head (RRH). In different systems, CU, DU, or RU may have different names, but those skilled in the art will understand their meaning. For example, in an ORAN system, CU can also be called O-CU (open CU), DU can also be called O-DU, and RU can also be called O-RU. Any of the units CU (or CU-CP, CU-UP), DU, and RU in this application can be implemented through software modules, hardware modules, or a combination of software and hardware modules. RA equipment can be a macro base station (as shown in Figure 1, 110a), a micro base station or an indoor station (as shown in Figure 1, 110b), or a relay node or donor node, etc. The embodiments of this application do not limit the specific technology or specific equipment form used in the network equipment.

[0089] In the embodiments of this application, the functions of the network device can be executed by modules (such as chips) within the network device, or by a control subsystem that includes the functions of the network device. This control subsystem, which includes the functions of the network device, can be a control center in the aforementioned application scenarios such as smart grids, industrial control, intelligent transportation, or smart cities.

[0090] (2) Terminal equipment

[0091] A terminal device is a user-side device with wireless transceiver capabilities. Terminal devices can also be called terminals, user equipment (UE), mobile stations, or mobile terminals. Terminal devices can be widely used in various scenarios, such as device-to-device (D2D), vehicle-to-everything (V2X) communication, machine-type communication (MTC), the Internet of Things (IoT), virtual reality, augmented reality, industrial control, autonomous driving, telemedicine, smart grids, smart furniture, smart offices, smart wearables, smart transportation, or smart cities. Terminal devices can be mobile phones, tablets, computers with wireless transceiver capabilities, wearable devices, vehicles, drones, helicopters, airplanes, ships, robots, robotic arms, or smart home devices. In the embodiments of this application, the device used to implement the functions of the terminal device can be the terminal device itself, or it can be a device that supports the terminal device in implementing that function, such as a chip system or a combination of devices or components that can implement the functions of the terminal device. This device can be installed in the terminal device. The embodiments of this application do not limit the specific technology or specific device form used in the terminal device.

[0092] In this embodiment of the application, the functions of the terminal device can also be performed by modules (such as chips or modems) in the terminal device, or by a device containing the functions of the terminal device.

[0093] Network devices and terminal devices can be fixed in location or mobile. They can be deployed on land, including indoors or outdoors, handheld or vehicle-mounted; they can also be deployed on water; and they can be deployed in the air on airplanes, balloons, and artificial satellites. The embodiments of this application do not limit the application scenarios of network devices and terminal devices.

[0094] The roles of network devices and terminal devices can be relative. For example, the helicopter or drone 120i in Figure 1 can be configured as a mobile network device. For terminal devices 120j that access the wireless access network 100 via 120i, terminal device 120i is a network device; however, for network device 110a, 120i is a terminal device. That is, 110a and 120i communicate via a wireless air interface protocol. Of course, 110a and 120i can also communicate via a network device-to-network device interface protocol. In this case, relative to 110a, 120i is also a network device. Therefore, both network devices and terminal devices can be collectively referred to as communication devices. 110a and 110b in Figure 1 can be called communication devices with network device functions, and 120a-120j in Figure 1 can be called communication devices with terminal device functions.

[0095] Network devices and terminal devices, network devices and network devices, and / or terminal devices and terminal devices can communicate through licensed spectrum, unlicensed spectrum, or both licensed and unlicensed spectrum simultaneously, without limitation.

[0096] The network architecture and business scenarios described in this application are intended to more clearly illustrate the technical solutions of the embodiments of this application, and do not constitute a limitation on the technical solutions provided in the embodiments of this application. As those skilled in the art will know, with the evolution of network architecture and the emergence of new business scenarios, the technical solutions provided in the embodiments of this application are also applicable to similar technical problems.

[0097] The following is an explanation of the relevant terms used in the embodiments of this application. Unless otherwise specified, these explanations are provided to support the meaning of the relevant terms and to make the embodiments of this application easier to understand, and should not be regarded as a strict limitation of the relevant terms within the scope of protection claimed by this application.

[0098] (1) Channel coding and channel decoding

[0099] Figure 2(a) is a schematic diagram of one processing flow for the source and sink. As shown in Figure 2(a), the transmitting end (i.e., the source) obtains information bits and performs channel coding on the information bit sequence to obtain the encoded bit sequence. Optionally, the transmitting end can obtain the bit sequence to be encoded, i.e., the information bit sequence, through source coding. Correspondingly, after the receiving end (i.e., the sink) obtains the symbol sequence to be decoded, it performs channel decoding on the symbol sequence to be decoded to obtain the information bit sequence, and then performs source recovery on the information bit sequence to obtain useful information.

[0100] Since source coding does not consider interference resistance, if the bit sequence output from source coding is directly transmitted through the channel, noise interference in the channel will cause bit errors, reducing communication reliability. Therefore, channel coding, which encodes the bit sequence output from source coding again, can improve communication reliability. Channel decoding is the inverse process of channel coding.

[0101] There are various channel coding methods, such as using polar codes or LDPC codes. Polar codes were chosen as the control channel coding method in the 5G standard. Polar codes are a coding scheme that can be rigorously proven to "achieve" the Shannon channel capacity, and have the advantages of good decoding performance and low complexity. LDPC codes were chosen as the data channel coding method in the 5G standard. LDPC codes are linear block codes with a sparse parity-check matrix, which not only have good performance approaching the Shannon limit, but also have low decoding complexity and flexible structure.

[0102] (2) Modulation and demodulation

[0103] Referring to Figure 2(a), the transmitting end can also map the encoded bit sequence to a modulation symbol sequence, and then transmit the modulation symbol sequence; correspondingly, the receiving end can receive the modulation symbol sequence and obtain the sequence to be decoded by demodulation. The notification symbol sequence received by the receiving end is a symbol sequence with added channel noise.

[0104] Modulation refers to the process by which the transmitting end maps the encoded bit sequence to a constellation based on a constellation diagram to obtain a modulated symbol sequence. Demodulation is the reverse process of modulation. Common modulation methods include quadrature amplitude modulation (QAM) and amplitude shift keying (ASK) modulation.

[0105] For example, the encoded bit sequence can be mapped to the modulation symbol by referring to a lookup table or according to a preset rule. Here, only a lookup table is used as an illustration, as shown in Table 1, which is an example of the bit mapping relationship for 16ASK. After determining the encoded bit sequence, the transmitting end can refer to Table 1 to determine the modulation symbol corresponding to the encoded bit sequence. For example, the modulation symbol corresponding to 0111 is -15.

[0106] Table 1: Example of bit mapping relationship for 16ASK

[0107] When using ASK modulation, the encoded bit sequence can be mapped to modulation symbols according to the bit values, referring to Table 1. When using QAM (such as 16QAM or 64QAM) modulation, the QAM constellation diagram has real and imaginary parts, which can be mapped to modulation symbols according to Table 1. This application will not elaborate on this further.

[0108] (3) High-order modulation scheme

[0109] Higher-order modulation maps multiple bits to the same modulation symbol, thereby further improving spectral efficiency. Common higher-order modulation schemes include 16QAM and 64QAM, without specific limitations. 16QAM maps 4 bits to one modulation symbol, while 64QAM maps 6 bits to one modulation symbol.

[0110] In higher-order modulation, different symbols may have different energies. As shown in Table 1 above, the energies of the modulation symbols from highest to lowest are: modulation symbol -15 (modulation symbol 15), modulation symbol -13 (modulation symbol 13), modulation symbol -11 (modulation symbol 11), modulation symbol -9 (modulation symbol 9), modulation symbol -7 (modulation symbol 7), modulation symbol -5 (modulation symbol 5), modulation symbol -3 (modulation symbol 3), or modulation symbol -1 (modulation symbol 1). Among them, modulation symbol -15 has the same energy as modulation symbol 15, modulation symbol -13 has the same energy as modulation symbol 13, modulation symbol -11 has the same energy as modulation symbol 11, modulation symbol -9 has the same energy as modulation symbol 9, modulation symbol -7 has the same energy as modulation symbol 7, modulation symbol -5 has the same energy as modulation symbol 5, modulation symbol -3 has the same energy as modulation symbol 3, and modulation symbol -1 has the same energy as modulation symbol 1.

[0111] (4) Probabilistic shaping

[0112] Probabilistic shaping is a common "shaping" technique. A typical flowchart is shown in Figure 2(b), which illustrates another processing flow for the source and sink. The difference between Figure 2(b) and Figure 2(a) is that in Figure 2(b), the transmitting end requires probabilistic shaping (or distribution matching), and the receiving end requires deprobabilistic shaping (or dedistribution matching). As shown in Figure 2(b), by cascading a precoder before channel coding, the information bits are mapped (or "shaped") to a bit sequence that follows a specific distribution. Therefore, the precoder is also called a distribution matcher (DM). Then, during channel coding, systematic coding is used, so that the sequence satisfying the specific distribution ultimately appears directly in the coded sequence, thus shaping the final modulation symbol. The constellation point distribution after "shaping" is shown in Figure 2(c). It can be seen that the probability of low-energy symbols appearing is higher than that of high-energy symbols.

[0113] By transmitting more low-energy symbols and fewer high-energy symbols, average energy can be saved. Theoretical analysis shows that for a Gaussian white noise channel, the information transmitted per unit energy is maximized when the transmitted symbol distribution follows a Gaussian distribution. Compared to a uniform distribution, the Gaussian distribution has the best performance, theoretically offering a performance gain of 1.53 dB.

[0114] Figure 3 shows an exemplary flowchart of a forming process. The information bit grouping in Figure 3 refers to the sending end dividing a sequence of information bits of length K into three groups, denoted as... and In Figure 3, a distribution matcher (DM) is cascaded before the encoder. The inputs to the distribution matcher are U2 and U3, and U1, U3, and the output of the distribution matcher are input to the encoder. The output of the encoder is a bit sequence X. X is interleaved and then mapped to modulation symbols. The resulting symbols follow a Gaussian-like distribution, as shown in Figure 2(c), which can achieve probability shaping and improve spectral efficiency.

[0115] Optionally, in the above shaping and channel coding process, shaping can be achieved by a distributed matcher, an encoder can be used to perform channel coding, and a modulator can be used to perform modulation.

[0116] In this application, probabilistic shaping can also be simply referred to as shaping, which will be explained uniformly here and will not be elaborated on later.

[0117] For example, for 500 information bits, 100 information bits are not probabilistically shaped, and the other 400 information bits are probabilistically shaped to obtain a bit sequence that follows a specific distribution, which includes 512 bits; then, channel coding is performed on the 100 information bits and the shaped 512 bits.

[0118] (5) LDPC code

[0119] LDPC codes are a channel coding scheme very close to Shannon lines, characterized by high performance and low complexity. They have been adopted by 3GPP as the coding and decoding scheme for 5G communication data channels. Mainstream LDPC codes employ a QC structure, which avoids bad structures such as short loops and improves code distance by setting the shift amount for each block.

[0120] Currently, the main decoding algorithms for LDPC codes are min-sum (MS) and belief propagation (BP) decoding algorithms. In terms of decoding performance, BP decoding is better, but it requires a larger amount of information storage, m c→v The computational complexity of LDPC codes makes them impractical for hardware implementation. Therefore, practical communication systems currently use the offset-MS (minimum sum) and normalized-MS (normalized minimum sum) decoding algorithms. The LDPC codes used in practice are cyclic shift matrices that expand the 1s in the base graph (BG) to a Zc*Zc value. The base graph, also called the basis matrix, can be represented as H. BG Zc can be referred to as the lifting value, expansion factor, expansion coefficient, or lifting size. The BG model of a QC-LDPC code is BG = (X, Y, F), where X corresponds to the variables, Y corresponds to the check equation, F represents the edge relationships, and the expansion factor is Z. c The QC extension yields a Tanner graph, used to represent the parity-check matrix of LDPC. This parity-check matrix or Tanner graph can be used for encoding or decoding. The Tanner graph is a bipartite graph G = (V, C, E), where V are variable nodes, C are parity-check nodes, and E represent their edges, corresponding to the number of columns in the parity-check matrix N = |V| = Z. c |X|, the number of rows in the parity check matrix M = |C| = Z c The number of non-zero elements in the parity check matrix is ​​|E|=Z|F|.

[0121] The basis matrices of the 5G LDPC code include BG1 and BG2. BG1 is a 46x68 matrix, and BG2 is a 42x52 matrix. Both BG1 and BG2 have the matrix structure shown in Figure 4. Region A corresponds to high-rate information columns, region B corresponds to the core checksum for high-rate data, region C is a zero matrix, region D is the incremental redundancy portion of the basis matrix corresponding to low-rate data, and region E is the incremental redundancy region and is an identity matrix. The values ​​of the basis matrices are either 0 or 1; a value of 0 represents an empty element, and a value of 1 represents an edge in the basis graph or an association between the checksum and the variable.

[0122] To improve the bit rate, LDPC encoding supports puncturing. For example, referring to Figure 4, the first two columns of the matrices BG1 and BG2 are punctured columns. In terms of matrix characteristics, the column weight of the punctured column is relatively large, where column weight refers to the number of non-zero elements in a column. In terms of transmission characteristics, the bits corresponding to the punctured column are not transmitted, and the receiver does not need to pay attention to the received information of this part. Its log-likelihood ratio is set to 0, and it is recovered through decoding.

[0123] BG1 and BG2 are designed for the lowest bitrate. When different bitrates need to be supported, the upper left portion of BG1 or BG2 can be used. Figure 5 shows a schematic diagram of the matrix regions corresponding to different bitrates. This matrix can be BG1 or BG2. Rows and columns of the high bitrate region shown in the figure are selected from BG1 or BG2 to form the base matrix. The high bitrate region can also be called the region corresponding to the highest bitrate. Taking BG1 as an example, the high bitrate region of BG1 is a matrix region composed of region A and region B of BG1. Region A is a 4x22 matrix used to carry data information, and region B is a 4x4 matrix used to carry check information. When the first two columns are punched, the bitrate supported by the high bitrate region is 22 / (22+4-2)=22 / 24≈0.917, and the bitrate of other regions is lower than that of the high bitrate region.

[0124] When a high-bitrate region is selected from BG1 or BG2 as the base matrix, the base matrix will have the highest bitrate; therefore, it is also called the highest bitrate matrix. If more rows and columns than high-bitrate regions are selected from BG1 or BG2 to form the base matrix, the bitrate of the base matrix will be lower than the highest bitrate. Furthermore, as the number of rows and columns increases, the bitrate of the corresponding matrix region gradually decreases. Referring to Figure 5, the rows and columns of each dashed box region form a base matrix; as the size of the dashed box region increases, the bitrate of the corresponding base matrix gradually decreases.

[0125] Alternatively, a complete base matrix (such as a complete BG1 or BG2) can be used without truncating high-rate regions. For example, encoding can be performed at the lowest possible rate, and the bits corresponding to the columns of the base matrix regions can be sent according to the rate.

[0126] (6) Modulation scheme

[0127] 5G communication protocols support high-order modulation schemes. Under good channel conditions and / or high code rates, the bits to be transmitted will be modulated into a high-order symbol and transmitted. The receiving end will then demodulate and decode the received symbol.

[0128] For example, in a QAM modulation scheme, each symbol corresponds to multiple bits with different energy levels. Taking a 64-order QAM (QAM64) as an example, each symbol corresponds to log2^64 = 6 bits, with 3 different energy levels. For QAM64, by default, bits 1 and 2 correspond to energy level 1 (the highest energy level), bits 3 and 4 correspond to energy level 2 (the second highest energy level), and bits 5 and 6 correspond to energy level 3 (the lowest energy level). For a 256-order QAM (QAM256), each symbol corresponds to log2^256 = 8 bits, with a total of 4 energy levels. Bits 1 and 2 correspond to energy level 1, bits 3 and 4 correspond to energy level 2, bits 5 and 6 correspond to energy level 3, and bits 7 and 8 correspond to energy level 4, with the energy levels decreasing sequentially.

[0129] (7) Intertwined

[0130] LDPC currently employs row-column interleaving to interleave the coded bits to be transmitted. The aim is to map the LDPC system bits onto the high-energy-level bits of QAM modulation as much as possible. The LDPC system bits consist of information bits and a core parity bit. Alternatively, the system bits can be considered as information bits, meaning the system bits can be independent of the parity bits.

[0131] Taking an LDPC code with a bit length of 8448 and a transmission bit length of 12672 (i.e., a 2 / 3 code rate encoding) as an example, using BG1 encoding, the selected block boost value is 384, resulting in 8448 / 384 = 22 information columns, each corresponding to 384 bits. Since the first two columns need to be perforated, the number of parity columns is 12672 / 384 - (22 - 2) = 13. As shown in Figure 6, the core parity column is 4 columns, and the extended parity column is 9 columns, for a total of 13 columns selected as parity bits for this code. With the first two columns perforated and not transmitted, there are 20 system bits remaining. Adding these to the 13 parity columns, we get 33 transmission columns (e). Therefore, the number of system information columns in the 33 transmission columns is 22, indicating a code rate of 22 / 33 = 2 / 3.

[0132] The 5G standard specifies that after LDPC encoding, rate matching is performed to obtain a transmission sequence of length E, i.e., the bit sequence to be transmitted, e. e is then interleaved to obtain the bit sequence to be modulated, f, which is then modulated and transmitted.

[0133] As an example of row-column interleaving, the relationship between e and f is as follows:

[0134] Among them, Q m Indicates the modulation order. The modulation order represents the number of bits that can be carried on a single modulation symbol.

[0135] As can be seen, columns 3 to 13 of the system bits correspond to the 1st and 2nd bits of the QAM, which are the two highest-energy bits. Columns 14 to 22 of the system bits, and columns 1 and 2 of the core parity bits, are mapped to the 3rd and 4th bits of the QAM, which are the two second-highest-energy bits. Columns 3 and 4 of the core parity bits, as well as all columns of the extended parity bits to be transmitted, are mapped to the 5th and 6th bits of the QAM, which are the two lowest-energy bits.

[0136] (8) Forward error correction (FEC)

[0137] FEC coding constructs codewords by adding redundant information to the original data. This redundant information can be used at the receiving end to detect and correct errors that may occur during transmission. There are two types of FEC coding: block codes and convolutional codes. Block codes use fixed-size blocks for encoding, with Reed-Solomon codes being a common type; while convolutional codes use variable-length symbol streams for encoding.

[0138] In a current encoding process, as shown in Figure 7, the information bits to be transmitted can be grouped to obtain a0, a1, and a2. a1 is used as a symbol bit during modulation, i.e., to determine the quadrant of the constellation point. a2 is the remaining information bit sequence, used as an amplitude bit during modulation, i.e., to determine the amplitude of the constellation point. Further, the grouped bit sequences can be interleaved. The interleaving process is related to Q... m The interleaved bit sequence is further encoded, and the encoded bit sequence is then subjected to row-column interleaving and / or modulation before being transmitted.

[0139] In Figure 7, after row and column interleaving, within a modulation symbol, a1 corresponds to the sign bit of the modulation symbol, a0 corresponds to the highest amplitude bit of the modulation symbol, and a2 corresponds to the second highest amplitude bit and the lowest amplitude bit of the modulation symbol.

[0140] It is understandable that a modulation symbol includes a real part and an imaginary part, Q. m Each bit corresponds to one modulation symbol, and each has Q. m / 2 bits correspond to the real part and the imaginary part. The bits corresponding to the real part and the bits corresponding to the imaginary part respectively contain the sign bit and the magnitude bit.

[0141] For example, when using QAM256, Q m = 8, where the real part and imaginary part each contain 4 bits. The 4 bits of the real part correspond to the sign and magnitude of the real part, respectively. For example, the first bit corresponds to the sign, and the 2nd to 4th bits correspond to the magnitude. For the magnitude bits, there is a distinction between high and low energy levels. The highest magnitude bit is the highest energy bit among the 3 magnitude bits, usually the 2nd bit; the lowest magnitude bit is the lowest energy bit among the 3 magnitude bits, usually the 4th bit. Additionally, there is a third magnitude bit, for example, as the second highest magnitude bit.

[0142] Similarly, it can be assumed that the bits corresponding to the imaginary part of the modulation symbol include the sign bit and the amplitude bit, which will not be elaborated further.

[0143] It can be assumed that Q m Q is the sum of the number of bits in the real part and the number of bits in the imaginary part of the modulation symbol. For example, when using QAM256, Q... m =8, at this time Q m The real and imaginary parts representing the modulation symbol together contain 4 bits. Furthermore, Q can also be considered... m Q represents the total number of bits contained in the real or imaginary part of a modulation symbol. For example, when using QAM256, Q... m =4, at this time Q m This means that the real and imaginary parts of the modulation symbol each contain 4 bits.

[0144] As an example, suppose Q m The sum of the number of bits in the real part and the number of bits in the imaginary part of a modulation symbol, when using QAM16, is Q. m =4, when QAM64 is used, Q m =6, when QAM256 is used, Q m =8.

[0145] As an example, suppose Q m The number of bits representing the real or imaginary part of a modulation symbol; when using QAM16, Q... m =2, when QAM64 is used, Q m =3, when QAM256 is used, Q m =4.

[0146] Unless otherwise specified, the sign bit may include the sign bit corresponding to the real part of the modulation symbol and / or the sign bit corresponding to the imaginary part of the modulation symbol, and a certain amplitude bit may include the amplitude bit corresponding to the real part of the modulation symbol and / or the amplitude bit corresponding to the imaginary part of the modulation symbol.

[0147] The current transmission process does not consider additional protection for low-reliability bits, which cannot meet the requirements of fast convergence scenarios. In extreme performance situations, it can rely on the priority convergence of some bits to drive the convergence of other bits. However, in low-iteration scenarios, unreliable bits are the bottleneck for correct decoding, and there are not enough iteration rounds to drive convergence. Since the decoding success rate of low-reliability bits has a significant impact on the block error rate (BLER) in low-latency decoding scenarios such as high-throughput scenarios, low-iteration-count scenarios, and / or peak rates, the current transmission scheme is not conducive to improving decoding performance in high-throughput or peak-rate scenarios, resulting in reduced transmission reliability in these scenarios.

[0148] To address the aforementioned technical problems, this application provides a communication method, which can be executed by a first communication device and a second communication device. Unless otherwise specified, the "first communication device" in this application can refer to the first device itself (e.g., a terminal device or network device), a component within the first device (e.g., a communication module, processor, circuit, chip, or chip system), or a logic module or software capable of implementing all or part of the functions of the first device. The first device can serve as a data transmitting device and / or an encoding device. Similarly, the "second communication device" can refer to the second device itself (e.g., a terminal device or network device), a component within the second device (e.g., a communication module, processor, circuit, chip, or chip system), or a logic module or software capable of implementing all or part of the functions of the second device. The second device can serve as a data receiving device and / or a decoding device. That is, the first device can send information to the second device.

[0149] As an example, in uplink communication, the first device can be a terminal, and the second device can be a base station or other network device.

[0150] Figure 8 illustrates this communication method using an example where the executing entities are a first communication device and a second communication device. As shown in Figure 8, the method may include the following steps:

[0151] S101: The first communication device acquires information bits, which include a first bit sequence and a second bit sequence.

[0152] The information bits can be payload information bits or a bit sequence obtained after cyclic redundancy check (CRC) encoding, i.e., containing payload information bits and check bits. The first bit sequence can be considered as the sequence to be matched for distribution. The second bit sequence can be considered as part or all of the information bits excluding the first bit sequence.

[0153] As shown in Figure 9(a), taking an information bit length of K payload bits as an example, the information bits can be denoted as a0, a1, a2, ... a K-1 .

[0154] The first bit sequence a0 can be denoted as, k0 is a positive integer greater than 1, representing the number of bits in a0. The second bit sequence a1 can be denoted as, k0+k1≤K.

[0155] Optionally, the information bits may also include a third bit sequence and / or a fourth bit sequence.

[0156] The third bit sequence can be denoted as a3. k3 is a positive integer greater than 1, representing the number of bits in a2. The fourth bit sequence can be denoted as a2. k2 is a positive integer greater than 1, representing the number of bits in a2.

[0157] It can be considered that the sequence to be matched can be divided into multiple groups or sub-blocks by grouping. The multiple groups or sub-blocks can include one or more of a0, a1, a2, and a3.

[0158] Figure 9(b) shows an example of encoding information bits containing the third bit sequence a3 and the fourth bit sequence a2.

[0159] S102: The first communication device performs distribution matching on the first bit sequence to obtain the first bit sequence after distribution matching.

[0160] In the first to fourth bit sequences above, the first and third bit sequences can be subjected to distribution matching. Before and after distribution matching, the value of the first bit sequence changes, while the value of the third bit sequence remains unchanged. The third bit sequence can serve as an auxiliary bit for distribution matching of the first bit sequence. An auxiliary bit is a bit introduced by distribution matching; it can be replaced with other possible names, without specific limitations. The action in S102 can also be described as: performing distribution matching on the first bit sequence based on the third bit sequence, or performing distribution matching on the first and third bit sequences.

[0161] As an example, a0 above can be considered as a shaped bit sequence, which undergoes distribution matching but does not require FEC encoding. The bit sequence obtained by distribution matching of a0 is denoted as a0′=a′. 0,0 ,a′ 0,1 ,a′ 0,2 ,…a′ 0,S-1 In this application, S represents the number of transmitted symbols. The sequence obtained after distribution matching can follow a non-uniform distribution, such as a Gaussian distribution.

[0162] Furthermore, the second bit sequence in the information bits does not require distribution matching.

[0163] In addition, if the information bits also contain a fourth bit sequence, the fourth bit sequence does not need to undergo distribution matching.

[0164] An example of a distribution matching method is, for instance, adding a column for the distribution matching code rate R to the modulation and coding scheme (MCS) table. DM And redesign the column corresponding to the coding rate. In actual use, distribution matching is performed according to the code rate of the distribution matcher. Let the number of payload information bits be K, the payload code rate be R, and the modulation order be Q. m In this example, the transmitted bit length is N = K / R, or N is the integer multiple of K / R (rounded up or down), or K / R is an integer multiple of the modulation order. Additionally, the transmitted symbol number is S = N / Q. m The number of transmitted symbols can also be simply referred to as the symbol count. Let the length of the bit sequence to be encoded output by the distribution matching module be K. FEC Then we have K FEC =K+(1-R) DM The actual channel coding rate is R × S. FEC =K FEC / N. Where Q is... m It represents the sum of the real and imaginary bits in the modulation symbol.

[0165] S103: The first communication device performs channel coding on the input sequence of channel coding to obtain a codeword sequence, which includes a first codeword sequence corresponding to a first bit sequence after distribution matching, a second codeword sequence corresponding to a second bit sequence, and a check sequence.

[0166] Specifically, the first codeword sequence can be the same as the first bit sequence after distribution matching, or in other words, the first bit sequence after distribution matching does not need to be channel-coded. That is, the input sequence for channel coding includes the second bit sequence and the parity bit sequence, and optionally may also include the third bit sequence and / or the fourth bit sequence.

[0167] S103 can also be replaced by: the first communication device performs channel coding on the second codeword sequence and the check sequence corresponding to the second bit sequence to obtain the second codeword sequence and the check sequence corresponding to the second bit sequence.

[0168] In S103, there are multiple options for the channel coding scheme. For example, the channel coding scheme can be a systematic coding scheme such as LDPC code or systematic polar code. This application will describe the case where the channel coding scheme is LDPC code.

[0169] It can be assumed that the correspondence between bit sequences and codeword sequences is one-to-one.

[0170] S104: The first communication device modulates the codeword sequence to obtain a modulation symbol. Part or all of the first codeword sequence corresponds to the highest amplitude bit of the modulation symbol; that is, part or all of the bits in the first bit sequence or the first bit sequence after distribution matching correspond to the highest amplitude bit of the modulation symbol. Additionally, part or all of the second codeword sequence corresponds to the lowest amplitude bit of the modulation symbol, and part or all of the check sequence corresponds to the sign bit of the modulation symbol; that is, one or more check bits correspond to the lowest amplitude bit of the modulation symbol.

[0171] This application does not limit the method for determining the sign bit, highest amplitude bit, second highest amplitude bit, and lowest amplitude bit of the modulation symbol. That is, the sign bit, highest amplitude bit, second highest amplitude bit, and lowest amplitude bit can be determined according to existing definitions.

[0172] As an example, in Q m When the sum of the number of bits representing the real part and the number of bits representing the imaginary part of the modulation symbol is used, the highest amplitude bit can be located at the second bit position of the real part and / or the second bit position of the imaginary part. In Q... m In the case of the number of bits representing the real part of the modulation symbol, the highest amplitude bit indicates the position of the second bit of the real part. In Q... m In the case of the number of bits representing the imaginary part of the modulation symbol, the highest amplitude bit indicates the position of the second bit of the imaginary part.

[0173] As shown in Figure 10, taking an example where both the real and imaginary parts of a modulation symbol consist of 4 bits, the parity sequence or parity bits can be partially or entirely associated with the sign bit of the 4 bits; the first codeword sequence, or the first bit sequence, or the first bit sequence after distribution matching, can be partially or entirely associated with the highest amplitude bit of the 4 bits; and the second codeword sequence or the second bit sequence can be partially or entirely associated with the lowest amplitude bit of the 4 bits. Since the parity sequence partially or entirely corresponds to the sign bit of the modulation symbol, the energy of this part or entirely of the parity sequence is high, and its reliability is guaranteed. Therefore, decoding performance can be improved, thereby improving transmission reliability. Optionally, one or more parity bits corresponding to the sign bit may include one or more bits from the core parity bit and / or the extended parity bit.

[0174] The positions of the sign bit, highest amplitude bit, second highest amplitude bit, and lowest amplitude bit in the modulation symbol in Figure 10 are exemplary and should not be construed as limiting the positions of the sign bit, highest amplitude bit, second highest amplitude bit, and lowest amplitude bit in the modulation symbol. For example, the positions of the highest amplitude bit and the second highest amplitude bit in Figure 10 can be interchanged, and correspondingly, the positions of the first codeword sequence and other codewords can also be interchanged.

[0175] It can be assumed that the correspondence between bit sequences or codeword sequences and the bits of modulation symbols is not one-to-one. For example, one bit of a modulation symbol may correspond to a bit in one or more bit sequences or codeword sequences. The bits of a modulation symbol may include sign bits and amplitude bits.

[0176] Optionally, if the information bits contain a third bit sequence, the codeword sequence may also contain a third codeword sequence corresponding to the third bit sequence. Here, some or all of the bits in the third codeword sequence may correspond to the second highest amplitude bit of the modulation symbol; in other words, some or all of the bits in the third bit sequence correspond to the second highest amplitude bit of the modulation symbol.

[0177] Furthermore, when the information bits contain a fourth bit sequence, the codeword sequence may also contain a fourth codeword sequence corresponding to the fourth bit sequence. Part or all of this fourth codeword sequence may correspond to the sign bit of the modulation symbol; in other words, part or all of the bits in the fourth bit sequence correspond to the sign bit of the modulation symbol. For example, when the number of sign bits is greater than the length of the parity sequence, the sign bit may correspond to the parity sequence or parity bits, as well as part or all of the bits in the fourth bit sequence, or part or all of the bits in the fourth codeword sequence. Specifically, when the number of parity bits is less than S, at least one bit sequence corresponds to the sign bit, and this at least one bit can serve as the fourth bit sequence. When the number of parity bits is equal to S, the sign bit corresponds to the parity bit and not to any other bit sequence.

[0178] For example, when the information bits do not include the third bit sequence but include the fourth bit sequence, as shown in Figure 9(a), a portion of the fourth bit sequence or the fourth codeword sequence can correspond to the second highest magnitude bit, and another portion of the fourth bit sequence or the fourth codeword sequence can correspond to the sign bit. Similarly, when the information bits do not include the third bit sequence but include the fourth bit sequence, as shown in Figure 9(a), when the information bits include both the third and fourth bit sequences, a portion or all of the fourth bit sequence or the fourth codeword sequence can correspond to the sign bit.

[0179] In one possible implementation, the first bit sequence (or first codeword sequence) after distribution matching corresponds to the first column set in the basis matrix corresponding to the channel coding, and the second bit sequence (or second codeword sequence) corresponds to the second column set in the basis matrix. The column weights corresponding to the first column set are less than or equal to the column weights corresponding to the second column set. Therefore, the first codeword sequence corresponds to the highest amplitude bit of the modulation symbol, and the second codeword sequence corresponds to the lowest amplitude bit of the modulation symbol. Alternatively, it can be understood that first, some or all of the sequences in the check sequence correspond to the symbol bits, and then the columns in the basis matrix corresponding to some or all of the bits of the first bit sequence (or first codeword sequence) after distribution matching are determined to be columns with lower column weights (or not the columns with the highest column weights). Then, the columns corresponding to other bit sequences (or codeword sequences) are determined from the other columns in the basis matrix. For example, the columns corresponding to the second bit sequence (or second codeword sequence) can be further determined to be columns with high column weights in the basis matrix. Furthermore, the columns corresponding to the third bit sequence (or third codeword sequence) and / or the fourth bit sequence (or fourth codeword sequence) can be further determined from the remaining columns in the basis matrix. That is, other bit sequences can include a second bit sequence, a third bit sequence, or a fourth bit sequence.

[0180] As shown in Figure 11, since the first bit sequence after distribution matching corresponds to the first column set, the columns with lower column weights in the basis matrix can correspond to the sign bit, the highest magnitude bit, and / or the second highest magnitude bit. Therefore, the reliability of the columns with lower column weights in the basis matrix can be guaranteed. The columns with lower column weights in the basis matrix include, but are not limited to, the columns in the first column set.

[0181] Alternatively, the process shown in Figure 8 can be considered to make a0 in Figure 9(a) or Figure 9(b) correspond to a0 in the base matrix and the last x≤S columns of the information column, and to make a1 correspond to columns 1 to S of the information column. It can also be considered that, compared to the encoding effect in Figure 7, the positions of the modulation symbols corresponding to a0 and a1 can be interchanged.

[0182] In this application, the modulation symbol can refer to one or more modulation symbols in a single transmission process. For example, the modulation symbol corresponding to the third codeword sequence and / or the fourth codeword sequence mentioned above is one of the modulation symbols, and should not be construed as all modulation symbols corresponding to the third codeword sequence and / or the fourth codeword sequence.

[0183] Optionally, the indices of multiple columns in the first column set can be consecutive or non-consecutive. Similarly, the indices of multiple columns in the second column set can be consecutive or non-consecutive. For example, non-consecutiveness can mean that one or more columns between two columns in the first column set belong to the second column set, or that one or more columns between two columns in the second column set belong to the first column set. Figures 9(a) and 9(b) can be seen as examples of consecutive column indices in both the first and second column sets.

[0184] In one possible example, the column weight corresponding to the first column set being less than or equal to the column weight corresponding to the second column set can include: the maximum column weight in the first column set being less than or equal to the minimum column weight in the second column set. That is, the column weight of all columns in the first column set is less than or equal to the minimum column weight of all columns in the second column set.

[0185] Additionally, the statement that the column weight corresponding to the first column set is less than or equal to the column weight corresponding to the second column set can include the statement that the average column weight of the columns in the first column set is less than or equal to the average column weight of the columns in the second column set. That is, it is not excluded that the column weight of some columns in the first column set may be greater than or equal to the column weight of the columns in the second column set.

[0186] The first and second column sets above represent the most extreme case. The column redistribution of the actual basis matrix may be very complex. For example, the column redistribution in BG1 includes columns 1 and 4 to 11. Therefore, the following simplified forms are proposed.

[0187] In this application, the first and / or second column sets are related to the code rate. Therefore, the elements in the first and / or second column sets can be determined based on the code rate. Since LDPC codes need to support flexible code rates, different regions of the base matrix may be truncated as encoding and decoding matrices, thus the column weights will change with different code rates. For example, as shown in Figure 5, the rows and / or columns of the base matrix used for channel coding change with the code rate, so the first and / or second column sets can be determined based on the code rate. For example, as the minimum code rate supported by the communication scenario decreases, the rows and columns of the base matrix used by the fire department gradually increase; that is, different code rates correspond to different regions in the base matrix.

[0188] In one possible implementation, the column weight can be the column weight of the entire basis matrix. That is, the column weight can be determined based on all elements of the basis matrix. This column weight can be used to determine the first set of columns and / or the second set of columns.

[0189] In another possible implementation, the column weights can be determined based on the range of the base matrix applicable to channel coding. The range of the base matrix used for channel coding is related to the communication scenario. In other words, the column weights of the first and / or second column sets can be related to the communication scenario. For example, in a high-throughput communication scenario, channel coding only uses the high-rate region of the base matrix, taking regions A and B of BG1 as an example. In this scenario, the column weights of the first and / or second column sets only need to be determined based on the elements of rows 1 to 4 of the base matrix. As another example, in scenarios with limited hardware capabilities, such as limited buffer rate matching (LBRM), channel coding can use a lower-rate region, taking rows 1 to 42 of the base matrix as an example. In this scenario, the column weights of the first and / or second column sets can be determined based on the elements of rows 1 to 42 of the base matrix.

[0190] In another possible implementation, column weights can be determined based on the highest supported bitrate column weight of the matrix, or more specifically, based on the elements in the high bitrate region of the base matrix. Alternatively, this implementation can be considered as having column weights that do not change with bitrate or communication scenario. The highest bitrate can be the highest bitrate indicated by the MCS, or the bitrate corresponding to the core region (i.e., regions A and B). The degree of the matrix corresponding to this bitrate is used for sorting, while assuming the degree of the extended check node is the minimum. This is because the peak high-throughput scenario represents the highest supported bitrate scenario, thus satisfying the fast convergence requirement of this part as much as possible. For example, the column weights of the first and / or second column sets only need to be determined based on the elements of rows 1 to 4 in the base matrix.

[0191] S105: The first communication device transmits modulation symbols.

[0192] Correspondingly, the second communication device receives the modulation symbols and performs demodulation and channel decoding to obtain the formed bit sequence. The second communication device can perform decoding according to the correspondence between the first codeword sequence and the highest amplitude bit, the correspondence between the second codeword sequence and the lowest amplitude bit of the modulation symbol, and the correspondence between the check sequence and the sign bit of the modulation symbol, so as to reduce the decoding complexity.

[0193] For example, the first communication device transmits modulation symbols over the air interface.

[0194] The auxiliary bits are explained below using cases 1 and 2.

[0195] In one possible scenario (referred to as Scenario 1), the length of the formed bit sequence is E, where E is an integer power of 2. In this case, the communication device can select K1 bit positions with higher reliability from the E bit positions as auxiliary bit positions based on the reliability sequence corresponding to the code length E, and use the remaining E-K1 bit positions as information bit positions. For example, if E = 8, the reliability sequence is [0 1 2 43 5 6 7], and K1 = 4, then the bit position corresponding to bit indices [3 5 6 7] can be selected as the auxiliary bit position. The frozen bits and information bits of the polar code can be determined based on the reliability sequence corresponding to the mother code length. The reliability sequence corresponding to the mother code length can be calculated offline to reduce the complexity of the encoding.

[0196] In another possible scenario (referred to as scenario 2), the length of the formed bit sequence is E, where E is not an integer power of 2. In this case, the communication device needs to perform rate matching to obtain a bit sequence of the appropriate length. The method used for rate matching is related to the code rate (the code rate is equal to the ratio of the length of the information bits to the actual required code length). For example, when the code rate is less than or equal to 7 / 16, the rate matching method used is puncturing; when the code rate is greater than 7 / 16, the rate matching method used is shortening.

[0197] Specifically, the communication device can determine the rate matching method based on the code rate, then determine the rate matching position (i.e., the punctured bit position) or pre-frozen position based on the rate matching method, and then determine the auxiliary bit position based on the reliability sequence. For example, if E=6 and K1=4, the communication device first determines the length matching method to be shortening based on the code rate, and then further determines K2 pre-frozen positions. For example, the K2 pre-frozen positions are the bit positions corresponding to bit indices [6 7]. Therefore, the bit positions corresponding to bit indices [6 7] are pre-frozen (the bit positions corresponding to bit indices [6 7] cannot be selected as auxiliary bit positions), that is, the bit positions corresponding to bit indices [6 7] in the reliability sequence (the reliability sequence corresponding to code length 8) are removed to obtain [0 1 2 4 3 5]. Then, 4 bit positions with higher reliability (i.e., the bit positions corresponding to bit indices [2 4 3 5]) are selected as auxiliary bit positions.

[0198] The first communication device can determine K1 auxiliary bits based on the LLR sequence and the information bits.

[0199] For example, referring to Figure 12 or Figure 13, the communication device places the original information bits to be formed in the information bit position and uses the LLR sequence corresponding to the target distribution as the sequence of symbols to be decoded (the LLR input on the right side of the fence diagram in Figure 12 or Figure 13), where the LLR sequence is a known quantity. Then, the values ​​of the auxiliary bits can be obtained through polar code decoding. Figure 12 illustrates case 1, and Figure 13 illustrates case 2.

[0200] The first communication device can obtain the formed bit sequence by polar coding based on K1 auxiliary bits and K3 information bits.

[0201] In case 1, the communication device directly polarizes and encodes the formed bit sequence based on K1 auxiliary bits and K3 information bits. In case 2, the communication device polarizes and encodes sequence a based on K1 auxiliary bits, K2 pre-frozen bits (e.g., the pre-frozen bits are 0), and K3 information bits. Then, the bits at the pre-frozen positions in sequence a are removed to obtain the formed bit sequence.

[0202] As described above, when the length of the formed bit sequence is a power of 2, K1 bit positions with higher reliability can be selected as auxiliary bit positions based on a predefined reliability sequence. However, when the length of the formed bit sequence is not a power of 2, it is necessary to first determine the rate matching method based on the code rate, then determine the rate matching positions (i.e., punctured bit positions) based on the rate matching method, and then select auxiliary bit positions based on the reliability sequence. Since the process of determining the rate matching positions and auxiliary bit positions is relatively complex, the implementation of distribution matching becomes more complicated.

[0203] In one possible implementation, it can be based on the modulation order Q. m Grouping is performed. Specifically, the number of bits in any one of the first, second, third, or fourth bit sequences can be determined based on the modulation order. Here, Q... m It represents the number of bits in the real and imaginary parts of the modulation symbol, or it can represent the sum of the number of bits in the real part and the number of bits in the imaginary part.

[0204] Optionally, the number of bits in the first bit sequence is related to the number of symbols and / or the distribution matching code rate.

[0205] For example, the number of bits k0 in the first bit sequence, the number of symbols S, and the distribution matching code rate R. DM The following relationship is satisfied between them: k0 = R DM *S.

[0206] Optionally, the number of bits in the second bit sequence is related to the number of symbols.

[0207] For example, the number of bits k1 in the second bit sequence and the number of symbols S satisfy the following relationship: k1 = S.

[0208] Optionally, the number of bits in the third bit sequence, the number of payload bits, the number of symbols S, and the distribution matching code rate R are... DM The number of bits in the third bit sequence is related to at least one of the following: the number of bits in the payload bit sequence, the number of bits in the first bit sequence, the number of bits in the second bit sequence, and the number of bits in the fourth bit sequence. Alternatively, the number of bits in the third bit sequence can be considered to be related to the number of bits in the payload bit sequence, the number of bits in the first bit sequence, the number of bits in the second bit sequence, and the number of bits in the fourth bit sequence.

[0209] For example, the number of bits k3 in the third bit sequence is related to the number of payload bits, the number of symbols S, and the distribution matching code rate R. DM K3 and P satisfy the following relationship: k3 = K - k0 - k1 - k2 = KR DM *SS-max(SP,0).

[0210] Optionally, the number of bits in the fourth bit sequence may be related to one or more of the number of payload bits, the number of bits in the first bit sequence, the number of bits in the second bit sequence, and the number of bits in the third bit sequence.

[0211] For example, the number of bits k2 in the fourth bit sequence, the number of bits K in the net payload, the number of bits k0 in the first bit sequence, and the number of bits k1 in the second bit sequence satisfy the following relationship: k2 = K - k0 - k1.

[0212] For example, the number of bits k2 in the fourth bit sequence, the number of net payload bits K, and the number of bits k0 in the first bit sequence satisfy the following relationship: k2 = K - k0.

[0213] Optionally, the number of bits in at least one of the first, second, third, and fourth bit sequences may also be related to the modulation order.

[0214] As an example, when the information bits contain a first bit sequence, a second bit sequence, and a fourth bit sequence, when Q... m When ≥3, k0=R DM *S, k1 = S, k2 = K - k0 - k1; when Q m When k = 2, k0 = R DM *S, k1=0, k2=K-k0; when Q m When k = 1, k2 = K, k0 = k1 = 0. Here, Q... m This represents the number of bits in the real and imaginary parts of the modulation symbol.

[0215] In this example, we can prioritize ensuring that the information bits (the column weight is larger than the check bit) correspond to the lowest amplitude bit, that is, prioritize ensuring a1. The remaining bits are used as the remaining amplitude bits and sign bits. More specifically, in a2, we prioritize ensuring that the remaining amplitude bits, that is, a portion of the sign bit must correspond to the check bit.

[0216] As another example, when the information bits contain a first bit sequence, a second bit sequence, a third bit sequence, and a fourth bit sequence, when Q... m When ≥2, k0=R DM *S, k1=0, k2=max(SP,0), k3=K-k0-k2; when Q m When k = 1, k1 = K, k0 = k2 = k3 = 0. Here, Q... m This represents the number of bits in the real and imaginary parts of the modulation symbol.

[0217] The advantage of this example is that by setting as many auxiliary bits as possible and mapping the sign bit to the check position as much as possible, the shaping effect will be better.

[0218] As another example, when the information bits contain a first bit sequence, a second bit sequence, a third bit sequence, and a fourth bit sequence, when Q... m When ≥2, k0=R DM *S, k1=S, k2=max(SP,0), k3=K-k0-k1-k2; when Q m When k = 1, k1 = K, k0 = k2 = 0. Here, Q... m This represents the number of bits in the real and imaginary parts of the modulation symbol.

[0219] The advantage of this example is that it ensures that low-reliability bits are located in high-column positions as much as possible, prioritizes the balance between prior and posterior a priori ...

[0220] Based on the above grouping method, we can prioritize ensuring that the information bits (the column weight is larger than the check bit) correspond to the lowest amplitude bits, that is, prioritize ensuring a1, and use the remaining bits as the remaining amplitude bits and sign bits. More specifically, in a2, we prioritize ensuring that the remaining amplitude bits, that is, at least part of the sign bit corresponds to the check bit.

[0221] It is understood that the above method of grouping information based on modulation order can be implemented in conjunction with the process shown in Figure 8. That is, in the process shown in Figure 8, information bits can be grouped according to modulation order. In other words, the first bit sequence and / or the second bit sequence shown in Figure 8 can be determined using the above grouping method. In addition, the above grouping method can also be implemented independently of the process shown in Figure 8. That is, based on the above grouping method, encoding can still be performed in conjunction with, for example, Figure 7 or other schemes.

[0222] Figure 14 shows the simulation results with a coding rate of 0.88 when using the above grouping method. The horizontal axis of the simulation diagram represents the symbol signal-to-noise ratio (Es / N0), and the vertical axis represents BLER. The simulation scenario is a high-throughput scenario with 3 iterations, using QAM256 as an example. The asterisk (*) line represents the simulation results when using the above grouping method and the coding scheme shown in Figure 8, while the circle (○) line represents the simulation results when only the coding scheme in Figure 7 or a similar scheme is used, i.e., the simulation results without using the above grouping method and the coding scheme shown in Figure 8. It is evident that using the coding scheme shown in Figure 8 can reduce BLER.

[0223] In one possible embodiment, before executing S103, the first communication device may further interleave the first bit sequence after distribution matching and the sequence of information bits excluding the first bit sequence, such that the first bit sequence after distribution matching corresponds to the first column set in the basis matrix corresponding to the channel coding, and the second bit sequence corresponds to the second column set in the basis matrix. The intersection of the first column set and the second column set is empty.

[0224] One possible implementation is that the first communication device can also interleave the first bit sequence, which has undergone distribution matching, and the sequence of information bits excluding the first bit sequence based on the index sequence. In this application, the index sequence can also be called the index column weight sequence, etc., which refers to the sequence obtained by sorting the column indices according to the column weight, that is, the index value in the sequence is the index of the column in the base matrix.

[0225] In this implementation, the columns of the channel coding basis matrix do not need to be arranged in descending or ascending order of column weight. For example, the basis matrix can be BG1 or BG2, or it can be a basis matrix obtained by truncating BG1 or BG2.

[0226] In one possible embodiment, the indexes in the index sequence can be sorted according to the column weights in the base matrix. For example, the indexes in the index sequence can be positively correlated with the column weights, meaning the index sequence can be obtained by sorting the column indices in ascending order of column weights.

[0227] Taking the sorting of the base matrix by column weight in ascending order as an example, the first column set is selected from the columns with the smallest column weight in the base matrix. Alternatively, the base matrix can be sorted by column weight in descending order, and the first column set is selected from the columns with the largest column weight in the base matrix.

[0228] Furthermore, the order of the indexes in the index sequence is negatively correlated with the column weight, meaning the index sequence can be obtained by sorting the column indexes from largest to smallest according to their column weight.

[0229] In addition, the index sequence may include a first index group and a second index group, wherein the column weight corresponding to the first index group is positively or negatively correlated with the index corresponding to the second group.

[0230] One possible implementation is to divide the column redistribution of the base matrix into at least two intervals, i.e., groups, denoted as: [d1, d2], [d3, d4], ..., [d...]. 2k-1 ,d 2k ]. Where d kAs k monotonically increases, the column weights within each interval are considered consistent during sorting. For example, in BG1, the columns are divided into intervals [1], [4,7], and [8,11] according to their column weight distribution. Therefore, the sorting result is: the first segment of the column weight sequence from smallest to largest consists of columns with a weight of 1, the second segment consists of columns with weights of 4 to 7, and the third segment consists of columns with weights of 8 to 11. The first index group and the second index group can be two segments from the first, second, and third segments, respectively. The column weights corresponding to the first segment (which has a weight of 1), the second segment (which has a weight of 4 to 7), and / or the third segment (which has a weight of 8 to 11) can be considered as being sorted according to a positive correlation of column weights.

[0231] Optionally, the sorting of multiple indexes within the first group is positively or negatively correlated with column weight, and / or, the sorting of multiple indexes within the second group is positively or negatively correlated with said column weight.

[0232] For example, if the second segment is used as the first index group and the third segment is used as the second index group, then multiple columns in the second segment can be arranged in descending or ascending order according to column weight 4 to 7, and multiple columns in the third segment can be arranged in descending or ascending order according to column weight 8 to 11.

[0233] Alternatively, the columns in the base matrix can be divided into multiple sets according to their weights, and then sorted according to the corresponding sets. For example, if the column sets of BG1 are divided into {1}, {4,5,7}, and {8,9,10,11}, the sorting result could be: the first segment of the sequence consists of columns with a weight of 1, the second segment consists of columns with a weight of {4,5,7}, and the third segment consists of columns with a weight of {8,9,10,11}. In this case, the first column set represents one interval, and the second column set represents another interval. For example, the first column set could consist of columns with a weight of 1, and the second column set could consist of columns with a weight of {4,5,7} or columns with a weight of {8,9,10,11}; or the first column set could consist of columns with a weight of {4,5,7}, and the second column set could consist of columns with a weight of {8,9,10,11}.

[0234] Optionally, the first communication device may interleave the first bit sequence after distribution matching and the sequence of information bits excluding the first bit sequence based on the column weights of the columns in the first set and / or the column weights of the columns in the second set, such that the first bit sequence after distribution matching corresponds to the first column set in the basis matrix corresponding to the channel coding, and the second bit sequence corresponds to the second column set in the basis matrix.

[0235] It can be considered that obtaining the index sequence and performing the above-mentioned interleaving based on the index sequence is a simple interleaving implementation method, which can omit the calculation of column weights of the first communication device for the columns in the first set and / or the columns in the second set.

[0236] The above interleaving can be achieved using a first interleaver.

[0237] As an example, let the payload information bits be e (length denoted as E), and the sequence after the first interleaving be e1. The relationship between e and e1 is determined only by the indicator sequence s and the boosting factor Zc. The length of the indicator sequence s is denoted as S', and the j-th element in the indicator sequence is denoted as s(j).

[0238] For example, the relationship between e and e1 can satisfy:

[0239] Here, s(j) represents the j-th element of sequence s. After interleaving, the column corresponding to a0 in e1 is the position with lighter column weight.

[0240] In another possible embodiment, the basis matrix for channel coding can be obtained by sorting the columns according to their weights. For example, the basis matrix is ​​a matrix obtained by adjusting the column positions of BG1 or BG2 in descending or ascending order of column weight. In this embodiment, interleaving based on the index sequence is not required when using the above-described basis matrix for channel coding.

[0241] For example, if the columns of a base matrix are sorted in descending order, and the column weights are 20, 11, 11, 10, 5, 4, 3, 1, 1, 1, ..., then interleaving by column weight or index sequence can be omitted; simply performing reverse row and column interleaving achieves the effect of low weight corresponding to high energy level. Similarly, if the columns of a base matrix are sorted in ascending order, row and column interleaving can also achieve the effect of low weight corresponding to high energy level.

[0242] In the above implementation, the standard can directly store the correspondence between bit sequences and column sets or modulation symbol energy levels. For example, the energy levels can be arranged from high to low according to the column weight from small to large. For example, the above correspondence can be represented by an index sequence, which is a sequence of column numbers in the base matrix. This can be viewed as an ordering of column weights from small to large or large to small, or a simplified form, used to indicate the first interleaving. Alternatively, one or more alternative index sequences can be stored, actually divided into intervals according to the code rate, or selected based on the number of rows in the base matrix used.

[0243] The advantage of mapping bit sequences according to column weight is that it can balance the prior (energy level) and posterior (decoder's posterior information) of each bit in the LDPC code, improve the reliability of the least reliable bit, speed up convergence, and improve performance. Furthermore, in implementation, a simplified form of column weight intervals can be used, such as determining the column set according to intervals or groups. This allows nodes with similar posterior reliability to be assigned to the same interval, resulting in lower hardware complexity, no performance loss, easier implementation, and greater suitability for flexible code rates.

[0244] Furthermore, during modulation, the first communication device can perform a second interleaving on the codeword sequence to achieve a correspondence between the sequence and the modulation symbols. For example, a second interleaving is performed on the bit sequence e2 to be transmitted, resulting in the interleaved sequence f. For example, the bit sequence e2 to be transmitted can be a codeword sequence obtained by encoding the bit sequence e1 after the first interleaving. The second interleaving can be row-column interleaving or reverse row-column interleaving. Specifically, row-column interleaving can be used when the position with the smaller index of the indicator sequence corresponds to a higher energy level; and reverse row-column interleaving can be used when the position with the smaller index of the indicator sequence corresponds to a lower energy level.

[0245] An exemplary row-column interleaving method can be referred to in Example 1 of the row-column interleaving in this application, and will not be described again.

[0246] In another exemplary row-column interleaving method, a specific sequence can be used for the second interleaving. That is, the second interleaving can be performed according to a specific sequence. This specific sequence can be referred to as the first sequence.

[0247] For example, let the bit sequence to be transmitted be denoted as e2, the sequence obtained after reverse row-column interleaving be denoted as f, and the first sequence be denoted as x(i). The reverse row-column interleaving method is as follows:

[0248] The first sequence can be represented as x(i), which can be a specific mapping order.

[0249] As an example, the first element of the first sequence is the modulation order minus 1, the first element is the first element in the first sequence, the second element of the first sequence is 0, and the second element is the second element in the first sequence; the interleaved first sequence is modulated to obtain the modulation symbol. As another expression, the first sequence x(i) can satisfy: for any Q... m , x(i)=Q m -1,0,…,y(i), where y(i) is 1,2,…,Q m -2 permutation. In the case of x(i) = 0, 1, 2, 3, this leads to row-column interleaving. For example, in Q... mWhen Q = 4, i = 0, 1, ..., 3, x(i) = 3, 0, 1, 2 or x(i) = 3, 0, 2, 1. Here, Q... m This represents the number of bits in the real and imaginary parts of the modulation symbol.

[0250] Or, more generally, let the sequence of bits to be transmitted be denoted as e2, and the sequence obtained after reverse row-column interleaving be denoted as f. An exemplary reverse row-column interleaving method is as follows:

[0251] The above are exemplary second implementations of the second interleaving, and should not be construed as meaning that the second interleaving can only be implemented in the above manner.

[0252] The decoding operation of the second communication device is described below with reference to Figure 15. As shown in Figure 15, the decoding operation may include the following steps:

[0253] S201: The second communication device obtains the information to be decoded;

[0254] The second communication device can receive received information, or received sequence, from the channel. This received information includes modulation symbols transmitted by the first communication device, and may also include noise and other interference introduced during channel transmission. The information to be decoded in S201 can be a sequence obtained by the second communication device through demodulating the received information.

[0255] The information to be decoded may include a first codeword sequence, a second codeword sequence, and a check sequence. Specifically, some or all of the first codeword sequence corresponds to the highest amplitude bit of the modulation symbol, some or all of the second codeword sequence corresponds to the lowest amplitude bit of the modulation symbol, and some or all of the check sequence corresponds to the sign bit of the modulation symbol.

[0256] The codeword sequence can be referred to in the description in S103, and will not be repeated here.

[0257] S202: The second communication device performs channel decoding on the information to be decoded according to the verification sequence, and obtains the decoding output sequence, which includes the fifth bit sequence corresponding to the first codeword and the second bit sequence corresponding to the second codeword.

[0258] S203: The second communication device performs dedistribution matching on the fifth bit sequence to obtain the first bit sequence.

[0259] The fifth bit sequence can be the sequence obtained by matching the first bit sequence through the distribution in S102, that is, the first bit sequence of the distributed brand.

[0260] S204: The second communication device obtains information bits, which include a first bit sequence and a second bit sequence.

[0261] It is understandable that the second communication device obtaining the information bit can also be considered as not an independent action. For example, after the second communication device obtains the first bit sequence through the dedistribution matching in S203 and obtains the second bit sequence through the decoding output sequence in S202, it can be considered that the second communication device obtains the information bit.

[0262] Optionally, the information to be decoded may also include a third codeword sequence and / or a fourth codeword sequence, and correspondingly, the information bits may also include a third bit sequence and / or a fourth bit sequence.

[0263] The definitions and concepts in Figure 15 can be found in the explanations in Figure 8, and will not be repeated here.

[0264] It is understood that the process shown in Figure 15 above is an example of the decoding operation of the second communication device and should not be construed as a limitation on the decoding operation of the second communication device.

[0265] It is understood that when the first communication device performs the first interleaving described above, the second communication device can perform deinterleaving corresponding to the first interleaving after decoding the codeword sequence channel; this can be referred to as the first deinterleaving. For example, the second communication device can deinterleave the fifth bit sequence and the sequence in the decoded output sequence excluding the fifth bit sequence based on the index sequence.

[0266] Furthermore, when the first communication device performs the aforementioned second interleaving, the second communication device can perform the corresponding deinterleaving. For example, the second communication device can perform a second deinterleaving based on the information to be decoded, and then decode the information to be decoded after the second deinterleaving. Wherein, if the first communication device performs the second interleaving based on the first sequence, the second communication device can perform the second deinterleaving based on the same first sequence.

[0267] This application does not specifically limit the method of deinterleaving for the second communication device.

[0268] It is understood that, in order to achieve the functions in the above embodiments, the communication device includes hardware structures and / or software modules corresponding to each function. Those skilled in the art should readily recognize that, based on the units and method steps described in conjunction with the embodiments disclosed in this application, this application can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed by hardware or by computer software driving hardware depends on the specific application scenario and design constraints of the technical solution.

[0269] Figures 16 and 17 are schematic diagrams of possible communication devices provided in embodiments of this application. These communication devices can be used to implement the functions of the first communication device and / or the second communication device in the above method embodiments, and thus can also achieve the beneficial effects of the above method embodiments. The first communication device and / or the second communication device can be referred to the description in the above method embodiments, and will not be repeated here. For example, the communication device can be used to implement the function of the first communication device in the process shown in Figure 8, or to implement the function of the second communication device in the process shown in Figure 15.

[0270] The communication device 1600 shown in Figure 16 includes a processing unit 1610 and a transceiver unit (or communication unit) 1620. The communication device 1600 is used to implement the functions of the first communication device and / or the second communication device in the above method embodiments. The transceiver unit may include a sending unit and a receiving unit, used for sending and receiving, respectively.

[0271] Taking the process shown in Figure 8 as an example, the communication device 1600 can be used to implement the function of the first communication device in the method embodiment shown in Figure 8. Specifically, the processing unit 1610 can be used to acquire information bits, perform distribution matching on the first bit sequence, perform channel coding on the input sequence of channel coding, and obtain modulation symbols according to the codeword sequence modulation. For details, please refer to the response description of the process in Figure 8. The transceiver unit 1620 can be used to transmit the modulation symbols.

[0272] In one possible implementation, the processing unit 1610 may also interleave the first bit sequence that has undergone distribution matching and the sequence of information bits excluding the first bit sequence based on the index sequence to obtain the channel-coded input sequence.

[0273] In one possible implementation, the transceiver unit 1620 may also interleave the codeword sequence according to the first sequence.

[0274] Taking the process shown in Figure 15 as an example, the communication device 1600 can be used to implement the function of the second communication device in the method embodiment shown in Figure 15. Specifically, the processing unit 1610 can be used to acquire the information to be decoded, perform channel decoding on the information to be decoded according to the check sequence to obtain the decoding output sequence, perform dedistribution matching on the fifth bit sequence to obtain the first bit sequence, and acquire the information bits. The transceiver unit 1620 can be used to receive the received information transmitted in the channel, which may include the modulation symbols and noise sent by the first communication device.

[0275] In one possible implementation, the transceiver unit 1620 can also be used to deinterleave the fifth bit sequence and the sequences in the decoded output sequence excluding the fifth bit sequence based on the index sequence.

[0276] In one possible implementation, the transceiver unit 1620 can also be used to deinterleave the information to be decoded according to the first sequence.

[0277] For a more detailed description of the processing unit 1610 and the transceiver unit 1620, please refer directly to the description of the process steps and their related features in the above method embodiments, which will not be repeated here.

[0278] The communication device 1700 shown in Figure 17 includes a processor 1710 and an interface circuit 1720. The processor 1710 and the interface circuit 1720 are coupled to each other. It is understood that the interface circuit 1720 can be a transceiver or an input / output interface. Optionally, the communication device 1700 may also include a memory 1730 for storing instructions executed by the processor 1710, or storing input data required by the processor 1710 to execute instructions, or storing data generated after the processor 1710 executes instructions.

[0279] When the communication device 1700 is used to implement the above method embodiment, the processor 1710 is used to implement the function of the processing unit 1610, and the interface circuit 1720 is used to implement the function of the transceiver unit 1620.

[0280] It is understood that the processor in the embodiments of this application can be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), microprocessors without interlocked piped stages architecture (MIPS), advanced instruction set computers (RISC) machines (ARM), network processors (NPs), field-programmable gate arrays (FPGAs), or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. A general-purpose processor can be a microprocessor or any conventional processor.

[0281] The method steps in the embodiments of this application can be implemented in hardware or by a processor executing software instructions. The software instructions can consist of corresponding software modules, which can be stored in random access memory, flash memory, read-only memory, programmable read-only memory, erasable programmable read-only memory, electrically erasable programmable read-only memory, registers, hard disk, portable hard disk, compact disc read-only memory (CD-ROM), or any other form of storage medium known in the art. An exemplary storage medium is coupled to a processor, enabling the processor to read information from and write information to the storage medium. Of course, the storage medium can also be a component of the processor. The processor and storage medium can reside in an ASIC. Furthermore, the ASIC can reside in a first communication device (or first device) or a second communication device (or second device). Alternatively, the processor and storage medium can exist as discrete components in the first communication device (or first device) or the second communication device (or second device).

[0282] In the above embodiments, implementation can be achieved entirely or partially through software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented entirely or partially in the form of a computer program product. The computer program product includes one or more computer programs or instructions. A computer program is a set of instructions that directs each step of an action of an electronic computer or other device having a first communication device and / or a second communication device. It is typically written in a programming language and runs on a target architecture. When the computer program or instructions are loaded and executed on a computer, the processes or functions described in the embodiments of this application are performed, in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer program or instructions can be stored in a computer-readable storage medium or transferred from one computer-readable storage medium to another. For example, the computer program or instructions can be transferred from one website, computer, server, or data center to another website, computer, server, or data center via wired or wireless means. The computer-readable storage medium can be any available medium accessible to a computer or a data storage device such as a server or data center integrating one or more available media. The available medium can be a magnetic medium, such as a floppy disk, hard disk, or magnetic tape; it can also be an optical medium, such as a digital video optical disc; or it can be a semiconductor medium, such as a solid-state drive. The computer-readable storage medium can be volatile or non-volatile, or it can include both types of storage media.

[0283] Based on the same technical concept, embodiments of this application also provide a computer-readable storage medium, including a program or instructions, which, when run on a computer, cause the methods in the above method embodiments to be executed.

[0284] Based on the same technical concept, embodiments of this application also provide a computer program product, including instructions that, when run on a computer, cause the methods in the above method embodiments to be executed.

[0285] Based on the same technical concept, embodiments of this application also provide a communication system, including a first communication device (or a first equipment) or a second communication device (or a second equipment). Taking a system including a first communication device and a second communication device as an example, the first communication device can implement the method shown in FIG8, and the second communication device can implement the method shown in FIG15.

[0286] Based on the same technical concept, embodiments of this application also provide a communication method, including the method performed by the first communication device as shown in FIG8 and the method performed by the second communication device as shown in FIG15.

[0287] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product implemented on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, or optical storage) containing computer-usable program code.

[0288] In the various embodiments of this application, unless otherwise specified or in case of logical conflict, the terminology and / or descriptions of different embodiments are consistent and can be referenced by each other. The technical features of different embodiments can be combined to form new embodiments according to their inherent logical relationship.

[0289] In this application, "at least one" means one or more, and "more than one" means two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, or B alone, where A and B can be singular or plural. In the textual description of this application, the character " / " generally indicates an "or" relationship between the preceding and following related objects; in the formulas of this application, the character " / " indicates a "division" relationship between the preceding and following related objects.

[0290] It is understood that the various numerical designations used in the embodiments of this application are merely for descriptive convenience and are not intended to limit the scope of the embodiments of this application. The order of the process numbers described above does not imply the order of execution; the execution order of each process should be determined by its function and internal logic.

Claims

1. A communication method, characterized in that, include: Obtain information bits, wherein the information bits include a first bit sequence and a second bit sequence; Perform distribution matching on the first bit sequence to obtain the first bit sequence after distribution matching; Channel coding is performed on the input sequence of channel coding to obtain a codeword sequence, wherein the codeword sequence includes a first codeword sequence corresponding to the first bit sequence after distribution matching, a second codeword sequence corresponding to the second bit sequence, and a check sequence; Modulation is performed according to the codeword sequence to obtain a modulation symbol, wherein part or all of the first codeword sequence corresponds to the highest amplitude bit of the modulation symbol, part or all of the second codeword sequence corresponds to the lowest amplitude bit of the modulation symbol, and part or all of the check sequence corresponds to the sign bit of the modulation symbol.

2. The method as described in claim 1, characterized in that, The first bit sequence, after distribution matching, corresponds to the first column set in the basis matrix corresponding to the channel coding, and the second bit sequence corresponds to the second column set in the basis matrix. The column weight corresponding to the first column set is less than or equal to the column weight corresponding to the second column set.

3. The method as described in claim 2, characterized in that, The column weight corresponding to the first column set is less than or equal to the column weight corresponding to the second column set, including one or more of the following: The maximum column weight in the first column set is less than or equal to the minimum column weight in the second column set; The average column weight of the columns in the first column set is less than or equal to the average column weight of the columns in the second column set.

4. The method according to any one of claims 1-3, characterized in that, The first column set and / or the second column set are related to the bit rate.

5. The method according to any one of claims 1-4, characterized in that, Before channel coding the input sequence, the method further includes: The first bit sequence, which has undergone distribution matching, and the bit sequences of the information bits excluding the first bit sequence are interleaved based on the index sequence to obtain the input sequence of the channel coding; wherein, the order of the indices in the index sequence is related to the column weights of the columns in the base matrix.

6. The method as described in claim 5, characterized in that, The order of the indices in the index sequence is related to the column weights of the columns in the base matrix, including: The order of the indexes in the index sequence is positively correlated with the column weight; The order of the indexes in the index sequence is negatively correlated with the column weight; or The index sequence includes a first index group and a second index group, wherein the column weight corresponding to the first index group is positively or negatively correlated with the index corresponding to the first index group.

7. The method as described in claim 6, characterized in that, The sorting of multiple indexes within the first group is positively or negatively correlated with the column corresponding to the first index group, and / or the sorting of multiple indexes within the second group is positively or negatively correlated with the column corresponding to the second index group.

8. The method according to any one of claims 1-7, characterized in that, The step of modulating the codeword sequence to obtain modulation symbols includes: The codeword sequence is interleaved according to a first sequence, wherein the first element of the first sequence is the modulation order minus 1, the first element is the first element in the first sequence, the second element of the first sequence is 0, and the second element is the second element in the first sequence. The first interleaved sequence is modulated to obtain the modulation symbol.

9. The method according to any one of claims 1-8, characterized in that, The number of bits in the first bit sequence is related to one or more of the following: Signed numbers; Distribution matching code rate.

10. The method according to any one of claims 1-9, characterized in that, The number of bits in the second bit sequence is related to the number of symbols.

11. The method according to any one of claims 1-10, characterized in that, The information bits also include a third bit sequence, which is used for the distribution matching of the first bit sequence. The codeword sequence also includes a third codeword sequence corresponding to the third bit sequence, and some or all of the sequences in the third codeword sequence correspond to the second highest amplitude bit of the modulation symbol.

12. The method as described in claim 11, characterized in that, The number of bits in the third bit sequence is related to at least one of the following: Net payload bits; Distributed matching bitrate; Signed numbers; Number of check bits.

13. The method according to any one of claims 1-12, characterized in that, At least one of the number of bits in the first bit sequence, the number of bits in the second bit sequence, and the number of bits in the third bit sequence is also related to the modulation order.

14. The method according to any one of claims 1-13, characterized in that, The information bits also include a fourth bit sequence, which is not subjected to the distribution matching. The codeword sequence also includes a fourth codeword sequence corresponding to the fourth bit sequence, and some or all of the sequences in the fourth codeword sequence correspond to the sign bit of the modulation symbol.

15. A communication method, characterized in that, include: Obtain decoding information, which includes a first codeword sequence, a second codeword sequence, and a check sequence, wherein some or all of the first codeword sequence corresponds to the highest amplitude bit of the modulation symbol, some or all of the second codeword sequence corresponds to the lowest amplitude bit of the modulation symbol, and some or all of the check sequence corresponds to the sign bit of the modulation symbol. Channel decoding is performed on the information to be decoded according to the verification sequence to obtain a decoding output sequence, wherein the decoding output sequence includes the fifth bit sequence corresponding to the first codeword sequence and the second bit sequence corresponding to the second codeword sequence; The fifth bit sequence is subjected to dedistribution matching to obtain the first bit sequence; Obtain information bits, wherein the information bits include the first bit sequence and the second bit sequence.

16. The method as described in claim 15, characterized in that, The fifth bit sequence corresponds to the first column set in the basis matrix corresponding to the channel decoding, and the second bit sequence corresponds to the second column set in the basis matrix. The column weight corresponding to the first column set is less than or equal to the column weight corresponding to the second column set.

17. The method as described in claim 16, characterized in that, The column weight corresponding to the first column set is less than or equal to the column weight corresponding to the second column set, including one or more of the following: The maximum column weight in the first column set is less than or equal to the minimum column weight in the second column set; The average column weight of the columns in the first column set is less than or equal to the average column weight of the columns in the second column set.

18. The method according to any one of claims 15-17, characterized in that, The first column set and / or the second column set are related to the bit rate.

19. The method according to any one of claims 15-18, characterized in that, After performing channel decoding on the information to be decoded according to the check sequence, the method further includes: The fifth bit sequence and the sequences in the decoded output sequence excluding the fifth bit sequence are deinterleaved based on the index sequence, wherein the order of the indices in the index sequence is related to the column weights in the base matrix.

20. The method as described in claim 19, characterized in that, The order of the indices in the index sequence is related to the column weights of the columns in the base matrix, including: The order of the indexes in the index sequence is positively correlated with the column weight; The order of the indexes in the index sequence is negatively correlated with the column weight; or The index sequence includes a first index group and a second index group, wherein the column weight corresponding to the first index group is positively or negatively correlated with the index corresponding to the first index group.

21. The method as described in claim 20, characterized in that, The sorting of multiple indexes within the first group is positively or negatively correlated with the column corresponding to the first index group, and / or the sorting of multiple indexes within the second group is positively or negatively correlated with the column corresponding to the second index group.

22. The method according to any one of claims 15-21, characterized in that, The step of performing channel decoding on the information to be decoded based on the verification sequence to obtain the decoding output sequence includes: The information to be decoded is deinterleaved according to the first sequence, wherein the first element of the first sequence is the modulation order minus 1, the first element is the first element in the first sequence, the second element of the first sequence is 0, and the second element is the second element in the first sequence. Decode the deinterleaved information to be decoded to obtain the decoded output sequence.

23. The method according to any one of claims 15-22, characterized in that, The number of bits in the first bit sequence is related to one or more of the following: Signed numbers; Distribution matching code rate.

24. The method according to any one of claims 15-23, characterized in that, The number of bits in the second bit sequence is related to the number of symbols.

25. The method according to any one of claims 15-24, characterized in that, The information to be decoded also includes a third codeword sequence corresponding to the third bit sequence, some or all of the sequences in the third codeword sequence correspond to the second highest amplitude bit of the modulation symbol, the decoded output sequence also includes the third bit sequence, the third bit sequence is used for the dedistribution matching of the fifth bit sequence, and the information bits also include the third bit sequence.

26. The method as described in claim 25, characterized in that, The number of bits in the third bit sequence is related to at least one of the following: Net payload bits; Distributed matching bitrate; Signed numbers; Number of check bits.

27. The method as described in any one of claims 15-26, characterized in that, At least one of the number of bits in the first bit sequence, the number of bits in the second bit sequence, and the number of bits in the third bit sequence is also related to the modulation order.

28. The method according to any one of claims 15-27, characterized in that, The information to be decoded also includes a fourth codeword sequence, some or all of which correspond to the sign bit of the modulation symbol. The information bits also include a fourth bit sequence corresponding to the fourth codeword sequence, which is not subjected to the dedistribution matching.

29. A communication device, characterized in that, Includes a processor for executing computer programs or instructions to implement the method as described in any one of claims 1-14, or to implement the method as described in any one of claims 15-28.

30. The communication device as claimed in claim 29, characterized in that, The communication device further includes a memory for storing the computer program or instructions.

31. A computer-readable storage medium, characterized in that, The storage medium stores a computer program or instructions, which, when executed by a communication device, implement the method as described in any one of claims 1-14, or the method as described in any one of claims 15-28.

32. A computer program product, characterized in that, When the computer program product is executed by a computer, it causes the computer to perform the method as described in any one of claims 1-14, or to perform the method as described in any one of claims 15-28.

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