Encoding method and apparatus, and decoding method and apparatus

Abstract

The present application relates to the technical field of wireless communications. Provided are an encoding method and apparatus, and a decoding method and apparatus, so as to improve the performance of an LDPC code. The encoding method comprises: a first communication device acquiring an information bit sequence; the first communication device determining a second base matrix on the basis of a first base matrix, wherein the second base matrix is obtained by means of lifting the first base matrix, wherein a lifting mode corresponding to a sub-matrix A1 of the first base matrix is different from lifting modes corresponding to sub-matrices included in the first base matrix other than the sub-matrix A1, the sub-matrix A1 is the first to m1-th rows and the first to n1-th columns of the first base matrix, m1 is an integer greater than or equal to 1, and n1 is an integer greater than or equal to 1; the first communication device obtaining a check matrix on the basis of the second base matrix, a lifting size and a translation value; and the first communication device encoding the information bit sequence on the basis of the check matrix. On the basis of the above solution, a lifting mode for a base matrix can be flexibly designed, thereby improving the performance of an LDPC code.

Description

An encoding and decoding method and apparatus

[0001] Cross-reference of related applications

[0002] This application claims priority to Chinese Patent Application No. 202510070007.9, filed on January 15, 2025, entitled "An Encoding and Decoding Method and Apparatus", and to Chinese Patent Application No. 202511903944.4, filed on December 15, 2025, entitled "An Encoding and Decoding Method and Apparatus", the entire contents of which are incorporated herein by reference. Technical Field

[0003] This application relates to the field of wireless communication technology, and in particular to an encoding and decoding method and apparatus. Background Technology

[0004] Low-density parity check (LDPC) codes are a channel coding scheme that is very close to the Shannon limit. They have the characteristics of good performance and low complexity. They have been selected by the 3rd generation partnership project (3GPP) as the coding and decoding scheme for the data channel of 5th generation (5G) communication.

[0005] The maximum payload information content currently supported by 5G LDPC codes is 8448, which cannot directly support scenarios with higher throughput requirements. To address this issue, a secondary lifting scheme is proposed. This involves replacing each non-zero element in the original base matrix with a cyclically shifted identity matrix before lifting, thus increasing the number of rows and columns of the base matrix by a factor of k, thereby increasing the maximum supported payload information content by a factor of k.

[0006] However, the second-order boosting scheme results in excessive low-repetition and redundant large-repetition structures, leading to performance degradation. For example, the puncturing design of large-repetition structures during transmission increases the probability of decoding errors in low-iteration-rounds under high-throughput scenarios. Furthermore, the second-order boosting scheme also disrupts the encoding structure of LDPC codes, increasing the complexity of encoding and decoding. Summary of the Invention

[0007] This application provides an encoding and decoding method and apparatus to improve the performance of LDPC codes.

[0008] Firstly, an encoding method is provided. This method can be executed by a first communication device. Unless otherwise specified, "first communication device" in this application can refer to a first communication device (e.g., a network device, a terminal device), a component within the first communication device (e.g., a processor, a chip, or a chip system), or a logic module or software capable of implementing all or part of the functions of the first communication device. The method includes: the first communication device acquiring an information bit sequence; the first communication device determining a second basis matrix based on a first basis matrix, the second basis matrix being obtained by enhancing the first basis matrix; wherein the enhancement method corresponding to submatrix A1 of the first basis matrix differs from the enhancement methods corresponding to other submatrixes of the first basis matrix besides submatrix A1, and submatrix A1 is the first basis matrix in rows 1 to m1 and columns 1 to n1. Here, m1 is an integer greater than or equal to 1, and n1 is an integer greater than or equal to 1; the first communication device obtaining a parity check matrix based on the second basis matrix, the enhancement size, and the translation value; and the first communication device encoding the information bit sequence based on the parity check matrix.

[0009] Based on the above scheme, the lifting method of each submatrix in the base matrix can be flexibly designed, thereby reducing the damage to the coding structure of LDPC codes, improving the performance of LDPC codes, and providing stronger compatibility with different application scenarios, such as high throughput scenarios. At the same time, since the lifting method of the first base matrix is ​​controlled, it can be hardware compatible, improving error correction performance while maintaining coding performance.

[0010] In one possible implementation, the promotion method for submatrix A1 differs from that for submatrix B1 in the first submatrix. Submatrix B1 is the first base matrix, consisting of rows 1 to m1 and columns n1+1 to n2, where n2 is an integer greater than n1. The promotion method for submatrix A1 includes promoting the non-zero elements of A1 to a k*k identity matrix and / or a cyclic shift matrix of the k*k identity matrix. The promotion method for submatrix B1 includes promoting the non-zero elements of B1 to a k*1 matrix with only one component being 1 and the rest being 0, where k is a positive integer.

[0011] Based on the above scheme, adjacent rows of submatrix A1 are orthogonal, allowing simultaneous decoding of both rows, reducing mutual interference and improving decoding speed. Furthermore, this improvement method does not disrupt the encoding structure of submatrix B1; the number of elements in each row and column of submatrix B1 remains unchanged, thus maintaining the same linear complexity and encoding complexity.

[0012] In one possible implementation, the promotion method for submatrix A1 differs from that for submatrix C1 in the first submatrix. The promotion method for submatrix A1 includes promoting the non-zero elements of A1 to a k*k identity matrix and / or a cyclic shift matrix of the k*k identity matrix. The promotion method for submatrix C1 includes promoting the non-zero elements of submatrix E1 in the first submatrix to a k*1 matrix with all components equal to 1, and replacing rows 1 to m1 and columns n2+1 to N of the first submatrix with the promoted submatrix E1. Submatrix E1 is then the first base matrix, consisting of rows m1+1 to M and columns n2+1 to N, where M is an integer greater than m1, N is an integer greater than n2, and k is an integer. Based on this scheme, adjacent rows of submatrix A1 are orthogonal, allowing simultaneous decoding of both rows, reducing mutual interference, increasing decoding speed, and preserving the structure of submatrix C1.

[0013] In one possible implementation, the promotion method for submatrix A1 differs from that for submatrix B1 in the first submatrix, and also differs from that for submatrix C1 in the first submatrix. Submatrix B1 is the first base matrix, consisting of rows 1 to m1 and columns n1+1 to n2, where n2 is an integer greater than n1. The promotion method for submatrix A1 includes promoting the non-zero elements of submatrix A1 to a k*k identity matrix and / or a cyclic shift matrix of the k*k identity matrix. The promotion method for submatrix B1 includes promoting the non-zero elements of submatrix B1 to a k*1 matrix with only one component being 1 and the rest being 0. The promotion methods corresponding to submatrix C1 include promoting the non-zero elements in submatrix E1 in the first submatrix to a k*1 matrix with all components being 1, and replacing rows 1 to m1 and columns n2+1 to N of the first submatrix with the promoted submatrix E1. Submatrix E1 is the first base matrix with rows m1+1 to M and columns n2+1 to N, where M is an integer greater than m1, N is an integer greater than n2, and k is an integer.

[0014] In one possible implementation, the promotion of submatrix A1 involves promoting the non-zero elements of submatrix A1 to... and / or The cyclic shift matrix.

[0015] In one possible implementation, the promotion method corresponding to submatrix B1 in the first basis matrix includes promoting the non-zero elements in submatrix B1 to... or The promotion method corresponding to submatrix C1 in the first basis matrix includes promoting the non-zero elements of submatrix E1 in the first submatrix to... And replace rows 1 to m1 and columns n2+1 to N of the first submatrix with the promoted submatrix E1, where N is an integer greater than n1.

[0016] In one possible implementation, the lifting of submatrix A1 includes lifting the non-zero elements of submatrix A1 to a k*k identity matrix and / or a cyclic shift matrix of the k*k identity matrix, and lifting the non-zero elements of submatrix A1 to a 1*k matrix. Based on the above scheme, hybrid lifting of submatrix A1 can improve the code rate supported by the second base matrix.

[0017] In one possible implementation, the 1*k matrix consists of either all 1s or all zeros.

[0018] In one possible implementation, the first communication device merges L groups from rows 1 to k*m1 of the second base matrix. Each of the L groups contains k rows, and each group's rows are merged into a single row; L is a positive integer. Optionally, the value of L is determined by the code rate. Based on this scheme, by merging some rows in the second base matrix, the code rate supported by the second base matrix can be increased.

[0019] In one possible implementation, the first communication device splits J groups of rows from the merged L groups of rows contained in the second base matrix. Each of the J groups of rows consists of one row, and each group is split into k rows, where J is a positive integer. Based on this scheme, splitting the merged second base matrix can reduce the bit rate. Therefore, by splitting and merging the second base matrix, a flexible nested bit rate design is achieved, making it compatible with more scenarios.

[0020] In one possible implementation, the translation value corresponding to the first element in the i-th row and j-th column of the first basis matrix is ​​P. i,j The translation value of at least one element in the k*k matrix corresponding to the first element of the second basis matrix is ​​P. i,j .

[0021] In one possible implementation, the translation value corresponding to the first element in the i-th row and j-th column of the first basis matrix is ​​P. i,j The translation value of the second element contained in the k*k matrix corresponding to the first element in the second basis matrix is ​​based on P. i,j Sure.

[0022] Based on the above scheme, this application designs the translation values ​​corresponding to the elements contained in the second basis matrix, and performs simple calculations on the basis of the original translation values ​​to obtain the translation values ​​of the improved basis matrix, without the need to record a new translation value table.

[0023] In one possible implementation, the target column of the second basis matrix is ​​not punctured, and the target column corresponds to the first and second columns of the first basis matrix. Based on the above scheme, since large column overlaps are not punctured during transmission, performance loss during low-iteration decoding is avoided, thus improving error correction performance.

[0024] Secondly, a decoding method is provided. This method can be executed by a second communication device. Unless otherwise specified, "second communication device" in this application can refer to a second communication device (e.g., a network device, a terminal device), a component within the second communication device (e.g., a processor, a chip, or a chip system), or a logic module or software capable of implementing all or part of the functions of the second communication device. The method includes: the second communication device acquiring a first sequence; and the second communication device decoding the first sequence based on a parity check matrix. The parity check matrix is ​​determined based on a second base matrix, a lift dimension, and a translation value, obtained by lifting the first base matrix using the second base matrix. The lift method corresponding to submatrix A1 of the first base matrix differs from the lift methods corresponding to other submatrixes of the first base matrix besides submatrix A1. Submatrix A1 is the first base matrix in rows 1 to m1 and columns 1 to n1. Here, m1 is an integer greater than or equal to 1, and n1 is an integer greater than or equal to 1.

[0025] In one possible implementation, the promotion method for submatrix A1 differs from that for submatrix B1 in the first submatrix. Submatrix B1 is the first base matrix, consisting of rows 1 to m1 and columns n1+1 to n2, where n2 is an integer greater than n1. The promotion method for submatrix A1 includes promoting the non-zero elements of A1 to a k*k identity matrix and / or a cyclic shift matrix of the k*k identity matrix. The promotion method for submatrix B1 includes promoting the non-zero elements of B1 to a k*1 matrix with only one component being 1 and the rest being 0, where k is a positive integer.

[0026] In one possible implementation, the promotion method for submatrix A1 differs from that for submatrix C1 in the first submatrix. The promotion method for submatrix A1 includes promoting the non-zero elements of submatrix A1 to a k*k identity matrix and / or a cyclic shift matrix of the k*k identity matrix. The promotion method for submatrix C1 includes promoting the non-zero elements of submatrix E1 in the first submatrix to a k*1 matrix with all components equal to 1, and replacing rows 1 to m1 and columns n2+1 to N of the first submatrix with the promoted submatrix E1. Here, submatrix E1 represents rows m1+1 to M and columns n2+1 to N of the first base matrix, where M is an integer greater than m1, N is an integer greater than n2, and k is an integer.

[0027] In one possible implementation, the promotion method for submatrix A1 differs from that for submatrix B1 in the first submatrix, and also differs from that for submatrix C1 in the first submatrix. Submatrix B1 is the first base matrix, consisting of rows 1 to m1 and columns n1+1 to n2, where n2 is an integer greater than n1. The promotion method for submatrix A1 includes promoting the non-zero elements of submatrix A1 to a k*k identity matrix and / or a cyclic shift matrix of the k*k identity matrix. The promotion method for submatrix B1 includes promoting the non-zero elements of submatrix B1 to a k*1 matrix with only one component of 1 and the rest of the components of 0. The promotion method for submatrix C1 includes promoting the non-zero elements of submatrix E1 in the first submatrix to a k*1 matrix with all components of 1, and replacing rows 1 to m1 and columns n2+1 to N of the first submatrix with the promoted submatrix E1. Wherein, submatrix E1 is the m1+1 to Mth row and n2+1 to Nth column of the first basis matrix, M is an integer greater than m1, N is an integer greater than n2, and k is an integer.

[0028] In one possible implementation, the promotion of submatrix A1 involves promoting the non-zero elements of submatrix A1 to... and / or The cyclic shift matrix.

[0029] In one possible implementation, the promotion method corresponding to submatrix B1 in the first basis matrix includes promoting the non-zero elements in submatrix B1 to... or The promotion method corresponding to submatrix C1 in the first basis matrix includes promoting the non-zero elements of submatrix E1 in the first submatrix to... And replace rows 1 to m1 and columns n2+1 to N of the first submatrix with the promoted submatrix E1, where N is an integer greater than n1.

[0030] In one possible implementation, the promotion of submatrix A1 includes promoting the non-zero elements of submatrix A1 to a k*k identity matrix and / or a cyclic shift matrix of the k*k identity matrix, and promoting the non-zero elements of submatrix A1 to a 1*k matrix.

[0031] In one possible implementation, the 1*k matrix consists of either all 1s or all zeros.

[0032] In one possible implementation, the second communication device merges L groups from rows 1 to k*m1 of the second base matrix. Each of the L groups contains k rows, and each group's rows are merged into a single row, where L is a positive integer.

[0033] In one possible implementation, the second communication device splits the J groups of rows within the merged L groups of rows contained in the second base matrix. Each of the J groups of rows consists of one row, and each group is split into k rows, where J is a positive integer.

[0034] In one possible implementation, the translation value corresponding to the first element in the i-th row and j-th column of the first basis matrix is ​​P. i,j The translation value of at least one element in the k*k matrix corresponding to the first element of the second basis matrix is ​​P. i,j .

[0035] In one possible implementation, the translation value corresponding to the first element in the i-th row and j-th column of the first basis matrix is ​​P. i,j The translation value of the second element contained in the k*k matrix corresponding to the first element in the second basis matrix is ​​based on P. i,j Sure.

[0036] In one possible implementation, the target column of the second basis matrix is ​​not punched, and the target column corresponds to the first and second columns of the first basis matrix.

[0037] Thirdly, a communication device is provided, including a processing unit and a transceiver unit.

[0038] The processing unit is used to acquire the information bit sequence. It is also used to determine a second basis matrix based on the first basis matrix, which is obtained by enhancing the first basis matrix. The enhancement method for submatrix A1 of the first basis matrix differs from the enhancement methods for other submatrixes of the first basis matrix, where submatrix A1 is the first basis matrix with rows 1 to m1 and columns 1 to n1. Here, m1 and n1 are integers greater than or equal to 1. The processing unit is also used to obtain a parity check matrix based on the second basis matrix, the enhancement size, and the translation value. Furthermore, the processing unit is used to encode the information bit sequence based on the parity check matrix. The transceiver unit is used to transmit a first sequence, which is determined based on the encoded information bit sequence.

[0039] In one possible implementation, the promotion method for submatrix A1 differs from that for submatrix B1 in the first submatrix. Submatrix B1 is the first base matrix, consisting of rows 1 to m1 and columns n1+1 to n2, where n2 is an integer greater than n1. The promotion method for submatrix A1 includes promoting the non-zero elements of A1 to a k*k identity matrix and / or a cyclic shift matrix of the k*k identity matrix. The promotion method for submatrix B1 includes promoting the non-zero elements of B1 to a k*1 matrix with only one component being 1 and the rest being 0, where k is a positive integer.

[0040] In one possible implementation, the promotion method for submatrix A1 differs from that for submatrix C1 in the first submatrix. The promotion method for submatrix A1 includes promoting the non-zero elements of submatrix A1 to a k*k identity matrix and / or a cyclic shift matrix of the k*k identity matrix. The promotion method for submatrix C1 includes promoting the non-zero elements of submatrix E1 in the first submatrix to a k*1 matrix with all components equal to 1, and replacing rows 1 to m1 and columns n2+1 to N of the first submatrix with the promoted submatrix E1. Submatrix E1 is the first base matrix with rows m1+1 to M and columns n2+1 to N, where M is an integer greater than m1, N is an integer greater than n2, and k is an integer.

[0041] In one possible implementation, the promotion method for submatrix A1 differs from that for submatrix B1 in the first submatrix, and also differs from that for submatrix C1 in the first submatrix. Submatrix B1 is the first base matrix, consisting of rows 1 to m1 and columns n1+1 to n2, where n2 is an integer greater than n1. The promotion method for submatrix A1 includes promoting the non-zero elements of submatrix A1 to a k*k identity matrix and / or a cyclic shift matrix of the k*k identity matrix. The promotion method for submatrix B1 includes promoting the non-zero elements of submatrix B1 to a k*1 matrix with only one component being 1 and the rest being 0. The promotion methods corresponding to submatrix C1 include promoting the non-zero elements in submatrix E1 in the first submatrix to a k*1 matrix with all components being 1, and replacing rows 1 to m1 and columns n2+1 to N of the first submatrix with the promoted submatrix E1. Submatrix E1 is the first base matrix with rows m1+1 to M and columns n2+1 to N, where M is an integer greater than m1, N is an integer greater than n2, and k is an integer.

[0042] In one possible implementation, the promotion of submatrix A1 involves promoting the non-zero elements of submatrix A1 to... and / or The cyclic shift matrix.

[0043] In one possible implementation, the promotion method corresponding to submatrix B1 in the first basis matrix includes promoting the non-zero elements in submatrix B1 to... or The promotion method corresponding to submatrix C1 in the first basis matrix includes promoting the non-zero elements of submatrix E1 in the first submatrix to... And replace rows 1 to m1 and columns n2+1 to N of the first submatrix with the promoted submatrix E1, where N is an integer greater than n1.

[0044] In one possible implementation, the promotion of submatrix A1 includes promoting the non-zero elements of submatrix A1 to a k*k identity matrix and / or a cyclic shift matrix of the k*k identity matrix, and promoting the non-zero elements of submatrix A1 to a 1*k matrix.

[0045] In one possible implementation, the 1*k matrix consists of either all 1s or all zeros.

[0046] In one possible implementation, the processing unit is further configured to merge L groups from rows 1 to k*m1 contained in the second base matrix. Each of the L groups comprises k rows, and each group of rows is merged into a single row, where L is a positive integer.

[0047] In one possible implementation, the processing unit is further configured to split J groups of rows within the merged L groups of rows contained in the second base matrix. Each of the J groups of rows comprises one row, and each group is split into k rows, where J is a positive integer.

[0048] In one possible implementation, the translation value corresponding to the first element in the i-th row and j-th column of the first basis matrix is ​​P. i,j The translation value of at least one element in the k*k matrix corresponding to the first element of the second basis matrix is ​​P. i,j .

[0049] In one possible implementation, the translation value corresponding to the first element in the i-th row and j-th column of the first basis matrix is ​​P. i,j The translation value of the second element contained in the k*k matrix corresponding to the first element in the second basis matrix is ​​based on P. i,j Sure.

[0050] In one possible implementation, the target column of the second basis matrix is ​​not punched, and the target column corresponds to the first and second columns of the first basis matrix.

[0051] Fourthly, a communication device is provided, including a processing unit and a transceiver unit.

[0052] The transceiver unit is used to acquire the first sequence. The processing unit is used to decode the first sequence based on the parity-check matrix. The parity-check matrix is ​​determined based on the second basis matrix, the lifting dimension, and the translation value. The second basis matrix is ​​obtained by lifting the first basis matrix. The lifting method corresponding to submatrix A1 of the first basis matrix differs from the lifting methods corresponding to other submatrixes of the first basis matrix besides A1. Submatrix A1 is the first basis matrix with rows 1 to m1 and columns 1 to n1. Here, m1 is an integer greater than or equal to 1, and n1 is an integer greater than or equal to 1.

[0053] In one possible implementation, the promotion method for submatrix A1 differs from that for submatrix B1 in the first submatrix. Submatrix B1 is the first base matrix, consisting of rows 1 to m1 and columns n1+1 to n2, where n2 is an integer greater than n1. The promotion method for submatrix A1 includes promoting the non-zero elements of A1 to a k*k identity matrix and / or a cyclic shift matrix of the k*k identity matrix. The promotion method for submatrix B1 includes promoting the non-zero elements of B1 to a k*1 matrix with only one component being 1 and the rest being 0, where k is a positive integer.

[0054] In one possible implementation, the promotion method for submatrix A1 differs from that for submatrix C1 in the first submatrix. The promotion method for submatrix A1 includes promoting the non-zero elements of submatrix A1 to a k*k identity matrix and / or a cyclic shift matrix of the k*k identity matrix. The promotion method for submatrix C1 includes promoting the non-zero elements of submatrix E1 in the first submatrix to a k*1 matrix with all components equal to 1, and replacing rows 1 to m1 and columns n2+1 to N of the first submatrix with the promoted submatrix E1. Here, submatrix E1 represents rows m1+1 to M and columns n2+1 to N of the first base matrix, where M is an integer greater than m1, N is an integer greater than n2, and k is an integer.

[0055] In one possible implementation, the promotion method for submatrix A1 differs from that for submatrix B1 in the first submatrix, and also differs from that for submatrix C1 in the first submatrix. Submatrix B1 is the first base matrix, consisting of rows 1 to m1 and columns n1+1 to n2, where n2 is an integer greater than n1. The promotion method for submatrix A1 includes promoting the non-zero elements of submatrix A1 to a k*k identity matrix and / or a cyclic shift matrix of the k*k identity matrix. The promotion method for submatrix B1 includes promoting the non-zero elements of submatrix B1 to a k*1 matrix with only one component of 1 and the rest of the components of 0. The promotion method for submatrix C1 includes promoting the non-zero elements of submatrix E1 in the first submatrix to a k*1 matrix with all components of 1, and replacing rows 1 to m1 and columns n2+1 to N of the first submatrix with the promoted submatrix E1. Wherein, submatrix E1 is the m1+1 to Mth row and n2+1 to Nth column of the first basis matrix, M is an integer greater than m1, N is an integer greater than n2, and k is an integer.

[0056] In one possible implementation, the promotion of submatrix A1 involves promoting the non-zero elements of submatrix A1 to... and / or The cyclic shift matrix.

[0057] In one possible implementation, the promotion method corresponding to submatrix B1 in the first basis matrix includes promoting the non-zero elements in submatrix B1 to... or The promotion method corresponding to submatrix C1 in the first basis matrix includes promoting the non-zero elements of submatrix E1 in the first submatrix to... And replace rows 1 to m1 and columns n2+1 to N of the first submatrix with the promoted submatrix E1, where N is an integer greater than n1.

[0058] In one possible implementation, the promotion of submatrix A1 includes promoting the non-zero elements of submatrix A1 to a k*k identity matrix and / or a cyclic shift matrix of the k*k identity matrix, and promoting the non-zero elements of submatrix A1 to a 1*k matrix.

[0059] In one possible implementation, the 1*k matrix consists of either all 1s or all zeros.

[0060] In one possible implementation, the processing unit is further configured to merge L groups from rows 1 to k*m1 contained in the second base matrix. Each of the L groups comprises k rows, and each group of rows is merged into a single row, where L is a positive integer.

[0061] In one possible implementation, the processing unit is further configured to split J groups of rows within the merged L groups of rows contained in the second base matrix. Each of the J groups of rows comprises one row, and each group is split into k rows, where J is a positive integer.

[0062] In one possible implementation, the translation value corresponding to the first element in the i-th row and j-th column of the first basis matrix is ​​P. i,j The translation value of at least one element in the k*k matrix corresponding to the first element of the second basis matrix is ​​P. i,j .

[0063] In one possible implementation, the translation value corresponding to the first element in the i-th row and j-th column of the first basis matrix is ​​P. i,j The translation value of the second element contained in the k*k matrix corresponding to the first element in the second basis matrix is ​​based on P. i,j Sure.

[0064] In one possible implementation, the target column of the second basis matrix is ​​not punched, and the target column corresponds to the first and second columns of the first basis matrix.

[0065] Fifthly, a communication device is provided for implementing the various methods described above. This communication device may be a first communication device as described in the first aspect, or a device comprising the first communication device, or a device included in the first communication device, such as a chip; or, the communication device may be a second communication device as described in the second aspect, or a device comprising the second communication device, or a device included in the second communication device. The communication device includes modules, units, or means corresponding to the methods described above, which may be implemented in hardware, software, or by hardware executing corresponding software. The hardware or software includes one or more modules or units corresponding to the functions described above.

[0066] A sixth aspect provides a communication device, comprising: a processor and a communication interface; the communication interface being used to communicate with a module outside the communication device; the processor being used to execute a computer program or instructions to cause the method described in any of the preceding aspects to be executed. The communication device may be a first communication device as described in the first aspect, or a device comprising the first communication device, or a device included in the first communication device, such as a chip; or, the communication device may be a second communication device as described in the second aspect, or a device comprising the second communication device, or a device included in the second communication device.

[0067] A seventh aspect provides a communication device, comprising: at least one processor; the processor being configured to execute a computer program or instructions stored in a memory to implement the method described in any of the preceding aspects. The memory may be coupled to the processor, or may be independent of the processor. The communication device may be a first communication device as described in the first aspect, or a device comprising the first communication device, or a device included in the first communication device, such as a chip; or, the communication device may be a second communication device as described in the second aspect, or a device comprising the second communication device, or a device included in the second communication device.

[0068] Eighthly, this application provides a communication system that may include a first communication device performing the method described in the first aspect and a second communication device performing the method described in the second aspect.

[0069] Ninthly, this application provides a computer-readable storage medium storing computer-readable instructions that, when read and executed by a computer, cause the computer to perform a method in any possible implementation of any of the first to second aspects described above.

[0070] In a tenth aspect, this application provides a computer program product that, when read and executed by a computer, causes the computer to perform a method in any possible implementation of any of the first to second aspects described above.

[0071] In one aspect, this application provides a chip for reading a computer program stored in a memory to execute the method in any possible implementation of any of the first to second aspects described above.

[0072] It is understandable that the technical effects of aspects two through eleven can be referenced from the technical effects of aspect one, and will not be elaborated here. Attached Figure Description

[0073] Figure 1 is an example diagram of a cyclic shift matrix of an identity matrix provided in an embodiment of this application;

[0074] Figure 2 is an example diagram of the base matrix of an LDPC code provided in an embodiment of this application;

[0075] Figure 3 is an example diagram of a check matrix for an LDPC code provided in an embodiment of this application;

[0076] Figure 4 is an example diagram of the base matrix of an LDPC code provided in an embodiment of this application;

[0077] Figure 5 is a schematic diagram of the architecture of a communication system provided in an embodiment of this application;

[0078] Figure 6 is a schematic diagram of a coding / decoding process provided in an embodiment of this application;

[0079] Figure 7 is a flowchart illustrating an encoding method provided in an embodiment of this application;

[0080] Figure 8 is a schematic diagram of a second basis matrix provided in an embodiment of this application;

[0081] Figure 9 is a flowchart illustrating another encoding method provided in an embodiment of this application;

[0082] Figure 10 is a schematic diagram of yet another second basis matrix provided in an embodiment of this application;

[0083] Figure 11 is a schematic diagram of a split second basis matrix provided in an embodiment of this application;

[0084] Figure 12 is a schematic diagram of a simulation effect provided by an embodiment of this application;

[0085] Figure 13 is a schematic diagram of a decoding method provided in an embodiment of this application;

[0086] Figure 14 is a schematic diagram of a communication device provided in an embodiment of this application;

[0087] Figure 15 is a schematic diagram of another communication device provided in an embodiment of this application;

[0088] Figure 16 is a schematic diagram of another communication device provided in an embodiment of this application;

[0089] Figure 17 is a schematic diagram of another communication device provided in an embodiment of this application. Detailed Implementation

[0090] The technical solutions of this application can be applied to various communication systems, such as: Global System for Mobile Communications (GSM), Enhanced Data Rate for GSM Evolution (EDGE), Wideband Code Division Multiple Access (WCDMA), Time Division-Synchronization Code Division Multiple Access (TD-SCDMA), Long Term Evolution (LTE), Worldwide Interoperability for Microwave Access (WiMAX), and 5th Generation (5G) mobile communication systems, such as New Radio (NR). The technical solutions provided in this application can also be applied to future communication systems. These communication systems can also be Bluetooth communication systems, Wireless Local Area Network (WLAN) / WiFi communication systems, Narrow Band Internet of Things (NB-IoT) communication systems, etc. The technical solutions of this application can also be applied to satellite communication systems, wherein the satellite communication system can be integrated with the above-mentioned communication systems.

[0091] To facilitate understanding of the content of this application, the nouns or terms involved in the embodiments of this application will be explained below.

[0092] I. Information Bit Sequence

[0093] An information bit sequence refers to a sequence of multiple bits to be sent. For example, if the bits to be sent are 1, 0, 1, 0, 1, 1, 0, 0, 1, 0, 1, then the information bit sequence is: 10101100101.

[0094] II. Information Length

[0095] Information length refers to the number of information bits to be sent. These information bits may or may not include CRC bits, which will not be distinguished here.

[0096] III. Code Length

[0097] Code length refers to the length of the (to be) transmitted bits, which can be the number of transmitted bits corresponding to the modulated symbol.

[0098] IV. Bitrate

[0099] The bit rate refers to the ratio of the number of information bits to the number of bits to be sent.

[0100] In this embodiment, the information length, code length, and code rate can be pre-configured by higher-layer signaling, MAC layer, or downlink physical layer signals, or they can be directly obtained and calculated by the transceiver. For example, the code length can be determined by the frame structure, number of layers, and modulation scheme of the encoded and transmitted information bits, and the code rate can be indicated in the above manner or given in the MCS (Coded Modulation Table) table.

[0101] V. LDPC Code

[0102] LDPC codes are a channel coding scheme very close to the Shannon limit, characterized by high performance and low complexity. They have been adopted by 3GPP as the coding and decoding scheme for 5G communication data channels. Mainstream LDPC codes have a quasi-cyclic (QC) structure, which avoids bad structures such as short cycles and improves code distance by setting the shift amount of each block.

[0103] LDPC codes can be represented using a basis matrix, where elements are either 0 or 1. Expanding the basis matrix by adding 1 elements results in a Zc*Zc cyclic shift matrix, and expanding by adding 0 elements results in a Zc*Zc zero matrix. This expansion yields a parity-check matrix, which can be used for encoding or decoding. Zc can be referred to as the lift factor, spread factor, spread value, spread coefficient, lifting size, etc. The basis matrix can be represented as H. BG BG is an abbreviation for base graph.

[0104] For example, if the element in the i-th row and j-th column of the basis matrix is ​​1 and corresponds to a shifting value (SV), it can be represented by P. i,j This represents the shift value corresponding to the i-th row and j-th column. A shift value can be used to obtain the value of a cyclic shift.

[0105] Taking Zc=4 as an example, the matrix obtained by cyclically shifting the 4*4 identity matrix to the right by 1, 2, 3, and 0 times respectively is shown in Figure 1. That is, the number of cyclic shifts are 1, 2, 3, and 0 respectively.

[0106] The following example illustrates this. Figure 2 shows an example of the basis matrix in an LDPC code. This basis matrix is ​​a 3x3 matrix, and we assume Zc = 4, and P 0,0 The corresponding right circular shift count is 1, P 0,1 The corresponding right circular shift count is 2, P 1,0 The corresponding number of right circular shifts is 3, P 1,2 The corresponding number of right circular shifts is 3, P 2,2 The corresponding right circular shift count is 1. After expanding the base matrix, we can obtain the parity check matrix as shown in Figure 3.

[0107] Currently, the 3GPP 38.212 protocol defines various values ​​for the lift size (Zc) as shown in Table 1.

[0108] Table 1

[0109] Referring to Table 1, the values ​​of the lifting dimension Zc can be... Where j represents the j-th row in Table 1, j = 0, 1, 2, 3, 4, 5, 6, 7, and a0, a1, a2, a3, a4, a5, a6, a7 are 2, 3, 5, 7, 9, 11, 13, 15 respectively. k j The value of traverses from 0 to max(k) j ), where max(k0), max(k1), max(k2), max(k3), max(k4), max(k5), max(k6), and max(k7) are 7, 7, 6, 5, 5, 5, 4, and 4, respectively.

[0110] For example, if j = 0, then a0 = 2, and k0 iterates through 0 to 7, so the value of Zc can be 2*2. 0 ,2*2 1 ,2*2 2 ,2*2 3 ,2*2 4 ,2*2 5 ,2*2 6 ,2*27 That is, 2, 4, 8, 16, 32, 64, 128, 256. The cases where j takes values ​​from 1 to 7 are similar and will not be elaborated further.

[0111] The protocol also stipulates that each row of Zc in Table 1 corresponds to a set of SV. When constructing the parity check matrix, the size of Zc is first determined, then the set of SV corresponding to that Zc is determined, and then the parity check matrix is ​​constructed based on Zc and SV.

[0112] Table 2 below shows some examples of a set of SVs defined in the 3GPP 212 protocol.

[0113] Table 2

[0114] Table 2 shows the basis matrix H. BG The translation values ​​SV corresponding to the elements with a value of 1 in row 0 i,j The set index i in Table 2 LS That is, the set index i in Table 1 LS Furthermore, the cyclic shift value corresponding to each element with a value of 1 in the 0th row of the basis matrix BG can be obtained by taking the modulo of the corresponding translation value of Zc.

[0115] It should be noted that Table 2 only shows the translation values ​​corresponding to each element in row 0. In practice, it also includes the translation values ​​corresponding to each element in other rows (such as row 1, row 2, etc.).

[0116] Referring to Table 2, when Zc takes the values ​​2, 4, 8, 16, 32, 64, 128, or 256, then i LS =0, basis matrix H BG The SV values ​​of the elements with a value of 1 in row 0 are 250, 69, 226, 159, 100, 10, 59, 229, 110, 191, 9, 195, 23, 190, 35, 239, 31, 1, 0. Assuming Zc = 4, then the basis matrix H... BGThe cyclic shift counts corresponding to the elements with a value of 1 in row 0 are 250 mod 4, 69 mod 4, 226 mod 4, 159 mod 4, 100 mod 4, 10 mod 4, 59 mod 4, 229 mod 4, 110 mod 4, 191 mod 4, 9 mod 4, 195 mod 4, 23 mod 4, 190 mod 4, 35 mod 4, 239 mod 4, 31 mod 4, 1 mod 4, 0 mod 4, which are 2, 1, 2, 3, 0, 2, 3, 1, 2, 3, 1, 3, 3, 2, 3, 3, 3, 1, 0. This means that the 4x4 identity matrix is ​​cyclically shifted 2, 1, 2, 3, 0, 2, 3, 1, 2, 3, 1, 3, 3, 2, 3, 3, 3, 1, 0 times to obtain the base matrix H. BG The elements in row 0 that have a value of 1 correspond to a 4x4 matrix. For the basis matrix H... BG The elements in the 0th row that have a value of 0 correspond to a zero matrix of size 4*4.

[0117] Similarly, for other values ​​of Zc, there are corresponding translation values ​​and cyclic shift counts, as detailed in Table 2.

[0118] Similarly, for the basis matrix H BG The rows other than row 0 are also determined using a similar method to determine the corresponding Zc*Zc matrix.

[0119] In this embodiment, the lifting and translation operations of the LDPC code are described as follows: For a given lifting size Zc, from the basis matrix H BG Upgraded to the parity check matrix H, specifically, the basis matrix H BG t in i,j (where t) i,j =1) will be replaced with a Zc×Zc matrix I(P) i,j ), where I(P i,j ) is a cyclic shift of the identity matrix I of Zc×Zc by P i,j One (either left or right circular shift is possible) or circular shift P i,j A matrix of degree mod Zc, P i,j The translation value corresponding to the i-th row and j-th column; basis matrix H BG The zeros in H will be replaced with a Zc×Zc matrix of all zeros. It can be seen that the purpose of lifting is to improve the basis matrix H. BG To transform it into a larger parity check matrix H, the translation aims to shift each H... BG The identity matrix corresponding to the non-zero elements is cyclically shifted into a predefined matrix.

[0120] The basis matrix can also be represented by a basis graph, and the two have a corresponding relationship. The basis graph model of LDPC code is BG = (X, Y, F), where X corresponds to the variables, Y corresponds to the check equation, and F is the edge relationship. After expansion by a size Zc, a Tanner graph is obtained, which is a bipartite graph G = (V, C, E), where V is the variable node, C is the check node, and E is the edge relationship, corresponding to the number of columns of the check matrix N = |V| = Z. c |X|, the number of rows in the parity check matrix M = |C| = Z c The number of non-zero elements in the parity check matrix is ​​|E|=Z|F|.

[0121] In a Tanner graph, a cycle is defined as a structure that starts from a vertex, follows non-repeating edges, passes through non-repeating vertices, and eventually returns to the starting point. Since a Tanner graph is bipartite, the length of its cycles can only be an even number greater than 2, such as 4, 6, or 8. Short cycles are highly detrimental to LDPC codes, primarily in two ways: short cycles form trap sets, significantly impacting the code distance; and short cycles introduce correlations into the confidence propagation decoding algorithm, leading to inaccurate mutual information estimation. Therefore, short cycles should be avoided as much as possible in the design of LDPC codes.

[0122] VI. The Basis Matrix of 5G LDPC Codes

[0123] The basis matrices of the 5G LDPC code include BG1 and BG2. BG1 is a 46x68 matrix, and BG2 is a 42x52 matrix. Both BG1 and BG2 have the matrix structure shown in Figure 4. The LDPC code basis matrix includes submatrices A, B, C, D, and E. As shown in Figure 4, submatrices A are rows 1-m1 and columns 1-n1 of the basis matrix; submatrices B are rows 1-m1 and columns n1+1-n2; submatrices C are rows 1-m1 and columns n2+1-N; submatrices D are rows m1+1-M and columns 1-n2; and submatrices E are rows m1+1-M and columns n2+1-N. It should be understood that m1 is an integer greater than or equal to 1 and less than M, n1 is an integer greater than or equal to 1 and less than or equal to N, n2 is an integer greater than or equal to 1 and less than or equal to N, and n1 is less than or equal to n2.

[0124] In this matrix, submatrix A represents the region corresponding to the high-bitrate information column, submatrix B represents the region corresponding to the core verification for the high-bitrate information column, submatrix C is the zero matrix, submatrix D is the incremental redundancy part of the base matrix and corresponds to the low-bitrate information column, and submatrix E is the incremental redundancy region and is an identity matrix. The base matrix takes values ​​of 0 or 1, where 0 represents an empty element and 1 represents an edge in the base graph or an association between the verification and the variable.

[0125] For example, submatrix A can be columns 1 to 22 and rows 1 to 4; submatrix B can be columns 23 to 26 and rows 1 to 4; submatrix C can be columns 27 to 68 and rows 1 to 4; submatrix D can be columns 1 to 26 and rows 5 to 46; and submatrix E can be columns 27 to 68 and rows 5 to 46.

[0126] Figure 5 is a schematic diagram of the architecture of a communication system 1000 provided in an embodiment of this application. As shown in Figure 5, the communication system 1000 includes a radio access network (RAN) 100, wherein the RAN 100 includes at least one RAN node (110a and 110b in Figure 5, collectively referred to as 110), and may also include at least one terminal (120a-120j in Figure 5, collectively referred to as 120). The RAN 100 may also include other RAN nodes, such as wireless relay devices and / or wireless backhaul devices (not shown in Figure 5). The terminal 120 is wirelessly connected to the RAN node 110. Terminals and RAN nodes can be interconnected via wired or wireless means. The communication system 1000 may also include a core network 200. The RAN node 110 is connected to the core network 200 via wireless or wired means. The core network equipment in core network 200 and the RAN node 110 in RAN 100 can be independent and different physical devices, or they can be the same physical device that integrates the logical functions of the core network equipment and the logical functions of the RAN node. Communication system 1000 may also include Internet 300.

[0127] RAN100 can be an evolved universal terrestrial radio access (E-UTRA) system, a new radio (NR) system, a 6th generation (6G) radio access system, or a future radio access system as defined in the 3rd generation partnership project (3GPP). RAN100 can also include two or more of the above-mentioned different radio access systems. RAN100 can also be an open RAN (O-RAN).

[0128] RAN nodes, also known as radio access network devices, RAN entities, or access nodes, are used to help terminals access communication systems wirelessly. In one application scenario, an RAN node can be a base station, an evolved NodeB (eNodeB), a transmission reception point (TRP), a next-generation NodeB (gNB) in a 5G mobile communication system, or a base station in a future mobile communication system. RAN nodes can be macro base stations (as shown in Figure 5, 110a), micro base stations or indoor stations (as shown in Figure 5, 110b), and can also be relay nodes or donor nodes.

[0129] In another application scenario, multiple RAN nodes can collaborate to help terminals achieve wireless access, with different RAN nodes implementing different functions of the base station. For example, a RAN node can be a central unit (CU), a distributed unit (DU), or a radio unit (RU). Here, the CU performs the functions of the base station's Radio Resource Control (RRC) and Packet Data Convergence Protocol (PDCP), and can also perform the functions of the Service Data Adaptation Protocol (SDAP). The DU performs the functions of the base station's Radio Link Control (RANC) and Medium Access Control (MAC) layers, and can also perform some or all of the physical layer functions. For specific descriptions of these protocol layers, refer to the relevant 3GPP technical specifications. The RU can be used to implement radio frequency signal transmission and reception. The CU and DU can be two independent RAN nodes or integrated into the same RAN node, such as within a baseband unit (BBU). The RU can be included in radio frequency equipment, such as in a remote radio unit (RRU) or an active antenna unit (AAU). The CU can be further divided into two types of RAN nodes: CU-control plane and CU-user plane.

[0130] In different systems, RAN nodes may have different names. For example, in an O-RAN system, a CU can be called an open CU (O-CU), a DU can be called an open DU (O-DU), and an RU can be called an open RU (O-RU). The RAN nodes in the embodiments of this application can be implemented through software modules, hardware modules, or a combination of software and hardware modules. For example, a RAN node can be a server loaded with the corresponding software modules. The embodiments of this application do not limit the specific technology or device form used in the RAN nodes. For ease of description, a base station is used as an example of a RAN node in the following description.

[0131] A terminal is a device with wireless transceiver capabilities, capable of sending signals to or receiving signals from a base station. Terminals can also be called terminal equipment, user equipment (UE), mobile station, mobile terminal, etc. Terminals can be widely used in various scenarios, such as device-to-device (D2D), vehicle-to-everything (V2X) communication, machine-type communication (MTC), Internet of Things (IoT), virtual reality, augmented reality, industrial control, autonomous driving, telemedicine, smart grids, smart furniture, smart offices, smart wearables, smart transportation, smart cities, etc. Terminals can be mobile phones, tablets, computers with wireless transceiver capabilities, wearable devices, vehicles, airplanes, ships, robots, robotic arms, smart home devices, etc. The embodiments of this application do not limit the specific technology or device form used in the terminal.

[0132] Base stations and terminals can be fixed or mobile. They can be deployed on land, including indoors or outdoors, handheld or vehicle-mounted; they can also be deployed on water; and they can be deployed on aircraft, balloons, and satellites. The embodiments of this application do not limit the application scenarios of the base stations and terminals.

[0133] The roles of base stations and terminals can be relative. For example, the helicopter or drone 120i in Figure 5 can be configured as a mobile base station. For terminals 120j that access the wireless access network 100 through 120i, terminal 120i is a base station; however, for base station 110a, 120i is a terminal, meaning that 110a and 120i communicate via a wireless air interface protocol. Of course, 110a and 120i can also communicate via a base station-to-base station interface protocol. In this case, relative to 110a, 120i is also a base station. Therefore, both base stations and terminals can be collectively referred to as communication devices. 110a and 110b in Figure 5 can be called communication devices with base station functions, and 120a-120j in Figure 5 can be called communication devices with terminal functions.

[0134] Communication between base stations and terminals, between base stations, and between terminals can be conducted using licensed spectrum, unlicensed spectrum, or both simultaneously. Communication can be conducted using spectrum below 6 GHz, spectrum above 6 GHz, or both simultaneously. The embodiments of this application do not limit the spectrum resources used for wireless communication.

[0135] In the embodiments of this application, the functions of the base station can be executed by modules (such as chips) within the base station, or by a control subsystem that includes base station functions. This control subsystem, including base station functions, can be a control center in the aforementioned application scenarios such as smart grids, industrial control, intelligent transportation, and smart cities. Similarly, the functions of the terminal can be executed by modules (such as chips or modems) within the terminal, or by a device that includes terminal functions.

[0136] In this application, the base station sends downlink signals or downlink information to the terminal, with the downlink information carried on the downlink channel; the terminal sends uplink signals or uplink information to the base station, with the uplink information carried on the uplink channel. To communicate with the base station, the terminal needs to establish a radio connection on a cell controlled by the base station. The cell with which the terminal has established a radio connection is called the terminal's serving cell. When the terminal communicates with this serving cell, it is also susceptible to interference from signals from neighboring cells.

[0137] In this application, entity A sends information to entity B, either directly or indirectly through other entities. Similarly, entity B receives information from entity A, either directly or indirectly through other entities. Entities A and B can be RAN nodes or terminals, or modules within RAN nodes or terminals. Information transmission and reception can be between RAN nodes and terminals, such as between a base station and a terminal; between two RAN nodes, such as between a CU and a DU; or between different modules within a single device, such as between a terminal chip and other modules of the terminal, or between a base station chip and other modules of the base station.

[0138] The communication systems and service scenarios described in the embodiments of this application are for the purpose of more clearly illustrating the technical solutions of the embodiments of this application, and do not constitute a limitation on the technical solutions provided in the embodiments of this application. As those skilled in the art will know, with the evolution of network architecture and the emergence of new service scenarios, the technical solutions provided in the embodiments of this application are also applicable to similar technical problems.

[0139] The maximum payload information volume currently supported by 5G LDPC codes is 8448, which cannot directly support scenarios with higher throughput requirements. At the same time, since the first two columns of the basis matrix have large column weights, they need to be punched during transmission. Therefore, in high-throughput scenarios, decoding with low iteration rounds (such as 5 iterations) results in slower decoding convergence speed and a higher probability of errors.

[0140] To support scenarios requiring higher throughput, two solutions are proposed. One solution increases the maximum lift size supported by 5G by a factor of k. Here, the base matrix remains unchanged, and the shift values ​​remain the same, changing the maximum lift size from 384 to 384*k, thus increasing the maximum supported payload information from 8448 to 8448*k. The other solution involves a secondary lift of the base matrix. Before the lift size increase, each non-zero element in the original base matrix is ​​replaced with a cyclically shifted identity matrix, increasing the number of rows and columns of the base matrix by a factor of k, thereby increasing the maximum supported payload information by a factor of k.

[0141] However, in the first approach, only the boost size is increased without designing the translation value, so the performance loss caused by puncturing still exists in low-iteration decoding scenarios. Furthermore, increasing the boost size is not compatible with existing hardware, leading to latency issues within the same Zc block during decoding. In the second approach, excessive low-repetition columns and redundant large-repetition columns occur, and the performance loss caused by puncturing persists. In addition, the double boosting scheme also disrupts the LDPC code's encoding structure, increasing encoding and decoding complexity. For example, the double boosting scheme will disrupt the encoding structure of submatrix B1, increasing linear complexity, and will also disrupt the rate matching and hybrid auto-repeat request (HARQ) functionality of submatrix E1.

[0142] Therefore, embodiments of this application provide an encoding and decoding method. In this method, the transmitting end can perform a second lifting operation on the base matrix. The lifting method of submatrix A1 in the base matrix differs from the lifting methods corresponding to the other submatrices. The transmitting end can flexibly design the lifting methods of each submatrix in the base matrix, thereby reducing the disruption to the encoding structure of the LDPC code and improving the performance of the LDPC code.

[0143] The technical solutions provided in this application can be applied to enhanced mobile broadband (eMBB) scenarios, high throughput scenarios, peak rate scenarios, etc., as well as ultra-reliable low latency communication (URLLC) and massive machine type communication (mMTC) scenarios.

[0144] Taking the communication system shown in Figure 5 as an example, to ensure the reliability of communication between devices, the transmitting end can encode the information to be transmitted, and correspondingly, the receiving end decodes the encoded information after receiving it. As shown in the encoding and decoding process in Figure 6, the source signal from the transmitting end is transmitted on the channel after sequentially undergoing source coding, channel coding, rate matching, and modulation. After receiving the signal, the receiving end sequentially undergoes demodulation and rate matching, channel decoding, and source decoding to obtain the destination signal. The transmitting end and receiving end can be either network devices or terminal devices, respectively. It can be understood that in downlink communication, the network device is the transmitting end, and the terminal device is the receiving end; in uplink communication, the terminal device is the transmitting end, and the network device is the receiving end. The network device can be either a transmitting end or a receiving end. Furthermore, this application does not exclude the possibility that both the transmitting end and the receiving end are terminal devices, in which case D2D communication occurs between the transmitting end and the receiving end. The method provided in the embodiments of this application can be used in the channel coding process.

[0145] Figure 7 shows a flowchart of an encoding method. This method can be applied to a first communication device. The first communication device can be the transmitting end in the encoding / decoding flow shown in Figure 6; correspondingly, the second communication device can be the receiving end in the encoding / decoding flow shown in Figure 6. Unless otherwise specified, the term "first communication device" in this application can refer to the first communication device itself (e.g., a network device, a terminal device), a component within the first communication device (e.g., a processor, a chip, or a chip system), or a logic module or software capable of implementing all or part of the functions of the first communication device. Similarly, unless otherwise specified, the term "second communication device" in this application can refer to the second communication device itself (e.g., a network device, a terminal device), a component within the second communication device (e.g., a processor, a chip, or a chip system), or a logic module or software capable of implementing all or part of the functions of the second communication device.

[0146] For example, when the first communication device is a terminal device, the second communication device can be a network device, or the second communication device can also be a terminal device; when the first communication device is a network device, the second communication device can be a terminal device, or the second communication device can also be a terminal device. The method includes:

[0147] S701: The first communication device acquires the information bit sequence.

[0148] The information bit sequence can be the information bit sequence to be encoded. For example, the information bit sequence can be a source-encoded information bit sequence.

[0149] S702: The first communication device encodes the information bit sequence based on the parity check matrix.

[0150] The parity check matrix can be the parity check matrix of an LDPC code. In this embodiment, the parity check matrix can be determined based on the second base matrix. For example, the first communication device obtains the parity check matrix by lifting and cyclically shifting the second base matrix according to the lifting dimension and translation value, as described in Tables 1 and 2.

[0151] In one possible implementation, the second basis matrix can be obtained by enhancing the first basis matrix. The first basis matrix can be a basis matrix of a 5G LDPC code, such as BG1 or BG2. The enhancement method corresponding to submatrix A1 of the first basis matrix differs from the enhancement methods corresponding to other submatrixes of the first basis matrix besides A1. For example, the enhancement method corresponding to submatrix A1 differs from the enhancement method corresponding to submatrix B1 in the first basis matrix. Similarly, the enhancement method corresponding to submatrix A1 differs from the enhancement methods corresponding to submatrix C1 in the first basis matrix. Furthermore, the enhancement method corresponding to submatrix A1 differs from the enhancement methods corresponding to submatrix B1 and submatrix C1 in the first basis matrix.

[0152] In the above implementation, submatrix A1 can be a part or all of submatrix A in the first base matrix (as shown in Figure 4). For example, submatrix A1 can be the entirety of submatrix A, meaning submatrix A can be rows 1 to m1 and columns 1 to n1 of the first base matrix. Alternatively, submatrix A1 can be a part of submatrix A. For instance, submatrix A can be partitioned, and submatrix A1 can be a specific region within the partitioned submatrix A.

[0153] Similarly, submatrix B1 can be a part or all of submatrix B in the first base matrix (as shown in Figure 4). For example, submatrix B1 can be the entirety of submatrix B, meaning submatrix B can be rows 1 to m1 and columns n1+1 to n2 of the first base matrix. Alternatively, submatrix B1 can be a portion of submatrix B. For instance, submatrix B can be partitioned, and submatrix B1 can be a specific region within that partition.

[0154] In this embodiment, rows Y of submatrix E in the first base matrix can be interchanged with submatrix C. Here, Y = m1. That is, rows identical to those in submatrix C are extracted from submatrix E and interchanged with submatrix C. After the interchange, rows Y in the atomic matrix E become the new submatrix C, and the remaining rows in atomic matrix C and submatrix E together form the new submatrix E. Submatrix C1 can be part or all of the interchanged submatrix C.

[0155] The interchange of submatrix E and submatrix C can also be understood as follows: In this embodiment, submatrix C of the first base matrix is ​​in rows 1 to m1 and columns n2+1 to N, and submatrix C is an identity matrix, while submatrix E of the first base matrix is ​​in rows m1+1 to M and columns n2+1 to N, and is a zero matrix. Therefore, submatrix C1 can be part or all of submatrix C in the first base matrix. For example, submatrix C1 can be in rows 1 to m1 and columns n2+1 to N of the first base matrix. Also for example, submatrix C can be partitioned, and submatrix C1 can be a region of submatrix C after partitioning.

[0156] Based on the above scheme, the first communication device can flexibly design the lifting method of each sub-matrix, thereby avoiding damage to the encoding structure of the base matrix and improving the performance of LDPC code.

[0157] The following describes the promotion methods of each submatrix in the embodiments of this application.

[0158] 1) Promotion method of submatrix A1.

[0159] Non-zero elements in submatrix A1 are promoted to k*k identity matrices and / or cyclic shift matrices of k*k identity matrices. Here, k is a positive integer. For example, k is an integer greater than or equal to 2. Zero elements in submatrix A1 are promoted to k*k zero matrices.

[0160] Let's take k=2 as an example. Non-zero elements in submatrix A1, such as 1, can be promoted to... and / or Circular shift matrix, such as The following example replaces non-zero elements with Let's take an example to illustrate.

[0161] Refer to Table 3, which shows the elements contained in submatrix A1 of the first basis matrix.

[0162] Table 3: An example of the elements contained in submatrix A1 of the first basis matrix.

[0163] When the sending end promotes submatrix A1, it can promote non-zero elements, i.e., element one, to... Promote element zero to The improved submatrix A1 can be shown in Table 4.

[0164] Table 4: An example of the elements contained in the promoted submatrix A1.

[0165] Based on the above-mentioned method of boosting submatrix A1, adjacent rows of submatrix A1 are orthogonal. Therefore, during decoding, two rows can be decoded simultaneously, which can reduce mutual interference during decoding and improve decoding speed.

[0166] 2) Promotion method of submatrix B1.

[0167] Non-zero elements in submatrix B1 are promoted to a k*1 matrix (or vector), where only one component is 1 and the rest are 0. A k*1 matrix (or vector) can be understood as a k-row, 1-column matrix (or vector). Elements with zero in submatrix B1 are promoted to a k*1 zero matrix. Let's take k=2 as an example. Non-zero elements in submatrix B1, such as 1, can be promoted to... or The following example replaces non-zero elements with Let's take an example to illustrate.

[0168] Refer to Table 5, which shows the elements contained in submatrix B1 of the first basis matrix.

[0169] Table 5: An example of the elements contained in submatrix B1.

[0170] When the sending end promotes submatrix B1, it can promote non-zero elements, i.e., element one, to... Promote element zero to The improved submatrix B1 can be shown in Table 6.

[0171] Table 6: An example of the elements contained in the promoted submatrix B1.

[0172] Based on the above method of boosting submatrix B1, the encoding structure of submatrix B1 is not destroyed, and the number of elements 1 in each row and column of submatrix B1 remains unchanged. Therefore, the linear complexity remains unchanged, and the encoding complexity also remains unchanged.

[0173] 3) Promotion method of submatrix C1.

[0174] Non-zero elements in submatrix C1 are promoted to a k*1 matrix with all components equal to 1. Zero elements in submatrix C1 are promoted to a k*1 zero matrix. This is illustrated using k=2 as an example. Non-zero elements in submatrix C1, such as 1, can be promoted to...

[0175] Refer to Table 7, which shows the elements contained in submatrix C1 of the first basis matrix.

[0176] Table 7: An example of the elements contained in submatrix C1.

[0177] When the sending end promotes submatrix C1, it can promote non-zero elements, i.e., element 1, to... Promote element zero to The improved submatrix C1 can be shown in Table 8.

[0178] Table 8: An example of the elements contained in submatrix C1.

[0179] Based on the above-described method of promoting submatrix C1, the structure of submatrix C1 will not be destroyed, and therefore the HARQ function of submatrix C1 will not be destroyed.

[0180] It should be noted that the operation of swapping the positions of submatrix C and submatrix E mentioned above can be performed before or after the promotion of submatrix C1. This application does not impose any specific limitations.

[0181] In one possible implementation, the transmitting end can promote submatrices A1, B1, and C1 in the first base matrix respectively. The promoted submatrices A1, B1, and C1 can be shown in Figure 8. In Figure 8, the transmitting end promotes the non-zero elements in submatric A1 to... Promote the zero elements in submatrix A1 to Promote the non-zero elements in submatrix B1 to Promote the zero elements in submatrix B1 to Promote the non-zero elements in submatrix C1 to Promote the zero element in submatrix C1 to

[0182] In one possible implementation, the target column in this embodiment is not punctured during transmission. For example, the target column may correspond to the first and second columns of a first basis matrix. The target column may also correspond to the first 2*k columns of a second basis matrix. For example, when k=2, the target column corresponds to the first to fourth columns of the second basis matrix. This avoids the performance loss caused by puncturing.

[0183] Based on the above scheme, the transmitter can increase the maximum supported throughput by expanding the first base matrix without changing the maximum boost size, improve the error correction performance in low-iteration decoding, and the parity check matrix generation method can be hardware-friendly based on the original QC-LDPC code framework.

[0184] The encoding method provided in the embodiments of this application is described in detail below. Referring to FIG9, an exemplary flowchart of an encoding method provided in an embodiment of this application is shown. The method can be executed by a first communication device and may include the following steps.

[0185] S901: The first communication device determines the first base matrix and the lifting dimension.

[0186] For example, the first communication device may select a base matrix from BG1 and BG2 as the first base matrix based on code length, code rate and scenario, and determine the boost size.

[0187] It should be noted that the basis matrix of LDPC codes is designed for the lowest possible code rate. When different code rates need to be supported, the upper left portion of the first basis matrix (submatrix A and submatrix B) can be used. Submatrix A and submatrix B constitute the basis matrix supporting the highest code rate. When lower code rates need to be supported, rows and columns can be added to submatrix A and submatrix B to form the basis matrix.

[0188] It is understandable that the method by which the first communication device selects the first base matrix and the size can refer to the selection method in 5G LDPC codes, which will not be elaborated here.

[0189] S902: The first communication device promotes the elements contained in the first base matrix.

[0190] The first communication device can improve each submatrix in the first base matrix, as described in 1) to 3) above.

[0191] In one possible implementation, the first communication device can determine whether the first base matrix needs to be boosted based on the boost size and the code rate. For example, when the number of information bits to be transmitted exceeds the upper limit of the first base matrix (maximum boost size * number of columns of submatrix A), the first base matrix can be considered to need boosting. If the first communication device determines that the first base matrix needs boosting, it can boost each submatrix of the first base matrix separately, referring to the descriptions in 1) to 3) above.

[0192] It should be understood that the above-described method by which the first communication device determines whether the first base matrix needs to be upgraded is only an example. The first communication device may also determine whether the first base matrix needs to be upgraded based on the code rate, such as whether the first base matrix supports the current code rate.

[0193] S903: The first communication device determines the parity check matrix based on the second base matrix, the lift dimension, and the translation value.

[0194] The first communication device can refer to the relevant descriptions in Tables 1 and 2 to determine the lifting dimension and translation value, and lift the second base matrix by the lifting dimension, and cyclically shift the lifted translation value by the translation value to obtain the parity matrix.

[0195] S904: The first communication device encodes the information bit sequence based on the parity check matrix.

[0196] The first communication device can perform LDPC encoding on the information bit sequence based on the parity check matrix to obtain the encoded sequence.

[0197] Based on the scheme shown in Figure 9, this encoding method can have stronger compatibility with different application scenarios, such as high throughput scenarios. At the same time, since the method of improving the first base matrix is ​​controlled, it can be hardware compatible and improve error correction performance while maintaining the encoding performance.

[0198] In one possible implementation, if the target column is not punctured during transmission, and the target column is a large column recursion, then not puncturing the large column recursion may lead to a reduction in the maximum supported bit rate. However, this requirement can be met by hybrid boosting of submatrix A1 in the first basis matrix.

[0199] For example, the sending end can promote the non-zero elements in X rows of submatrix A1 in the first base matrix to a 1*k matrix. A 1*k matrix can be understood as a matrix with 1 row and k columns. For instance, this 1*k matrix can contain either all-1 elements or all-zero elements. The sending end can promote the zero elements in these X rows to a 1*k zero matrix. Optionally, if X is less than the number of rows in submatrix A1, the sending end can perform the promotion method described in 1) above on the elements in the rows of submatrix A1 other than the aforementioned X rows.

[0200] It should be noted that these X rows can be any X rows in submatrix A1, or X rows can be all rows in submatrix A1, where X is a positive integer. Optionally, the value of X can be determined by the bitrate.

[0201] For example, let's take X=1 as an example, where the sender promotes the non-zero elements in the first row of submatrix A1 to a 1x2 matrix with all components equal to 1. As shown in Table 3, the sender can promote the non-zero elements in the first row of submatrix A1 to a 1x2 matrix with all components equal to 1, and promote the zero elements in the first row of submatrix A1 to a 1x2 zero matrix. The sender can perform the promotion method described in 1) on the elements contained in the second to fourth rows of submatrix A1. For example, the sender can promote the non-zero elements contained in the second to fourth rows of submatrix A1 to... Promote the zero elements contained in the second to fourth rows of submatrix A1 to The improved submatrix A1 can be seen in Table 9.

[0202] Table 9: An example of the elements contained in the promoted submatrix A1.

[0203] In this case, the elements contained in submatrices B1 and C1, which are in the same row as the aforementioned X rows, do not need to be promoted.

[0204] In one possible scenario, the method of mixing and boosting submatrix A1 in the first base matrix described above can be achieved by merging adjacent rows in the second base matrix. For example, the transmitter can merge L groups from rows 1 to k*m1 in the second base matrix. Each of the L groups contains k rows, which can be obtained by boosting the same row in the first base matrix. The transmitter can merge each group of rows into a single row, where L is a positive integer. Optionally, the value of L can be determined by the code rate.

[0205] In some embodiments, when merging each group of rows, the sending end can perform an XOR operation on the elements contained in the corresponding row of each column, or perform a mod k addition operation. For example, referring to Figure 10, when k=2 and L=4, the sending end can merge the first and second rows of the second base matrix into one row, the third and fourth rows into one row, the fifth and sixth rows into one row, and the seventh and eighth rows into one row, thereby obtaining the second base matrix shown in Figure 10.

[0206] Optionally, the transmitter can perform hybrid boosting on submatrix A1 during the initial transmission of the information bit sequence, or merge adjacent rows in the second basis matrix. If the channel quality is high, the transmitter can encode the information bit sequence at a higher code rate during the initial transmission. Therefore, merging the second basis matrices can increase the code rate supported by the second basis matrix. The maximum code rate supported by the merged second basis matrix is ​​the same as the maximum code rate supported by BG1 puncturing.

[0207] In another possible implementation, the sender can further split the merged second base matrix to reduce the bit rate. Simultaneously, HARQ functionality can also be implemented. For example, the sender can split J groups of rows from the merged L groups of rows contained in the second base matrix. Each group in J contains one row, which is obtained by merging k rows, and each group is split into k rows. That is, the sender can roll back each group of rows in J to k rows, returning to the state before merging. The J groups of rows can be any J groups from the L groups of rows, where J is a positive integer. Optionally, the value of J is determined by the number of bits to be transmitted, such as the number of retransmitted bits. For example, This indicates rounding up to the nearest integer.

[0208] For example, the transmitter can split the merged second basis matrix when retransmitting the information bit sequence to reduce the code rate. The transmitter can revert one or more rows of the merged second basis matrix in Figure 10 to their state before merging, as shown in Figure 11. Figure 11 uses J=1 and k=2 as an example; the transmitter can split any one of the four rows. Figure 10 uses splitting the first row as an example. The transmitter can then send the information bits generated in the 2i-th row before boosting as retransmitted data.

[0209] Based on the above scheme, by splitting and merging the second base matrix, the second base matrix can have a flexible nested bitrate design, which can be compatible with more scenarios.

[0210] The performance of the coding method provided in this application embodiment is described below with reference to Figure 12. Referring to Figure 12, the performance of the coding method provided in this application and the coding method with doubled maximum size of 5G LDPC are shown at different code rates when the information length K = 16896 and the number of decoding iterations (maxlter) = 5. The horizontal axis represents the ratio of signal power to noise power, EsNo, and the vertical axis represents the bit error rate (BLER).

[0211] As shown in Figure 12, at a code rate R = 11 / 13, the coding scheme provided in this application has better error correction performance than the 5G LDPC coding method that doubles the maximum size increase when Zc = 384. At a code rate R = 11 / 12, the coding scheme provided in this application has better error correction performance than the LDPC coding method when Zc = 384*K.

[0212] In one possible implementation, the embodiments of this application further design the translation values ​​corresponding to the elements contained in the second basis matrix. In one possible case, the translation value corresponding to the first element in the i-th row and j-th column of the first basis matrix is ​​P. i,j The translation value of at least one element in the k*k matrix corresponding to the first element of the second basis matrix is ​​P. i,j In other words, the translation value corresponding to at least one element of the k*k matrix corresponding to the first element of the second basis matrix can remain unchanged, and only the translation values ​​corresponding to the remaining elements of the k*k matrix are adjusted as described in Methods 1 to 5. Alternatively, the translation value corresponding to each element of the k*k matrix corresponding to the first element of the second basis matrix can be adjusted as described in Methods 1 to 5.

[0213] For example, in both of the above cases, the adjusted translation value can be based on P. i,jDetermined. For example, the translation values ​​of the elements in the k*k matrix corresponding to the first element of the second basis matrix are based on P. i,j Confirmed. The adjusted translation values ​​will now be described using methods one through five.

[0214] Method 1: SV i′,j′ =P i,j +w, or SV i′,j′ =mod(P i,j +w,Zc).

[0215] Where w is a preset fixed value, or a constant that is only related to the row after the promotion, such as the same value of w for the same row, or a constant that is only related to the column, such as the same value of w for the same column.

[0216] It should be understood that i can be the i-th row in the first basis matrix, j can be the j-th column in the first basis matrix, i′ can be the i′-th row in the second basis matrix, and j′ can be the j′-th column in the second basis matrix. The range of values ​​for i ∈ the range of values ​​for i′, and the range of values ​​for j ∈ the range of values ​​for j′, which will not be repeated below.

[0217] Method 2: Or SV i′,j′ =P i,j *t*Zc / Zmax, or... Or, SV i′,j′ You can also add or subtract w from the three formulas in Method 2. You can add or subtract w before rounding, or you can add or subtract w after rounding.

[0218] in, This indicates rounding down, where t∈[0,k-1] corresponds to the number of rows or columns in the k*k identity matrix.

[0219] Method 3: or

[0220] Where w and t can be referred to in the descriptions of Method 1 and Method 2.

[0221] Method 4: SV i′,j′ =mod(P i,j +w+t,2 s ).

[0222] Among them 2 s To satisfy the condition that the maximum power of 2 is less than or equal to Zc, w and t can be referred to in the descriptions in Method 1 and Method 2.

[0223] Method 5: or Or, SV i′,j′ You can add or subtract w from the two formulas in Method 5, either before or after rounding.

[0224] Where t can be referred to in Method 2, and k is a positive integer, which is a multiple of the lifting of the first basis matrix.

[0225] Based on the above scheme, a simple calculation is performed on the original translation values ​​to obtain the translation values ​​of the boosted basis matrix, without the need to record a new translation value table.

[0226] This application also provides a decoding method. Referring to Figure 13, an exemplary flowchart of a decoding method provided in this application embodiment is shown. This method can be applied to a second communication device. The second communication device can be the receiving end in the encoding / decoding flow shown in Figure 6. The method includes:

[0227] S1301: The second communication device acquires the first sequence.

[0228] For example, the second communication device can receive a first sequence from the first communication device. The first sequence can be determined based on an encoded information bit sequence. For instance, the first sequence is a sequence to be decoded obtained in the second communication device after the information bit sequence, sent by the first communication device, has undergone encoding, rate matching, modulation, frequency conversion, and other operations, and then transmitted through a wireless transmission environment.

[0229] S1302: The second communication device decodes the first sequence.

[0230] For example, the sending end can perform min-sum (MS) decoding or belief propagation (BP) decoding on the first sequence.

[0231] The second communication device can improve the first basis matrix to obtain a second basis matrix, which can be implemented by referring to the method by which the first communication device determines the second basis matrix. Based on the second basis matrix, the second communication device can determine a parity check matrix by adjusting the improvement size and translation values, and then use the parity check matrix to decode the first sequence.

[0232] Based on the concept of the above embodiments, and referring to FIG14, this application provides a communication device 1400, which includes a processing unit 1401 and a transceiver unit 1402. The device 1400 can be a communication device, or it can be a device applied to a communication device that can support the communication device in performing encoding and decoding methods.

[0233] The transceiver unit can also be referred to as a transceiver module, transceiver, transceiver machine, transceiver device, etc. The processing unit can also be referred to as a processor, processing board, processing unit, processing device, etc. Optionally, the device in the transceiver unit used to implement the receiving function can be considered as a receiving unit. It should be understood that the transceiver unit is used to execute the sending and receiving operations of the communication device in the above method embodiments, and the device in the transceiver unit used to implement the sending function can be considered as a sending unit; that is, the transceiver unit includes a receiving unit and a sending unit.

[0234] Furthermore, it should be noted that if the device is implemented using a chip / chip circuit, the transceiver unit can be an input / output circuit and / or a communication interface, performing input operations (corresponding to the aforementioned receiving operations) and output operations (corresponding to the aforementioned sending operations); the processing unit is an integrated processor, microprocessor, or integrated circuit.

[0235] The following describes in detail an implementation of the device 1400 applied to both the transmitting and receiving ends.

[0236] By way of example, the operations performed by each unit of the device 1400 when it is applied to the transmitting end will be described in detail.

[0237] In one optional implementation, the communication device 1400 can be applied to a transmitting end to execute the method performed by the transmitting end, specifically, for example, the method performed by the transmitting end in the embodiment shown in FIG7.

[0238] For example, processing unit 1401 is used to acquire an information bit sequence. Processing unit 1401 is also used to determine a second basis matrix based on a first basis matrix, the second basis matrix being obtained by lifting the first basis matrix. The lifting method corresponding to submatrix A1 of the first basis matrix is ​​different from the lifting methods corresponding to other submatrixes of the first basis matrix besides submatrix A1. Submatrix A1 is the first basis matrix in rows 1 to m1 and columns 1 to n1. Here, m1 is an integer greater than or equal to 1, and n1 is an integer greater than or equal to 1. Processing unit 1401 is also used to obtain a parity check matrix based on the second basis matrix, the lifting size, and the translation value. The processing unit is also used to encode the information bit sequence based on the parity check matrix. Transceiver unit 1402 is used to transmit a first sequence, the first sequence being determined based on the encoded information bit sequence.

[0239] By way of example, the operations performed by each unit of the device 1400 when it is applied to the receiving end will be described in detail.

[0240] In one alternative implementation, the communication device 1400 can be applied to a receiving end to execute the method performed by the receiving end, specifically, for example, the method executed by the receiving end in the embodiment shown in FIG13 above.

[0241] For example, transceiver unit 1402 is used to acquire a first sequence. Processing unit 1401 is used to decode the first sequence based on a parity check matrix. The parity check matrix is ​​determined based on a second base matrix, a lift dimension, and a translation value. The second base matrix is ​​obtained by lifting the first base matrix. The lift method corresponding to submatrix A1 of the first base matrix differs from the lift methods corresponding to other submatrixes of the first base matrix besides A1. Submatrix A1 is the first base matrix in rows 1 to m1 and columns 1 to n1. Here, m1 is an integer greater than or equal to 1, and n1 is an integer greater than or equal to 1.

[0242] Based on the concept of the embodiments, as shown in FIG15, this application provides a communication device 1500. The communication device 1500 includes a processor 1510. Optionally, the communication device 1500 may further include a memory 1520 for storing instructions executed by the processor 1510, or storing input data required for the processor 1510 to execute instructions, or storing data generated after the processor 1510 executes instructions. The processor 1510 can implement the method shown in the above method embodiments through the instructions stored in the memory 1520.

[0243] Based on the concept of the embodiments, as shown in FIG16, this application provides a communication device 1600, which may be a chip or a chip system. Optionally, in this application embodiment, the chip system may be composed of chips, or may include chips and other discrete devices.

[0244] The communication device 1600 may include at least one processor 1610 coupled to a memory, which may optionally be located within or outside the device. For example, the communication device 1600 may also include at least one memory 1620. The memory 1620 stores computer programs, configuration information, computer programs or instructions, and / or data necessary for implementing any of the above embodiments; the processor 1610 may execute the computer program stored in the memory 1620 to perform the methods in any of the above embodiments. Optionally, the memory may also be integrated with the processor.

[0245] The coupling in this embodiment is an indirect coupling or communication connection between devices, units, or modules, which can be electrical, mechanical, or other forms, used for information exchange between devices, units, or modules. The processor 1610 may operate in conjunction with the memory 1620. This embodiment does not limit the specific connection medium between the transceiver 1630, processor 1610, and memory 1620.

[0246] The communication device 1600 may also include a transceiver 1630, through which the communication device 1600 can interact with other devices. The transceiver 1630 may be a circuit, a bus, a transceiver, or any other device that can be used for information interaction, or a signal transceiver unit. As shown in Figure 16, the transceiver 1630 includes a transmitter 1631, a receiver 1632, and an antenna 1633. Furthermore, when the communication device 1600 is a chip-type device or circuit, the transceiver in the communication device 1600 may also be an input / output circuit and / or a communication interface, capable of inputting data (or receiving data) and outputting data (or transmitting data). The processor may be an integrated processor, a microprocessor, or an integrated circuit, and the processor can determine the output data based on the input data.

[0247] In one possible implementation, the communication device 1600 can be applied to a communication device. Specifically, the communication device 1600 can be a communication device or an apparatus capable of supporting a communication device and implementing the functions of the transmitting end or receiving end in any of the above embodiments. The memory 1620 stores the necessary computer programs, computer programs or instructions and / or data for implementing the functions of the transmitting end or receiving end in any of the above embodiments. The processor 1610 can execute the computer programs stored in the memory 1620 to perform the methods executed by the transmitting end or receiving end in any of the above embodiments.

[0248] In the embodiments of this application, the processor may be a general-purpose processor, a digital signal processor, an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components, and may implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of this application. The general-purpose processor may be a microprocessor or any conventional processor. The steps of the methods disclosed in the embodiments of this application can be directly manifested as being executed by a hardware processor, or executed by a combination of hardware and software modules within the processor.

[0249] In the embodiments of this application, the memory can be non-volatile memory, such as a hard disk drive (HDD) or a solid-state drive (SSD), or it can be volatile memory, such as random-access memory (RAM). The memory can also be any other medium capable of carrying or storing desired program code in the form of instructions or data structures, and accessible by a computer, but is not limited thereto. The memory in the embodiments of this application can also be a circuit or any other device capable of implementing storage functions, used to store computer programs, computer program or instruction and / or data.

[0250] Based on the above embodiments, referring to FIG17, this application embodiment also provides another communication device 1700, including: an input / output interface 1710 and a logic circuit 1720; the input / output interface 1710 is used to receive code instructions and transmit them to the logic circuit 1720; the logic circuit 1720 is used to run the code instructions to execute the method executed by the sending end or the receiving end in any of the above embodiments.

[0251] The following is a detailed description of the operations performed by the device 1700 when applied to a transmitting or receiving end.

[0252] In one optional implementation, the communication device 1700 can be applied to a transmitting end to execute the method performed by the transmitting end, specifically, for example, the method performed by the transmitting end in the embodiment shown in FIG7.

[0253] For example, logic circuit 1720 is used to acquire the information bit sequence. Logic circuit 1720 is also used to determine a second basis matrix based on the first basis matrix, the second basis matrix being obtained by enhancing the first basis matrix. The enhancement method corresponding to submatrix A1 of the first basis matrix differs from the enhancement methods corresponding to other submatrixes of the first basis matrix besides A1. Submatrix A1 is the first basis matrix in rows 1 to m1 and columns 1 to n1. Here, m1 is an integer greater than or equal to 1, and n1 is an integer greater than or equal to 1. Logic circuit 1720 is also used to obtain a parity check matrix based on the second basis matrix, the enhancement size, and the translation value. Logic circuit 1720 is also used to encode the information bit sequence based on the parity check matrix. Input / output interface 1710 is used to output a first sequence, the first sequence being determined based on the encoded information bit sequence.

[0254] Since the communication device 1700 provided in this embodiment can be applied to a transmitting end to execute the method described above, the technical effects it can achieve can be referred to the above method embodiment, and will not be repeated here.

[0255] In one alternative implementation, the communication device 1700 can be applied to a receiving end to execute the method performed by the receiving end, specifically, for example, the method performed by the receiving end in the embodiment shown in FIG13.

[0256] For example, input / output interface 1710 is used to input the first sequence. Logic circuit 1720 is used to decode the first sequence based on the parity check matrix. The parity check matrix is ​​determined based on the second basis matrix, the lift dimension, and the translation value. The second basis matrix is ​​obtained by lifting the first basis matrix. The lift method corresponding to submatrix A1 of the first basis matrix differs from the lift methods corresponding to other submatrixes of the first basis matrix besides A1. Submatrix A1 is the first basis matrix with rows 1 to m1 and columns 1 to n1. Here, m1 is an integer greater than or equal to 1, and n1 is an integer greater than or equal to 1.

[0257] Since the communication device 1700 provided in this embodiment can be applied to a receiving end to execute the method described above, the technical effects it can achieve can be referred to the above method embodiment, and will not be repeated here.

[0258] Based on the above embodiments, this application also provides a communication system, which includes at least one receiving end and at least one transmitting end. The technical effects obtained can be referred to the above method embodiments, and will not be repeated here.

[0259] Based on the above embodiments, this application also provides a computer-readable storage medium storing a computer program or instructions. When the instructions are executed, the method performed by the communication device in any of the above embodiments is implemented. The computer-readable storage medium may include various media capable of storing program code, such as a USB flash drive, portable hard drive, read-only memory, random access memory, magnetic disk, or optical disk.

[0260] To achieve the functions of the communication devices shown in Figures 14-17, this application embodiment also provides a chip, including a processor, for supporting the communication device in implementing the functions involved in the transmitting or receiving end in the above method embodiments. In one possible design, the chip is connected to a memory or the chip includes a memory for storing necessary computer programs, instructions, and data for the transmitting or receiving end.

[0261] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0262] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer programs or instructions. These computer programs or instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in one or more blocks of the flowchart illustrations and / or one or more blocks of the block diagrams.

[0263] These computer programs or instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means that implement the functions specified in one or more flowcharts and / or one or more block diagrams.

[0264] These computer programs or instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer-implemented process, such that the instructions, which execute on the computer or other programmable apparatus, provide steps for implementing the functions specified in one or more flowcharts and / or one or more block diagrams.

Claims

1. An encoding method, characterized in that, include: Obtain the information bit sequence; Based on the second basis matrix, the size and translation values ​​are increased to obtain the parity matrix; wherein, in the second basis matrix, the adjacent rows of submatrix A1 are orthogonal, submatrix B1 in the second basis matrix consists of a k*1 all-zero vector and a k*1 vector with only one component of 1 and the rest of the components of 0, and submatrix C1 in the second basis matrix consists of a k*1 all-zero vector and a k*1 all-1 vector, where k is a positive integer; The information bit sequence is encoded based on the parity check matrix.

2. The method according to claim 1, characterized in that, The submatrix A1 in the second basis matrix consists of a circular shift matrix of the identity matrix and / or a k*k identity matrix.

3. The method according to claim 1 or 2, characterized in that, The second base matrix includes rows of a first type and rows of a second type, wherein the first type of rows and the second type of rows satisfy the following conditions: the set of column indices of the non-zero elements of the first type of rows is a subset of the set of column indices of the non-zero elements of the second type of rows; or, the set of column indices of the non-zero elements of the first type of rows is a first set, the set of column indices of the non-zero elements of the second type of rows is a second set, and the set of column indices of the first set other than the first column index is a subset of the second set; the non-zero elements of the first type of rows include the non-zero elements corresponding to the information column and the core check column of the base matrix of the low-density parity-check (LDPC) code, and the number of the first column indices is 1 or 2; the row weight of the first type of rows is w, and the row weight of the second type of rows is w. or or or or or Indicates rounding down This indicates rounding up to the nearest integer.

4. The method according to claim 3, characterized in that, The first type of row includes the merged rows in rows 1 to k*m1 of the second base matrix, and the second type of row includes the unmerged rows in rows 1 to k*m1 of the second base matrix.

5. The method according to any one of claims 1 to 4, characterized in that, Also includes: Based on the first basis matrix, a second basis matrix is ​​determined, which is obtained by enhancing the first basis matrix. The enhancement method of the submatrix A1 of the first basis matrix is ​​different from the enhancement methods of the other submatrixes of the first basis matrix except for the submatrix A1. The submatrix A1 is the first to m1 rows and the first to n1 columns of the first basis matrix. The m1 is an integer greater than or equal to 1, and the n1 is an integer greater than or equal to 1.

6. The method according to claim 2, characterized in that, The identity matrix includes:

7. The method according to any one of claims 1 to 6, characterized in that, The k*1 vector with only one component being 1 and the rest being 0 includes or 8. The method according to claim 6, characterized in that, The translation value corresponding to the first element in the i-th row and j-th column of the first basis matrix is ​​P. i,j The translation value corresponding to at least one element in the k*k matrix corresponding to the first element in the second basis matrix is ​​P. i,j .

9. The method according to claim 6, characterized in that, The translation value corresponding to the first element in the i-th row and j-th column of the first basis matrix is ​​P. i,j The translation value of the second element contained in the k*k matrix corresponding to the first element in the second basis matrix is ​​based on the P i,j Sure.

10. The method according to claim 6, characterized in that, The target column of the second basis matrix is ​​not punched, and the target column corresponds to the first column and the second column of the first basis matrix.

11. A decoding method, characterized in that, include: Obtain the first sequence; The first sequence is decoded based on the parity check matrix; wherein the parity check matrix is ​​determined based on the second base matrix, the lifting dimension, and the translation value; wherein adjacent rows of submatrix A1 in the second base matrix are orthogonal, submatrix B1 in the second base matrix consists of a k*1 all-zero vector and a k*1 vector with only one component of 1 and the rest of the components of 0, and submatrix C1 in the second base matrix consists of a k*1 all-zero vector and a k*1 all-1 vector, where k is a positive integer.

12. The method according to claim 11, characterized in that, The submatrix A1 in the second basis matrix consists of a circular shift matrix of the identity matrix and / or a k*k identity matrix.

13. The method according to claim 11 or 12, characterized in that, The second base matrix includes rows of a first type and rows of a second type, wherein the first type of rows and the second type of rows satisfy the following conditions: the set of column indices of the non-zero elements of the first type of rows is a subset of the set of column indices of the non-zero elements of the second type of rows; or, the set of column indices of the non-zero elements of the first type of rows is a first set, the set of column indices of the non-zero elements of the second type of rows is a second set, and the set of column indices of the first set other than the first column index is a subset of the second set; the non-zero elements of the first type of rows include the non-zero elements corresponding to the information column and the core check column of the base matrix of the low-density parity-check (LDPC) code, and the number of the first column indices is 1 or 2; the row weight of the first type of rows is w, and the row weight of the second type of rows is w. or or or or or Indicates rounding down This indicates rounding up to the nearest integer.

14. The method according to claim 13, characterized in that, The first type of row includes the merged rows in rows 1 to k*m1 of the second base matrix, and the second type of row includes the unmerged rows in rows 1 to k*m1 of the second base matrix.

15. The method according to any one of claims 11 to 14, characterized in that, Also includes: Based on the first basis matrix, a second basis matrix is ​​determined, which is obtained by enhancing the first basis matrix. The enhancement method of the submatrix A1 of the first basis matrix is ​​different from the enhancement methods of the other submatrixes of the first basis matrix except for the submatrix A1. The submatrix A1 is the first to m1 rows and the first to n1 columns of the first basis matrix. The m1 is an integer greater than or equal to 1, and the n1 is an integer greater than or equal to 1.

16. The method according to claim 12, characterized in that, The identity matrix includes:

17. The method according to any one of claims 11 to 16, characterized in that, The k*1 vector with only one component being 1 and the rest being 0 includes or 18. The method according to claim 15, characterized in that, The translation value corresponding to the first element in the i-th row and j-th column of the first basis matrix is ​​P. i,j The translation value corresponding to at least one element in the k*k matrix corresponding to the first element in the second basis matrix is ​​P. i,j .

19. The method according to claim 15, characterized in that, The translation value corresponding to the first element in the i-th row and j-th column of the first basis matrix is ​​P. i,j The translation value of the second element contained in the k*k matrix corresponding to the first element in the second basis matrix is ​​based on the P i,j Sure.

20. The method according to claim 15, characterized in that, The target column of the second basis matrix is ​​not punched, and the target column corresponds to the first column and the second column of the first basis matrix.

21. A communication device, characterized in that, The device includes a processor coupled to a memory for storing programs or instructions that, when executed by the processor, cause the device to perform the method as claimed in any one of claims 1 to 10, or cause the device to perform the method as claimed in any one of claims 11 to 20.

22. A chip, characterized in that, The chip includes: Communication interface; A processor is configured to invoke and execute the instructions via the communication interface, causing a device equipped with the chip system to perform the method as described in any one of claims 1 to 10, or to cause a device equipped with the chip system to perform the method as described in any one of claims 11 to 20.

23. A computer program product, characterized in that, It includes computer execution instructions that, when executed on a computer, cause the computer to perform the method as described in any one of claims 1 to 10, or cause the electronic device to perform the method as described in any one of claims 11 to 20.

24. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer-executable instructions that, when invoked by an electronic device, cause the electronic device to perform the method as described in any one of claims 1 to 10, or cause the electronic device to perform the method as described in any one of claims 11 to 20.

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