Wireless communication using OTFS and OQAM fbmc

Abstract

A system and method of encoding a binary datastream for wireless transmission combining characteristics of OFDM and FBMC type systems is proposed, based on a precoding schemes adapted to maintaining real orthogonality so that the output of the OTFS processing consists of real-valued symbols. The precoder is intricately linked to the definition of a subsequent 2d linear phase rotation. Two possible precoder architectures are proposed, in which interleaver and conjugate operations process partwise or en bloc the incoming data matrix, before the original matrix is concatenated with the interleaved and conjugated matrix (or its components) to obtain a new matrix for subcarrier allocation and filter bank encoding prior to transmission. Corresponding receiving mechanisms are proposed.

Description

[0001] WIRELESS COMMUNICATION USING OTFS AND OQAM FBMC

[0002] FIELD OF THE INVENTION

[0003] The invention pertains to encoding a binary datastream for wireless transmission, and to decoding a corresponding received datastream.

[0004] BACKGROUND PRIOR ART

[0005] Mobile radio channels exhibit a dual-dispersive nature, where the presence of multipath propagation leads to time dispersion, and Doppler shifts introduce frequency dispersion. To mitigate the impact of time dispersion-induced inter-symbol interference (ISI), multicarrier modulation schemes like Orthogonal frequency division multiplexing (OFDM) are commonly employed. Indeed, OFDM has been widely used in both the fourth-generation (4G) and the fifth-generation (5G) cellular systems. However, Doppler shifts in OFDM introduce inter-carrier interference (ICI), which can degrade system performance. One approach to address both ISI and ICI in OFDM is through pulse shaping. In pulse-shaped OFDM systems, optimized pulse shapes in the time-frequency domain are utilized, based on general time-frequency lattices. Indeed, the ability of the system to withstand time-frequency dispersions relies on the timefrequency localization of the pulse, influenced by Heisenberg’s uncertainty principle.

[0006] Filter bank multicarrier (FBMC) with Offset QAM (OQAM) is one of the waveforms that has been investigated in recent years as an alternative to OFDM in the context of 5G. In recent years, several innovative contributions have been proposed for FBMC / OQAM. At the transmitter side, a novel short prototype filter (PF) denoted by Near Perfect Reconstruction 1 (NPR1) having the same duration as one OFDM symbol was proposed to significantly reduce latency, hardware complexity and energy consumption, as described in the article by Nadal, J., Abdel Nour, C., and Baghdadi, A., entitled “Design and Evaluation of a Novel Short Prototype Filter for FBMC / OQAM Modulation,” IEEE Access, vol. 6, pp. 19610-19625, 2018.

[0007] 1) FBMC / OQAM transmitter: The polyphase Network (PPN)-based technique is the primary approach for the FBMC modulation.

[0008] Figure 1 shows a PPN FBMC / OQAM transmitter implementation.As shown, the implementation of figure 1 comprises an OQAM mapper 110 comprising a QAM mapper 111 creating real and imaginary values from a binary input. The imaginary values are delayed by T / 2 with respect to the real values by delay unit 112. The real and imaginary values are output to respective processing channels. Each processing channel comprises in sequence a preprocessing unit 121, 122, an Inverse Fast Fourier Transform (IFFT) unit 131, 132 and a Polyphase Network (PPN) 141, 142. The outputs of the two processing channels are then combined by a summer 150.

[0009] In operation, a Pulse-amplitude modulation (PAM) symbol at subcarrier index ℓ and time slot k, ak(ℓ) is obtained from the separation of the respective real and imaginary symbols output by the QAM mapper 111 equivalent to OFDM, where L is the total number of available subcarriers and K the number of FBMC symbols with separation of real and imaginary parts respectively at time slots 2 k and 2 k + 1.

[0010] Pre-processing unit 121, 122 computes the phase term φk(l) which to keep the orthogonality in the real field must be a quadrature phase rotation term, i.e. φk(l) = jk+l, or φk(l) = jk+l+kl.

[0011] The outputs of two Inverse Fast Fourier Transform (IFFT) blocks 131, 132 separately process the real and imaginary sub-carriers in accordance with the equation:

[0012] L—l

[0013] Eq. 1

[0014]

[0015] 1=0

[0016] The Polyphase Network (PPN) 141, 142 corresponds in effect to a bank of phase shifters providing a respective phase shift for each sub-carrier.

[0017] As shown, a sequence of operations is performed, starting with a size-L IFFT, followed by PPN filtering. The PPN processing is dependent on the length of the PF, which correlates with the overlapping factor Q. Using a short PF (Q = 1) notably reduces computational complexity and latency. To maintain orthogonality in the real field, the OQAM scheme is used. Consequently, the PPN output signal is delayed by L / 2 samples before being overlapped with the signal from the previous. Therefore, if L is the total number of subcarriers and ak(Z)are the user’s pulse-amplitude modulated (PAM) symbols at time slot k, subcarrier index I, then the baseband signal s(ℓ) Where ℓ represents the sample time index is expressed asK

[0018] Eq. 2

[0019] k=0

[0020] L—l

[0021] (-l)‘kak(l)<t>k(l)e‘2,rT Eq. 3

[0022]

[0023] 1=0

[0024] The PPN 141, 142 can be seen as a digital filter, whose design represents important tradeoffs between performance and system complexity and the final overlap and sum due to OQAM processing.

[0025] When using a short filter with an Overlapping Factor of 1 for the PPN, this latter can be seen as a windowing operation: the outputs of the IFFT are simply multiplied by the prototype filter impulse response. Consequently, the hardware complexity overhead introduced by the PPN is limited.

[0026] On the other hand, Orthogonal time frequency space (OTFS) modulation, a scheme introduced in recent studies as described in the article by Li, M., Liu, W., and Lei, J., entitled “A review on orthogonal time-frequency space modulation: State-of-art, hotspots and challenges,” Computer Networks, vol. 224, p. 109597, 2023. [Online]. Available: https: / / www.sciencedirect.com / science / article / pii / S1389128623000427], which offers compelling characteristics capable of dealing with high-Doppler channels. Instead of conventional time-frequency (TF) domain modulation, OTFS operates in the delay-Doppler (DD) domain. This innovative strategy effectively transforms a time-varying channel into a two dimensional quasi-time-invariant channel, enhancing its resilience to high Doppler spread.

[0027] OTFS modulation

[0028] The OTFS modulation process begins with a two-dimensional ISFFT transform applied to the NxM matrix A. The latter comprises the Amplitude Phase Modulation (APM) data symbols. Upon this transformation, the APM symbols are converted from the 2D DD domain into the 2D Time- Frequency (TF) domain as follows:

[0029] Ulk= Wtx(l,k) × (1 / √NM) Σ Σ amne-i2π(mk / M - nl / N)

[0030]

[0031] n=0 m=0 Eq. 4where Wtx(l, k) is a 2D transmit windowing function, amnis an element of A at a Doppler index m and delay index n, M and N are the total number of Doppler / time and delay / frequency bins, respectively. Next, Heisenberg transform is applied for the TF symbols Utkas shown below K—1 L—1

[0032] sW =y— i i.2TM

[0033] X X Eq. 5

[0034] - KL)el~

[0035]

[0036] k=0 1=0

[0037] where gtxis the impulse response of the transmit PF and ℓ represents the sample time index. It is important to note that most state-of-the-art solutions typically consider gtxand Wtxas rectangular windows, neglecting their potential benefits in mitigating out-of-band power leakage (OOBPL) and improved robustness to several impairments. However, deviating from rectangular functions undermines the intricate orthogonality of the OTFS waveform, necessitating sophisticated receiver techniques to tackle the ensuing interference. OTFS offers several advantages, including managing high Doppler effects. However, in the presence of a time-varying channel, OTFS experiences ISI and ICI. Moreover, the conventional data detection methods proposed for OTFS, including iterative minimum mean squared error (MMSE), maximum-likelihood, and message-passing are known for their effectiveness in mitigating the impact of high Doppler effects, however, they suffer from high computational complexity.

[0038] The OTFS technique uses the inherent complex orthogonality of the OFDM system to convert a time-varying channel to a 2D quasi-time-invariant channel in DD domain. Consequently, to transition from the OFDM-based system to a filter bank (FB) based one, it is imperative to ensure the complex orthogonality of the latter. For instance, a method involving time spreading was proposed for recovering complex orthogonality in the article by Zakaria, R. and Le Ruyet, D, entitled “A novel filter-bank multicarrier scheme to mitigate the intrinsic interference: Application to MIMO systems,” IEEE Transactions on Wireless Communications, vol. 11, no.

[0039] 3, pp. 1112-1123, 2012.] and the article by Demmer, D., Gerzaguet, R., Dore, J.-B., Le Ruyet, D., and Ktenas, D. entitled “Block-filtered ofdm: A novel waveform for future wireless technologies,” in 2017 IEEE International Conference on Communications (ICC), 2017, pp. 1-6-]

[0040] Figure 2 shows the OTFS technique using a filter bank multi-carrier scheme.

[0041] The authors of the article by Pereira, R., Da Rocha, C. A. F., Chang, B. S., and Le Ruyet, D. entitled “A two-dimensional FFT precoded filter bank scheme,” IEEE Transactions on Wireless Communications, pp. 1-1, 2023.9 proposed a new precoded FB system based on 2D-FFT inwhich the OFDM transmitter is changed to a FBMC one, thus obtaining a lower out-of-band emission, as presented schematically in figure 2.

[0042] As shown, an incoming signal is converted from a serial to a parallel structure by Serial to Parallel converter 210, sets of symbols are transmitted in parallel to respective IFFT Blocks 221, 222, 223, such that an overall IFFT is performed in the Doppler domain. The resulting values are then converted back to respective serial representations by Parallel to Serial converters 231, 232, 233. Interference cancellation is then performed by Compensation stage 240 based on the addition of a compensatory multiplicative factor. Furthermore, after mapping the symbols on the time-frequency grid, these will now be transmitted by a filter bank, before performing a Fourier transform in the delay domain at FFT 250. A modified PPN filtering operation is then performed to obtain the final encoded signal. On this basis, complex orthogonality of the FBMC transmission is guaranteed by using a precoding based on a discrete Fourier transform, which is also used to implement the two-dimensional fast Fourier transform.

[0043] While offering the anticipated benefits, this approach has the drawback of requiring a large number of Fourier transforms, with a correspondingly high computational complexity and resulting system cost, power consumption, etc.

[0044] The article entitled “FBMC / OQAM with OTFS Pre-Processing for High Mobility Channels” by Bang Khuc et al, 2024 International Conference on Electrical Engineering and Photonics, proposes a processing method wherein QAM information symbols are mapped into the DD domain. All information symbols are then converted to the time frequency domain by using invers symplectic fast Fourier transformation. Preprocessing is performed in the TF domain, in which in-phase and quadrature components of QAM symbols are shifted by a half of symbol period T / 2. The transmitted signal is then formed by applying Heisenberg transformation.

[0045] In addition, such an approach implies a high computational complexity at the receiver side to combat ISI and ICI. Therefore, it is particularly appealing to design a new waveform that harness the benefits of both FBMC and OTFS waveforms, aiming to leverage their respective advantages while reducing the complexity of the system.

[0046] SUMMARY OF THE INVENTIONIn accordance with the present invention in a first instance there is provided a method of encoding a binary data stream for wireless transmission, said method comprising the steps of: dividing a complex symbol data stream into two parallel complex symbol substreams,

[0047] introducing a delay equal to half the duration of a symbol of said complex symbol data stream to one said complex symbol substream, performing precoding on each complex symbol substream; and performing a delay-Doppler modulated binary data stream encoding of each said complex symbol substream. The operation of performing a delay-Doppler modulated binary data stream encoding comprising the steps of performing a 2D linear transform to transform the input samples represented in Delay-Doppler domain to output samples represented inTime-Frequency, performing a 2D linear phase rotation, and performing a filter bank encoding. The precoding and 2D linear phase rotation are defined such that the input to said filter bank consists of real-valued symbols. The method then combines the two parallel complex substreams to obtain a data stream for transmission.

[0048] In a development of the first aspect, the step of precoding comprises for each said complex symbol substream, splitting said substream into a plurality of successive batches, each said batch defining an input matrix X of size N x M, and interleaving said input matrix to obtain an interleaved matrix defined as Xp[n,m = X[N - n - 1, M - m - 1], where 0 < m < M - l, 0 < n < N - l, N and M represent the number of rows and columns, respectively, of the input matrix performing a conjugate operation on said interleaved matrix to obtain a conjugate interleaved matrix and, concatenating said input matrix with said conjugate interleaved matrix to obtain a precoded matrix of size 2N x M.

[0049] In a development of the first aspect, the step of performing delay-Doppler modulated binary data stream encoding comprises performing a two-dimensional windowing that includes a twodimensional linear phase wherein said two-dimensional linear phase rotation comprises W_N^α W_M^β =

[0050]

[0051] Jne[0,2 / V-l],me[0, M-l] wherein

[0052] N + 1 M — 1

[0053]

[0054] for the said complex symbol substream incorporating no delay, and

[0055]

[0056] iWαNWβMfor the said complex symbol substream incorporating said delay.In accordance with the present invention in a second aspect, there is provided a computer program comprising instructions which, when the program is executed by a computer, cause the computer to carry out the method of the first aspect.

[0057] In accordance with the present invention in a second aspect, there is provided a computer-readable medium comprising instructions which, when executed by a computer, cause the computer to carry out the method of the first aspect.

[0058] In accordance with the present invention in a fourth aspect, there is provided a data encoder for the preparation of a binary data stream for wireless transmission, said encoder comprising: a splitter configured to dividing a complex symbol data stream into two parallel complex symbol substreams, a delay block configured to introduce a delay equal to half the duration of a symbol of said complex symbol data stream to one said complex symbol substream, a precoder for each complex symbol substream configured to perform a precoding operation, and an OTFS encoder configured to perform an OTFS encoding of each said complex symbol substream. The operation of performing an OTFS encoding comprises performing a 2D linear transform, performing a 2D linear phase rotation, and performing a filter bank encoding. The precoding and said 2D linear phase rotation are defined such that the input to said filter bank consists of real-valued symbols, and further comprising a concatenator configured to combine said two parallel complex substreams to obtain a data stream for transmission.

[0059] In accordance with the present invention in a fifth aspect, there is provided a method of processing delay-Doppler modulated binary data stream for decoding, said binary data stream modulated with a defined Prototype Filter and comprising blocks of L subchannels, M Doppler / time bins and N Delay / frequency Bins said method comprising the steps of extracting a predetermined number M of successive upsampled blocks of size LNUFwhere NUFis the upsampling factor from said datastream, performing a fast Fourier transform of size LNUFon the extracted block, extracting the upsampled active carriers from the output of said upsampled fast Fourier transform, performing a circular convolution on each extracted upsampled active carrier, such that NUFstages of circular convolution are performed by the frequency shifted responses of the prototype filter on each respective extracted upsampled active carrier value to obtain respective vector outputs Ym(n,ℓ) defined as:

[0060] A

[0061] Ym(n,ℓ) = Gℓ(p)Xm(ℓ + (n- p)NUF)

[0062]

[0063] P=—A

[0064] where Δ denotes the number of non-truncated filter coefficients, and G is the frequency shifted response of the Prototype Filter PF deduced from its impulse response g as. M—l „ M

[0065] i n 27r (fc 2 ),2npk

[0066] G?) —e Nuf / g(.k elN e~lM

[0067] k=0

[0068] summing the vector outputs Ym(n,ℓ) to obtain a 2N Filter bank outputs Ym(n) by

[0069] NUF-1

[0070] Ym(n) =

[0071]

[0072] €=0

[0073] performing a 2D linear phase rotation, performing a 2D linear transform to transform the input samples represented in Time-Frequency domain to output samples represented in Delay-Doppler domain, and performing a postprocessing operation, wherein said postprocessing operation comprises a corresponding decoding operation for said delay-Doppler modulation on said 2N x M matrix of Filter bank outputs to obtain an N x M output data matrix and where said postprocessing operation and said 2D linear phase rotation are defined such that the output to said postprocessing operation, consists of orthogonal complex-valued symbols.

[0074] In accordance with the present invention in a fifth aspect, the 2D linear transform comprises a row-wise IFFT of size M, followed by a column-wise FFT of size 2N, or a column-wise FFT of size 2N followed by a row-wise IFFT of size M, on said 2N x M matrix.

[0075] In accordance with the present invention in a fifth aspect, the 2D linear phase rotation comprises

[0076] / 2 £7r / ?fc' wff w? = exp — 77 —

[0077] \ M

[0078]

[0079] J / ce[o,2N-i],k'e[o, M-i] where a and p must be chosen to have orthogonal complex-valued symbols at the output of the decoder, and where the sign of the (a, / ?) coefficients must be the opposite of the ones used in the 2D windowing step performed for transmitting data.

[0080] In accordance with a development of the fifth aspect, the step of postprocessing comprises partitioning an intermediate 2N x M matrix output by said filter bank decoding operation, into a first submatrix comprising elements the last N rows of said intermediate 2N x M matrix and a second submatrix comprising the remaining first N rows of said intermediate 2N x M matrix,performing a de-interleaving operation on said first submatrix to obtain a de-interleaved matrix defined as Xp[n, m] = X[N - n - 1, M - m - 1], where 0 < m < M - l, 0 < n < N - l, N and M represent the number of rows and columns, respectively, of the first submatrix,

[0081] performing a conjugate operation on said de-interleaved first sub-matrix to obtain a conjugate de- interleaved first sub-matrix and,

[0082] adding said conjugate de- interleaved first sub-matrix to said second submatrix.

[0083] In accordance with a development of the fifth aspect, the 2D linear phase rotation comprises / ZiTiakx Zinfik' wg < = exp I — - — ) exp

[0084] M

[0085]

[0086] Jfce[o,2N-i],fc'e[o, M-i] wherein

[0087] M — 1

[0088] a = +

[0089]

[0090] P = + 2

[0091] In accordance with the present invention in a sixth aspect there is provided a computer program comprising instructions which, when the program is executed by a computer, cause the computer to carry out the method of the fifth aspect.

[0092] In accordance with the present invention in a seventh aspect there is provided a computer-readable medium comprising instructions which, when executed by a computer, cause the computer to carry out the method of the fifth aspect.

[0093] In accordance with the present invention in an eighth aspect receiver for decoding a delay-Doppler modulated binary data stream, said binary data stream modulated with a defined Prototype Filter and comprising blocks of L subchannels, M Doppler / time bins and N Delay / frequency Bins said receiver comprising: a symbol extractor configured to extract a predetermined number M of successive upsampled blocks of size LNUFwhere NUFis the upsampling factor from said data stream, a fast Fourier transform module configured to perform a fast Fourier transform of size LNUFon the extracted block, a subcarrier extractor configured to extract the upsampled active carriers from the output of said upsampled fast Fourier transform,

[0094] a processing module configured to perform a circular convolution on each extracted upsampled active carrier, such that NUFstages of circular convolution are performed by thefrequency shifted responses of the prototype filter on each respective extracted upsampled active carrier value to obtain respective vector outputs

[0095]

[0096] defined as:

[0097] A

[0098] Ym(n,ℓ) = Gℓ(p)Xm(ℓ + (n- p)NUF)

[0099]

[0100] P=—A

[0101] where Δ denotes the number of non-truncated filter coefficients, and G is the frequency shifted response of the Prototype Filter PF deduced from its impulse response g as

[0102] „ M—l „DM.

[0103] t nV 27r (fc 2 ),2npk

[0104] GXP) —E NUF / g(k)e l E~L M

[0105]

[0106] k=0

[0107] a summer configured to sum the vector outputs

[0108]

[0109] to obtain a 2N Filter bank outputs W by

[0110] NUF-1

[0111] Ym(n) =

[0112]

[0113] €=0

[0114] a phase rotation module configured to perform a 2D linear phase rotation on the output of said summer, a linear transform, module configured to perform a 2D linear transform on the output of said phase rotation module, and a postprocessing module, configured to perform a corresponding decoding operation for said delay-Doppler modulation on said 2N x M matrix of Filter bank outputs to obtain an N x M output data matrix and where said postprocessing operation and said 2D linear phase rotation are defined such that the output to said postprocessing operation, consists of orthogonal complex-valued symbols.

[0115] BRIEF DESCRIPTION OF THE DRAWINGS

[0116] The invention will be better understood and its various features and advantages will emerge from the following description of a number of exemplary embodiments provided for illustration purposes only and its appended figures in which:

[0117] Figure 1 shows a PPN FBMC / OQAM transmitter implementation;

[0118] Figure 2 shows the OTFS technique using a filter bank multi carrier scheme;

[0119] Figure 3 presents a modulation system in accordance with an embodiment;

[0120] Figure 4 shows a first precoder implementation in accordance with an embodiment;

[0121] Figure 5 shows a second precoder implementation in accordance with an embodiment;

[0122] Figure 6 presents details of a partitioning operation in accordance with an embodiment;Figure 7 presents the structure of the output of the concatenation;

[0123] Figure 8 presents in detail components of the OTFS block in accordance with an embodiment; Figure 9a presents a first exemplary mechanism for Subcarrier Allocation;

[0124] Figure 9b presents a second exemplary mechanism for Subcarrier Allocation;

[0125] Figure 9c presents a third exemplary mechanism for Subcarrier Allocation;

[0126] Figure 10 shows a method of encoding a binary data stream for wireless transmission in accordance with an embodiment;

[0127] Figure 11 presents an example of an overlap-save-orthogonal filtered delay Doppler modulation (OS-OF2DM) receiver in accordance with an embodiment;

[0128] Figure 12a presents a first mechanism for extracting active carriers;

[0129] Figure 12b presents a second mechanism for extracting active carriers;

[0130] Figure 12c presents a second mechanism for extracting active carriers;

[0131] Figure 13 shows an exemplary decoder implementation in accordance with a first embodiment; Figure 14 shows an exemplary decoder implementation in accordance with a second embodiment;

[0132] Figure 15 provides an explanatory example of the partitioning operation of the second decoder implementation;

[0133] Figure 16 provides an explanatory example of the concatenation operation of the second decoder implementation;

[0134] Figure 17 presents a method of processing delay-Doppler modulated binary data stream for decoding in accordance with an embodiment;

[0135] Figure 18 presents a computer suitable for carrying out a method according to an embodiment; and

[0136] Figure 19 presents a base station 1900 incorporating computer suitable for carrying out a method according to an embodiment.

[0137] DETAILED DESCRIPTION

[0138] Given the merits of the OTFS waveform and the FBMC transmitter, it is desired to design a new waveform that can harness the advantages of both FBMC and OTFS waveforms, in order to capitalize on their respective advantages. This would involve achieving improved spectral confinement, supporting asynchronous communications, enhancing robustness, enabling flexible resource allocation, and ensuring compatibility with sensing applications.

[0139] To the best of our knowledge, this is the first time that a waveform is proposed with the ability to leverage the advantages of FBMC, OTFS and OQAM. This is simply not possible through simple concatenation. Indeed, new constituent blocks are proposed and designed in order to guarantee orthogonality of the resulting waveform and in order to enable the efficientassociation of a subset of modified FBMC building blocks with modified ones from OTFS and OQAM. Figure 3 depicts the proposed transceiver. The proposed scheme starts by dividing the QAM symbols into two parts. Opposed to state-of-the-art solutions that propose precoding techniques to restore complex orthogonality during the shift from an OFDM to a FBMC-based system, we propose two precoding schemes aimed at maintaining real orthogonality.

[0140] To facilitate the mathematical derivations and notation used throughout this response, we define a set of fundamental operations that will be used in the signal processing steps, including vector flipping, phase rotation, Hadamard product, and DFT operations. These operations are defined as follows

[0141] • X:denotes the column-wise flip of the matrix X ∈ CM×N, which corresponds to reversing the order of its columns. This operation is defined as

[0142] X̄ = XI̊N

[0143] such that

[0144] ĪN: is the N × N anti-identity matrix and INis the N × N identity matrix.

[0145] • tX; denotes the row-wise flip of a matrix X ∈ CM×N, which corresponds to reversing the order of its rows defined by

[0146] ↑X = ĪMX.

[0147] • wαN= [exp(2jπαk / N)]Tk∈[[0,N-1]]is a linear phase rotation (LPR), vector of size N × 1

[0148]

[0149] parameterized by phase increment a.

[0150] • O represents the notation for the Hadamard matrix product (element-wise multiplication).

[0151] • FN= [w-iN]i∈[[0,N-1]]is the DFT matrix of size N.

[0152] • X: applies a conjugate operation on the elements of the matrix X.

[0153] • S(X) is the SFFT applied to the matrix X of size L × K defined as follows

[0154] S(X) = F̄LXFK.

[0155] Similarly, S-1(X) is the inverse SFFT.

[0156] It is thereby ensured that the output of the ISFFT processing block consists of real-valued symbols. Let

[0157] X ∈ CN×MEq. 6represent the matrix of QAM symbols, where M is the number of Doppler / time bins and N is the total number of Delay / frequency bins at the input of the encoder. The entry at delay index n and Doppler bin m is denoted as x(n, m).

[0158] Figure 3 presents a modulation system in accordance with an embodiment.

[0159] In accordance with embodiments complex symbols e.g. in a QAM encoding scheme are permuted in a certain manner to maintain real orthogonality. The complex symbols in this approach are permuted in a certain manner to maintain real orthogonality.

[0160] The resulting waveform may be referred to as “orthogonal frequency delay Doppler modulation” (OF2DM, with its corresponding block diagram shown in Figure 3. It comprises eight constituent blocks, each of which will be elaborated upon in the subsequent description.

[0161] Splitter

[0162] As shown, incoming signals are first processed by splitter block 310. This processing block operates on an input complex valued matrix of dimension 2N x M, where M corresponds to the number of Doppler / time bins and N denotes the number of Delay / frequency bins at the input of the encoder. Consequently, the splitter yields two matrices as output, each sized N x M, effectively separating the input matrix into two distinct streams for further processing independently in two different tracks as depicted in Figure 3.

[0163] Delay

[0164] The delay block 321 is strategically positioned either in the first or second track, offering the flexibility to be placed at the beginning or end of the track. It functions to introduce a delay to the signal, precisely half the duration of a symbol. Taking the lower track, with elements numbered with values ending in “1” as the first track, as shown delay block 321 is provided in the first track, but could equally be provided in the second.

[0165] The delay may advantageously be performed together with the step of combining the two parallel complex substreams as discussed below to obtain the data stream, which will tend to reduce overall hardware complexity.

[0166] After splitting and (as the case may be delay), each stream reaches precoding block 331, 332. In accordance with the present invention, various precoding operations may be envisaged in accordance with the overarching objectives of the invention.

[0167] Specifically, as opposed to state-of-the-art solutions that propose precoding techniques to restore complex orthogonality during the shift from an OFDM to a FBMC-based system,embodiments call for precoding schemes aimed at maintaining real orthogonality. Thereby ensuring that the subsequent OTFS processing may be performed on the basis of real-valued symbols. It is crucial to note that the design of the precoder is intricately linked with a 2D linear phase rotation (LPR) (block number 4), which operates based on the two input parameters (a, / ?) as discussed below. The interdependence between these two blocks will be detailed below along with the two precoder implementations.

[0168] By way of example, two possible such precoding block architectures will now be presented.

[0169] First exemplary precoding approach

[0170] In accordance with the present invention, the precoding and 2D linear phase rotation operations are defined such that the input to the filter bank consists of real-valued symbols. Two exemplary implementations achieving this requirement are presented below.

[0171] Figure 4 shows a first precoder implementation in accordance with an embodiment.

[0172] As shown in figure 4, a precoder block 400 comprises an interleaver and conjugate block 410, comprising, sequentially, interleaver block 411 and conjugate block 412. The operations performed by these blocks are described further below.

[0173] As discussed above a complex symbol substream is split into a plurality of successive batches, each said batch defining an input matrix X in figure 4 of size N x M.

[0174] The interleaver block 411 restructures each batch in a specified manner. In particular, let X be a matrix of size N x M, which serves as the input to the interleaver block. The interleaver operates by rearranging the elements of X. Mathematically, the entry Xp(n.m) in the resulting interleaved matrix Xpis defined as

[0175] Xp(n. m) = x(N — n — 1, M — m — 1) Eq. 7 where 0 < m < M - l, 0 < n < N - l.

[0176] By way of example, if the input batch defines the following matrix, with N = 6 and M = 4, - 1 2 3 4 - 5 6 7 8

[0177] 9 10 11 12

[0178] 13 14 15 16

[0179] 17 18 19 20

[0180]

[0181] -21 22 23 24-

[0182] The output of the interleaving operation will be:-24 23 22 21- 20 19 18 17

[0183] 16 15 14 13

[0184] 12 11 10 9

[0185] 8 7 6 5

[0186]

[0187] - 4 3 2 1 -

[0188] In other terms, the operation performed by the interleaver block 411 can be seen as flipping the matrix in both the x and y axes.

[0189] The conjugate block 412 involves a conjugate operation that is applied to the output of the interleaver resulting in a matrix denoted as Xp.

[0190] Continuing the previous example, the output of the conjugating operation will be denoted:

[0191] -24* 23* 22* 21*- 20* 19* 18* 17*

[0192] 16* 15* 14* 13*

[0193] 12* 11* 10* 9*

[0194] 8* 7* 6* 5*

[0195]

[0196] Block 400 further comprises a concatenation block 420. Concatenation block 420 concatenates the matrix Xpwith the original matrix X, resulting in the precoded matrix C G ^2NxM

[0197]

[0198] ‘ = 0 Continuing the previous example, the output of the concatenation block 420 may be denoted:

[0199] - 1 2 3 4 - 5 6 7 8

[0200] 9 10 11 12

[0201] 13 14 15 16

[0202] 17 18 19 20

[0203] 21 22 23 24

[0204] 24* 23* 22* 21*

[0205] 20* 19* 18* 17*

[0206] 16* 15* 14* 13*

[0207] 12* 11* 10* 9*

[0208] 8* 7* 6* 5*

[0209]

[0210] Figure 5 shows a second precoder implementation in accordance with an embodiment.

[0211] This approach involves multiple steps wherein the complex symbols within the matrix X are rearranged in a specific manner to maintain real orthogonality.As shown, a plurality of interleaver and conjugate blocks 51 Oa, 51 Ob, 51 Oc, 51 Od are provided, each corresponding in function to block 410 as described above.

[0212] In this embodiment, each interleaver and conjugate block 510a, 510b, 510c, 51 Od processes a respective part of the input matrix as provided by partitioning block 505.

[0213] Partitioning block 505 operates to divide the input matrix X into sub-matrices of varying sizes.

[0214] Figure 6 presents details of a partitioning operation in accordance with an embodiment.

[0215] As shown in figure 6, in accordance with an embodiment, an input matrix X of dimensions M = 8, N = 9, is partitioned into six sub-matrices denoted as X-i, X2, X3, X4, X5, X6of distinct sizes.

[0216] Specifically, as shown in figure 6, a first submatrix Xi of size 3, or for an arbitrary N x M matrix of size 1 x (y- 1) corresponding to column positions 1 to M / 2-1 of row 0 of the input

[0217]

[0218] matrix X is provided.

[0219] A second submatrix X2of size 3, or for an arbitrary N x M matrix of size 1 x (y- 1)

[0220]

[0221] corresponding to column positions M / 2+1 to M-1 of row 0, is provided.

[0222] A third submatrix X3of size 8, or for an arbitrary N x M matrix of size 1 x (fl - 1) corresponding to row positions 1 to N-1 of column 0, is provided.

[0223] A fourth submatrix X4of size 8x7, or for an arbitrary N x M matrix of size (N - 1) x (M - 1) corresponding to the remaining positions not otherwise provided for, is provided.

[0224] A fifth submatrix X5of size 1 corresponding to the position row 0 column 0, is provided.

[0225] A sixth submatrix Xeof size 1 corresponding to the position row 0 column M / 2, is provided.

[0226] Reverting to figure 5, as shown the first, second, third, and fourth submatrices Xi, X2, X3, X4are fed to respective interleaver and conjugate blocks 510a, 510b, 510c, 51 Od to obtain respective conjugate matrices X'1, X'2, X'3, and X'4Meanwhile, the fifth and sixth submatrices X5, X6, are fed to respective real and imaginary part extractor blocks 515a, 515b, which provide as outputs respective matrices for the real and imaginary parts of the fifth and sixth submatrices X5, Xe, denoted {Re[X5], lm[X5]}, {Re[X6], lm[X6]}.

[0227] In accordance with the embodiment of figure 6, the first four original submatrices, Xi, X2, X3, X4, conjugate matrices X'1, X'2, X'3, and X'4, and the real and imaginary parts of the fifth and sixth submatrices Re[X5], lm[X5], Re[X6], lm[X6] are provided to concatenation block 520. Concatenation block 520 performs substantially the same operation as concatenation block 420 as described above, but is configured to concatenate the various components as shown with a specific structure in line with the objections of the invention.

[0228] Figure 7 presents the structure of the output of the concatenation.

[0229] As shown, as a result of the concatenation operation, the output matrix comprises in sequence, • row 0, columns 0 to M -1: R[0,0], columns positions 1 to M / 2-1 of the first row of the input matrix, l[0,0], X.

[0230] • Row 1 to N -1, columns 0 to M -1: all the elements of the input matrix apart from elements of its first row.

[0231] • Row N, columns 0 to M-1: R[0, M / 2], elements M / 2+1 to M-1 of the first row of the input matrix, l[0, M / 2], X'2

[0232] • Row N+1 to row 2N-1, column 0: the elements of X'3,

[0233] • Remaining positions: X'4

[0234] Accordingly, two possible implementations of the precoder block 331, 332 of figure 3 have been presented as possible solutions (in combination with corresponding 2D linear phase rotation stages as discussed below) whereby the criterion of performing precoding and the 2D linear phase rotation such that the input to the filter bank consists of real-valued symbols is respected. The skilled person will recognize that further implementations may be available, but that it is not practicable to attempt to specify all such solutions in the present disclosure. The two solutions presented as such constitute non-limiting examples.

[0235] Reverting to the discussion of figure 3, the output of each precoder block 331, 332 is fed to a respective Orthogonal time frequency space (OTFS) block 341, 342, which performs orthogonal time frequency space encoding of the incoming data matrices generally as discussed in the introductory portion above.Figure 8 presents in detail components of the OTFS blocks in accordance with an embodiment.

[0236] OTFS block 840 operates directly on the output matrix of dimension 2N x M.

[0237] As shown, OTFS block 840 comprises a 2D linear transform block 841, multiplier 842, subcarrier allocation block 843 and FBMC modulation block 844. The functions of these elements are described in further detail below.

[0238] The OTFS initiates its processing with 2D linear transform block 841. For instance, an IFFT of size (M) can be first applied row-wise on the precoded matrix. An FFT of size (2N) can be then applied column wise. The order of the FFT and the IFFT may be interchanged.

[0239] As discussed above, the design of the precoder 331, 332 is intricately linked with the 2D Linear Phase Rotation 860 corresponding to elements 361 or respectively 362 as discussed above. The 2D LPR is parameterized by a and for a first track as shown in figure 3, defined as:

[0240] WαNWβM= Eq. 9

[0241]

[0242] n∈[0,2N-1], m∈[0, M-1]

[0243] As shown, the Linear Phase rotation is performed via multiplier 842, which applies the 2N x M parameters thus obtained to the output of the 2D linear Transform block 841.

[0244] The second track in figure 3 operates in the same way and employs the same values of a and, but the 2D LPR window is modified by the phase factor eiπ / 2= i as follows:

[0245] i × WαNWβMEq. 10

[0246] In the context of employing the first precoding scheme as described with reference to figure 4, the values of a, p, are set as follows:

[0247] N + l M — l

[0248] Eq. 11

[0249]

[0250] Optional windowing block 850 (corresponding to blocks 351 and 352 of figure 3) may be provided subsequent to 2D LPR rotation block 860. Windowing block 850 may multiply the outputs of the 2D LPR rotation block 860 by the impulse response of the prototype filter g. As known in the art, this windowing has the potential to enhance robustness against timefrequency impairments or mitigate interferences.The output of multiplier 842 is fed to Subcarrier Allocation block 843. In this block, the output from the previous block is allocated to the active subcarriers.

[0251] It will be appreciated that the number of active subcarriers 2N is one of the system parameters that an engineer can choose based on the application, “c” is then chosen accordingly. For example: in 4G / LTE communication systems configured for transmissions in 5 MHz channels, the total number of subcarriers is L = 512, and the number of active carriers is 2N = 300.

[0252] This can be done using different methods, of which three possibilities are presented below.

[0253] Figure 9a presents a first exemplary mechanism for Subcarrier Allocation.

[0254] As shown, this first technique involves applying zero padding a fixed number of rows at the top and bottom of the original matrix, depending on the index of the first active carrier. Specifically as shown, the number of subcarriers L is equal to 16, and the fourth to twelfth rows are active, and attributed respectively to rows 1 to 2N of the Matrix received from multiplier 842. The first three rows and last four rows are zero padded.

[0255] Thus, optionally, there may be provided a further step of performing subcarrier allocation by applying zero padding at the top and bottom of the precoded matrix, depending on the index of the first active subcarrier.

[0256] Figure 9b presents a second exemplary mechanism for Subcarrier Allocation.

[0257] As shown, zero padding may be applied either at the bottom or top of the matrix, followed by a circular shift of c values based on the index of the first subcarrier. Specifically, as shown, the number of subcarriers L is equal to 14, and the first to ninth rows are active, subject to the circular shift such that at a given instant, if c = 3, then the active carriers will be from 3 to 11. and attributed respectively to rows 0 to 2 / V-1 of the Matrix received from multiplier 842. The last five rows are zero padded, and the resulting matrix is then subjected to a row wise circular shift.

[0258] Figure 9c presents a third exemplary mechanism for Subcarrier Allocation.

[0259] Since a circular shift in the frequency domain equates to a time shift in the time domain, another option involves applying a time shift to the original matrix after conducting an IFFT operation.Consequently, the output in all aforementioned methods yields a matrix of dimensions L x M, where L > 2 N. Specifically, as shown, the number of subcarriers L is equal to 14, and the first to ninth rows are active subject to the circular shift such that at a given instant, if c = 3, then the active carriers will be from 3 to 11, and attributed respectively to rows 0 to 2N-1 of the matrix received from multiplier 842. The last five rows are zero padded, and the resulting matrix. ck

[0260] is then subjected to a time shift ej27l~.

[0261] As discussed above, the design of the precoder 331, 332 is intricately linked with the 2D Linear Phase Rotation 860 corresponding to elements 361 or respectively 362 as discussed above. The 2D LPR is parameterized by a and f for a first track and by a' and (3' for a second track, as shown in figure 3 and defined by equations 9 and 10, respectively, as discussed above.

[0262] In the context of employing the second precoding scheme as described with reference to figures 5 to 7, the values of a, 0, a', and (3' are set as follows:

[0263] N M

[0264] a = —; (3 = — Eq. 13

[0265] 4 4

[0266] a' = a; (3' = (3 Eq. 14

[0267] The output of Subcarrier Allocation block 843 is then fed to Filter Bank Encoding block 844.

[0268] Many Filter Bank Encoding methods may be envisaged. One suitable family of technologies is referred to as FBMC modulation as discussed above, and will be retained by way of example for the following explanations, however the skilled person will recognize that other such encoding schemes may be used, including schemes yet to be defined, or yet to be named.

[0269] FBMC modulation may be performed by any architecture as may readily occur to the skilled person, such as a Polyphase Network (PPN) or Frequency Spread (FS) implementation.

[0270] In particular, the PPN approach calls for, in sequence an Inverse Fast Fourier Transform (IFFT) unit, a filtering stage and a serializer. The result of the IFFT manipulates the sub-carriers following the equation:

[0271] ,2TTZ€

[0272] sk(ℓ) = Σ xk(l)ei(2πlℓ / L)Eq. 15

[0273]

[0274] 1=0where xk(l) is the data element at subcarrier index l and time slot k, and L is the total number of subcarriers.

[0275] The filtering stage, corresponds to a filtering operation carried out on the OF2DM symbols. Specifically, the filtering operation is described as follows:

[0276] Q-i L Xk(l) = 9(1 + + - (2q + fc)) Eq. 16

[0277]

[0278] q = 0 where #(k) is the impulse response of the prototype filter with overlapping factor Q and length QL. It is noteworthy that when employing a short prototype filter with an Overlapping Factor Q = 1 the filtering operation can be seen as a windowing operation. In other words, the outputs of the IFFT are simply multiplied by the impulse response of the prototype filter. Finally, the data is serialized.

[0279] The two orthogonal streams emitted by OFTS encoders 342 and 341 may then be combined at summer 380 to obtain the final encoded signal.

[0280] The orthogonal character of the two streams may be demonstrated as follows.

[0281] To guarantee real-domain orthogonality at the input of the block 844 in Figure 8, the signal resulting from the ISFFT must be real valued. This property is achieved by the proposed precoder block 400 in figure 4.

[0282] In other words, let D 6

[0283]

[0284] be complex valued symbols, if P ∈ ℂN×Mis the precoded matrix (output of block 400 in Figure 4) defined as:

[0285]

[0286] Then we have WLPR⊙ S-1(P) is real valued given that WLPR= (wN1 / 2×

[0287]

[0288] Proof:

[0289] In fact, WLPR⊙ S-1(P) can be rewritten as

[0290] WLPR⊙ S-1(P) = 풟wFNPF̄M풟w

[0291] W1

[0292] _ — I r7wODrIr7MO>

[0293] D rOw 1 (17)

[0294] Fo r» o 1 T’ ooT’ o

[0295] N ON F / v / +F / V? K’

[0296] —XM

[0297]

[0298] 2 TOwhere F^ = can be seen as an odd-frequency DFT matrix.

[0299]

[0300] Noting that, for a couple of matrices (X, YT) of size N x M, we have

[0301] X T Y = XY

[0302] it follows

[0303] -QV-i-l)+;

[0304] F^ T X = w N X = F; X

[0305]

[0306] Similarly, we have

[0307] f vu > VI?

[0308]

[0309] 1~

[0310] Applying these properties to equation (17), it becomes

[0311] WLPR⊙ S-1(P) = F°N[D / 0N / 2×M] F̄°M+ F̄°N[0N / 2×M / ↑D] F°K,

[0312] TXMJ °txM. (18) / D \ = 2 ^ F^Ojv■

[0313]

[0314] \ yXMj / Therefore, according to equation (18), and considering the proposed precoding scheme dedicated for the OF2DM waveform, the output of the ISFFT is real-valued. Hence, real-domain orthogonality is guaranteed at the input of block 884 in Figure 8.

[0315] It may be borne in mind that this proof of orthogonality is presented merely to demonstrate that the operations described above inherently develop a waveform in a way that guarantees orthogonality. The provided proof of orthogonality is a mere mathematical justification to confirm that the proposed steps for using the transmitter according to embodiment do indeed ensure orthogonality, that is all. It is a verification step that is specific to OF2DM that shows that the signal at the output is of "real" nature. It is conditioned by the architecture of the transmitter as described. In this context, following the proof we can clearly see that the output is a 2-realvalued orthogonal signal. It constitutes then an a-posteriori verification step to the orthogonality claim rather than a prior design method.

[0316] Referring back to the prior art approach presented in “FBMC / OQAM with OTFS Pre-Processing for High Mobility Channels” by Bang Khuc et al, as cited above, it may be seen that this is in fact a direct combination of two existing technologies which are the OTFS and the FBMC / OQAM waveforms. Concerning the architecture in this document, the baseband QAM symbols are first processed by the ISFFT exactly as in OTFS, and the resulting complex -valued symbols are then separated into their real and imaginary components to create an OQAM-based FBMC scheme.

[0317] However, this straightforward concatenation of OTFS and FBMC disrupts the inherent benefits of the 2D linear transform ISFFT, which involves robustness against Doppler and multipath effects and the power efficiency of the system particularly its PAPR characteristics. In particular, by splitting the real and imaginary parts after the ISFFT operation, the BER performance and the PAPR of the system are degraded as confirmed by the comparative results below.

[0318] In contrast, the present introduces a novel and inventive architecture that preserves the ISFFT structure benefits while achieving real-domain orthogonality without separating the real and imaginary parts.

[0319] Inventive elements include the 2D precoder applied prior to the ISFFT block (block number 331 in Figure 3). This precoder enforces Hermitian symmetry on the delay / Doppler symbol matrix such that upon applying a 2D linear transform (ISFFT), the output becomes entirely real valued while retaining the correlation / spreading properties of the complete 2D transformation structure (i.e: without disrupting the inherent benefits). As a result, the ISFFT properties, such as favorable PAPR characteristics and robustness to doubly dispersive channel, are preserved.

[0320] Experimental results demonstrate that such prior art system architectures introducing OQAM processing after the 2D linear transform of the OTFS-FBMC waveform, introduce power fluctuations which lead to increased PAPR compared to OTFS. On the other hand, the waveform in accordance with embodiments as presented herein maintains the inherent benefits of the 2D linear transform through its precoding scheme, thereby preserving the inherent low-PAPR property of OTFS.

[0321] As mentioned earlier, the novelty of the waveform in accordance with embodiments resides in particular in the architecture of the transmitter itself, and more specifically in its ability to generate an orthogonal signal while preserving the correlation / spreading properties of the applied 2D-transform. Experimental results show that embodiments consistently outperform the OTFS-FBMC waveform of the cited prior art. This significant improvement comes from the structured redundancy introduced by the 2D precoder, which uniformly maps information across the delay / Doppler plane while preserving correlation / spreading properties (signal continuity) along the total signal length of the 2D transform. This structured mapping enhances signal diversity and hence resilience to frequency selectivity and Doppler spread. On the other hand, the OTFS-FBMC waveform in the cited prior art does not include any 2D precoding stage, and disrupts the inherent correlation of the 2D transform by taking the real part toconstruct the OQAM scheme. This weakens the joint delay-Doppler structure, leading to a loss in diversity gain and BER performance compared to the OF2DM waveform.

[0322] A Frequency Spread (FS) implementation may comprise in sequence an FIR filter, an IFFT block and a serializer. The basic idea behind this design is to move the filtering process into the frequency domain. This approach is expected to entail higher hardware complexity compared to the initial implementation, especially for longer filters (K > 1). Specifically, it necessitates an IFFT of size QL. However, when dealing with a short filter (Q=1), the size of the IFFT remains identical to that of the Polyphase Network (PPN) implementation.

[0323] The embodiments above have been presented in terms of a system comprising a number of functional blocks. It will be appreciated that real implementations may implement the described functions in any number of components, including a single, suitably configured component. It will similarly be appreciated that the distribution of functions between real components need not correspond to the functional blocks described above - certain functions may be combined, while others may be split, etc. Some or all parts of the two processing paths described with respect to figure 3 may in some embodiments by handled by a single hardware pipeline operating in a time division multiplexed mode.

[0324] Embodiments may also be defined in terms of a method.

[0325] In particular, figure 10 shows a method of encoding a binary data stream for wireless transmission in accordance with an embodiment.

[0326] As shown in figure 10, the method starts at step 1000 before proceeding to step 1010 at which a complex symbol data stream is divided into two parallel complex symbol substreams,

[0327] The method then proceeds to step 1020 at which a delay equal to half the duration of a symbol of the complex symbol data stream is introduced to one complex symbol substream,

[0328] The method then proceeds to step 1030 of performing precoding on each complex symbol substream.

[0329] The method then proceeds to step 1040 of performing an OTFS encoding of each complex symbol substream, which comprises in sequence the substep 1041 of performing a 2D linear transform, 1042 of performing a 2D linear phase rotation, and 1043 of performing a filter bankencoding, wherein the precoding and the 2D linear phase rotation are defined such that the input to the filter bank consists of real-valued symbols.

[0330] The method then proceeds to step 1050 of combining the two parallel complex substreams to obtain a data stream for transmission before terminating at step 1060. It will be appreciated that the method may typically loop back to step 1010 for the next batch of symbols for processing rather than terminating at step 1060.

[0331] Accordingly, the method of figure 10 presents the core operations described with respect to figures 3 to 9 above in terms of method steps. The method may incorporate additional steps as suggested by any of the variants and optional features discussed above.

[0332] For example, based on the foregoing embodiments and in particular the first exemplary precoding implementation described with reference to figure 4, precoding step 1030 may comprise in sequence the further substeps 1031 (not shown) of splitting each substream into a plurality of successive batches, each batch defining an input matrix X of size N x M, and interleaving the input matrix to obtain an interleaved matrix defined as Xp[n,m] = X[N - n -1, M - m - 1], where 0 < m < M - l, 0 < n < N - l, N and M represent the number of rows and columns, respectively, of the input matrix X; 1032 (not shown) of performing a conjugate operation on the interleaved matrix to obtain a conjugate interleaved matrix and 1033 (not shown) of concatenating the input matrix with the conjugate interleaved matrix to obtain a precoded matrix of size 2N x M.

[0333] Furthermore, based on the foregoing embodiments and in particular the first exemplary precoding implementation described with reference to figure 4, the step of performing OTFS encoding may comprise performing a two dimensional windowing that includes a two dimensional linear phase rotation wherein the two dimensional linear phase rotation is defined by equation 9 in view of equation 11 for the complex symbol substream incorporating no delay, and by equation 10 in view of equation 12 for the said complex symbol substream incorporating the delay.

[0334] Alternatively, based on the foregoing embodiments and in particular the second exemplary precoding implementation described with reference to figure 5, The method step of precoding may further comprise, for each complex symbol substream, splitting each substream into a plurality of successive batches, each batch defining an input matrix X of size N x M, partitioning the input matrix into a plurality of input submatrices, interleaving each input submatrix to obtainan interleaved submatrix defined as Xp[n,m] = X[N — n — 1, M — m — 1], where 0 < m < M -1, 0 < n < N - l, N and M represent the number of rows and columns, respectively, of the input matrix X, performing a conjugate operation on the interleaved submatrices to obtain a conjugate interleaved matrix and concatenating the input matrix with the conjugate interleaved matrix to obtain a precoded matrix of size 2N x M.

[0335] Furthermore, based on the foregoing embodiments and in particular the second exemplary precoding implementation described with reference to figure 4, the method may comprise a further step of partitioning the input matrix into a plurality of input submatrices, as follows:

[0336] • a first submatrix Xi, of size l x (j- l) corresponding to row 0, column positions 1 to

[0337]

[0338] M / 2-1,

[0339] • a second submatrix X2of size l x (j- l) corresponding to row 0, the column

[0340]

[0341] positions M / 2+1 to M -1,

[0342] • a third submatrix X3of size 1 x (N - 1) corresponding to column 0, row positions 1 to N-1

[0343] • a fifth submatrix X5of size 1 corresponding to the position row 0 column 0

[0344] • a sixth submatrix X6of size 1 corresponding to the position row 0 column M / 2 and • a fourth submatrix X4of size (N - 1) x (M - 1) corresponding to the remaining positions,

[0345] On this basis, the step of partitioning may comprise the further step of separating the 5thsubmatrix to obtain the real part R[0,0] and imaginary part l[0,0], and separating the 6thsubmatrix to obtain the real part R[0, M / 2] and imaginary part l[0, M / 2], such that at the output of the interleaving provides respective interleaved elements X'1, X'2, X’z. X' R[0,0], l[0,0], R[0, M / 2] and l[0, M / 2].

[0346] Accordingly, as discussed above, the result of concatenating the precoded matrix of size 2 / V x M may comprise in sequence,

[0347] • row 0, columns 0 to M-1: R[0,0], columns positions 1 to M / 2-1 of the first row of the input matrix, l[0,0], X'1.

[0348] • Row 1 to V-1, columns 0 to M-1: all the elements of the input matrix apart from elements of its first row.

[0349] • Row N, columns 0 to M-1: R[0, M / 2], elements M / 2+1 to M-1 of the first row of the input matrix, l[0, M / 2], X2’.* Row N+1 to row 2N-1, column 0: the elements of X'3

[0350] • Remaining positions:

[0351]

[0352] Furthermore, based on the foregoing embodiments and in particular the second exemplary precoding implementation described with reference to figure 4, the step of performing OTFS encoding may comprise performing a two dimensional linear phase rotation of the concatenated interleaved matrix and reading out the values of the concatenated interleaved matrix as an interleaved data stream, and performing a windowing operation by the application of Finite Impulse Response digital filter with an Overlapping Factor of 1 to obtain an encoded data stream, wherein the two dimensional linear phase rotation is defined by equation 9 in view of equation 13 for the complex symbol substream incorporating no delay, and by equation 10 in view of equation 14 for the complex symbol substream incorporating the delay.

[0353] Optionally, as discussed above, the step of introducing a delay may be performed together with the step of combining the two parallel complex substreams to obtain a data stream.

[0354] Optionally, as discussed above, the method may comprise a further operation of windowing subsequent to the step performing the linear phase rotation.

[0355] Optionally, as discussed above, the method may comprise a further step of performing subcarrier allocation by zero padding at the bottom or top of the precoded matrix and performing a circular shift of c values based on the index of the first active subcarrier.

[0356] Optionally, as discussed above, the method may comprise a further step of performing subcarrier allocation by applying an Inverse Fast Fourier Transform to the original matrix and cfc

[0357] multiplying the ℓthsample of the resulting signal by ej2π(ck / ℓ).

[0358] It should be noted that this does not necessarily imply the presence of an additional separate IFFT, since the IFFT operation may be subsumed by the IFFT called for elsewhere in certain implementations of the filter bank encoder.

[0359] Optionally, as discussed above, the operation of performing OTFS encoding may comprise performing FBMC encoding.

[0360] Accordingly, a system and method of encoding a binary data stream for wireless transmission combining characteristics of OFDM and FBMC type systems is proposed, based on a precoding schemes adapted to maintaining real orthogonality so that the output of the OTFS processing consists of real-valued symbols. The precoder is intricately linked to the definitionof a subsequent 2D linear phase rotation. Two possible precoder architectures are proposed, in which interleaver and conjugate operations process partwise or en bloc the incoming data matrix, before the original matrix is concatenated with the interleaved and conjugated matrix (or its components) to obtain a new matrix for subcarrier allocation and filter bank encoding prior to transmission.

[0361] The proposed embodiments substantially simplify receiver complexity with respect for example to figure 2, while concurrently enhancing system performance over doubly dispersive channels. Simulations conducted over the TDL-B model of the 5G QuaDRiGa channel illustrate that the proposed technique outperforms OTFS-OFDM under different channel impairments including timing offsets, and Doppler spreads.

[0362] In accordance with the foregoing, embodiments may be defined in accordance with the following sections referenced with a roman numeral.

[0363] I. There is accordingly presented, for example, a method of encoding a binary data stream for wireless transmission, said method comprising the steps of:

[0364] dividing a complex symbol data stream into two parallel complex symbol substreams,

[0365] introducing a delay equal to half the duration of a symbol of said complex symbol data stream to one said complex symbol substream,

[0366] performing precoding on each complex symbol substream

[0367] performing an OTFS encoding of each said complex symbol substream

[0368] said operation of performing an OTFS encoding comprising the steps of

[0369] performing a 2D linear transform,

[0370] performing a 2D linear phase rotation, and

[0371] performing a filter bank encoding,

[0372] wherein said precoding and said 2D linear phase rotation are defined such that the input to said filter bank consists of real-valued symbols, andcombining said two parallel complex substreams to obtain a data stream for transmission.

[0373] II. Thus, in certain variants of the method of section I for example said step of precoding may comprise

[0374] for each said complex symbol substream, splitting said substream into a plurality of successive batches, each said batch defining an input matrix X of size N x M, and

[0375] interleaving said input matrix to obtain an interleaved matrix defined as Xp[n,m] = X[N - n -1, M - m - 1], where 0 < m < M - l, 0 < n < N - l, N and M represent the number of rows and columns, respectively, of the input matrix X

[0376] performing a conjugate operation on said interleaved matrix to obtain a conjugate interleaved matrix and,

[0377] concatenating said input matrix with said conjugate interleaved matrix to obtain a precoded matrix of size 2N x M.

[0378] III. Thus, in certain variants of the method of section II for example said step of performing OTFS encoding may comprise performing a two dimensional windowing that includes a two dimensional linear phase wherein said two dimensional linear phase rotation comprises W_N^α W_M^β =

[0379]

[0380] ne[0,2N-l],me[0, M-l]

[0381] Wherein

[0382] N + 1 M — 1

[0383]

[0384] for the said complex symbol substream incorporating no delay, and

[0385]

[0386] iWαNWβMfor the said complex symbol substream incorporating said delay.

[0387] IV. Thus, in certain variants of the method of section I the step of precoding may comprise for each said complex symbol substream, splitting said substream into a plurality of successive batches, each said batch defining an input matrix X of size N x M, and

[0388] partitioning said input matrix into a plurality of input submatrices,interleaving each said input submatrix to obtain a respective interleaved submatrix defined as Xp[n, m] = X[N — n — 1, M — m — 1], where 0 < m < M — 1, 0 < n < N — 1, N and M represent the number of rows and columns, respectively, of the input matrix X

[0389] preforming a conjugate operation on each said interleaved submatrices to obtain a respective conjugate interleaved matrix and,

[0390] concatenating said input matrix with said conjugate interleaved submatrices to obtain a precoded matrix of size 2N x M.

[0391] V. Thus, in certain variants of the method of section IV for example the step of partitioning said input matrix into a plurality of input submatrices may define

[0392] a first submatrix X1of size 1 × (M / 2 - 1) corresponding to row 0, column positions 1 to M / 2-

[0393]

[0394] 1,

[0395] a second submatrix X2of size 1 × (M / 2 - 1) corresponding to row 0, the column positions M

[0396]

[0397] / 2+1 to M -1,

[0398] a third submatrix X3of size 1 x (N - 1) corresponding to column 0, the row positions 1 to N-1 a fifth submatrix X5of size 1 corresponding to the position row 0 column 0

[0399] a sixth submatrix X& of size 1 corresponding to the position row 0 column M / 2 and

[0400] a fourth submatrix X4of size (N - 1) x (M - 1) corresponding to the remaining positions,

[0401] and wherein said step of partitioning comprising the further step of separating said 5thsubmatrix to obtain the real part R[0,0] and imaginary part l[0,0], and separating said 6thsubmatrix to obtain the real part R[0, M / 2] and imaginary part l[0, M / 2], such that at the output of said interleaving provides respective interleaved elements AT, A"2, X' X't R[0,0], l[0,0], R[0, M / 2] and l[0, M / 2]. and where as a result of said step of concatenation said precoded matrix of size 2 / V x M comprises in sequence,

[0402] • row 0, columns 0 to M - 1: R[0,0], columns positions 1 to M / 2 - 1 of the first row of the input matrix, l[0,0], X.

[0403] • Row 1 to N - 1, columns 0 to M - 1: all the elements of the input matrix apart from elements of its first row.

[0404] • Row N, columns 0 to M - 1: R[0, M / 2], elements M / 2 + 1 to M - 1 of the first row of the input matrix, l[0, M / 2], X / .

[0405] • Row N + 1 to row 2N - 1, column 0: the elements of AT’,

[0406] • Remaining positions: X'4VI. Thus, in certain variants of the method of section IV or V for example the step of performing OTFS encoding may comprise performing a two dimensional linear phase rotation of said concatenated interleaved matrix and reading out the values of said concatenated interleaved matrix as an interleaved data stream, and performing a windowing operation by the application of Finite Impulse Response digital filter with an Overlapping Factor of 1 to obtain an encoded data stream, wherein said two dimensional linear phase rotation comprises

[0407] W_N^α W_M^β =

[0408]

[0409] n∈[0,2N-1],m∈[0,M-1] Wherein

[0410] N M

[0411] a = —; [3 = —

[0412]

[0413] 4 4

[0414] for the said complex symbol substream incorporating no delay, and

[0415]

[0416] iW_N^α W_M^β for the said complex symbol substream incorporating said delay.

[0417] VII. Thus, in certain variants of the method of any of sections I to VI for example the step of introducing a delay may be performed together with said step of combining said two parallel complex substreams to obtain a said data stream.

[0418] VIII. Thus, certain variants of the method of any of sections I to VII for example may comprise a further operation of windowing subsequent to said step performing said linear phase rotation. IX. Thus, certain variants of the method of any of sections I to VIII for example may comprise a further step of performing subcarrier allocation by applying zero padding at the top and bottom of the precoded matrix, depending on the index of the first active subcarrier.

[0419] X. Thus, certain variants of the method of any of I to IX for example may comprise a further step of performing subcarrier allocation by zero padding at the bottom or top of the precoded matrix and performing a circular shift of c values based on the index of the first active subcarrier.

[0420] XI. Thus, certain variants of the method of any of sections I to IX for example may comprise a further step of performing subcarrier allocation by applying an Inverse Fast Fourier Transform ck

[0421] to the original matrix and multiplying the Sthsample of the resulting signal by e

[0422]

[0423] XII. Thus, in certain variants of the method of any of sections I to XI for example said operation of performing OTFS encoding may comprise performing FBMC encoding.

[0424] XIII. There is accordingly presented, for example, a computer program comprising instructions which, when the program is executed by a computer, cause the computer to carry out the method of any of sections I to XII.XIV. There is accordingly presented, for example, computer-readable medium comprising instructions which, when executed by a computer, cause the computer to carry out the method of any of sections I to XII.

[0425] XV. There is accordingly presented, for example, a data encoder for the preparation of a binary data stream for wireless transmission, said encoder comprising:

[0426] a splitter configured to dividing a complex symbol data stream into two parallel complex symbol substreams,

[0427] a delay block configured to introduce a delay equal to half the duration of a symbol of said complex symbol data stream to one said complex symbol substream,

[0428] a precoder for each complex symbol substream configured to perform a precoding operation, an OTFS encoder configured to perform an OTFS encoding of each said complex symbol substream, wherein said operation of performing an OTFS encoding comprises performing a 2D linear transform,

[0429] performing a 2D linear phase rotation, and

[0430] performing a filter bank encoding,

[0431] wherein said precoding and said 2D linear phase rotation are defined such that the input to said filter bank consists of real-valued symbols,

[0432] and further comprising a concatenator configured to combine said two parallel complex substreams to obtain a data stream for transmission.

[0433] The described encoding methods and transmitter architectures can be understood to imply corresponding decoding methods and receiver architectures. Examples of these will now be presented.

[0434] As discussed above, despite the promising outcomes observed when combining the delay-Doppler modulated (e.g. OTFS) and FBMC waveforms into a unified framework, known receiver implementations require a high computational complexity to address inter-symbol interference (ISI) and inter-carrier interference (ICI). The combination of FBMC and delay-Doppler modulated type approaches in a unified structure employing straightforward equalization methods and offset quadrature amplitude modulation (OQAM). This equalizer may be termed an overlap-save-orthogonal filtered delay Doppler modulation (OS-OFDDM) receiver.

[0435] Figure 11 presents an example of an overlap-save-orthogonal filtered delay Doppler modulation (OS-OFDDM) receiver in accordance with an embodiment.As shown, the receiver 1100 comprises in sequence from the input, a symbol extractor 1110, a Fast Fourier transform module 1120, a subcarrier selection module 1130, a circular convolution module 1150, a summer 1160, a linear phase rotation module 1170, a 2D linear transform 1180 and a decoder 1190.

[0436] There are additionally provided an equalizer 1140 and a 2D Window function 1175.

[0437] The operations of each of these functions will be described individually in the following discussion.

[0438] Symbol extractor

[0439] The receiver begins its processing by extracting a matrix of OF2DM symbols sized LNUFx M at symbol extractor 1110, where M denotes the total number of Doppler bins, and L represents the total number of subcarriers. Here, NUFserves as the upsampling factor for the receiver processing. Within this matrix, each column represents a sequence of OF2DM symbols, with the symbol intended for demodulation positioned at the center of its respective sequence.

[0440] Fast Fourier Transform

[0441] The next block 1120 involves applying a fast Fourier transform (FFT) of size LNUFon each extracted sequence from the previous step.

[0442] Subcarrier selection

[0443] In this block 1130 the data on the active carriers, that is to say, the carriers that have been loaded with data on the transmitter side, are extracted. This significantly reduces computational complexity by excluding unnecessary processing of inactive carriers, i.e. the carriers which weren’t loaded with data at the transmitter side. In contrast, processing the entire set of subcarriers without extraction necessitates higher complexity, as it involves analyzing redundant information that will ultimately be discarded.

[0444] The set of active carriers may be predefined, so as to be known to both the transmitter and the receiver. Therefore, the receiver does not need to guess or check which carriers are active; this information may be available beforehand.

[0445] This can be achieved using different approaches, of which three examples will be presented below.

[0446] Figure 12a presents a first mechanism for selecting active subcarriers.l2TlCk

[0447] A shown, this mechanism involves applying a time shift c (multiplying by e ~ ) to each column in the original matrix 1201a followed by applying an FFT operation of size Z VuFand selecting the active subcarriers from the first index to a total of NUF(2N + 221) carriers to obtain output matrix 1202a. As defined previously, N is the total number of Delay / frequency bins at the precoding input domain and A denotes the number of non-truncated filter coefficients.

[0448] As such, this represents the inverse operation of that described with respect to figure 9c.

[0449] Figure 12b presents a second mechanism for selecting active subcarriers.

[0450] Since a phase shift in the time domain equates to a circular shift in the frequency domain, a circular shift of c values based on the index of the first subcarrier can be directly applied rowwise to the input matrix 1201b, followed by selecting the active subcarriers, as depicted in figure 12b to obtain output matrix 1202b.

[0451] As such, this represents the inverse operation of that described with respect to figure 9b.

[0452] Figure 12c presents a second mechanism for selecting active subcarriers.

[0453] Another straightforward approach involves selecting the active subcarriers from the input matrix 1201c directly based on the first subcarrier to select indexed by x and the total number of subcarriers NUF(2N + 2A), as shown in Figure 12c, such that the index of the first subcarrier to select is

[0454] x = mod(Nup(ia— 1 — A) + 1)

[0455] where iais the index of the first subcarrier index to obtain output matrix 1202c.

[0456] As such, this represents the inverse operation of that described with respect to figure 9a.

[0457] It will be appreciated that regardless of the channel assignment mechanism used in the transmitter, for example as discussed with reference to figures 9a, 9b and 9c, any suitable mechanism for selection, such as those described with reference to figures 12a, 12b or 12c may be used indifferently.

[0458] EqualizationBlock number 1140 involves an optional equalization step. The received signal is corrupted by channel effects which can be removed by equalization. This involves multiplying each received symbol by equalizer coefficients Cm(n) as follows

[0459]

[0460] Cm(n)~ x Rm(n)~

[0461] The specific values of Cm(n) depend on the equalizer method employed. For a zero forcing (ZF) equalizer, the coefficients are determined as

[0462] C

[0463]

[0464] m(n) Hu(ji)

[0465] On the other hand, for a minimum mean square error (MMSE) equalizer, the coefficients are calculated as follows

[0466] (. Hm(ny

[0467]

[0468] \\Hm(ji)\\2+ < J2

[0469] where o2is the noise variance.

[0470] It will be appreciated that equalization is not required in all implementations, since, for example it is possible to pre-compensate the channel effect at the transmitter side if it is known.

[0471] Circular convolution

[0472] The fifth operation at block 1150 involves a circular convolution operation, where NUFstages of circular convolution by the frequency shifted responses of the prototype filter (PF) is performed on Xm(n). Thus, the output of each filtering stage vector is

[0473] A

[0474] Ym(n,ℓ) = Gℓ(p)Xm(ℓ + (n- p)NUF)

[0475]

[0476] P=—A

[0477] where Δ denotes the number of non-truncated filter coefficients as defined above, and G is the frequency shifted response of the PF deduced from its impulse response g as

[0478] . M-l „DnM.

[0479] i nV 27TC(K 2 ),2npk

[0480] GXP) —E NUF / N e~lM

[0481]

[0482] k=0

[0483] Summer

[0484] The Analysis Filter Bank (AFB) output Ym(n), n e [0, V-1 ], is obtained by summing each filtering stage vector outputs as follows

[0485] NUF-1

[0486] Ym(n) =

[0487]

[0488] €=02D Linear phase rotation

[0489] A 2D linear phase rotation (2D-LPR) is directly applied at block number 1170 to the AFB output matrix Y of dimension^ x M. Consistently with the transmitter embodiments as described above, the window coefficients of the 2D Linear Phase Rotation in the receiver are intricately linked with the decoder design used, and as such will be discussed in more detail below in association with the corresponding decoder designs.

[0490] 2D windowing

[0491] An optional windowing operation may be included as shown at block 1175

[0492] This function takes as input a 2N x M matrix where an element-wise multiplication is applied with another 2N x M matrix that corresponds to the window coefficients. This element-wise matrix multiplication is often referred to as “Hadamard product”. The window coefficients are defined by an expert engineer and aims to reduce interference or improve the performance of the system when facing specific channel conditions. The output is also a 2N x M matrix.

[0493] Since blocks 1170 and 1175 perform the same type of operations, they can be “merged” into a single block performing an overall 2D windowing operation that includes both the engineer defined window coefficients of block 1175 and the 2D LPR coefficients as defined in Block 1170.

[0494] 2D linear transform

[0495] A 2D linear transformation is now applied at block 1180 on the output matrix from the previous operation. Any 2D linear transform serving to transform the input samples represented in Time-Frequency domain to output samples represented in Delay-Doppler domain may be performed.

[0496] One exemplary implementation may involve starting with a row-wise IFFT of size M, followed by a column-wise FFT of size 2N. The order of FFT and IFFT may be exchanged.

[0497] Decoder

[0498] The final stage in the OS-OF2DM receiver at block 1190 involves decoding. It is crucial to note that the design of the decoder is intricately linked with a 2D linear phase rotation (LPR) (block number 1170), which operates based on the two input parameters (a, fT). The interdependence between these two blocks will be detailed below along with the two decoder implementations.First decoder implementation

[0499] Figure 13 shows an exemplary decoder implementation in accordance with a first embodiment.

[0500] As shown in figure 13, an exemplary decoder 1390 comprises sequential operations of partitioning 1391, de-interleaving 1392 and conjugation 1393 followed by summer 1394 with the objective of extracting the received data. These operations are described in further detail below.

[0501] Partitioning

[0502] The partitioning block 1391 divides a 2N x M matrix output by 2D linear transform 1180 for example into two parts.

[0503] By way of example, if the input batch defines the following matrix, with N = 6 and M = 4, - 1 2 3 4 - 5 6 7 8

[0504] 9 10 11 12

[0505] 13 14 15 16

[0506] 17 18 19 20

[0507] 21 22 23 24

[0508] 24* 23* 22* 21*

[0509] 20* 19* 18* 17*

[0510] 16* 15* 14* 13*

[0511] 12* 11* 10* 9*

[0512] 8* 7* 6* 5*

[0513]

[0514] The output of the partitioning operation will be a first matrix X2

[0515] - 1 2 3 4- 5 6 7 8

[0516] 9 10 11 12

[0517] 13 14 15 16

[0518] 17 18 19 20

[0519]

[0520] -21 22 23 24-

[0521] And a second matrix X

[0522] ■24 23 22 21

[0523] 20 19 18 17

[0524] 16 15 14 13

[0525] 12 11 10 9*

[0526] 8* 7* 6* 5*

[0527]

[0528] . 4* 3* 2* 1*It may be noted that this is precisely the converse to the concatenation operation described with reference to figure 4 above.

[0529] De-interleaver

[0530] The elements x^(n, m) of the output matrix

[0531]

[0532] of block 1391 are rearranged at block 1392 using the following de-interleaving process:

[0533]

[0534] x̂₁(n,m) = x₁(nN − n − 1, M − m − 1)

[0535] Where 0 < m < M - 1, and 0 < n < N - 1

[0536] Continuing the previous example, starting from the matrix X

[0537] 24* 23* 22* 21*

[0538] 20* 19* 18* 17*

[0539] 16* 15* 14* 13*

[0540] 12* 11* 10* 9*

[0541] 8* 7* 6* 5*

[0542]

[0543] 4* 3* 2* 1*

[0544] The output of the interleaving operation will be:

[0545] .r4* -i

[0546] 5* 6* 7* 8*

[0547] 9* 10* 11* 12*

[0548] 13* 14* 15* 16*

[0549] 17* 18* 19* 20*

[0550]

[0551] 21* 22* 23* 24*

[0552] Conjugate

[0553] Block 1393 involves a conjugate operation which is applied to the output of the interleaver resulting in a matrix denoted as Xp.

[0554] Adder

[0555] Block 1394 entails combining the partitioned data, referred to as X2, with the de-interleaved and conjugated data matrix Xpto produce the decoded data matrix.

[0556] Processing the complete dataset before partitioning the input matrix is feasible.

[0557] However, this approach leads to increased computational complexity because it requires analyzing redundant information that will eventually be discarded.

[0558] Linear Phase Rotation for first decoder implementationAs mentioned above, the parameters of the Linear Phase Rotation are defined as a function of the details of the Decoder operation. In the case of the present example, the 2D LPR is parameterized by a and p, defined as:

[0559] / ZiTiakx Zinfik' wff w? = exp I — - — ) exp

[0560] M

[0561]

[0562] Jfce[o,2N-i],fc'e[o, M-i] wherein

[0563] N + 1 M — 1

[0564]

[0565] a =±^; / ? = +^-

[0566] Second decoder implementation

[0567]

[0568] Figure 14 shows an exemplary decoder implementation in accordance with a second embodiment.

[0569] As shown in figure 14, an exemplary decoder 1400 comprises a Partitioning module 1401 which operates to divide the input matrix of size 2NxM into sub-matrices of varying sizes.

[0570] Specifically, as shown the partitioning module breaks up each input matrix as follows:

[0571] a first submatrix X4of size 1 x ^-1)

[0572] a second submatrix X4' of size 1 x ^- 1)

[0573] a third submatrix X2of size 1 x y - 1

[0574] a fourth submatrix X2' of size 1 x y - 1

[0575] a fifth submatrix X3of size (TV — 1) x 1

[0576] a sixth submatrix X3' of size (N − 1) × 1

[0577] a seventh submatrix X5of size 1x2

[0578] a eighth submatrix X6of size 1x2

[0579] a ninth submatrix X4of size (N − 1) × (M − 1)

[0580] a tenth submatrix X4corresponding to the remaining positions,

[0581] Figure 15 provides an explanatory example of the partitioning operation of the second decoder implementation.As shown in figure 15, the first submatrix X4of size 1 x - 1 corresponds to row position 0, column positions 1 to M / 2 - 1.

[0582] The second submatrix X₁' of size 1 × (M / 2 − 1) corresponds to row position 0, column positions

[0583]

[0584] M / 2 + I to M - 1.

[0585] The third submatrix X2of size l x (j- 1) corresponds to row position N, column positions

[0586]

[0587] 1 to M / 2 - 1,

[0588] The fourth submatrix X2of size 1 x (y - 1) corresponds to row position N, column positions

[0589]

[0590] M / 2 + 1 toM - 1,

[0591] The fifth submatrix X3of size (TV — 1) x 1 corresponds to column position 0, row position 1 to N- l

[0592] the sixth submatrix X₃' of size (N − 1) × 1 corresponds to column position 0, row position N + 1 to 2N − 1

[0593] This process results accordingly in ten sub-matrices denoted as x, x2,x3,x4,x5,x6, Xi, X2', X3', X4', Xs', X6'of distinct sizes, as depicted. Each of the resulting sub-matrices from this block undergoes unique processing.

[0594] In particular, the elements of said 7thand 8thsubmatrices are added to obtain Xs' and X6'respectively, as the real and imaginary parts of a single respective symbol by real / imaginary combiner 1415a and 1415b respectively.

[0595] The function of the real / imaginary combiner may be understood as follows. If for example, we have a real part

[0596] of ‘3’ and an imaginary part of ‘5’, the combiner will combine these two values to form the complex number 3+5r

[0597] A de-interleaving operation on said submatrices Xi, X2', X3', and X4' to obtain de-interleaved matrices and performing a conjugate operation on said de-interleaved sub-matrices to obtain conjugate de- interleaved sub-matrices denoted as Xi', X2", X3", and X4”, these two operations being performed by De-interleave and conjugate modules 1410a, 1410b, 1410c and 1410d respectively. Each De-interleave and conjugate module corresponds to the Deinterleave and conjugate modules 1392 and 1393 as discussed above.The conjugate de- interleaved sub-matrices as Xr", X2”, X3”, and X4”, are added to other said second subjects (X1; 2,3,4), by respective adders 1420a, 1420b, 1420c and 1420d respectively resulting in submatrices denoted as Y4, Y2, Y3,,and Y4.

[0598] Finally, concatenation module 1430 concatenates the previous outputs X5', X6', Y1, Y2, Y3,. and Y4to obtain said post decoded matrix of size N x M comprises in sequence:

[0599] • Row 0: X5', Y1, X6', Y2.

[0600] • Rows 1 to N-1, column 0: Y3

[0601] • Remaining positions: Y4

[0602] This last block 1430 entails concatenating the submatrices obtained from the previous step, resulting in the decoded matrix of size N x M.

[0603] Figure 16 provides an explanatory example of the concatenation operation of the second decoder implementation.

[0604] As shown, the new concatenated matrix of dimensions N x M comprises a first row formed from, in sequence from the first to last column, the submatrix X5' (1 element), Y4(1x((M / 2)-1) elements), X6' (1 element), Y2(1x((M / 2)-1) elements), a first row comprising submatrice the submatrix X5' (1 element) and T3(N -1x1) elements), and the remaining positions corresponding to submatrix Y4((N -1)x M-1) elements).

[0605] The Matrix output by the concatenator thus constitutes the final decoded data output for the current extract from the received data.

[0606] Linear Phase Rotation for second decoder implementation

[0607] As mentioned above, the parameters of the Linear Phase Rotation are defined as a function of the details of the Decoder operation. In the case of the present example, the 2D LPR is parameterized by a and p, defined as:

[0608] / ZiTiakx Zinfik' w < = exp I — - — ) exp

[0609] M

[0610]

[0611] Jfce[o,2N-i],fc'e[o, M-i] Wherein

[0612]

[0613] The preceding embodiments have been presented in terms of a receiver architecture. It will be appreciated that other embodiments may be presented in terms of a method of processing.

[0614] Figure 17 presents a method of processing delay-Doppler modulated binary data stream for decoding in accordance with an embodiment.

[0615] Specifically, as shown in figure 17 the method delay-Doppler modulated binary data stream for decoding, said binary data stream modulated with a defined Prototype Filter and comprising blocks of L subchannels, M Doppler / time bins and N Delay / frequency bins.

[0616] The method starts at step 1700 before proceeding to step 1710 of extracting a predetermined number M of successive upsampled blocks of size LNUFwhere NUFis the upsampling factor from said data stream, for example as discussed with respect to block 1110 of figure 11 above. The method next proceeds to step 1720 of performing a fast Fourier transform of size LNUFon the extracted block, for example as discussed with respect to block 1120 of figure 11 above.

[0617] The method next proceeds to step 1730 of extracting the upsampled subcarriers from the output of said upsampled fast Fourier transform, for example as discussed with respect to block 1130 of figure 11 above.

[0618] The method then proceeds to step 1740 of performing a circular convolution on each extracted upsampled subcarrier, for example as discussed with respect to block 1150 of figure 11 above. More particularly, the circular convolution is performed such that NUFstages of circular convolution are performed by the frequency shifted responses of the prototype filter on each respective extracted upsampled subcarrier value to obtain respective vector outputs Ym(n,ℓ) defined as:

[0619] A

[0620] Ym(n,ℓ) = Gℓ(p)Xm(ℓ + (n- p)NUF)

[0621]

[0622] P=—A

[0623] where Δ denotes the number of non-truncated filter coefficients, and G is the frequency shifted response of the Prototype Filter PF deduced from its impulse response g as

[0624] . M-l „DM.

[0625] i n 27r (fc 2 ),2npk

[0626] G P) —E NUF / g(ke l E~L M

[0627] k=0The method then proceeds to step 1750 of summing the vector outputs Ym(n,- ) to obtain a 2N x M Filter bank output Ym(n) for example as discussed with respect to block 1160 of figure 11 above. More particularly, the summation is performed as

[0628] NUF-1

[0629] Ym(n) =

[0630]

[0631] €=0

[0632] The method next proceeds to step 1760 of performing a 2D linear phase rotation for example as discussed with respect to block 1170 of figure 11 above.

[0633] The method next proceeds to perform a 2D linear transform at step 1770 for example as discussed with respect to block 1180 of figure 11 above. More particularly, the 2D linear transform is such as to transform the input samples represented in Delay-Doppler to output samples represented in Time-Frequency Delay-Doppler domain.

[0634] Finally, the method proceeds to perform a postprocessing operation, wherein said postprocessing operation comprises a corresponding decoding operation for said delay-Doppler modulation on said 2N x M matrix of Filter bank outputs to obtain an N x M output data matrix and where said postprocessing operation and said 2D linear phase rotation are defined such that the output to said postprocessing operation, consists of orthogonal complexvalued symbols.

[0635] Accordingly, the method of figure 17 presents the core operations described with respect to figures 11 to 16 above in terms of method steps. The method may incorporate additional steps as suggested by any of the variants and optional features discussed above.

[0636] For example, the 2D linear transform may comprise a row-wise IFFT of size M, followed by a column-wise FFT of size 2N, or a column-wise FFT of size 2N followed by a row-wise IFFT of size M, on said 2N x M matrix.

[0637] The 2D linear phase rotation may comprise

[0638] / 2 £7r / ?fc' wg < = exp — —

[0639] \ M

[0640]

[0641] Jfce[o,2N-i],fc'e[o, M-i]Where a and p must be chosen to have orthogonal complex-valued symbols at the output of the decoder, and where the sign of the (a, / ?) coefficients must be the opposite of the ones used in the 2D windowing step performed for transmitting data.

[0642] The method may further comprise a further step of associating a 2D window operation with said 2D linear phase rotation comprising applying an element-wise multiplication of the elements of the 2NxM matrix processed by said 2D linear phase rotation with another 2N x Mmatrix that corresponds to predefined respective window coefficients.

[0643] The step of postprocessing may comprise, in coherence with the first exemplary implementation presented above, partitioning an intermediate 2NxM matrix output by said filter bank decoding operation, into a first submatrix comprising elements the last N rows of said intermediate 2NxM matrix and a second submatrix comprising the remaining first N rows of said intermediate 2NxM matrix,

[0644] performing a de-interleaving operation on said first submatrix to obtain a de-interleaved matrix defined as Xp[n,m] = X[N - n - 1, M - m - 1], where 0 < m < M - l, 0 < n < N - l, N and M represent the number of rows and columns, respectively, of the first submatrix,

[0645] performing a conjugate operation on said de-interleaved first sub-matrix to obtain a conjugate de- interleaved first sub-matrix and,

[0646] adding said conjugate de- interleaved first sub-matrix to said second submatrix.

[0647] In which case, the 2D linear phase rotation may comprise

[0648] / 2 £7r / ?fc' wg < = exp — —

[0649] \ M

[0650]

[0651] Jfce[o,2N-i],fc'e[o, M-i] wherein

[0652] N + 1

[0653]

[0654] In this regard, it may be borne in mind that data transmitted using the transmitter as presented with respect to figures 1 to 10, a delay is introduced to half of the symbols, which may need to be removed at the receiver side. Where this is the case, the same values of a and are used for the delayed data, however the 2D-LPR window W

[0655]

[0656] may be adjusted by a phase shift of j.Nevertheless, omitting this additional adjustment does not preclude successful recovery of the data at the output (i.e. keep the orthogonality intact), and can be simply addressed by a skilled engineer after receiving the decoded samples - the delayed “delay-Doppler modulated binary data stream” are “transparent” to the receiver side as they are just considered as another “delay-Doppler modulated binary data stream” to be decoded.

[0657] The step of postprocessing may comprise in coherence with the second exemplary implementation presented above, partitioning an intermediate 2NxM matrix output by said filter bank decoding operation into a plurality of input submatrices comprising:

[0658] • a first submatrix

[0659]

[0660] of size corresponding to row position 0, column

[0661]

[0662] positions 1 to M / 2-1,

[0663] • a second submatrix X- of size corresponding to row position 0, column

[0664]

[0665] positions M / 2+1 to M-1,

[0666] • a third submatrix2of size 1 corresponding to row position N, column

[0667]

[0668] positions 1 to M / 2-1,

[0669] • a fourth submatrix X2' of size 1 x ( - l) corresponding to row position N, column positions M / 2+1 to M-1,

[0670] • a fifth submatrix X3of size (TV — 1) x 1 corresponding to column position 0, row position 1 to N-1,

[0671] • a sixth submatrix X3' of size (N − 1) × 1 corresponding to column position 0, row position N+1 to 2N-1,

[0672] • a seventh submatrix X5of size 1x2 corresponding to the real part of row position 0 column position 0 and the imaginary part of row position 0 column position M / 2, • an eighth submatrix X6of size 1x2 corresponding to the real part of row position N column position 0 and the imaginary part of row position N, column position M / 2, • a ninth submatrix X4of size (N - 1) x (M - 1) corresponding to row positions 1 to N - 1, column positions 1 to M - 1,

[0673] • a tenth submatrix / / corresponding to the remaining positions,

[0674] and the step of partitioning may comprise the further steps of:

[0675] • adding the elements of said 7thand 8thsubmatrices to obtain X5' and X6' respectively, • performing a de-interleaving operation on said submatrices X ’, X2', X3’, and / / to obtain de-interleaved matrices,

[0676] performing a conjugate operation on said de-interleaved sub-matrices to obtain conjugate deinterleaved sub-matrices denoted as X ", X2", X3”, and / / ', and adding said conjugate de-interleaved sub-matrices to other said second subjects (X1; 2,3,4), resulting in submatrices denoted as y1;Y2, y3,. and Y4and, the further step of concatenating the previous outputs (X5', X6', y1;y2, y3, and K to obtain said post decoded matrix of size N x M comprises in sequence:

[0677] o Row 0: X5', y1;X6', Y2.

[0678] o Rows 1 to N-1, column 0: Y2

[0679] o Remaining positions: Y4.

[0680] In which case, the 2D linear phase rotation may correspondingly comprise

[0681] / ZiTiakx Ztnflk' wff w? = exp I — - — ) exp

[0682] M

[0683]

[0684] J / ce[o,2N-i],k'e[o, M-i] Wherein

[0685] N M

[0686]

[0687] ~ 4 ' 4

[0688] In this regard, it may be borne in mind that data transmitted using the transmitter as presented with respect to figures 1 to 10, a delay is introduced to half of the symbols, which may need to be removed at the receiver side. Where this is the case, the same values of a and p are used for the delayed data, however the 2D-LPR window W

[0689]

[0690] may be adjusted by a phase shift of i.

[0691] The method may comprise a further step of performing subcarrier extraction by performing a circular shift of c values based on the index of the first active subcarrier, and selecting the active subcarriers from the first index to a total of NUF(2N + 2zl). Here, A denotes the number of non-truncated filter coefficients.

[0692] The method may comprise a further step of performing subcarrier extraction by multiplying the ck

[0693] Ythsample of each column in the received signal by eJ~ followed by applying the fast Fourier Transform of size LNUF. and selecting the subcarriers from the first index to a total of NUF(2N + 221).

[0694] The method may comprise a further step of performing active subcarrier extraction by directly extracting the active subcarriers based on the initial active carriers index x and the total number of subcarriers NUP(2N + 2 ),such that x = mod(NUF(ia- 1 - ) + 1).It will be appreciated that while embodiments have been described in terms of a receiver on one hand and a transmitter on the other, real systems will typically comprise both receiver and transmitter functionality. Such systems may combine any variant of the receiver implementation one hand with any variant of the transmitter implementation on the other.

[0695] In accordance with the foregoing, embodiments may be defined in accordance with the following sections referenced with a roman numeral.

[0696] XVI. There is accordingly presented, for example, a method of processing delay-Doppler modulated binary data stream for decoding, said binary data stream modulated with a defined Prototype Filter and comprising blocks of L subchannels, M Doppler / time bins and N Delay / frequency Bins said method comprising the steps of:

[0697] extracting a predetermined number M of successive upsampled blocks of size L / VUF where / VUF is the upsampling factor from said data stream,

[0698] performing a Fast Fourier transform of size / . / VUF on the extracted block,

[0699] extracting the upsampled active carriers from the output of said upsampled Fast Fourier transform,

[0700] performing a circular convolution on each extracted upsampled active carrier, such that / VUF stages of circular convolution are performed by the frequency shifted responses of the prototype filter on each respective extracted upsampled active carrier value to obtain respective vector outputs Ym(n,ℓ) defined as:

[0701] A

[0702] Ym(n,ℓ) = Gℓ(p)Xm(ℓ + (n- p)NUF)

[0703]

[0704] P=—A

[0705] where Δ denotes the number of non-truncated filter coefficients, and G is the frequency shifted response of the Prototype Filter PF deduced from its impulse response g as

[0706] . 7r€ M l 27T€(fc-^),2npk

[0707] G€(P) = elf2^ g(k} elNE

[0708]

[0709] k=0

[0710] summing the vector outputs Ym(n,- ) to obtain a 2N Filter bank outputs Ym(ri) byNUF-1

[0711] Ym(ri) =

[0712]

[0713] €=0

[0714] performing a 2D linear phase rotation,

[0715] performing a 2D linear transform to transform the input samples represented in Time-Frequency domain to output samples represented in Delay-Doppler domain, and

[0716] performing a postprocessing operation, wherein said postprocessing operation comprises a corresponding decoding operation for said delay-Doppler modulation on said 2N x M matrix of Filter bank outputs to obtain an N x M output data matrix and where said postprocessing operation and said 2D linear phase rotation are defined such that the output to said postprocessing operation, consists of orthogonal complex-valued symbols.

[0717] XVII. Thus, in certain variants of the method of section XVI for example the 2D linear transform may comprise a row-wise IFFT of size M, followed by a column-wise FFT of size 2N, or a column-wise FFT of size 2N followed by a row-wise IFFT of size M, on said 2N x M matrix.

[0718] XVIII. Thus, in certain variants of the method of any of section XVI or XVII for example, the 2D linear phase rotation may comprise

[0719] / 2 £7r / ?fc' wff w? = exp — 77 —

[0720] \ M

[0721]

[0722] J / ce[o,2N-i],k'e[o, M-i]

[0723] Where a and p must be chosen to have orthogonal complex-valued symbols at the output of the decoder, and

[0724] where the sign of the (a, / ?) coefficients must be the opposite of the ones used in the 2D windowing step performed for transmitting data.

[0725] XIX. Thus, in certain variants of the method of any of sections XVI to XVIII for example may comprise a further step of associating a 2D window operation with said 2D linear phase rotation comprising applying an element-wise multiplication of the elements of the 2N x M matrix processed by said 2D linear phase rotation with another 2N x M matrix that corresponds to predefined respective window coefficients.XX. Thus, in certain variants of the method of any of any of sections XVI to XIX for example, said step of postprocessing may comprise

[0726] partitioning an intermediate 2N x M matrix output by said filter bank decoding operation, into a first submatrix comprising elements the last N rows of said intermediate 2 / V x M matrix and a second submatrix comprising the remaining first N rows of said intermediate 2 / V x M matrix,

[0727] performing a de-interleaving operation on said first submatrix to obtain a de-interleaved matrix defined as Xp[n,m] = X[N - n - 1, M - m - 1], where 0 < m < M - l, 0 < n < N - l, N and M represent the number of rows and columns, respectively, of the first submatrix,

[0728] performing a conjugate operation on said de-interleaved first sub-matrix to obtain a conjugate de- interleaved first sub-matrix and,

[0729] adding said conjugate de- interleaved first sub-matrix to said second submatrix.

[0730] XXI. Thus, in certain variants of the method of section XX for example, the 2D linear phase rotation may comprise

[0731] / 2i7rcrfc Ztnflk' wg < = exp I — — exp

[0732] M

[0733]

[0734] Jfce[o,2N-i],fc'e[o, M-i] wherein

[0735] N + 1 M — 1

[0736] a = +

[0737] 4 P = ± 2

[0738] XXII. Thus, in certain variants of the method of sections XIV to XVIII for example the step of postprocessing may comprise

[0739] partitioning an intermediate 2NxM matrix output by said filter bank decoding operation, into a plurality of input submatrices comprising

[0740] a first submatrix of size 1 x (y - 1) corresponding to row position 0, column positions 1 to

[0741]

[0742] M / 2 - 1,

[0743] a second submatrix X of size l x (j- 1) corresponding to row position 0, column positions

[0744]

[0745] M / 2 + l t0 - l,

[0746] a third submatrix X2of size 1 x (y - 1) corresponding to row position N, column positions 1

[0747]

[0748] to M / 2 - 1,a fourth submatrix X2' of size 1 x - 1 j corresponding to row position N, column positions

[0749]

[0750] M / 2 + I tO M - 1,

[0751] a fifth submatrix X3of size (TV — 1) x 1 corresponding to column position 0, row position 1 to N - l

[0752] a sixth submatrix X3' of size N - l) x 1 corresponding to column position 0, row position N + 1 to 2N - 1

[0753] a seventh submatrix X5of size 1x2 corresponding to the real part of row position 0 column position 0 and the imaginary part of row position 0 column position M / 2,

[0754] aN eighth submatrix X6of size 1x2 corresponding to the real part of row position N column position 0 and the imaginary part of row position N, column position M / 2,

[0755] a nineth submatrix X4of size (N - 1) x (M - 1) corresponding to row positions 1 to N - 1, column positions 1 to M - 1,

[0756] a tenth submatrix X4' corresponding to the remaining positions;

[0757] and wherein said step of partitioning comprising the further step of adding the elements of said 7thand 8thsubmatrices to obtain X5' and X6' respectively,

[0758] performing a de-interleaving operation on said submatrices X1', X2', X3', and X4' to obtain deinterleaved matrices,

[0759] performing a conjugate operation on said de-interleaved sub-matrices to obtain conjugate deinterleaved sub-matrices denoted as X1'', X2'', X3'', and X4''.

[0760] adding said conjugate de- interleaved sub-matrices to other said second subjects (X1, X2, X3, X4) resulting in submatrices denoted as Y1, Y2, Y3, and Y4; and

[0761] concatenating the previous outputs (X5', X6', Y1, Y2, Y3, and Y4) to obtain said post decoded matrix of size NxM comprises in sequence:

[0762] • Row 0: X5', Y4, X6', Y2.

[0763] • Rows 1 to N-1, column 0: X3

[0764] • Remaining positions: Y4.

[0765] XXIII. Thus, in certain variants of the method of section XXII for example the 2D linear phase rotation may comprise

[0766] / 2i7iak\ 2111 (3 k' ws w / = exp I — - — ) exp

[0767] M

[0768]

[0769] Jfce[o,2N-i],fc'e[o, M-i]Wherein

[0770] N M

[0771] a = + —; P = ± —

[0772]

[0773] 4 4

[0774] XXIV. Thus, certain variants of the method of sections XVI to XXIII for example may comprise a further step of performing active subcarrier extraction by performing a circular shift of c values based on the index of the first active subcarrier, and selecting the active subcarriers from the first index to a total of NUF(2N + 2Δ), where Δ denotes the number of non-truncated filter coefficients.

[0775] XXV. Thus, in certain variants of the method of any of sections XVI to XXIV for example may comprise a further step of performing subcarrier extraction by multiplying the £thsample of ck

[0776] each column in the received signal by e * followed by applying the Fast Fourier Transform of size LNUF. and selecting the active carriers from the first index to a total of NUF(2N + 2Δ).

[0777] XXVI. Thus, in certain variants of the method of any of sections XVI to XXV for example may comprise a further step of performing active subcarrier extraction by directly extracting the active subcarriers based on the initial active carriers index x and the total number of subcarriers NUF(2N + 2Δ), such that x = mod(NUF(ia-1 - Δ) + 1).

[0778] XXVII. There is accordingly presented, for example, a computer program comprising instructions which, when the program is executed by a computer, causes the computer to carry out the method of any of sections XVI to XXVI

[0779] XXVIII. There is accordingly presented, for example, a computer-readable medium comprising instructions which, when executed by a computer, cause the computer to carry out the method of any of sections XVI to XXVI.

[0780] XXIX. There is accordingly presented, for example, a receiver for decoding a delay-Doppler modulated binary data stream, said binary data stream modulated with a defined Prototype Filter and comprising blocks of L subchannels, M Doppler / time bins and N Delay / frequency Bins said receiver comprising:

[0781] a symbol extractor configured to extract a predetermined number M of successive upsampled blocks of size LNUFwhere NUFis the upsampling factor from said datastream,a Fast Fourier Transform module configured to perform a Fast Fourier Transform of size LNUFon the extracted block,

[0782] a subcarrier extractor configured to extract the upsampled active carriers from the output of said upsampled Fast Fourier Transform,

[0783] a processing module configured to perform a circular convolution on each extracted upsampled active carrier, such that NUFstages of circular convolution are performed by the frequency shifted responses of the prototype filter on each respective extracted upsampled active carrier value to obtain respective vector outputs Ym(n,ℓ) defined as:

[0784] A

[0785] Ym(n,ℓ) = Gℓ(p)Xm(ℓ + (n- p)NUF)

[0786]

[0787] P=—A

[0788] where Δ denotes the number of non-truncated filter coefficients, and G is the frequency shifted response of the Prototype Filter PF deduced from its impulse response g as

[0789] Gℓ(p) = ei πℓ / N_UFΣ g(k) ei 2πℓ(k-M / 2) / Ne-i 2πpk / M

[0790]

[0791] k=0

[0792] a summer configured to sum the vector outputs Ym(n,ℓ) to obtain a 2N Filter bank outputs Ym(n) by

[0793] NUF-1

[0794] Ym(n) =

[0795]

[0796] €=0

[0797] a phase rotation module configured to perform a 2D linear phase rotation on the output of said summer,

[0798] a linear transform, module configured to perform a 2D linear transform on the output of said phase rotation module, and

[0799] a postprocessing module, configured to perform a corresponding decoding operation for said delay-Doppler modulation on said 2N x M matrix of Filter bank outputs to obtain an NxM output data matrix and where said postprocessing operation and said 2D linear phase rotation are defined such that the output to said postprocessing operation, consists of orthogonal complex-valued symbols.

[0800] The disclosed methods can take form of an entirely hardware embodiment (e.g. FPGA), an entirely software embodiment (for example to control a system according to the invention) oran embodiment containing both hardware and software elements. Software embodiments include but are not limited to firmware, resident software, microcode, etc. The invention can take the form of a computer program product accessible from a computer-usable or computer-readable medium providing program code for use by or in connection with a computer or an instruction execution system. A computer-usable or computer-readable can be any apparatus that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device. The medium can be an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system (or apparatus or device) or a propagation medium.

[0801] These methods and processes may be implemented by means of computer-application programs or services, an application-programming interface (API), a library, and / or other computer-program product, or any combination of such entities.

[0802] The inventive method can be performed by a suitably-programmed general-purpose computer or computer system, possibly including a computer network, storing a suitable program in nonvolatile form on a computer-readable medium such as a hard disk, a solid state disk or a CD-ROM and executing the program using its microprocessor(s) and memory.

[0803] Figure 18 presents a computer suitable for carrying out a method according to an embodiment.

[0804] More particularly, figure 18 presents a computer suitable for carrying out a method or receiving and / or transmitting according to any of the mechanisms described above.

[0805] In figure 18, the computer includes a Central Processing Unit (CPU) 1801 which may perform the method steps described above while running an executable program, i.e. a set of computer-readable instructions, stored in a memory device such as RAM 1802a or ROM 1802b or hard disk drive 1831, DVD / CD drive 1832, or stored remotely. Moreover, one or more computer files defining the spatial relations graphs, and computer files comprising the virtual space and objects defined therein, may also be stored on one or more of memory devices 1802a, 1802b, 1831, 1832, or remotely.

[0806] The claimed invention is not limited by the form of the computer-readable media on which the computer-readable instructions of the inventive process are stored. For example, the instructions and files can be stored on CDs, DVDs, in FLASH memory, RAM, ROM, PROM, EPROM, EEPROM, hard disk or any other information processing device with which thecomputer communicates, such as a server or computer. The program can be stored on a same memory device or on different memory devices.

[0807] Further, a computer program suitable for carrying out the inventive method can be provided as a utility application, background daemon, or component of an operating system, or combination thereof, executing in conjunction with CPU 1801 and an operating system such as Microsoft XP, Microsoft Windows 10, UNIX, Solaris, LINUX, Apple MAC-OS and other systems known to those skilled in the art.

[0808] CPU 1801 can be a Xenon processor from Intel of America or a Ryzen processor from AMD of America, or can be other processor types, such as a Freescale ColdFire, IMX, or ARM processor from NXP Semiconductors. Alternatively, the CPU can be a processor such as a Core from Intel Corporation of America, or can be implemented on an FPGA, ASIC, PLD or using discrete logic circuits, as one of ordinary skill in the art would recognize. Further, the CPU can be implemented as multiple processors cooperatively working to perform the computer-readable instructions of the inventive processes described above.

[0809] The computer may include a network interface 1820, such as an Intel Ethernet PRO network interface card from Intel Corporation of America, for interfacing with a network, such as a local area network (LAN) 1874, wide area network (WAN), the Internet 1875 and the like. The method may be implemented remotely, by means of a web application, e.g. operating on remote server 1876.

[0810] The computer may further include a display controller 1810, such as a NVIDIA GeForce RTX graphics adaptor from NVIDIA Corporation of America for interfacing with display 1811. A general purpose I / O interface 1803 interfaces with a keyboard 1812 and pointing device 1813, such as a roller ball, mouse, touchpad and the like. The display, the keyboard, the sensitive surface for the touch mode and the pointing device, together with the display controller and the I / O interfaces, form a graphical user interface, used by the user to provide input commands. Commands may additionally be issued via a network connection as described below.

[0811] Disk controller 1830 connects HDD 1831 and DVD / CD 1832 with communication bus 1820, which can be an ISA, EISA, VESA, PCI, or similar, for interconnecting all of the components of the computer.A description of the general features and functionality of the display, keyboard, pointing device, as well as the display controller, disk controller, network interface and I / O interface is omitted herein for brevity as these features are known.

[0812] The system of figure 18 may implement the operations ascribed to the base station, or any user device. As such, multiple such systems may be provided operating in coordination to execute respective parts of the methods and operations described.

[0813] By way of example, Figure 19 presents a base station 1910 incorporating computer suitable for carrying out a method according to an embodiment.

[0814] As shown in figure 19, a computer 1900 comprises a subset of the components described with respect to figure 18 as appropriate to such an implementation context. Specifically, the computer includes a Central Processing Unit (CPU) 1801 which may perform the method steps described above while running an executable program, i.e. a set of computer-readable instructions, stored in a memory device 1802, in communication with I / O interface 1803.

[0815] The computer may include a network interface 1820, for interfacing with a network, such as a local area network (LAN) 1874, wide area network (WAN), the Internet 1875 and the like. Operations of the method may be implemented remotely, by means of a web application, e.g. operating on remote server 1876.

[0816] It will be understood that the configurations and / or approaches described herein are exemplary in nature, and that these specific embodiments or examples are not to be considered in a limiting sense, because numerous variations are possible. The specific routines or methods described herein may represent one or more of any number of processing strategies. As such, various acts illustrated and / or described may be performed in the sequence illustrated and / or described, in other sequences, in parallel, or omitted. Likewise, the order of the abovedescribed processes may be changed.

[0817] The examples described above are given as non-limitative illustrations of embodiments of the invention. They do not in any way limit the scope of the invention which is defined by the following claims.

Claims

CLAIMS1. A method of encoding a binary data stream for wireless transmission, said method comprising the steps of:dividing a complex symbol data stream into two parallel complex symbol substreams,introducing a delay equal to half the duration of a symbol of said complex symbol data stream to one said complex symbol substream,performing precoding on each complex symbol substreamperforming a delay-Doppler modulated binary data stream encoding of each said complex symbol substreamsaid operation of performing a delay-Doppler modulated binary data stream encoding comprising the steps ofperforming a 2D linear transform to transform the input samples represented in Delay- Doppler domain to output samples represented in Time-Frequency,performing a 2D linear phase rotation, andperforming a filter bank encoding,wherein said precoding and said 2D linear phase rotation are defined such that the input to said filter bank consists of real-valued symbols, andcombining said two parallel complex substreams to obtain a data stream for transmission.

2. The method of claim 1 wherein said step of precoding comprisesfor each said complex symbol substream, splitting said substream into a plurality of successive batches, each said batch defining an input matrix X of size N x M, andinterleaving said input matrix to obtain an interleaved matrix defined as Xp[n,m] = X[N - n -1, M - m - 1], where 0 < m < M - l, 0 < n < N - l, N and M represent the number of rows and columns, respectively, of the input matrix Xperforming a conjugate operation on said interleaved matrix to obtain a conjugate interleaved matrix and,concatenating said input matrix with said conjugate interleaved matrix to obtain a precoded matrix of size 2N x M.

3. the method of claim 2 wherein said step of performing delay-Doppler modulated binary data stream encoding comprises performing a two-dimensional windowing that includes a twodimensional linear phase wherein said two-dimensional linear phase rotation comprises WαNWβM=n∈[0,2N-1], m∈[0,M-1]WhereinN + l M - la =—‘fs =—for the said complex symbol substream incorporating no delay, andiWαNWβMfor the said complex symbol substream incorporating said delay.

4. A computer program comprising instructions which, when the program is executed by a computer, cause the computer to carry out the method of any of claims 1 to 3.

5. A computer-readable medium comprising instructions which, when executed by a computer, cause the computer to carry out the method of any of claims 1 to 3.

6. A data encoder for the preparation of a binary data stream for wireless transmission, said encoder comprising:a splitter configured to dividing a complex symbol data stream into two parallel complex symbol substreams,a delay block configured to introduce a delay equal to half the duration of a symbol of said complex symbol data stream to one said complex symbol substream,a precoder for each complex symbol substream configured to perform a precoding operation, an OTFS encoder configured to perform an OTFS encoding of each said complex symbol substream, wherein said operation of performing an OTFS encoding comprises performing a 2D linear transform,performing a 2D linear phase rotation, andperforming a filter bank encoding,wherein said precoding and said 2D linear phase rotation are defined such that the input to said filter bank consists of real-valued symbols,and further comprising a concatenator configured to combine said two parallel complex substreams to obtain a data stream for transmission.

7. A method of processing delay-Doppler modulated binary data stream for decoding, said binary data stream modulated with a defined Prototype Filter and comprising blocks of L subchannels, M Doppler / time bins and N Delay / frequency Bins said method comprising the steps of:extracting a predetermined number M of successive upsampled blocks of size LNUFwhere NUFis the upsampling factor from said data stream,performing a Fast Fourier Transform of size LNUFon the extracted block,extracting the upsampled active carriers from the output of said upsampled fast Fourier transform,performing a circular convolution on each extracted upsampled active carrier, such that NUFstages of circular convolution are performed by the frequency shifted responses of the prototype filter on each respective extracted upsampled active carrier value to obtain respective vector outputs Ym(n,ℓ) defined as:AYm(n, ℓ) = Gℓ(p)Xm(ℓ + (n-p)NUF)P=-Awhere Δ denotes the number of non-truncated filter coefficients, and G is the frequency shifted response of the Prototype Filter PF deduced from its impulse response g asGℓ(p) = ei πℓ / N_UFΣ g(k) ei 2πℓ(k-M / 2) / Ne-i 2πpk / Mk=0summing the vector outputs Ym(n,ℓ) to obtain a 2N Filter bank outputs Ym(n) byNUF-1Ym(n) = Ym(n,f)ℓ=0performing a 2D linear phase rotation,performing a 2D linear transform to transform the input samples represented in Time-Frequency domain to output samples represented in Delay-Doppler domain, andperforming a postprocessing operation, wherein said postprocessing operation comprises a corresponding decoding operation for said delay-Doppler modulation on said 2N x M matrix of Filter bank outputs to obtain an N x M output data matrix and where said postprocessing operation and said 2D linear phase rotation are defined such that the output to said postprocessing operation, consists of orthogonal complex-valued symbols.

8. The method of claim 7 wherein said 2D linear transform comprises a row-wise IFFT of size M, followed by a column-wise FFT of size 2N, or a column-wise FFT of size 2N followed by a row-wise IFFT of size M, on said 2N x M matrix.

9. The method of claim 7 or 8 wherein said 2D linear phase rotation comprises (Zinakx 2in[3krWαNWβM= [exp(2iπαk / N) exp(2iπβk' / M)]Mk∈[0,2N-1], k'∈[0,M-1]Where a and p must be chosen to have orthogonal complex-valued symbols at the output of the decoder, andwhere the sign of the (a, / ?) coefficients must be the opposite of the ones used in the 2D windowing step performed for transmitting data.

10. The method of any of claims 7 to 9 wherein said step of postprocessing comprisespartitioning an intermediate 2N x M matrix output by said filter bank decoding operation, into a first submatrix comprising elements the last N rows of said intermediate 2N x M matrix and a second submatrix comprising the remaining first N rows of said intermediate 2N x M matrix,performing a de-interleaving operation on said first submatrix to obtain a de-interleaved matrix defined as Xp[n,m] = X[N - n - 1, M - m - 1], where 0 < m < M - l, 0 < n < N - l, N and M represent the number of rows and columns, respectively, of the first submatrix,performing a conjugate operation on said de-interleaved first sub-matrix to obtain a conjugate de- interleaved first sub-matrix and,adding said conjugate de- interleaved first sub-matrix to said second submatrix.

11. The method of claim 10 wherein said 2D linear phase rotation comprises2in / 3k'\ws = expMk∈[0,2N-1], k'∈[0,M-1]whereinN + 1 M — 1α = ±(N+1) / 4; β = ±(M-1) / 212. A computer program comprising instructions which, when the program is executed by a computer, cause the computer to carry out the method of any of claims 1 to 10.

13. A computer-readable medium comprising instructions which, when executed by a computer, cause the computer to carry out the method of any of claims 1 to 10.

14. A receiver for decoding a delay-Doppler modulated binary data stream, said binary data stream modulated with a defined Prototype Filter and comprising blocks of L subchannels, M Doppler bins and N Delay Bins said receiver comprising:a symbol extractor configured to extract a predetermined number M of successive upsampled blocks of size LNUFwhere NUFis the upsampling factor from said data stream,a fast Fourier transform module configured to perform a fast Fourier transform of size LNUFon the extracted block,a subcarrier extractor configured to extract the upsampled active carriers from the output of said upsampled fast Fourier transform,a processing module configured to perform a circular convolution on each extracted upsampled active carrier, such that NUFstages of circular convolution are performed by the frequency shifted responses of the prototype filter on each respective extracted upsampled active carrier value to obtain respective vector outputs Ym(n,ℓ) defined as:AYm(n,ℓ) = Gℓ(p)Xm(ℓ + (n-p)NUF)P=-Awhere Δ denotes the number of non-truncated filter coefficients, and G is the frequency shifted response of the Prototype Filter PF deduced from its impulse response g asi 2ni(k 2"),2npkGj(p) = eNUF \ g(k) elN e~lMk=0a summer configured to sum the vector outputs ym(n,ℓ) to obtain a 2N Filter bank outputs ym(n) byNUF-1Ym(n) = Ym(n,ℓ)ℓ=0a phase rotation module configured to perform a 2D linear phase rotation on the output of said summer,a linear transform, module configured to perform a 2D linear transform on the output of said phase rotation module, andA postprocessing module, configured to perform a corresponding decoding operation for said delay-Doppler modulation on said 2N x M matrix of Filter bank outputs to obtain an N x M output data matrix and where said postprocessing operation and said 2D linear phase rotation are defined such that the output to said postprocessing operation, consists of orthogonal complex-valued symbols.

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