Semiconductor device

Abstract

Provided is a novel semiconductor device. The semiconductor device has: a first current mirror unit that generates a third current from a first current; a second current mirror unit that generates a fourth current from a second current; a first cascode connection unit that is connected to the first current mirror unit; a second cascode connection unit that is connected to the second current mirror unit; a voltage comparison unit; and a current comparison unit. A first potential is the potential between the first current mirror unit and the first cascode connection unit on a current path along which the third current flows. A second potential is the potential between the second current mirror unit and the second cascode connection unit on a current path along which the fourth current flows. The voltage comparison unit has a function of generating, when the first potential is greater than the second potential, a fifth current and a sixth current that is smaller than the fifth current. The third current and the fifth current are inputted to one inverter of the current comparison unit, and the fourth current and the sixth current are inputted to another inverter of the current comparison unit.

Description

Semiconductor equipment

[0001] One aspect of the present invention relates to a semiconductor device.

[0002] One aspect of the present invention is not limited to the above-mentioned technical field. Examples of technical fields of one aspect of the present invention include semiconductor devices, display devices, light-emitting devices, projection devices, illumination devices, optical devices, electro-optical devices, imaging devices, light-receiving devices, detection devices, power supply devices, energy storage devices, communication devices, computing devices, control devices, computing processing devices, memory devices, input devices, output devices, input / output devices, signal processing devices, information processing devices, computers, electronic devices, systems having the same, methods for driving them, or methods for manufacturing them.

[0003] The development of integrated circuits that mimic the structure of the human brain is progressing rapidly. These integrated circuits incorporate the brain's structure as electronic circuits, and have circuits that mimic the "neurons" and "synapses" of the human brain. For this reason, such integrated circuits are sometimes called, for example, "neuromorphic," "brainmorphic," or "brain-inspired." These integrated circuits have a non-von Neumann architecture, and it is suggested that they can perform parallel processing with extremely low power consumption compared to von Neumann architectures, where power consumption increases with increasing processing speed.

[0004] A model of information processing that mimics a neural network having "neurons" and "synapses" is called an artificial neural network (ANN). For example, Non-Patent Documents 1 and 2 disclose a configuration in which SRAM (Static Random Access Memory) bit cells are used as the computing device constituting the artificial neural network. Also, for example, Patent Documents 1 and 3 disclose a configuration in which multiplication cells are used to perform multiplication using the current flowing in the subthreshold region of a transistor as the computing device constituting the artificial neural network.

[0005] Furthermore, the arithmetic unit described in Non-Patent Document 3 is equipped with a successive approximation type analog-to-digital conversion circuit for current input. In addition, the analog-to-digital conversion circuit is equipped with a comparator described in Non-Patent Document 4.

[0006] Japanese Patent Publication No. 2024-65044

[0007] M. Kang et al. , “A Multi-Functional In-Memory Inference Processor Using a Standard 6T SRAM Array”, IEEE JSSC, Vol. 53, No. 2, pp. 642-655, 2018J. Zhang et al. , “In-Memory Computation of a Machine-Learning Classifier in a Standard 6T SRAM Array”, IEEE JSSC, Vol. 52, No. 4, pp. 915-924, 2017K. Tsuda et al. , “A 1.1-nJ / Classification True Analog Current Computing on Multilayer Neural Network With Crystalline-IGZO / Si-CMOS Monolithic Stack Technology”, J-EDS, Vol. 12, pp. 594-604, 2024M. R. Mahmoodi and D. Strukov, “An Ultra-Low Energy Internally Analog,Externally Digital Vector-Matrix Multiplier Based on NOR Flash Memory Technology”, DAC '18 Proc. , pp. 1-6, 2018

[0008] One aspect of the present invention aims to provide a semiconductor device with high comparative accuracy. Alternatively, one aspect of the present invention aims to provide a semiconductor device with a fast operating speed. Alternatively, one aspect of the present invention aims to provide a semiconductor device with low power consumption. Alternatively, one aspect of the present invention aims to provide a miniaturized semiconductor device. Alternatively, one aspect of the present invention aims to provide a highly reliable semiconductor device. Alternatively, one aspect of the present invention aims to provide a method for driving the above-mentioned semiconductor device. Alternatively, one aspect of the present invention aims to provide a novel semiconductor device.

[0009] Furthermore, the above-mentioned problems do not preclude the existence of other problems. Those skilled in the art can naturally derive other problems from the description in this specification, drawings, claims, etc., and it is possible to extract other problems from the description in this specification, drawings, claims, etc. Furthermore, one aspect of the present invention does not need to solve all of these problems (the above-mentioned problems and other problems).

[0010] (1) One aspect of the present invention is a semiconductor device having a function of comparing a first current and a second current, comprising: a first current mirror unit that generates a third current from a first current; a second current mirror unit that generates a fourth current from a second current; a first cascode connection unit connected to the first current mirror unit; a second cascode connection unit connected to the second current mirror unit; a voltage comparison unit that generates a fifth current and a sixth current based on a first potential and a second potential; and a third current and a fifth current and a sixth current based on the third current and the fifth current and the fourth current and the sixth current. A semiconductor device having a current comparison unit that outputs a potential, wherein the first potential is the potential between the first current mirror unit and the first cascode connection unit in the current path through which the third current flows, the second potential is the potential between the second current mirror unit and the second cascode connection unit in the current path through which the fourth current flows, and the voltage comparison unit has the function of making the fifth current greater than the sixth current when the first potential is greater than the second potential, and the function of making the fifth current less than the sixth current when the first potential is less than the second potential.

[0011] (2) In addition, in (1) above, the voltage comparison unit includes a first current generating transistor and a second current generating transistor, wherein the first current generating transistor has the function of generating a fifth current, and the second current generating transistor has the function of generating a sixth current, and a second potential may be applied to the gate of the first current generating transistor, and a first potential may be applied to the gate of the second current generating transistor.

[0012] (3) In addition, in (2) above, the channel lengths of the first current generating transistor and the second current generating transistor may be greater than the channel length of at least one transistor in the first current mirror section, the second current mirror section, the first cascode connection section, the second cascode connection section, and the current comparison section.

[0013] (4) In addition, in (2) or (3) above, the plurality of unit transistors constituting the first current generating transistor and the second current generating transistor may be arranged in a common centroid configuration.

[0014] (5) In addition, in (1) above, the current comparison unit has an inverter loop composed of a first inverter and a second inverter, and the third current and the fifth current may be input to one of the two power terminals of the first inverter, and the fourth current and the sixth current may be input to one of the two power terminals of the second inverter.

[0015] (6) In addition, in (5) above, the voltage comparison unit includes a first current generating transistor and a second current generating transistor, wherein the first current generating transistor has the function of generating a fifth current, and the second current generating transistor has the function of generating a sixth current, and a second potential may be applied to the gate of the first current generating transistor, and a first potential may be applied to the gate of the second current generating transistor.

[0016] (7) Further, in (6) above, the channel length of each of the first current generation transistor and the second current generation transistor may be greater than at least one channel length of the transistors included in each of the first current mirror section, the second current mirror section, the first cascode connection section, the second cascode connection section, and the current comparison section.

[0017] (8) Further, in (6) or (7) above, the plurality of unit transistors constituting the first current generation transistor and the second current generation transistor may be arranged in a common centroid configuration.

[0018] (9) Further, in (5) above, having a reset section, a fourth potential is applied to each of the other one of the two power supply terminals of the first inverter and the other one of the two power supply terminals of the second inverter, and the reset section may have a function of applying the fourth potential to each of the output terminal of the first inverter, the output terminal of the second inverter, one of the two power supply terminals of the first inverter, and one of the two power supply terminals of the second inverter.

[0019] (10) Further, in (9) above, the voltage comparison section includes the first current generation transistor and the second current generation transistor, the first current generation transistor has a function of generating a fifth current, the second current generation transistor has a function of generating a sixth current, a second potential is applied to the gate of the first current generation transistor, and a first potential may be applied to the gate of the second current generation transistor.

[0020] (11) Further, in (10) above, the channel length of each of the first current generation transistor and the second current generation transistor may be greater than at least one channel length of the transistors included in each of the first current mirror section, the second current mirror section, the first cascode connection section, the second cascode connection section, the current comparison section, and the reset section.

[0021] (12) Further, in (10) or (11) above, the plurality of unit transistors constituting the first current generation transistor and the second current generation transistor may be arranged in a common centroid configuration.

[0022] (13) One aspect of the present invention includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, a tenth transistor, an eleventh transistor, a twelfth transistor, a thirteenth transistor, a fourteenth transistor, a fifteenth transistor, a sixteenth transistor, a seventeenth transistor, an eighteenth transistor, and a nineteenth transistor, wherein the first terminal of the first transistor is connected to the first terminal of the third transistor and the second transistor The gate of the transistor is electrically connected to the gate of the fourth transistor, the first terminal of the sixth transistor, and the first wiring. The first terminal of the second transistor is electrically connected to the first terminal of the fourth transistor, the gate of the first transistor, the gate of the third transistor, the first terminal of the seventh transistor, and the second wiring. The second terminal of the first transistor is electrically connected to the first terminal of the fifth transistor, the first terminal of the ninth transistor, and the first terminal of the thirteenth transistor. The second terminal of the second transistor is electrically connected to the first terminal of the eighth transistor and the tenth The first terminal of transistor 14 is electrically connected to the first terminal of transistor 14, the second terminal of transistor 9 is electrically connected to the first terminal of transistor 11, the second terminal of transistor 10 is electrically connected to the first terminal of transistor 11, the second terminal of transistor 13 is electrically connected to the gate of transistor 10 and the first terminal of transistor 17, the second terminal of transistor 14 is electrically connected to the gate of transistor 9 and the first terminal of transistor 18, and the gate of transistor 17 is The first terminal of transistor 12 is electrically connected to the gate of transistor 16 and the third wiring, the gate of transistor 18 is electrically connected to the first terminal of transistor 15, the gate of transistor 19 and the fourth wiring, the second terminal of transistor 12 is electrically connected to the first terminal of transistor 16, the second terminal of transistor 15 is electrically connected to the first terminal of transistor 19, and the second terminal of transistor 3, the second terminal of transistor 4, the second terminal of transistor 5, and the second terminal of transistor 6 are electrically connected to the first terminal of transistor 6.This is a semiconductor device in which the second terminal of the seventh transistor and the second terminal of the eighth transistor are each electrically connected to the fifth wire, the gates of the fifth transistor, the sixth transistor, the seventh transistor, and the eighth transistor are each electrically connected to the sixth wire, the second terminal of the eleventh transistor, the sixteenth transistor, the seventeenth transistor, the eighteenth transistor, and the nineteenth transistor are each electrically connected to the seventh wire, the gate of the eleventh transistor is electrically connected to the eighth wire, and the gates of the twelfth transistor, the thirteenth transistor, the fourteenth transistor, and the fifteenth transistor are each electrically connected to the ninth wire.

[0023] (14) In addition, in (13) above, the third transistor and the fourth transistor may each be an n-channel transistor, and the first transistor, the second transistor, the ninth transistor, the tenth transistor, the sixteenth transistor, the seventeenth transistor, the eighteenth transistor, and the nineteenth transistor may each be a p-channel transistor.

[0024] (15) In addition, in (13) above, the third transistor and the fourth transistor may each be a p-channel transistor, and the first transistor, the second transistor, the ninth transistor, the tenth transistor, the sixteenth transistor, the seventeenth transistor, the eighteenth transistor, and the nineteenth transistor may each be an n-channel transistor.

[0025] (16) In addition, in any one of (13) to (15) above, the channel length of the first transistor, the second transistor, the third transistor, and the fourth transistor may be greater than the channel length of at least one of the fifth transistor, the sixth transistor, the seventh transistor, and the eighth transistor.

[0026] (17) In addition, in any one of (13) to (16) above, the channel length of the ninth transistor and the tenth transistor may be greater than the channel length of at least one of the fifth transistor, the sixth transistor, the seventh transistor and the eighth transistor.

[0027] (18) In addition, in any one of (13) to (17) above, the channel length of the 16th transistor, the 17th transistor, the 18th transistor, and the 19th transistor may be greater than the channel length of at least one of the 5th transistor, the 6th transistor, the 7th transistor, and the 8th transistor.

[0028] (19) In addition, in any one of (13) to (18) above, the plurality of unit transistors constituting the ninth transistor and the tenth transistor may be in a common centroid arrangement.

[0029] (20) In addition, in any one of (13) and (16) to (19) above, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the seventh transistor, and the eighth transistor may each include an oxide semiconductor in the channel formation region.

[0030] One aspect of the present invention aims to provide a semiconductor device with high comparative accuracy. Alternatively, one aspect of the present invention aims to provide a semiconductor device with a fast operating speed. Alternatively, one aspect of the present invention aims to provide a semiconductor device with low power consumption. Alternatively, one aspect of the present invention aims to provide a miniaturized semiconductor device. Alternatively, one aspect of the present invention aims to provide a highly reliable semiconductor device. Alternatively, one aspect of the present invention aims to provide a method for driving the above-mentioned semiconductor device. Alternatively, one aspect of the present invention aims to provide a novel semiconductor device.

[0031] Furthermore, the effects described above do not preclude the existence of other effects. Those skilled in the art can naturally derive other effects from the descriptions in this specification, drawings, and claims, and it is possible to extract other effects from the descriptions in this specification, drawings, and claims. Moreover, one aspect of the present invention does not need to have all of these effects (the effects described above and other effects).

[0032] Figure 1 is a circuit diagram illustrating an example of the configuration of a semiconductor device. Figure 2 is a timing chart illustrating an example of the operation of a semiconductor device. Figure 3 is a circuit diagram illustrating an example of the operation of a semiconductor device. Figure 4 is a circuit diagram illustrating an example of the operation of a semiconductor device. Figure 5 is a circuit diagram illustrating an example of the operation of a semiconductor device. Figure 6 is a circuit diagram illustrating an example of the operation of a semiconductor device. Figure 7 is a circuit diagram illustrating an example of the operation of a semiconductor device. Figure 8 is a circuit diagram illustrating an example of the operation of a semiconductor device. Figure 9 is a circuit diagram illustrating an example of the operation of a semiconductor device. Figures 10A and 10B are schematic diagrams illustrating an example of the configuration of a semiconductor device. Figure 11 is a circuit diagram illustrating an example of the configuration of a semiconductor device. Figure 12 is a circuit diagram illustrating an example of the configuration of a semiconductor device. Figures 13A and 13B are cross-sectional views illustrating an example of the configuration of a semiconductor device. Figure 14A is a top view illustrating an example of the configuration of a semiconductor device. Figures 14B, 14C, and 14D are cross-sectional views illustrating an example of the configuration of a semiconductor device. Figure 15 is a cross-sectional view illustrating an example of the configuration of a semiconductor device. Figures 16A and 16B are diagrams showing an example of an electronic component. Figures 17A, 17B, 17C, 17D, 17E, 17F, 17G, and 17H show examples of electronic equipment. Figure 18A shows an example of a large-scale computer. Figure 18B shows an example of space equipment. Figure 18C shows an example of a storage system applicable to a data center. Figure 18D shows an example of an information processing system. Figures 19A1, 19A2, 19A3, 19A4, 19A5, 19A6, 19A7, and 19B1, 19B2, 19B3, 19B4, 19B5, and 19B6 illustrate electrical connections.

[0033] Embodiments of the present invention will now be described. However, it will be readily apparent to those skilled in the art that the embodiments and their details can be modified in various ways without departing from the spirit and scope of the present invention. Therefore, the present invention is not to be construed as being limited to the contents of the following embodiments.

[0034] Furthermore, the contents of the embodiments can be appropriately combined to form one aspect of the present invention.

[0035] In this specification, the components of the present invention may be classified by function and shown as independent elements. However, it may be difficult to separate the components by function, and a single element may be involved in multiple functions, or a single function may be involved across multiple elements. Therefore, the explanation is not limited to this and may be appropriately rephrased.

[0036] Furthermore, when using the same symbol for multiple elements and explaining them in a way that distinguishes them, identification symbols such as "A", "b", "_1", "[n]", and "[m,n]" may be added. Also, when explaining something common to multiple elements with identification symbols, or when explaining them without distinguishing them, identification symbols may be omitted.

[0037] Furthermore, in drawings, the same reference numeral may be used for identical elements, elements with similar functions, elements of the same material, or elements formed simultaneously, thereby omitting the explanation of repetition. Additionally, the same hatching pattern may omit the use of a reference numeral.

[0038] Furthermore, the drawings are schematic representations intended to aid in understanding the present invention. Therefore, they are not limited to their size, aspect ratio, shape, etc. Also, some elements may be omitted.

[0039] (Embodiment 1) A semiconductor device according to one aspect of the present invention will be described with reference to the drawings. At least a part of the semiconductor device according to one aspect of the present invention can be used, for example, in a computing device. It can also be used, for example, in a successive approximation type analog-to-digital conversion circuit with current input.

[0040] <Example of Semiconductor Device Configuration> Figure 1 is a circuit diagram illustrating a semiconductor device 100 according to one aspect of the present invention.

[0041] The semiconductor device 100 includes transistors M1a, M1b, M2a, M2b, M3a, M3b, M3c, M3d, M4a, M4b, M4c, M5a, M5b, M5c, M5d, M6a, M6b, M6c, and M6d. The semiconductor device 100 can also be called a comparator.

[0042] One source or drain of transistor M1a is connected to one source or drain of transistor M2a, the gate of transistor M1b, the gate of transistor M2b, one source or drain of transistor M3b, and wiring OLA. One source or drain of transistor M1b is connected to one source or drain of transistor M2b, the gate of transistor M1a, the gate of transistor M2a, one source or drain of transistor M3c, and wiring OLB. The other source or drain of transistor M1a is connected to one source or drain of transistor M3a, one source or drain of transistor M4a, and one source or drain of transistor M5b. The other source or drain of transistor M1b is connected to one source or drain of transistor M3d, one source or drain of transistor M4b, and one source or drain of transistor M5c. The other source or drain of transistor M4a is connected to one source or drain of transistor M4c. The other source or drain of transistor M4b is connected to one source or drain of transistor M4c. The other source or drain of transistor M5b is connected to the gate of transistor M4b and one source or drain of transistor M6b. The other source or drain of transistor M5c is connected to the gate of transistor M4a and one source or drain of transistor M6c. The gate of transistor M6b is connected to one source or drain of transistor M5a, the gate of transistor M6a, and wiring ILA. The gate of transistor M6c is connected to one source or drain of transistor M5d, the gate of transistor M6d, and wiring ILB. The other source or drain of transistor M5a is connected to one source or drain of transistor M6a. The other source or drain of transistor M5d is connected to one source or drain of transistor M6d.The other source or drain of transistor M2a, the other source or drain of transistor M2b, the other source or drain of transistor M3a, the other source or drain of transistor M3b, the other source or drain of transistor M3c, and the other source or drain of transistor M3d are each connected to wiring VLS. The gates of transistor M3a, M3b, M3c, and M3d are each connected to wiring VLP1. The other source or drain of transistor M4c, the other source or drain of transistor M6a, the other source or drain of transistor M6b, the other source or drain of transistor M6c, and the other source or drain of transistor M6d are each connected to wiring VLD. The gate of transistor M4c is connected to wiring VLP2. The gates of transistors M5a, M5b, M5c, and M5d are each connected to the wiring VLC.

[0043] The wiring connected to either the source or drain of transistor M6b may be referred to as node ND1A. The wiring connected to either the source or drain of transistor M6c may be referred to as node ND1B. The wiring connected to either the source or drain of transistor M4a may be referred to as node ND2A. The wiring connected to either the source or drain of transistor M4b may be referred to as node ND2B. The wiring connected to either the source or drain of transistor M4c may be referred to as node ND3.

[0044] As transistors constituting the semiconductor device 100, n-channel transistors can be used for each of transistors M2a and M2b, and p-channel transistors can be used for each of transistors M1a, M1b, M4a, M4b, M6a, M6b, M6c, and M6d. Furthermore, n-channel transistors can be used for each of transistors M3a, M3b, M3c, and M3d, and p-channel transistors can be used for each of transistors M4c, M5a, M5b, M5c, and M5d.

[0045] Furthermore, as transistors constituting the semiconductor device 100, p-channel transistors may be used for each of transistor M2a and M2b, and n-channel transistors may be used for each of transistors M1a, M1b, M4a, M4b, M6a, M6b, M6c, and M6d. Alternatively, p-channel transistors may be used for each of transistors M3a, M3b, M3c, and M3d, and n-channel transistors may be used for each of transistors M4c, M5a, M5b, M5c, and M5d. In this case, in the description of the semiconductor device 100, descriptions regarding the positive / negative relationship of voltage, the magnitude relationship of potential, and the positive / negative relationship of current (also called the direction of current flow) may be appropriately reinterpreted. For example, "large potential" and "small potential" may be appropriately reinterpreted as mutual. Furthermore, for example, "raising the electric potential" and "decreasing the electric potential" can be appropriately interchanged.

[0046] Here, wiring ILA and wiring ILB each function as input terminals of the semiconductor device 100. Also, wiring OLA and wiring OLB each function as output terminals of the semiconductor device 100.

[0047] Furthermore, the current flowing from wiring VLD to wiring ILA via transistors M6a and M5a is defined as the input current IinA. Also, the current flowing from wiring VLD to wiring ILB via transistors M6d and M5d is defined as the input current IinB.

[0048] Furthermore, each of the VLS, VLD, and VLC wires functions as a power line. For example, the VLS wire is given a potential L (sometimes simply written as "L"). The VLD wire is given a potential H (sometimes simply written as "H") which is greater than or equal to potential L. The VLC wire is given a potential greater than or equal to potential L and less than potential H (for example, potential L). In this case, the difference between potential L and potential H is assumed to be greater than the threshold voltage of the transistor. Note that at least one of the VLS, VLD, and VLC wires may also function as a signal line.

[0049] Furthermore, both wiring VLP1 and wiring VLP2 function as signal lines. For example, wiring VLP1 is supplied with a signal that is either at a potential L or at a potential greater than L (e.g., at a potential H). Wiring VLP2 is supplied with a signal that is either at a potential H or at a potential less than H (e.g., at a potential L).

[0050] Therefore, it can be said that the semiconductor device 100 has an inverter loop (corresponding to the current comparison unit 101) composed of an inverter 101A made up of transistors M1a and M2a, and an inverter 101B made up of transistors M1b and M2b.

[0051] Furthermore, the semiconductor device 100 can also be said to have a current mirror (corresponding to the current mirror section 102A) composed of transistors M6a and M6b. It can also be said that transistors M5a and M5b, respectively, that constitute the current mirror section 102A are cascode-connected (corresponding to the cascode connection section 103A). In the current mirror section 102A, the input current IinA is copied. This allows a current (let's call it current I1A) with the same value as the input current IinA to be supplied from the wiring VLD to node ND2A via transistor M6b, node ND1A, and transistor M5b. Node ND1A can also be said to be the node between the current mirror section 102A and the cascode connection section 103A in the current path through which current I1A flows.

[0052] Furthermore, the semiconductor device 100 can also be said to have a current mirror (corresponding to the current mirror section 102B) composed of transistors M6c and M6d. It can also be said that transistors M5c and M5d are cascode-connected (corresponding to the cascode connection section 103B) to each of the transistors M6c and M6d that constitute the current mirror section 102B. In the current mirror section 102B, the input current IinB is copied. This allows a current (denoted as current I1B) with the same value as the input current IinB to be supplied from the wiring VLD to node ND2B via transistor M6c, node ND1B, and transistor M5c. Node ND1B can also be said to be the node between the current mirror section 102B and the cascode connection section 103B in the current path through which current I1B flows.

[0053] Furthermore, the semiconductor device 100 can also be said to have a voltage comparison unit 104 composed of transistors M4a, M4b, and M4c. In the voltage comparison unit 104, based on the potential of node ND1A and the potential of node ND1B, a current (denoted as current I2A) is generated to be supplied from the wiring VLD to node ND2A via transistors M4c, node ND3, and transistor M4a, and a current (denoted as current I2B) is generated to be supplied from the wiring VLD to node ND2B via transistors M4c, node ND3, and transistor M4b. For example, transistor M4a generates the current supplied to node ND2A based on the potential of node ND1B. Also, for example, transistor M4b generates the current supplied to node ND2B based on the potential of node ND1A. For this reason, transistors M4a and M4b are sometimes referred to as current generating transistors.

[0054] In this case, the voltage comparison unit 104 can, for example, make the current I2A larger than the current I2B if the potential of node ND1A is greater than the potential of node ND1B. Also, for example, if the potential of node ND1A is less than the potential of node ND1B, it can make the current I2A smaller than the current I2B.

[0055] Furthermore, the voltage comparison unit 104 can control whether or not to generate currents I2A and I2B based on the potential applied to the gate of transistor M4c (corresponding to the signal applied to wiring VLP2).

[0056] Furthermore, the semiconductor device 100 can also be said to have a reset unit 105 composed of transistors M3a, M3b, M3c, and M3d. The reset unit 105 can control whether or not to apply the potential of wiring VLS (for example, potential L) to wiring OLA, wiring OLB, node ND2A, and node ND2B, respectively, by applying the potential applied to the gates of transistors M3a, M3b, M3c, and M3d (corresponding to the signal applied to wiring VLP1).

[0057] In semiconductor device 100, currents I1A and I2A (corresponding to the sum of currents I1A and I2A (current I1A + current I2A)) are input to one of the two power supply terminals of inverter 101A (here corresponding to the other source or drain of transistor M1a). Also, currents I1B and I2B (corresponding to the sum of currents I1B and I2B (current I1B + current I2B)) are input to one of the two power supply terminals of inverter 101B (here corresponding to the other source or drain of transistor M1b).

[0058] As a result, the semiconductor device 100 compares the two input currents (input current IinA and input current IinB) input to each of its two input terminals (corresponding to wiring ILA and wiring ILB), and based on their relative magnitudes, a potential L or potential H is output from each of the two output terminals (corresponding to wiring OLA and wiring OLB) of the semiconductor device 100. At this time, the semiconductor device 100 compares the two input currents at any given timing based on the signals applied to wiring VLP1 and wiring VLP2, respectively.

[0059] For example, if the input current IinA is greater than the input current IinB, the two input currents are compared at any given time, causing the potential of wiring OLA to become potential H and the potential of wiring OLB to become potential L. Also, for example, if the input current IinA is less than the input current IinB, the two input currents are compared at any given time, causing the potential of wiring OLA to become potential L and the potential of wiring OLB to become potential H. Therefore, the semiconductor device 100 functions as a current-input type comparator.

[0060] [Operation Example] Next, an operation example of the semiconductor device 100 will be described.

[0061] Figure 2 is a timing chart illustrating an example of the operation of the semiconductor device 100. Figures 3 to 9 are circuit diagrams illustrating an example of the operation of the semiconductor device 100.

[0062] In the semiconductor device 100, a signal that is either potential L or potential H is applied to each of the wirings VLP1 and VLP2. In addition, potential L is applied to wiring VLS, potential H is applied to wiring VLD, and potential L is applied to wiring VLC.

[0063] In the description of operation, rise and fall times may occur when the potential changes, for example, due to loads such as wiring (parasitic capacitance and resistance). Also, even if two different operations are shown to occur at the same time, this does not necessarily mean that they are strictly at the same time. For example, even if there is a slight time difference due to signal delay in the wiring, they may still be considered to occur at the same time.

[0064] Furthermore, in timing charts, even if each period is depicted as having the same length on the diagram for the sake of clarity, the actual duration of each period may differ.

[0065] The timing chart shown in Figure 2 illustrates the potential applied to each wire during each period of operation. It also shows the change in potential at each node.

[0066] Furthermore, Figures 3 through 9 show the state of the circuit at each point in time during operation (potential of each wire and node, state of each transistor, current flowing through each wire and node, etc.). In these cases, a symbol indicating potential, such as "H" or "L" (also called a potential symbol), may be written adjacent to each wire and node, enclosed in a line. In addition, an "×" symbol may be superimposed on an off-state transistor. In addition, the direction of current flow (which can also be said to be the direction of positive charge movement) or the way potential is supplied may be indicated along each wire and node with a dashed arrow. In this case, the magnitude of the current may be indicated by the thickness of the dashed line.

[0067] Furthermore, in transistor M4a, the potential difference between the gate (corresponding to node ND1B) and the other source or drain (corresponding to node ND3) is sometimes referred to as the gate voltage of transistor M4a. In transistor M4b, the potential difference between the gate (corresponding to node ND1A) and the other source or drain (corresponding to node ND3) is sometimes referred to as the gate voltage of transistor M4b.

[0068] Immediately before period T11, the value of input current IinA is assumed to be greater than the value of input current IinB. Also, the potential of wiring OLA is assumed to be "L" and the potential of wiring OLB is assumed to be "H". Furthermore, "L" is applied to wiring VLP1 and "H" is applied to wiring VLP2. Therefore, transistors M3a, M3b, M3c, M3d, and M4c are all in the off state. At this time, the potentials of nodes ND1A and ND1B are both "H". Therefore, transistors M4a and M4b are both in the off state. The circuit configuration at this time is shown in Figure 3. In the following explanation, unless otherwise specified, the state immediately preceding the current state is assumed to be maintained.

[0069] During period T11, a "H" state is applied to wiring VLP1. As a result, transistors M3a, M3b, M3c, and M3d each turn on. This causes a current I1A to flow from wiring VLD to wiring VLS via transistors M6b, M5b, and M3a. The value of current I1A is equal to the value of the input current IinA due to the current mirror section 102A formed by transistors M6a and M6b. In addition, a current I1B flows from wiring VLD to wiring VLS via transistors M6c, M5c, and M3d. The value of current I1B is equal to the value of the input current IinB due to the current mirror section 102B formed by transistors M6c and M6d. Furthermore, since the potential of wiring VLS is supplied to wiring OLA via transistor M3b, the potential of wiring OLA remains "L". Furthermore, since the potential of wiring VLS is supplied to wiring OLB via transistor M3c, the potential of wiring OLB becomes "L". At this time, the potential of node ND2A decreases, so transistor M1a turns off. Also, because the potential of node ND1A decreases, transistor M4a turns on. Also, because the potential of node ND2B decreases, transistor M1b turns off. Also, because the potential of node ND1B decreases, transistor M4b turns on. The circuit configuration at this time is shown in Figure 4.

[0070] Here, the on-resistances of transistors M3a and M5b cause the potential of node ND1A to be greater than "L". Also, the on-resistances of transistors M3d and M5c cause the potential of node ND1B to be greater than "L". At this time, since "value of input current IinA > value of input current IinB", "value of current I1A > value of current I1B". Therefore, "potential of node ND1A > potential of node ND1B".

[0071] During period T12, a "L" signal is applied to wiring VLP1. As a result, transistors M3a, M3b, M3c, and M3d each turn off. At the same time, a "H" signal is applied to wiring VLP2. As a result, transistor M4c turns on. Consequently, current I1A is supplied from wiring VLD to node ND2A via transistors M6b and M5b, and current I2A is supplied from wiring VLD to node ND2A via transistors M4c and M4a. As a result, the potential of node ND2A rises, and transistor M1a turns on. Therefore, "current I1A + current I2A" is supplied to wiring OLA via transistor M1a. Furthermore, current I1B is supplied from wiring VLD to node ND2B via transistors M6c and M5c, and current I2B is supplied from wiring VLD to node ND2B via transistors M4c and M4b. As a result, the potential of node ND2B rises, and transistor M1b turns on. Therefore, "current I1B + current I2B" is supplied to wiring OLB via transistor M1b. Figure 5 shows the circuit configuration at this time.

[0072] Here, since "potential of node ND1A > potential of node ND1B", "gate voltage of transistor M4a > gate voltage of transistor M4b". Therefore, "value of current I2A > value of current I2B". Thus, "value of current I1A + value of current I2A > value of current I1B + value of current I2B". As a result, the rate at which the potential of wiring OLA rises due to "current I1A + current I2A" is greater than the rate at which the potential of wiring OLB rises due to "current I1B + current I2B". Therefore, the current comparison unit 101, which is composed of inverter 101A of transistors M1a and M2a and inverter 101B of transistors M1b and M2b, causes the potential of wiring OLA to become "H" and the potential of wiring OLB to become "L". After that, "H" is applied to wiring VLP2. Then, transistor M4c turns off. The state of the circuit at this time is shown in Figure 6.

[0073] Assume that between period T12 and period T13, the value of the input current IinA becomes smaller than the value of the input current IinB.

[0074] Period T13 corresponds to the case in period T11 where "the value of input current IinA < the value of input current IinB". Therefore, a detailed explanation is omitted here. In period T13, the main difference from period T11 is that "the value of input current IinA < the value of input current IinB", so "the value of current I1A < the value of current I1B". Therefore, "the potential of node ND1A < the potential of node ND1B". Figure 7 shows the circuit corresponding to the case in Figure 3 where "the value of input current IinA < the value of input current IinB".

[0075] Period T14 corresponds to the case in period T12 where "the value of input current IinA < the value of input current IinB". Therefore, a detailed explanation is omitted here. In period T14, the main difference from period T12 is that "the potential of node ND1A < the potential of node ND1B", so "the gate voltage of transistor M4a < the gate voltage of transistor M4b". Therefore, "the value of current I2A < the value of current I2B". Thus, "the value of current I1A + the value of current I2A < the value of current I1B + the value of current I2B". As a result, the rate at which the potential of wiring OLA rises due to "current I1A + current I2A" is smaller than the rate at which the potential of wiring OLB rises due to "current I1B + current I2B". Therefore, the current comparison unit 101, which is composed of inverter 101A made up of transistors M1a and M2a, and inverter 101B made up of transistors M1b and M2b, causes the potential of wiring OLA to become "L" and the potential of wiring OLB to become "H". Figures 8 and 9 show the circuit configuration corresponding to the case where "value of input current IinA < value of input current IinB" in Figures 4 and 5, respectively.

[0076] By operating the semiconductor device 100 as described above, the semiconductor device 100 can be made to function as a current-input type comparator.

[0077] Here, since the semiconductor device 100 has a voltage comparison unit 104, in each of the periods T12 and T14, the current difference between the current supplied to wiring OLA (current I1A + current I2A) and the current supplied to wiring OLB (current I1B + current I2B) can be made larger with respect to the current difference between the two input currents (input current IinA and input current IinB) input to the semiconductor device 100, compared to the case without the voltage comparison unit 104. Therefore, by having the voltage comparison unit 104, the semiconductor device 100 can compare a smaller current difference compared to the case without the voltage comparison unit 104. Thus, the accuracy when the semiconductor device 100 functions as a comparator can be improved. In addition, since the current supplied to wiring OLA and wiring OLB can be increased, the operating speed when the semiconductor device 100 functions as a comparator can be improved.

[0078] As a result, for example, by using the semiconductor device 100 in a successive approximation type analog-to-digital conversion circuit with current input, the accuracy of the analog-to-digital conversion circuit can be improved. Furthermore, the operating speed of the analog-to-digital conversion circuit can be improved.

[0079] [Matching] Here, in order to improve the accuracy when the semiconductor device 100 functions as a comparator, it is preferable that the electrical characteristics of the symmetrical transistors are the same (also known as being matched).

[0080] For example, in the semiconductor device 100, transistors M1a and M1b can be said to be symmetrical. Therefore, it is preferable that the electrical characteristics of transistors M1a and M1b are the same. Thus, it is preferable that the channel lengths of transistors M1a and M1b be the same. It is also preferable that the channel widths of transistors M1a and M1b be the same.

[0081] Furthermore, transistors M2a and M2b can be said to be symmetrical. Therefore, it is preferable that the electrical characteristics of transistors M2a and M2b are the same. Thus, it is preferable that the channel lengths of transistors M2a and M2b be the same. It is also preferable that the channel widths of transistors M2a and M2b be the same.

[0082] Furthermore, transistors M3a and M3d can be said to be symmetrical. Therefore, it is preferable that the electrical characteristics of transistors M3a and M3b are the same. Thus, it is preferable that the channel lengths of transistors M3a and M3d be the same. It is also preferable that the channel widths of transistors M3a and M3d be the same.

[0083] Furthermore, transistors M3b and M3c can be said to be symmetrical. Therefore, it is preferable that the electrical characteristics of transistors M3b and M3c are the same. Thus, it is preferable that the channel lengths of transistors M3b and M3c be the same. It is also preferable that the channel widths of transistors M3b and M3c be the same.

[0084] Furthermore, transistors M4a and M4b can be said to be symmetrical. Therefore, it is preferable that the electrical characteristics of transistors M4a and M4b are the same. Thus, it is preferable that the channel lengths of transistors M4a and M4b be the same. It is also preferable that the channel widths of transistors M4a and M4b be the same.

[0085] Furthermore, transistors M5a and M5d can be said to be symmetrical. Therefore, it is preferable that the electrical characteristics of transistors M5a and M5d are the same. Thus, it is preferable that the channel lengths of transistors M5a and M5d be the same. It is also preferable that the channel widths of transistors M5a and M5d be the same.

[0086] Furthermore, transistors M5b and M5c can be said to be symmetrical. Therefore, it is preferable that the electrical characteristics of transistors M5b and M5c are the same. Thus, it is preferable that the channel lengths of transistors M5b and M5c be the same. It is also preferable that the channel widths of transistors M5b and M5c be the same.

[0087] Furthermore, transistors M6a and M6d can be said to be symmetrical. Therefore, it is preferable that the electrical characteristics of transistors M6a and M6d are the same. Thus, it is preferable that the channel lengths of transistors M6a and M6d be the same. It is also preferable that the channel widths of transistors M6a and M6d be the same.

[0088] Furthermore, transistors M6b and M6c can be said to be symmetrical. Therefore, it is preferable that the electrical characteristics of transistors M6b and M6c are the same. Thus, it is preferable that the channel lengths of transistors M6b and M6c be the same. It is also preferable that the channel widths of transistors M6b and M6c be the same.

[0089] Furthermore, in order to improve the accuracy when the semiconductor device 100 functions as a comparator, it is preferable that the inverters 101A and 101B that constitute the current comparison unit 101 have the same input / output characteristics. For example, it is preferable that there is little variation in the electrical characteristics of transistors M1a and M1b. It is also preferable that there is little variation in the electrical characteristics of transistors M2a and M2b. To reduce the variation in the electrical characteristics of transistors M1a and M1b, for example, the channel lengths of transistors M1a and M1b may be increased. Also, to reduce the variation in the electrical characteristics of transistors M2a and M2b, for example, the channel lengths of transistors M2a and M2b may be increased.

[0090] Therefore, for example, the channel lengths of transistors M1a, M1b, M2a, and M2b may be made larger than the channel length of at least one of the transistors M3a, M3b, M3c, M3d, M4a, M4b, M4c, M5a, M5b, M5c, M5d, M6a, M6b, M6c, and M6d.

[0091] Furthermore, in order to improve the accuracy when the semiconductor device 100 functions as a comparator, it is preferable to improve the current copying accuracy in the current mirror section 102A. It is also preferable to improve the current copying accuracy in the current mirror section 102B. For this reason, it is preferable that each of the transistors M6a and M6b constituting the current mirror section 102A has high saturation (the change in drain current with respect to drain voltage is small in the saturation region of the transistor). It is also preferable that each of the transistors M6c and M6d constituting the current mirror section 102B has high saturation. To increase the saturation of each of the transistors M6a and M6b, for example, the channel lengths of each of the transistors M6a and M6b may be increased. To increase the saturation of each of the transistors M6c and M6d, for example, the channel lengths of each of the transistors M6c and M6d may be increased.

[0092] Therefore, for example, the channel lengths of transistors M6a, M6b, M6c, and M6d may be made larger than the channel length of at least one of the transistors M1a, M1b, M2a, M2b, M3a, M3b, M3c, M3d, M4a, M4b, M4c, M5a, M5b, M5c, and M5d.

[0093] Furthermore, in order to improve the accuracy when the semiconductor device 100 functions as a comparator, it is preferable that the variation in the electrical characteristics of transistors M4a and M4b that constitute the voltage comparison unit 104 is small. To reduce the variation in the electrical characteristics of transistors M4a and M4b, for example, the channel lengths of transistors M4a and M4b may be increased.

[0094] Therefore, for example, the channel lengths of transistors M4a and M4b may be made larger than the channel length of at least one of the transistors M1a, M1b, M2a, M2b, M3a, M3b, M3c, M3d, M4c, M5a, M5b, M5c, M5d, M6a, M6b, M6c, and M6d.

[0095] Furthermore, in the layout of the semiconductor device 100, it is preferable to arrange symmetrical transistors in a common centroid configuration (also known as the arrangement of symmetrical transistors having a common centroid) in order to improve the accuracy when they function as a comparator. Therefore, for example, it is preferable that the arrangement of symmetrical transistors be line-symmetric or point-symmetric.

[0096] Figures 10A and 10B are schematic diagrams illustrating the arrangement of the transistors (transistors M4a, M4b, and M4c) that constitute the voltage comparison unit 104. Figures 10A and 10B each illustrate the active region Act (here, the region where the channel formation region, source region, and drain region of each transistor are formed), the gate electrode Gate, and the wiring connecting them to each other. The region of the active region Act that overlaps with the gate electrode Gate functions as the channel formation region of the transistor, while the remaining region functions as the source region or drain region of the transistor.

[0097] Figures 10A and 10B each illustrate twelve unit transistors Tr arranged in a 2x6 matrix. In the diagrams, each of the twelve regions enclosed by the dashed lines corresponds to a unit transistor Tr. Of the six unit transistors Tr arranged in the first row, two unit transistors Tr function as transistors M4a. Of the remaining four unit transistors Tr, two unit transistors Tr function as transistors M4b. The remaining two unit transistors Tr function as dummy transistors Mdum. Similarly, of the six unit transistors Tr arranged in the second row, four unit transistors Tr function as transistors M4c. The remaining two transistors function as dummy transistors Mdum.

[0098] In this case, the channel width of one unit transistor Tr is half the channel width of transistor M4a. Also, the channel width of one unit transistor Tr is half the channel width of transistor M4b. Furthermore, the channel width of one unit transistor Tr is one-quarter the channel width of transistor M4c.

[0099] For the sake of clarity, the directions up ("U"), down ("D"), left ("L"), and right ("R") are defined in Figures 10A and 10B, respectively.

[0100] Here, in the active region Act, the shortest distance between the source region and the drain region in the channel formation region can be defined as the channel length of the unit transistor Tr. Also, in the active region Act, the length of the portion where the source region and the drain region face each other in the channel formation region can be defined as the channel width of the unit transistor Tr. For example, in the region where the active region Act and the gate electrode Gate overlap, the width of the gate electrode Gate (corresponding to the vertical width in Figure 10A and the horizontal width in Figure 10B) can be defined as the channel length of the unit transistor Tr. Also, for example, in the region where the active region Act and the gate electrode Gate overlap, the width of the active region Act (corresponding to the horizontal width in Figure 10A and the vertical width in Figure 10B) can be defined as the channel width of the unit transistor Tr.

[0101] As shown in Figures 10A and 10B, two unit transistors Tr, which function as transistor M4a, are arranged side by side. For example, in the diagram, two unit transistors Tr, which function as transistor M4a, are arranged side by side. Also, two unit transistors Tr, which function as transistor M4b, are arranged outside of transistor M4a. For example, in the diagram, one of the two transistors that function as transistor M4b is placed to the left of transistor M4a, and the other of the two transistors that function as transistor M4b is placed to the right of transistor M4a. This makes it possible to arrange the multiple unit transistors Tr that constitute transistor M4a and transistor M4b in a common centroid arrangement (it can also be said that the center of gravity in the arrangement of transistor M4a and the center of gravity in the arrangement of transistor M4b are made common). In the diagram, the position of the center of gravity common to transistor M4a and transistor M4b is indicated by the symbol "×".

[0102] In this case, variations in electrical characteristics may occur between multiple transistors due to manufacturing processes and other factors. Therefore, by arranging the multiple unit transistors Tr that make up transistors M4a and M4b in a common centroid configuration, the effects of variations in electrical characteristics can be suppressed.

[0103] Although not shown in the diagram, for example, two unit transistors Tr, which function as transistor M4b, may be placed side by side in the center, and two unit transistors Tr, which function as transistor M4a, may be placed outside of transistor M4b.

[0104] Furthermore, as shown in Figures 10A and 10B, four unit transistors Tr, which function as transistor M4c, are arranged side by side at the same intervals as transistors M4a and M4b. For example, in the diagram, they are arranged side by side above transistors M4a and M4b. This allows for efficient routing of the wiring connecting transistors M4a, M4b, and M4c to each other.

[0105] In Figures 10A and 10B, a unit transistor Tr, which functions as a dummy transistor Mdum, is provided outside transistors M4a and M4b. For example, in the diagram, a unit transistor Tr, which functions as a dummy transistor Mdum, is provided to the left and right of transistors M4a and M4b, respectively. Also, a unit transistor Tr, which functions as a dummy transistor Mdum, is provided outside transistor M4c. For example, in the diagram, a unit transistor Tr, which functions as a dummy transistor Mdum, is provided to the left and right of transistor M4c, respectively. In this case, at least two of the gate, source, and drain of each unit transistor Tr that functions as a dummy transistor Mdum are connected to the VLD wiring. This allows each unit transistor Tr that functions as a dummy transistor Mdum to be turned off during the operation of the semiconductor device 100.

[0106] In this configuration, where multiple transistors are arranged side-by-side, the outermost transistor tends to exhibit greater variations in electrical characteristics compared to the other transistors, often due to manufacturing processes. Therefore, by placing a dummy transistor Mdum on the outermost side, the variations in the electrical characteristics of the other transistors can be reduced.

[0107] Furthermore, in Figure 10A, the multiple transistors arranged side by side may be positioned so that the direction of the drain current flowing through each transistor is the same.

[0108] In this case, transistors with different drain current directions may exhibit variations in electrical characteristics due to manufacturing processes and other factors. Therefore, by arranging the transistors so that the drain current flows in the same direction, the effects of variations in electrical characteristics can be suppressed.

[0109] Furthermore, in Figure 10B, multiple transistors arranged side by side may be positioned to share a single active region. This allows each transistor to share both its source and drain regions, thereby reducing the overall layout area.

[0110] In Figure 10B, the current flows in opposite directions in the two transistors M4a and in opposite directions in the two transistors M4b. This suppresses the influence of variations in electrical characteristics due to the direction of drain current flow in each transistor.

[0111] Furthermore, in Figures 10A and 10B, a common centroid configuration is achieved by arranging multiple unit transistors Tr that constitute transistors M4a and M4b symmetrically along a line. However, a common centroid configuration may also be achieved by arranging them symmetrically along a point.

[0112] For example, although not shown in the diagram, in a matrix of four unit transistors Tr arranged in two rows and two columns, the two unit transistors Tr located in the upper right and lower left may be designated as either transistor M4a or transistor M4b, and the two unit transistors Tr located in the upper left and lower right may be designated as the other of transistor M4a or transistor M4b.

[0113] Here, we have shown an example where the channel width of the unit transistor Tr is set to half the channel width of transistors M4a and M4b, and four unit transistors Tr are arranged in a common centroid configuration, but this is not the only example. Although not shown in the diagram, for example, the channel width of the unit transistor Tr may be set to 1 / k of the channel width of transistors M4a and M4b, and 2 × k unit transistors Tr may be arranged in a common centroid configuration based on the above technical concept. k is an integer of 3 or more, and it is preferable that it is an even number in order to efficiently arrange the common centroid configuration. In this case, for example, of the 2 × k + 2 unit transistors Tr, k unit transistors Tr function as transistors M4a. Of the remaining k + 2 unit transistors Tr, k unit transistors Tr function as transistors M4b. The remaining 2 unit transistors Tr function as dummy transistors Mdum.

[0114] Furthermore, at least part of the above-described explanation regarding the arrangement of transistors M4a and M4b (common centroid arrangement, arrangement with a dummy transistor Mdum, arrangement where the direction of drain current flow is the same, arrangement where one active region is shared) may be applied to, for example, transistors M1a and M1b, transistors M2a and M2b, transistors M3a and M3b, transistors M3c and M3d, transistors M5a and M5b, transistors M5c and M5d, and transistors M6a and M6b, transistors M6c and M6d.

[0115] In particular, it is preferable to apply at least part of the above description to transistors M6a and M6b that constitute the current mirror section 102A. It is also preferable to apply at least part of the above description to transistors M5a and M5b that constitute the cascode connection section 103A that is cascode-connected to the current mirror section 102A. It is also preferable to apply at least part of the above description to transistors M6d and M6c that constitute the current mirror section 102B. It is also preferable to apply at least part of the above description to transistors M5d and M5c that constitute the cascode connection section 103B that is cascode-connected to the current mirror section 102B.

[0116] [Transistor] In one aspect of the present invention, as a transistor constituting the semiconductor device 100, for example, a transistor containing a single-crystal semiconductor, a polycrystalline semiconductor, a microcrystalline semiconductor, or an amorphous semiconductor in the channel formation region can be used. Furthermore, the semiconductor is not limited to a single-element semiconductor whose main component is a single element (such as silicon or germanium), but can also be a compound semiconductor (such as silicon germanium or gallium arsenide), or an oxide semiconductor, for example.

[0117] Furthermore, various types of transistors can be used as the transistors constituting the semiconductor device 100. For example, MOS field-effect transistors, junction field-effect transistors, or bipolar transistors can be used.

[0118] Furthermore, transistors of various structures can be used as transistors constituting the semiconductor device 100. For example, various transistor structures can be used, such as top-gate type (planar type, staggered type, etc.), bottom-gate type (inverse planar type, inverse staggered type, etc.), dual-gate type (a structure in which gates are arranged on both sides (e.g., top and bottom) of the channel formation region), FIN type, TRI-GATE type, or GAA type (gate all-around type). In addition, for example, vertical transistors (transistors in which the channel length direction has a component in the vertical direction (also called the height direction or the direction perpendicular to the surface to which it is formed)) can be used.

[0119] Furthermore, as the transistor constituting the semiconductor device 100, a transistor containing silicon in the channel formation region (Si transistor) may be used, a transistor containing oxide semiconductor in the channel formation region (OS transistor) may be used, or both Si transistors and OS transistors may be used.

[0120] In the semiconductor device 100, it is preferable that the current consumption in the steady state (corresponding to the state immediately before periods T11 and T13) is small. In the steady state, for example, transistors M2a, M2b, M3a, M3b, M3c, and M3d are all in the off state. Therefore, by reducing the off current of each of the transistors M2a, M2b, M3a, M3b, M3c, and M3d, the current consumption can be reduced.

[0121] Therefore, transistors with low off-currents may be used for each of the transistors M2a, M2b, M3a, M3b, M3c, and M3d. For example, OS transistors may be used as transistors with low off-currents. This makes it possible to reduce the power consumption of the semiconductor device 100.

[0122] Various oxide semiconductors can be used for the OS transistor. For example, an oxide semiconductor that exhibits a high on-current characteristic can be used. This makes it possible to reduce the power consumption of the semiconductor device 100 while also improving its operating speed. Indium oxide is an example of an oxide semiconductor that exhibits a high on-current characteristic.

[0123] Furthermore, OS transistors can be freely arranged on a silicon substrate, for example, on which Si transistors are mounted, making integration easy. In addition, OS transistors can be manufactured at low cost because they can be fabricated using the same manufacturing equipment as Si transistors.

[0124] Therefore, in the semiconductor device 100, for example, OS transistors may be used for transistors M2a, M2b, M3a, M3b, M3c, and M3d, and Si transistors may be used for the other transistors. This allows, for example, at least some of transistors M2a, M2b, M3a, M3b, M3c, and M3d, and at least some of the other transistors, to be arranged on top of each other. This makes it possible to reduce the layout area of ​​the semiconductor device 100.

[0125] [Modification 1] Figure 11 is a circuit diagram illustrating a modified version of the semiconductor device 100 shown in Figure 1. The semiconductor device 100 shown in Figure 11 differs from the semiconductor device 100 shown in Figure 1 in that the other source or drain of transistor M1a and one source or drain of transistor M4a, one source or drain of transistor M3a, and one source or drain of transistor M5b are not connected to each other, and the other source or drain of transistor M1b and one source or drain of transistor M4b, one source or drain of transistor M3d, and one source or drain of transistor M5c are not connected to each other.

[0126] Specifically, the other source or drain of transistor M1a is connected to the other source or drain of transistor M4a. One source or drain of transistor M3a is connected to the other source or drain of transistor M5b. The other source or drain of transistor M1b is connected to the other source or drain of transistor M4b. One source or drain of transistor M3d is connected to the other source or drain of transistor M5c.

[0127] In the semiconductor device 100 shown in Figure 11, only the currents I2A and I2B generated by the voltage comparison unit 104 are input to the current comparison unit 101.

[0128] In the semiconductor device 100 shown in Figure 11, the wiring connecting the other source or drain of transistor M1a and one source or drain of transistor M4a to one source or drain of transistor M3a and one source or drain of transistor M5b can be reduced. Furthermore, the wiring connecting the other source or drain of transistor M1b and one source or drain of transistor M4b to one source or drain of transistor M3d and one source or drain of transistor M5c can also be reduced. Therefore, the transistors in the semiconductor device 100 can be arranged efficiently, potentially reducing the layout area.

[0129] [Modification 2] Figure 12 is a circuit diagram illustrating a modified version of the semiconductor device 100 shown in Figure 1. The semiconductor device 100 shown in Figure 12 differs from the semiconductor device 100 shown in Figure 1 in that transistors M4a and M4b are both n-channel transistors, and in the connections between transistors M4a and M4b. Here, the gate of transistor M4a is connected to the other source or drain of transistor M5b and to one source or drain of transistor M6b. The gate of transistor M4b is connected to the other source or drain of transistor M5c and to one source or drain of transistor M6c.

[0130] In the semiconductor device 100 shown in Figure 12, for example, OS transistors can be used for each of transistors M4a and M4b. This allows, for example, at least a portion of transistors M4a and M4b and at least a portion of the other transistors to be arranged on top of each other. This reduces the layout area of ​​the semiconductor device 100.

[0131] Furthermore, one aspect of the present invention includes a configuration in which at least one of the gate, source, and drain of one or more transistors is either not connected to anything or connected to any wiring. Also, one aspect of the present invention includes a configuration in which one or more wirings are either not input to anything or are input to any signal or potential.

[0132] Furthermore, the modified examples described above, whether illustrated or not illustrated, can be applied to the semiconductor device 100 shown in Figure 1. Also, two or more of the modified examples described above, whether illustrated or not illustrated, can be applied to the semiconductor device 100 shown in Figure 1. Moreover, the semiconductor device 100 described above, whether illustrated or not illustrated, can solve the problem of providing at least a novel semiconductor device simply by its circuit configuration.

[0133] Furthermore, one aspect of the present invention is all or part of the circuit configuration described herein. Therefore, one aspect of the present invention does not have to include all or part of the operations described herein. Moreover, one aspect of the present invention is not limited to the operations described herein, and it is possible to appropriately change the potential applied to each wire, the timing of the change in that potential, etc.

[0134] Furthermore, the contents of this embodiment can be combined as appropriate. Also, the contents of this embodiment can be combined as appropriate with the contents of other embodiments, etc.

[0135] (Embodiment 2) This embodiment describes a transistor according to one aspect of the present invention. At least a part of the transistor shown in this embodiment can be applied to the semiconductor device shown in Embodiment 1 described above.

[0136] <Example of semiconductor device configuration> A semiconductor device according to one aspect of the present invention can use transistors of various structures. Furthermore, a configuration in which transistors of various structures are stacked can be used.

[0137] Figures 13A and 13B are cross-sectional views of a semiconductor device 150 having transistors 310 and 200. Figure 13A shows cross-sectional views of transistors 310 and 200 in the channel length direction. Figure 13B shows cross-sectional views of transistors 310 and 200 in the channel width direction.

[0138] As shown in Figures 13A and 13B, transistor 200 is located above transistor 310.

[0139] As shown in Figure 13A, one of the sources or drains of transistor 310 (corresponding to the low-resistance region 314a in this case) is connected to the conductive layer 330a via the conductive layer 328a, etc. The other source or drain of transistor 310 (corresponding to the low-resistance region 314b in this case) is connected to the conductive layer 330b via the conductive layer 328b, etc. Also, one of the sources or drains of transistor 200 (corresponding to the conductive layer 242a in this case) is connected to the conductive layer 248a via the conductive layer 243a, etc. Also, the other source or drain of transistor 200 (corresponding to the conductive layer 242b in this case) is connected to the conductive layer 248b via the conductive layer 243b, etc. Furthermore, the conductive layer 330d is connected to the conductive layer 248d via the conductive layer 356d, conductive layer 218d, and conductive layer 246d, etc. Furthermore, as shown in Figure 13B, the gate electrode of transistor 310 (corresponding to the conductive layer 316 in this case) is connected to the conductive layer 330c via the conductive layer 328c, etc. Also, the gate electrode of transistor 200 (corresponding to the conductive layer 260 in this case) is connected to the conductive layer 248c via the conductive layer 246c, etc.

[0140] The conductive layer described above may be formed of a conductor that functions as a plug or wiring.

[0141] In this specification, a conductor having the function of a plug or wiring may be given the same reference numeral for multiple components. Furthermore, the wiring and the plug may be a single integrated unit. Therefore, a portion of the conductor may function as wiring, and another portion may function as a plug.

[0142] Each plug or wire can be made of a conductive material, such as a metal, alloy, nitride, or oxide material, in a single layer or in multiple layers.

[0143] In particular, it is preferable to use a high-melting-point material that provides both heat resistance and conductivity for each plug or wiring. For example, tungsten or molybdenum can be used as such materials. It is also preferable to use a low-resistance conductive material that can reduce wiring resistance for each plug or wiring. For example, aluminum or copper can be used as such materials.

[0144] [Transistor 310] Let's explain transistor 310.

[0145] As shown in Figures 13A and 13B, the transistor 310 is provided on a substrate 311 and includes a conductive layer 316 that functions as a gate electrode, an insulating layer 315 that functions as a gate insulating film, a semiconductor region 313 that functions as a channel forming region, a low-resistance region 314a that functions as either a source region or a drain region, and a low-resistance region 314b that functions as either a source region or a drain region.

[0146] Figures 13A and 13B also illustrate an element isolation layer 318 embedded in the substrate 311. The element isolation layer 318 is provided between two adjacent transistors 310.

[0147] In this embodiment, the case in which a single-crystal silicon substrate is used as the substrate 311 will be described as an example.

[0148] When a single-crystal silicon substrate is used as the substrate 311, the transistor 310 can be said to be a Si transistor (a transistor containing silicon in the channel formation region).

[0149] The transistor 310 may be either a p-channel or an n-channel type. For example, by connecting the gate of an n-channel transistor 310 to the gate of a p-channel transistor 310, a CMOS circuit (such as a complementary circuit, a CMOS logic gate, or a CMOS logic circuit) can be constructed.

[0150] Furthermore, the transistor 310 can have a so-called Fin-type configuration, as shown in Figure 13B, in which the upper surface and side surface in the channel width direction of a semiconductor region 313, which is part of the substrate 311, are covered by a conductive layer 316 via an insulating layer 315. This increases the effective channel width, thereby improving the on-characteristics of the transistor 310. In addition, the contribution of the electric field of the gate electrode can be increased, thereby improving the off-characteristics of the transistor 310.

[0151] Here, in the substrate 311, the shortest distance between the low-resistance region 314a and the low-resistance region 314b in the semiconductor region 313 can be defined as the channel length of the transistor 310. Alternatively, in the substrate 311, the length of the portion where the low-resistance region 314a and the low-resistance region 314b face each other in the semiconductor region 313 can be defined as the channel width of the transistor 310. For example, in the semiconductor region 313 shown in Figure 13B, the length of the upper surface and the side surface in the channel width direction of the region covered by the conductive layer 316 via the insulating layer 315 may be defined as the channel width of the transistor 310.

[0152] The transistor 310 preferably contains a semiconductor, such as a silicon-based semiconductor, in areas such as the region where the channel of the semiconductor region 313 is formed, the region near thereto, the low-resistance region 314a which is one of the source region or drain region, and the low-resistance region 314b which is the other of the source region or drain region, and preferably contains single-crystal silicon. Alternatively, the transistor 310 may be formed from a material having, for example, germanium, silicon-germanium, gallium arsenide, or gallium aluminum arsenide. Alternatively, the transistor 310 may be configured using silicon in which the effective mass is controlled by applying stress to the crystal lattice and changing the lattice spacing. Alternatively, the transistor 310 may be a high electron mobility transistor (HEMT) using, for example, gallium arsenide and gallium aluminum arsenide.

[0153] The low-resistance region 314a and the low-resistance region 314b include, in addition to the semiconductor material applied to the semiconductor region 313, an element that imparts n-type conductivity, such as arsenic or phosphorus, or an element that imparts p-type conductivity, such as boron.

[0154] For example, in an n-channel transistor 310, the low-resistance region 314a and the low-resistance region 314b may contain, in addition to the semiconductor material applied to the semiconductor region 313, an element that imparts n-type conductivity, such as arsenic or phosphorus. Also, for example, in a p-channel transistor 310, the low-resistance region 314a and the low-resistance region 314b may contain, in addition to the semiconductor material applied to the semiconductor region 313, an element that imparts p-type conductivity, such as boron.

[0155] For example, an insulating material containing silicon can be used as the insulating layer 315. Preferably, for example, silicon oxide, silicon oxide nitride, silicon oxide nitride, or silicon nitride is used as the insulating layer 315.

[0156] As the conductive layer 316, for example, a semiconductor material such as silicon containing an element that imparts n-type conductivity, such as arsenic or phosphorus, or an element that imparts p-type conductivity, such as boron, can be used. Alternatively, conductive materials such as metallic materials, alloy materials, or oxide materials can be used.

[0157] Furthermore, since the work function is determined by the conductive material, the threshold voltage of the transistor can be adjusted by selecting the appropriate conductive material.

[0158] It is preferable to use, for example, titanium nitride or tantalum nitride as the conductive layer 316. Furthermore, in order to achieve both conductivity and embedding properties, it is preferable to laminate and use, for example, a metallic material such as tungsten or aluminum. In particular, in terms of heat resistance, it is preferable to laminate and use, for example, tungsten.

[0159] The transistor 310 is covered by a series of insulating layers: insulating layer 320, insulating layer 322, insulating layer 324, and insulating layer 326.

[0160] For insulating layers 320, 322, 324, and 326, it is preferable to use, for example, silicon oxide, silicon oxide nitride, silicon oxide nitride, silicon nitride, aluminum oxide, aluminum oxide nitride, aluminum oxide nitride, or aluminum nitride. In particular, silicon oxide or silicon oxide nitride is preferred because it is thermally stable.

[0161] In this specification, silicon oxidizride refers to a material in which the oxygen content is greater than the nitrogen content, and silicon nitride refers to a material in which the nitrogen content is greater than the oxygen content. Furthermore, in this specification, aluminum oxidizride refers to a material in which the oxygen content is greater than the nitrogen content, and aluminum nitride refers to a material in which the nitrogen content is greater than the oxygen content.

[0162] The insulating layer 322 may also function as a planarizing film that flattens steps caused by transistors 310 or the like provided below it. For example, the upper surface of the insulating layer 322 may be planarized by a planarizing treatment such as chemical mechanical polishing (CMP) in order to improve its flatness.

[0163] It is preferable to use an insulator as the insulating layer 324 that has barrier properties to prevent the diffusion of impurities such as hydrogen from the substrate 311 or transistor 310 located below the insulating layer 324 to the region located above the insulating layer 324.

[0164] As an insulator having barrier properties against hydrogen, for example, silicon nitride formed by chemical vapor deposition (CVD) can be used. Alternatively, metal oxides such as aluminum oxide, hafnium oxide, or tantalum oxide can be used.

[0165] Here, for example, if the transistor 200, which will be described later, has an oxide semiconductor, the characteristics of the transistor 200 may deteriorate due to the diffusion of hydrogen into the oxide semiconductor. Therefore, it is preferable to use an insulator that suppresses hydrogen diffusion between the region where the transistor 200 is provided and the region where the transistor 310 is provided. Specifically, an insulator that suppresses hydrogen diffusion is an insulator that has a low hydrogen desorption rate.

[0166] The insulating layer 326 functions as an interlayer film. Preferably, the insulating layer 326 has a lower dielectric constant than the insulating layer 324. Using a material with a low dielectric constant as the interlayer film reduces parasitic capacitance between wirings.

[0167] Insulating layers 320 and 322 have conductive layers 328 (such as conductive layers 328a, 328b, and 328c) embedded in them. Insulating layers 324 and 326 have conductive layers 330 (such as conductive layers 330a, 330b, 330c, and 330d) embedded in them.

[0168] Each of the conductive layers, 328 and 330, functions as a plug or wiring.

[0169] A wiring layer may be provided on the insulating layer 326 and the conductive layer 330. For example, in Figures 13A and 13B, insulating layers 350, 352, and 354 are stacked in order. Furthermore, a conductive layer 356 (such as conductive layer 356d) is embedded in insulating layers 350, 352, and 354.

[0170] The conductive layer 356 functions as a plug or wiring. For example, the same material as the conductive layer 328 and conductive layer 330 can be used for the conductive layer 356. In particular, it is preferable to use a conductor that has hydrogen barrier properties.

[0171] Furthermore, the insulating layer 350 can be made of the same material as the insulating layer 324, for example. In particular, it is preferable to use an insulator having barrier properties against hydrogen as the insulating layer 350. Also, the insulating layers 352 and 354 can be made of the same material as the insulating layer 322 and 326, for example.

[0172] Here, a conductor having a hydrogen barrier is formed in the opening of the insulating layer 350 having a hydrogen barrier. With this configuration, transistor 310 and transistor 200 can be separated by the conductor having a hydrogen barrier. Therefore, the diffusion of hydrogen from transistor 310 to transistor 200 can be suppressed.

[0173] As a conductor having hydrogen barrier properties, for example, tantalum nitride may be used. Alternatively, tantalum nitride and highly conductive tungsten may be laminated together. By laminating tantalum nitride and tungsten into the conductor, the conductor can suppress hydrogen diffusion while maintaining its conductivity as a wiring.

[0174] For example, by making the conductive layer 356 a laminate of tantalum nitride and tungsten, the diffusion of hydrogen from the transistor 310 can be suppressed while maintaining conductivity as a wiring. In this case, it is preferable that the tantalum nitride layer of the conductive layer 356, which has barrier properties against hydrogen, is in contact with the insulating layer 350, which also has barrier properties against hydrogen.

[0175] Although this description has focused on a wiring layer including a conductive layer 356, it is not limited to this configuration. A wiring layer including a conductive layer 356 may be omitted, or two or more wiring layers similar to the one including the conductive layer 356 may be used.

[0176] Note that the transistor 310 shown in Figures 13A and 13B is just one example and is not limited to its configuration.

[0177] Insulating layers 212, 214, and 216 are sequentially laminated on insulating layer 354 and conductive layer 356. A transistor 200 is provided on insulating layer 216. Insulating layers 275, 280, 282, 283, and 285 are sequentially laminated over the transistor 200.

[0178] Insulating layers 212, 214, and 216 are embedded with, for example, a conductive layer 218 (such as conductive layer 218d).

[0179] The conductive layer 218 functions as a plug or wiring. For example, the conductive layer 218 can be made of the same material as the conductive layer 328 and conductive layer 330 described above.

[0180] In particular, in the conductive layer 218, the regions in contact with the insulating layers 212, 214, and 216 are preferably made of a conductor that has barrier properties against both oxygen and impurities such as hydrogen and water. With this configuration, transistor 310 and transistor 200 can be separated by a conductor that has barrier properties against both oxygen and impurities such as hydrogen and water, and the diffusion of hydrogen from transistor 310 to transistor 200 can be suppressed.

[0181] An insulating layer 288 is provided on top of the insulating layer 285.

[0182] For example, by using a material with a low dielectric constant as the insulating layer 288, parasitic capacitance between wirings can be reduced. For example, the same material as the insulating layer 212 or insulating layer 216 can be used as the insulating layer 288.

[0183] Insulating layers 275, 280, 282, 283, and 285 have, for example, a conductive layer 246 (such as conductive layer 246c and conductive layer 246d) embedded in them. Insulating layer 288 also has, for example, a conductive layer 248 (such as conductive layer 248a, conductive layer 248b, conductive layer 248c, and conductive layer 248d) embedded in it.

[0184] Each of the conductive layers, 246 and 248, functions as a plug or wiring.

[0185] [Transistor 200] An example of the configuration of transistor 200 will be explained using Figures 14A to 15.

[0186] Figure 14A is a top view of a semiconductor device having a transistor 200. Figure 14B is a cross-sectional view of the area indicated by the dashed line A1-A2 in Figure 14A, and is also a cross-sectional view of the transistor 200 in the channel length direction. Figure 14C is a cross-sectional view of the area indicated by the dashed line A3-A4 in Figure 14A, and is also a cross-sectional view of the transistor 200 in the channel width direction. Figure 14D is a cross-sectional view of the area indicated by the dashed line A5-A6 in Figure 14A. Note that some elements have been omitted from the top view of Figure 14A for clarity. Some elements may also be omitted in subsequent top views.

[0187] The semiconductor device shown in Figures 14A to 14C includes a conductive layer 205, an insulating layer 221 on the conductive layer 205, an insulating layer 222 on the insulating layer 221, an insulating layer 224 on the insulating layer 222, a semiconductor layer 230 on the insulating layer 224, conductive layers 242a and 242b on the semiconductor layer 230, an insulating layer 250 on the semiconductor layer 230, and a conductive layer 260 on the insulating layer 250.

[0188] In transistor 200, the conductive layer 260 functions as the first gate electrode (also called the upper gate electrode or top gate electrode), and the insulating layer 250 functions as the first gate insulating film. The conductive layer 205 functions as the second gate electrode (also called the lower gate electrode or bottom gate electrode), and the insulating layers 224, 222, and 221 each function as the second gate insulating film. The conductive layer 242a functions as one of the source electrode and drain electrode, and the conductive layer 242b functions as the other of the source electrode and drain electrode.

[0189] In transistor 200, the first gate electrode may be simply called the gate electrode, the first gate insulating film may be simply called the gate insulating film, the second gate electrode may be called the back gate electrode, and the second gate insulating film may be called the back gate insulating film.

[0190] In a transistor with a back gate, the transistor's gate and back gate are positioned so as to sandwich the channel formation region of the semiconductor layer. The back gate can function similarly to the gate. When the gate is used to control the on and off states of the transistor, the potential of the back gate can be the same as that of the gate. Alternatively, it can be set to any potential.

[0191] For example, when turning on a transistor, supplying the potential that turns the transistor on to both the gate and the back gate can increase the on-current compared to supplying it to only one. For example, by connecting the gate and the back gate, it is possible to keep the gate and back gate at the same potential at all times. Furthermore, by controlling the potential of the back gate independently of the gate potential, the threshold voltage of the transistor can be adjusted. For example, supplying the potential that turns the transistor on to the back gate can decrease the threshold voltage of the transistor, and supplying the potential that turns the transistor off to the back gate can increase the threshold voltage of the transistor.

[0192] Furthermore, a constant potential, such as ground potential, may be supplied to the back gate. Since the gate and back gate are formed by conductive layers, sandwiching the channel formation region of the semiconductor layer between the gate and back gate makes it difficult for electric fields generated outside the transistor to act on the channel formation region (also known as the "electric field shielding effect"). For this reason, providing a back gate to a transistor stabilizes its operation. In addition, providing a back gate to a transistor reduces the variation in characteristics between multiple transistors. Providing a back gate to a transistor can improve the reliability of the transistor. Therefore, the reliability of the semiconductor device containing the transistor can be improved. Note that the electric field shielding effect can be obtained even if one or both of the gate and back gate are electrically floating (also known as the "floating state"), but the effect can be enhanced by supplying potential to the gate and back gate.

[0193] In addition, the transistor 200 does not necessarily have a conductive layer 205. In this case, the conductive layer 260 can simply be called the gate electrode, and the insulating layer 250 can simply be called the gate insulating film.

[0194] An insulating layer 275 is provided on the conductive layer 242a and the conductive layer 242b, and an insulating layer 280 is provided on the insulating layer 275. Openings 289 are formed in the insulating layer 280 and the insulating layer 275, reaching the insulating layer 222 and the semiconductor layer 230, and the openings 289 overlap the region between the conductive layer 242a and the conductive layer 242b. In a top view, the side surface of the insulating layer 280 at the opening 289 coincides with the side surface of the conductive layer 242a and the side surface of the conductive layer 242b.

[0195] The insulating layer 250 and the conductive layer 260 are arranged inside the opening 289. An insulating layer 282 is provided in contact with the upper surface of the insulating layer 280, the upper end of the insulating layer 250, and the upper surface of the conductive layer 260. An insulating layer 283 is provided on top of the insulating layer 282. An insulating layer 216 is provided below the insulating layer 221, an insulating layer 214 is provided below the insulating layer 216 and the conductive layer 205, and an insulating layer 212 is provided below the insulating layer 214. The insulating layers 212, 214, 216, 280, 282, 283, and 285 function as interlayer films.

[0196] Insulating layers 285, 283, 282, 280, and 275 have openings that reach the conductive layer 242a, and the conductive layer 243a and insulating layer 241a are provided within these openings. The insulating layer 241a is provided in contact with the inner wall of the opening, and the conductive layer 243a is provided inside the insulating layer 241a. In addition, insulating layers 285, 283, 282, 280, and 275 have openings that reach the conductive layer 242b, and the conductive layer 243b and insulating layer 241b are provided within these openings. The insulating layer 241b is provided in contact with the inner wall of the opening, and the conductive layer 243b is provided inside the insulating layer 241b. The conductive layers 243a and 243b function as vias connecting wiring provided on the transistor 200 to the source or drain of the transistor 200.

[0197] The semiconductor layer 230 has a channel formation region and a source region and drain region that are provided so as to sandwich the channel formation region in the transistor 200. Therefore, the semiconductor layer 230 has a channel formation region, a source region and a drain region. At least a part of the channel formation region overlaps with the conductive layer 260. The source region overlaps with the conductive layer 242a, and the drain region overlaps with the conductive layer 242b. The source region and the drain region can be swapped with each other.

[0198] Therefore, the shortest distance between conductive layer 242a and conductive layer 242b can be set to the channel length Lch of transistor 200 (see Figures 14A and 14B). Also, the length of the portion where conductive layer 242a and conductive layer 242b face each other can be set to the channel width Wch of transistor 200 (see Figures 14A and 14C).

[0199] As the semiconductor layer 230, single-crystal semiconductors, polycrystalline semiconductors, microcrystalline semiconductors, or amorphous semiconductors can be used individually or in combination.

[0200] As the semiconductor layer 230, a semiconductor made of a single element or a compound semiconductor may be used. Examples of semiconductors made of single elements include silicon and germanium. Examples of compound semiconductors include gallium arsenide, silicon carbide, and silicon germanium. Other examples of compound semiconductors include organic semiconductors and nitride semiconductors. Oxide semiconductors are also a type of compound semiconductor. These semiconductor materials may contain impurities as dopants.

[0201] When silicon is used as the semiconductor layer 230, examples of silicon that can be used for the semiconductor layer 230 include single-crystal silicon, polycrystalline silicon, microcrystalline silicon, and amorphous silicon. As an example of polycrystalline silicon, low-temperature polysilicon (LTPS) can be used.

[0202] For example, in transistor 200, if silicon is used for the semiconductor layer 230, it is possible to make the transistor function as an n-type transistor by including phosphorus or arsenic as an n-type dopant in the source and drain regions of the semiconductor layer 230. Furthermore, it is possible to make the transistor function as a p-type transistor by including boron as a p-type dopant in the source and drain regions of the semiconductor layer 230. Note that when both n-type and p-type dopants are present in the source and drain regions of the semiconductor layer 230, the conductivity type with the higher dopant concentration is more likely to manifest.

[0203] Further, as the semiconductor layer 230, a two-dimensional material that functions as a semiconductor may be used. The two-dimensional material is also called a layered material and is a general term for a group of materials having a layered crystal structure. The layered material has high conductivity within a unit layer (also referred to as high two-dimensional conductivity). By using a material that functions as a semiconductor and has high two-dimensional conductivity for the semiconductor layer 230, a transistor with a large on-current can be provided.

[0204] Examples of the layered material include, for example, graphene, silicene, chalcogenide, etc. Chalcogenide is a compound containing a chalcogen (an element belonging to Group 16). Further, examples of chalcogenide include transition metal chalcogenide, Group 13 chalcogenide, etc. Specifically, as the transition metal chalcogenide applicable to the semiconductor layer 230, molybdenum sulfide (typically MoS ２ ), molybdenum selenide (typically MoSe ２ ), molybdenum telluride (typically MoTe ２ ), tungsten sulfide (typically WS ２ ), tungsten selenide (typically WSe ２ ), tungsten telluride (typically WTe ２ ), hafnium sulfide (typically HfS ２ ), hafnium selenide (typically HfSe ２ ), zirconium sulfide (typically ZrS ２ ), zirconium selenide (typically ZrSe ２ ), etc.

[0205] Further, an oxide semiconductor, which is a kind of metal oxide, may be used as the semiconductor layer 230. At this time, the bandgap of the metal oxide is preferably 2.0 eV or more, and more preferably 2.5 eV or more. By using a metal oxide with a large bandgap as the semiconductor layer 230, the off-current of the transistor can be significantly reduced. Since the OS transistor has a small off-current, the power consumption of the semiconductor device can be reduced.

[0206] Furthermore, in a transistor using an oxide semiconductor for the semiconductor layer 230, it is preferable that the channel formation region of the transistor has fewer oxygen vacancies or lower impurity concentrations (for example, concentrations of hydrogen, nitrogen, metal elements, etc.) than the source region and drain region. Also, hydrogen near oxygen vacancies causes V Ｏ Because H (a defect where hydrogen fills an oxygen vacancy) can be formed and electrons that act as carriers can be generated, V Ｏ It is also preferable that H is low. Thus, the channel formation region of the transistor is a high-resistance region with a low carrier concentration. Therefore, the channel formation region of the transistor can be said to be type i (intrinsic) or substantially type i.

[0207] Furthermore, the source and drain regions of the transistor have more oxygen vacancies than the channel formation region. Ｏ It is preferable that there is a high amount of H or a high impurity concentration. Thus, the source region and drain region of the transistor have a higher carrier concentration and are low-resistance n-type regions than the channel formation region.

[0208] One aspect of the present invention allows the use of a metal oxide (also called an oxide semiconductor) that functions as a semiconductor in the semiconductor layer 230 including the channel formation region of the transistor 200. When an oxide semiconductor is used in the semiconductor layer 230 of the transistor 200, the transistor 200 can be called an OS transistor. In this specification, a semiconductor layer having an oxide semiconductor can be referred to as an oxide semiconductor layer.

[0209] Next, an oxide semiconductor layer that can be used as a semiconductor layer in a transistor according to one aspect of the present invention will be described.

[0210] The oxide semiconductor layer preferably contains a crystalline metal oxide. Examples of crystalline metal oxide structures include CAAC (c-axis aligned crystal) structure, polycrystalline structure, microcrystalline structure, and nanocrystalline (nc: nano-crystal) structure. By using a crystalline metal oxide in the oxide semiconductor layer, the defect level density in the oxide semiconductor layer can be reduced. Therefore, the reliability of transistors using oxide semiconductor layers can be improved, and the reliability of semiconductor devices on which such transistors are mounted can be improved.

[0211] The oxide semiconductor layer is preferably a metal oxide having a CAAC structure. A CAAC structure is a crystalline structure in which multiple nanocrystals (typically multiple nanocrystals having a hexagonal crystal structure) are oriented along the c axis, and in the a-b plane, the multiple nanocrystals are linked together without orientation. Furthermore, when a cross-section of an oxide semiconductor layer having a CAAC structure is observed using a high-resolution transmission electron microscope (TEM), it can be confirmed that metal atoms are arranged in layers in the crystalline portion. Therefore, an oxide semiconductor layer having a CAAC structure can also be said to have a structure with layered crystalline portions.

[0212] The crystallinity of an oxide semiconductor layer can be analyzed, for example, by X-ray diffraction (XRD), TEM, or electron diffraction (ED). Alternatively, a combination of these methods may be used for analysis.

[0213] The crystallinity of the semiconductor material in the oxide semiconductor layer is not particularly limited. For example, the oxide semiconductor layer may include one or more amorphous semiconductors (semiconductors with an amorphous structure), single-crystal semiconductors (semiconductors with a single-crystal structure), or semiconductors with crystalline properties other than single crystals (microcrystalline semiconductors, polycrystalline semiconductors, or semiconductors with crystalline regions in part). The crystallinity of the oxide semiconductor layer may suppress the degradation of transistor characteristics.

[0214] Examples of metal oxides include indium oxide, gallium oxide, and zinc oxide. Preferably, the metal oxide contains at least indium (In). Preferably, the metal oxide contains at least indium (In) or zinc (Zn). Preferably, the metal oxide contains two or three elements selected from indium, element M, and zinc. Element M is a metallic or metalloid element with a high bond energy to oxygen; for example, a metallic or metalloid element with a higher bond energy to oxygen than indium. Specific examples of element M include aluminum, gallium, tin, yttrium, titanium, vanadium, chromium, manganese, iron, cobalt, nickel, zirconium, molybdenum, hafnium, tantalum, tungsten, lanthanum, cerium, neodymium, magnesium, calcium, strontium, barium, boron, silicon, germanium, and antimony. The element M present in the metal oxide is preferably one or more selected from the above elements, more preferably one or more selected from aluminum, gallium, tin, and yttrium, and even more preferably gallium. When element M is gallium, the metal oxide preferably has one or more selected from indium, gallium, and zinc. In this specification, metal elements and metalloid elements are sometimes collectively referred to as "metal elements," and the "metal elements" described in this specification may include metalloid elements.

[0215] Examples of metal oxides include indium oxide. Other examples of metal oxides include indium zinc oxide (In-Zn oxide), indium tin oxide (In-Sn oxide), indium titanium oxide (In-Ti oxide), indium gallium oxide (In-Ga oxide), indium gallium aluminum oxide (In-Ga-Al oxide), indium gallium tin oxide (In-Ga-Sn oxide, also written as IGTO), indium tungsten oxide (In-W oxide), gallium zinc oxide (Ga-Zn oxide, also written as GZO), and aluminum zinc oxide (Al-Zn oxide, A Examples include indium aluminum zinc oxide (also written as ZO), indium aluminum zinc oxide (In-Al-Zn oxide, also written as IAZO), indium tin zinc oxide (also written as In-Sn-Zn oxide), indium titanium zinc oxide (In-Ti-Zn oxide), indium gallium zinc oxide (In-Ga-Zn oxide, also written as IGZO), indium gallium tin zinc oxide (In-Ga-Sn-Zn oxide, also written as IGZTO), and indium gallium aluminum zinc oxide (In-Ga-Al-Zn oxide, also written as IGAZO or IAGZO). In addition, examples of metal oxides include indium tin oxide containing silicon oxide (also called ITSO), gallium tin oxide (Ga-Sn oxide), and aluminum tin oxide (Al-Sn oxide).

[0216] By increasing the ratio of indium atoms to the sum of all metal element atoms contained in the metal oxide (also called the indium (In) content), the transistor can obtain at least one of a large on-current and high frequency characteristics.

[0217] The metal oxide may contain one or more metal elements with higher periodic numbers in the periodic table, instead of indium. Alternatively, the metal oxide may contain one or more metal elements with higher periodic numbers in the periodic table, in addition to indium. The greater the overlap of the metal element orbitals, the greater the carrier conduction in the metal oxide tends to be. Therefore, including metal elements with higher periodic numbers in the periodic table can sometimes increase the field-effect mobility of the transistor. Examples of metal elements with higher periodic numbers in the periodic table include metal elements belonging to the 5th period and metal elements belonging to the 6th period. Specifically, examples of such metal elements include yttrium, zirconium, silver, cadmium, tin, antimony, barium, lead, bismuth, lanthanum, cerium, praseodymium, neodymium, promethium, samarium, and europium. Lanthanum, cerium, praseodymium, neodymium, promethium, samarium, and europium are called light rare earth elements.

[0218] Furthermore, metal oxides may contain one or more nonmetallic elements. The presence of nonmetallic elements in metal oxides can sometimes increase the field-effect mobility of transistors. Examples of nonmetallic elements include carbon, nitrogen, phosphorus, sulfur, selenium, fluorine, chlorine, bromine, and hydrogen.

[0219] Furthermore, by increasing the ratio of zinc atoms to the sum of the total number of atoms of all metal elements contained in the metal oxide, a highly crystalline metal oxide is obtained, which suppresses the diffusion of impurities in the metal oxide. Therefore, fluctuations in the electrical properties of the transistor are suppressed, and reliability can be improved.

[0220] Furthermore, by increasing the ratio of element M atoms to the sum of the total number of atoms of all metal elements contained in the metal oxide, the formation of oxygen vacancies in the metal oxide can be suppressed. Therefore, carrier generation caused by oxygen vacancies is suppressed, resulting in a transistor with low off-current. In addition, fluctuations in the electrical characteristics of the transistor are suppressed, and reliability can be improved.

[0221] Although Figures 14A to 14D show an example where the semiconductor layer 230 has a single-layer structure, the semiconductor layer 230 is not limited to this and can be made into a stacked structure of two or more layers.

[0222] For example, the semiconductor layer 230 may include a semiconductor layer 230a (not shown), a semiconductor layer 230b (not shown) on semiconductor layer 230a, and a semiconductor layer 230c (not shown) on semiconductor layer 230b. In this case, the semiconductor layer 230c may be placed between the semiconductor layer 230b, the conductive layer 242a, the conductive layer 242b, the insulating layer 280, and the insulating layer 250.

[0223] By having a semiconductor layer 230a below the semiconductor layer 230b, the diffusion of impurities from structures formed below the semiconductor layer 230a to the semiconductor layer 230b can be suppressed. Furthermore, by having a semiconductor layer 230c above the semiconductor layer 230b, the diffusion of impurities from structures formed above the semiconductor layer 230c to the semiconductor layer 230c can be suppressed.

[0224] Furthermore, the configuration is not limited to stacking three semiconductor layers 230a, 230b, and 230c; it may also be a configuration with two layers or four or more layers. For example, it may be a two-layer structure with semiconductor layer 230b and semiconductor layer 230c.

[0225] Furthermore, when an oxide semiconductor is used as the semiconductor layer 230, the semiconductor layer 230 may have a stacked structure of multiple oxide layers with different atomic ratios of each metal atom. For example, if the semiconductor layer 230 contains at least indium (In) and element M, the ratio of the number of atoms of element M contained in semiconductor layer 230a to the total number of atoms of all elements constituting semiconductor layer 230a may be higher than the ratio of the number of atoms of element M contained in semiconductor layer 230b to the total number of atoms of all elements constituting semiconductor layer 230b. Also, the atomic ratio of element M contained in semiconductor layer 230a to In may be higher than the atomic ratio of element M contained in semiconductor layer 230b to In. Here, the semiconductor layer 230c may be a metal oxide that can be used in semiconductor layer 230a or semiconductor layer 230b.

[0226] The energy levels at the lower end of the conduction band of semiconductor layer 230a and semiconductor layer 230c may be higher than the energy levels at the lower end of the conduction band of semiconductor layer 230b. Furthermore, the electron affinity of semiconductor layer 230a and semiconductor layer 230c may be lower than the electron affinity of semiconductor layer 230b. In this case, a metal oxide that can be used for semiconductor layer 230a may be used as semiconductor layer 230c. Specifically, the ratio of the number of atoms of element M contained in semiconductor layer 230c to the total number of atoms of all elements constituting semiconductor layer 230c may be higher than the ratio of the number of atoms of element M contained in semiconductor layer 230b to the total number of atoms of all elements constituting semiconductor layer 230b. Also, the atomic ratio of element M contained in semiconductor layer 230c to In may be greater than the atomic ratio of element M contained in semiconductor layer 230b to In.

[0227] Here, at the junctions of semiconductor layers 230a, 230b, and 230c, the energy level at the lower edge of the conduction band changes smoothly. Therefore, the energy level at the lower edge of the conduction band at the junctions of semiconductor layers 230a, 230b, and 230c can be said to change continuously or be continuously junctioned. To achieve this, the defect level density of the mixed layer formed at the interface between semiconductor layer 230a and semiconductor layer 230b and the interface between semiconductor layer 230b and semiconductor layer 230c may be reduced.

[0228] Specifically, by having semiconductor layers 230a and 230b, and semiconductor layers 230b and 230c have common elements other than oxygen, a mixed layer with a low defect level density can be formed. For example, if semiconductor layer 230b is indium gallium zinc oxide (In-Ga-Zn oxide), then semiconductor layers 230a and 230c may be In-Ga-Zn oxide, gallium zinc oxide (Ga-Zn oxide), gallium oxide, etc. Also, semiconductor layer 230c may be a laminated structure. For example, a laminated structure of In-Ga-Zn oxide and an oxide that does not contain In can be used as semiconductor layer 230c. Specifically, for example, a laminated structure of In-Ga-Zn oxide and Ga-Zn oxide on the In-Ga-Zn oxide, or a laminated structure of In-Ga-Zn oxide and gallium oxide on the In-Ga-Zn oxide can be used.

[0229] Specifically, as the semiconductor layer 230a, a metal oxide with an In:Ga:Zn ratio of 1:3:4 [atomic ratio] or nearby, or 1:1:0.5 [atomic ratio] or nearby may be used. Also, as the semiconductor layer 230b, a metal oxide with an In:Ga:Zn ratio of 4:2:3 [atomic ratio] or nearby, or 3:1:2 [atomic ratio] or nearby, or 1:1:1 [atomic ratio] or nearby may be used. Also, as the semiconductor layer 230c, a metal oxide with an In:Ga:Zn ratio of 1:3:4 [atomic ratio] or nearby, In:Ga:Zn = 4:2:3 [atomic ratio] or nearby, Ga:Zn = 2:1 [atomic ratio] or nearby, or Ga:Zn = 2:5 [atomic ratio] or nearby may be used. Furthermore, specific examples of a laminated structure for the semiconductor layer 230c include a laminated structure of In:Ga:Zn = 4:2:3 [atomic ratio] or its vicinity and Ga:Zn = 2:1 [atomic ratio] or its vicinity, a laminated structure of In:Ga:Zn = 4:2:3 [atomic ratio] or its vicinity and Ga:Zn = 2:5 [atomic ratio] or its vicinity, and a laminated structure of In:Ga:Zn = 4:2:3 [atomic ratio] or its vicinity and gallium oxide.

[0230] In this case, the main carrier path is the semiconductor layer 230b. By configuring semiconductor layers 230a and 230c as described above, the defect level density at the interface between semiconductor layer 230a and semiconductor layer 230b and the interface between semiconductor layer 230b and semiconductor layer 230c can be reduced. As a result, the influence of interface scattering on carrier conduction is reduced, and the transistor 200 can obtain a large on-current and high frequency characteristics. Furthermore, if semiconductor layer 230c is made into a stacked structure, in addition to the effect of reducing the defect level density at the interface between semiconductor layer 230b and semiconductor layer 230c, it is possible to suppress the diffusion of constituent elements of semiconductor layer 230c towards the insulating layer 250. More specifically, by making semiconductor layer 230c into a stacked structure and positioning an oxide that does not contain In on top of the stacked structure, it is possible to suppress In that could diffuse towards the insulating layer 250. Since the insulating layer 250 functions as a gate insulating film, if In diffuses, it will result in poor transistor characteristics. Therefore, by making the semiconductor layer 230c a stacked structure, it becomes possible to provide a highly reliable semiconductor device.

[0231] Although not shown in the figures, in the transistor 200, a crystalline portion may be provided on a part of the insulating layer 224, and a semiconductor layer 230 may be provided so as to cover the crystalline portion.

[0232] The crystalline portion contains crystals. The crystalline portion functions as a seed or nucleus when processing is performed to enhance the crystallinity of the semiconductor layer 230. Therefore, the crystalline portion functions as a seed or nucleus when the semiconductor layer 230 undergoes crystal growth. In this specification, the crystalline portion, or the crystals contained in the crystalline portion, can be rephrased as a seed crystal or a crystal nucleus.

[0233] Next, a detailed example of the transistor 200 configuration will be described.

[0234] Figure 15 shows an enlarged cross-sectional view of the transistor 200 in the channel length direction, as shown in Figures 14A to 14D.

[0235] By providing an insulating layer containing excess oxygen near the oxide semiconductor layer and performing heat treatment, oxygen can be supplied from the insulating layer to the oxide semiconductor layer, thereby reducing oxygen deficiency. However, if an excessive amount of oxygen is supplied to the source or drain region, it may cause a decrease in the on-current or field-effect mobility of the transistor 200. Furthermore, variations in the amount of oxygen supplied to the source or drain region within the substrate surface can lead to variations in the transistor's characteristics. In addition, if the amount of oxygen supplied from the insulating layer to the oxide semiconductor layer becomes excessively large, it may adversely affect the transistor's electrical characteristics and reliability. Moreover, oxygen may diffuse into conductive layers such as the gate electrode, source electrode, and drain electrode, causing oxidation of these conductive layers and potentially impairing their conductivity.

[0236] First, it is preferable to form at least one insulating layer having a barrier property against hydrogen and an insulating layer having the function of capturing or fixing hydrogen near the semiconductor layer 230, thereby reducing the hydrogen concentration in the channel formation region of the semiconductor layer 230 and its vicinity.

[0237] It is preferable that at least one of the insulating layers 212, 214, 221, 222, 275, 282, and 283 functions as a barrier insulating layer against hydrogen. It is also preferable that at least one of the insulating layers 212, 214, 221, 222, 275, 282, and 283 functions as a barrier insulating layer against impurities. Furthermore, it is preferable that at least one of the insulating layers 212, 214, 221, 222, 275, 282, and 283 functions as a barrier insulating layer against oxygen. Note that it is not necessarily required to provide all of the insulating layers 212, 214, 221, 222, 275, 282, and 283. If sufficient barrier properties are provided against hydrogen, impurities, oxygen, etc., the insulating layers can be appropriately selected from insulating layers 212, 214, 221, 222, 275, 282, and 283. For example, the insulating layer 214 can be omitted, and the insulating layer 216 and conductive layer 205 can be formed in contact with the upper surface of the insulating layer 212.

[0238] It is preferable that the insulating layers 212, 221, 275, and 283 have a function of suppressing hydrogen diffusion. For example, silicon nitride with higher hydrogen barrier properties can be used for the insulating layers 212, 221, 275, and 283.

[0239] The insulating layers 214, 222, and 282 preferably have the function of capturing or fixing hydrogen. For example, aluminum oxide can be used for the insulating layers 214 and 282. Furthermore, for example, hafnium oxide, which is a material with a high dielectric constant (high-k), is preferably used for the insulating layer 222.

[0240] As shown in Figure 15, by providing an insulating layer 212 having the function of suppressing hydrogen diffusion beneath the transistor 200, the diffusion of hydrogen from the lower layer of the transistor 200 can be suppressed. Furthermore, by providing an insulating layer 214 having the function of capturing or fixing hydrogen, hydrogen contained in the insulating layer 216 and the like can be captured or fixed to the insulating layer 214. This makes it possible to reduce the hydrogen concentration in and near the semiconductor layer 230.

[0241] Furthermore, by providing an insulating layer 221 having the function of suppressing hydrogen diffusion beneath the semiconductor layer 230, the diffusion of hydrogen from below the semiconductor layer 230 can be suppressed. In addition, by providing an insulating layer 222 having the function of capturing or fixing hydrogen, hydrogen contained in the insulating layer 224 and the like can be captured or fixed to the insulating layer 222. This makes it possible to reduce the hydrogen concentration in and near the semiconductor layer 230.

[0242] Furthermore, by providing an insulating layer 275, which has the function of suppressing hydrogen diffusion, so as to cover the semiconductor layer 230, conductive layer 242a, conductive layer 242b, etc., the diffusion of hydrogen from the insulating layer 280 to the semiconductor layer 230, conductive layer 242a, conductive layer 242b, etc. can be suppressed.

[0243] Furthermore, by providing an insulating layer 283 having the function of suppressing hydrogen diffusion on the transistor 200, the diffusion of hydrogen from above the transistor 200 can be suppressed. In addition, by providing an insulating layer 282 having the function of capturing or fixing hydrogen, hydrogen contained in the insulating layer 280 and the like can be captured or fixed to the insulating layer 282. This makes it possible to reduce the hydrogen concentration in and near the semiconductor layer 230.

[0244] In this way, by surrounding the transistor 200 with a barrier insulating layer against hydrogen, the diffusion of hydrogen into the oxide semiconductor can be reduced, thereby lowering the hydrogen concentration in the channel formation region. This can improve at least one of the electrical characteristics and reliability of the transistor 200.

[0245] Furthermore, it is preferable to include excess oxygen in the insulating layer 280. By supplying this oxygen to the semiconductor layer 230 via the insulating layer 250 through heat treatment, oxygen deficiencies in the channel formation region can be reduced.

[0246] The insulating layer 282 is preferably formed using a sputtering method in an atmosphere containing oxygen gas. This allows oxygen to be added to the insulating layer 280. The insulating layer 282 may be a single layer or a laminated structure of two or more layers.

[0247] As described above, by performing a heat treatment on the insulating layer 280, which contains excess oxygen, a suitable amount of oxygen can be supplied to the semiconductor layer 230 via the insulating layer 250. In this heat treatment, insulating layers 282 and 283, which have barrier properties against oxygen, are formed on the insulating layer 280, so it is possible to prevent excess oxygen contained in the insulating layer 280 from diffusing out of the insulating layer 280. Furthermore, since an insulating layer 275, which has barrier properties against oxygen, is formed between the insulating layer 280 and the semiconductor layer 230, conductive layer 242a, and conductive layer 242b, it is possible to prevent excess oxygen contained in the insulating layer 280 from diffusing out of the insulating layer 280. In addition, by performing the heat treatment with openings formed in a part of the insulating layer 280, insulating layer 282, and insulating layer 283, it is also possible to diffuse a portion of the oxygen contained in the insulating layer 280 outward and adjust the amount of oxygen supplied from the insulating layer 280 to the semiconductor layer 230.

[0248] It is preferable that the insulating layer 250 is configured to diffuse oxygen from the insulating layer 280 to the semiconductor layer 230 and to suppress oxidation of the conductive layer 242a, conductive layer 242b, and conductive layer 260.

[0249] The insulating layer 250 is formed within the opening 289 in contact with the upper surface of the insulating layer 222, the side surface of the insulating layer 224, the side surface and upper surface of the semiconductor layer 230, the side surface of the conductive layer 242a, the side surface of the conductive layer 242b, the side surface of the insulating layer 275, and the side surface of the insulating layer 280.

[0250] Figure 14B shows an example where the insulating layer 250 has a single-layer structure. However, the insulating layer 250 can have a laminated structure of two or more layers. In this case, it is preferable that the insulating layer 250 is formed from two or more types of films. By making the insulating layer 250 from two or more types of films, multiple functions can be imparted to the insulating layer 250. Examples of functions that the insulating layer 250 may have include the function of extracting excess oxygen from the semiconductor layer 230, the function of extracting hydrogen from the semiconductor layer 230, and the function of suppressing the diffusion of hydrogen into the semiconductor layer 230.

[0251] For example, as shown in Figure 15, the insulating layer 250 preferably has a laminated structure consisting of an insulating layer 250_1 in contact with the semiconductor layer 230, an insulating layer 250_2 on the insulating layer 250_1, and an insulating layer 250_3 on the insulating layer 250_2.

[0252] As the insulating layer 250_1, a material applicable to the insulating layer 250 described above can be used. The insulating layer 250_1 has regions that are in contact with the side surfaces of the conductive layer 242a and the conductive layer 242b. Therefore, for example, if the insulating layer 250_1 has the function of capturing or fixing oxygen, oxidation of the side surfaces of the conductive layer 242a and conductive layer 242b and the formation of an oxide film on those side surfaces can be suppressed. This can suppress a decrease in the on-current of the transistor 200 or a decrease in the field-effect mobility. Furthermore, with this configuration, the amount of oxygen in the insulating layer 250_2 that is absorbed by the conductive layer 242a and conductive layer 242b can be reduced. Therefore, an appropriate amount of oxygen can be supplied from the insulating layer 250_2 to the semiconductor layer 230, and oxygen deficiency in the channel formation region of the semiconductor layer 230 can be reduced.

[0253] Furthermore, by providing insulating layer 250_1 between insulating layer 280 and insulating layer 250_2, and between insulating layer 250_2 and semiconductor layer 230, it is possible to suppress the excessive supply of oxygen from insulating layer 280 to semiconductor layer 230 and supply an appropriate amount of oxygen to semiconductor layer 230. Therefore, the amount of oxygen in the channel formation region of semiconductor layer 230 and its vicinity can be controlled to an appropriate amount, thereby preventing excessive positive shift of transistor 200 and improving reliability. In addition, it is possible to suppress excessive oxidation of the source region and drain region, which can cause a decrease in the on-current of transistor 200 or a decrease in field-effect mobility.

[0254] By adopting the above configuration, the channel formation region can be made i-type or substantially i-type, and the source and drain regions can be made n-type, thereby providing a transistor with good electrical characteristics. Furthermore, with the above configuration, good electrical characteristics can be maintained even when the transistor is miniaturized or highly integrated. In addition, high-frequency characteristics can be improved by miniaturizing the transistor 200. Specifically, the cutoff frequency can be improved.

[0255] Furthermore, a material with a high dielectric constant (high-k) can be used for the insulating layer 250_1. An example of a material with a high dielectric constant is an oxide containing either or both aluminum and hafnium. By using a material with a high dielectric constant for the insulating layer 250_1, it becomes possible to reduce the gate voltage applied during transistor operation while maintaining the physical thickness of the gate insulating film. Additionally, it becomes possible to thin the equivalent oxide thickness (EOT) of the insulator that functions as the gate insulating film.

[0256] Based on the above, it is preferable to use an oxide containing one or both of aluminum and hafnium as the insulating layer 250_1, and it is more preferable to use an oxide having an amorphous structure and containing one or both of aluminum and hafnium. Aluminum oxide can be relatively easily formed into an amorphous film using the ALD method. Therefore, it is even more preferable to use aluminum oxide having an amorphous structure as the insulating layer 250_1. Aluminum oxide is preferable to use as the insulating layer 250_1 because it has the function of capturing or fixing oxygen and hydrogen. Alternatively, hafnium oxide is preferable to use as the insulating layer 250_1 because it has a high function of capturing or fixing oxygen and hydrogen.

[0257] For example, it is preferable to use a material with a low dielectric constant as the insulating layer 250_2. For example, it is preferable that the insulating layer 250_2 has a silicon oxide film or a silicon oxynitride film.

[0258] Furthermore, silicon oxide or silicon nitride is an insulating material with high dielectric strength. This can reduce the gate leakage current of the transistor. Also, the silicon oxide film or silicon oxynitride film is a film with high hydrogen permeability. Therefore, the insulating layer 250 may be a three-layer structure consisting of insulating layer 250_2, insulating layer 250_1 on insulating layer 250_2, and insulating layer 250_3 on insulating layer 250_1. With this configuration, hydrogen in the semiconductor layer 230 can diffuse to insulating layer 250_1 via insulating layer 250_2, and the hydrogen can be captured or fixed. Therefore, the hydrogen concentration in the semiconductor layer 230 can be reduced.

[0259] The insulating layer 250_3 preferably has barrier properties against hydrogen. This configuration suppresses the diffusion of hydrogen into the semiconductor layer 230. Furthermore, the insulating layer 250_3 preferably has barrier properties against oxygen. The insulating layer 250_3 is provided between the channel-forming region of the semiconductor layer 230 and the conductive layer 260. This configuration suppresses the diffusion of oxygen contained in the channel-forming region of the semiconductor layer 230 into the conductive layer 260, preventing the formation of oxygen vacancies in the channel-forming region of the semiconductor layer 230. It also suppresses the diffusion of oxygen contained in the semiconductor layer 230 into the conductive layer 260, preventing the conductive layer 260 from oxidizing. The insulating layer 250_3 preferably has less oxygen permeability than the insulating layer 250_2. Furthermore, the insulating layer 250_3 preferably has a function to suppress the diffusion of hydrogen. This prevents impurities such as hydrogen contained in the conductive layer 260 from diffusing into the semiconductor layer 230. For example, silicon nitride is preferably used as the insulating layer 250_3.

[0260] The insulating layer 250 can have a three-layer structure in which a hafnium oxide film, a silicon oxide film, and a silicon nitride film are stacked in that order from the semiconductor layer 230 side. Furthermore, the film thicknesses of the hafnium oxide film, silicon oxide film, and silicon nitride film can be set to 2 nm, 2 nm, and 1 nm, respectively. This configuration allows excess oxygen in the semiconductor layer 230 to be discharged into the insulating layer 250, reducing the amount of excess oxygen in the semiconductor layer 230. Additionally, hydrogen in the semiconductor layer 230 can be captured or fixed. Therefore, at least one of the electrical characteristics and reliability of the transistor 200 can be improved. Alternatively, the insulating layer 250 can also have a three-layer structure in which a silicon oxide film, a hafnium oxide film, and a silicon nitride film are stacked in that order from the semiconductor layer 230 side.

[0261] The insulating layer 250 is preferably a thin film. For example, by setting the thickness of the insulating layer 250 to 1 nm or more and 20 nm or less, preferably 3 nm or more and 10 nm or less, the subthreshold swing value (also called the S value) can be reduced. The S value refers to the amount of change in gate voltage when the drain current is changed by one order of magnitude while the drain voltage is constant in the subthreshold region.

[0262] Furthermore, the film thickness of each layer constituting the insulating layer 250 is preferably 0.1 nm to 20 nm, more preferably 0.1 nm to 10 nm, more preferably 0.1 nm to 5.0 nm, more preferably 0.5 nm to 5.0 nm, more preferably 1.0 nm to less than 5.0 nm, and even more preferably 1.0 nm to 3.0 nm. Note that each layer constituting the insulating layer 250 may have a region with the above-mentioned film thickness in at least a portion of it.

[0263] To make the thickness of each layer constituting the insulating layer 250 as described above, it is preferable to use the ALD method for film formation. Furthermore, in order to form each layer constituting the insulating layer 250 with good coverage within the opening 289, it is preferable to use the ALD method for film formation.

[0264] The conductive layer 205 is arranged to overlap with the semiconductor layer 230 and the conductive layer 260. Here, the conductive layer 205 is provided so as to be embedded in an opening formed in the insulating layer 216. Furthermore, it is preferable that the conductive layer 205 extends in the channel width direction, as shown in Figures 14A and 14C. With this configuration, when multiple transistors are provided, the conductive layer 205 functions as wiring.

[0265] As shown in Figure 15, it is preferable that the conductive layer 205 has conductive layer 205_1 and conductive layer 205_2. Conductive layer 205_1 is provided in contact with the bottom and inner wall of the opening. Conductive layer 205_2 is provided so as to fill the recess of conductive layer 205_1 that is formed along the shape of the opening. Here, the height of the upper surface of conductive layer 205 is the same as the height of the upper surface of insulating layer 216.

[0266] Here, the conductive layer 205_1 contains hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, and nitrogen oxide molecules (N ２ O, NO, NO ２ It is preferable to have a conductive material that has the function of suppressing the diffusion of impurities such as copper atoms. Alternatively, it is preferable to have a conductive material that has the function of suppressing the diffusion of oxygen (for example, at least one such as oxygen atoms and oxygen molecules).

[0267] By using a conductive material having the function of reducing hydrogen diffusion in the conductive layer 205_1, it is possible to prevent impurities such as hydrogen contained in the conductive layer 205_2 from diffusing into the semiconductor layer 230 via the insulating layer 216, etc. Furthermore, by using a conductive material having the function of suppressing oxygen diffusion in the conductive layer 205_1, it is possible to suppress oxidation of the conductive layer 205_2 and a decrease in conductivity. Examples of conductive materials having the function of suppressing oxygen diffusion include titanium, titanium nitride, tantalum, tantalum nitride, ruthenium, and ruthenium oxide. The conductive layer 205_1 can be a single-layer structure or a laminated structure of the above conductive material. For example, it is preferable that the conductive layer 205_1 has titanium nitride.

[0268] Furthermore, it is preferable to use a highly conductive material for the conductive layer 205_2. For example, it is preferable to use a conductive material mainly composed of tungsten, copper, or aluminum for the conductive layer 205_2. For example, it is preferable that the conductive layer 205_2 contains tungsten.

[0269] Although Figure 15 shows a laminated structure of conductive layer 205_1 and conductive layer 205_2, the structure is not limited to this. The conductive layer 205 may be a single layer or a laminated structure of three or more layers. For example, conductive layer 205_1 may be a two-layer structure of a tantalum nitride film and a titanium nitride film on the tantalum nitride film, and conductive layer 205_2 having a tungsten film may be provided on top of conductive layer 205_1. By using such a configuration, it is possible to suppress the diffusion of impurities such as hydrogen and metallic impurities such as copper contained in the lower layer of the transistor 200 into the conductive layer 205.

[0270] Furthermore, for example, the conductive layer 205 may have a conductive layer 205_3 (not shown) provided in contact with the upper surface of conductive layer 205_2 and the side surface of conductive layer 205_1. The height of the upper surface of conductive layer 205_3 is the same as the height of the upper surface of conductive layer 205_1 and the upper surface of insulating layer 216. As a result, conductive layer 205_2 is enclosed by conductive layer 205_1 and conductive layer 205_3. In this case, the same material as conductive layer 205_1 may be used for conductive layer 205_3.

[0271] The insulating layer 224 preferably has, for example, a silicon oxide film or a silicon oxynitride film. This allows oxygen to be supplied from the insulating layer 224 to the semiconductor layer 230, thereby reducing oxygen deficiency. The insulating layer 224 may have a laminated structure of two or more layers. In that case, it is not limited to a laminated structure made of the same material, but may have a laminated structure made of different materials.

[0272] Furthermore, it is preferable to process the insulating layer 224 in an island-like manner, similar to the semiconductor layer 230. This ensures that when multiple transistors 200 are provided, each transistor 200 has an insulating layer 224 of approximately the same size. As a result, the amount of oxygen supplied from the insulating layer 224 to the semiconductor layer 230 in each transistor 200 is approximately the same. Therefore, variations in the electrical characteristics of the transistors 200 within the substrate surface can be suppressed.

[0273] Furthermore, by arranging the insulating layer 224 in an island-like configuration, at least a portion of the lower surface of the conductive layer 260 can be positioned below the lower surface of the semiconductor layer 230 (see Figure 14C). This allows the conductive layer 260 to be positioned opposite the upper and side surfaces of the semiconductor layer 230, thereby enabling the electric field of the conductive layer 260 to act on the upper and side surfaces of the semiconductor layer 230.

[0274] However, although not shown in the diagram, the insulating layer 224 does not necessarily have to be processed into island shapes. When multiple transistors are provided on the same substrate, by forming the insulating layer 224 without processing it into island shapes, the semiconductor layer 230 of each transistor is formed on the same insulating layer 224. This reduces variations in the amount of oxygen supplied from the insulating layer 224 to the semiconductor layer 230 of each transistor. Therefore, variations in the electrical characteristics of each transistor can be reduced.

[0275] It is preferable to use conductive materials that are resistant to oxidation or conductive materials that have a function to suppress the diffusion of oxygen for conductive layers 242a and 242b. Examples of such conductive materials include conductive materials containing nitrogen and conductive materials containing oxygen. This makes it possible to suppress a decrease in the conductivity of conductive layers 242a and 242b.

[0276] For the conductive layers 242a and 242b, nitrides are preferably used. For example, nitrides containing tantalum, nitrides containing titanium, nitrides containing molybdenum, nitrides containing tungsten, nitrides containing tantalum and aluminum, and nitrides containing titanium and aluminum are preferred. For example, tantalum nitride can be used for conductive layers 242a and 242b. Alternatively, for example, ruthenium, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, oxides containing lanthanum and nickel, ITO, ITSO, In-Zn oxide, etc., may be used. These materials are preferred because they are conductive materials that are resistant to oxidation or maintain conductivity even when absorbing oxygen.

[0277] Furthermore, conductive layers 242a and 242b may each be arranged in a laminated structure. In this case, the above-mentioned conductive material can be used in the lower layer (the layer with a large contact area with the semiconductor layer 230) of conductive layers 242a and 242b, and a conductive material with higher conductivity can be used in the upper layer of conductive layers 242a and 242b. For example, tantalum nitride can be used in the lower layer and tungsten in the upper layer. Alternatively, for example, ITO or ITSO can be used in the lower layer and tungsten in the upper layer.

[0278] Here, the conductive layer 242a and conductive layer 242b are provided so as to be in contact with the upper and side surfaces of the semiconductor layer 230, the side surfaces of the insulating layer 224, and the upper surface of the insulating layer 222, and the insulating layer 275 is provided so as to be in contact with the upper and side surfaces of the conductive layers 242a and conductive layer 242b, and the upper surface of the insulating layer 222. However, the invention is not limited to this configuration. For example, the conductive layer 242a and conductive layer 242b are provided so as to be in contact with the upper surface of the semiconductor layer 230, and the insulating layer 275 is provided so as to be in contact with the upper and side surfaces of the conductive layers 242a and conductive layer 242b, the side surfaces of the semiconductor layer 230, the side surfaces of the insulating layer 224, and the upper surface of the insulating layer 222.

[0279] The conductive layer 260 is provided within the opening 289, via the insulating layer 250, to cover the upper surface of the insulating layer 222, the side surface of the insulating layer 224, and the side surface and upper surface of the semiconductor layer 230. The height of the upper surface of the conductive layer 260 is the same as the height of the upper end of the insulating layer 250 and the height of the upper surface of the insulating layer 280.

[0280] The inner wall of the opening 289 may be perpendicular to the upper surface of the insulating layer 222, or it may be tapered. By making the inner wall tapered, the coverage of the insulating layer 250 provided in the opening 289 is improved, and defects such as porosity can be reduced.

[0281] The conductive layer 260 is preferably provided extending in the channel width direction, as shown in Figures 14A and 14C. With this configuration, when multiple transistors are provided, the conductive layer 260 functions as wiring.

[0282] As shown in Figure 14C, in a cross-sectional view of the transistor 200 in the channel width direction, a curved surface may be present between the side surface of the semiconductor layer 230 and the top surface of the semiconductor layer 230. In this case, the edges of the side surface and the edges of the top surface may be curved.

[0283] As shown in Figure 15, it is preferable to have a two-layer structure for the conductive layer 260. Here, it is preferable that the conductive layer 260 has a conductive layer 260_1 and a conductive layer 260_2 disposed on top of conductive layer 260_1. For example, it is preferable that conductive layer 260_1 is arranged to enclose the bottom surface and sides of conductive layer 260_2.

[0284] For example, it is preferable to use titanium nitride as conductive layer 260_1 and tungsten as conductive layer 260_2. Alternatively, it is preferable to use tantalum nitride as conductive layer 260_1 and copper as conductive layer 260_2. By using such a configuration, the conductivity of conductive layer 260 can be increased.

[0285] Furthermore, the conductive layer 260 may have a laminated structure of three or more layers. For example, the conductive layer 260 may have a three-layer structure consisting of a tantalum nitride film, a titanium nitride film on the tantalum nitride film, and a tungsten film on the titanium nitride film.

[0286] It is preferable that the insulating layer 216, insulating layer 280, and insulating layer 285 each have a lower dielectric constant than the insulating layer 222. By using a material with a low dielectric constant as the interlayer film, parasitic capacitance occurring between wiring can be reduced.

[0287] For example, insulating layers 216, 280, and 285 can each be made of materials with low dielectric constants. Silicon oxide and silicon oxynitride are particularly preferred because they are thermally stable. Materials such as silicon oxide, silicon oxynitride, and silicon oxide with vacancies are also preferred because they can easily form regions containing excess oxygen.

[0288] Furthermore, the upper surfaces of the insulating layer 216 and the insulating layer 280 may be flattened.

[0289] It is preferable that the concentration of impurities such as water and hydrogen in the insulating layer 280 is reduced. For example, it is preferable that the insulating layer 280 has an oxide containing silicon, such as silicon oxide or silicon oxynitride.

[0290] For conductive layers 243a and 243b, it is preferable to use conductive materials mainly composed of, for example, tungsten, copper, or aluminum. Furthermore, conductive layers 243a and 243b may be arranged in a laminated structure.

[0291] For example, as shown in Figure 15, the conductive layer 243a and conductive layer 243b may be arranged in a two-layer laminated structure. Conductive layer 243a has a conductive layer 243a1 formed along the shape of the opening and a conductive layer 243a2 formed inside conductive layer 243a1. Conductive layer 243b has a conductive layer 243b1 formed along the shape of the opening and a conductive layer 243b2 formed inside conductive layer 243b1.

[0292] The conductive layers 243a1 and 243b1 can be formed as single layers or in a laminated configuration using a conductive material applicable to conductive layer 205_1. By providing conductive layers 243a1 and 243b1, it is possible to suppress the incorporation of impurities such as water and hydrogen into the semiconductor layer 230 through conductive layers 243a2 and 243b2. Conductive layers 243a2 and 243b2 can use conductive materials applicable to conductive layers 243a and 243b described above.

[0293] Furthermore, as shown in Figure 14B, the height of the upper surfaces of conductive layers 243a and 243b is the same as the height of the upper surface of the insulating layer 285. Also, as shown in Figure 15, the lower part of conductive layer 243a may be formed to be embedded in conductive layer 242a. Similarly, the lower part of conductive layer 243b may be formed to be embedded in conductive layer 242b.

[0294] As insulating layers 241a and 241b, barrier insulating layers applicable to insulating layer 275 and the like can be used. For example, silicon nitride can be used as insulating layer 241a and insulating layer 241b. Insulating layers 241a and 241b are provided in contact with insulating layer 285, insulating layer 283, insulating layer 282, and insulating layer 275. This prevents impurities such as water and hydrogen contained in insulating layer 280 and the like from mixing into semiconductor layer 230 through conductive layer 243a and conductive layer 243b. In particular, silicon nitride is preferred as insulating layer 241a and insulating layer 241b because of its high barrier properties against hydrogen. Furthermore, it prevents oxygen contained in insulating layer 280 from being absorbed by conductive layer 243a and conductive layer 243b.

[0295] Furthermore, the insulating layer 241a and the insulating layer 241b may be in a laminated structure. In this case, it is preferable that the first insulating layer in contact with the inner wall of the opening such as the insulating layer 280 and the second insulating layer inside it use a combination of an oxygen barrier insulating layer and a hydrogen barrier insulating layer.

[0296] <Materials for semiconductor devices> Next, a semiconductor device according to one aspect of the present invention and materials that can be used in transistors (such as semiconductor device 150, transistor 310, and transistor 200) in said semiconductor device will be described.

[0297] [Substrate] When a transistor is mounted on a substrate, there are no major restrictions on the material used for the substrate. The material used for the substrate can be determined by considering factors such as whether or not it is translucent and whether it has sufficient heat resistance to withstand heat treatment, depending on the purpose. For example, an insulating substrate, a semiconductor substrate, or a conductive substrate may be used as the substrate. As an insulating substrate, for example, glass substrates such as barium borosilicate glass or aluminoborsilicate glass, ceramic substrates, quartz substrates, sapphire substrates, stabilized zirconia substrates (such as yttria-stabilized zirconia substrates) can be used. In addition, semiconductor substrates, flexible substrates, resin substrates, etc. may be used as the substrate.

[0298] Examples of semiconductor substrates include semiconductor substrates made from silicon or germanium, or compound semiconductor substrates made from silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide, or gallium oxide. Furthermore, there are semiconductor substrates having insulating regions within the above-mentioned semiconductor substrates, such as SOI (Silicon On Insulator) substrates. In addition, the semiconductor substrate may be a single-crystal semiconductor or a polycrystalline semiconductor.

[0299] Conductive substrates include graphite substrates, metal substrates, alloy substrates, and conductive resin substrates. There are also substrates containing metal nitrides and metal oxides. Furthermore, there are substrates with a conductive or semiconductor layer on an insulating substrate, substrates with a conductive or insulating layer on a semiconductor substrate, and substrates with a semiconductor or insulating layer on a conductive substrate.

[0300] Examples of materials that can be used for flexible substrates, resin substrates, etc. include polyesters such as polyethylene terephthalate (PET) and polyethylene naphthalate (PEN), polyacrylonitrile, acrylic resin, polyimide, polymethyl methacrylate, polycarbonate (PC), polyethersulfone (PES), polyamide (nylon, aramid, etc.), polysiloxane, cycloolefin resin, polystyrene, polyamide-imide, polyurethane, polyvinyl chloride, polyvinylidene chloride, polypropylene, polytetrafluoroethylene (PTFE), ABS resin, cellulose nanofiber, and the like.

[0301] By using the above material as a substrate, a lightweight semiconductor device can be provided. Furthermore, by using the above material as a substrate, a semiconductor device that is resistant to impact can be provided. Furthermore, by using the above material as a substrate, a semiconductor device that is less prone to damage can be provided. In addition, devices on which elements are provided on these substrates may also be used. Elements provided on the substrate include capacitive elements, resistive elements, switch elements, light-emitting elements, and memory elements.

[0302] [Insulating Layer] An inorganic insulating film can be used for the insulating layer of a semiconductor device. Examples of inorganic insulating films include oxide insulating films, nitride insulating films, oxidative nitride insulating films, and nitride oxide insulating films. Examples of oxide insulating films include silicon oxide film, aluminum oxide film, magnesium oxide film, gallium oxide film, germanium oxide film, yttrium oxide film, zirconium oxide film, lanthanum oxide film, neodymium oxide film, hafnium oxide film, tantalum oxide film, cerium oxide film, zinc gallium oxide film, and hafnium aluminate film. Examples of nitride insulating films include silicon nitride film and aluminum nitride film. Examples of oxidative nitride insulating films include silicon oxide nitride film, aluminum oxide nitride film, gallium oxide nitride film, yttrium oxide nitride film, and hafnium oxide nitride film. Examples of nitride oxide insulating films include silicon oxide nitride film and aluminum oxide nitride film. In addition, an organic insulating film may be used for the insulating layer of a semiconductor device.

[0303] In this specification, "oxide nitride" refers to a material in which the oxygen content is greater than the nitrogen content, and "nitride oxide" refers to a material in which the nitrogen content is greater than the oxygen content. For example, when "silicon oxynitride" is written, it refers to a material in which the oxygen content is greater than the nitrogen content, and when "silicon nitride oxide" is written, it refers to a material in which the nitrogen content is greater than the oxygen content. The content of each element can be measured using methods such as Rutherford backscattering (RBS).

[0304] For example, as transistors become smaller and more integrated, the thinning of the gate insulating film can lead to problems such as gate leakage current. Therefore, by using a material with a high relative permittivity (high-k) for the insulating layer that functions as the gate insulating film, it becomes possible to lower the gate voltage applied during transistor operation while maintaining the physical film thickness. Furthermore, it becomes possible to thin the equivalent oxide thickness (EOT) of the gate insulating film. Additionally, by using a material with a high relative permittivity for the insulating layer that functions as the dielectric of a capacitive element, the capacitance per unit area can be increased. On the other hand, by using a material with a low relative permittivity for the insulating layer that functions as an interlayer film, parasitic capacitance between wiring can be reduced. Therefore, materials can be selected according to the function of the insulating layer. It should be noted that materials with a low relative permittivity also have high dielectric strength.

[0305] Examples of materials with a high dielectric constant include aluminum oxide, gallium oxide, hafnium oxide, tantalum oxide, zirconium oxide, hafnium-zirconium oxide, oxides containing aluminum and hafnium, oxides containing aluminum and hafnium, oxides containing silicon and hafnium, oxides containing silicon and hafnium, and nitrides containing silicon and hafnium.

[0306] Examples of materials with a low dielectric constant include inorganic insulating materials such as silicon oxide, silicon oxide-nitride, and silicon nitride-oxide, as well as resins such as polyester, polyolefin, polyamide (nylon, aramid, etc.), polyimide, polycarbonate, and acrylic resin. Other inorganic insulating materials with a low dielectric constant include, for example, silicon oxide with added fluorine, silicon oxide with added carbon, and silicon oxide with added carbon and nitrogen. Also, for example, silicon oxide with vacancies can be used. These silicon oxides may contain nitrogen.

[0307] [Conductive Layer] The conductive layer of a semiconductor device preferably uses a metallic element selected from aluminum, chromium, copper, silver, gold, platinum, zinc, tantalum, nickel, titanium, iron, cobalt, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, lanthanum, etc., an alloy composed of the above metallic elements, or an alloy combining the above metallic elements. As an alloy composed of the above metallic elements, nitrides of the alloy or oxides of the alloy may be used. For example, it is preferable to use tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, oxides containing lanthanum and nickel, etc. In addition, semiconductors with high conductivity, such as polycrystalline silicon containing impurity elements such as phosphorus, or silicides such as nickel silicide may be used.

[0308] Furthermore, it is preferable to use conductive materials that are resistant to oxidation, conductive materials that have a function to suppress oxygen diffusion, or materials that maintain conductivity even when absorbing oxygen. Examples of such materials include nitrogen-containing conductive materials such as tantalum-containing nitrides, titanium-containing nitrides, molybdenum-containing nitrides, tungsten-containing nitrides, ruthenium-containing nitrides, tantalum and aluminum-containing nitrides, and titanium and aluminum-containing nitrides. Examples of oxygen-containing conductive materials include ruthenium oxide, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel. Examples of materials containing metallic elements such as titanium, tantalum, and ruthenium are also included. Examples of oxygen-containing conductive materials include materials containing tungsten oxide and indium oxide, materials containing titanium oxide and indium oxide, indium tin oxide (also known as ITO), indium tin oxide containing titanium oxide, indium tin oxide containing silicon oxide (also known as ITSO), indium zinc oxide (also known as IZO®), and indium zinc oxide containing tungsten oxide. In this specification, a conductive layer formed using an oxygen-containing conductive material may be referred to as an oxide conductive layer.

[0309] Furthermore, it is preferable to use a conductive material with high conductivity, such as one mainly composed of tungsten, copper, or aluminum.

[0310] Furthermore, multiple conductive layers formed from the above materials may be used in a laminated structure. For example, a laminated structure may be formed by combining a material containing the above-mentioned metal element with a conductive material containing oxygen. Alternatively, a laminated structure may be formed by combining a material containing the above-mentioned metal element with a conductive material containing nitrogen. Alternatively, a laminated structure may be formed by combining a material containing the above-mentioned metal element with a conductive material containing oxygen and a conductive material containing nitrogen.

[0311] <Examples of Transistor Application> In one aspect of the present invention, at least a portion of the transistors 310 and 200 described above can be applied to the semiconductor device 100 shown in Embodiment 1 described above.

[0312] For example, in the semiconductor device 100, an n-channel type transistor 310 can be applied to each of the transistors M2a, M2b, M3a, M3b, M3c, and M3d, and a p-channel type transistor 310 can be applied to each of the transistors M1a, M1b, M4a, M4b, M4c, M5a, M5b, M5c, M5d, M6a, M6b, M6c, and M6d.

[0313] Furthermore, for example, in the semiconductor device 100, transistor 200 can be applied to each of transistors M2a, M2b, M3a, M3b, M3c, and M3d, and p-channel type transistors 310 can be applied to each of transistors M1a, M1b, M4a, M4b, M4c, M5a, M5b, M5c, M5d, M6a, M6b, M6c, and M6d.

[0314] When the transistor 310 is applied to the semiconductor device 100, the gate electrode Gate shown in Figures 10A and 10B above corresponds to, for example, the conductive layer 316. Also, the active region Act shown in Figures 10A and 10B above corresponds to, for example, the semiconductor region 313, the low-resistance region 314a, and the low-resistance region 314b.

[0315] Furthermore, when a transistor 200 is applied to the semiconductor device 100, the gate electrode Gate shown in Figures 10A and 10B above corresponds to, for example, a conductive layer 260. Also, the active region Act shown in Figures 10A and 10B above corresponds to, for example, a semiconductor layer 230.

[0316] Furthermore, the contents of this embodiment can be combined as appropriate. Also, the contents of this embodiment can be combined as appropriate with the contents of other embodiments, etc.

[0317] (Embodiment 3) This embodiment describes an indium oxide film that can be used in the semiconductor layer of a transistor according to one aspect of the present invention.

[0318] In this specification, indium oxide having at least a crystalline portion or crystalline region in the film is referred to as crystalline indium oxide (crystal IO) or crystalline indium oxide (crystalline IO). Examples of crystal IO or crystalline IO include single-crystal indium oxide, polycrystalline indium oxide, and microcrystalline indium oxide.

[0319] Indium oxide is a semiconductor material with completely different physical properties from oxide semiconductors such as In-Ga-Zn oxide (hereinafter also referred to as IGZO) and zinc oxide.

[0320] This paper describes the carrier concentration dependence of the hole mobility of indium oxide, silicon, and IGZO.

[0321] IGZO tends to exhibit higher hole mobility as the carrier concentration increases. On the other hand, single-crystal indium oxide tends to exhibit higher hole mobility as the carrier concentration decreases. This trend is similar to that of silicon, where lower dopant (impurity) concentrations in the material reduce impurity scattering and increase hole mobility. In other words, the higher the purity and intrinsic nature of single-crystal indium oxide, the higher its hole mobility. From these results, it can be said that single-crystal indium oxide, unlike IGZO, is a material with physical properties similar to silicon. Note that when indium oxide is not single-crystal (e.g., polycrystalline), the trend may differ from that of single crystals.

[0322] The range of carrier concentrations suitable for the channel formation region of a transistor is 1 × 10⁻⁶. １５ cm −３ This range includes, for example, 1 × 10 １４ cm −３ The above is 1 x 10 １８ cm −３ The range is as follows: By sufficiently reducing the carrier concentration, the hole mobility value can be increased to 270 cm⁻¹. ２ It can be expected to be raised to the level of / (V・s).

[0323] Indium oxide can contain elements that lower the carrier concentration. Examples of elements that lower the carrier concentration include magnesium, calcium, zinc, cadmium, and copper. These elements can lower the carrier concentration by substituting for indium. Other examples include nitrogen, phosphorus, arsenic, and antimony. These elements can lower the carrier concentration by substituting for oxygen.

[0324] On the other hand, electrical resistance can be reduced by increasing the carrier concentration. For example, the suitable carrier concentration range for the source and drain regions of a transistor, or for a resistor or transparent conductive film, is when the carrier concentration value is 1 × 10⁻⁶ ２０ cm −３ This range includes, for example, 1 × 10 １９ cm −３ The above is 1 x 10 ２２ cm −３ The range is as follows: By making the carrier concentration sufficiently high, the resistivity can be increased to 1 × 10⁻⁶. −４ It is expected that the level can be reduced to below Ω·cm.

[0325] Indium oxide may contain elements that increase the carrier concentration. For example, it is preferable to include elements common to the source and drain electrodes of the transistor. Examples of elements that increase the carrier concentration include titanium, zirconium, hafnium, tantalum, tungsten, molybdenum, tin, silicon, and boron. In particular, it is more preferable to use elements in which the oxide is conductive or semiconducting.

[0326] Because indium oxide is an oxide whose valence electrons can be controlled, the region with a low carrier concentration can be used for the channel formation region of the transistor, and the region with a high carrier concentration can be used for the source and drain regions of the transistor. This makes it possible to create a so-called n-i-n junction (a junction between an n-type region, an i-type region, and an n-type region). Valence electron control in transistors using silicon is generally known. On the other hand, valence electron control in transistors using indium oxide is a novel technological concept that would not normally be conceived. By using this technological concept, it is possible to realize a transistor with high mobility, low off-current, normally-off capability, and high reliability.

[0327] The indium oxide film is preferably crystalline. In particular, the indium oxide film is preferably polycrystalline, and more preferably single-crystal. A single-crystal film does not have grain boundaries. By using a single-crystal film, carrier scattering at grain boundaries can be suppressed, enabling the realization of transistors that exhibit high field-effect mobility. Furthermore, it has the excellent effect of suppressing variations in transistor characteristics caused by these grain boundaries.

[0328] Furthermore, polycrystalline films are preferable because they can reduce carrier scattering and exhibit high field-effect mobility compared to microcrystalline or amorphous films. When using polycrystalline films, it is preferable to use films with the largest possible grain size and few grain boundaries. In a transistor to which a polycrystalline film is applied, if there are no grain boundaries in the channel formation region, or if no grain boundaries are observed, the channel formation region is located within the single-crystal region contained in the polycrystalline film, and therefore it can be considered a transistor to which a single-crystal film is applied.

[0329] The crystallinity of indium oxide can be analyzed, for example, by XRD, TEM, or ED. Alternatively, a combination of these methods may be used for analysis.

[0330] Furthermore, in this specification, a semiconductor layer in which no grain boundaries are observed in the channel formation region, a semiconductor layer in which the channel formation region is contained within a single crystal grain, or a semiconductor layer in which the crystal axis directions are the same in at least two regions within the channel formation region can be considered as a single crystal film.

[0331] Unless otherwise specified, the channel formation region refers to the region of the semiconductor layer that overlaps with (or faces) the gate electrode via the gate insulating film, and is located between the region in contact with the source electrode and the region in contact with the drain electrode. The crystal grains, grain boundaries, crystal axes, and crystal orientation in the channel formation region can be confirmed by cross-sectional observation including the semiconductor layer, source electrode, and drain electrode.

[0332] Impurities in the indium oxide film can act as a source of carrier scattering, thus potentially causing a decrease in field-effect mobility and inhibiting crystal growth. Examples of impurities in the indium oxide film include boron and silicon. In the channel-forming region of the indium oxide film, lower concentrations of these impurities are preferable. For example, the concentration of each of the above impurity elements should be 0.1% or less, more preferably 0.01% (100 ppm) or less. Note that elements such as carbon and hydrogen may be present in the deposition gas or precursor during film formation, and may remain in the indium oxide film in higher concentrations than the above impurities.

[0333] Furthermore, the indium oxide film may contain elements that can become trivalent cations like indium, as long as their crystals maintain a cubic crystal structure (Bixbite type). Examples include Group 13 elements of the periodic table such as gallium and aluminum, and Group 3 elements of the periodic table. Since these elements mainly exist as trivalent cations in the oxide, the carrier concentration of indium oxide can be kept low.

[0334] By using such an indium oxide film in a transistor, the field-effect mobility of the transistor can be increased to 50 cm². ２ / (V·s) or more, preferably 100 cm ２ / (V·s) or more, more preferably 150 cm ２ / (V·s) or more, more preferably 200 cm２ / (V·s) or more, more preferably 250 cm ２ It can be set to (V・s) or more.

[0335] One of the characteristics of indium oxide films is their higher oxygen permeability (diffusivity) compared to IGZO films. For example, oxygen diffusing into an indium oxide film permeates the film and is released as oxygen molecules. In some cases, it may also be released as water molecules by reacting with hydrogen contained in the film. Furthermore, if there is an oxygen deficiency in the film, diffusing oxygen atoms will fill the deficiency. Because oxygen diffuses easily through indium oxide films, it can be said that oxygen deficiencies are more easily filled in compared to IGZO films.

[0336] Thus, because indium oxide films are more likely to reduce oxygen vacancies in the film compared to IGZO films, applying such indium oxide films to transistors makes it possible to realize transistors with extremely high reliability.

[0337] Furthermore, the indium oxide film diffuses hydrogen. Hydrogen diffusing into the indium oxide film from the outside permeates the film and is released as hydrogen molecules. Alternatively, it reacts with oxygen contained in the film and is released as water molecules.

[0338] Indium oxide is characterized by a small effective electron mass and a large effective hole mass. Furthermore, the effective electron mass of indium oxide is largely independent of the crystal orientation. Therefore, using crystalline indium oxide in transistors allows for the realization of transistors with high field-effect mobility and high frequency characteristics (also known as f-response). Moreover, due to the large effective hole mass, transistors with extremely low off-currents can be realized. For example, by applying an indium oxide film to a transistor, the off-current per 1 μm of channel width is 1 fA (1 × 10⁻¹⁶) at 125°C. −１５ A) Less than or equal to, or 1aA (1 × 10 −１８ A) Less than or equal to 1aA (1 × 10) in a room temperature (25°C) environment. −１８ A) Less than or equal to, or 1zA (1 × 10⁻¹⁰ −２１A) The following is possible. Furthermore, because indium oxide has a smaller effective electron mass and a larger effective hole mass than silicon, it may be possible to realize transistors with higher field-effect mobility and lower off-current than Si transistors.

[0339] It is preferable to provide a seed layer so as to be in contact with at least a portion of the crystalline indium oxide film. It is preferable to use a material containing crystals with a small difference in lattice constant (also called lattice mismatch) with the indium oxide for the seed layer. This improves the crystallinity of the indium oxide film. A substrate (e.g., a single-crystal substrate) may be used as one of the layers in contact with at least a portion of the crystalline indium oxide film.

[0340] One method for evaluating the degree of lattice mismatch is to use the following lattice mismatch value. The lattice mismatch Δa [%] of the crystals in the formed film (in this case, the indium oxide film) relative to the crystals in the seed layer is given by Δa = ((L １ -L ２ ) / L ２ It is calculated as ) × 100. Here L １ L is the length of the unit cell vector of the crystals in the formed film, or the lattice constant. ２ This is the length of the unit cell vector of the crystal in the seed layer, or the lattice constant.

[0341] The lattice mismatch Δa between the seed layer and the indium oxide film is preferably small in absolute value, and most preferably zero. For example, Δa can be -5% or more and 5% or less, preferably -4% or more and 4% or less, more preferably -3% or more and 3% or less, and even more preferably -2% or more and 2% or less.

[0342] Here, the indium oxide crystal has a cubic structure (bixbite type). For example, yttria-stabilized zirconia (YSZ) crystals can have a cubic structure (fluorite type). The lattice mismatch of the indium oxide crystal with respect to the cubic YSZ crystal is in the range of -2% to 2%, and a single crystal film of indium oxide can be epitaxially grown on a YSZ substrate.

[0343] Furthermore, the crystal structure of the seed layer and the crystal structure of the indium oxide film do not necessarily have to be the same in terms of crystal system or crystal orientation. For example, a film with a hexagonal or trigonal crystal structure can be used beneath an indium oxide film with a cubic crystal structure. For example, by setting the crystal orientation of the surface of the seed layer to

[001] and the crystal orientation of the underside of the indium oxide film to

[111] , the requirements related to crystal orientation necessary for epitaxial growth can be met. Examples of hexagonal or trigonal crystals include wurtzite-type structures and YbFe. ２ O ４ Type structure, Yb ２ Fe ３ O ７ These include type structures and their modified type structures. YbFe ２ O ４ Type structure or Yb ２ Fe ３ O ７ An example of a crystal having a type structure is IGZO.

[0344] Furthermore, the contents of this embodiment can be combined as appropriate. Also, the contents of this embodiment can be combined as appropriate with the contents of other embodiments, etc.

[0345] (Embodiment 4) This embodiment describes electronic components and electronic devices that can use a semiconductor device according to one aspect of the present invention. Electronic components and electronic devices using a semiconductor device according to one aspect of the present invention are effective in improving performance, such as reducing power consumption.

[0346] <Electronic Components> Figure 16A is a perspective view of the electronic component 5110 and the substrate (mounted substrate 5120) on which the electronic component 5110 is mounted. The electronic component 5110 has a chip 5101 inside the mold 5111. Note that in Figure 16A, some details have been omitted to show the inside of the electronic component 5110. The electronic component 5110 has a land 5112 on the outside of the mold 5111. The land 5112 is connected to an electrode pad 5113. The electrode pad 5113 is connected to the chip 5101 by a wire 5114. The electronic component 5110 is mounted on a printed circuit board 5121, for example. Multiple such electronic components are combined and each electronic component is connected on the printed circuit board 5121 to complete the mounted substrate 5120.

[0347] Furthermore, the chip 5101 has a functional layer 5191 and a functional layer 5192. Functional layer 5191 has, for example, an arithmetic processing unit (such as an arithmetic core). Functional layer 5192 has, for example, a memory device (such as a memory). Functional layer 5191 may also have, for example, a drive circuit for the memory device. Functional layer 5192 may also have a part of the arithmetic processing unit. Functional layer 5191 may also have, for example, an input device, an output device, and a control device. Functional layer 5192 may also have, for example, a part of an input device, an output device, and a control device.

[0348] For example, both the functional layer 5191 and the functional layer 5192 can use n-channel transistors and p-channel transistors. For instance, a CMOS circuit may be configured using p-channel transistors in the functional layer 5191 and n-channel transistors in the functional layer 5192. However, the configuration is not limited to this, and the functional layer 5191 may have both n-channel and p-channel transistors, while the functional layer 5192 uses n-channel transistors.

[0349] Alternatively, for example, a Si transistor may be used in the functional layer 5191 and an OS transistor in the functional layer 5192.

[0350] Here, for example, the transistor 310 of the semiconductor device shown in Embodiment 2 described above can be used as the transistor used in the functional layer 5191, and the transistor 200 of the semiconductor device shown in Embodiment 2 described above can be used as the transistor used in the functional layer 5192.

[0351] The functional layer 5192 having memory has a configuration in which multiple memory cell arrays are stacked. The configuration in which the functional layer 5191 having an arithmetic core and the functional layer 5192 having memory are stacked can be a monolithic configuration. In a monolithic configuration, the arithmetic cores and memories of each layer can be connected to each other without using through-electrode technologies such as TSV (Through Silicon Via) and bonding technologies such as Cu-Cu direct bonding. By stacking the functional layer 5191 having an arithmetic core and the functional layer 5192 having memory monolithically, for example, a so-called on-chip memory configuration can be achieved in which memory is directly formed on the processor. By using an on-chip memory configuration, it is possible to speed up the operation of the interface portion between the processor and the memory. In addition, a part of the functionality of the functional layer 5191 having an arithmetic core (a part of the arithmetic function) may be provided in a part of the functional layer 5192 having memory.

[0352] Furthermore, by using an on-chip memory configuration, it is possible to reduce the size of connection wiring and other components compared to technologies that use through-electrodes such as TSVs, making it possible to increase the number of connection pins. Increasing the number of connection pins enables parallel operation, which in turn improves the memory bandwidth (also called memory bandwidth).

[0353] Furthermore, it is preferable to form the multiple memory cell arrays in the functional layer 5192 having memory using OS transistors and to stack these multiple memory cell arrays monolithically. By stacking multiple memory cell arrays monolithically, it is possible to improve either or both of the memory bandwidth and / or memory access latency. Bandwidth refers to the amount of data transferred per unit time. Access latency refers to the time from access to the start of data exchange. In the case of a configuration in which Si transistors are used in the functional layer 5192 having memory, it is difficult to achieve a monolithic stacked configuration compared to OS transistors. Therefore, in a monolithic stacked configuration, OS transistors can be said to have a superior structure compared to Si transistors.

[0354] The chip 5101 may also be referred to as a die. In this specification, a die refers to a chip piece obtained in the semiconductor chip manufacturing process by forming a circuit pattern on, for example, a disc-shaped substrate (also called a wafer) and cutting it into cubes. Examples of semiconductor materials that can be used for dies include silicon, silicon carbide, or gallium nitride. For example, a die obtained from a silicon substrate (also called a silicon wafer) is sometimes called a silicon die.

[0355] Figure 16B is a perspective view of the electronic component 5130. The electronic component 5130 is an example of a SiP (System in Package) or MCM (Multi-Chip Module). The electronic component 5130 has an interposer 5131 on a package substrate 5132 (printed circuit board), and a chip 5102 and a plurality of chips 5101 are provided on the interposer 5131.

[0356] In the electronic component 5130, chip 5101 can be used as a storage device, such as a high-bandwidth memory (HBM). Chip 5102 can be used as an integrated circuit (for example, an arithmetic unit, control device, arithmetic processing unit, or signal processing unit) such as a CPU (Central Processing Unit), GPU (Graphics Processing Unit), NPU (Neural Processing Unit), TPU (Tensor Processing Unit), or FPGA (Field Programmable Gate Array).

[0357] The package substrate 5132 can be, for example, a ceramic substrate, a plastic substrate, or a glass epoxy substrate. The interposer 5131 can be, for example, a silicon interposer or a resin interposer.

[0358] The interposer 5131 has multiple wirings, each of which has the function of connecting multiple integrated circuits with different terminal pitches. The multiple wirings are provided in a single layer or multiple layers. The interposer 5131 also has the function of connecting integrated circuits provided on the interposer 5131 with electrodes provided on the package substrate 5132. For these reasons, the interposer 5131 is sometimes called a "redistribution substrate" or "intermediate substrate". In addition, the interposer 5131 may also have through electrodes, which can be used to connect the integrated circuits and the package substrate 5132. Furthermore, when using a silicon interposer, TSVs can be used as through electrodes.

[0359] HBMs require numerous connections to achieve a wide memory bandwidth. Therefore, the interposer on which the HBM is mounted must be capable of forming fine and high-density wiring. For this reason, it is preferable to use a silicon interposer for mounting the HBM.

[0360] Furthermore, SiP or MCM using a silicon interposer, for example, are less susceptible to reliability degradation due to differences in expansion coefficients between the integrated circuit and the interposer. Also, because silicon interposers have high surface flatness, connection failures between the integrated circuit and the silicon interposer are less likely to occur. In particular, for 2.5D packages (2.5-dimensional packaging) where multiple integrated circuits are arranged side by side on the interposer, it is preferable to use a silicon interposer.

[0361] On the other hand, when connecting multiple integrated circuits with different terminal pitches using, for example, a silicon interposer and a TSV, space such as the width of the terminal pitch is required. Therefore, when trying to reduce the size of the electronic component 5130, the width of the terminal pitch becomes a problem, and it may become difficult to provide the many wires necessary to achieve a wide memory bandwidth. For this reason, as described above, it is preferable to use an OS transistor and stack them monolithically. Alternatively, a composite structure combining a memory cell array stacked using TSVs and a memory cell array stacked monolithically may be used.

[0362] A heat sink (heat dissipation plate) may be provided on top of the electronic component 5130 on the substrate on which the electronic component 5130 is mounted. When a heat sink is provided, it is preferable that the heights of the integrated circuits mounted on the interposer 5131 be the same. For example, it is preferable that the heights of chip 5101 and chip 5102 of the electronic component 5130 be the same.

[0363] To mount the electronic component 5130 onto another substrate, the package substrate 5132 may have electrodes 5133 at its bottom. The electrodes 5133 can be formed, for example, with solder balls. The electronic component 5130 can be mounted using a BGA (Ball Grid Array) method by arranging solder balls in a matrix at the bottom of the package substrate 5132. The electrodes 5133 may also be formed with conductive pins. The electronic component 5130 can be mounted using a PGA (Pin Grid Array) method by arranging conductive pins in a matrix at the bottom of the package substrate 5132.

[0364] The electronic component 5130 can be mounted on other boards using various mounting methods, not limited to BGA or PGA. For example, mounting methods such as SPGA (Staggered Pin Grid Array), LGA (Land Grid Array), QFP (Quad Flat Package), QFJ (Quad Flat J-leaded package), or QFN (Quad Flat Non-leaded package) can be used.

[0365] <Electronic Devices> A semiconductor device according to one aspect of the present invention can be applied to various electronic devices (for example, information terminals, computers, smartphones, e-book readers, digital still cameras, video cameras, recording and playback devices, navigation systems, game consoles, etc.). It can also be applied to image sensors, IoT (Internet of Things), healthcare-related equipment, etc. Here, "computer" includes tablet computers, notebook computers, desktop computers, and large computers such as server systems.

[0366] An example of an electronic device to which a semiconductor device according to one aspect of the present invention can be applied will be described. By using a semiconductor device according to one aspect of the present invention in the electronic device shown in this embodiment, at least one of the following can be achieved: miniaturization and reduced power consumption. Furthermore, by reducing the power consumption of the circuit in the electronic device, heat generation from the circuit can be reduced, thereby suppressing adverse effects on the circuit itself, peripheral circuits, and modules caused by such heat generation. In addition, by using a semiconductor device according to one aspect of the present invention, it is possible to realize an electronic device that operates stably even in high-temperature environments, thereby increasing the reliability of the electronic device.

[0367] The electronic devices shown in this embodiment may include a processing unit, a memory device, an input device, an output device, and a control device. A semiconductor device according to one aspect of the present invention can be applied to the processing unit, memory device, input device, output device, and control device of the electronic devices.

[0368] Furthermore, the electronic devices shown in this embodiment may have sensors (including functions for detecting, detecting, or measuring force, displacement, position, velocity, acceleration, angular velocity, rotational speed, distance, light, liquid, magnetism, temperature, chemical substances, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared radiation).

[0369] Furthermore, the electronic device shown in this embodiment may have one or more display units. This allows the electronic device to have functions such as displaying various information (still images, videos, and text images, etc.) on the display units. Furthermore, the electronic device shown in this embodiment may have one or more cameras. This allows the electronic device to have functions such as capturing still images or videos and saving them to a recording medium (external or built into the camera).

[0370] Furthermore, the electronic devices shown in this embodiment may also have a function for communication (wireless or wired communication). This allows the electronic devices to exchange information with other electronic devices.

[0371] Furthermore, the electronic devices shown in this embodiment may have the capability to perform large-scale calculations such as learning and inference using artificial neural networks. This allows the electronic devices to be used as electronic devices compatible with cloud AI or edge AI.

[0372] [Information Terminals] A semiconductor device according to one aspect of the present invention can be applied to various information terminals. Examples of such information terminals include desktop information terminals (such as desktop personal computers), notebook information terminals (such as notebook personal computers), tablet information terminals (such as e-book readers), portable information terminals (such as smartphones), and wristwatch-type information terminals (such as smartwatches). Examples of such information terminals include wearable information terminals such as VR (Virtual Reality) devices, AR (Augmented Reality) devices, SR (Substitutional Reality) devices, MR (Mixed Reality) devices, and devices implementing spatial computing such as spatial computers.

[0373] Figure 17A shows an example of an information terminal, a portable information terminal 8100 such as a smartphone.

[0374] The information terminal 8100 includes a housing 8101, a display unit 8102, a power button 8103, operation buttons 8104, a speaker 8105, a microphone 8106, a camera 8107, a light source 8108, and electronic components 8109, among other things. The display unit 8102 may also function as a touch panel.

[0375] The electronic component 8109 can be the electronic component 5110 and the electronic component 5130 described above. In addition, at least a part of the electronic component 8109 can be a semiconductor device according to one aspect of the present invention.

[0376] Figure 17B shows a desktop-type information terminal 8200 as an example of an information terminal.

[0377] The information terminal 8200 includes a main unit 8201, a display unit 8202, a keyboard 8203, and the like. The main unit 8201 includes an electronic component 8209.

[0378] As electronic component 8209, the aforementioned electronic component 5110 and electronic component 5130, etc., can be applied. Furthermore, at least a portion of electronic component 8209 can be a semiconductor device according to one aspect of the present invention.

[0379] Figure 17C shows an example of an information terminal, a glasses-type information terminal 8300 that can be used for AR devices and the like.

[0380] The information terminal 8300 includes a main unit 8301, a display unit 8302, a mounting unit 8303, a lens 8304, an electronic component 8309, and the like. A secondary battery 8305 is provided in the mounting unit 8303. The secondary battery 8305 is connected to the main unit via a cable 8306.

[0381] Cable 8306 supplies power from the secondary battery 8305 to the main unit 8301. The main unit 8301 is equipped with a wireless receiver and can display received image data and other video information on the display unit 8302. In addition, a camera provided on the main unit 8301 captures the movements of the user's eyeballs and eyelids, and by calculating the user's gaze based on that information, the user's gaze can be used as an input means.

[0382] As electronic component 8309, the aforementioned electronic component 5110 and electronic component 5130, etc., can be applied. Furthermore, at least a portion of electronic component 8309 can be a semiconductor device according to one aspect of the present invention.

[0383] Figure 17D shows an example of an information terminal, a goggle-type information terminal 8400 that can be used for VR equipment and the like.

[0384] The information terminal 8400 includes a housing 8401, two display units 8402, operation buttons 8403, a band-shaped fastener 8404, and electronic components 8409. A secondary battery 8405 is also provided on the fastener 8404.

[0385] Since the information terminal 8400 has two display units 8402, the user can view one display unit per eye. This allows for the display of high-resolution images, even when performing 3D displays using parallax.

[0386] As electronic component 8409, the aforementioned electronic component 5110 and electronic component 5130, etc., can be applied. Furthermore, at least a portion of electronic component 8409 can be a semiconductor device according to one aspect of the present invention.

[0387] [Imaging Equipment] A semiconductor device according to one aspect of the present invention can be applied to imaging equipment such as a video camera.

[0388] Figure 17E shows a video camera 8500 as an example of an imaging device.

[0389] The video camera 8500 includes a first housing 8501, a second housing 8502, a display unit 8503, an operation switch 8504, a lens 8505, a connection unit 8506, and an electronic component 8509. The operation switch 8504 and the lens 8505 are provided in the first housing 8501, and the display unit 8503 is provided in the second housing 8502. The first housing 8501 and the second housing 8502 are connected by the connection unit 8506.

[0390] As electronic component 8509, the aforementioned electronic component 5110 and electronic component 5130, etc., can be applied. Furthermore, at least a portion of electronic component 8509 can be a semiconductor device according to one aspect of the present invention.

[0391] While a video camera was used as an example of imaging equipment in this explanation, the scope is not limited to this. Other imaging equipment includes, for example, digital cameras, surveillance cameras, security cameras, pet cameras, and network cameras.

[0392] [Game console] A semiconductor device according to one aspect of the present invention can be applied to a game console such as a portable game console.

[0393] Figure 17F shows the portable game console 8600 as an example of a game console.

[0394] The portable game console 8600 includes a casing 8601, a display unit 8602, buttons 8603, and the like.

[0395] Furthermore, the video from the aforementioned game console can be output by display devices such as televisions, personal computer displays, game displays, and head-mounted displays.

[0396] The electronic component 8609 can be the electronic component 5110 and the electronic component 5130 described above. In addition, at least a portion of the electronic component 8609 can be a semiconductor device according to one aspect of the present invention.

[0397] While portable game consoles have been used as an example here, the definition of a game console is not limited to them. Other examples of game consoles include home consoles, arcade game machines installed in entertainment facilities (such as game centers and amusement parks), and pitching machines used for batting practice in sports facilities.

[0398] [Mobile Devices] A semiconductor device according to one aspect of the present invention can be applied to mobile devices such as automobiles.

[0399] Figure 17G shows an automobile 8700 as an example of a mobile device.

[0400] The automobile 8700 includes a display unit 8701, a display unit 8702, and a display unit 8703 mounted on the dashboard, a display unit 8704 mounted on the pillar, an electronic component 8709, and the like.

[0401] Furthermore, each of the display units 8701 to 8704 can display various information transmitted by wired or wireless communication from a control device having an electronic component 8709. For example, each of the display units 8701 to 8703 can display various information such as navigation information, speedometer, tachometer, mileage, fuel gauge, gear status, or air conditioning settings. Display unit 8704 can display images from an imaging device installed on the outside of the vehicle to enhance safety by supplementing the view obstructed by the pillars (blind spots).

[0402] The electronic component 8709 can be the electronic component 5110 and the electronic component 5130 described above. Furthermore, at least a portion of the electronic component 8709 can be a semiconductor device according to one aspect of the present invention.

[0403] While automobiles were used as an example of a mode of transport here, they are not the only examples. Other modes of transport include trains, monorails, ships, and aerial vehicles (helicopters, unmanned aerial vehicles (drones), airplanes, rockets, etc.).

[0404] [Electrical Appliances] A semiconductor device according to one aspect of the present invention can be applied to electrical appliances such as vacuum cleaners.

[0405] Figure 17H ​​shows a vacuum cleaner 8800 as an example of an electrical appliance.

[0406] The vacuum cleaner 8800 includes a housing 8801, a display unit 8802 located on the top surface of the housing 8801, a plurality of cameras 8803 located on the side of the housing 8801, a brush 8804, operation buttons 8805, a secondary battery 8806, and electronic components 8809, among other things. Although not shown, the vacuum cleaner 8800 also includes wheels, a suction port, various sensors, and the like.

[0407] The vacuum cleaner 8800 can function as a cleaning robot. For example, the vacuum cleaner 8800 can move autonomously, detect debris, dust, and other particles (shown as "dust" in the diagram), and suck them up through the suction port. For example, the vacuum cleaner 8800 can analyze images captured by the camera 8803 to determine the presence or absence of obstacles such as walls, furniture, or steps. Furthermore, if the image analysis detects an object that might get tangled in the brush 8804, such as wiring, the rotation of the brush 8804 can be stopped.

[0408] The electronic component 8809 can be the electronic component 5110 and the electronic component 5130 described above. Furthermore, at least a portion of the electronic component 8809 can be a semiconductor device according to one aspect of the present invention.

[0409] While a vacuum cleaner was used as an example of an electrical appliance here, it is not limited to this. Other electrical appliances include, for example, electric refrigerators / freezers, microwave ovens, electric ovens, rice cookers, water heaters, induction cooktops, water dispensers, heating and cooling appliances including air conditioners, washing machines, dryers, and audio-visual equipment.

[0410] <Large-scale computer> A semiconductor device according to one aspect of the present invention can be used, for example, in a large-scale computer used for scientific and technical calculations.

[0411] Figure 18A shows a large-scale computer 5500 suitable for scientific and technical calculations. The large-scale computer 5500 has one or more computers 5520 housed in a rack 5510. The large-scale computer 5500 is sometimes referred to as a supercomputer.

[0412] The computer 5520 has one or more processing boards. These processing boards are equipped with, for example, arithmetic processing units such as a CPU, GPU, NPU, and TPU, storage devices such as registers, cache memory, main memory, and storage. A semiconductor device according to one aspect of the present invention can be applied to these processing boards.

[0413] The 5500 mainframe computer can also function as a parallel computer. By using the 5500 mainframe computer as a parallel computer, it is possible to perform large-scale calculations necessary for, for example, artificial intelligence training and inference.

[0414] <Space Equipment> A semiconductor device according to one aspect of the present invention can be used, for example, in space equipment such as a device that processes and stores information.

[0415] A semiconductor device according to one aspect of the present invention may include an OS transistor. The OS transistor exhibits little change in electrical characteristics due to radiation irradiation (it can also be said to have high resistance to radiation). Therefore, it is preferable to use a semiconductor device including an OS transistor in environments where radiation may be incident (such as outer space).

[0416] Figure 18B shows an example of space equipment, specifically a satellite 6800. The satellite 6800 comprises a body 6801, a solar panel 6802, an antenna 6803, a secondary battery 6804, and a control device 6805. Figure 18B also illustrates a planet 6809 in outer space. Outer space generally refers to altitudes of 100 km or higher, but the outer space described herein may include the thermosphere, mesosphere, and stratosphere.

[0417] Furthermore, although not shown in the diagram, a battery management system (also known as a BMS) or a battery control circuit may be provided with the secondary battery 6804. By using an OS transistor in the battery management system or battery control circuit, low power consumption and high reliability even in outer space can be achieved.

[0418] Furthermore, outer space is an environment with radiation levels more than 100 times higher than those on Earth. Radiation can be categorized into electromagnetic waves (electromagnetic radiation), such as X-rays or gamma rays, or particle radiation, such as alpha rays, beta rays, neutrons, protons, heavy ions, or mesons.

[0419] The solar panel 6802 generates the power necessary for the satellite 6800 to operate when exposed to sunlight. However, in situations where, for example, the solar panel 6802 is not exposed to sunlight, or where the amount of sunlight shining on the solar panel 6802 is low, the solar panel 6802 generates less power. Therefore, the satellite 6800 may not generate the power necessary to operate. To operate the satellite 6800 even when the power generated by the solar panel 6802 is low, the satellite 6800 may be equipped with a secondary battery 6804. The solar panel 6802 is sometimes called a solar cell module.

[0420] The artificial satellite 6800 can generate signals. The signals are transmitted via the antenna 6803. Also, for example, a receiver installed on the ground or another artificial satellite can receive the signals. For example, the receiver can measure its own position by receiving the signals transmitted by the artificial satellite 6800. From the above, the artificial satellite 6800 can constitute a satellite positioning system.

[0421] Also, the control device 6805 has a function of controlling the artificial satellite 6800. The control device 6805 is constituted by using, for example, any one or more of an arithmetic processing unit and a storage device. It is preferable to use an OS transistor for the control device 6805. Compared with Si transistors, OS transistors have less variation in electrical characteristics due to radiation irradiation. Therefore, by using an OS transistor for the control device 6805, the reliability can be enhanced even in an environment where radiation may be incident.

[0422] Also, the artificial satellite 6800 can be configured to have sensors. For example, by configuring the artificial satellite 6800 to have a visible light sensor, it can have a function of detecting sunlight reflected when hitting an object installed on the ground. Also, by configuring the artificial satellite 6800 to have a thermal infrared sensor, it can have a function of detecting thermal infrared rays emitted from the earth's surface. From the above, the artificial satellite 6800 can have, for example, a function as an earth observation satellite.

[0423] Here, although an artificial satellite is exemplified as an example of space equipment, it is not limited thereto. The semiconductor device according to one aspect of the present invention can be used for space equipment such as a spacecraft, a space capsule, or a space probe.

[0424] <Data Center> A semiconductor device according to an aspect of the present invention can be used, for example, in a storage system applied to a data center or the like. A data center is required to perform long-term management of data, for example, to ensure the immutability of data. When managing long-term data, for example, it is necessary to install storage and servers for storing a huge amount of data, ensure a stable power supply, and ensure cooling facilities. Therefore, for example, it is necessary to increase the size of the building of the data center.

[0425] By using a semiconductor device according to an aspect of the present invention in a storage system applied to a data center, for example, at least one of miniaturization of storage and servers, miniaturization of power supply, and miniaturization of cooling facilities can be achieved. Therefore, space saving of the data center can be achieved.

[0426] Further, since the semiconductor device according to an aspect of the present invention has low power consumption, heat generation from the circuit can be reduced. Therefore, the adverse effects of such heat generation on the circuit itself, peripheral circuits, and peripheral modules can be reduced. Also, by using a semiconductor device according to an aspect of the present invention, a data center with stable operation even in a high-temperature environment can be realized. Therefore, the reliability of the data center can be enhanced.

[0427] FIG. 18C shows a storage system 7100 applicable to a data center. The storage system 7100 has a plurality of servers 7111 as hosts 7110 (illustrated as Host Computer). It also has a plurality of storage devices 7121 as storage 7120 (illustrated as Storage). Further, the host 7110 and the storage 7120 are connected via a storage area network 7130 (SAN: Storage Area Network, illustrated) and a storage control circuit 7140 (illustrated as Storage Controller).

[0428] The host 7110 corresponds to a computer that accesses data stored in the storage 7120. The hosts 7110 may be connected to each other via a network.

[0429] While the 7120 storage device uses flash memory to increase data access speed (which can also be described as the time required to write or read data), this access speed is significantly slower than that of DRAM, which can be used as cache memory within the storage device. Therefore, storage systems typically incorporate cache memory within the storage device to increase data access speed.

[0430] The aforementioned cache memory is used within the storage control circuit 7140 and the storage 7120. Data exchanged between the host 7110 and the storage 7120 is stored in the cache memory within the storage control circuit 7140 and the storage 7120, and then output to the host 7110 or the storage 7120.

[0431] By using OS transistors as the transistors for storing the data in the aforementioned cache memory, and by maintaining a potential corresponding to the data, the frequency of refreshing the cache memory can be reduced, and the power consumption of the cache memory can be lowered. Furthermore, by using a stacked configuration of memory cell arrays, the cache memory can be miniaturized.

[0432] <Information Processing System> Using a semiconductor device according to one aspect of the present invention, it is possible to construct an information processing system in which multiple electronic devices are connected via a network. This enables the exchange of information between multiple electronic devices.

[0433] Figure 18D shows an example configuration of the information processing system 9100. The information processing system 9100 includes various electronic devices and servers located within the network.

[0434] Figure 18D shows examples of electronic devices included in the information processing system 9100, such as a portable information terminal 9120 including a smartphone, a wearable information terminal 9130 including an AR device, a mobile device 9140 including an automobile, a robot 9150 including an industrial robot, an imaging device 9160 including a security camera, and an electrical appliance 9170 including an electric refrigerator. Figure 18D also shows a network 9110 and a large computer 9111 located within the network 9110.

[0435] The information terminal 9120 has an electronic component 9121. The electronic component 9121 can be the electronic component 5110 and the electronic component 5130 described above. In addition, at least a part of the electronic component 9121 can be a semiconductor device according to one aspect of the present invention.

[0436] The information terminal 9130 has an electronic component 9131. The electronic component 9131 can be the electronic component 5110 and the electronic component 5130 described above. In addition, at least a part of the electronic component 9131 can be a semiconductor device according to one aspect of the present invention.

[0437] The mobile body 9140 has an electronic component 9141. The electronic component 9141 can be the electronic component 5110 and the electronic component 5130 described above. In addition, at least a part of the electronic component 9141 can be a semiconductor device according to one aspect of the present invention.

[0438] The robot 9150 has an electronic component 9151. The electronic component 9151 can be the aforementioned electronic component 5110, electronic component 5130, etc. Furthermore, at least a portion of the electronic component 9151 can be a semiconductor device according to one embodiment of the present invention.

[0439] The imaging device 9160 has an electronic component 9161. The electronic component 9161 can be the electronic component 5110 and the electronic component 5130 described above. In addition, at least a part of the electronic component 9161 can be a semiconductor device according to one aspect of the present invention.

[0440] The electrical appliance 9170 has an electronic component 9171. The electronic component 9171 can be the electronic component 5110 and the electronic component 5130 described above. In addition, at least a part of the electronic component 9171 can be a semiconductor device according to one aspect of the present invention.

[0441] Furthermore, each of the electronic components 9121, 9131, 9141, 9151, 9161, and 9171 can perform large-scale calculations such as learning and inference using artificial neural networks. As a result, each of the information terminals 9120, 9130, mobile device 9140, robot 9150, imaging device 9160, and electrical appliance 9170 can be used as electronic devices compatible with edge AI.

[0442] The term "large-scale computer 9111" may, for example, refer to multiple computers installed in a server room or similar location. In the information processing system 9100, the large-scale computer 9111 may also be referred to as a server or cloud server.

[0443] The large computer 9111 has one or more computers. The computers have one or more processing boards. The processing boards are equipped with, for example, arithmetic processing units such as CPUs, GPUs, NPUs, and TPUs, storage devices such as registers, cache memory, main memory, and storage. A semiconductor device according to one aspect of the present invention can be applied to the processing board.

[0444] The mainframe computer 9111 can also function as a parallel computer. By using the mainframe computer 9111 as a parallel computer, it is possible to perform large-scale calculations necessary for artificial intelligence learning and inference, for example.

[0445] When performing wired communication as a network 9110, specifications standardized by the IEEE, such as Ethernet (registered trademark), can be used. Furthermore, types of communication include electrical communication using wires such as twisted-pair cables, and optical communication using optical fibers.

[0446] On the other hand, when performing wireless communication as network 9110, communication protocols or communication technologies that can be used include communication standards such as the fourth-generation mobile communication system (4G), fifth-generation mobile communication system (5G), and sixth-generation mobile communication system (6G), or specifications standardized by IEEE such as Wi-Fi® and Bluetooth®.

[0447] Network 9110 can be, for example, PAN (Personal Area Network), LAN (Local Area Network), CAN (Campus Area Network), MAN (Metropolitan Area Network), WAN (Wide Area Network), or GAN (Global Area Network). For example, by using a GAN in network 9110, it is possible to use the Internet, which is the foundation of the World Wide Web (WWW).

[0448] Furthermore, if the information processing system 9100 is built on a LAN as a network 9110, the possibility of confidential information leakage can be reduced compared to using the Internet.

[0449] Furthermore, a company or individual managing the mainframe computer 9111 can, for example, use the network 9110 to provide services using the information processing system 9100 to users of each electronic device. One example of such services is a usage model called cloud computing. Through this cloud computing, users of the aforementioned electronic devices can utilize the mainframe computer 9111's large-capacity data storage capabilities, large-scale computation capabilities, and other applications.

[0450] In particular, a semiconductor device according to one aspect of the present invention, when installed in the above-mentioned electronic devices and the large computer 9111, can perform large-scale calculations such as artificial neural network models. Furthermore, this enables the information processing system 9100 to provide services to users in a usage form known as cloud AI or edge AI.

[0451] Cloud AI generally refers to a service where the mainframe computer 9111 performs the training and inference of an artificial neural network. The mainframe computer 9111 is pre-trained on collected data, and each electronic device transmits input data to the mainframe computer 9111, where inference is performed on that input data. The mainframe computer 9111 then transmits the results of this inference to each electronic device, which can then use those results. Because the training and inference are performed by the mainframe computer 9111, cloud AI is suitable for processing large amounts of data and for handling complex calculations.

[0452] On the other hand, edge AI generally refers to a service where each electronic device performs the learning and inference of an artificial neural network. In this case, the mainframe computer 9111 provides each electronic device with the artificial neural network model, weight coefficients (sometimes called weight data, connection coefficients, etc.), etc. The results of the learning and inference performed on each electronic device are also transmitted to the mainframe computer 9111. Furthermore, a usage model in which the mainframe computer 9111 learns the artificial neural network and each electronic device performs inference using the learned neural network is also sometimes called edge AI. Edge AI is also sometimes called on-device AI.

[0453] Edge AI performs artificial neural network inference on each individual electronic device, thus reducing the communication time required compared to cloud AI. Therefore, edge AI is well-suited for real-time analysis of input data. Furthermore, the amount of data transmitted between each electronic device and the mainframe computer 9111 is reduced, lowering data communication costs and power consumption. The reduced data transmission also minimizes security risks such as information leaks. For these reasons, edge AI is suitable for building small-scale systems, for example.

[0454] Furthermore, by applying a semiconductor device according to one aspect of the present invention to the electronic equipment shown in this embodiment, power consumption can be reduced. Therefore, as energy demand is expected to increase due to the increased performance or integration of electronic equipment, using a semiconductor device according to one aspect of the present invention can reduce carbon dioxide (CO2) emissions. ２ It is also possible to reduce greenhouse gas emissions, such as those represented by [specific examples of emissions]. Furthermore, because the semiconductor device according to one aspect of the present invention consumes little power, it is also effective as a measure against global warming.

[0455] Furthermore, the contents of this embodiment can be combined as appropriate. Also, the contents of this embodiment can be combined as appropriate with the contents of other embodiments, etc.

[0456] (Notes regarding the description in this specification, etc.) The above embodiments and descriptions of each component in the embodiments are provided below.

[0457] In this specification and the like, a semiconductor device refers to all devices that can function by utilizing semiconductor characteristics. For example, semiconductor elements such as transistors, electronic circuits including semiconductor elements, chips in which electronic circuits are formed on a substrate, electronic components in which chips are housed in packages, and electronic devices in which electronic components are mounted are examples of semiconductor devices. Also, display devices, light-emitting devices, projection devices, lighting devices, optical devices, electro-optical devices, imaging devices, light-receiving devices, detection devices, power supply devices, power storage devices, communication devices, arithmetic devices, control devices, arithmetic processing devices, memory devices, input devices, output devices, input / output devices, signal processing devices, information processing devices, electronic computers, electronic devices, etc. may have semiconductor devices and can also be said to be semiconductor devices themselves.

[0458] In this specification and the like, a "transistor" has three terminals called "gate" (also referred to as gate terminal, gate region, and gate electrode), "source" (also referred to as source terminal, source region, and source electrode), and "drain" (also referred to as drain terminal, drain region, and drain electrode). Also, a transistor has a region (also referred to as a channel formation region) where a channel is formed between the drain and the source. A transistor can allow current to flow between the source and the drain through the channel formation region. Also, a transistor can generate the transfer of an electrical signal or the interaction of potentials, etc. between the source and the drain through the channel formation region. Note that the channel formation region is the region where current mainly flows. The gate is a control terminal that controls the amount of current flowing through the channel formation region. The two terminals that function as the source or the drain are input / output terminals that input or output the current flowing through the channel formation region.

[0459] The two input / output terminals function as either a source or a drain, depending on the transistor's conductivity type (n-channel or p-channel) and the potential applied to its three terminals. Furthermore, the source and drain functions may be reversed when the direction of current changes during circuit operation. Therefore, the terms "source" and "drain" are interchangeable. When describing the connections of a transistor, the expressions "one of the source or drain" (or first electrode, first terminal, etc.) and "the other of the source or drain" (or second electrode, second terminal, etc.) should be used.

[0460] In addition to the three terminals mentioned above, transistors may have a terminal called a "back gate" (also called the back gate terminal, back gate region, or back gate electrode). In this case, one of the gates or back gate of the transistor may be called the first gate, and the other of the gates or back gate may be called the second gate. Also, in the same transistor, the terms "gate" and "back gate" may be interchangeable. Furthermore, if a transistor has three or more gates, each gate may be called the first gate, second gate, third gate, and so on.

[0461] Furthermore, the voltage between the gate and source (gate-source) (unless otherwise specified, the potential of the source is used as the reference) is sometimes called the "gate voltage," the voltage between the drain and source (drain-source) (unless otherwise specified, the potential of the source is used as the reference) is sometimes called the "drain voltage," and the voltage between the back gate and source (back gate-source) (unless otherwise specified, the potential of the source is used as the reference) is sometimes called the "back gate voltage." Also, the current flowing between the drain and source (unless otherwise specified, the direction from drain to source is considered positive) is sometimes called the "drain current." Note that in n-channel transistors, expressions such as high gate voltage, high drain voltage, and high back gate voltage can be appropriately substituted for each other, and in p-channel transistors, expressions such as low gate voltage, low drain voltage, and low back gate voltage can be appropriately substituted for each other. Similarly, in n-channel transistors, expressions such as low gate voltage, low drain voltage, and low back gate voltage can be appropriately substituted for each other, and in p-channel transistors, expressions such as high gate voltage, high drain voltage, and high back gate voltage can be appropriately substituted for each other.

[0462] The "conducting state" or "on state" of a transistor refers to, for example, a state in which the source and drain of the transistor can be considered to be electrically short-circuited, a state in which the gate voltage is higher than the threshold voltage in an n-channel transistor, or a state in which the gate voltage is lower than the threshold voltage in a p-channel transistor. The "non-conducting state" or "off state" of a transistor refers to, for example, a state in which the source and drain of the transistor can be considered to be electrically disconnected, a state in which the gate voltage is lower than the threshold voltage in an n-channel transistor, or a state in which the gate voltage is higher than the threshold voltage in a p-channel transistor.

[0463] Furthermore, unless otherwise specified, the "off-current" of a transistor refers to the drain current when the transistor is in the off state. Note that the off-current and the current flowing between the gate, source, and drain (also called gate leakage current) are sometimes collectively referred to as leakage current.

[0464] In this specification, "capacitive element" refers to a circuit element having a configuration in which a pair of electrodes are provided with a dielectric material in between. However, capacitive elements are not limited to this and may include, for example, parasitic capacitance between two wires, gate capacitance between the source and drain of a transistor and the gate, etc. Furthermore, terms such as "capacitive element," "parasitic capacitance," and "gate capacitance" may be interchangeable with terms such as "capacitance" and "electrostatic capacitance." In addition, terms such as "pair of electrodes," "pair of wires," "pair of terminals," and "pair of conductive layers" of a capacitive element may be interchangeable.

[0465] In this specification, "switch" refers to a circuit element having multiple terminals and having the function of switching (selecting) the conduction or non-conductivity between those terminals. A switch can be said to have the function of controlling whether or not to allow current to flow between multiple terminals, or the function of controlling whether or not to generate the transmission or reception of electrical signals or the interaction of potentials between multiple terminals. For example, if a switch has two terminals, the state in which the two terminals can be considered to be electrically short-circuited is called the "conducting state" or "on state". Conversely, the state in which the two terminals can be considered to be electrically disconnected is called the "non-conducting state" or "off state". Note that electrical switches, mechanical switches, etc., can be used as switches.

[0466] In this specification, a single circuit element shown in a circuit diagram includes cases where multiple such circuit elements are connected in series, parallel, or series-parallel.

[0467] In this specification, a signal line refers to wiring to which a signal is supplied, and a power line refers to wiring to which a constant potential is supplied. Therefore, the terms "signal line" and "power line" can sometimes be replaced with the term "wiring." For example, a signal line can be considered to have a constant potential if the signal supplied to it does not change. Similarly, a power line can be considered to have a signal if the potential supplied to it changes. Therefore, the terms "potential" and "signal" supplied to wiring can sometimes be interchangeable.

[0468] In this specification, voltage refers to the potential difference from a reference potential (such as ground potential). Therefore, the terms "voltage" and "potential" can sometimes be used interchangeably.

[0469] In this specification, the terms "electrode," "wiring," and "terminal" do not functionally limit these components. Therefore, an electrode may be part of wiring or a terminal, wiring may be part of an electrode or a terminal, and a terminal may be part of an electrode or wiring. Furthermore, "electrode or wiring" includes cases where multiple electrodes or multiple wirings are integrated. Similarly, "terminal" includes cases where multiple electrodes, multiple wirings, or multiple terminals are integrated. Additionally, the terms "electrode," "wiring," and "terminal" may be replaced with terms such as "region" or "conductive layer."

[0470] In this specification, the term "node" may be replaced with terms such as "electrode," "wiring," "terminal," "region," or "conductive layer," depending on the circuit configuration, device structure, etc. Conversely, terms such as "electrode," "wiring," and "terminal" may be replaced with the term "node."

[0471] In this specification, terms containing the words "layer" and "film" may be interchangeable. For example, the terms "conductive layer" and "conductive film" may be interchangeable. For example, the terms "insulating layer" and "insulating film" may be interchangeable. For example, the terms "semiconductor layer" and "semiconductor film" may be interchangeable. Furthermore, in terms containing the words "layer" and "film," these terms may be replaced with other terms. For example, the terms "conductive layer" and "conductive film" may be interchangeable with the term "conductor." For example, the terms "insulating layer" and "insulating film" may be interchangeable with the term "insulator."

[0472] In this specification, terms such as "above" and "below" are used for convenience to describe the positional relationships of the constituent elements. Therefore, these terms can be replaced with other terms and the expression can be appropriately modified. For example, the expression "Element B is located above Element A, and Element C is located below Element A" can be changed to "Element B is located below Element A, and Element C is located above Element A." Similarly, the expression "Element B is located above Element A, and Element C is located below Element A" can be changed to "Element B is located to the left (or right) of Element A, and Element C is located to the right (or left) of Element A." It should be noted that when using the terms "above" or "below," the positional relationship of the constituent elements is not limited to directly above or directly below. Therefore, the term "above" can be replaced with terms such as "upper," "upper side," or "upper layer," and the term "below" can be replaced with terms such as "downward," "lower side," or "lower layer." Furthermore, for example, the expression "element B on element A" is not limited to cases where element B is placed in contact with element A, but also includes cases where other elements (including space) are provided between element A and element B.

[0473] In this specification, "parallel" does not mean strictly parallel. Unless otherwise specified, "parallel" may include a state in which two lines or planes are positioned at an angle of -5° to 5°. Alternatively, it may include a state in which two lines or planes are positioned at an angle of -10° to 10°. Or, it may include a state in which two lines or planes are positioned at an angle of -30° to 30°. Therefore, the term "parallel" may be replaced with terms such as "approximately parallel" or "substantially parallel." Also, "parallel" may mean "parallel or approximately parallel."

[0474] In this specification, "perpendicular" does not mean strictly perpendicular. Unless otherwise specified, "perpendicular" may include a state in which two lines or planes are positioned at an angle of 85° to 95°. Alternatively, it may include a state in which two lines or planes are positioned at an angle of 80° to 100°. Or, it may include a state in which two lines or planes are positioned at an angle of 60° to 120°. Therefore, the term "perpendicular" may be replaced with terms such as "approximately perpendicular" or "substantially perpendicular." Also, "perpendicular" may mean "perpendicular or approximately perpendicular."

[0475] In this specification, when terms such as "identical," "same," "equal," "simultaneous," "consistent," and "uniform" (including their synonyms) are used in reference to count values, measured values, etc., these terms shall include errors. Therefore, unless otherwise specified, these terms may include an error of plus or minus 10%, or an error of plus or minus 20%. Thus, "identical" may mean "identical or approximately identical," "same" may mean "same or approximately the same," "equal" may mean "equal or approximately equal," "simultaneous" may mean "simultaneous or approximately simultaneous," "consistent" may mean "consistent or approximately consistent," and "uniform" may mean "uniform or approximately uniform."

[0476] In this specification, ordinal numbers such as "first," "second," etc., are used to avoid confusion of components and do not limit the number of components, their order, etc. For example, a component referred to as "first" in one embodiment may be referred to as "second" in other embodiments, claims, etc. Also, for example, a component referred to as "first" in one embodiment may be omitted in other embodiments, claims, etc. Furthermore, even if a term does not have an ordinal number in this specification, an ordinal number may be added in the claims. Also, even if a term has an ordinal number in this specification, a different ordinal number may be added in the claims. Furthermore, even if a term has an ordinal number in this specification, an ordinal number may be omitted in the claims.

[0477] In this specification, one of the source or drain (also called the two input / output terminals) of a transistor may be referred to as the first terminal, and the other of the source or drain of a transistor may be referred to as the second terminal. Therefore, a transistor has at least a gate (also called the gate terminal), a first terminal, and a second terminal. In addition, one terminal of a capacitive element (also called one of a pair of terminals) may be referred to as the first terminal, and the other terminal of a capacitive element (also called the other of a pair of terminals) may be referred to as the second terminal. In addition, one terminal of a display element may be referred to as the first terminal, and the other terminal of a display element may be referred to as the second terminal. In addition, one terminal of a liquid crystal element may be referred to as the first terminal, and the other terminal of a liquid crystal element may be referred to as the second terminal. In addition, one terminal of a light-emitting element may be referred to as the first terminal, and the other terminal of a light-emitting element may be referred to as the second terminal. In addition, one terminal of a light-receiving element may be referred to as the first terminal, and the other terminal of a light-receiving element may be referred to as the second terminal. In addition, one of the anode or cathode of a diode (also called one of the pair of terminals) is sometimes called the first terminal, and the other of the anode or cathode of a diode (also called the other of the pair of terminals) is sometimes called the second terminal.

[0478] In this specification, "connection" includes, for example, "electrical connection." When "electrical connection" is used to define the connection relationship of circuit elements as a physical object, "electrical connection" includes, for example, "direct connection" and "indirect connection." "A and B are directly connected" means, for example, that A and B are connected without the use of a circuit element (e.g., a transistor or a switch; however, wiring is not a circuit element). On the other hand, "A and B are indirectly connected" means, for example, that A and B are connected via one or more circuit elements. A, B, and C (described later) refer to objects such as elements, circuits, wiring, electrodes, terminals, semiconductor layers, and conductive layers.

[0479] Here, when we define "A and B are indirectly connected," it refers to the following type of connection, as an example: That is, assuming the circuit is operating, if there are times during the circuit's operation when electrical signals are exchanged or potential interactions occur between A and B, then such a circuit can be defined as having "A and B indirectly connected" as a physical object. Even if there are times when no electrical signals are exchanged or potential interactions occur between A and B, if there are times during the circuit's operation when electrical signals are exchanged or potential interactions occur between A and B, then it can be defined as having "A and B indirectly connected." Note that "A and B are indirectly connected" is a definition of the connection relationship between circuit elements as a physical object. Therefore, for example, even if no power supply voltage is supplied to the circuit and the circuit is not operating, the circuit can still be defined as having "A and B indirectly connected" as a physical object (however, as an example, this is limited to cases where, when power supply voltage is supplied to the circuit and the circuit is operating, electrical signals are exchanged or potential interactions occur between A and B during the circuit's operation).

[0480] The following are specific examples of "indirect connections". First, an example of a case where "A and B are indirectly connected" is when A and B are connected via the source and drain of one or more transistors, as shown in Figures 19A1 and 19A2. Another example of a case where "A and B are indirectly connected" is when A and B are connected via one or more switches. When "A and B are indirectly connected", assuming the circuit is operating, one transistor between A and B will be in an ON state, conducting state, or a state in which current can flow at least once. Note that when "A and B are indirectly connected", this includes a time when one transistor between A and B is in an OFF state or non-conducting state. When "A and B are indirectly connected" and multiple transistors are connected between A and B, assuming the circuit is operating, each of the multiple transistors between A and B will be in an ON state, conducting state, or a state in which current can flow at least once. In other words, when "A and B are indirectly connected," it is not necessary for all of the transistors to be in an ON state, a conducting state, or a state in which current can flow simultaneously. Therefore, when "A and B are indirectly connected," it includes cases where the transistors between A and B are in an OFF state or a non-conducting state at the same time or at different times. As another example, as shown in Figure 19A3, when A and C are connected via the source and drain of transistor TrP, and B and C are connected via the source and drain of transistor TrQ, it can be defined as "A and C are indirectly connected," "B and C are indirectly connected," or "A and B are indirectly connected." However, as will be discussed later, if a constant potential V is supplied to C from a power supply or GND, it can be said that "A and C are indirectly connected," or "B and C are indirectly connected," but it cannot be said that "A and B are indirectly connected."

[0481] Having shown examples of cases where a connection can be considered "indirect" and cases where it cannot, let's look at another example of a case where a connection cannot be considered "indirect." Even if electrical signals are exchanged or potential interactions occur between A and B during the operation of the circuit, there are exceptional cases where it cannot be said that "A and B are indirectly connected." An example of such an exceptional case is when A and B are connected via an insulator. In other words, when A and B are connected via an insulator, it cannot be said that "A and B are indirectly connected." A specific example of when A and B are connected via an insulator is when a capacitive element is connected between A and B, as shown in Figure 19A4. Another example of when A and B are connected via an insulator is when a transistor gate insulating film is interposed between A and B, as shown in Figure 19A5. In this case, it cannot be said that "A (the gate of the transistor) and B (the source or drain of the transistor) are indirectly connected."

[0482] Another example of a situation where it cannot be said that "A and B are indirectly connected" is when there is no timing for the exchange of electrical signals or potential interaction between A and B. For example, as shown in Figures 19A6 and 19A7, multiple transistors are connected via sources and drains in the path from A to B, and a constant potential V is supplied to the nodes between the transistors from a power source or GND. In this case, it cannot be said that "A and B are indirectly connected," but it can be said that "A and V are indirectly connected," or "B and V are indirectly connected." In Figure 19A3, if A and C are connected via the source and drain of transistor TrP, and B and C are connected via the source and drain of transistor TrQ, and a constant potential V is supplied to C from a power supply or GND, then the connection relationship is the same as in Figures 19A6 and 19A7, so it cannot be said that "A and B are indirectly connected," but it can be said that "A and C are indirectly connected" or "B and C are indirectly connected."

[0483] As shown above, we have provided an example of "indirect connection." As an example, the provisions for "indirect connection" are included in the provisions for "electrical connection," so if "A and B are indirectly connected," then "A and B are electrically connected."

[0484] Next, we will show specific examples of "direct connection." Examples of cases where "A and B are directly connected" include cases where A and B are connected without a circuit element in between, as shown in Figures 19B1, 19B2, and 19B3. Furthermore, as shown in Figures 19B4 and 19B5, when A and B are connected to a power source that supplies a constant potential V, or to GND, without a circuit element in between, we can say that "A and B are directly connected," "A and V are directly connected," or "B and V are directly connected." Furthermore, as shown in Figure 19B6, even when A (or B) is connected to a constant potential V via the source and drain of a transistor, we can say that "A and B are directly connected." Furthermore, since A and V, or B and V, are connected via the source and drain of a transistor, they cannot be said to be directly connected, and we can say that "A and V are indirectly connected," or "B and V are indirectly connected."

[0485] As shown above, an example of "direct connection" has been given, but as an example, since the provisions for "direct connection" are included in the provisions for "electrical connection," if "A and B are directly connected," then "A and B are electrically connected."

[0486] 100: Semiconductor device, 101: Current comparison unit, 101A: Inverter, 101B: Inverter, 102A: Current mirror unit, 102B: Current mirror unit, 103A: Cascode connection unit, 103B: Cascode connection unit, 104: Voltage comparison unit, 105: Reset unit, M1a: Transistor, M1b: Transistor, M2a: Transistor, M2b: Transistor, M3a: Transistor, M3b: Transistor, M3c: Transistor, M3d: Transistor, M4a: Transistor, M4b: Transistor, M4c: Transistor, M5a: Transistor, M5b: Transistor, M5c: Transistor M5d: Transistor, M6a: Transistor, M6b: Transistor, M6c: Transistor, M6d: Transistor, Mdum: Dummy Transistor, Tr: Unit Transistor, ILA: Wiring, ILB: Wiring, OLA: Wiring, OLB: Wiring, VLS: Wiring, VLD: Wiring, VLP1: Wiring, VLP2: Wiring, VLC: Wiring, ND1A: Node, ND1B: Node, ND2A: Node, ND2B: Node, ND3: Node, IinA: Input Current, IinB: Input Current, I1A: Current, I1B: Current, I2A: Current, I2B: Current, 150: Semiconductor Device, 200: Transistor, 310: Transistor

Claims

A semiconductor device having a function for comparing a first current and a second current, A first current mirror unit that generates a third current from the first current, A second current mirror unit that generates a fourth current from the second current, A first cascode connection unit connected to the first current mirror unit, The second cascode connection section connected to the second current mirror section, A voltage comparison unit that generates a fifth current and a sixth current based on a first potential and a second potential, It has a current comparison unit that outputs a third potential based on the third current and the fifth current, and the fourth current and the sixth current, The first potential is the potential between the first current mirror section and the first cascode connection section in the current path through which the third current flows. The second potential is the potential between the second current mirror section and the second cascode connection section in the current path through which the fourth current flows. The voltage comparison unit has a function to make the fifth current greater than the sixth current when the first potential is greater than the second potential, and a function to make the fifth current less than the sixth current when the first potential is less than the second potential. Semiconductor equipment. 　 In claim 1, The voltage comparison unit comprises a first current generating transistor and a second current generating transistor. The first current generating transistor has the function of generating the fifth current, The second current generating transistor has the function of generating the sixth current, The gate of the first current generating transistor is supplied with the second potential. The gate of the second current generating transistor is given the first potential. Semiconductor equipment. 　 In claim 2, The channel lengths of the first current generating transistor and the second current generating transistor are greater than the channel length of at least one transistor in the first current mirror section, the second current mirror section, the first cascode connection section, the second cascode connection section, and the current comparison section, respectively. Semiconductor equipment. 　 In claim 2, The multiple unit transistors constituting the first current-generating transistor and the second current-generating transistor are arranged in a common centroid configuration. Semiconductor equipment. 　 In claim 1, The current comparison unit has an inverter loop composed of a first inverter and a second inverter. The third current and the fifth current are input to one of the two power terminals of the first inverter. The fourth current and the sixth current are input to one of the two power terminals of the second inverter. Semiconductor equipment. 　 In claim 5, The voltage comparison unit comprises a first current generating transistor and a second current generating transistor. The first current generating transistor has the function of generating the fifth current, The second current generating transistor has the function of generating the sixth current, The gate of the first current generating transistor is supplied with the second potential. The gate of the second current generating transistor is given the first potential. Semiconductor equipment. 　 In claim 6, The channel lengths of the first current generating transistor and the second current generating transistor are greater than the channel length of at least one transistor in the first current mirror section, the second current mirror section, the first cascode connection section, the second cascode connection section, and the current comparison section, respectively. Semiconductor equipment. 　 In claim 6, The multiple unit transistors constituting the first current-generating transistor and the second current-generating transistor are arranged in a common centroid configuration. Semiconductor equipment. 　 In claim 5, It has a reset section, A fourth potential is applied to the other of the two power terminals of the first inverter and to the other of the two power terminals of the second inverter. The reset unit has the function of applying the fourth potential to the output terminal of the first inverter, the output terminal of the second inverter, one of the two power supply terminals of the first inverter, and one of the two power supply terminals of the second inverter. Semiconductor equipment. 　 In claim 9, The voltage comparison unit comprises a first current generating transistor and a second current generating transistor. The first current generating transistor has the function of generating the fifth current, The second current generating transistor has the function of generating the sixth current, The gate of the first current generating transistor is supplied with the second potential. The gate of the second current generating transistor is given the first potential. Semiconductor equipment. 　 In claim 10, The channel lengths of the first current generating transistor and the second current generating transistor are greater than the channel length of at least one transistor in the first current mirror section, the second current mirror section, the first cascode connection section, the second cascode connection section, the current comparison section, and the reset section, respectively. Semiconductor equipment. 　 In claim 10, The multiple unit transistors constituting the first current-generating transistor and the second current-generating transistor are arranged in a common centroid configuration. Semiconductor equipment. 　 It has a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, a tenth transistor, an eleventh transistor, a twelfth transistor, a thirteenth transistor, a fourteenth transistor, a fifteenth transistor, a sixteenth transistor, a seventeenth transistor, an eighteenth transistor, and a nineteenth transistor. The first terminal of the first transistor is electrically connected to the first terminal of the third transistor, the gate of the second transistor, the gate of the fourth transistor, the first terminal of the sixth transistor, and the first wiring. The first terminal of the second transistor is electrically connected to the first terminal of the fourth transistor, the gate of the first transistor, the gate of the third transistor, the first terminal of the seventh transistor, and the second wiring. The second terminal of the first transistor is electrically connected to the first terminal of the fifth transistor, the first terminal of the ninth transistor, and the first terminal of the thirteenth transistor. The second terminal of the second transistor is electrically connected to the first terminal of the eighth transistor, the first terminal of the tenth transistor, and the first terminal of the fourteenth transistor. The second terminal of the ninth transistor is electrically connected to the first terminal of the eleventh transistor. The second terminal of the tenth transistor is electrically connected to the first terminal of the eleventh transistor. The second terminal of the 13th transistor is electrically connected to the gate of the 10th transistor and the first terminal of the 17th transistor. The second terminal of the 14th transistor is electrically connected to the gate of the 9th transistor and the first terminal of the 18th transistor. The gate of the 17th transistor is electrically connected to the first terminal of the 12th transistor, the gate of the 16th transistor, and the third wiring. The gate of the 18th transistor is electrically connected to the first terminal of the 15th transistor, the gate of the 19th transistor, and the fourth wiring. The second terminal of the 12th transistor is electrically connected to the first terminal of the 16th transistor. The second terminal of the 15th transistor is electrically connected to the first terminal of the 19th transistor. The second terminal of the third transistor, the second terminal of the fourth transistor, the second terminal of the fifth transistor, the second terminal of the sixth transistor, the second terminal of the seventh transistor, and the second terminal of the eighth transistor are each electrically connected to the fifth wiring. The gates of the fifth transistor, the sixth transistor, the seventh transistor, and the eighth transistor are each electrically connected to the sixth wiring. The second terminal of the 11th transistor, the second terminal of the 16th transistor, the second terminal of the 17th transistor, the second terminal of the 18th transistor, and the second terminal of the 19th transistor are each electrically connected to the 7th wiring. The gate of the 11th transistor is electrically connected to the 8th wiring, The gates of the 12th transistor, the 13th transistor, the 14th transistor, and the 15th transistor are each electrically connected to the 9th wiring. Semiconductor equipment. 　 In claim 13, The third transistor and the fourth transistor are both n-channel transistors. Each of the first transistor, the second transistor, the ninth transistor, the tenth transistor, the sixteenth transistor, the seventeenth transistor, the eighteenth transistor, and the nineteenth transistor is a p-channel transistor. Semiconductor equipment. 　 In claim 13, The third transistor and the fourth transistor are both p-channel transistors. Each of the first transistor, the second transistor, the ninth transistor, the tenth transistor, the sixteenth transistor, the seventeenth transistor, the eighteenth transistor, and the nineteenth transistor is an n-channel transistor. Semiconductor equipment. 　 In claim 13, The channel lengths of the first transistor, the second transistor, the third transistor, and the fourth transistor are each greater than the channel length of at least one of the fifth transistor, the sixth transistor, the seventh transistor, and the eighth transistor. Semiconductor equipment. 　 In claim 13, The channel lengths of the ninth transistor and the tenth transistor are each greater than the channel length of at least one of the fifth transistor, the sixth transistor, the seventh transistor, and the eighth transistor. Semiconductor equipment. 　 In claim 13, The channel lengths of the 16th transistor, the 17th transistor, the 18th transistor, and the 19th transistor are each greater than the channel length of at least one of the 5th transistor, the 6th transistor, the 7th transistor, and the 8th transistor. Semiconductor equipment. 　 In claim 13, The plurality of unit transistors constituting the 9th transistor and the 10th transistor are arranged in a common centroid configuration. Semiconductor equipment. 　 In claim 13, Each of the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the seventh transistor, and the eighth transistor includes an oxide semiconductor in its channel formation region. Semiconductor equipment.

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