Method for manufacturing semiconductor and device for manufacturing semiconductor
The semiconductor manufacturing apparatus achieves efficient and reliable wafer processing by integrating cleaning and processing through electromagnetic heating, addressing inefficiencies in existing methods.
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- HITACHI HIGH TECH CORP
- Filing Date
- 2025-01-15
- Publication Date
- 2026-07-23
AI Technical Summary
Existing semiconductor manufacturing processes face inefficiencies due to the need for separate cleaning processes, which increase processing time and risk of reaction product quality changes, affecting processing efficiency and yield.
A semiconductor manufacturing apparatus that integrates wafer processing and cleaning by using electromagnetic waves to heat the wafer and processing chamber, allowing simultaneous desorption of reaction products from the wafer surface and cleaning of the chamber.
Enables high-efficiency and high-yield wafer processing with reduced processing time and improved reproducibility by integrating cleaning and processing steps, eliminating the need for separate cleaning procedures.
Smart Images
Figure JP2025001055_23072026_PF_FP_ABST
Abstract
Description
Semiconductor manufacturing method and semiconductor manufacturing apparatus
[0001] This invention relates to a semiconductor manufacturing method and a semiconductor manufacturing apparatus.
[0002] Semiconductor devices used in electronic devices such as smartphones and PCs are becoming smaller and more three-dimensional in order to meet the demands for lower power consumption, higher capacity, and higher performance. In the manufacturing process of these three-dimensional semiconductor devices, processing of high aspect ratio structures and three-dimensional structures is essential. In addition to conventional "anisotropic etching," which etches perpendicular to the wafer surface, there is a demand for and development of "isotropic etching" technology and equipment that can etch horizontally to the wafer surface.
[0003] As a plasma processing apparatus for performing isotropic etching with high precision, the plasma processing apparatus described in Patent Document 1 is known. Patent Document 1 describes a plasma processing apparatus and its operation method that control the etching amount to a level of a few nanometers or less by forming a reaction layer by radical adsorption and desorption of the reaction layer by heating, in order to achieve microfabrication by isotropic etching. More specifically, a wafer to be processed is transported into the processing chamber in a vacuum vessel by a transport mechanism and placed on a sample stage equipped with a function to electrostatically adsorb the wafer. Then, plasma is generated in the discharge section, and ions and electrons are reduced by a gas supply plate equipped with an ion shielding mechanism (ion shielding plate) with through holes arranged in a circular pattern, and only radicals are supplied to the wafer.
[0004] By supplying only radicals to the wafer, relatively highly reactive particles such as neutral gas particles and radicals are generated and adsorbed onto the surface of the film layer to be etched on the wafer. A chemical reaction between the two forms a reaction layer on the surface (adsorption step). Next, heat or kinetic energy is applied to the reaction layer to detach and remove it from the wafer surface (desorption step). By repeating this adsorption step and desorption step alternately at a predetermined cycle, the desired film can be selectively etched. In addition to controlling the etching amount to a level of a few nanometers or less, it is also possible to increase the etching amount depending on the type of gas used.
[0005] On the other hand, repeated execution of the above process can cause reaction products to accumulate in the processing chamber. To maintain a constant or clean environment within the processing chamber, cleaning or seasoning processes may be performed separately from product processing. As described above, the apparatus reduces ions and electrons using a gas supply plate equipped with an ion shielding mechanism (ion shielding plate) with circumferentially arranged through holes, supplying only radicals to the wafer, the sample stage for wafer placement, and the lower processing chamber. However, due to this ion-free environment, the cleaning efficiency for keeping the lower processing chamber clean is low. To keep the lower processing chamber cleaner than a processing chamber without an ion shielding plate, it is necessary to maintain a high temperature of the target components within the processing chamber in order to enhance the reactivity with the appropriate radical species and the target components within the processing chamber. For example, Patent Document 2 describes a cleaning technology developed to keep the lower processing chamber clean by supplying appropriate radical species to the deposits to be cleaned and raising the temperature of the target components by emitting IR light.
[0006] Japanese Patent Publication No. 2015-185594 Japanese Patent Publication No. 2023-015220
[0007] As mentioned above, in order to reliably carry out semiconductor manufacturing processes, it is necessary to keep the processing chamber clean or maintain a consistent environment within the processing chamber. Reaction products generated in the processing chamber during product processing can adhere to and accumulate within the chamber, potentially causing unintended reactions in the next process or on the next wafer, thus affecting product processing. To suppress this, it is necessary to regularly perform cleaning processes to purify the processing chamber and seasoning processes to stabilize it.
[0008] However, for example, the cleaning process described in Patent Document 2 is performed separately from the product processing process for manufacturing semiconductor devices. Therefore, when processing multiple product wafers, time is required to clean the processing chamber in addition to the product processing time. Furthermore, if the cleaning process is performed after or between product processing, there is a risk that the attached reaction products may change in quality and become difficult to remove. As a result, the time required for the cleaning process increases, which increases the time required to process a predetermined number of wafers, leading to a problem of reduced processing efficiency. Alternatively, as the number of wafers processed and the processing time increase, it may become impossible to clean the attached materials, impairing the reproducibility of the process and potentially reducing the yield. Patent Document 1 does not disclose any recognition of these problems.
[0009] Therefore, the present invention aims to provide a semiconductor manufacturing technology that enables efficient or high-yield wafer processing and cleaning.
[0010] To solve the above problems, one representative semiconductor manufacturing method of the present invention is a semiconductor manufacturing apparatus comprising a processing chamber located inside a vacuum vessel, a sample stage located inside the processing chamber on which a wafer to be processed is placed, and a lamp located above the sample stage that irradiates the inside of the processing chamber, including the sample stage, with electromagnetic waves, wherein in the wafer processing step, the wafer placed on the upper surface of the sample stage is heated by electromagnetic waves irradiated from the lamp to perform a desorption treatment of reaction products on the wafer surface, and the inner surface of the processing chamber is heated to perform a cleaning treatment of attached substances simultaneously.
[0011] According to the present invention, it is possible to perform wafer processing and cleaning in semiconductor manufacturing with high efficiency and yield.
[0012] Figure 1 is a schematic cross-sectional view of a semiconductor manufacturing apparatus according to this embodiment. Figure 2 is a schematic plan view showing the general configuration of the gas dispersion plate in this embodiment. Figure 3 is a schematic cross-sectional view showing the general configuration of the sample stage in this embodiment. Figure 4 is a graph showing an example of the relationship between the IR lamp output value and the internal surface temperature of the processing chamber. Figure 5 is a graph showing an example of the relationship between the IR lamp output value and the wafer temperature. Figure 6 is a schematic diagram showing the flow of wafer processing and cleaning processes in a conventional semiconductor manufacturing process. Figure 7 is a flowchart showing the wafer processing procedure in the conventional technology. Figure 8 is a timing chart diagram related to the wafer processing procedure in the conventional technology. Figure 9 is a timing chart diagram related to post-wafer processing cleaning (in-situ cleaning) in the conventional technology. Figure 10 is a timing chart diagram related to pre-wafer processing cleaning in the conventional technology. Figure 11 is a schematic diagram showing the flow of wafer processing and cleaning processes in the semiconductor manufacturing processes of Examples 1 and 2. Figure 12 is a flowchart showing the wafer processing procedure in Examples 1 and 2. Figure 13 is a timing chart diagram related to the wafer processing procedure in Example 1. Figure 14 is a timing chart for wafer pre-processing cleaning in Examples 1 and 2. Figure 15 is a graph comparing the etching amount distribution when Example 1 and the conventional semiconductor manufacturing method are applied to a prototype. Figure 16 is a table comparing the etching amount difference and processing time when Example 1 and the conventional semiconductor manufacturing method are applied to a prototype. Figure 17 is a timing chart for the wafer processing procedure in Example 2. Figure 18 is a graph comparing the etching amount distribution when Example 2 and the conventional semiconductor manufacturing method are applied to a prototype. Figure 19 is a table comparing the etching amount difference and processing time when Example 2 and the conventional semiconductor manufacturing method are applied to a prototype.
[0013] Embodiments of the present invention will be described below with reference to the drawings. However, the present invention is not limited to these embodiments. Furthermore, in the drawings, identical parts are denoted by the same reference numerals.
[0014] (Configuration of Semiconductor Manufacturing Apparatus) The configuration of the semiconductor manufacturing apparatus (also called a plasma processing apparatus or etching apparatus) according to this embodiment will be explained using Figure 1. Figure 1 is a schematic cross-sectional view showing the semiconductor manufacturing apparatus according to this embodiment.
[0015] The semiconductor manufacturing apparatus 100 has a vacuum chamber 101 and an exhaust opening at its bottom for reducing the pressure inside the vacuum chamber 101. The opening is connected to a vacuum pump 122 through an exhaust pipe. A variable valve 123 is placed in the path between the opening and the vacuum pump 122 to increase or decrease the flow path cross-sectional area of the path or opening, thereby adjusting the flow rate or speed of the exhaust.
[0016] The vacuum vessel 101 is broadly composed of a discharge section 102 at the top of the vacuum vessel and a processing chamber 104 at the bottom of the vacuum vessel. Both the discharge section 102 and the processing chamber 104 are cylindrical spaces, and their central axes are located on the same axis or in a position that can be considered to be approximately the same axis. Between them is a circular gas dispersion plate 106, which is also located in a position where the central axes coincide or in a position that can be considered to be approximately the same axis. This plate separates the discharge section 102 and the processing chamber 104, and the two are connected through through holes in the surface of the gas dispersion plate 106.
[0017] The discharge section 102 has a cylindrical discharge tube 107 installed. An ICP coil 108 is installed on the outside of the discharge tube 107. The ICP coil 108 is connected to a high-frequency power supply 110 via a matching unit 109, and plasma 114 is generated using the ICP discharge method. The frequency of the high-frequency power is to be in the frequency band of several tens of MHz, such as 13.56 MHz.
[0018] A top plate 115 is installed above the discharge section 102. A gas introduction plate is installed below the top plate 115, and the processing gas 113 is introduced into the vacuum container 101 via the gas introduction plate. A sealing member such as an O-ring is sandwiched between the top plate 115 and the upper surface of the upper end of the side wall of the discharge section 102. This creates an airtight seal between the inside of the discharge section 102 and the outside of the vacuum container 101.
[0019] The flow rate of the processing gas 113 is adjusted by a mass flow controller 116 installed for each type of gas. As the processing gas 113, combustible gas, combustion-supporting gas, and mixtures thereof, or mixtures thereof diluted with an inert gas are used.
[0020] The processing chamber 104, located at the bottom of the vacuum vessel 101, has a sample stage 103 for placing the wafer W at a position that coincides with or approximates to the central axis of the discharge section 102 and the processing chamber 104. The processing gas 113 passes through the exhaust hole 111 and is exhausted by the vacuum pump 122.
[0021] A lamp unit 105 for heating the wafer W and the processing chamber 104 is installed between the sample stage 103 and the discharge unit 102. The lamp unit 105 includes an IR lamp 117, a reflector 118 for reflecting IR light, and an IR light transmission window 119. The IR lamp 117 can be a circular lamp (117a, 117b, 117c) arranged in multiple (triple in this example) rows with different radii, concentrically or so deemed to be concentric around the central axis. The light emitted from the IR lamp 117 mainly consists of visible light to infrared light (referred to here as IR light). The IR lamp 117 is connected to an IR lamp power supply 120 that supplies power to it, and a high-frequency cut filter 121 is placed between them to prevent noise from the high-frequency power applied to the ICP coil from flowing into the IR lamp power supply. The IR lamps 117 (three in the figure) are arranged concentrically and located at different radii. The amount of power supplied to each circular portion can be independently adjusted relative to the total maximum power (for example, 30 kW), allowing for adjustment of the radial distribution of the heating amount of the wafer W.
[0022] A reflector 118 is installed above the IR lamp 117 to reflect the radially emitted IR light downwards (towards the wafer W installation direction). In addition, a quartz IR light transmission window 119 is positioned to allow IR light to pass from the bottom surface of the lamp unit 105 to the inner circumferential wall surface. The IR light emitted from each lamp of the IR lamp 117, along with some of it reflected by the reflector 118, is irradiated onto the surface inside the processing chamber 104, including the sample stage 103, through the IR light transmission window 119.
[0023] The discharge section 102 and the processing chamber 104 are connected by a flow channel 112 having a cylindrical inner wall, and the flow channel 112 is surrounded on its outer circumference by a lamp unit 105. The upper end of the flow channel 112 has an opening connected to the lower part of the discharge section 102, and the lower end has an opening connected to the upper part of the processing chamber 104 above the sample stage 103, and a dielectric gas dispersion plate 106 with a circular shape is installed inside. Particles in the plasma 114 formed in the discharge section 102 are introduced into the processing chamber 104 through the flow channel 112 and the gas dispersion plate 106.
[0024] (Gas Dispersion Plate) Here, the gas dispersion plate 106 will be described using Figure 2. Figure 2 is a schematic plan view showing the general configuration of the gas dispersion plate 106 of this embodiment. As shown in Figure 2, the gas dispersion plate 106 has multiple through holes arranged concentrically at different radial positions on its outer circumference, extending radially from the center of the disc.
[0025] The gas dispersion plate 106 has the function of reducing charged particles such as ions and electrons generated inside the plasma when particles in the plasma 114 formed in the discharge section 102 by the ICP discharge method pass through the through holes into the processing chamber 104, and allowing neutral gas particles and radicals to pass through the through holes. Furthermore, the arrangement of these through holes adjusts the distribution of radicals introduced into the processing chamber 104, thereby adjusting the amount of radicals supplied to and in contact with the surface of the wafer W to be processed, and the in-plane distribution of the processing reaction on the wafer W surface that is affected by this.
[0026] (Sample Stage) Next, the configuration of the sample stage 103 will be explained using Figure 3. Figure 3 is a schematic cross-sectional view showing the general configuration of the sample stage 103 in this embodiment. As shown in Figure 3, the sample stage 103 has a cylindrical outer shape that is positioned at a location that coincides with or approximates to the central axis of the processing chamber 104. The sample stage 103 comprises a cylindrical sample stage base material 201 made of a conductive material such as metal, an electrostatic adsorption film 202 which is a cylindrical polyimide resin sheet attached to the central part of the upper surface of the sample stage base material 201 so as to form a convex shape with the sample stage base material 201, and a dielectric sample stage cover 211 which is placed on the ring-shaped plane on the outer circumference side of the convex projection on the upper surface of the sample stage base material 201 and is arranged to surround the cylindrical side wall of the electrostatic adsorption film 202 and the cylindrical side wall of the sample stage base material 201. The sample stage cover 211 covers the sample stage base material 201 and protects it from the plasma 114.
[0027] The electrostatic adsorption film 202 attracts and holds a wafer when it is placed on its upper surface due to electrostatic attraction. In this example, to prevent damage to the back surface of the wafer even when heating or cooling while the wafer is adsorbed, a polyimide resin sheet is attached to the electrostatic adsorption film 202 to provide its function. Multiple film-like electrodes 204 and 205 are embedded within the electrostatic adsorption film 202 to fix the wafer by electrostatic attraction. Electrodes 204 and 205 are electrically connected to DC power supplies 206 and 207, respectively, to generate static electricity. When the wafer is electrostatically attracted to the sample stage 103, voltage is applied to electrodes 204 and 205 by their respective DC power supplies 206 and 207.
[0028] Inside the sample stage base material 201, a refrigerant flow path 203 is arranged concentrically or spirally around a central axis to cool the sample stage 103. A chiller 212 is located in the space below the floor of a building such as a cleanroom where the semiconductor manufacturing equipment 100 is located, and is connected to the refrigerant flow path 203 or the sample stage base material 201 by piping. A refrigerant (e.g., Fluorinert®) adjusted to a temperature within a predetermined range is circulated and supplied to the inside of the refrigerant flow path 203, being introduced from the chiller 212 and discharged back.
[0029] On the upper surface of the electrostatic adsorption film 202 that is in contact with or facing the back surface of the wafer, a plurality of heat transfer gas grooves 208 of a predetermined shape are pre-arranged concentrically around the center, or radially at angles equal to or approximately equivalent to the center. Because the heat transfer gas grooves 208 are formed, when the wafer is adsorbed onto the electrostatic adsorption film 202, a gap is formed between the back surface of the wafer and the heat transfer gas grooves 208 on the upper surface of the electrostatic adsorption film 202. The heat transfer gas grooves 208 are arranged on a gas supply path that penetrates the inside of the sample stage base material 201. They are connected to a heat transfer gas source 210 via a valve 209 that opens and closes the gas supply path, and a heat-conducting gas such as He gas from the heat transfer gas source 210 is supplied to the gap between the wafer and the electrostatic adsorption film 202, flowing along the radial or concentric heat transfer gas grooves 208 and filling the gap. The He gas supplied to the gaps in the heat transfer gas grooves 208 promotes heat transfer between the sample stage 103, which is temperature-controlled by the refrigerant flow path 203, and the wafer, thereby efficiently cooling the wafer.
[0030] Furthermore, heaters 213 and 214 are installed to regulate the wafer temperature, and are connected to control units 215 and 216, respectively. However, these may be integrated into a single control unit.
[0031] The semiconductor manufacturing apparatus 100 includes a mechanism for detaching the wafer from the sample stage 103 after the etching process is completed and electrostatic adsorption is released. This mechanism includes a through hole inside the sample stage 103 and a vertically movable push-up pin (not shown) positioned within the through hole. After the electrostatic adsorption is released, the wafer is detached from the sample stage 103 by pushing it upward using the push-up pin, which is the detachment mechanism. The wafer, which has risen on the push-up pin, is then transported out of the processing chamber 104 using a transport mechanism.
[0032] The internal surface temperature of the processing chamber according to the total output value of the inner peripheral part (117a), the central part (117b), and the outer peripheral part (117c) of the IR lamps 117 (three in the figure) will be described with reference to FIG. 4. FIG. 4 is a graph showing an example of the relationship between the IR lamp output value and the internal surface temperature of the processing chamber. The horizontal axis in FIG. 4 represents the total of each IR lamp output value. When the IR lamp output value (inner peripheral part / central part / outer peripheral part) is 3 kW (0 / 0 / 3 kW) or 5 kW (0 / 0 / 5 kW), actually only the outer peripheral part lamp is lit. When it is 9 kW (3 / 3 / 3 kW) or 15 kW (5 / 5 / 5 kW), actually all three lamps of the outer peripheral part, the central part, and the inner peripheral part lamps are lit. From FIG. 4, it can be seen that as the IR lamp output value increases, the internal surface temperature of the processing chamber rises. When the IR lamp output value is 5 kW or more, the member temperature reaches 100°C or more. Note that the internal surface temperature of the processing chamber can be measured by any method. Here, the measured temperature of the sample stage cover 211, which faces the internal surface of the processing chamber 104 and is assumed to have a temperature almost equal to the radiant heat received from the surface, is used. The temperature on the processing chamber side may also be measured by applying a thermocouple to the internal surface of the processing chamber. Further, an external heater may be installed in the vacuum vessel 101 to control the temperature of the internal surface of the processing chamber.
[0033] Figure 5 is a graph showing an example of the relationship between IR lamp output value and wafer temperature. The wafer temperature remained at 40°C in the range of IR lamp output values from 3 kW (0 / 0 / 3 kW) to 9 kW (3 / 3 / 3 kW), but at 15 kW (5 / 5 / 5 kW), the wafer temperature increased and reached 53°C. This is because, while the wafer temperature can be controlled from 3 kW (0 / 0 / 3 kW) to 9 kW (3 / 3 / 3 kW) through the interaction of heating by IR light, cooling by the refrigerant placed inside the sample stage, and heating by the heater, at IR lamp output values of 15 kW (5 / 5 / 5 kW) or higher, the heating by the IR lamp exceeds the wafer cooling function of the refrigerant, causing the wafer temperature to exceed the temperature control range and making it impossible to maintain 40°C. The wafer temperature can be measured by any method, and here, since it is assumed that the temperature inside the sample stage 103 and the temperature of the wafer placed on the sample stage 103 will be approximately the same, the temperature measured inside the sample stage 103 was used. The wafer temperature can be controlled in relation to heating by the IR lamp 117 by adjusting the supply amount of refrigerant flowing through the refrigerant channel 203 or gas flowing through the heat transfer gas groove 208, or by using heaters 213 and 214 as appropriate.
[0034] In processing steps that modify the wafer, such as the deposit step and etching step described later (referred to as wafer processing steps), there are limitations on the upper limit of the wafer temperature from the viewpoint of suppressing reactions with radicals and ensuring homogeneity of the film layer. On the other hand, considering the temperature required to detach the reaction products to be removed from the wafer surface, it is preferable to set the wafer temperature to 40° in this embodiment. On the other hand, the reaction products to be removed in this embodiment (for example, ammonium silicofluoride salt (NH4) ４ ) ２ SiF ６Since it is considered to evaporate at 90°C or higher, in order to prevent the reaction product from adhering to and accumulating on the inner surface of the processing chamber and to cleanly remove the adhered reaction product, it is necessary to heat the inner surface of the processing chamber to at least 90°C or higher. From the above, referring to FIGS. 4 and 5, in order to desorb the reaction product on the wafer surface and to remove the deposits on the inner surface of the processing chamber or suppress the deposition (referred to as cleaning treatment), as suitable conditions, while maintaining the wafer temperature at 40°C, the inner surface temperature of the processing chamber is set to 90°C or higher. Therefore, in this embodiment, the IR lamp output value is set to 3 kW to 9 kW. However, the specific values of the suitable wafer temperature, the inner surface temperature of the processing chamber, and the IR lamp output value may be set according to the type of wafer actually used, the processing recipe, etc.
[0035] The wafer temperature and the inner surface temperature of the processing chamber are uniquely defined by controlling the output of the IR lamp by a control unit (which may be a control unit integrating control units 215 and 216) installed in the semiconductor manufacturing apparatus. Regarding the wafer temperature, the supply amount of the refrigerant flowing through the refrigerant flow path or the gas flowing through the heat transfer gas groove, or for the inner surface temperature of the processing chamber, when a heater is provided outside the vacuum vessel, temperature control can be performed by the control unit taking into account the heating or cooling effects of these.
[0036] A specific example of the wafer processing (also referred to as product processing) or cleaning treatment in this embodiment will be described below based on the prior art and examples.
[0037] (Prior Art) First, the prior art will be described. FIG. 6 is a schematic diagram showing the flow of wafer processing and cleaning treatment in a prior art semiconductor manufacturing process. FIG. 7 is a flowchart showing the procedure of wafer processing in the prior art. Note that the silicon nitride film and fluorocarbon film described below used a blanket film.
[0038] As the first step (deposition step), a fluorocarbon gas (e.g., CHF ３A gas is introduced, and a source power of 1000 W is applied by a semiconductor manufacturing apparatus at a processing pressure of 50 Pa to generate fluorocarbon radicals. Then, the fluorocarbon radicals are supplied to a processing target film (silicon nitride film) on the surface of the wafer in the processing chamber 104 through the gas dispersion plate 106, and a fluorocarbon film is deposited on the surface of the silicon nitride film.
[0039] As the second step (etching step), a processing gas composed of a gas containing at least one kind of fluorocarbon gas (e.g., CF ４ gas), a gas containing oxygen (e.g., O ２ gas), and a gas containing a rare gas (e.g., Ar gas) is introduced, and a source power of 1500 W is applied by a semiconductor manufacturing apparatus at a processing pressure of 200 Pa to generate plasma and generate fluorine radicals. Then, the fluorine radicals are supplied to a processing target film (silicon nitride film) on the surface of the wafer in the processing chamber 104 through the gas dispersion plate 106, and the fluorocarbon film and the silicon nitride film are etched.
[0040] As the third step (ashing step), a processing gas (etching gas) composed of a gas containing oxygen (e.g., O ２ gas), a gas containing nitrogen (e.g., N ２ gas), a gas containing hydrogen (e.g., H ２ gas), and a gas containing a rare gas (e.g., Ar gas) is introduced, and a source power of 1500 W is applied by a semiconductor manufacturing apparatus at a processing pressure of 50 Pa to generate plasma and generate nitrogen radicals and oxygen radicals. Then, the nitrogen radicals and oxygen radicals are supplied to a processing target film (silicon nitride film) on the surface of the wafer in the processing chamber 104 through the gas dispersion plate 106, and the fluorocarbon film on the surface of the silicon nitride film is removed. In the third step, the wafer is heated by irradiating IR light at an IR lamp output value of 24 kW (8 / 8 / 8 kW), so that the reaction products and film layers (e.g., residues of the fluorocarbon film) remaining on the wafer surface generated in the first step and the second step are desorbed and removed (desorption treatment).
[0041] In the fourth step (cooling step), a noble gas (e.g., Ar gas) is introduced into the vacuum chamber, and a source power of 1500W is applied by a semiconductor manufacturing apparatus at a processing pressure of 50Pa to generate plasma using a plasma apparatus and produce Ar radicals. These Ar radicals are then supplied to the film to be processed (silicon nitride film) on the wafer surface in the processing chamber 104 via the gas dispersion plate 106 to cool the wafer.
[0042] Furthermore, by repeating the wafer processing (cycle processing) from the first to the fourth step, the amount of etching of the silicon nitride film, which is the film to be etched, is controlled to a desired value.
[0043] The conventional semiconductor manufacturing process, including wafer processing and pre- and post-processing cleaning, will be explained using a timing chart. The operation of each part shown in the following timing chart can be centrally controlled by a control unit.
[0044] Figure 8 is a timing chart diagram of a wafer processing procedure in the prior art. Processing starts at T0, the first step (deposit step) is performed from T0 to T1, the second step (etching step) is performed from T1 to T2, the third step (ashing step) is performed from T2 to T3, and the fourth step (cooling step) is performed from T3 to T4. From T5 onward, the procedures from the first to the fourth step are repeated (cycled) to control the etching amount to the desired level.
[0045] In conventional technology, after wafer processing (product processing), the wafers, which are the products, are removed, and then the processing chamber is cleaned (called in-situ cleaning) in the following procedure. The first step is to use a gas containing fluorocarbons (e.g., NF ３ (gas) and gases containing hydrogen (e.g., H ２ In the second step, an oxygen-containing gas (for example, O) is introduced as a cleaning gas, generating plasma to create fluorine radicals and clean the treatment chamber. ２A processing gas (etching gas) consisting of a gas and a gas containing a noble gas (e.g., Ar gas) is introduced to generate plasma, creating Ar radicals and oxygen radicals, and then ashing is performed.
[0046] Figure 9 is a timing chart for in-situ cleaning after wafer processing in the conventional technology. Processing starts at T0, cleaning is performed from T0 to T1, and the ashing step is executed from T1 to T2.
[0047] On the other hand, cleaning is performed before wafer processing (product processing) using the following procedure. In the first step, a processing gas (etching gas) composed of a rare gas (e.g., Ar gas) is introduced, and plasma is generated to introduce Ar radicals. Simultaneously, IR light is irradiated at an IR lamp output value of 15 kW. In the second step, a processing gas (etching gas) composed of a rare gas (e.g., Ar gas) is introduced, and plasma is generated to introduce Ar radicals. Irradiation of IR light is stopped. This transition step allows for a smooth transition to the next step. In steps 3 to 5, conditioning of the processing chamber is performed by forming radical species similar to those used in wafer processing. In steps 6 to 7, cleaning of the processing chamber is performed.
[0048] Figure 10 is a timing chart diagram for pre-processing cleaning of a wafer in the prior art. Processing starts at T0, and Ar radicals are introduced between T0 and T1. A transition step is performed between T1 and T2, a process simulating wafer processing is performed between T2 and T5, and a cleaning process is performed between T5 and T7.
[0049] (Example 1) Next, Example 1 will be described. Figure 11 is a schematic diagram showing the wafer processing and cleaning processes in the semiconductor manufacturing process of Example 1. Figure 12 is a flowchart showing the wafer processing procedure in Example 1. Note that the silicon nitride film and fluorocarbon film described below were blanket films.
[0050] In the first step (heating step), a noble gas (e.g., Ar gas) is introduced into the vacuum chamber, and a source power of 1500 W is applied by a semiconductor manufacturing apparatus at a processing pressure of 50 Pa to generate plasma and produce Ar radicals. These Ar radicals are then supplied to the film to be processed (silicon nitride film in this embodiment) on the wafer surface in the processing chamber 104 via the gas dispersion plate 106. When supplying the Ar radicals, IR light is irradiated with a relatively strong output IR lamp output value of 15 kW (5 / 5 / 5 kW) (IR irradiation) to rapidly heat the wafer and the inner surface of the processing chamber (for example, in a few seconds).
[0051] In the second step (transition step), a noble gas (e.g., Ar gas) is introduced into the vacuum chamber, and a source power of 1500 W is applied by a semiconductor manufacturing apparatus at a processing pressure of 50 Pa to generate plasma and produce Ar radicals. These Ar radicals are then supplied to the target film (silicon nitride film) on the wafer surface in the processing chamber 104 via the gas dispersion plate 106. When supplying the Ar radicals, IR light is irradiated at an IR lamp output value of 9 kW (3 / 3 / 3 kW), which is lower than the output in the first step and the same as the IR lamp output value used in the third step and beyond, to heat the wafer and the inner surface of the processing chamber. This allows for a smooth transition to the next step.
[0052] As the third step (depot step), fluorocarbon gas (e.g., CHF) is placed in the vacuum container. ３ A gas is introduced, and a source power of 1000W is applied by a semiconductor manufacturing apparatus at a processing pressure of 50Pa to generate plasma and produce fluorocarbon radicals. These fluorocarbon radicals are then supplied to the target film (silicon nitride film) on the wafer surface in the processing chamber 104 via the gas dispersion plate 106, causing the fluorocarbon film to be deposited on the silicon nitride film surface. When supplying the fluorocarbon radicals, IR light is irradiated at an IR lamp output value of 9kW (3 / 3 / 3kW) to heat the wafer and the inner surface of the processing chamber. At this time, reaction products that have adhered to the wafer surface in reaction with the radicals are desorbed and removed (desorption treatment), and simultaneously, deposits on the inner surface of the processing chamber are removed by evaporation, etc. (cleaning treatment).
[0053] As the fourth step (etching step), fluorocarbon gas (e.g., CF) is placed in the vacuum chamber. ４ A gas containing at least one of the following: a gas, a gas containing oxygen (for example, O ２ A processing gas consisting of a gas (such as fluorine gas) and a noble gas (such as Ar gas) is introduced, and a source power of 1500 W is applied by a semiconductor manufacturing apparatus at a processing pressure of 200 Pa to generate plasma and produce fluorine radicals. The fluorine radicals are then supplied to the target film (silicon nitride film) on the wafer surface in the processing chamber 104 via the gas dispersion plate 106 to etch the fluorocarbon film and the silicon nitride film. Also, similar to the third step, in the fourth step, when supplying fluorine radicals, IR light is irradiated at an IR lamp output value of 9 kW (3 / 3 / 3 kW) to heat the wafer and the inner surface of the processing chamber. At this time, desorption treatment of reaction products attached to the wafer surface and cleaning treatment of deposits on the inner surface of the processing chamber (such as ammonium silicofluoride salt) are performed simultaneously.
[0054] As the fifth step (ashing step), an oxygen-containing gas (e.g., O) is placed inside the vacuum vessel. ２ gas), nitrogen-containing gas (e.g., N ２ gases), hydrogen-containing gases (e.g., H ２A processing gas (etching gas) consisting of a gas and a gas containing a noble gas (e.g., Ar gas) is introduced, and a source power of 1500W is applied by a semiconductor manufacturing apparatus at a processing pressure of 50Pa to generate plasma and produce nitrogen radicals and oxygen radicals. These nitrogen radicals and oxygen radicals are then supplied to the target film (silicon nitride film) on the wafer surface in the processing chamber 104 via the gas dispersion plate 106 to remove the fluorocarbon film on the silicon nitride film surface. In the fifth step, IR light is irradiated at an IR lamp output value of 24kW (8 / 8 / 8kW), which is a larger output than in the third and fourth steps, to heat the wafer and the inner surface of the processing chamber. At this time, desorption treatment of reaction products and film layers (e.g., fluorocarbon film residue) generated in the third and fourth steps and remaining on the wafer surface, and cleaning treatment of residues of deposits on the inner surface of the processing chamber are performed simultaneously, allowing for rapid and complete removal of these. As mentioned above, in the third and fourth steps, which are wafer processing steps, it is necessary to set the IR lamp output value to 3kW to 9kW in order to perform wafer processing and desorption of reaction products simultaneously. However, in the fifth step, which is not a wafer processing step, there are no constraints necessary for wafer processing, and it is possible to increase the IR lamp output value to 24kW in order to perform the desorption process to remove reaction products quickly and effectively.
[0055] On the other hand, similar to the third and fourth steps, in the fifth step, it is also possible to heat the wafer and the inner surface of the processing chamber by irradiating with IR light at an IR lamp output value of 9 kW (3 / 3 / 3 kW) when supplying radicals. However, in this case, the sixth step, which will be described later, can be omitted.
[0056] In the sixth step (cooling step), a noble gas (e.g., Ar gas) is introduced into the vacuum chamber, and a source power of 1500W is applied by a semiconductor manufacturing apparatus at a processing pressure of 50Pa to generate plasma and produce Ar radicals. These Ar radicals are then supplied to the film to be processed (silicon nitride film) on the wafer surface in the processing chamber 104 via the gas dispersion plate 106 to cool the wafer. When supplying the Ar radicals, IR light is irradiated at the same IR lamp output value of 9kW (3 / 3 / 3kW) as the IR lamp output value used in the third step and beyond.
[0057] Furthermore, by repeating the wafer processing (cycle processing) from the third to the sixth step, the etching amount of the silicon nitride film, which is the film to be etched, is controlled to a desired value. The wafer processing in Example 1 includes a cleaning process (self-cleaning), and in particular, in wafer processing steps such as the third and fourth steps, the desorption of reaction products attached to the wafer surface and the cleaning of deposits attached to the inner surface of the processing chamber are performed simultaneously, which has the advantage of not requiring separate in-situ cleaning as in conventional technology (see Figure 11). In addition, in steps other than the third and fourth steps, by setting the output value of the IR lamp within the range of 3 kW to 9 kW, even if unexpected reaction products are generated, the desorption process on the wafer surface and the cleaning process on the inner surface of the processing chamber can be performed simultaneously.
[0058] The semiconductor manufacturing process of Example 1, including wafer processing and the preceding cleaning process, will be explained using a timing chart. The operation of each part shown in the following timing chart can be centrally controlled by the control unit.
[0059] Figure 13 is a timing chart diagram of the wafer processing procedure in Example 1. Processing starts at T0, the first step (heating step) is performed from T0 to T1, the second step (transition step) is performed from T1 to T2, the third step (deposit step) is performed from T2 to T3, the fourth step (etching step) is performed from T3 to T4, the fifth step (ashing step) is performed from T4 to T5, and the sixth step (cooling step) is performed from T5 to T6. From T7 onward, steps 3 to 6 are repeatedly performed (cycle processing) to control the etching amount to the desired level.
[0060] The cleaning process performed before wafer processing (product processing) can also be carried out using a procedure similar to that of wafer processing. In the first step, a processing gas (etching gas) composed of a noble gas (e.g., Ar gas) is introduced, and plasma is generated to introduce Ar radicals. Simultaneously, IR light is irradiated at an IR lamp output of 9 kW. In the second to fourth steps, conditioning of the processing chamber is performed by forming radical species similar to those used in wafer processing. At this time, IR light is irradiated at an IR lamp output of 9 kW, as in the first step. In the fifth to sixth steps, cleaning of the processing chamber is performed. At this time, IR light is irradiated at an IR lamp output of 9 kW, as in the first to fourth steps.
[0061] Figure 14 is a timing chart for pre-processing cleaning of the wafer in Example 1. Processing starts at T0, and Ar radicals are introduced between T0 and T1. Processing simulating wafer processing is performed between T1 and T4, and cleaning is performed between T4 and T6.
[0062] Example 1 and the conventional semiconductor manufacturing method were performed and compared using prototypes. For the conventional method, the wafer processing and cleaning process flow shown in Figure 6 was applied. Specifically, for pre-wafer processing cleaning, the processing procedure shown in the timing chart in Figure 10 was applied, for wafer processing, the processing procedure shown in Figure 8 was applied, and for in-situ cleaning after wafer processing, the processing procedure shown in Figure 9 was applied. In wafer processing, a blanket silicon nitride film (also simply called a nitride film) was used for continuous processing, and the etching amount (amount of nitride film removed) was measured. The etching amounts of prototypes with slot numbers 1, 10, and 25 were plotted in order of size. Silicon dummy samples were used during pre-wafer processing cleaning and in-situ cleaning after wafer processing.
[0063] For Example 1, the wafer processing and cleaning process flow shown in Figure 11 was applied. Specifically, for pre-processing cleaning of the wafer, the processing procedure shown in the timing chart of Figure 14 was applied, and for wafer processing, the processing procedure shown in Figure 13 was applied. In wafer processing, processing was carried out continuously using a blanket silicon nitride film, and the etching amount (amount of nitride film removed) was measured. The etching amounts of prototypes with slot numbers 1, 10, and 25 were plotted in order of size. A silicon dummy sample was used during the pre-processing cleaning of the wafer.
[0064] Figure 15 is a graph comparing the etching amount distribution when the semiconductor manufacturing method of Example 1 and the conventional method were applied to a prototype. In the semiconductor manufacturing method using the conventional method, an increase in the etching amount of the blanket nitride film was observed despite the application of in-situ cleaning. This is presumed to be because the deposition of reaction products in the processing chamber could not be suppressed, and the reaction products were altered or decomposed during product processing and functioned as etchants. On the other hand, it can be seen that the semiconductor manufacturing method of Example 1, which has improved cleaning efficiency, can suppress fluctuations in the etching amount of the blanket nitride film even without applying in-situ cleaning.
[0065] Figure 16 is a table comparing the etching amount difference and processing time when the semiconductor manufacturing method of Example 1 and the conventional technology were applied to a prototype. It was confirmed that Example 1 showed less variation in etching amount and better yield compared to the conventional technology. It was also confirmed that Example 1 did not require a separate in-situ cleaning process, thus shortening the processing time.
[0066] (Example 2) Next, Example 2 will be described. The flow of wafer processing and cleaning processes in the semiconductor manufacturing process in Example 2, as well as the wafer processing procedure, are the same as in Example 1 (see Figures 11 and 12). In addition, a blanket film was used for the silicon nitride film and fluorocarbon film described below.
[0067] In the first step (heating step), a rare gas (e.g., Ar gas) is introduced into the vacuum chamber, and a source power of 1500 W is applied by a semiconductor manufacturing apparatus at a processing pressure of 50 Pa to generate plasma and produce Ar radicals. These Ar radicals are then supplied to the film to be processed (silicon nitride film in this embodiment) on the wafer surface in the processing chamber 104 via the gas dispersion plate 106. When supplying the Ar radicals, IR light is irradiated with a relatively strong output IR lamp output value of 15 kW (5 / 5 / 5 kW) (IR irradiation) to rapidly heat the wafer and the inner surface of the processing chamber (for example, in a few seconds).
[0068] In the second step (transition step), a noble gas (e.g., Ar gas) is introduced into the vacuum chamber, and a source power of 1500W is applied by a semiconductor manufacturing apparatus at a processing pressure of 50Pa to generate plasma and produce Ar radicals. These Ar radicals are then supplied to the target film (silicon nitride film) on the wafer surface in the processing chamber 104 via the gas dispersion plate 106. When supplying the Ar radicals, IR light is irradiated at an IR lamp output value of 3kW (0 / 0 / 3kW), which is lower than the output in the first step and the same as the IR lamp output value used in the third step and beyond, to heat the wafer and the inner surface of the processing chamber. This allows for a smooth transition to the next step.
[0069] As the third step (depot step), fluorocarbon gas (e.g., CHF) is placed in the vacuum container. ３A gas is introduced, and a source power of 1000W is applied by a semiconductor manufacturing apparatus at a processing pressure of 50Pa to generate plasma and produce fluorocarbon radicals. These fluorocarbon radicals are then supplied to the target film (silicon nitride film) on the wafer surface in the processing chamber 104 via the gas dispersion plate 106, causing the fluorocarbon film to be deposited on the silicon nitride film surface. When supplying the fluorocarbon radicals, IR light is irradiated at an IR lamp output value of 3kW (0 / 0 / 3kW) to heat the wafer and the inner surface of the processing chamber. At this time, reaction products that have adhered to the wafer surface in reaction with the radicals are desorbed and removed (desorption treatment), and at the same time, deposits on the inner surface of the processing chamber are removed by evaporation, etc. (the removal of deposits in the processing chamber is called a cleaning treatment). In this embodiment, a blanket film was used for the silicon nitride film and the fluorocarbon film.
[0070] As the fourth step (etching step), fluorocarbon gas (e.g., CF) is placed in the vacuum chamber. ４ A gas containing at least one of the following: a gas, a gas containing oxygen (for example, O ２ A processing gas consisting of a gas (e.g., fluorine gas) and a noble gas (e.g., Ar gas) is introduced, and a source power of 1500 W is applied by a semiconductor manufacturing apparatus at a processing pressure of 200 Pa to generate plasma and produce fluorine radicals. The fluorine radicals are then supplied to the target film (silicon nitride film) on the wafer surface in the processing chamber 104 via the gas dispersion plate 106 to etch the fluorocarbon film and the silicon nitride film. Also, similar to the third step, in the fourth step, when supplying fluorine radicals, IR light is irradiated at an IR lamp output value of 3 kW (0 / 0 / 3 kW) to heat the wafer and the inner surface of the processing chamber. At this time, desorption treatment of reaction products attached to the wafer surface and cleaning treatment of deposits on the inner surface of the processing chamber (e.g., ammonium silicofluoride salt) are performed simultaneously.
[0071] As the fifth step (ashing step), an oxygen-containing gas (e.g., O) is placed inside the vacuum vessel. ２ gas), nitrogen-containing gas (e.g., N ２ gases), hydrogen-containing gases (e.g., H ２A processing gas (etching gas) consisting of a gas and a gas containing a noble gas (e.g., Ar gas) is introduced, and a source power of 1500W is applied by a semiconductor manufacturing apparatus at a processing pressure of 50Pa to generate plasma and produce nitrogen radicals and oxygen radicals. These nitrogen radicals and oxygen radicals are then supplied to the target film (silicon nitride film) on the wafer surface in the processing chamber 104 via the gas dispersion plate 106 to remove the fluorocarbon film on the silicon nitride film surface. In the fifth step, IR light is irradiated at an IR lamp output value of 24kW (8 / 8 / 8kW), which is a larger output than in the third and fourth steps, to heat the wafer and the inner surface of the processing chamber. At this time, desorption treatment of reaction products and film layers (e.g., fluorocarbon film residue) generated in the third and fourth steps and remaining on the wafer surface, and cleaning treatment of residues of deposits on the inner surface of the processing chamber are performed simultaneously, allowing for rapid and complete removal of these. As mentioned above, in the third and fourth steps, which are wafer processing steps, it is necessary to set the IR lamp output value to 3kW to 9kW, which is suitable for simultaneously performing wafer processing and desorption of reaction products. However, in the fifth step, which is not a wafer processing step, there are no constraints necessary for wafer processing, and it is possible to increase the IR lamp output value to 24kW in order to perform the desorption process to remove reaction products quickly and effectively.
[0072] On the other hand, similar to the third and fourth steps, in the fifth step, it is also possible to heat the wafer and the inner surface of the processing chamber by irradiating with IR light at an IR lamp output value of 3 kW (0 / 0 / 3 kW) when supplying radicals. However, in this case, the sixth step, which will be described later, can be omitted.
[0073] In the sixth step (cooling step), a noble gas (e.g., Ar gas) is introduced into the vacuum chamber, and a source power of 1500W is applied by a semiconductor manufacturing apparatus at a processing pressure of 50Pa to generate plasma and produce Ar radicals. These Ar radicals are then supplied to the film to be processed (silicon nitride film) on the wafer surface in the processing chamber 104 via the gas dispersion plate 106 to cool the wafer. When supplying the Ar radicals, IR light is irradiated at the same IR lamp output value of 3kW (0 / 0 / 3kW) as the IR lamp output value irradiated in the third step and beyond.
[0074] Furthermore, by repeating the wafer processing (cycle processing) from the third to the sixth step, the etching amount of the silicon nitride film, which is the film to be etched, is controlled to a desired value. The wafer processing in Example 2 includes a cleaning process (self-cleaning), and in particular, in wafer processing steps such as the third and fourth steps, the desorption of reaction products attached to the wafer surface and the cleaning of deposits attached to the inner surface of the processing chamber are performed simultaneously, which has the advantage of not requiring separate in-situ cleaning as in conventional technology (see Figure 11). In addition, in steps other than the third and fourth steps, by setting the output value of the IR lamp within the range of 3 kW to 9 kW, even if unexpected reaction products are generated, the desorption process on the wafer surface and the cleaning process on the inner surface of the processing chamber can be performed simultaneously.
[0075] The semiconductor manufacturing process of Example 2, including wafer processing and the preceding cleaning process, will be explained using a timing chart. The operation of each part shown in the following timing chart can be centrally controlled by the control unit.
[0076] Figure 17 is a timing chart diagram of the wafer processing procedure in Example 2. Processing starts at T0, the first step (heating step) is performed from T0 to T1, the second step (transition step) is performed from T1 to T2, the third step (deposit step) is performed from T2 to T3, the fourth step (etching step) is performed from T3 to T4, the fifth step (ashing step) is performed from T4 to T5, and the sixth step (cooling step) is performed from T5 to T6. From T7 onward, steps 3 to 6 are repeatedly performed (cycle processing) to control the etching amount to the desired level.
[0077] The cleaning process performed before wafer processing (product processing) is the same as in Example 1, so its explanation will be omitted (see Figure 14).
[0078] Example 2 was performed and compared with the conventional semiconductor manufacturing method using prototypes. For the conventional method, the wafer processing and cleaning process flow shown in Figure 6 was applied. Specifically, for pre-wafer processing cleaning, the processing procedure shown in the timing chart in Figure 10 was applied, for wafer processing, the processing procedure shown in Figure 8 was applied, and for in-situ cleaning after wafer processing, the processing procedure shown in Figure 9 was applied. In wafer processing, a blanket silicon nitride film (also simply called a nitride film) was used for continuous processing, and the etching amount (amount of nitride film removed) was measured. The etching amounts of prototypes with slot numbers 1, 10, and 25 were plotted in order of size. Silicon dummy samples were used during pre-wafer processing cleaning and in-situ cleaning after wafer processing.
[0079] For Example 2, the wafer processing and cleaning process flow shown in Figure 11 was applied. Specifically, for pre-processing cleaning of the wafer, the processing procedure shown in the timing chart of Figure 14 was applied, and for wafer processing, the processing procedure shown in Figure 17 was applied. In wafer processing, processing was carried out continuously using a silicon nitride blanket film, and the etching amount (amount of nitride film removed) was measured. The etching amounts of prototypes with slot numbers 1, 10, and 25 were plotted in order of size. A silicon dummy sample was used during the pre-processing cleaning of the wafer.
[0080] Figure 18 is a graph comparing the etching amount distribution when the semiconductor manufacturing method of Example 2 and the conventional method were applied to a prototype. In the semiconductor manufacturing method using the conventional method, an increase in the etching amount of the blanket nitride film was observed despite the application of in-situ cleaning. This is presumed to be because the deposition of reaction products in the processing chamber could not be suppressed, and the reaction products were altered or decomposed during product processing and functioned as etchants. On the other hand, in the semiconductor manufacturing method of Example 2 with improved cleaning efficiency, it can be seen that fluctuations in the etching amount of the blanket nitride film can be suppressed even without applying in-situ cleaning.
[0081] Figure 19 is a table comparing the etching amount difference and processing time when the semiconductor manufacturing method of Example 2 and the conventional technology were applied to a prototype. It was confirmed that Example 2 showed less variation in etching amount and better yield compared to the conventional technology. It was also confirmed that Example 2 did not require a separate in-situ cleaning process, thus shortening the processing time.
[0082] In this embodiment, an example using an IR lamp to heat the wafer and the internal surface of the processing chamber is shown, but the heating method is not limited to this. However, unlike conductive heating using a heater, radiant heating using an IR lamp can efficiently and rapidly heat not only the wafer but also the inside of the processing chamber, so heating with an IR lamp is desirable when it is necessary to rapidly change these temperatures during wafer processing. Note that the light used for heating is not necessarily limited to IR light, and in that case it can generally be described as a lamp that emits electromagnetic waves.
[0083] Furthermore, the present invention is not limited to the embodiments described above, and various modifications are included. For example, the embodiments described above are described in detail to make the present invention easier to understand, and are not necessarily limited to those having all the configurations described. Also, it is possible to replace some of the configurations in one embodiment with the configurations in another embodiment, and it is also possible to add configurations from other embodiments to the configuration of one embodiment. In addition, it is possible to add, delete, or replace some of the configurations in each embodiment with other configurations.
[0084] The following describes embodiments that may constitute the present invention, but are not limited thereto. (Embodiment 1) A semiconductor manufacturing method using a semiconductor manufacturing apparatus comprising: a processing chamber disposed inside a vacuum vessel; a sample stage disposed inside the processing chamber on which a wafer to be processed is placed; and a lamp disposed above the sample stage for irradiating the inside of the processing chamber, including the sample stage, with electromagnetic waves, wherein in the wafer processing step, the wafer placed on the upper surface of the sample stage is heated by electromagnetic waves irradiated from the lamp to perform a desorption treatment of reaction products on the wafer surface and a cleaning treatment of deposits is performed simultaneously by heating the inner surface of the processing chamber. (Embodiment 2) The semiconductor manufacturing method according to Embodiment 1, wherein the wafer processing step includes a deposit step or an etching step. (Embodiment 3) The semiconductor manufacturing method according to Embodiment 1 or 2, wherein the wafer is heated using a heater disposed inside the sample stage. (Embodiment 4) The semiconductor manufacturing method according to any one of Embodiments 1 to 3, wherein the control unit controls the output of the lamp to adjust the temperature of the wafer and the temperature of the inner surface of the processing chamber. (Aspect 5) A semiconductor manufacturing method according to any one of aspects 1 to 4, characterized in that a wafer processing step other than the wafer processing step has a step in which the output value of the lamp is greater than the output value in the wafer processing step. (Aspect 6) A semiconductor manufacturing method according to any one of aspects 1 to 5, characterized in that an in-situ cleaning step is not included between the wafer cycle processing and the subsequent cycle processing.(Aspect 7) A semiconductor manufacturing apparatus comprising: a processing chamber disposed inside a vacuum vessel; a sample stage disposed inside the processing chamber on which a wafer to be processed is placed; and a lamp disposed above the sample stage for irradiating the inside of the processing chamber, including the sample stage, with electromagnetic waves, wherein the lamp irradiates electromagnetic waves in a wafer processing step to simultaneously perform a desorption treatment of reaction products on the wafer surface by heating the wafer placed on the upper surface of the sample stage, and a cleaning treatment of deposits by heating the inner surface of the processing chamber. (Aspect 8) A semiconductor manufacturing apparatus according to Aspect 7, wherein the wafer processing step includes a deposit step or an etching step. (Aspect 9) A semiconductor manufacturing apparatus according to Aspect 7 or 8, wherein a heater for heating the wafer is provided inside the sample stage. (Aspect 10) A semiconductor manufacturing apparatus according to any one of Aspects 7 to 9, wherein a control unit is provided to control the output of the lamp and adjust the temperature of the wafer and the temperature of the inner surface of the processing chamber. (Aspect 11) A semiconductor manufacturing apparatus according to any one of aspects 7 to 10, characterized in that a wafer processing step other than the wafer processing step has a step in which the output value of the lamp is greater than the output value in the wafer processing step.
[0085] 100... Semiconductor manufacturing equipment 101... Vacuum vessel 102... Discharge section 103... Sample stage 104... Processing chamber 105... Lamp unit 106... Gas dispersion plate 107... Discharge tube 108... ICP coil 109... Matching unit 110... High-frequency power supply 111... Exhaust hole 112... Flow channel 113... Processing gas 114... Plasma 115... Top plate 116... Mass flow controller 117... IR lamp 118... Reflector 119... IR light transmission window 120... Power supply for IR lamp 121... High-frequency cut filter 122... Vacuum pump 123... Variable valve 201... Sample stage base material 202... Electrostatic adsorption film 203... Refrigerant flow channel 204, 205... Electrodes 206, 207... DC power supply 208... Heat transfer gas groove 209... Valve 210... Heat transfer gas source 211... Sample stage cover 212... Chiller 213, 214... Heater 215, 216... Control unit
Claims
1. A semiconductor manufacturing apparatus comprising a processing chamber located inside a vacuum vessel, a sample stage located inside the processing chamber on which a wafer to be processed is placed, and a lamp located above the sample stage for irradiating the inside of the processing chamber, including the sample stage, with electromagnetic waves, wherein in the wafer processing step, the wafer placed on the upper surface of the sample stage is heated by electromagnetic waves irradiated from the lamp to perform a desorption treatment of reaction products on the wafer surface, and the inner surface of the processing chamber is heated to perform a cleaning treatment of attached substances simultaneously.
2. A semiconductor manufacturing method according to claim 1, wherein the wafer processing step includes a deposit step or an etching step.
3. A semiconductor manufacturing method according to claim 1, characterized in that the wafer is heated using a heater placed inside the sample stage.
4. A semiconductor manufacturing method according to claim 1, characterized in that a control unit controls the output of the lamp and adjusts the temperature of the wafer and the temperature of the internal surface of the processing chamber.
5. A semiconductor manufacturing method according to claim 1, characterized in that a wafer processing step other than the wafer processing step has a step in which the output value of the lamp is greater than the output value in the wafer processing step.
6. A semiconductor manufacturing method according to claim 1, characterized in that an in-situ cleaning step is not included between the wafer cycling process and the subsequent cycling process.
7. A semiconductor manufacturing apparatus comprising: a processing chamber disposed inside a vacuum vessel; a sample stage disposed inside the processing chamber on which a wafer to be processed is placed; and a lamp disposed above the sample stage for irradiating the inside of the processing chamber, including the sample stage, with electromagnetic waves, wherein the lamp irradiates electromagnetic waves in such a way that, in the wafer processing step, it simultaneously heats the wafer placed on the upper surface of the sample stage to perform a desorption treatment of reaction products on the wafer surface and heats the inner surface of the processing chamber to perform a cleaning treatment of deposits.
8. A semiconductor manufacturing apparatus according to claim 7, wherein the wafer processing step includes a deposit step or an etching step.
9. A semiconductor manufacturing apparatus according to claim 7, wherein a heater for heating the wafer is provided inside the sample stage.
10. A semiconductor manufacturing apparatus according to claim 7, comprising a control unit that controls the output of the lamp and adjusts the temperature of the wafer and the temperature of the internal surface of the processing chamber.
11. A semiconductor manufacturing apparatus according to claim 7, characterized in that a wafer processing step other than the wafer processing step has a step in which the output value of the lamp is greater than the output value in the wafer processing step.