Biological information acquisition system

Abstract

Provided is a highly convenient biological information acquisition system. According to the present invention, vital data of a living body acquired by a biological information acquisition device is transmitted to a terminal device. The biological information acquisition device has a first mode in which vital data acquired by a plurality of optical sensors is compressed and sequentially transmitted, and a second mode in which the vital data acquired by the plurality of optical sensors is transmitted without being compressed. The biological information acquisition device starts operation in the first mode on the basis of a vital data acquisition command transmitted from the terminal device, and transitions from the first mode to the second mode on the basis of a mode-switching command transmitted from the terminal device.

Description

Biological information acquisition system

[0001] The present invention relates to a biological information acquisition system.

[0002] Optical sensors in which a plurality of photoelectric conversion elements such as photodiodes are arranged on a semiconductor substrate are known (for example, Patent Document 1). The optical sensor can detect biological information by changing the signal output from the photoelectric conversion element according to the amount of light irradiated.

[0003] U.S. Patent Application Publication No. 2018 / 0012069

[0004] For example, wearable devices such as smartwatches, wristwatches, and wristbands or ring types are worn on the human body to acquire image data such as blood vessel patterns such as veins, and are intended for use in biometric authentication and healthcare. In such a usage scenario, in order to appropriately adjust the imaging position, it is necessary to acquire real-time image data. Also, in order to realize the provision of more advanced healthcare, the improvement of image definition and frame rate becomes an issue. In order to enhance the convenience of such wearable devices, it is necessary to achieve both the acquisition of real-time image data for appropriate positioning at the time of wearing and the acquisition of image data capable of providing advanced healthcare.

[0005] The present disclosure aims to provide a highly convenient biological information acquisition system.

[0006] A biological information acquisition system according to an aspect of the present disclosure is a biological information acquisition system that transmits vital data of a living body acquired by a biological information acquisition device to a terminal device, wherein the biological information acquisition device has a first mode in which vital data acquired by a plurality of optical sensors is compressed and sequentially transmitted, and a second mode in which vital data acquired by the plurality of optical sensors is transmitted without compression.

[0007] Figure 1 is a diagram showing the schematic configuration of a biological information acquisition system according to the embodiment. Figure 2 is a block diagram showing an example configuration of a biological information acquisition device according to the embodiment. Figure 3 is a circuit diagram showing a biological information acquisition device according to the embodiment. Figure 4 is a circuit diagram showing multiple pixels. Figure 5 is a schematic partial cross-sectional view of an optical sensor according to the embodiment. Figure 6 is a timing waveform diagram showing an example of operation during one frame period of the biological information acquisition device according to the embodiment. Figure 7 is a timing waveform diagram showing an example of operation during the reset period in Figure 6. Figure 8 is a timing waveform diagram showing an example of operation during the readout period in Figure 6. Figure 9 is a timing waveform diagram showing an example of operation during the drive period of one gate line included in the readout period in Figure 6. Figure 10 is an explanatory diagram for explaining the relationship between the drive of the sensor area of ​​the biological information acquisition device according to the embodiment and the lighting operation of the light source. Figure 11 is a schematic diagram showing a first example of a biological information acquisition device. Figure 12 is a schematic diagram showing a second example of a biological information acquisition device. Figure 13 is a schematic diagram showing an example of a terminal device. Figure 14 is a sequence diagram explaining the flow of vital data acquisition operation in the biological information acquisition system according to the embodiment. Figure 15 is a flowchart showing an example of vital data acquisition processing in a biological information acquisition device according to the embodiment. Figure 16 is a subflowchart showing an example of raw data acquisition processing. Figure 17 is a conceptual diagram showing raw data for one frame. Figure 18 is a subflowchart showing an example of compressed data generation processing. Figure 19 is a conceptual diagram showing data for one frame after filtering. Figure 20 is a conceptual diagram showing data for one frame after compression. Figure 21 is a subflowchart showing an example of time-series data generation processing. Figure 22 is a conceptual diagram showing raw data for F frames.

[0008] Embodiments for carrying out the present invention will be described in detail with reference to the drawings. However, the present invention is not limited to the embodiments described below. Furthermore, the components described below include those that are easily conceivable to those skilled in the art, and those that are substantially the same. Moreover, the components described below can be combined as appropriate. Furthermore, the disclosure is merely an example, and any modifications that can be easily conceived by those skilled in the art while maintaining the spirit of the invention are naturally included within the scope of the present invention. In addition, the drawings may schematically represent the width, thickness, shape, etc., of each part compared to the actual embodiment in order to clarify the explanation, but these are merely examples and do not limit the interpretation of the present invention. Furthermore, in this specification and in each drawing, elements similar to those described above with respect to previously shown drawings are denoted by the same reference numerals, and detailed explanations may be omitted as appropriate.

[0009] Figure 1 is a diagram showing a schematic configuration of a biometric information acquisition system according to an embodiment. In this disclosure, the biometric information acquisition system 100 according to an embodiment includes a biometric information acquisition device 1 and a terminal device 2. In the biometric information acquisition system 100 according to Embodiment 1, the biometric information acquisition device 1 transmits the acquired data to the terminal device 2.

[0010] The biological information acquisition device 1 includes a sensor substrate 21, a sensor area AA, a gate line drive circuit 15, a signal line selection circuit 16, an AFE (Analog Front End) circuit 48, a control circuit 122, a power supply circuit 123, an output circuit 126, a first light source 61, and a second light source 62.

[0011] The control board 121 is electrically connected to the sensor substrate 21 via a flexible printed circuit board 71. An AFE circuit 48 is provided on the flexible printed circuit board 71. The control board 121 is provided with a control circuit 122, a power supply circuit 123, and an output circuit 126.

[0012] The control circuit 122 is, for example, a control integrated circuit (IC) that outputs logic control signals. The control circuit 122 may also be a programmable logic device (PLD) such as an FPGA (Field Programmable Gate Array).

[0013] The control circuit 122 supplies control signals to the sensor area AA, the gate line drive circuit 15, and the signal line selection circuit 16 to control the detection operation of the object to be detected in the sensor area AA. The control circuit 122 also supplies control signals to the first light source 61 and the second light source 62 to control whether the first light source 61 and the second light source 62 are lit or not.

[0014] The power supply circuit 123 supplies a voltage signal such as the sensor power supply potential VDDSNS (see Figure 4) to the sensor area AA, the gate line drive circuit 15, and the signal line selection circuit 16. The power supply circuit 123 also supplies the power supply voltage to the first light source 61 and the second light source 62.

[0015] The output circuit 126 is, for example, a wireless communication means such as Bluetooth® or Wi-Fi®, and controls communication between the control circuit 122 and the terminal device 2. The present disclosure is not limited to the communication means between the biometric information acquisition device 1 and the terminal device 2; for example, wireless communication may be performed via a predetermined network such as a mobile communication network.

[0016] Sensor region AA is a region in which multiple optical sensors PD (see Figure 4) are arranged in a matrix.

[0017] The gate line drive circuit 15 and the signal line selection circuit 16 are provided in an area outside the sensor area AA. Specifically, the gate line drive circuit 15 is provided in an area along the second direction Dy with respect to the sensor area AA. The signal line selection circuit 16 is provided in an area along the first direction Dx with respect to the sensor area AA (in the example shown in Figure 1, between the sensor area AA and the AFE circuit 48).

[0018] The first direction Dx is a direction in a plane parallel to the sensor substrate 21. The second direction Dy is a direction in a plane parallel to the sensor substrate 21 and is perpendicular to the first direction Dx. The second direction Dy may intersect the first direction Dx without being perpendicular to it. The third direction Dz is a direction perpendicular to the first direction Dx and the second direction Dy and is the normal direction of the sensor substrate 21.

[0019] Multiple first light sources 61 are provided on the first light source substrate 51 and are arranged along the second direction Dy. Multiple second light sources 62 are provided on the second light source substrate 52 and are arranged along the second direction Dy. The first light source substrate 51 and the second light source substrate 52 are electrically connected to the control circuit 122 and the power supply circuit 123, respectively, via terminals 124 and 125 provided on the control board 121.

[0020] The multiple first light sources 61 and the multiple second light sources 62 can be, for example, inorganic LEDs (Light Emitting Diodes) or organic EL (OLEDs: Organic Light Emitting Diodes).

[0021] The first light source 61 and the second light source 62 emit at least one of visible light, near-infrared light, and infrared light. The first light source 61 and the second light source 62 may each emit light of different wavelengths, or they may each emit light of the same wavelength. Specifically, for example, in a configuration having at least the first light source 61 (or the second light source 62), the first light emitted by the first light source 61 (or the second light source 62) may be red light or infrared light, or blue light or green light. Alternatively, for example, in a configuration having the first light source 61 and the second light source 62, the first light emitted by the first light source 61 may be red light, and the second light emitted by the second light source 62 may be infrared light. The present disclosure is not limited by the emission color of the first light source 61 and the second light source 62.

[0022] In this disclosure, light emitted from the first light source 61 and the second light source 62 is reflected or transmitted from, for example, the surface or inside of a subject's finger or wrist, and enters the sensor area AA. As a result, the sensor area AA can detect the shape of the surface irregularities of the finger Fg, etc., and information about the biological tissue inside the finger Fg, etc. (hereinafter also referred to as "biological information"). In this disclosure, biological information refers to, for example, the pulse wave, pulse rate, and vascular image of the finger Fg or palm. That is, the biological information acquisition device 1 may be configured as a fingerprint biological information acquisition device for detecting fingerprints, or a vein biological information acquisition device for detecting vascular patterns such as veins.

[0023] Figure 2 is a block diagram showing an example configuration of a biological information acquisition device according to the embodiment. As shown in Figure 2, the biological information acquisition device 1 further includes a detection control circuit 11 and a detection circuit 40.

[0024] The light sensor PD in sensor region AA is an organic photodiode (OPD), which outputs an electrical signal corresponding to the irradiated light as a detection signal Vdet to the signal line selection circuit 16. Sensor region AA also performs detection according to the gate drive signal Vgcl supplied from the gate line drive circuit 15.

[0025] The detection control circuit 11 is a circuit that supplies control signals to the gate line drive circuit 15, the signal line selection circuit 16, and the detection circuit 40, respectively, and controls their operation. The detection control circuit 11 supplies various control signals such as the start signal STV, the clock signal CK, and the reset signal RST1 to the gate line drive circuit 15. The detection control circuit 11 also supplies various control signals such as the selection signal ASW to the signal line selection circuit 16. Furthermore, the detection control circuit 11 supplies various control signals to the first light source 61 and the second light source 62 to control their illumination and de-illumination.

[0026] The gate line drive circuit 15 is a circuit that drives multiple gate lines GCL (see Figure 3) based on various control signals. The gate line drive circuit 15 sequentially or simultaneously selects multiple gate lines GCL and supplies a gate drive signal Vgcl to the selected gate lines GCL. As a result, the gate line drive circuit 15 selects multiple optical sensors PD connected to the gate lines GCL.

[0027] The signal line selection circuit 16 is a switch circuit that sequentially or simultaneously selects a plurality of signal lines SGL (see Figure 3). The signal line selection circuit 16 is, for example, a multiplexer. Based on the selection signal ASW supplied from the detection control circuit 11, the signal line selection circuit 16 electrically connects the selected signal line SGL to the AFE circuit 48. As a result, the signal line selection circuit 16 outputs the detection signal Vdet of the optical sensor PD to the detection circuit 40.

[0028] The detection circuit 40 includes an AFE circuit 48, a signal processing circuit 44, a memory circuit 46, and a detection timing control circuit 47. The detection timing control circuit 47 controls the AFE circuit 48 and the signal processing circuit 44 to operate synchronously based on a control signal supplied from the detection control circuit 11.

[0029] The AFE circuit 48 is, for example, an analog front-end IC.

[0030] The AFE circuit 48 is a signal processing circuit that has at least the functions of a detection signal amplification circuit 42 and an A / D conversion circuit 43. The detection signal amplification circuit 42 amplifies the detection signal Vdet. The A / D conversion circuit 43 converts the analog signal output from the detection signal amplification circuit 42 into a digital signal at a predetermined sampling period.

[0031] In this disclosure, the signal processing circuit 44 and the memory circuit 46 are included in the control circuit 122.

[0032] The signal processing circuit 44 acquires the subject's pulse wave based on the detection values ​​of each optical sensor PD output from the AFE circuit 48.

[0033] The memory circuit 46 temporarily stores the signals processed by the signal processing circuit 44. The memory circuit 46 may include, for example, RAM (Random Access Memory), ROM (Read Only Memory), EEPROM (Electrically Erasable Programmable Read Only Memory), etc. Alternatively, the memory circuit 46 may be a register circuit or the like.

[0034] Next, an example of the circuit configuration of the biological information acquisition device 1 will be described. Figure 3 is a circuit diagram showing the biological information acquisition device according to the embodiment. As shown in Figure 3, the sensor area AA has a plurality of pixels PAA arranged in a planar manner.

[0035] Specifically, the multiple pixel PAAs are arranged in a matrix, for example, aligned in a first direction Dx and a second direction Dy. However, the arrangement is not limited to this, and the multiple pixel PAAs may be arranged in a staggered pattern within the sensor area AA.

[0036] Each of the multiple pixels in the PAA is equipped with a light sensor PD. The light sensor PD outputs an electrical signal (potential) corresponding to the light irradiated onto it.

[0037] The gate line GCL extends in the first direction Dx and is connected to multiple pixels PAA arranged in the first direction Dx. Furthermore, multiple gate lines GCL(1), GCL(2), ..., GCL(8) are arranged in the second direction Dy and are each connected to the gate line drive circuit 15. In the following explanation, when it is not necessary to distinguish between multiple gate lines GCL(1), GCL(2), ..., GCL(8), they will simply be referred to as gate line GCL. Also, while Figure 3 shows eight gate lines GCL for clarity, this is merely an example, and there may be M gate lines GCL (where M is a natural number, for example, M = 256) arranged.

[0038] The signal line SGL extends in the second direction Dy and is connected to the optical sensor PD of multiple pixel PAAs arranged in the second direction Dy. The multiple signal lines SGL(1), SGL(2), ..., SGL(12) are arranged in the first direction Dx and are connected to the signal line selection circuit 16 and the reset circuit 17, respectively. In the following description, when it is not necessary to distinguish between the multiple signal lines SGL(1), SGL(2), ..., SGL(12), they will simply be referred to as signal line SGL.

[0039] Also, for the sake of easy understanding of the description, 12 signal lines SGL are shown, but this is merely an example, and the signal lines SGL may be arranged in N (N is a natural number, for example, N = 2123) numbers. Further, in FIG. 3, a sensor region AA is provided between the signal line selection circuit 16 and the reset circuit 17. However, the present invention is not limited thereto, and the signal line selection circuit 16 and the reset circuit 17 may be respectively connected to the ends of the signal lines SGL in the same direction.

[0040] The gate line driving circuit 15 receives various control signals such as a start signal STV, a clock signal CK, a reset signal RST1, etc. from a control circuit 122 (see FIG. 1). Based on the various control signals, the gate line driving circuit 15 sequentially selects a plurality of gate lines GCL(1), GCL(2),..., GCL(8) in a time-sharing manner. The gate line driving circuit 15 supplies a gate driving signal Vgcl to the selected gate line GCL. Thereby, the gate driving signal Vgcl is supplied to a plurality of first switching elements Tr connected to the gate line GCL, and a plurality of pixels PAA arranged in the first direction Dx are selected as detection targets.

[0041] The signal line selection circuit 16 includes a plurality of selection signal lines Lsel, a plurality of output signal lines Lout, and a third switching element TrS. The plurality of third switching elements TrS are provided corresponding to the plurality of signal lines SGL respectively. Six signal lines SGL(1), SGL(2),..., SGL(6) are connected to a common output signal line Lout1. Six signal lines SGL(7), SGL(8),..., SGL(12) are connected to a common output signal line Lout2. The output signal lines Lout1 and Lout2 are respectively connected to the AFE circuit 48.

[0042] Here, the signal lines SGL(1), SGL(2),..., SGL(6) are defined as the first signal line block, and the signal lines SGL(7), SGL(8),..., SGL(12) are defined as the second signal line block. The plurality of selection signal lines Lsel are respectively connected to the gates of the third switching elements TrS included in one signal line block. Also, one selection signal line Lsel is connected to the gates of the third switching elements TrS of the plurality of signal line blocks.

[0043] Specifically, the selection signal lines Lsel1, Lsel2, …, Lsel6 are respectively connected to the third switching elements TrS corresponding to the signal lines SGL(1), SGL(2), …, SGL(6). Also, the selection signal line Lsel1 is connected to the third switching element TrS corresponding to the signal line SGL(1) and the third switching element TrS corresponding to the signal line SGL(7). The selection signal line Lsel2 is connected to the third switching element TrS corresponding to the signal line SGL(2) and the third switching element TrS corresponding to the signal line SGL(8).

[0044] The control circuit 122 (see FIG. 1) sequentially supplies the selection signal ASW to the selection signal line Lsel. Thereby, the signal line selection circuit 16 sequentially selects the signal lines SGL in a time-sharing manner in one signal line block by the operation of the third switching element TrS. Also, the signal line selection circuit 16 selects one signal line SGL from each of the plurality of signal line blocks. With such a configuration, the biological information acquisition device 1 can reduce the number of ICs (Integrated Circuits) including the AFE circuit 48 or the number of terminals of the ICs.

[0045] As shown in FIG. 3, the reset circuit 17 includes a reference signal line Lvr, a reset signal line Lrst, and a fourth switching element TrR. The fourth switching element TrR is provided corresponding to a plurality of signal lines SGL. The reference signal line Lvr is connected to one of the sources or drains of the plurality of fourth switching elements TrR. The reset signal line Lrst is connected to the gates of the plurality of fourth switching elements TrR.

[0046] The control circuit 122 supplies the reset signal RST2 to the reset signal line Lrst. Thereby, the plurality of fourth switching elements TrR are turned on, and the plurality of signal lines SGL are electrically connected to the reference signal line Lvr. The power supply circuit 123 supplies the reference signal COM to the reference signal line Lvr. Thereby, the reference signal COM is supplied to the capacitive elements Ca (see FIG. 4) included in the plurality of pixels PAA.

[0047] Figure 4 is a circuit diagram showing multiple pixels of a biological information acquisition device according to an embodiment. Figure 4 also shows the circuit configuration of the AFE circuit 48. As shown in Figure 4, the pixel PAA includes a light sensor PD, a capacitive element Ca, and a first switching element Tr1. The capacitive element Ca may be a capacitance (sensor capacitance) formed in parallel with the light sensor PD, or it may be connected in parallel with the light sensor PD in an equivalent manner. Furthermore, the signal line capacitance Cc is a parasitic capacitance formed on the signal line SGL, and is equivalently formed between the signal line SGL and one end of the anode of the light sensor PD and the capacitive element Ca.

[0048] Figure 4 shows two gate lines GCL(m) and GCL(m+1) aligned in the second direction Dy, among multiple gate lines GCL. It also shows two signal lines SGL(n) and SGL(n+1) aligned in the first direction Dx, among multiple signal lines SGL. The pixel PAA is the region enclosed by the gate lines GCL and the signal lines SGL.

[0049] The first switching element Tr is provided in correspondence with the light sensor PD. The first switching element Tr is composed of a thin-film transistor, and in this example, it is composed of an n-channel MOS (Metal Oxide Semiconductor) type TFT (Thin Film Transistor).

[0050] The gates of the first switching elements Tr belonging to a plurality of pixels PAA aligned in the first direction Dx are connected to the gate line GCL. The sources of the first switching elements Tr belonging to a plurality of pixels PAA aligned in the second direction Dy are connected to the signal line SGL. The drains of the first switching elements Tr are connected to the cathode and capacitive element Ca of the optical sensor PD.

[0051] The anode of the optical sensor PD is supplied with a sensor power supply signal (potential) VDDSNS from the power supply circuit 123. The cathode of the optical sensor PD is supplied with a reference signal COM from the power supply circuit 123, which is the initial potential of the signal line SGL and the capacitive element Ca.

[0052] When light is shone onto the pixel PAA, a current corresponding to the amount of light flows through the light sensor PD, and a charge corresponding to the amount of light accumulates in the capacitive element Ca. When the first switching element Tr is turned on, a current flows through the signal line SGL according to the charge accumulated in the capacitive element Ca. The signal line SGL is connected to the AFE circuit 48 via the third switching element TrS of the signal line selection circuit 16. As a result, the biological information acquisition device 1 can detect a signal corresponding to the amount of light shone onto the light sensor PD for each pixel PAA.

[0053] The AFE circuit 48 is connected to the signal line SGL when the switch SSW is turned on during the readout period Pdet (see Figure 6). The detection signal amplification circuit 42 of the AFE circuit 48 converts the current supplied from the signal line SGL into a voltage and amplifies it. A reference potential (Vref) with a fixed potential is input to the non-inverting input (+) of the detection signal amplification circuit 42, and the signal line SGL is connected to the inverting input terminal (-). In this embodiment, the same signal as the reference signal COM is input as the reference potential (Vref) voltage. The detection signal amplification circuit 42 also has a capacitive element Cb and a reset switch RSW. During the reset period Prst (see Figure 6), the reset switch RSW is turned on, and the charge of the capacitive element Cb is reset.

[0054] Next, the configuration of the optical sensor PD will be described. Figure 5 is a schematic partial cross-sectional view of the optical sensor according to the embodiment. The sensor area AA of the biological information acquisition device 1 comprises a sensor substrate 21, a sensor structure 22, and a protective film 23. The sensor substrate 21 is, for example, an insulating substrate formed of a film-like resin.

[0055] The sensor structure 22 includes a TFT layer 221, an anode electrode (lower electrode) 222, a photosensor PD, and a cathode electrode (upper electrode) 226.

[0056] The TFT layer 221 is provided with various wirings such as gate lines GCL and signal lines SGL. The sensor substrate 21 and the TFT layer 221 are a drive circuit that drives the sensor and are also called a backplane.

[0057] The optical sensor PD comprises an active layer 224, an electron transport layer (lower buffer layer) 223 provided between the active layer 224 and the anode electrode (lower electrode) 222, and a hole transport layer (upper buffer layer) 225 provided between the active layer 224 and the cathode electrode (upper electrode) 226. In other words, the electron transport layer (lower buffer layer) 223, the active layer 224, and the hole transport layer (upper buffer layer) 225 of the optical sensor PD are stacked in this order in a direction perpendicular to the sensor substrate 21.

[0058] The active layer 224 changes its properties (e.g., voltage-current characteristics and resistance) depending on the light it is irradiated with. Organic materials are used as the material for the active layer 224. Specifically, the active layer 224 is a bulk heterostructure in which a p-type organic semiconductor and an n-type organic semiconductor, an n-type fullerene derivative (PCBM), are mixed. For example, C13 is a low-molecular-weight organic material used as the active layer 224. ６０ (Fullerene), PCBM (Phenyl C61-butyric acid methyl ester), CuPc (Copper Phthalocyanine), F １６ CuPc (fluorinated copper phthalocyanine), rubrene (5,6,11,12-tetraphenyltetracene), PDI (perylene derivative), etc. can be used.

[0059] The active layer 224 can be formed by vapor deposition (Dry Process) using these low-molecular-weight organic materials. In this case, the active layer 224 can be, for example, CuPc and F １６ A multilayer film with CuPc, or rubrene and C ６０It may be a laminated film. The active layer 224 can also be formed by a wet process. In this case, the active layer 224 is made of a material that combines the low molecular weight organic material and the polymer organic material described above. As the polymer organic material, for example, P3HT (poly(3-hexylthiophene)), F8BT (F8-alt-benzothiadiazole), etc. can be used. The active layer 224 can be a film in which P3HT and PCBM are mixed, or a film in which F8BT and PDI are mixed.

[0060] The electron transport layer (lower buffer layer) 223 and the hole transport layer (upper buffer layer) 225 are provided to facilitate the arrival of electrons and holes generated in the active layer 224 at the anode electrode (lower electrode) 222 or the cathode electrode (upper electrode) 226. The electron transport layer (lower buffer layer) 223 is in direct contact with the anode electrode (lower electrode) 222. The active layer 224 is in direct contact with the electron transport layer (lower buffer layer) 223. The material used for the electron transport layer (lower buffer layer) 223 is ethoxylated polyethyleneimine (PEIE).

[0061] The hole transport layer (upper buffer layer) 225 is in direct contact with the active layer 224, and the cathode electrode (upper electrode) 226 is in direct contact with the hole transport layer (upper buffer layer) 225. The hole transport layer (upper buffer layer) 225 is a metal oxide layer. As the metal oxide layer, tungsten oxide (WO ３ ), molybdenum oxide, etc. are used.

[0062] Note that the materials and manufacturing methods for the electron transport layer (lower buffer layer) 223, the active layer 224, and the hole transport layer (upper buffer layer) 225 are merely examples, and other materials and manufacturing methods may be used.

[0063] The anode electrode (lower electrode) 222 and the cathode electrode (upper electrode) 226 face each other with the light sensor PD in between. The cathode electrode (upper electrode) 226 is made of a transparent conductive material such as ITO (Indium Tin Oxide). The anode electrode (lower electrode) 222 is made of a metallic material such as silver (Ag) or aluminum (Al). Alternatively, the anode electrode (lower electrode) 222 may be made of an alloy material containing at least one of these metallic materials.

[0064] By controlling the film thickness of the anode electrode (lower electrode) 222, the anode electrode (lower electrode) 222 can be formed as a translucent semi-transparent electrode. For example, by forming the anode electrode (lower electrode) 222 with a 10 nm thick Ag thin film, it can have approximately 60% translucency. In this case, the photosensor PD can detect the first light LD irradiated from, for example, the first surface FD side.

[0065] The protective film 23 is provided on the second surface FU, covering the cathode electrode (upper electrode) 226. The protective film 23 is a passivation film and is provided to protect the photosensor PD.

[0066] In Figure 4, a configuration is shown in which the sensor power supply signal VDDSNS is supplied to the anode of the optical sensor PD from the power supply circuit 123, and the signal line SGL and a reference signal COM, which is the initial potential of the capacitive element Ca, are supplied to the cathode of the optical sensor PD from the power supply circuit 123. However, for example, a configuration in which the sensor power supply signal VDDSNS is supplied to the cathode of the optical sensor PD from the power supply circuit 123, and the signal line SGL and a reference signal COM, which is the initial potential of the capacitive element Ca, are supplied to the anode of the optical sensor PD from the power supply circuit 123. In this case, unlike the configuration described above, the optical sensor PD has an active layer 224, a hole transport layer (lower buffer layer) 223 provided between the active layer 224 and the cathode electrode (lower electrode) 222, and an electron transport layer (upper buffer layer) 225 provided between the active layer 224 and the anode electrode (upper electrode) 226. In other words, the hole transport layer (lower buffer layer) 223, the active layer 224, and the electron transport layer (upper buffer layer) 225 of the optical sensor PD are stacked in this order in a direction perpendicular to the sensor substrate 21.

[0067] Furthermore, in this disclosure, the optical sensor PD is not limited to an organic photodiode (OPD). The optical sensor PD may be, for example, a silicon photodiode (SiPD).

[0068] Next, an example of the operation of the biological information acquisition device 1 will be described. Figure 6 is a timing waveform diagram showing an example of operation of the biological information acquisition device according to the embodiment during one frame period. Figure 7 is a timing waveform diagram showing an example of operation during the reset period in Figure 6. Figure 8 is a timing waveform diagram showing an example of operation during the read period in Figure 6. Figure 9 is a timing waveform diagram showing an example of operation during the drive period of one gate line included in the row read period VR in Figure 6. Figure 10 is an explanatory diagram for explaining the relationship between the drive of the sensor area of ​​the biological information acquisition device according to the embodiment and the lighting operation of the light source.

[0069] As shown in Figure 6, the biological information acquisition device 1 has a reset period Prst, an exposure period Pex, and a readout period Pdet. The power supply circuit 123 supplies the sensor power supply signal VDDSNS to the anode of the optical sensor PD over the reset period Prst, the exposure period Pex, and the readout period Pdet. The sensor power supply signal VDDSNS is a signal that applies a reverse bias between the anode and cathode of the optical sensor PD. For example, although the cathode of the optical sensor PD has a reference signal COM of approximately 0.75V, by applying the sensor power supply signal VDDSNS of approximately -1.25V to the anode, the anode-cathode junction is reverse-biased to approximately 2.0V. The control circuit 122 sets the reset signal RST2 to "H" and then supplies the start signal STV and the clock signal CK to the gate line drive circuit 15, starting the reset period Prst. During the reset period Prst, the control circuit 122 supplies a reference signal COM to the reset circuit 17, and the reset signal RST2 turns on the fourth switching element TrR for supplying the reset voltage. As a result, the reference signal COM is supplied to each signal line SGL as the reset voltage. The reference signal COM is, for example, 0.75V.

[0070] During the reset period Prst, the gate line drive circuit 15 sequentially selects gate lines GCL based on the start signal STV, the clock signal CK, and the reset signal RST1. The gate line drive circuit 15 sequentially supplies gate drive signals Vgcl{Vgcl(1) to Vgcl(M)} to the gate lines GCL. The gate drive signals Vgcl have a pulse-like waveform with a high-level voltage, which is the power supply voltage VDD, and a low-level voltage, which is the power supply voltage VSS. In Figure 6, M gate lines GCL (for example, M = 256) are provided, and gate drive signals Vgcl(1), ..., Vgcl(M) are sequentially supplied to each gate line GCL, causing the multiple first switching elements Tr to conduct sequentially for each row, and a reset voltage is supplied. For example, the voltage of the reference signal COM, 0.75V, is supplied as the reset voltage.

[0071] Specifically, as shown in Figure 7, the gate line drive circuit 15 supplies a gate drive signal Vgcl(1) with a high-level voltage (power supply voltage VDD) to the gate line GCL(1) during period V(1). The control circuit 122 supplies at least one of the selection signals ASW1, ..., ASW6 (selection signal ASW1 in Figure 7) to the signal line selection circuit 16 during the period when the gate drive signal Vgcl(1) is at a high-level voltage (power supply voltage VDD). As a result, the signal line SGL of the pixel PAA selected by selection signal ASW1 is connected to the AFE circuit 48. Consequently, a reset voltage (reference signal COM) is also supplied to the connection wiring between the third switching element TrS and the AFE circuit 48.

[0072] Similarly, the gate line drive circuit 15 supplies high-level voltage gate drive signals Vgcl(2), ..., Vgcl(M-1), and Vgcl(M) to the gate lines GCL(2), ..., GCL(M-1), and GCL(M), respectively, during periods V(2), ..., V(M-1), and V(M).

[0073] As a result, during the reset period Prst, all capacitive elements Ca of the pixel PAA are sequentially electrically connected to the signal line SGL, and the reference signal COM is supplied. This resets the capacitance of the capacitive elements Ca. It is also possible to reset the capacitance of some of the capacitive elements Ca of the pixel PAA by partially selecting the gate line and the signal line SGL.

[0074] Examples of exposure timing include the gate line non-selection exposure control method and the continuous exposure control method. In the gate line non-selection exposure control method, gate drive signals {Vgcl(1) to (M)} are sequentially supplied to all gate lines GCL connected to the light sensor PD to be detected, and a reset voltage is supplied to all light sensors PD to be detected. Subsequently, when all gate lines GCL connected to the light sensor PD to be detected reach a low voltage (the first switching element Tr is off), exposure begins, and exposure is performed during the exposure period Pex. When exposure is complete, as described above, gate drive signals {Vgcl(1) to (M)} are sequentially supplied to the gate lines GCL connected to the light sensor PD to be detected, and reading is performed during the readout period Pdet. In the continuous exposure control method, it is also possible to control exposure during the reset period Prst and the readout period Pdet (continuous exposure control). In this case, the exposure period Pex(1) begins after the gate drive signal Vgcl(1) is supplied to the gate lines GCL during the reset period Prst. Here, the exposure period Pex{(1)...(M)} is defined as the actual exposure period, which is the period during which the capacitive element Ca is charged from the photosensor PD, and does not include the period during which light is irradiated outside of this period. During the reset period Prst, the charge charged in the capacitive element Ca flows in the photosensor PD as a reverse current (from cathode to anode) due to light irradiation, and the potential difference across both ends of the capacitive element Ca decreases. Note that the actual exposure periods Pex(1),...,Pex(M) for each pixel PAA corresponding to each gate line GCL have different start and end timings. The exposure periods Pex(1),...,Pex(M) each start at the timing when the gate drive signal Vgcl changes from a high-level power supply voltage VDD to a low-level power supply voltage VSS during the reset period Prst. Furthermore, each exposure period Pex(1), ..., Pex(M) ends at the timing when the gate drive signal Vgcl changes from the power supply voltage VSS to the power supply voltage VDD during the readout period Pdet. The exposure time for each exposure period Pex(1), ..., Pex(M) is equal.

[0075] During the exposure period Pex {(1)...(M)}, a current flows in each pixel PAA in response to the light irradiated onto the photosensor PD. As a result, charge accumulates in each capacitive element Ca.

[0076] Before the start of the readout period Pdet, the control circuit 122 lowers the reset signal RST2 to a low voltage. This stops the operation of the reset circuit 17. The reset signal may be set to a high voltage only during the reset period Prst. During the readout period Pdet, similar to the reset period Prst, the gate line drive circuit 15 sequentially supplies gate drive signals Vgcl(1), ..., Vgcl(M) to the gate line GCL.

[0077] Specifically, as shown in Figure 8, the gate line drive circuit 15 supplies a gate drive signal Vgcl(1) with a high-level voltage (power supply voltage VDD) to the gate line GCL(1) during the row readout period VR(1). The control circuit 122 sequentially supplies selection signals ASW1, ..., ASW6 to the signal line selection circuit 16 during the period when the gate drive signal Vgcl(1) is at a high-level voltage (power supply voltage VDD). As a result, the signal lines SGL of the pixel PAA selected by the gate drive signal Vgcl(1) are sequentially connected to the AFE circuit 48. Consequently, a detection signal Vdet is supplied to the AFE circuit 48 for each pixel PAA.

[0078] Similarly, the gate line drive circuit 15 supplies high-level voltage gate drive signals Vgcl(2), ..., Vgcl(M-1), and Vgcl(M) to the gate lines GCL(2), ..., GCL(M-1), and GCL(M), respectively, during row readout periods VR(2), ..., VR(M-1), and VR(M). That is, the gate line drive circuit 15 supplies the gate drive signal Vgcl to the gate line GCL for each row readout period VR(1), VR(2), ..., VR(M-1), and VR(M). For each period during which each gate drive signal Vgcl is at a high-level voltage, the signal line selection circuit 16 sequentially or simultaneously selects a signal line SGL based on the selection signal ASW. The signal line selection circuit 16 connects each signal line SGL sequentially or simultaneously to one AFE circuit 48. As a result, during the readout period Pdet, the biological information acquisition device 1 can output the detection signal Vdet of all pixel PAAs to the AFE circuit 48.

[0079] The following describes an example of operation during the row readout period VR, which is the supply period of one gate drive signal Vgcl(j) in Figure 6, with reference to Figure 9. In Figure 6, the sign of the row readout period VR is attached to the first gate drive signal Vgcl(1), and the same applies to the other gate drive signals Vgcl(2), ..., Vgcl(M). j is a natural number from 1 to M.

[0080] As shown in Figures 9 and 4, the output (Vout) of the third switching element TrS is reset to a reference potential (Vref) voltage. The reference potential (Vref) voltage is the reset voltage, for example, 0.75V. Next, the gate drive signal Vgcl(j) goes high, the first switching element Tr for that row turns on, and the signal line SGL for each row becomes a voltage corresponding to the charge stored in the capacitance (capacitance element Ca) of the pixel PAA. After a period t1 has elapsed from the rising edge of the gate drive signal Vgcl(j), a period t2 occurs in which the selection signal ASW(k) goes high. When the selection signal ASW(k) goes high and the third switching element TrS turns on, the AFE circuit 48 and the capacitance (capacitance element Ca) of the pixel PAA are electrically connected via the third switching element TrS. Therefore, the output (Vout) of the third switching element TrS (see Figure 4) changes to a voltage corresponding to the charge stored in the capacitance (capacitive element Ca) of the pixel PAA (period t3). In the example in Figure 9, this voltage is lower than the reset voltage, as shown in period t3. Subsequently, when the switch SSW is turned on (period t4, when the SSW signal is at a high level), the charge stored in the capacitance (capacitive element Ca) of the pixel PAA moves to the capacitance (capacitive element Cb) of the detection signal amplification circuit 42 of the AFE circuit 48, and the output voltage of the detection signal amplification circuit 42 becomes a voltage corresponding to the charge stored in the capacitive element Cb. At this time, the inverting input of the detection signal amplification circuit 42 becomes the imaginary short-circuit potential of the operational amplifier, and thus becomes the reference potential (Vref). The output voltage of the detection signal amplification circuit 42 is read out by the A / D conversion circuit 43. In the example shown in Figure 9, the waveforms of the selection signals ASW(k), ASW(k+1), ... corresponding to the signal lines SGL in each column become high, sequentially turning on the third switching element TrS. By performing the same operation sequentially, the charge accumulated in the capacitance (capacitance element Ca) of the pixel PAA connected to the gate line GCL is sequentially read out. Note that ASW(k), ASW(k+1), ... in Figure 9 are, for example, any of ASW1 to ASW6 in Figure 9.

[0081] Specifically, when the switch SSW is ON for a period t4, charge moves from the capacitance of the pixel PAA (capacitive element Ca) to the capacitance of the detection signal amplification circuit 42 of the AFE circuit 48 (capacitive element Cb). At this time, the non-inverting input (+) of the detection signal amplification circuit 42 is biased to a reference potential (Vref) voltage (for example, 0.75 [V]). Therefore, due to an imaginary short circuit between the inputs of the detection signal amplification circuit 42, the output (Vout) of the third switching element TrS also becomes the reference potential (Vref) voltage. In addition, the voltage of the capacitive element Cb becomes a voltage corresponding to the charge accumulated in the capacitance of the pixel PAA (capacitive element Ca) at the location where the third switching element TrS was turned ON according to the selection signal ASW(k). The output of the detection signal amplification circuit 42 becomes a voltage corresponding to the capacitance of the capacitive element Cb after the output (Vout) of the third switching element TrS becomes the reference potential (Vref) voltage due to the imaginary short circuit. The output voltage of the detection signal amplification circuit 42 is read by the A / D conversion circuit 43. The voltage of the capacitive element Cb is, for example, the voltage between the two electrodes provided in the capacitor that constitutes the capacitive element Cb.

[0082] In the example shown in Figure 10, during periods t(1), t(2), t(3), and t(4), the biological information acquisition device 1 performs the reset period Prst, the exposure period Pex{(1)...(M)}, and the readout period Pdet as described above. During the reset period Prst and the readout period Pdet, the gate line drive circuit 15 sequentially scans from gate line GCL(1) to gate line GCL(M). In the following description, detection during periods t(1), t(2), t(3), and t(4), that is, detection in which the gate line GCL(1) is scanned to gate line GCL(M) during the reset period Prst and the readout period Pdet, and the detection signal Vdet is acquired from the signal line SGL of each column, is referred to as detection of one frame.

[0083] The control circuit 122 can control the illumination of the light source according to the detected object. Figure 10 shows an example in which the first light source 61 is illuminated during periods t(1) and t(3), and the second light source 62 is illuminated during periods t(2) and t(4). That is, in the first example shown in Figure 10, the control circuit 122 alternately illuminates and de-illuminates the first light source 61 and the second light source 62 for each frame detected. However, the control circuit 122 may, for example, switch the illumination and de-illumination of the first light source 61 and the second light source 62 at predetermined intervals, or it may illuminate one of them continuously.

[0084] Next, specific examples of the biological information acquisition device 1 and terminal device 2 that constitute the biological information acquisition system 100 according to the embodiment will be described. Figure 11 is a schematic diagram showing a first example of the biological information acquisition device. Figure 12 is a schematic diagram showing a second example of the biological information acquisition device.

[0085] In the first example shown in Figure 11, the biometric information acquisition device 1 is a ring-shaped wearable device 200 that can be attached to and removed from the human body and is worn on the subject's finger Fg. The finger Fg includes the thumb, index finger, middle finger, ring finger, little finger, etc. In the first example shown in Figure 11, the biometric information acquisition device 1 according to this disclosure acquires image data such as vascular patterns, including veins, of the finger Fg to which the device is attached.

[0086] In the second example shown in Figure 12, the biometric information acquisition device 1 is a ring-shaped wearable device 200a such as a smartwatch, wristwatch, or wristband, and is attached to the subject's body HB. The body HB includes the subject's wrist, arm, leg, etc. In the second example shown in Figure 12, the biometric information acquisition device 1 acquires image data such as vascular patterns, including veins, of the attached body HB (for example, the subject's arm).

[0087] Figure 13 is a schematic diagram showing an example of a terminal device. Examples of terminal devices 2 include portable communication terminal devices such as smartphones and tablets. In the biometric information acquisition system 100 according to this embodiment, the biometric information acquisition device 1 is pre-registered in the terminal device 2 as a device capable of acquiring the subject's vital data by, for example, a healthcare application executed on the terminal device 2.

[0088] The following describes a specific example of vital data acquisition processing that enables the provision of highly convenient healthcare in the biometric information acquisition system 100 with the configuration described above.

[0089] Figure 14 is a sequence diagram illustrating the flow of vital data acquisition operations in a biological information acquisition system according to the embodiment. Figure 15 is a flowchart showing an example of vital data acquisition processing in a biological information acquisition device according to the embodiment.

[0090] When a user of the biometric information acquisition device 1 operates the terminal device 2 to launch the healthcare application (step S001), the terminal device 2 transmits a vital data acquisition command to the biometric information acquisition device 1 (step S002).

[0091] When the biological information acquisition device 1 receives a vital data acquisition command transmitted from the terminal device 2, it starts operating in observation mode (first mode) and executes the raw data acquisition process (step S100). Figure 16 is a subflowchart showing an example of the raw data acquisition process.

[0092] In the Raw data acquisition process shown in Figure 16, the biological information acquisition device 1 acquires Raw data for one frame at each pixel PAA of the sensor area AA. Figure 17 is a conceptual diagram showing Raw data for one frame. In Figure 17, Raw<n,m> indicates the detected value at the pixel PAA of the nth column and mth row.

[0093] The signal processing circuit 44 (see Figure 2) of the biological information acquisition device 1 acquires the detected value Raw<n,m> with n=1 and m=1 (step S101) (step S102), and stores the acquired detected value Raw<n,m> in the memory circuit 46 (step S103).

[0094] Next, the signal processing circuit 44 sets n = n + 1 (step S104) and determines whether n is N (n = N) or not (step S105). If n is less than N (n < N) (step S105; No), the process returns to step S102.

[0095] When n becomes N (n=N) (Step S105; Yes), the signal processing circuit 44 then sets m = m+1 (Step S106) and determines whether m is M (m=M) or not (Step S107). If m is less than M (m < M) (Step S107; No), the process returns to Step S102. Then, when m becomes M (m=M) (Step S107; Yes), the process returns to the vital data acquisition process shown in Figure 15.

[0096] Returning to the vital data acquisition process shown in Figure 15, the signal processing circuit 44 determines whether the current mode is observation mode (step S200). If it is observation mode (step S200; Yes), the biological information acquisition device 1 executes the compressed data generation process (step S300) in observation mode (first mode). Figure 18 is a subflowchart showing an example of the compressed data generation process.

[0097] In the compressed data generation process shown in Figure 18, the signal processing circuit 44 sets the frame number f = 0 (step S301) and performs a predetermined filter process on the acquired raw data for one frame (step S302). Figure 19 is a conceptual diagram showing the data for one frame after the filter process. In Figure 19, Fil<n, m> indicates the filtered data corresponding to the pixel PAA in the nth column and mth row.

[0098] Examples of filtering processes in step S302 include noise filters such as median filters, mean filters, and Gaussian filters, and edge filters such as differential filters, Sobel filters, and Laplacian filters. Alternatively, these various filters may be implemented in an appropriate combination.

[0099] Next, the signal processing circuit 44 performs a predetermined compression process on the data for one frame after filtering (step S303). Figure 20 is a conceptual diagram showing the data for one frame after compression. In Figure 20, Comp<n,m> indicates the compressed data corresponding to the pixel PAA in the nth column and mth row.

[0100] Examples of data formats after compression include lossy compression formats such as JPEG, which uses the Discrete Cosine Transform (DCT) as an image compression method. However, the data format after compression is not limited to lossy compression formats; it may also be a lossless compression format such as PNG.

[0101] Returning to the vital data acquisition process shown in Figure 15, the biological information acquisition device 1 transmits compressed data for one frame to the terminal device 2 via the output circuit 126 (step S400), and the process from step S100 onward is repeatedly executed. As a result, compressed data for one frame is transmitted sequentially to the terminal device 2.

[0102] Terminal device 2 performs decryption processing of compressed data transmitted sequentially from biometric information acquisition device 1. For example, the decrypted image may be displayed on the display DISP of terminal device 2, and the user may adjust the mounting position of biometric information acquisition device 1 by referring to the image displayed on the display DISP, or the healthcare application on terminal device 2 may determine whether the mounting position of biometric information acquisition device 1 is appropriate.

[0103] When the user of the biological information acquisition device 1 operates the terminal device 2 to instruct the start of vital data measurement (step S003), the terminal device 2 transmits a mode switching command to the biological information acquisition device 1 (step S004).

[0104] When the biological information acquisition device 1 receives a mode switching command transmitted from the terminal device 2, it starts operating in measurement mode (second mode) (step S200; No.) and executes time-series data generation processing (step S500). Figure 21 is a subflowchart showing an example of time-series data generation processing.

[0105] In the time-series data generation process shown in Figure 21, the signal processing circuit 44 sets the frame number f = f + 1 (step S501), stores the acquired raw data for one frame in the storage circuit 46 (step S502), and returns to the vital data acquisition process shown in Figure 15.

[0106] Returning to the vital data acquisition process shown in Figure 15, the signal processing circuit 44 determines whether the frame number f is F (f = F) (step S600). If f is less than F (f < F) (step S600; No), the process returns to step S100, and the processes from step S100 onward are repeatedly executed.

[0107] In the measurement mode (second mode), the number of frames F for acquiring one frame of Raw data is set to a number that allows for the acquisition of multiple pulse wave peaks (for example, about 10 times). Figure 22 is a conceptual diagram showing Raw data for F frames. In Figure 22, Raw(f)<n,m> indicates the detected value of the f-frame PAA pixel in the nth column and mth row.

[0108] When f becomes F (f = F) (step S600; Yes), the signal processing circuit 44 reads F frames of raw data from the memory circuit 46 and transmits it to the terminal device 2 as time-series data (step S700), ending the vital data acquisition process.

[0109] In the vital data acquisition process according to the above embodiment, operation in observation mode (first mode) begins after the healthcare application running on the terminal device 2 is launched, and compressed image data acquired for each frame is sequentially transmitted to the terminal device 2. This makes it possible to acquire real-time image data for appropriate positioning of the biological information acquisition device 1.

[0110] Furthermore, when terminal device 2 receives the compressed data and instructs the vital data acquisition device 1 to start measuring vital data after adjusting its mounting position, it starts operating in measurement mode (second mode), and the uncompressed image data acquired over multiple frames is transmitted to terminal device 2 as time-series data. This makes it possible to acquire image data that enables the provision of advanced healthcare.

[0111] Through the process described above, it is possible to provide a highly convenient biological information acquisition system that achieves both the acquisition of real-time image data for appropriate positioning of the biological information acquisition device 1 and the acquisition of image data that enables the provision of advanced healthcare.

[0112] In the embodiments described above, an example was given of acquiring image data such as vascular patterns, including veins, as vital data. However, the scope of application of the biological information acquisition device 1 according to this disclosure is not limited to this, and it can be broadly applied to configurations that acquire various types of vital data.

[0113] Although preferred embodiments of the present invention have been described above, the present invention is not limited to these embodiments. The contents disclosed in the embodiments are merely examples, and various modifications are possible without departing from the spirit of the present invention. Appropriate modifications made without departing from the spirit of the present invention naturally fall within the technical scope of the present invention. At least one of various omissions, substitutions, and modifications of components can be made without departing from the gist of each of the embodiments and modifications described above.

[0114] 1. Biological information acquisition device 2. Terminal device 11. Detection control circuit 15. Gate line drive circuit 16. Signal line selection circuit 21. Sensor substrate 22. Sensor structure 23. Protective film 40. Detection circuit 42. Detection signal amplification circuit 43. A / D conversion circuit 44. Signal processing circuit 46. Memory circuit 47. Detection timing control circuit 48. AFE circuit 61. First light source (light source) 62. Second light source (light source) 122. Control circuit 123. Power supply circuit 126. Output circuit 200, 200a. Wearable device 221. TFT layer 222. Anode electrode (lower electrode) (or cathode electrode (lower electrode)) 223. Electron transport layer (lower buffer layer) (or hole transport layer (lower buffer layer)) 224. Active layer 225 Hole transport layer (upper buffer layer) (or electron transport layer (upper buffer layer)) 226 Cathode electrode (upper electrode) (or anode electrode (upper electrode)) AA Sensor area GCL Gate line PAA Pixel PD Optical sensor Pdet Readout period Pex Exposure period RSW Reset switch SGL Signal line

Claims

1. A biological information acquisition system for transmitting vital data of a living organism acquired by a biological information acquisition device to a terminal device, wherein the biological information acquisition device has a first mode for compressing and sequentially transmitting vital data acquired by a plurality of optical sensors, and a second mode for transmitting vital data acquired by the plurality of optical sensors uncompressed.

2. The biological information acquisition system according to claim 1, wherein wireless communication is performed between the biological information acquisition device and the terminal device.

3. The biological information acquisition system according to claim 2, wherein the vital data is image data.

4. The biological information acquisition system according to claim 3, wherein the biological information acquisition device transmits compressed data obtained by compressing one frame of image in the first mode, and transmits images of multiple frames as time-series data in the second mode.

5. The biological information acquisition system according to claim 4, wherein the biological information acquisition device generates the compressed data by filtering an image for one frame in the first mode.

6. The biological information acquisition system according to claim 4, wherein the image compression method for the compressed data is a discrete cosine transform.

7. The biological information acquisition system according to any one of claims 1 to 6, wherein the biological information acquisition device starts operating in the first mode based on a vital data acquisition command transmitted from the terminal device, and transitions from the first mode to the second mode based on a mode switching command transmitted from the terminal device.

8. The biometric information acquisition system according to claim 7, wherein the optical sensor is an OPD.

9. The biological information acquisition system according to claim 8, wherein the biological information acquisition device is a wearable device having a ring shape that can be attached to and detached from the human body.

10. The biometric information acquisition system according to claim 9, wherein the wearable device is attached to the finger of a human body.

11. The biometric information acquisition system according to claim 9, wherein the wearable device is attached to the wrist or arm of a human body.

12. The biometric information acquisition system according to claim 9, wherein the wearable device is attached to the foot of a human body.

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