Imaging element and electronic apparatus

Abstract

The present technology relates to an imaging element and an electronic apparatus that make it possible to provide an imaging element in which the occurrence of noise is suppressed. In this invention, a first light-shielding part and a second light-shielding part each have a vertical light-shielding part extending in a wall shape in a direction orthogonal to a first surface, and a horizontal light-shielding part extending in a plate shape in a direction parallel to the first surface, and are arranged so as to cover at least a part of a region where the horizontal light-shielding part of the first light-shielding part is not disposed when viewed from the direction orthogonal to the first surface. A divided region that is divided is disposed in one of the first light-shielding part and the second light-shielding part, and a diffusion region is disposed in the divided region. The present technology can be applied to, e.g., an imaging element.

Description

Image pickup device, electronic device

[0001] The present technology relates to an image pickup device and an electronic device, and for example, relates to an image pickup device and an electronic device capable of performing imaging with reduced noise.

[0002] A global shutter type image pickup device that captures all pixels at the same timing is known. In this type of image pickup device, each pixel is provided with a charge holding unit that accumulates charges generated by a photoelectric conversion unit. In such an image pickup device, a technique has been proposed in which the photoelectric conversion unit and the charge holding unit are laminated, and a light shielding unit is formed between the photoelectric conversion unit and the charge holding unit to secure the area of the charge holding unit and prevent charge noise caused by light that passes through without being absorbed by the photoelectric conversion unit (see, for example, Patent Documents 1 and 2).

[0003] International Publication No. 2021 / 111818 International Publication No. 2022 / 102509

[0004] The present technology aims to be able to provide an image pickup device with reduced noise generation.

[0005] The image pickup device according to one aspect of the present technology includes a semiconductor substrate having a first surface and a second surface facing the first surface, a photoelectric conversion unit, a charge holding unit, a first light shielding unit, and a second light shielding unit disposed within the semiconductor substrate, the first light shielding unit and the second light shielding unit each having a vertical light shielding portion that extends in a wall shape in a direction orthogonal to the first surface, and a horizontal light shielding portion that extends in a plate shape in a direction parallel to the first surface and has a hexagonal shape when viewed from a direction orthogonal to the first surface, the photoelectric conversion unit being disposed on the second surface side of the horizontal light shielding portion of the first light shielding unit, the charge holding unit being disposed on the first surface side of the horizontal light shielding portion of the first light shielding unit, the horizontal light shielding portion of the second light shielding unit being disposed on the second surface side of the horizontal light shielding portion of the first light shielding unit and being disposed so as to cover at least a part of a region where the horizontal light shielding portion of the first light shielding unit is not disposed when viewed from a direction orthogonal to the first surface, at least one of the first light shielding unit and the second light shielding unit having a divided region disposed therein, a diffusion region being disposed in the divided region, and the diffusion region being shared by a plurality of pixels.

[0006] One aspect of this technology is an electronic device comprising a semiconductor substrate having a first surface and a second surface facing the first surface, and a photoelectric conversion unit, a charge holding unit, a first light-shielding unit, and a second light-shielding unit disposed within the semiconductor substrate, wherein the first light-shielding unit and the second light-shielding unit each have a vertical light-shielding unit that extends in a wall-like manner in a direction perpendicular to the first surface and a horizontal light-shielding unit that extends in a plate-like manner in a direction parallel to the first surface and has a hexagonal shape when viewed from a direction perpendicular to the first surface, the photoelectric conversion unit is disposed on the second surface side of the horizontal light-shielding unit of the first light-shielding unit, and the charge holding unit is disposed on the horizontal light-shielding unit of the first light-shielding unit The second light-shielding portion is positioned on the first surface side of the light-emitting portion, and the horizontal light-shielding portion of the second light-shielding portion is positioned on the second surface side of the horizontal light-shielding portion of the first light-shielding portion, and is positioned to cover at least a portion of the area where the horizontal light-shielding portion of the first light-shielding portion is not positioned when viewed from a direction perpendicular to the first surface, and at least one of the first light-shielding portion and the second light-shielding portion has a divided divided region, and a diffusion region is positioned in the divided region, and the diffusion region is an electronic device comprising an image sensor shared by a plurality of pixels and a processing unit for processing signals from the image sensor.

[0007] In one aspect of this technology, an image sensor and electronic device are provided, which include a semiconductor substrate having a first surface and a second surface facing the first surface, and a photoelectric conversion unit, a charge holding unit, a first light-shielding unit, and a second light-shielding unit disposed within the semiconductor substrate. The first light-shielding portion and the second light-shielding portion each have a vertical light-shielding portion that extends in a wall-like manner in a direction perpendicular to the first surface and a horizontal light-shielding portion that extends in a plate-like manner in a direction parallel to the first surface and has a hexagonal shape when viewed from a direction perpendicular to the first surface. The photoelectric conversion portion is positioned on the second surface side of the first light-shielding portion than the horizontal light-shielding portion of the first light-shielding portion. The charge-holding portion is positioned on the first surface side of the first light-shielding portion than the horizontal light-shielding portion of the first light-shielding portion. The horizontal light-shielding portion of the second light-shielding portion is positioned on the second surface side of the first light-shielding portion than the horizontal light-shielding portion of the first light-shielding portion and is positioned to cover at least a portion of the area where the horizontal light-shielding portion of the first light-shielding portion is not positioned when viewed from a direction perpendicular to the first surface. At least one of the first light-shielding portion and the second light-shielding portion has a divided region, and a diffusion region is positioned in the divided region, and the diffusion region is shared by a plurality of pixels.

[0008] Furthermore, electronic devices may be independent devices or internal blocks that make up a single device.

[0009] This figure shows an example of the schematic configuration of the image sensor. This figure shows an example of the circuit configuration of the image sensor. This figure shows an example of the planar configuration of the image sensor. This figure shows an example of the planar configuration of the image sensor. This figure shows an example of the cross-sectional configuration of the image sensor. This figure shows an example of the cross-sectional configuration of the image sensor. This figure shows an example of the configuration of the horizontal light-shielding section. This figure shows an example of the configuration of the horizontal light-shielding section. This figure is for explaining the manufacturing of the light-shielding section. This figure is for explaining the manufacturing of the light-shielding section. This figure is for explaining the placement position of the dividing region. This figure shows an example of the placement of the dividing region. This figure is for explaining the conditions for the placement position of the dividing region. This figure is for explaining the line width of the vertical light-shielding section. This figure shows an example of the placement of the vertical light-shielding section. This figure shows an example of the placement of the diffusion region. This figure shows an example of the placement of the diffusion region. This figure shows an example of the placement of the vertical light-shielding section. This figure shows an example of the circuit configuration when applied to 4-pixel sharing. This figure shows an example of the planar configuration when applied to 4-pixel sharing. This figure shows an example of the configuration of the horizontal light-shielding section when applied to 4-pixel sharing. This figure shows an example of the configuration of the horizontal light-shielding section when applied to 4-pixel sharing. This figure shows an example of the planar configuration when applied to phase difference detection pixels. This figure shows an example of on-chip lens arrangement when applied to phase-difference detection pixels. This figure shows an example of the configuration of the horizontal light-shielding section electronic equipment. This figure shows an example of the schematic configuration of an endoscopic surgical system. This block diagram shows an example of the functional configuration of a camera head and CCU. This block diagram shows an example of the schematic configuration of a vehicle control system. This is an explanatory diagram showing an example of the installation position of the external information detection unit and imaging unit.

[0010] The following describes the embodiments for implementing this technology.

[0011] <Structure of the Image Sensor in This Embodiment> The image sensor 101 in this embodiment is a back-illuminated image sensor with a global shutter, such as a CMOS (Complementary Metal Oxide Semiconductor) image sensor. The image sensor 101 in this embodiment receives light from the subject pixel by pixel, converts it into photoelectricity, and generates a pixel signal, which is an electrical signal.

[0012] A global shutter system is a method in which the exposure of all pixels is started and stopped simultaneously. Here, "all pixels" refers to all pixels that form a valid image, excluding dummy pixels and other pixels that do not contribute to image formation. The exposure does not necessarily have to be simultaneous, as long as the image distortion and exposure time differences are small enough not to be a problem. For example, the operation of simultaneously exposing multiple rows (tens of rows, etc.) in units, while shifting them by multiple rows in the row direction, is also included in the global shutter system. Simultaneous exposure of only a portion of the pixel area is also included in the global shutter system.

[0013] A back-illuminated image sensor is an image sensor in which a photoelectric conversion unit, such as a photodiode, is arranged for each pixel between the light-receiving surface into which light from the subject enters and the wiring layer on which wiring such as transistors that drive each pixel is provided, and the light-receiving surface into which light from the subject enters. The technology described herein may also be applicable to image sensors of imaging methods other than CMOS image sensors.

[0014] <Image Sensor Block Configuration> Figure 1 is a block diagram showing the schematic configuration of the image sensor 101 of this embodiment. As will be described later, the image sensor 101 of this embodiment is formed on a semiconductor substrate 11, and is therefore technically a solid-state image sensor, but hereafter it will simply be referred to as an image sensor.

[0015] The image sensor 101 includes, for example, a pixel array unit 111, a vertical drive unit 112, a ramp wave module 113, a column signal processing unit 114, a clock module 115, a data storage unit 116, a horizontal drive unit 117, a system control unit 118, and a signal processing unit 119.

[0016] The pixel array section 111 has a plurality of sensor pixels 121, each containing a photoelectric conversion element that generates and stores an electric charge corresponding to the amount of light incident from the subject. The plurality of sensor pixels 121 are arranged in both the horizontal (row) and vertical (column) directions, as shown in Figure 1. The sensor pixels 121 correspond to the pixels of the image sensor 101.

[0017] The pixel array section 111 has pixel drive lines 122 and vertical signal lines 123. The pixel drive lines 122 are wired along the row direction for each pixel row consisting of sensor pixels 121 arranged in a single column in the row direction. The vertical signal lines 123 are wired along the column direction for each pixel column consisting of sensor pixels 121 arranged in a single column in the column direction.

[0018] The vertical drive unit 112 consists of a shift register, an address decoder, and the like. The vertical drive unit 112 drives all of the multiple sensor pixels 121 in the pixel array unit 111 simultaneously, or drives them on a pixel row-by-pixel basis, by supplying signals to each of the multiple sensor pixels 121 via the multiple pixel drive lines 122.

[0019] The ramp wave module 113 generates a ramp wave signal used for A / D (Analog / Digital) conversion of the pixel signal and supplies it to the column signal processing unit 114. The column signal processing unit 114 consists of a shift register, an address decoder, etc., and performs noise reduction processing, correlated double sampling processing, A / D conversion processing, etc., to generate the pixel signal. The column signal processing unit 114 supplies the generated pixel signal to the signal processing unit 119.

[0020] The clock module 115 supplies clock signals for operation to each part of the image sensor 101. The horizontal drive unit 117 sequentially selects the unit circuits corresponding to the pixel rows of the column signal processing unit 114. Through this selective scanning by the horizontal drive unit 117, the pixel signals processed for each unit circuit in the column signal processing unit 114 are sequentially output to the signal processing unit 119.

[0021] The system control unit 118 consists of a timing generator that generates various timing signals. Based on the timing signals generated by the timing generator, the system control unit 118 controls the drive of the vertical drive unit 112, ramp wave module 113, column signal processing unit 114, clock module 115, and horizontal drive unit 117.

[0022] The signal processing unit 119 performs signal processing such as arithmetic processing on the pixel signals supplied from the column signal processing unit 114, while temporarily storing the data in the data storage unit 116 as needed, and outputs an image signal consisting of each pixel signal.

[0023] The image sensor 101 is composed of one or more semiconductor substrates 11. For example, it is possible to form the vertical drive unit 112, ramp wave module 113, column signal processing unit 114, clock module 115, data storage unit 116, horizontal drive unit 117, system control unit 118, and signal processing unit 119 on a separate semiconductor substrate, and then electrically connect this separate semiconductor substrate to the semiconductor substrate 11 on which the pixel array unit 111 is formed by a Cu-Cu junction or the like to constitute the image sensor 101. It is also possible to form some of the elements constituting the pixel array unit 111 on a separate semiconductor substrate.

[0024] <Sensor Pixel Circuit Configuration Example> Figure 2 is an equivalent circuit diagram of the sensor pixel 121. Figure 3 is a planar layout diagram of a part of the pixel area within the pixel array. Figure 3 shows a 4x4 area of ​​16 pixels. Figure 4 is a planar layout diagram showing a 2x2 area of ​​4 pixels. Here, we will explain using an example configuration where the floating diffusion region FD and reset transistor RST are shared by two pixels.

[0025] As shown in Figures 2 to 4, the sensor pixel 121-1 includes a photoelectric conversion unit 40-1, a charge holding unit MEM1, transfer transistors TRY1, TRX1, TRG1, discharge transistor OFG1, floating diffusion region FD, conversion efficiency switching transistor FDG, reset transistor RST, amplification transistor AMP, and selection transistor SEL. Similarly, the sensor pixel 121-2 includes a photoelectric conversion unit 40-2, a charge holding unit MEM2, transfer transistors TRY2, TRX2, TRG2, discharge transistor OFG2, floating diffusion region FD, reset transistor RST, conversion efficiency switching transistor FDG, amplification transistor AMP, and selection transistor SEL.

[0026] The floating diffusion region FD, the conversion efficiency switching transistor FDG, the reset transistor RST, the amplification transistor AMP, and the selection transistor SEL are supplied by sensor pixels 121-1 and 121-2. In the following description, since sensor pixels 121-1 and 121-2 have the same configuration, the configuration of sensor pixel 121-1 will be used as an example. Also, when there is no need to distinguish between sensor pixels 121-1 and 121-2, they will simply be referred to as sensor pixel 121, and other parts will be described similarly.

[0027] Note that the planar layout diagrams in Figures 3 and 4 do not show the conversion efficiency switching transistor FDG, the reset transistor RST, the amplification transistor AMP, and the selection transistor SEL. This is because, in the examples shown in Figures 3 and 4, these transistors are formed on a semiconductor substrate separate from the semiconductor substrate 11 on which the main part of the pixel array 111 is located.

[0028] The photoelectric conversion unit 40 is configured, for example, as a photodiode PD, and generates charge by photoelectric conversion according to the amount of light received. The charge holding unit MEM is a region that temporarily holds the charge generated and stored in the photoelectric conversion unit 40 in order to realize a global shutter function. The charge holding unit MEM holds the charge transferred from the photoelectric conversion unit 40.

[0029] The transfer transistor TRY is connected to the photoelectric conversion unit 40 in the sensor pixel 121 and transfers the charge (pixel signal) converted photoelectrically by the photoelectric conversion unit 40 to the transfer transistor TRX. Transfer transistors TRY and TRX may be replaced with a single transfer transistor. A charge holding unit MEM is connected to transfer transistors TRY and TRX. The potential of the charge holding unit MEM is controlled by a control signal applied to the gate electrodes of transfer transistors TRY and TRX.

[0030] For example, when the transfer transistors TRY and TRX are turned on, the potential of the charge holding unit MEM deepens, and when the transfer transistors TRY and TRX are turned off, the potential of the charge holding unit MEM becomes shallower. Then, for example, when the transfer transistors TRY and TRX are turned on, the charge stored in the photoelectric conversion unit 40 is transferred to the charge holding unit MEM via the transfer transistors TRY and TRX.

[0031] The drain of transfer transistor TRX is electrically connected to the source of transfer transistor TRG. The gates of transfer transistors TRY and TRX are connected to the pixel drive line 122.

[0032] The transfer transistor TRG is connected between the transfer transistor TRX and the floating diffusion region FD. The transfer transistor TRG transfers the charge held in the charge holding unit MEM to the floating diffusion region FD in response to a control signal applied to its gate electrode. For example, when the transfer transistor TRX is turned off and the transfer transistor TRG is turned on, the charge held in the charge holding unit MEM is transferred to the floating diffusion region FD. The drain of the transfer transistor TRG is electrically connected to the floating diffusion region FD. The gate of the transfer transistor TRG is connected to the pixel drive line 122.

[0033] The floating diffusion region FD is a floating diffusion region that temporarily holds the charge output from the photoelectric conversion unit 40 via the transfer transistor TRG. For example, a reset transistor RST is connected to the floating diffusion region FD, and a vertical signal line VSL (123) is connected via an amplification transistor AMP and a selection transistor SEL.

[0034] The discharge transistor OFG initializes (resets) the photoelectric conversion unit 40 in response to a control signal applied to its gate electrode. The drain of the discharge transistor OFG is connected to the power line VDD. The source of the discharge transistor OFG is connected to the photoelectric conversion unit 40.

[0035] For example, when the emission transistor OFG is turned on, the potential of the photoelectric conversion unit 40 is reset to the potential level of the power line VDD. In other words, the photoelectric conversion unit 40 is initialized.

[0036] The reset transistor RST initializes (resets) each region from the charge holding section MEM to the floating diffusion region FD in response to the control signal applied to its gate electrode. The drain of the reset transistor RST is connected to the power line VDD. The source of the reset transistor RST is connected to the floating diffusion region FD.

[0037] For example, when the transfer transistor TRG and the reset transistor RST are turned on, the potentials of the charge holding section MEM and the floating diffusion region FD are reset to the potential level of the power line VDD. In other words, by turning on the reset transistor RST, the charge holding section MEM and the floating diffusion region FD are initialized.

[0038] The amplifying transistor AMP has its gate electrode connected to the floating diffusion region FD and its drain connected to the power line VDD, and serves as the input to a source follower circuit that reads out the charge obtained by photoelectric conversion in the photoelectric conversion unit 40. In other words, the source of the amplifying transistor AMP is connected to the vertical signal line VSL (123) via the selection transistor SEL, thereby forming a source follower circuit with a constant current source connected to one end of the vertical signal line VSL (123).

[0039] The selection transistor SEL is connected between the source of the amplification transistor AMP and the vertical signal line VSL (123). A control signal is supplied to the gate electrode of the selection transistor SEL as a selection signal. When the control signal is turned on, the selection transistor SEL becomes conductive, and the sensor pixel 121 connected to the selection transistor SEL becomes selected. When the sensor pixel 121 is selected, the pixel signal output from the amplification transistor AMP is read out to the column signal processing unit 114 via the vertical signal line VSL (123).

[0040] As shown in Figures 3 and 4, the transfer transistors TRG, TRX, and TRY and the emission transistor OFG of one sensor pixel 121 are arranged within the sensor pixel 121. The arrangement of each transistor in two adjacent sensor pixels 121 in the Y direction is symmetrical with respect to the boundary between those two sensor pixels 121. The arrangement of each transistor in two adjacent sensor pixels 121 in the X direction is symmetrical with respect to the boundary between those two sensor pixels 121.

[0041] A first light-shielding section 21 and a second light-shielding section 22 are arranged between the sensor pixels 121, and each sensor pixel 121 is separated (electrically separated) by the first light-shielding section 21 and the second light-shielding section 22.

[0042] Refer to the sensor pixel 121 located in the upper left of Figure 4. A second light-shielding section 22 is arranged in an L-shape to the left and above the sensor pixel 121. A first light-shielding section 21 is arranged in an L-shape to the right and below the sensor pixel 121. The first light-shielding section 21 located below is divided (a divided region is provided), and a floating diffusion region FD is arranged between the first light-shielding section 21-1 and the first light-shielding section 21-2.

[0043] Above the floating diffusion region FD in the figure, a transfer transistor TRG is arranged. Above the left upper side of the transfer transistor TRG in the figure, a transfer transistor TRY is arranged, and above the right upper side in the figure, a transfer transistor TRX is arranged. Below (inside the substrate) the transfer transistor TRX and the transfer transistor TRY, a charge holding part MEM is arranged. The photoelectric conversion part 40 within one sensor pixel 121 is arranged over the entire area of the sensor pixel 121.

[0044] On the side of the second light-shielding part 22 arranged on the right side in the figure, a discharge transistor OFG and a diffusion region VDD serving as a drain for resetting the photoelectric conversion part 40 are provided.

[0045] The planar layout of each transistor of the sensor pixel 121 is not necessarily limited to that shown in FIGS. 3 and 4. If the arrangement of each transistor within the sensor pixel 121 changes, the arrangement locations of the photoelectric conversion part 40, the charge holding part MEM, etc. arranged below it also change.

[0046] Here, a division region is provided in the vertical light-shielding part 21V of the first light-shielding part 21 arranged in the horizontal direction, and the floating diffusion region FD is arranged in the division region. The following description continues with the example where the floating diffusion region FD is shared between adjacent sensor pixels 121 in the vertical direction, but this example does not limit the scope of application of the present technology.

[0047] For example, a division region is provided in the vertical light-shielding part 21V of the first light-shielding part 21 arranged in the vertical direction, and the floating diffusion region FD is arranged in the division region. The present technology can also be applied to the case where the floating diffusion region FD is shared between adjacent sensor pixels 121 in the horizontal direction. Also, the description is given by taking the example where a division region is provided in the first light-shielding part 21, but the present technology can also be applied to the case where a division region is provided in the second light-shielding part 22 and the floating diffusion region FD is arranged.

[0048] <Example of the cross-sectional structure of the imaging device> FIG. 5 is a longitudinal cross-sectional view showing the cross-sectional structure of the imaging device 101, and FIG. 6 is a magnified longitudinal cross-sectional view of a part including the photoelectric conversion part 40 of the imaging device 101. The symbols "P" and "N" in FIG. 6 represent a P-type semiconductor region and an N-type semiconductor region, respectively.

[0049] The imaging element 101 has a structure in which a first substrate 201, a wiring layer 202, and a second substrate 203 are laminated. The first substrate 201 is provided with a photoelectric conversion unit 40 and the like, the wiring layer 202 is provided with wirings for electrically connecting the first substrate 201 and the second substrate 203, and the second substrate 203 is provided with an amplification transistor AMP and the like.

[0050] One main surface of the semiconductor substrate 11 on the side where the wiring layer 202 is disposed is referred to as a first surface 11A, and one main surface on the side where the on-chip lens LNS is disposed is referred to as a second surface 11B or a light receiving surface. The first surface 11A is a surface opposite to the light incident surface of the semiconductor substrate 11. The second surface 11B is the light incident surface of the semiconductor substrate 11. The first surface 11A may also be referred to as the "front surface", and the second surface 11B may be referred to as the "back surface".

[0051] The planar configuration example of the sensor pixel 121 shown in FIG. 4 shows the planar configuration example in the line segment A - A' shown in FIGS. 5 and 6, and is the planar configuration example on the first surface 11A of the imaging element 101. The description will continue with reference to FIG. 4 as appropriate.

[0052] In the imaging element 101, as the semiconductor substrate 11, a single crystal silicon substrate having a first surface 11A composed of a crystal plane with a plane index {111} is used. One of the reasons is that the formation of the first light shielding portion 21 and the second light shielding portion 22 described later is performed using crystal anisotropic wet etching. Details of the crystal anisotropic wet etching will be described later.

[0053] The semiconductor substrate 11 has a P-type semiconductor region 41 and an N-type semiconductor region 42 inside, and a photodiode is formed from this P-type semiconductor region 41 and N-type semiconductor region 42. A part of the N-type semiconductor region 42 of this photodiode becomes the photoelectric conversion unit 40. The light incident on the second surface 11B is photoelectrically converted at the photoelectric conversion unit of the N-type semiconductor region 42 to generate charges.

[0054] Note that a concentration gradient may be provided in the N-type semiconductor region 42 such that the N-type impurity concentration gradually increases from the light incident surface side (the first surface 11B) toward the surface side (the second surface 11A).

[0055] In the example shown in Figure 6, a P-type semiconductor region 41 is formed between the N-type semiconductor region 42 and the first surface 11A of the semiconductor substrate 11. This P-type semiconductor region 41 has the effect of pinning the surface states of the semiconductor substrate 11 and suppressing dark current.

[0056] The charge holding section MEM is configured as an N+ type semiconductor region provided within the P-type semiconductor region 41. The transfer transistor TRY (not shown in Figures 5 and 6) transfers the charge photoelectrically converted in the photoelectric conversion section 40 to the transfer transistor TRX via the vertical gate electrode VG. The gate electrodes (not shown in Figures 5 and 6) of the transfer transistors TRY, TRX, TRG, and emission transistor OFG are all provided on the first surface 11A side of the semiconductor substrate 11.

[0057] The floating diffusion region FD is formed in the divided region where the second light-shielding portion 22 is divided, as shown in the planar configuration example in Figure 4. In Figures 5 and 6, it is located in a position not shown, but it is configured as an N-type semiconductor region located within the P-type semiconductor region 41.

[0058] The first light-shielding portion 21 and the second light-shielding portion 22 are portions that have light-shielding properties. The first light-shielding portion 21 and the second light-shielding portion 22 have the function of absorbing or reflecting light. The first light-shielding portion 21 and the second light-shielding portion 22 have vertical light-shielding portions 21V and 22V that extend in a wall-like manner in a direction perpendicular to the first surface 11A of the semiconductor substrate 11, and horizontal light-shielding portions 21H and 22H that extend in a plate-like manner in a direction parallel to the first surface 11A of the semiconductor substrate 11.

[0059] One of the features of the image sensor 101 is that it includes a first light-shielding section 21 and a second light-shielding section 22 having a specific configuration. Another feature of the image sensor 101 is that it has a multi-stage light-shielding structure, and each stage has a hexagonal shielding structure that is independent in any direction in the plane. The specific configurations of the first light-shielding section 21 and the second light-shielding section 22 will be described later.

[0060] The wiring layer 202 is a layer on which various wirings are formed, and is provided on the first surface 11A side of the semiconductor substrate 11. The wiring layer 202 may also have other circuit boards bonded to it.

[0061] A fixed charge film 211 is laminated on the second surface 11B of the semiconductor substrate 11. The fixed charge film 211 has a negative fixed charge to suppress the generation of dark current caused by the interface state of the second surface 11B, which is the light-receiving surface of the semiconductor substrate 11. The electric field induced by the fixed charge film 211 causes a hole accumulation layer to form near the second surface 11B of the semiconductor substrate 11. This hole accumulation layer suppresses the generation of electrons from the second surface 11B.

[0062] A color filter CF is positioned below the fixed charge film 211 (in the -Z direction), and an on-chip lens LNS is positioned below the color filter CF (in the -Z direction). The color filter CF and the on-chip lens LNS are provided for each sensor pixel 121.

[0063] <Specific Configuration Examples of the First Light-Shielding Section 21 and the Second Light-Shielding Section 22> Next, the specific configurations of the first light-shielding section 21 and the second light-shielding section 22 will be described. As described above, the image sensor 101 has a multi-stage light-shielding structure, and one of its features is that each stage has an independent hexagonal shielding structure in any direction within the plane.

[0064] The first light-shielding portion 21 and the second light-shielding portion 22 are composed of a light-shielding material portion located in the center and an insulating film covering its periphery (details will be described later with reference to Figures 9 to 11). The insulating film ensures electrical insulation between the light-shielding material portion and the semiconductor substrate 11.

[0065] A pinning layer formed as a P-type semiconductor region can also be provided in the region surrounding the first light-shielding portion 21 and the second light-shielding portion 22 within the semiconductor substrate 11. When a pinning layer is provided, it is provided as a P+-type semiconductor region with a higher concentration of P-type impurities than the P-type semiconductor region 41. The pinning layer has the effect of fixing the surface states of the first light-shielding portion 21 and the second light-shielding portion 22, suppressing dark current, and improving the saturation charge amount (Qs) of the image sensor 101.

[0066] The first light-shielding portion 21 and the second light-shielding portion 22 each have vertical light-shielding portions 21V and 22V that extend in a wall-like manner in a direction perpendicular to the first surface 11A of the semiconductor substrate 11, and horizontal light-shielding portions 21H and 22H that extend in a plate-like manner in a direction parallel to the first surface 11A of the semiconductor substrate 11. The vertical light-shielding portions 21V and 22V of the first light-shielding portion 21 and the second light-shielding portion 22 are both formed to penetrate the semiconductor substrate 11.

[0067] The horizontal light-shielding portion 21H of the first light-shielding portion 21 and the horizontal light-shielding portion 22H of the second light-shielding portion 22 are positioned at different locations in the direction perpendicular to the first surface 11A of the semiconductor substrate 11 (Z direction). The horizontal light-shielding portion 21H of the first light-shielding portion 21 is positioned closer to the first surface 11A of the semiconductor substrate 11 than the horizontal light-shielding portion 22H of the second light-shielding portion 22. In other words, the horizontal light-shielding portion 22H of the second light-shielding portion 22 is positioned closer to the second surface 11B of the semiconductor substrate 11 than the horizontal light-shielding portion 21H of the first light-shielding portion 21.

[0068] As shown in Figures 3 and 4, the vertical light-shielding portions 21V and 22V of the first light-shielding portion 21 and the second light-shielding portion 22 are arranged along the boundary portions of a plurality of sensor pixels 121 arranged in an orthogonal grid in a plan view. Here, a plan view means viewing from a direction (Z direction) perpendicular to the first surface 11A of the semiconductor substrate 11.

[0069] The first light-shielding portion 21 is independently arranged for every 2x2 of the four sensor pixels 121. That is, the image sensor 101 has a plurality of first light-shielding portions 21 independently arranged for every 2x2 of the four sensor pixels 121. Here, 2x2 means that the sensor pixels 121 are arranged in pairs in the X direction and pairs in the Y direction.

[0070] Similarly, the second light-shielding portion 22 is independently arranged for each of the four 2x2 sensor pixels 121. In other words, the image sensor 101 has a plurality of second light-shielding portions 22 independently arranged for each of the four 2x2 sensor pixels 121.

[0071] Note that the 4x4 sensor pixels 121 on which the second light-shielding portion 22 is located are not the same as the 4x4 sensor pixels 121 on which the first light-shielding portion 21 is located. The 4x4 sensor pixels 121 on which the second light-shielding portion 22 is located are selected by shifting them by the amount of one sensor pixel 121 in each of the X and Y directions, as shown in Figures 3 and 4.

[0072] The vertical light-shielding portion 21V of the first light-shielding portion 21 is positioned on two adjacent sides of the four sides surrounding each sensor pixel 121, and the vertical light-shielding portion 22V of the second light-shielding portion 22 is positioned on the other two sides. In other words, the vertical light-shielding portions 21V and 22V of the first light-shielding portion 21 and the second light-shielding portion 22 are positioned to surround each sensor pixel 121.

[0073] Specifically, the horizontal light-shielding portion 21V of the first light-shielding portion 21 is arranged along the boundary portion of the four 2x2 sensor pixels 121. In a plan view, the horizontal light-shielding portion 21V of the first light-shielding portion 21 has a portion extending in the <112> direction and a portion extending in the <110> direction. Furthermore, in a plan view, the horizontal light-shielding portion 21V of the first light-shielding portion 21 has a shape in which the portion extending in the <112> direction and the portion extending in the <110> direction intersect in a cross shape.

[0074] The <112> direction refers to the crystal direction of orientation index <112> of the semiconductor substrate 11. The <110> direction refers to the crystal direction of orientation index <110> of the semiconductor substrate 11. In this specification, the <112> direction corresponds to the Y direction, and the <110> direction corresponds to the X direction.

[0075] The reason the horizontal light-shielding portion 21V of the first light-shielding portion 21 has a portion extending in the <112> direction and a portion extending in the <110> direction is that the first light-shielding portion 21 is formed using crystal anisotropic wet etching. Details of crystal anisotropic wet etching will be described later.

[0076] The portion of the horizontal light-shielding section 21V extending in the <112> direction is positioned along the boundary between the two left and two right sensor pixels 121 of the four 2x2 sensor pixels 121. The portion of the horizontal light-shielding section 21V extending in the <110> direction is positioned along the boundary between the two upper and two lower sensor pixels 121 of the four 2x2 sensor pixels 121.

[0077] The horizontal light-shielding portion 21V of the first light-shielding portion 21 has a portion that extends a short distance in the <110> direction, which is connected to the Y-side end of the portion that extends in the <112> direction. This portion is provided to cover the gap between the vertical light-shielding portion 21V of the first light-shielding portion 21 and the vertical light-shielding portion 22V of the second light-shielding portion 22.

[0078] The vertical light-shielding portion 22V of the second light-shielding portion 22 is arranged along the boundary portion of the four 2x2 sensor pixels 121. In a plan view, the vertical light-shielding portion 22V of the second light-shielding portion 22 has a portion extending in the <112> direction and a portion extending in the <110> direction. In a plan view, the vertical light-shielding portion 22V of the second light-shielding portion 22 has a shape in which the portion extending in the <112> direction and the portion extending in the <110> direction intersect in a cross shape. The vertical light-shielding portion 22V has a portion that extends a short distance in the <110> direction, which is connected to the Y-direction end of the portion extending in the <112> direction.

[0079] As described above, the vertical light-shielding portions 21V and 22V of the first light-shielding portion 21 and the second light-shielding portion 22 are arranged to surround each sensor pixel 121. The first light-shielding portion 21 and the second light-shielding portion 22 are arranged such that the gap between the vertical light-shielding portion 21V of the first light-shielding portion 21 and the vertical light-shielding portion 22V of the second light-shielding portion 22 is located at the corner of the sensor pixel 121. Therefore, the image sensor 101 of this embodiment has suppressed crosstalk between adjacent sensor pixels 121, and consequently, the occurrence of color mixing and blooming is suppressed.

[0080] Figure 7 is a cross-sectional view showing the configuration of the horizontal light-shielding portion 21H of the first light-shielding portion 21, and shows the B-B' section of Figure 6. Figure 8 is a cross-sectional view showing the configuration of the horizontal light-shielding portion 22H of the second light-shielding portion 22, and shows the C-C' section of Figure 6.

[0081] As shown in Figure 7, the horizontal light-shielding portion 21H of the first light-shielding portion 21 has a hexagonal shape in plan view. That is, the first light-shielding portion 21 has a horizontal light-shielding portion 21H that has a hexagonal shape in plan view.

[0082] Similarly, as shown in Figure 8, the horizontal light-shielding portion 22H of the second light-shielding portion 22 has a hexagonal shape in plan view. That is, the second light-shielding portion 22 has a horizontal light-shielding portion 22H that has a hexagonal shape in plan view.

[0083] The hexagons of the horizontal light-shielding sections 21H and 22H have six sides extending in the <110> direction. The six interior angles of the hexagon are all 120°. That is, the horizontal light-shielding sections 21H and 22H of the first light-shielding section 21 and the second light-shielding section have a hexagonal shape in plan view. And that hexagon has six sides extending in the <110> direction. The interior angles of that hexagon are all 120°. Note that in Figures 7 and 8, the X direction is shown as corresponding to the <110> direction, but the direction obtained by rotating the X direction by 60° or 120° around the Z direction also corresponds to the <110> direction.

[0084] As described later, the horizontal light-shielding portions 21H and 22H are formed by autonomous shape control without the use of etching stoppers or the like. Therefore, the image sensor 101 of this embodiment has fewer grid defects, and consequently, the occurrence of white spots and blinking spots is suppressed.

[0085] The horizontal light-shielding portion 21H of the first light-shielding portion 21 and the horizontal light-shielding portion 22H of the second light-shielding portion 22 are arranged such that their respective peripheral edges overlap within the sensor pixel 121 in a plan view. In other words, the horizontal light-shielding portion 22H of the second light-shielding portion 22 is arranged to cover the area where the horizontal light-shielding portion 21H of the first light-shielding portion 21 is not located in a plan view. The horizontal light-shielding portion 21H of the first light-shielding portion 21 is arranged to cover the area where the horizontal light-shielding portion 22H of the second light-shielding portion 22 is not located in a plan view. This configuration makes it possible to suppress the incidence of light that has not been photoelectrically converted by the photoelectric conversion portion 40 onto the charge-holding portion MEM and the wiring layer 202.

[0086] The image sensor 101 of this embodiment comprises a semiconductor substrate 11 having a first surface 11A and a second surface 11B, a photoelectric conversion unit 40, a charge holding unit MEM, a first light-shielding unit 21, and a second light-shielding unit 22 arranged within the semiconductor substrate 11. The first light-shielding unit 21 and the second light-shielding unit 22 each have vertical light-shielding units 21V and 22V that extend in a wall-like manner in a direction perpendicular to the first surface 11A, and horizontal light-shielding units 21H and 22H that extend in a plate-like manner in a direction parallel to the first surface 11A. The horizontal light-shielding units 21H and 22H have a hexagonal shape when viewed from a direction perpendicular to the first surface 11A.

[0087] The photoelectric conversion unit 40 is positioned on the second surface 11B side of the horizontal light-shielding portion 21H of the first light-shielding portion 21. The charge-holding portion MEM is positioned on the first surface 11A side of the horizontal light-shielding portion 21V of the first light-shielding portion 21. The horizontal light-shielding portion 22H of the second light-shielding portion 22 is positioned on the second surface 22B side of the horizontal light-shielding portion 21H of the first light-shielding portion 21, and is positioned to cover the area where the horizontal light-shielding portion 21H of the first light-shielding portion 21 is not located when viewed from a direction perpendicular to the first surface 11A.

[0088] Such an image sensor 101 is designed to suppress the generation of noise caused by crosstalk, dark current, lattice defects, or PLS.

[0089] In the above-described embodiment, the image sensor 101 has an overlapping horizontal light-shielding portion 21H of the first light-shielding portion 21 and the horizontal light-shielding portion 22H of the second light-shielding portion 22. However, the image sensor 101 of this disclosure is not limited to such an arrangement. Even an image sensor 101 in which the horizontal light-shielding portion 21H of the first light-shielding portion 21 and the horizontal light-shielding portion 22H of the second light-shielding portion 22 do not overlap has fewer grid defects, as described above, and consequently, the occurrence of white spots and blinking spots is suppressed.

[0090] Referring to Figure 4, the floating diffusion region FD is positioned at a location where the vertical light-shielding portion 21V is divided. In the region where this floating diffusion region FD is located, as shown in Figures 7 and 8, even within the plane where the horizontal light-shielding portions 21H and 22H are formed, the vertical light-shielding portion 21V is divided, and vertical light-shielding portions 21V-1 and 21V-2 are provided, with a P-type semiconductor region formed in the gap between them. Thus, even if there is a region where the vertical light-shielding portion 21V is divided in a plan view, the horizontal light-shielding portion 21H and the second light-shielding portion 22H are also provided in that region, so the above-described effects can be obtained.

[0091] By providing a partitioned region in the vertical light-shielding section 21V, a floating diffusion region FD can be arranged. Since the partitioned region is provided between the sensor pixels 121, a structure can be created in which the floating diffusion region FD can be shared by two adjacent sensor pixels 121.

[0092] <Method of manufacturing the image sensor> Next, an example of a method of manufacturing the image sensor 101 will be described. Figures 9 to 11 are longitudinal cross-sectional views showing an example of a method of manufacturing the image sensor 101.

[0093] As shown in step S11 of Figure 9, a semiconductor substrate 11 is prepared. The semiconductor substrate 11 is a single-crystal silicon substrate having a crystal orientation of plane index {111}. Trenches 21T and 22T are formed in accordance with the positions of the vertical light-shielding portions 21V and 22V of the first light-shielding portion 21 and the second light-shielding portion 22. The trenches 21T and 22T can be formed by dry etching using a hard mask. The hard mask has a shape with a divided region in the vertical light-shielding portion 21V.

[0094] As shown in step S12, sidewalls 51 are formed to cover the sides and bottom of the trenches 21T and 22T. The sidewalls 51 are formed as an insulating film made of, for example, SiN (silicon nitride) or SiO2 (silicon oxide).

[0095] As shown in step S13, the sidewalls 51 on the bottom of the trenches 21T and 22T are removed while the sidewalls 51 on the sides remain, and the trenches 21T and 22T are deepened by the thickness of the horizontal cavities 21Z and 22Z that will be formed next. The removal of the sidewalls 51 on the bottom and the deepening of the trenches 21T and 22T can be carried out by dry etching or the like.

[0096] As shown in step S14 (Figure 10), horizontal cavities 21Z and 22Z are formed that communicate with the bottoms of the trenches 21T and 22T. The horizontal cavities 21Z and 22Z are formed in accordance with the positions of the horizontal light-shielding portions 21H and 22H of the first light-shielding portion 21 and the second light-shielding portion 22. The horizontal cavities 21Z and 22Z can be formed by crystal anisotropic wet etching.

[0097] In crystal anisotropic wet etching, different etching solutions with varying etching rates are used depending on the plane orientation of the semiconductor substrate 11. Specifically, a solution is used in which the etching rate in the <110> direction is higher than in the <111> and <112> directions. Examples of such solutions include potassium hydroxide (KOH), sodium hydroxide (NaOH), cesium hydroxide (CsOH), hydrazine (N2H4), or ammonium hydroxide (NH4OH). Organic solutions such as aqueous ethylenediamine pyrocatechol (EDP) and tetramethylammonium hydroxide (TMAH) can also be used. Particularly preferred solutions are potassium hydroxide (KOH), ammonium hydroxide (NH4OH), or tetramethylammonium hydroxide (TMAH).

[0098] By using such a chemical solution, etching proceeds in the <110> direction (X direction) from the trenches 21T and 22T extending in the <112> direction (Y direction). On the other hand, the upper and lower surfaces of the horizontal cavities 21Z and 22Z are crystal planes with a plane index of {111}, so etching hardly progresses there. Also, etching does not progress as much in the <112> direction (Y direction) as it does in the <110> direction (X direction). Furthermore, when etching progresses in the <110> direction (X direction), crystal planes with a plane index of {111} appear. In addition, the trenches 21T and 22T extending in the <110> direction (X direction) have the function of promoting the progress of etching.

[0099] The combined effects of the above processes form horizontal cavities 21Z and 22Z that have a hexagonal shape in plan view. Furthermore, as etching progresses, crystal planes with plane index {111} appear, and the side walls of horizontal cavities 21Z and 22Z correspond to crystal planes with plane index {111}. Therefore, the six sides of the hexagon are located on crystal planes with plane index {111} and extend in the <110> direction in plan view. In addition, all six interior angles of the hexagon are 120°.

[0100] As shown in step S15, the sidewall 51 is removed and the trenches 21T and 22T are further extended vertically. The sidewall 51 can be removed by wet etching or the like. The sidewall 51 may also be removed after the trenches 21T and 22T have been extended vertically. In that case, the sidewall 51 can be used as a hard mask when forming the trenches 21T and 22T.

[0101] As shown in step S16, a pinning layer 34 is formed in the region surrounding the trenches 21T, 22T and the horizontal cavities 21Z, 22Z within the semiconductor substrate 11. The pinning layer 34 can be formed, for example, using a solid-phase diffusion method. When using a solid-phase diffusion method, the pinning layer 34 can be formed by a relatively simple method of diffusing P-type impurities from the inner surfaces of the trenches 21T, 22T and the horizontal cavities 21Z, 22Z. Thus, in the manufacturing method of the image sensor 101 of this embodiment, it is possible to form the pinning layer 34 in the FEOL (Front End of Line: substrate process) before forming the wiring layer 31, etc. Note that the pinning layer 34 will not be shown in the following figures.

[0102] As shown in step S17 (Figure 11), insulating films 21B and 22B are formed to cover the inner surfaces of the trenches 21T and 22T and the horizontal cavities 21Z and 22Z. The insulating films 21B and 22B can be formed by depositing SiO2 (silicon oxide) using the atomic layer deposition method. Alternatively, the insulating films 21B and 22B can be formed using the chemical vapor deposition method or the thermal oxidation method.

[0103] The insulating films 21B and 22B are composed of an insulating material such as SiO2 (silicon oxide).

[0104] As shown in step S18, the trenches 21T, 22T and the horizontal cavities 21Z, 22Z are filled with the materials constituting the light-shielding material portions 21A, 22A of the first light-shielding portion 21 and the second light-shielding portion 22. The filling of the materials constituting the light-shielding material portions 21A, 22A can be carried out, for example, using a chemical vapor deposition method.

[0105] The light-shielding material sections 21A and 22A are composed of a material containing at least one of the following: a single metal, a metal alloy, a metal nitride, and a metal silicide, all of which have light-shielding properties. More specifically, materials that constitute the light-shielding material sections 21A and 22A include W (tungsten), Ti (titanium), Ta (tantalum), Ni (nickel), Mo (molybdenum), Cr (chromium), Ir (iridium), platinum-iridium, TiN (titanium nitride), Al (aluminum), Cu (copper), Co (cobalt), or tungsten-silicon compounds. However, the materials that constitute the light-shielding material sections are not limited to these. For example, it is also possible to use light-shielding substances other than metals, such as carbon, oxide films, and electromic materials.

[0106] As shown in step S19, the material constituting the light-shielding material portions 21A and 22A and the insulating film 12B on the first surface 11A of the semiconductor substrate 11 are removed. The removal of the material constituting the light-shielding material portions 21A and 22A and the insulating film 12B can be performed, for example, by polishing and planarizing the first surface 11A side of the semiconductor substrate 11 using CMP (Chemical Mechanical Polishing).

[0107] In this process, the vertical light-shielding section 21V, the horizontal light-shielding section 21H, the vertical light-shielding section 22V, and the second light-shielding section 22H are formed. After this, the gate electrodes of the transfer transistors TRY and TRX, the charge-holding section MEM, the floating diffusion region FD, etc. are formed, and the image sensor 101, as described with reference to Figures 6 to 8, is formed.

[0108] The formation of the charge-holding portion MEM and the floating diffusion region FD can be carried out, for example, by implanting N-type ions into the semiconductor substrate 11. The floating diffusion region FD is formed in the partitioned region provided in the vertical light-shielding portion 21V.

[0109] This method for manufacturing the image sensor 101 makes it possible to manufacture an image sensor 101 in which the generation of noise caused by crosstalk, dark current, grid defects, or PLS is suppressed. Furthermore, this method for manufacturing the image sensor 101 makes it possible to reduce the number of processes and improve yield.

[0110] <Regarding the arrangement of the diffusion region, etc.> In the embodiment described above, as shown in Figure 12, an example was given in which a divided region is provided in which the vertical light-shielding portion 21V is divided, and the floating diffusion region FD is arranged in that divided region.

[0111] As shown in Figure 12, a divided region is provided in the vertical light-shielding section 21V located between the upper and lower sensor pixels 121-1 and 121-2, and the diffusion region of the floating diffusion region FD is arranged in this divided region. The floating diffusion region FD is shared by the sensor pixels 121-1 and 121-2. In the embodiment described above, it was explained that the diffusion region of the floating diffusion region FD is arranged, but it is also possible to configure it so that a diffusion region other than the floating diffusion region FD is arranged in the divided region of the vertical light-shielding section 21V.

[0112] For example, a diffusion region VDD connected to a voltage supply source that applies a predetermined voltage VDD, or a diffusion region GND connected to a supply source that supplies ground potential GND as a predetermined voltage, can be configured to be located in a divided region where the vertical light-shielding section 21V is divided. In the following description, we will continue the explanation using the example where the diffusion region of the floating diffusion region FD is located in a divided region of the vertical light-shielding section 21V, but this diffusion region can be appropriately replaced with the diffusion region VDD or the diffusion region GND.

[0113] By dividing the vertical light-shielding section 21V and placing the floating diffusion region FD in the resulting divided region, the area of ​​the photodiode PD and charge-holding section MEM can be expanded, improving the flexibility of the wiring layout and enabling improved conversion efficiency by reducing the diffusion region capacitance of the floating diffusion region FD.

[0114] The arrangement of the floating diffusion region FD shown in Figure 12 is such that vertical light-shielding sections 21V, which separate sensor pixels 121-1 and 121-2 that share the floating diffusion region FD, are located on both sides of the floating diffusion region FD. In other words, vertical light-shielding sections 21V-1 and 21V-2 exist on both sides of the floating diffusion region FD, and these vertical light-shielding sections 21V-1 and 21V-2 are vertical light-shielding sections 21V that separate sensor pixels 121-1 and 121-2 that share the floating diffusion region FD.

[0115] By positioning diffusion regions such as floating diffusion regions (FDs) in such locations, the trench gaps between pixels can be minimized, thereby suppressing optical and electrical crosstalk.

[0116] The position where the vertical light-shielding portion 21V is divided, in other words, the position where the floating diffusion region FD is placed, can be positioned approximately in the center of the sensor pixel 121, as shown in Figure 13A. If the distance from the vertical light-shielding portion 21V, which is arranged vertically in the figure, to the center of the floating diffusion region FD is denoted as distance L1, and the distance from the vertical light-shielding portion 22V to the center of the floating diffusion region FD is denoted as distance L2, then the floating diffusion region FD is positioned at the location where distance L1 and distance L2 are equal.

[0117] Since the floating diffusion region FD is located between vertically adjacent sensor pixels 121, it is also located in the center between vertically adjacent sensor pixels 121 in the figure. Therefore, the floating diffusion region FD is configured to be located in the center of two pixels that share the floating diffusion region FD.

[0118] As shown in Figure 13B, the floating diffusion region FD is connected to the amplification transistor AMP provided on the second substrate 203 via wiring in the wiring layer 202. Within the wiring layer 202, the first substrate 201 and the second substrate 203 are connected by Cu-Cu connections. The Cu-Cu connections are generally arranged at equal intervals to suppress short circuits due to overlapping misalignment and fluctuations in capacitive coupling.

[0119] As shown in Figure 13, by positioning the shared floating diffusion region FD (diffusion region) in the center between the shared pixels, the floating diffusion region FD can be connected to the Cu-Cu connection point, and the Cu-Cu connection point to the amplification transistor AMP, with the shortest possible wiring, thereby improving the efficiency of the wiring layout. Shorter wiring reduces wiring capacitance, which in turn improves conversion efficiency. The distance between the floating diffusion region FD of adjacent sensor pixels 121 can be made equal, which also reduces the left-right difference in electrical crosstalk.

[0120] The floating diffusion region FD (diffusion region) may be placed at a position other than the center between pixels, but it is preferable that it be placed at a position that satisfies the conditions described with reference to Figure 14. The horizontal light-shielding portion 21H formed within the image sensor 101 is formed in the shape described with reference to Figure 7, and is formed by the process described with reference to Figures 9 to 11.

[0121] If a divided region is formed in the vertical light-shielding portion 21V, and the position of that divided region is, for example, farther away from the vertical light-shielding portion 21V arranged vertically in Figure 14, the horizontal light-shielding portion 21H may not take the shape shown in Figure 7, and a gap may be created in the horizontal light-shielding portion 21H.

[0122] Referring again to Figure 7, the vertical light-shielding portion 21V-1 and the vertical light-shielding portion 21V-2 are formed with a dividing region in between, but the horizontal light-shielding portion 21H is also formed in this dividing region. In order for the horizontal light-shielding portion 21H to be formed in this dividing region as well, the following conditions must be met.

[0123] Referring to Figure 14, in the four 2x2 sensor pixels 121-1 to 121-4, the length of the vertically arranged light-shielding portion 21V is defined as length L, and the length from the vertically arranged first light-shielding portion 21V to the floating diffusion region FD (the sum of the width of the vertical light-shielding portion 21V-1 and the floating diffusion region FD) is defined as length S. With the lengths defined in this way, by providing a dividing region at a position where L / S ≥ 3 is satisfied, a horizontal light-shielding portion 21H with the shape shown in Figure 7 can be formed.

[0124] In the above-described embodiment, the case in which the line widths of the vertical light-shielding portions 21V-1 and 21V-2, which are located on both sides of the divided region, are the same was explained as an example. Line width is defined as the length in the vertical direction in the figure. In the example configuration of the vertical light-shielding portion 21V shown in Figure 15, the line width of the vertical light-shielding portion 21V-1 is formed to be thicker than the line width of the vertical light-shielding portion 21V-2. The line widths of the vertical light-shielding portions 21V-1 and 21V-2, which are located on both sides of the floating diffusion region FD (diffusion region), can be formed to be equal to or greater in thickness.

[0125] As explained with reference to Figures 9 to 11, the vertical light-shielding portion 21V and the horizontal light-shielding portion 21H are formed by wet etching and dry etching, respectively, after the trenches are formed. In this manufacturing process, if the trench depths differ during wet etching, the horizontal light-shielding portion 21H may be formed at different depths without being connected.

[0126] The vertically positioned light-shielding section 21V is connected to the vertically positioned light-shielding section 21V-1 in Figure 15, and since the line widths are set to be the same, the trench depth of the vertical light-shielding section 21V-1 and the trench depth of the vertical light-shielding section 21V are equivalent.

[0127] On the other hand, since the vertical light-shielding portion 21V-2 is shorter than the combined length of the vertical light-shielding portion 21V, which is arranged vertically and has the same line width, and the vertical light-shielding portion 21V-1, which is arranged horizontally, the etch rate during dry etching may be lower. Therefore, the trench depth of the vertical light-shielding portion 21V-2 may be shallower than the trench depth of the vertical light-shielding portion 21V-1.

[0128] To prevent this, the line width of the vertical light-shielding section 21V-2 can be made equal to or greater than the line width of the vertical light-shielding section 21V-1, thereby suppressing a decrease in the etching rate and adjusting the trench depth to be approximately the same.

[0129] In the embodiment described above, an example was given in which the vertical light-shielding portion 21V, which is arranged in the vertical direction, and the vertical light-shielding portion 21V-1, which is arranged in the horizontal direction, are connected (formed as an integrated unit). However, as shown in Figure 16A, they can also be provided in an unconnected state.

[0130] In the planar configuration example shown in Figure 16A, the vertical light-shielding portion 21V' arranged in the vertical direction and the vertical light-shielding portion 21V-1 arranged in the horizontal direction are separated and formed with a gap between the vertical light-shielding portion 21V' and the vertical light-shielding portion 21V-1.

[0131] For example, the vertical light-shielding sections 21V' and 21V-1 shown in Figure 15 are connected and arranged to intersect. When such intersecting regions exist, the trench may be formed deeper in the intersecting region than in other regions due to the microloading effect.

[0132] As shown in Figure 16A, the microloading effect can be suppressed by forming the vertical light-shielding portion 21V' and the vertical light-shielding portion 21V-1 in a state where there is no intersecting region.

[0133] Figure 16B is a cross-sectional view along the line segment E-E' in Figure 16A, showing an example of the cross-sectional configuration after the sidewall is removed during the manufacturing process. Figure 16C is a cross-sectional view along the line segment E-E' in Figure 16A, showing an example of the cross-sectional configuration after wet etching during the manufacturing process.

[0134] Referring to Figure 16B, the widths of the trenches in the vertical light-shielding sections 21V-1, 21V-1, and 21V' are different, but the depths of the trenches are approximately the same. By performing wet etching on trenches in this state, a horizontal light-shielding section 21H is formed connecting the trenches of the vertical light-shielding sections 21V-1, 21V-1, and 21V', as shown in Figure 16C.

[0135] By forming the vertical light-shielding portion 21V' and the vertical light-shielding portion 21V-1 separately, the microloading effect can be suppressed, and the horizontal light-shielding portion 21H can be made thinner, making it possible to reduce the thickness of the Si substrate and reduce the number of impurity injections.

[0136] In the embodiment described above, an example was given in which one floating diffusion region FD is shared by two sensor pixels 121. The diffusion region shared by the two sensor pixels 121 can be configured to include not only the floating diffusion region FD, but also a diffusion region VDD as a drain for photodiode reset, and a diffusion region GND for fixing the Pwell potential.

[0137] Figure 17A shows an example of a planar configuration in which the floating diffusion region FD and the drain VDD are shared by two sensor pixels 121. The floating diffusion region FD is supplied by sensor pixels 121-1 and 121-2 which are arranged adjacent to each other in the vertical direction, as in the embodiment described above, and is located in a divided region provided in the vertical light-shielding section 21V that separates sensor pixels 121-1 and 121-2.

[0138] A divided region is provided in the vertical light-shielding portion 22V located on the upper edge of the sensor pixel 121-1, and a diffusion region VDD is provided in this divided region. This diffusion region VDD is shared by the sensor pixel 121-1 and the sensor pixel 121 (not shown) located above the sensor pixel 121-1 in the figure. In other sensor pixels 121, a floating diffusion region FD is provided in the vertical light-shielding portion 21V, and a diffusion region VDD is provided in the vertical light-shielding portion 22V, and these are configured to be shared with adjacent sensor pixels 121.

[0139] Figure 17B shows a different location for the diffusion region VDD compared to the example shown in Figure 17A. In the sensor pixel 121 shown in Figure 17B, for example, the diffusion region VDD is provided at the upper left corner of sensor pixel 121-1. In the configuration example shown in Figure 17B, the portion where the vertical light-shielding portion 22V intersects is divided, a divided region is created, and the diffusion region VDD is provided in that divided region. As explained with reference to Figure 16, by not providing a portion that intersects the vertical light-shielding portion 22V, the microloading effect can be reduced, and the diffusion region can be placed in that region.

[0140] Figure 17C shows an example where a diffusion region GND is further provided. In the sensor pixel 121 shown in Figure 17C, for example, a diffusion region VDD is provided at the upper left corner of the sensor pixel 121-1, and a diffusion region GND is provided to its right via a vertical light-shielding portion 22V.

[0141] In this case, two diffusion regions are provided on one side of the sensor pixel 121-1. In other words, the vertical light-shielding section 22V can be configured to have two dividing regions, with a diffusion region placed in each of these dividing regions. Thus, a configuration in which multiple diffusion regions are provided on one side is also possible. The two dividing regions may be provided on the vertical light-shielding section 21V.

[0142] In the example shown in Figure 17, a diffusion region is provided in the vertical light-shielding portion 21V or vertical light-shielding portion 22V which is arranged horizontally in the figure. However, it is also possible to configure the vertical light-shielding portion 21V or vertical light-shielding portion 22V which is arranged vertically in the figure.

[0143] The arrangement of diffusion regions shown in Figure 17 is just one example, and this technology can be applied to other arrangements as well. For example, a diffusion region VDD or diffusion region GND can be placed in the partitioned region where the floating diffusion region FD is located, or a diffusion region GND can be placed instead of the diffusion region VDD.

[0144] Figure 18 shows an example in which the diffusion region is placed at the four corners of the sensor pixel 121. In the configuration example shown in Figure 18, the floating diffusion region FD is shared by four pixels in a 2x2 configuration. The configuration example shown in Figure 18 can be applied to the case of four-pixel sharing described later, or to the case of image plane phase difference detection pixels. The configuration example shown in Figure 18 shows the case when applied to image plane phase difference detection pixels, and shows an example in which the aspect ratio of the vertical and horizontal lengths of the sensor pixel 121 is 2:1.

[0145] A diffusion region GND is provided in the upper left corner of sensor pixel 121-1, which is located in the upper left, and a diffusion region VDD is provided in the lower left corner. A diffusion region GND is provided in the upper right corner of sensor pixel 121-2, which is located to the right of sensor pixel 121-1 in the diagram, and a diffusion region VDD is provided in the lower right corner. A floating diffusion region FD is provided in the center of the lower edge of sensor pixel 121-1 and sensor pixel 121-2.

[0146] As shown in Figure 18, the configuration allows for the sharing of at least one diffusion region with adjacent sensor pixels 121, and all trenches can be configured to separate the pixels that share the diffusion region. Since there is a high degree of freedom in the placement of the diffusion region, the degree of freedom in the layout of each part constituting the sensor pixel 121 including the diffusion region can be improved, and area efficiency can be further improved.

[0147] As shown in Figure 19, the vertical light-shielding portion 21V can also be configured to be integrally formed spanning three or more pixels. In the embodiment described above, the vertical light-shielding portion 21V, which is arranged vertically in the figure, is formed spanning two pixels, but as shown in Figure 19, the vertical light-shielding portion 21V can also be formed to span three or more pixels.

[0148] In the example shown in Figure 19, a vertical light-shielding portion 21V is formed across four sensors, sensor pixels 121-1, 121-2, 121-3, and 121-4, which are arranged vertically. By reducing the area of ​​the vertical light-shielding portion 21V that is divided, the light-shielding performance can be improved.

[0149] <Example configuration when applied to 4-pixel sharing> Figure 20 shows an example of the circuit configuration of the image sensor 101 when the floating diffusion region FD is shared by 2x2 4 pixels, and Figure 21 shows an example of a planar configuration.

[0150] Sensor pixel 121-1 includes PDa1, charge holding part MEMa1, conversion efficiency switching transistor FDG, transistors TRYa1, TRXa1, TRGa1, discharge transistor OFGa1, floating diffusion region FD, reset transistor RST, amplification transistor AMP, and selection transistor SEL. Similarly, sensor pixel 121-2 includes PDb1, charge holding part MEMb1, transfer transistors TRYb1, TRXb1, TRGb1, discharge transistor OFGb1, floating diffusion region FD, conversion efficiency switching transistor FDG, reset transistor RST, amplification transistor AMP, and selection transistor SEL.

[0151] Sensor pixel 121-3 has PDa2, charge holding part MEMa2, transfer transistors TRYa2, TRXa2, TRGa2, discharge transistor OFGa2, floating diffusion region FD, conversion efficiency switching transistor FDG, reset transistor RST, amplification transistor AMP, and selection transistor SEL. Similarly, sensor pixel 121-4 has PDb2, charge holding part MEMB2, transfer transistors TRYb2, TRXb2, TRGb2, discharge transistor OFGb2, floating diffusion region FD, conversion efficiency switching transistor FDG, reset transistor RST, amplification transistor AMP, and selection transistor SEL.

[0152] The floating diffusion region FD, the conversion efficiency switching transistor FDG, the reset transistor RST, the amplification transistor AMP, and the selection transistor SEL are shared by sensor pixels 121-1 to 121-4. In the following description, since sensor pixels 121-1 to 121-4 have the same configuration, the configuration of sensor pixel 121-1 will be used as an example. Also, when there is no need to distinguish between sensor pixels 121-1 to 121-4, they will simply be referred to as sensor pixel 121, and other parts will be described similarly.

[0153] The planar layout diagram in Figure 21 does not show the conversion efficiency switching transistor FDG, the reset transistor RST, the amplification transistor AMP, and the selection transistor SEL. This is because, in the example shown in Figure 21, these transistors are formed on a semiconductor substrate separate from the semiconductor substrate 11 on which the main part of the pixel array 111 is located.

[0154] As shown in Figure 21, the transfer transistors TRG, TRX, and TRY and the emission transistor OFG of one sensor pixel 121 are arranged within the sensor pixel 121. The arrangement of each transistor in two adjacent sensor pixels 121 in the Y direction is symmetrical with respect to the boundary between those two sensor pixels 121. The arrangement of each transistor in two adjacent sensor pixels 121 in the X direction is symmetrical with respect to the boundary between those two sensor pixels 121.

[0155] Vertical light-shielding sections 21V and 22V are placed between the sensor pixels 121, and each sensor pixel 121 is isolated (electrically isolated) by the vertical light-shielding sections 21V and 22V.

[0156] Refer to the sensor pixel 121-1 located in the upper left of the figure. An L-shaped second light-shielding section 22 is located to the left and below the sensor pixel 121-1. An L-shaped vertical light-shielding section 21V is located to the above and to the right of the sensor pixel 121-1. In the area corresponding to the center of the 2x2 four pixels, where the vertical light-shielding section 21V and the vertical light-shielding section 22V would intersect if they were extended respectively, the vertical light-shielding section 21V and the vertical light-shielding section 22V are not provided, and a floating diffusion region FD is located in that region (divided region).

[0157] In the diagram, a transfer transistor TRGa1 is located in the upper left of the floating diffusion region FD, and transfer transistors TRXa1 and TRYa1 are located in the upper left of the transfer transistor TRGa1. Below transfer transistors TRXa1 and TRYa1, a charge holding unit MEM is located. Within a single sensor pixel 121, PDa1 is arranged across the entire area of ​​that sensor pixel 121.

[0158] In the upper left corner of the diagram, there is a diffusion region VDD connected to the exhaust transistor OFG and the power supply line VDD.

[0159] The planar layout of each transistor in the sensor pixel 121 is not necessarily limited to that shown in Figure 21. If the arrangement of each transistor within the sensor pixel 121 changes, the placement of the photoelectric conversion unit 40 and the charge holding unit MEM located below it will also change.

[0160] The cross-sectional configuration example of the image sensor 101 in the case of four-pixel sharing shown in Figures 21 and 22 is the same as the cross-sectional configuration example shown in Figure 6, so its explanation is omitted.

[0161] Figure 22 is a cross-sectional view showing the configuration of the horizontal light-shielding portion 21H of the first light-shielding portion 21, and shows the B-B' section in Figure 6. Figure 23 is a cross-sectional view showing the configuration of the horizontal light-shielding portion 22H of the second light-shielding portion 22, and shows the C-C' section in Figure 6.

[0162] As shown in Figure 22, the horizontal light-shielding portion 21H of the first light-shielding portion 21 has a hexagonal shape in plan view. In Figure 22, the horizontal light-shielding portion 21H formed by the T-shaped vertical light-shielding portion 21V shown at the top and the horizontal light-shielding portion 21H formed by the T-shaped vertical light-shielding portion 21V shown at the bottom each have a hexagonal shape.

[0163] As shown in Figure 23, the horizontal light-shielding portion 22H of the second light-shielding portion 22 has a hexagonal shape in plan view. In Figure 23, the horizontal light-shielding portion 22H formed by the T-shaped vertical light-shielding portion 22V shown on the left and the horizontal light-shielding portion 22H formed by the T-shaped vertical light-shielding portion 22V shown on the right are both hexagonal in shape. In other words, the second light-shielding portion 22 has an octagonal horizontal light-shielding portion 22H in plan view.

[0164] Similar to the case of two-pixel sharing explained with reference to Figures 7 and 8, in the case of four-pixel sharing, the horizontal light-shielding portion 21H of the first light-shielding portion 21 and the horizontal light-shielding portion 22H of the second light-shielding portion 22 are arranged so that their respective peripheral edges overlap each other within the sensor pixel 121 in a plan view. In other words, the horizontal light-shielding portion 22H of the second light-shielding portion 22 is arranged to cover the area where the horizontal light-shielding portion 21H of the first light-shielding portion 21 is not located in a plan view. The horizontal light-shielding portion 21H of the first light-shielding portion 21 is arranged to cover the area where the horizontal light-shielding portion 22H of the second light-shielding portion 22 is not located in a plan view. This configuration makes it possible to suppress the incidence of light that was not photoelectrically converted by the photoelectric conversion portion 40 onto the charge-holding portion MEM and the wiring layer 202.

[0165] Such an image sensor 101 is designed to suppress the generation of noise caused by crosstalk, dark current, lattice defects, or PLS.

[0166] Furthermore, by designating the region where the vertical light-shielding portion 21V and the vertical light-shielding portion 22V intersect as a divided region, and designating this region as one where the vertical light-shielding portion 21V and the vertical light-shielding portion 22V are not formed, and by arranging the floating diffusion region FD in this divided region, a configuration can be achieved in which the floating diffusion region FD is shared by four pixels. Therefore, as in the embodiment described above, the effects of sharing the diffusion region can be obtained.

[0167] <Example of configuration when applied to phase-difference pixels> This technology can also be applied to phase-difference detection pixels when performing autofocus (AF) using an image plane phase-difference method. A phase-difference detection pixel has a photoelectric conversion unit 40 divided into two regions, and is configured to detect the focus position by processing the signals from each photoelectric conversion unit 40.

[0168] If the phase detection pixels are configured to share one floating diffusion region FD among four pixels, the circuit configuration shown in Figure 20 can be used. When the circuit configuration shown in Figure 20 is applied to phase difference detection pixels, one phase difference detection pixel is formed from sensor pixels 121-1 and 121-2, and one phase difference detection pixel is formed from sensor pixels 121-3 and 121-4.

[0169] Figure 24 shows the planar configuration of the phase difference detection pixel. In the case of a phase difference detection pixel, as described above, the photoelectric conversion unit 40 contained in one phase difference detection pixel is divided into two regions, and a sensor pixel 121 containing each photoelectric conversion unit 40 is formed. Therefore, the aspect ratio of the vertical and horizontal lengths of one sensor pixel 121 is different from that of the sensor pixel 121 described above. The sensor pixel 121 described above, for example the sensor pixel 121 shown in Figure 21, has an aspect ratio of vertical to horizontal lengths of 1:1. In contrast, the sensor pixel 121 of the phase difference detection pixel has an aspect ratio of vertical to horizontal lengths of 2:1, as shown in Figure 24.

[0170] The example of a planar configuration of phase difference detection pixels shown in Figure 24 can be basically the same as the example of a planar configuration applied to the four-pixel sharing shown in Figure 21, except that the aspect ratio is 2:1.

[0171] When this technology is applied to phase difference detection pixels, as shown in Figure 25, one on-chip lens LNS is mounted on two adjacent photoelectric conversion units 40. In the example shown in Figure 25, one on-chip lens LNS is placed on two laterally adjacent sensor pixels 121-1 and 121-2, and another on-chip lens LNS is placed on two sensor pixels 121-3 and 121-4.

[0172] In the phase-difference detection pixels, the horizontal light-shielding portion 21H and the horizontal light-shielding portion 22H differ from the pixels in the case of four-pixel sharing in that their aspect ratios are 2:1, but other aspects are the same. Figure 26 shows the horizontal light-shielding portion 21H in the phase-difference detection pixel. This horizontal light-shielding portion 21H has the same shape as shown in Figure 22, but differs in that the aspect ratio of its vertical to horizontal lengths is 2:1. Similarly, Figure 27 shows the horizontal light-shielding portion 22H in the phase-difference detection pixel. This horizontal light-shielding portion 22H has the same shape as shown in Figure 23, but the aspect ratio of its vertical to horizontal lengths is 2:1.

[0173] When this technology is applied to a phase difference detection pixel, the same effects as those of the embodiment described above can be obtained.

[0174] <Examples of application to electronic devices> This technology can be applied to all electronic devices that use an image sensor in the image acquisition unit (photoelectric conversion unit), such as imaging devices like digital still cameras and video cameras, portable terminal devices with imaging functions, and photocopiers that use an image sensor in the image reading unit. The image sensor may be formed as a single chip, or it may be in the form of a module with imaging functions in which the imaging unit and the signal processing unit or optical system are packaged together.

[0175] Figure 28 is a block diagram showing an example configuration of an imaging device as an electronic device to which this technology is applied. The imaging device 1000 in Figure 28 includes an optical unit 1001 consisting of a lens group, an image sensor (imaging device) 1002, and a DSP (Digital Signal Processor) circuit 1003 which is a camera signal processing circuit. The imaging device 1000 also includes a frame memory 1004, a display unit 1005, a recording unit 1006, an operation unit 1007, and a power supply unit 1008. The DSP circuit 1003, frame memory 1004, display unit 1005, recording unit 1006, operation unit 1007, and power supply unit 1008 are interconnected via a bus line 1009.

[0176] The optical unit 1001 captures incident light (image light) from the subject and forms an image on the imaging surface of the image sensor 1002. The image sensor 1002 converts the amount of light from the incident light formed on the imaging surface by the optical unit 1001 into an electrical signal on a pixel-by-pixel basis and outputs it as a pixel signal.

[0177] The display unit 1005 is composed of a thin display such as an LCD (Liquid Crystal Display) or an organic EL (Electro Luminescence) display, and displays video or still images captured by the image sensor 1002. The recording unit 1006 records the video or still images captured by the image sensor 1002 onto a recording medium such as a hard disk or semiconductor memory.

[0178] The operation unit 1007 issues operation commands for various functions of the imaging device 1000 under the user's input. The power supply unit 1008 appropriately supplies various power sources to the DSP circuit 1003, frame memory 1004, display unit 1005, recording unit 1006, and operation unit 1007.

[0179] The image sensor 101 described above can be applied to a part of the imaging device shown in Figure 28.

[0180] <Examples of application to endoscopic surgical systems> The technology disclosed herein (this technology) can be applied to various products. For example, the technology disclosed herein may be applied to endoscopic surgical systems.

[0181] Figure 29 is a diagram showing an example of a schematic configuration of an endoscopic surgical system to which the technology described herein (the technology) may be applied.

[0182] Figure 29 illustrates a surgeon (physician) 11131 performing surgery on a patient 11132 on a patient bed 11133 using an endoscopic surgical system 11000. As shown in the figure, the endoscopic surgical system 11000 consists of an endoscope 11100, other surgical instruments 11110 such as a pneumoperitoneum tube 11111 and an energy treatment device 11112, a support arm device 11120 for supporting the endoscope 11100, and a cart 11200 equipped with various devices for endoscopic surgery.

[0183] The endoscope 11100 consists of a barrel 11101, the tip of which is inserted into the body cavity of the patient 11132 for a predetermined length, and a camera head 11102 connected to the base end of the barrel 11101. In the illustrated example, the endoscope 11100 is shown as a so-called rigid endoscope having a rigid barrel 11101, but the endoscope 11100 may also be configured as a so-called flexible endoscope having a flexible barrel.

[0184] An opening into which an objective lens is fitted is provided at the tip of the microscope tube 11101. A light source device 11203 is connected to the endoscope 11100, and the light generated by the light source device 11203 is guided to the tip of the microscope tube by a light guide extending inside the microscope tube 11101, and is irradiated through the objective lens towards the object to be observed inside the body cavity of the patient 11132. The endoscope 11100 may be a straight-viewing endoscope, an oblique-viewing endoscope, or a side-viewing endoscope.

[0185] The camera head 11102 contains an optical system and an image sensor. Reflected light from the object being observed (observation light) is focused onto the image sensor by the optical system. The image sensor converts the observation light into electrical signals, generating an electrical signal corresponding to the observation light, i.e., an image signal corresponding to the observed image. This image signal is transmitted as RAW data to the camera control unit (CCU) 11201.

[0186] The CCU 11201 is composed of a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), and other components, and comprehensively controls the operation of the endoscope 11100 and the display device 11202. Furthermore, the CCU 11201 receives an image signal from the camera head 11102 and performs various image processing operations on that image signal, such as development processing (demosaic processing), to display an image based on that image signal.

[0187] The display device 11202 displays an image based on an image signal that has been processed by the CCU 11201, under control from the CCU 11201.

[0188] The light source device 11203 is composed of a light source such as an LED (light-emitting diode) and supplies illumination light to the endoscope 11100 when photographing the surgical area, etc.

[0189] The input device 11204 is an input interface for the endoscopic surgical system 11000. The user can input various types of information and instructions to the endoscopic surgical system 11000 via the input device 11204. For example, the user can input instructions to change the imaging conditions (type of light, magnification, focal length, etc.) of the endoscope 11100.

[0190] The treatment instrument control device 11205 controls the drive of the energy treatment instrument 11112 for purposes such as tissue cauterization, incision, or blood vessel sealing. The insufflation device 11206 injects gas into the body cavity of the patient 11132 via the insufflation tube 11111 to inflate the body cavity for the purpose of securing a field of view by the endoscope 11100 and securing the operator's workspace. The recorder 11207 is a device capable of recording various information related to the surgery. The printer 11208 is a device capable of printing various information related to the surgery in various formats such as text, images, or graphs.

[0191] The light source device 11203 that supplies illumination light to the endoscope 11100 when photographing the surgical area can be configured as a white light source consisting of, for example, an LED, a laser light source, or a combination thereof. When the white light source is configured as a combination of RGB laser light sources, the output intensity and output timing of each color (each wavelength) can be controlled with high precision, so the white balance of the captured image can be adjusted in the light source device 11203. In this case, it is also possible to capture images corresponding to each of the RGB colors in time-division by irradiating the observation target with laser light from each of the RGB laser light sources in time-division and controlling the drive of the image sensor of the camera head 11102 in synchronization with the irradiation timing. According to this method, a color image can be obtained without providing a color filter on the image sensor.

[0192] Furthermore, the light source device 11203 may be controlled to change the intensity of the light it outputs at predetermined time intervals. By controlling the drive of the image sensor of the camera head 11102 in synchronization with the timing of the change in light intensity, images can be acquired in time-division order, and these images can be combined to generate high dynamic range images without so-called black crushing and white clipping.

[0193] Furthermore, the light source device 11203 may be configured to supply light in a predetermined wavelength band corresponding to special light observation. In special light observation, for example, by utilizing the wavelength dependence of light absorption in body tissue and irradiating with narrow-band light compared to the irradiation light used during normal observation (i.e., white light), so-called narrow-band imaging is performed to image predetermined tissues such as blood vessels on the surface of mucosa with high contrast. Alternatively, in special light observation, fluorescence observation may be performed to obtain an image from fluorescence generated by irradiation with excitation light. In fluorescence observation, excitation light is irradiated onto body tissue and fluorescence from the body tissue is observed (autofluorescence observation), or a reagent such as indocyanine green (ICG) is injected into body tissue and excitation light corresponding to the fluorescence wavelength of the reagent is irradiated onto the body tissue to obtain a fluorescence image. The light source device 11203 may be configured to supply narrow-band light and / or excitation light corresponding to such special light observation.

[0194] Figure 30 is a block diagram showing an example of the functional configuration of the camera head 11102 and CCU 11201 shown in Figure 29.

[0195] The camera head 11102 includes a lens unit 11401, an imaging unit 11402, a drive unit 11403, a communication unit 11404, and a camera head control unit 11405. The CCU 11201 includes a communication unit 11411, an image processing unit 11412, and a control unit 11413. The camera head 11102 and the CCU 11201 are connected to each other via a transmission cable 11400 so that they can communicate with each other.

[0196] The lens unit 11401 is an optical system provided at the connection point with the lens barrel 11101. Observation light taken in from the tip of the lens barrel 11101 is guided to the camera head 11102 and then incident on the lens unit 11401. The lens unit 11401 is composed of a combination of multiple lenses, including a zoom lens and a focus lens.

[0197] The imaging unit 11402 may consist of one image sensor (a so-called single-chip type) or multiple image sensors (a so-called multi-chip type). If the imaging unit 11402 is configured as a multi-chip type, for example, each image sensor may generate image signals corresponding to RGB, and these may be combined to obtain a color image. Alternatively, the imaging unit 11402 may be configured to have a pair of image sensors for acquiring image signals for the right eye and left eye, respectively, corresponding to 3D (dimensional) display. By performing 3D display, the surgeon 11131 can more accurately grasp the depth of the biological tissue in the surgical area. In addition, if the imaging unit 11402 is configured as a multi-chip type, multiple lens units 11401 may be provided corresponding to each image sensor.

[0198] Furthermore, the imaging unit 11402 does not necessarily have to be located on the camera head 11102. For example, the imaging unit 11402 may be located inside the lens barrel 11101, directly behind the objective lens.

[0199] The drive unit 11403 is composed of actuators and, under control from the camera head control unit 11405, moves the zoom lens and focus lens of the lens unit 11401 along the optical axis by a predetermined distance. This allows the magnification and focus of the image captured by the imaging unit 11402 to be adjusted as appropriate.

[0200] The communication unit 11404 is composed of communication devices for sending and receiving various types of information with the CCU 11201. The communication unit 11404 transmits the image signal obtained from the imaging unit 11402 as RAW data to the CCU 11201 via the transmission cable 11400.

[0201] Furthermore, the communication unit 11404 receives a control signal from the CCU 11201 to control the drive of the camera head 11102 and supplies it to the camera head control unit 11405. The control signal includes information about imaging conditions, such as information to specify the frame rate of the captured image, information to specify the exposure value at the time of imaging, and / or information to specify the magnification and focus of the captured image.

[0202] The imaging conditions such as frame rate, exposure value, magnification, and focus may be specified by the user as appropriate, or they may be automatically set by the control unit 11413 of the CCU 11201 based on the acquired image signal. In the latter case, the endoscope 11100 is equipped with so-called AE (Auto Exposure), AF (Auto Focus), and AWB (Auto White Balance) functions.

[0203] The camera head control unit 11405 controls the driving of the camera head 11102 based on the control signal received from the CCU 11201 via the communication unit 11404.

[0204] The communication unit 11411 is comprised of a communication device for sending and receiving various types of information with the camera head 11102. The communication unit 11411 receives image signals transmitted from the camera head 11102 via the transmission cable 11400.

[0205] Furthermore, the communication unit 11411 transmits control signals to the camera head 11102 to control the driving of the camera head 11102. Image signals and control signals can be transmitted by telecommunications, optical communications, etc.

[0206] The image processing unit 11412 performs various image processing operations on the image signal, which is RAW data transmitted from the camera head 11102.

[0207] The control unit 11413 performs various controls related to imaging the surgical area, etc., by the endoscope 11100, and the display of the images obtained from imaging the surgical area, etc. For example, the control unit 11413 generates a control signal to control the driving of the camera head 11102.

[0208] Furthermore, the control unit 11413 displays the captured image showing the surgical area, etc., on the display device 11202 based on the image signal processed by the image processing unit 11412. At this time, the control unit 11413 may recognize various objects in the captured image using various image recognition technologies. For example, the control unit 11413 can recognize surgical instruments such as forceps, specific biological sites, bleeding, mist when using the energy treatment device 11112, etc., by detecting the shape and color of the edges of objects included in the captured image. When the control unit 11413 displays the captured image on the display device 11202, it may use the recognition results to superimpose various surgical support information onto the image of the surgical area. By superimposing the surgical support information and presenting it to the surgeon 11131, the burden on the surgeon 11131 can be reduced, and the surgeon 11131 can proceed with the surgery reliably.

[0209] The transmission cable 11400 connecting the camera head 11102 and the CCU 11201 is an electrical signal cable compatible with electrical signal communication, an optical fiber compatible with optical communication, or a composite cable thereof.

[0210] In the illustrated example, communication was performed via a wired connection using a transmission cable 11400, but communication between the camera head 11102 and the CCU 11201 may be performed wirelessly.

[0211] <Examples of application to mobile devices> The technology disclosed herein (this technology) can be applied to various products. For example, the technology disclosed herein may be implemented as a device mounted on any type of mobile device such as automobiles, electric vehicles, hybrid electric vehicles, motorcycles, bicycles, personal mobility devices, airplanes, drones, ships, and robots.

[0212] Figure 31 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile control system to which the technology described herein may be applied.

[0213] The vehicle control system 12000 comprises a plurality of electronic control units connected via a communication network 12001. In the example shown in Figure 31, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an external information detection unit 12030, an internal information detection unit 12040, and an integrated control unit 12050. The functional configuration of the integrated control unit 12050 is shown in the figure, which includes a microcomputer 12051, an audio / image output unit 12052, and an in-vehicle network interface 12053.

[0214] The drivetrain control unit 12010 controls the operation of devices related to the vehicle's drivetrain according to various programs. For example, the drivetrain control unit 12010 functions as a control device for a drivetrain generating device that generates driving force for the vehicle, such as an internal combustion engine or a drive motor; a drivetrain transmission mechanism that transmits driving force to the wheels; a steering mechanism that adjusts the steering angle of the vehicle; and a braking device that generates braking force for the vehicle.

[0215] The body system control unit 12020 controls the operation of various devices mounted on the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window system, or various lamps such as headlights, reverse lights, brake lights, turn signals, or fog lights. In this case, the body system control unit 12020 may receive radio waves transmitted from a portable device that replaces a key or signals from various switches. The body system control unit 12020 receives these radio waves or signals and controls the vehicle's door lock system, power window system, lamps, etc.

[0216] The external information detection unit 12030 detects information from outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the external information detection unit 12030. The external information detection unit 12030 causes the imaging unit 12031 to capture images of the outside of the vehicle and receives the captured images. Based on the received images, the external information detection unit 12030 may perform object detection processing such as detecting people, cars, obstacles, signs, or characters on the road surface, or distance detection processing.

[0217] The imaging unit 12031 is a light sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 can output the electrical signal as an image or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0218] The in-vehicle information detection unit 12040 detects information inside the vehicle. The in-vehicle information detection unit 12040 is connected to, for example, a driver status detection unit 12041 that detects the driver's state. The driver status detection unit 12041 includes, for example, a camera that captures images of the driver, and the in-vehicle information detection unit 12040 may calculate the driver's level of fatigue or concentration, or determine whether the driver is drowsy, based on the detection information input from the driver status detection unit 12041.

[0219] The microcomputer 12051 can calculate control target values ​​for the drive force generator, steering mechanism, or braking device based on information inside and outside the vehicle acquired by the external information detection unit 12030 or the internal information detection unit 12040, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing ADAS (Advanced Driver Assistance System) functions, including collision avoidance or impact mitigation, following driving based on distance between vehicles, maintaining vehicle speed, vehicle collision warning, or vehicle lane departure warning.

[0220] Furthermore, the microcomputer 12051 can perform cooperative control for purposes such as autonomous driving, where the vehicle drives autonomously without driver intervention, by controlling the drive force generating device, steering mechanism, or braking device, etc., based on information about the vehicle's surroundings acquired by the external information detection unit 12030 or the internal information detection unit 12040.

[0221] Furthermore, the microcomputer 12051 can output control commands to the body system control unit 12020 based on external information acquired by the external information detection unit 12030. For example, the microcomputer 12051 can control the headlights according to the position of a preceding or oncoming vehicle detected by the external information detection unit 12030, and perform coordinated control aimed at reducing glare, such as switching from high beams to low beams.

[0222] The audio-image output unit 12052 transmits at least one of audio and image output signals to an output device capable of visually or audibly notifying information to the vehicle's occupants or to those outside the vehicle. In the example shown in Figure 31, the output devices include an audio speaker 12061, a display unit 12062, and an instrument panel 12063. The display unit 12062 may include, for example, at least one of an onboard display and a head-up display.

[0223] Figure 32 shows an example of the installation position of the imaging unit 12031.

[0224] In Figure 32, the imaging unit 12031 includes imaging units 12101, 12102, 12103, 12104, and 12105.

[0225] The imaging units 12101, 12102, 12103, 12104, and 12105 are installed, for example, on the front nose, side mirrors, rear bumper, back door, and the upper part of the windshield inside the vehicle 12100. The imaging unit 12101 installed on the front nose and the imaging unit 12105 installed on the upper part of the windshield inside the vehicle mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 installed on the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 installed on the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The imaging unit 12105 installed on the upper part of the windshield inside the vehicle is mainly used for detecting preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, or lanes.

[0226] Figure 32 shows an example of the imaging ranges of imaging units 12101 to 12104. Imaging range 12111 indicates the imaging range of imaging unit 12101 located on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of imaging units 12102 and 12103 located on the side mirrors, respectively, and imaging range 12114 indicates the imaging range of imaging unit 12104 located on the rear bumper or back door. For example, by superimposing the image data captured by imaging units 12101 to 12104, an overhead view image of the vehicle 12100 can be obtained.

[0227] At least one of the imaging units 12101 to 12104 may have a function for acquiring distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera consisting of multiple image sensors, or an image sensor having pixels for phase difference detection.

[0228] For example, the microcomputer 12051, based on distance information obtained from the imaging units 12101 to 12104, can determine the distance to each object within the imaging range 12111 to 12114 and the temporal change of this distance (relative speed to the vehicle 12100). In particular, it can extract the closest object on the vehicle 12100's path that is traveling in approximately the same direction as the vehicle 12100 at a predetermined speed (e.g., 0 km / h or more) as the preceding vehicle. Furthermore, the microcomputer 12051 can set a predetermined distance to be maintained before the preceding vehicle and perform automatic braking control (including follow-and-stop control) and automatic acceleration control (including follow-and-start control), etc. In this way, cooperative control aimed at autonomous driving, where the vehicle drives autonomously without driver intervention, can be performed.

[0229] For example, the microcomputer 12051 can use distance information obtained from imaging units 12101 to 12104 to classify and extract three-dimensional object data related to three-dimensional objects, such as motorcycles, passenger cars, large vehicles, pedestrians, utility poles, and other three-dimensional objects, and use this data for automatic obstacle avoidance. For example, the microcomputer 12051 identifies obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. The microcomputer 12051 then determines the collision risk, which indicates the degree of risk of collision with each obstacle. If the collision risk is above a set value and there is a possibility of collision, the microcomputer 12051 can provide driving assistance to avoid collisions by outputting a warning to the driver via the audio speaker 12061 or the display unit 12062, or by performing forced deceleration or evasive steering via the drive system control unit 12010.

[0230] At least one of the imaging units 12101 to 12104 may be an infrared camera that detects infrared light. For example, the microcomputer 12051 can recognize pedestrians by determining whether or not pedestrians are present in the images captured by the imaging units 12101 to 12104. Such pedestrian recognition is performed, for example, by a procedure to extract feature points from the images captured by the imaging units 12101 to 12104 as infrared cameras, and a procedure to perform pattern matching on a series of feature points that indicate the contour of an object to determine whether or not it is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the images captured by the imaging units 12101 to 12104 and recognizes a pedestrian, the audio-image output unit 12052 controls the display unit 12062 to superimpose a rectangular contour line for emphasis on the recognized pedestrian. The audio-image output unit 12052 may also control the display unit 12062 to display an icon indicating a pedestrian at a desired position.

[0231] In this specification, "system" refers to an entire apparatus composed of multiple devices.

[0232] Furthermore, the effects described herein are merely illustrative and not limiting, and other effects may also occur.

[0233] Furthermore, the embodiments of this technology are not limited to those described above, and various modifications are possible without departing from the spirit of this technology.

[0234] Furthermore, this technology can also take the following configuration: (1) A semiconductor substrate having a first surface and a second surface facing the first surface, and a photoelectric conversion unit, a charge holding unit, a first light-shielding unit and a second light-shielding unit disposed within the semiconductor substrate, wherein the first light-shielding unit and the second light-shielding unit each have a vertical light-shielding unit that extends in a wall-like manner in a direction perpendicular to the first surface and a horizontal light-shielding unit that extends in a plate-like manner in a direction parallel to the first surface and has a hexagonal shape when viewed from a direction perpendicular to the first surface, the photoelectric conversion unit is positioned on the second surface side of the first light-shielding unit than the horizontal light-shielding unit, the charge holding unit is positioned on the first surface side of the first light-shielding unit than the horizontal light-shielding unit, and the horizontal light-shielding unit of the second light-shielding unit is positioned on the second surface side of the first light-shielding unit than the horizontal light-shielding unit and is positioned to cover at least a part of the area where the horizontal light-shielding unit of the first light-shielding unit is not located when viewed from a direction perpendicular to the first surface, (1) An image sensor having a divided divided region in at least one of the first light-shielding portion and the second light-shielding portion, a diffusion region in the divided region, and the diffusion region being shared by a plurality of pixels. (2) The image sensor according to (1), wherein the diffusion region is a floating diffusion region. (3) The image sensor according to (1) or (2), wherein the first light-shielding portion or the second light-shielding portion is arranged on both sides of the diffusion region. (4) The image sensor according to any one of (1) to (3), wherein the side on which the diffusion region is provided is designated as the first side, the side intersecting the first side at a right angle is designated as the second side, the length of the first side from the second side to the diffusion region is S, and the length of the second side is L, and the diffusion region is arranged at a position satisfying L / S ≥ 3. (5) The image sensor according to any one of (1) to (4), wherein the line width of the first light-shielding portion or the second light-shielding portion located on one side of the diffusion region is different from the line width of the first light-shielding portion or the second light-shielding portion located on the other side. (6) The image sensor according to any one of (1) to (5), wherein the first light-shielding portion or the second light-shielding portion on which the diffusion region is located is arranged such that there is no region where the light-shielding portions intersect with each other.(7) The first light-shielding portion or the second light-shielding portion, in which the diffusion region is not provided, is integrally formed spanning three or more pixels, according to any one of (1) to (6) above. (8) The diffusion region is shared by four pixels, according to any one of (1) to (7) above. (9) The aspect ratio of the vertical and horizontal lengths of the pixels is 2:1, and one on-chip lens is provided on two of the photoelectric conversion portions, according to any one of (1) to (8) above. (10) The diffusion region is provided at the corner of the pixel, according to any one of (1) to (9) above. (11) The image sensor is provided with two or more of the division regions in one pixel, and each of the division regions has a diffusion region with a different function, according to any one of (1) to (10) above. (12) The diffusion region is provided at the center of the first light-shielding portion or the center of the second light-shielding portion, according to any one of (1) to (11) above. (13) The image sensor according to any one of (1) to (12) above, wherein the horizontal light-shielding portion is also arranged in the divided region. (14) A semiconductor substrate having a first surface and a second surface facing the first surface, and a photoelectric conversion unit, a charge holding unit, a first light-shielding unit and a second light-shielding unit disposed within the semiconductor substrate, wherein the first light-shielding unit and the second light-shielding unit each have a vertical light-shielding unit that extends in a wall-like manner in a direction perpendicular to the first surface and a horizontal light-shielding unit that extends in a plate-like manner in a direction parallel to the first surface and has a hexagonal shape when viewed from a direction perpendicular to the first surface, the photoelectric conversion unit is positioned on the second surface side of the first light-shielding unit than the horizontal light-shielding unit, the charge holding unit is positioned on the first surface side of the first light-shielding unit than the horizontal light-shielding unit, the horizontal light-shielding unit of the second light-shielding unit is positioned on the second surface side of the first light-shielding unit than the horizontal light-shielding unit and is positioned to cover at least a portion of the area where the horizontal light-shielding unit of the first light-shielding unit is not located when viewed from a direction perpendicular to the first surface, An electronic device comprising an image sensor shared by a plurality of pixels and a processing unit for processing signals from the image sensor, wherein at least one of the first light-shielding portion and the second light-shielding portion has a divided divided region, and the divided region has a diffusion region, and the diffusion region has an image sensor shared by a plurality of pixels.

[0235] 11 Semiconductor substrate, 21 First light-shielding section, 22 Second light-shielding section, 31 Wiring layer, 33 Insulating layer, 34 Pinning layer, 40 Photoelectric conversion section, 41 P-type semiconductor region, 42 N-type semiconductor region, 51 Sidewall, 101 Image sensor, 111 Pixel array section, 112 Vertical drive section, 113 Ramp wave module, 114 Column signal processing section, 115 Clock module, 116 Data storage section, 117 Horizontal drive section, 118 System control section, 119 Signal processing section, 121 Sensor pixel, 122 Pixel drive line, 123 Vertical signal line, 201 First substrate, 202 Wiring layer, 203 Second substrate, 211 Fixed charge film

Claims

A semiconductor substrate having a first surface and a second surface facing the first surface, A photoelectric conversion unit, a charge holding unit, a first light-shielding unit, and a second light-shielding unit are arranged within the semiconductor substrate. Equipped with, The first light-shielding portion and the second light-shielding portion each have a vertical light-shielding portion that extends in a wall-like manner in a direction perpendicular to the first surface, and a horizontal light-shielding portion that extends in a plate-like manner in a direction parallel to the first surface and has a hexagonal shape when viewed from a direction perpendicular to the first surface. The photoelectric conversion unit is positioned on the second side of the first light-shielding unit, The charge holding portion is positioned on the first surface side of the horizontal light-shielding portion of the first light-shielding portion, The horizontal light-shielding portion of the second light-shielding portion is positioned on the second surface side of the first light-shielding portion, and is positioned to cover at least a portion of the area where the horizontal light-shielding portion of the first light-shielding portion is not located, when viewed from a direction perpendicular to the first surface. At least one of the first light-shielding portion and the second light-shielding portion has a divided dividing region, A diffusion region is located in the aforementioned divided region. The aforementioned diffusion region is shared by multiple pixels. Image sensor. 　 The aforementioned diffusion region is a suspended diffusion region. The image sensor according to claim 1. 　 The first light-shielding portion or the second light-shielding portion is positioned on both sides of the diffusion region. The image sensor according to claim 1. 　 Let the side on which the diffusion region is provided be the first side, the side intersecting the first side at a right angle be the second side, the length of the first side from the second side to the diffusion region be S, and the length of the second side be L. The diffusion region is positioned such that L / S ≥ 3. The image sensor according to claim 1. 　 The line width of the first or second light-shielding portion located on one side of the diffusion region is different from the line width of the first or second light-shielding portion located on the other side. The image sensor according to claim 1. 　 The first light-shielding portion or the second light-shielding portion, in which the diffusion region is located, is arranged such that there are no areas where the light-shielding portions intersect. The image sensor according to claim 1. 　 The first or second light-shielding portion, in which the diffusion region is not located, is integrally formed spanning three or more pixels. The image sensor according to claim 1. 　 The aforementioned diffusion region is shared by four pixels. The image sensor according to claim 1. 　 The aspect ratio of the vertical and horizontal lengths of the aforementioned pixels is 2:1, and one on-chip lens is arranged on each of the two photoelectric conversion units. The image sensor according to claim 1. 　 The diffusion region is located at the corner of the pixel. The image sensor according to claim 1. 　 Two or more of the aforementioned divided regions are provided in one pixel, and each of the aforementioned divided regions is provided with the aforementioned diffused regions that have different functions. The image sensor according to claim 1. 　 The diffusion region is located in the center of the first light-shielding portion or the center of the second light-shielding portion. The image sensor according to claim 1. 　 The horizontal light-shielding portion is also arranged in the aforementioned divided region. The image sensor according to claim 1. 　 A semiconductor substrate having a first surface and a second surface facing the first surface, A photoelectric conversion unit, a charge holding unit, a first light-shielding unit, and a second light-shielding unit are arranged within the semiconductor substrate. Equipped with, The first light-shielding portion and the second light-shielding portion each have a vertical light-shielding portion that extends in a wall-like manner in a direction perpendicular to the first surface, and a horizontal light-shielding portion that extends in a plate-like manner in a direction parallel to the first surface and has a hexagonal shape when viewed from a direction perpendicular to the first surface. The photoelectric conversion unit is positioned on the second side of the first light-shielding unit, The charge holding portion is positioned on the first surface side of the horizontal light-shielding portion of the first light-shielding portion, The horizontal light-shielding portion of the second light-shielding portion is positioned on the second surface side of the first light-shielding portion, and is positioned to cover at least a portion of the area where the horizontal light-shielding portion of the first light-shielding portion is not located, when viewed from a direction perpendicular to the first surface. At least one of the first light-shielding portion and the second light-shielding portion has a divided dividing region, A diffusion region is located in the aforementioned divided region. The aforementioned diffusion region is shared by multiple pixels. Image sensor and A processing unit that processes signals from the image sensor and Electronic devices equipped with the following features.

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