Substrate processing device, processing device, and substrate processing method

Abstract

Provided are a substrate processing device and the like capable of executing processing based on time-series log data related to the substrate processing device. The substrate processing device according to the present embodiment acquires time-series log data relating to the substrate processing device. The substrate processing device includes an encoder and a decoder, and has a model that outputs estimated data of an operating state of the substrate processing device upon input of time-series log data relating to the substrate processing device. The substrate processing device inputs the acquired log data to the model to output the estimated data of the operating state of the substrate processing device relating to the log data.

Description

Substrate processing apparatus, processing apparatus, and substrate processing method

[0001] The present disclosure relates to a substrate processing apparatus, a processing apparatus, and a substrate processing method.

[0002] In Non-Patent Document 1, a technique that enables high-speed execution of an estimation process of predicted values using a neural network even in an edge computer is disclosed. In Non-Patent Document 2, a technique for constructing a specific RNN (recurrent neural network) based on the technique disclosed in Non-Patent Document 1 is disclosed.

[0003] Ando K., Ueyoshi K., Orimo K., Yonekawa H., Sato S., Nakahara H., Takamaeda-Yamazaki S., Ikebe M., Asai T., Kuroda T., and Motomura M., “BRein memory: a single-chip binary / ternary reconfigurable in-memory deep neural network accelerator achieving 1.4TOPS at 0.6W,” IEEE Journal of Solid-State Circuits, vol. 53, no. 4, pp. 983-994 (2018)Hsiao W.-J., Asai T., Lu D., and Ando K., “A Novel Near-memory computing architecture for recurrent neural networks with SRAM and RRAM,” The 5th International Symposium on Neuromorphic AI Hardware, RIHGA Royal Hotel Kokura, Kitakyushu, Japan (Mar. 1-2, 2024)

[0004] The present disclosure provides a substrate processing apparatus and the like capable of executing processing based on time-series log data related to the substrate processing apparatus.

[0005] A substrate processing apparatus according to one embodiment includes a processing unit that acquires time-series log data relating to a substrate processing apparatus, has an encoder and a decoder, and outputs estimated data of the operating state of the substrate processing apparatus when time-series log data relating to the substrate processing apparatus is input, and outputs estimated data of the operating state of the substrate processing apparatus relating to the log data by inputting the acquired log data.

[0006] According to this disclosure, processing can be performed based on time-series log data relating to a substrate processing device.

[0007] This is an explanatory diagram showing one example configuration of a substrate processing apparatus according to this embodiment. This is a block diagram showing one example configuration of a higher-level control unit and a lower-level control unit. This is a block diagram showing one example of the circuit configuration of a surrogate model. This is a diagram schematically showing an example configuration of an encoder and decoder. This is a flowchart showing one example of a processing procedure performed by a surrogate model. This is a block diagram showing another example of the circuit configuration of a surrogate model. This is a flowchart showing another example of a processing procedure performed by a surrogate model. This is an explanatory diagram showing an example of application of a lower-level control unit. This is an explanatory diagram showing an example of application of a lower-level control unit. This is an explanatory diagram showing an example of application in which a state estimation unit is mounted on the higher-level control unit. This is a block diagram showing another example of the circuit configuration of a surrogate model. This is a block diagram showing another example of the circuit configuration of a surrogate model.

[0008] The substrate processing apparatus, processing apparatus, and substrate processing method of this disclosure will be described in detail with reference to the drawings illustrating embodiments thereof. However, this disclosure is not limited to the following examples, and is intended to include all modifications within the meaning and scope of the claims, as indicated by the claims.

[0009] (Embodiment 1) Figure 1 is an explanatory diagram showing an example configuration of a substrate processing apparatus according to this embodiment. The substrate processing apparatus 1 according to this embodiment is an apparatus that performs various substrate processing on a semiconductor substrate (wafer), such as film deposition by CVD (Chemical Vapor Deposition), etching, cleaning, ashing, coating / developing, or sputtering. The substrate processing performed by the substrate processing apparatus 1 may target semiconductor substrates, as well as other types of substrates such as glass substrates, mask substrates, FPD (Flat Panel Display) substrates, etc. The substrate processing apparatus 1 according to this embodiment is, for example, a semiconductor substrate processing apparatus, and will be described using an etching apparatus that performs etching processing on a semiconductor substrate as an example, but the technology of this disclosure is also applicable to apparatus other than etching apparatuses. The substrate processing apparatus 1 is composed of a combination of multiple units. In this embodiment, a unit is a component, part, or a set of apparatus that realizes hardware resources that perform multiple functions necessary for the substrate processing apparatus 1, such as temperature control function, gas flow rate control function, pressure control function, and power supply control function, by dividing them into a manner that allows for independent replacement or substitution for each function. A unit may also be called by names such as module, component, or assembly.

[0010] The substrate processing apparatus 1 according to this embodiment comprises, for example, one higher-level control unit 2 and a plurality of lower-level control units 3. The higher-level control unit 2 and the plurality of lower-level control units 3 are connected via a bus (communication line) provided in the substrate processing apparatus 1, and can send and receive data from each other. In the example in Figure 1, the higher-level control unit 2 and the plurality of lower-level control units 3 are connected in a bus-type network configuration, but this is not limited to this, and any network configuration may be adopted. For example, the plurality of lower-level control units 3 may be connected in a star-type network configuration with the higher-level control unit 2 at the center. In addition to the configuration included in the substrate processing apparatus 1, the higher-level control unit 2 may be an external device different from the substrate processing apparatus 1, such as a server device.

[0011] The lower-level control unit 3 is equipped with various sensors 4, or the sensors 4 are connected via signal lines, etc. The sensors 4 measure various values ​​such as temperature or pressure related to substrate processing, and the lower-level control unit 3 acquires the values ​​measured by the sensors 4 (hereinafter referred to as sensor data). In addition to temperature and pressure sensors, the sensors 4 may also be various sensors that measure humidity, type and concentration of gas, fluid flow rate, voltage, current, charge, light including spectral data, etc. Furthermore, the sensors 4 may be configured to perform measurements at high speed with short periods (e.g., in units of μsec or nsec) to acquire high-speed time-series sensor data. The lower-level control unit 3 is equipped with various controlled devices 5, or the controlled devices 5 are connected via signal lines, etc. The controlled devices 5 are, for example, devices provided in the substrate processing apparatus 1 such as actuators, valves, and pressure regulating valves. The lower-level control unit 3 is a unit that controls the controlled devices 5 based on the sensor data acquired from the sensors 4. However, the multiple lower-level control units 3 provided by the substrate processing apparatus 1 may include units that acquire sensor data from the sensor 4 but do not control the controlled device 5, or units that do not acquire sensor data from the sensor 4 but control the controlled device 5.

[0012] The lower-level control unit 3 includes, for example, a temperature control unit, a gas flow rate control unit, a pressure control unit, a power supply control unit, etc. The temperature control unit is connected to a temperature control module, which is installed at an appropriate location in the chamber where the substrate is processed, as the controlled device 5, and to a temperature sensor, which is installed at an appropriate location in the chamber, as the sensor 4. The temperature control unit controls the operation of the temperature control module to control the temperature of, for example, an ESC (Electric Static Chuck) or the substrate to be processed. The gas flow rate control unit is connected to a flow controller, which is the controlled device 5, and to a flow sensor, which is the sensor 4. The gas flow rate control unit controls the operation of the flow controller to control the flow rate of gas supplied into the chamber. The gas flow rate control unit may also have a configuration to control the flow rate of gas discharged from the chamber. The pressure control unit is connected to a pressure regulating valve, which is the controlled device 5, and to a pressure sensor, which is installed at an appropriate location in the chamber, as the sensor 4. The pressure control unit controls the operation of the pressure regulating valve to adjust the pressure inside the chamber. The power control unit is connected to a power supply (e.g., an RF power supply) as the controlled device 5, and to an OES (Optical Emission Spectrometer) as the sensor 4, which spectrally analyzes the emission intensity of light such as plasma generated in the chamber. The power control unit controls the operation of the power supply to control the state inside the chamber. The state inside the chamber can be measured, for example, by the plasma density inside the chamber when plasma processing is performed inside the chamber.

[0013] The subordinate control unit 3 described above is just one example and is not limited to it. If various other controlled devices 5 are provided in the substrate processing apparatus 1, then a subordinate control unit for controlling the various controlled devices 5 is included. The substrate processing apparatus 1 has at least one chamber, and for each chamber, the temperature of the ESC or the substrate to be processed, the flow rate of the supplied gas, the pressure and state inside the chamber, etc., are controlled by the subordinate control unit 3 described above.

[0014] The higher-level control unit 2 communicates with multiple lower-level control units 3 and obtains various information from each lower-level control unit 3. Based on the obtained information, the higher-level control unit 2 sends control instructions to each lower-level control unit 3, and the operation of the controlled device 5 is controlled by the multiple lower-level control units 3. The higher-level control unit 2 can perform various board processing on the board by sending control instructions to the lower-level control units 3 according to setting information (recipe data) such as board processing procedures or conditions created in advance by the user. The higher-level control unit 2 may send control instructions to a certain lower-level control unit 3 based on information obtained from that lower-level control unit 3, or it may send control instructions to another lower-level control unit 3 based on information obtained from a certain lower-level control unit 3. Furthermore, the higher-level control unit 2 may send control instructions to multiple lower-level control units 3 based on information obtained from one lower-level control unit 3, or it may send control instructions to one or more lower-level control units 3 based on information obtained from multiple lower-level control units 3. In this embodiment, the substrate processing apparatus 1 has a two-tiered configuration consisting of an upper-level control unit 2 and a lower-level control unit 3. However, it is not limited to this configuration, and may have a three-tiered configuration consisting of an upper-level control unit, an intermediate control unit, and a lower-level control unit, or it may have a four-tiered or higher configuration.

[0015] Figure 2 is a block diagram showing an example configuration of a higher-level control unit 2 and a lower-level control unit 3. The higher-level control unit 2 is composed of a computer having a control unit 21, a storage unit 22, and a communication unit 23. The control unit 21 is composed of an arithmetic processing unit such as a CPU (Central Processing Unit), MPU (Micro-Processing Unit), GPU (Graphics Processing Unit), NPU (Neural network Processing Unit), or quantum processor, and a storage device such as ROM (Read Only Memory) and RAM (Random Access Memory). The storage unit 22 is composed of a storage device such as a hard disk or SSD (Solid State Drive). The storage unit 22 stores various programs (computer programs, program products) and data executed by the control unit 21. The control unit 21 controls the operation of the multiple lower-level control units 3 by reading and executing the programs stored in the storage unit 22. The programs stored in the storage unit 22 are provided in the form of recordings on a recording medium 2a such as a memory card or optical disc, and the substrate processing device 1 or the higher-level control unit 2 may read the programs from the recording medium 2a and store them in the storage unit 22. The program may be pre-written to the storage unit 22 during the installation stage of the board processing device 1 or the higher-level control unit 2, or it may be distributed by a remote server device and acquired by the board processing device 1 via communication. The communication unit 23 transmits and receives data to and from the lower-level control unit 3 via a bus provided on the board processing device 1. For example, the communication unit 23 transmits data related to control instructions generated by the control unit 21 to the lower-level control unit 3, and receives sensor data etc. from the lower-level control unit 3 as a response to the control and provides it to the control unit 21.

[0016] The functions realized by the control unit 21 can be implemented using any circuit or processing circuitry. For example, the circuit or processing circuitry can be implemented using a general-purpose processor, a special-purpose processor, an integrated circuit, an ASIC (Application Specific Integrated Circuit), an FPGA (Field Programmable Gate Array), or a conventional circuit. The functions realized by the control unit 21 can also be programmed using one or more programs stored in one or more memories, or configured in other ways to execute the disclosed functions. The functions of the control unit 21 can be implemented using circuit or processing circuitry including combinations thereof.

[0017] The lower-level control unit 3 is composed of a computer having a control unit 31, a storage unit 32, a communication unit 33, an input unit 34, and an output unit 35. Furthermore, each lower-level control unit 3 has a state estimation unit 6 (processing unit, processing unit) implemented by a dedicated hardware circuit according to the controlled device 5 controlled by each lower-level control unit 3. The state estimation unit 6 is composed of a digital circuit such as an FPGA (Field Programmable Gate Array) or an ASIC (Application Specific Integrated Circuit).

[0018] The control unit 31 is configured using an arithmetic processing unit such as a CPU or MPU, and storage devices such as ROM and RAM. The storage unit 32 is configured using a non-volatile storage device such as flash memory or EEPROM (Electrically Erasable Programmable Read-Only Memory). The storage unit 32 stores various programs (computer programs, program products) and data executed by the control unit 31. The control unit 31 controls the operation of the controlled device 5 according to control instructions from the higher-level control unit 2 by reading and executing the programs stored in the storage unit 32. The programs stored in the storage unit 32 may be provided in the form of recordings on a recording medium such as a memory card or optical disc. The programs may also be written to the storage unit 32, for example, during the installation stage of the board processing device 1 or the lower-level control unit 3, or the board processing device 1 may acquire programs distributed by a remote server device via communication.

[0019] The communication unit 33 transmits and receives data with the higher-level control unit 2 via a bus provided on the substrate processing device 1. For example, the communication unit 33 receives data such as control instructions transmitted from the higher-level control unit 2 and provides the received data to the control unit 31. The communication unit 33 also transmits sensor data and the like provided by the control unit 31 to the higher-level control unit 2. In this embodiment, multiple lower-level control units 3 are connected to the bus provided on the substrate processing device 1, and the communication unit 33 may be configured to transmit and receive data with the communication units 33 of other lower-level control units 3.

[0020] The input unit 34 is connected to the sensor 4 via signal lines or the like. The input unit 34 samples and acquires the signal output by the sensor 4 (measurement result by the sensor 4) at a predetermined sampling period and provides the acquired signal (sensor data) in time series to the control unit 31. Multiple sensors 4 may be connected to the input unit 34, in which case the input unit 34 acquires sensor data from each of the multiple sensors 4 at individual sampling periods and provides it to the control unit 31. The output unit 35 is connected to the controlled device 5 via signal lines or the like. The output unit 35 outputs a control signal to the controlled device 5 based on the control value provided by the control unit 31, and operates the controlled device 5. Multiple controlled devices 5 may be connected to the output unit 35, in which case the output unit 35 outputs individual control signals to the multiple controlled devices 5, and controls the operation of the multiple controlled devices 5 individually.

[0021] The state estimation unit 6 includes a time-series data acquisition unit 61 and a surrogate model 7. The time-series data acquisition unit 61 is connected to an input unit 34 and acquires sensor data (time-series data, time-series log data) input via the input unit 34. The time-series data acquisition unit 61 inputs the acquired sensor data directly to the surrogate model 7 without downsampling. In this embodiment, since the sensor data acquired from the sensor 4 is input to the surrogate model 7 without downsampling, data loss that would occur if downsampling were performed can be avoided.

[0022] Surrogate model 7 is a model having an encoder and a decoder, and is composed of, for example, a Seq2Seq (Sequence to Sequence) model using an RNN (Recurrent Neural Network). However, surrogate model 7 is not limited to the Seq2Seq model and can be composed using various models having an encoder and a decoder, and may be composed of a combination of multiple types of models. Furthermore, surrogate model 7 is not limited to an RNN-based model and may be composed using a Transformer-based model.

[0023] The surrogate model 7 receives sensor data input from the time-series data acquisition unit 61, performs calculations to estimate the operating state of the substrate processing device 1 related to the controlled device 5 controlled by the lower-level control unit 3 based on the input sensor data, and outputs estimated data as a result of the calculation. Specifically, the surrogate model 7 extracts feature data from the input sensor data using an encoder, and generates estimated data using a decoder based on the extracted feature data. The estimated data output from the surrogate model 7 is provided to the control unit 31.

[0024] The surrogate model 7 is trained using training data that associates sensor data from a sensor 4 connected to a lower-level control unit 3 with information related to the operating state of the substrate processing device 1 when the sensor 4 measured the sensor data (estimated correct data). In the training process, when sensor data from the training data is input to the surrogate model 7, it performs calculations based on the input sensor data and obtains estimated data as a result of the calculations. The surrogate model 7 then compares the obtained estimated data with the estimated correct data included in the training data and optimizes parameters such as the weights between nodes (coupling coefficients) so that the obtained estimated data approximates the estimated correct data. The parameter optimization can be performed using methods such as backpropagation or steepest descent. As a result, a surrogate model 7 is obtained that outputs estimated data close to the correct answer when sensor data is input.

[0025] The sensor data used for training and information relating to the operating state of the substrate processing device 1 can be obtained from experimental results using the substrate processing device 1, or from simulation results using a simulator that simulates the operation of the substrate processing device 1. The learning of the surrogate model 7 may be performed in the lower control unit 3 or the substrate processing device 1, or in another learning device. If learning is performed in another learning device, a digital circuit (state estimation unit 6) on which the learned surrogate model 7 is implemented is mounted in the lower control unit 3.

[0026] The surrogate models 7 implemented in the state estimation unit 6 of the lower-level control unit 3 are models corresponding to the controlled devices 5 controlled by each lower-level control unit 3, and are trained using training data corresponding to the controlled devices 5. Therefore, in this embodiment, the substrate processing device 1 has digital circuits (state estimation units 6) on which surrogate models 7 corresponding to each control function realized by each controlled device 5 are implemented, and these circuits are mounted in the corresponding lower-level control units 3.

[0027] Figure 3 is a block diagram showing an example of the circuit configuration of the surrogate model 7, and Figure 4 is a schematic diagram showing an example of the configuration of the encoder 8 and decoder 9. The encoder 8 of the surrogate model 7 has a first memory 81, a second memory 82, a first processing circuit 83, a second processing circuit 84, and a third processing circuit 85. The first memory 81 and the second memory 82 are, for example, SRAM (Static Random Access Memory). The first processing circuit 83, the second processing circuit 84, and the third processing circuit 85 have arithmetic units and registers. The arithmetic units are, for example, composed of multipliers and adders. The first memory 81 is connected to the first processing circuit 83, and the second memory 82 is connected to the second processing circuit 84 and the third processing circuit 85. The first processing circuit 83 is also connected to the second processing circuit 84 and the third processing circuit 85.

[0028] As shown in Figure 4, the encoder 8 has an input layer, an intermediate layer, and an output layer. The input layer receives input data (time-series data), and each input value of the input data is sequentially input serially. In this embodiment, sensor data from sensor 4 is directly input to the encoder 8 of the surrogate model 7 without downsampling. In Figure 4, each input value that is input serially is shown as a node represented by a circle. The first processing circuit 83 corresponds to the intermediate layer (intermediate layer module, first intermediate layer module), and in Figure 4, each register of the first processing circuit 83 is shown as a node represented by a circle. The coupling coefficients between each node of the input layer and each node of the intermediate layer (each register of the first processing circuit 83) are stored in the first memory 81. The coupling coefficients stored in the first memory 81 are the coupling coefficients between nodes that were optimized during the training of the surrogate model 7, and are coefficients for calculating the intermediate layer vector from the input data (time-series data) of the surrogate model 7 in the intermediate layer module (first processing circuit 83). The first processing circuit 83 calculates an intermediate layer vector based on the sequentially input values ​​and the coupling coefficients stored in the first memory 81, and stores it in a register. Specifically, the first processing circuit 83 multiplies each input value by its corresponding coupling coefficient and calculates the sum of the multiplication results (weighted sum by the coupling coefficients). The first processing circuit 83 (intermediate layer) has an activation function set for each node to calculate an output value from the input value of each node, and calculates an output value using the activation function from the calculation result (weighted sum by the coupling coefficients) calculated for each node. The first processing circuit 83 stores each calculated output value as an intermediate layer vector in a register. In the first processing circuit 83, the addition process, which adds the result of multiplying each serially input value by the coupling coefficient to the total value stored in each register, and the process of calculating an output value using the activation function from the addition result can be executed in parallel.

[0029] The second processing circuit 84 corresponds to the output layer, and in Figure 4, each output data of the second processing circuit 84 is shown as a node represented by a circle. The coupling coefficients between each node of the hidden layer (each register of the first processing circuit 83) and each node of the output layer (each output data of the second processing circuit 84) are stored in the second memory 82. The coupling coefficients stored in the second memory 82 are also the coupling coefficients between nodes that were optimized during the training of the surrogate model 7, and are coefficients for calculating output data from the hidden layer vector. The second processing circuit 84 calculates output data using the hidden layer vector calculated by the first processing circuit 83, the coupling coefficients stored in the second memory 82, and the activation function. Here, the second processing circuit 84 multiplies each value of the hidden layer vector by its corresponding coupling coefficient, calculates the sum of the results of each multiplication (weighted sum by the coupling coefficient), calculates output data from the calculation result using the activation function, and sequentially outputs the calculated output data serially. In the second processing circuit 84, after adding up the results of multiplying each value of the hidden layer vector by the coupling coefficient, an activation function is applied to output sequentially. The multiplication process between the hidden layer vector and the coupling coefficient, the addition process of the results, and the calculation of output data using the activation function from the addition results can be executed in parallel. The output data output from the encoder 8 is feature data that shows the features of the input time-series data (e.g., sensor data).

[0030] In Figure 4, each register of the third processing circuit 85 is also shown as a node represented by a circle. The coupling coefficients between each node of the hidden layer (each register of the first processing circuit 83) and each register of the third processing circuit 85 are stored in the second memory 82. These coupling coefficients are also the coupling coefficients between nodes that were optimized during the training of the surrogate model 7, and are the weight coefficients of the recursive path to the hidden layer. That is, in the example of Figure 3, both the coefficients for the second processing circuit 84 to calculate output data from the hidden layer vector and the weight coefficients of the recursive path to the hidden layer are stored in the second memory 82. The third processing circuit 85 calculates the recursive path data based on the hidden layer vector calculated by the first processing circuit 83 and the weight coefficients stored in the second memory 82, and stores it in a register. The third processing circuit 85 multiplies each value of the hidden layer vector by its corresponding weight coefficient, calculates the sum of the results of each multiplication (weighted sum by the weight coefficients), and stores it in a register as recursive path data. In the third processing circuit 85, the multiplication of each value of the intermediate layer vector by the weight coefficient and the summing of the results and storing them in each register can be executed in parallel. The recursive path data stored in the registers of the third processing circuit 85 is provided to the first processing circuit 83 and added to the intermediate layer vector calculated by the first processing circuit 83 in time series. Specifically, the first processing circuit 83 calculates the intermediate layer vector (weighted sum by the coupling coefficient) based on each input value of the input data and the coupling coefficient, and then adds each data of the recursive path data calculated in advance by the third processing circuit 85 to each value of the intermediate layer vector before applying the activation function. The registers of the third processing circuit 85 are, for example, serial input, parallel output shift registers, and the calculation results of the weighted sum can be output in parallel to the first processing circuit 83. Therefore, the process of adding each data of the recursive path data to each value of the intermediate layer vector can be executed in parallel, and each data of the recursive path data can be added to each value of the intermediate layer vector all at once.

[0031] The decoder 9 of the surrogate model 7 has the same configuration as the encoder 8 and performs the same processing, so a detailed explanation is omitted. The input data for the decoder 9 is the output data (feature data) serially output from the second processing circuit 84 of the encoder 8, and can be handled in the same way as the time-series data input to the encoder 8. The output data output from the second processing circuit 94 of the decoder 9 is estimated data of the operating state of the substrate processing device 1 generated from the input feature data.

[0032] In the surrogate model 7 of this embodiment, input data is input to the encoder 8, and recursive path data for each node is calculated by the third processing circuit 85. The calculated recursive path data is then copied to the register of the third processing circuit 95 of the decoder 9. The copying of recursive path data is performed in parallel. As a result, the decoder 9 uses the recursive path data copied from the encoder 8 as the initial value of the recursive path data, and can add the copied recursive path data to the intermediate layer vector calculated by the first processing circuit 93 based on the output data (feature data) first output from the encoder 8 or a specific initial value. By using the recursive path data calculated by the encoder 8 in the decoder 9, the decoder 9 can output highly accurate estimation results even with the first output data. In addition, the output data output from the second processing circuit 94 in the decoder 9 is used not only as output data (estimated data) from the surrogate model 7, but also as input data to the first processing circuit 93. Specifically, after the recursive path data is copied from the encoder 8, the output data output from the second processing circuit 94, which is calculated taking into account the copied recursive path data, is fed back as input data to the first processing circuit 93.

[0033] The following describes the processing performed by the surrogate model 7 with the above configuration. Figure 5 is a flowchart showing an example of the processing procedure performed by the surrogate model 7. In Figure 5, the left side shows the processing performed by the encoder 8, and the right side shows the processing performed by the decoder 9. The lower control unit 3 of the substrate processing apparatus 1 in this embodiment controls the operation of the controlled device 5 according to control instructions from the upper control unit 2, and the state estimation unit 6 (surrogate model 7) estimates the operating state of the substrate processing apparatus 1 from the measurement results of the sensor 4, and executes processing according to the estimation result. The processing according to the estimation result includes the process of determining a control value for the controlled device 5 based on the estimation result, controlling the operation of the controlled device 5 based on the determined control value, and transmitting the estimation result to the upper control unit 2, etc.

[0034] In the state estimation unit 6 of the lower control unit 3, when sensor data from sensor 4 is input to the surrogate model 7 via the time-series data acquisition unit 61, the encoder 8 accepts the sensor data (time-series data) as serial input (S11). The encoder 8 calculates an intermediate layer vector based on the sequentially input input values, the coupling coefficients stored in the first memory 81, the recursive path data stored in the register of the third processing circuit 85, and the activation function using the first processing circuit 83 (S12). The calculated intermediate layer vector is stored in the register of the first processing circuit 83. Next, the encoder 8 calculates output data (feature data) based on the intermediate layer vector stored in the register of the first processing circuit 83, the coupling coefficients stored in the second memory 82, and the activation function using the second processing circuit 84, and sequentially outputs the calculated feature data serially (S13), which is then sequentially input to the decoder 9. That is, the second processing circuit 84 performs the calculation of feature data and the output of the calculated feature data in parallel. The decoder 9 receives the feature data output by the encoder 8 via serial input (S14). Next, the encoder 8 calculates recursive path data based on the intermediate layer vector stored in the register of the first processing circuit 83 and the recursive path weight coefficients stored in the second memory 82 using the third processing circuit 85 (S15). The calculated recursive path data is stored in the register of the third processing circuit 85.

[0035] When the encoder 8 calculates recursive path data for each node when the data length of the input time-series data meets specific conditions, it outputs the recursive path data to the decoder 9 (S16). The decoder 9 stores the recursive path data obtained from the encoder 8 in the register of the third processing circuit 95 (S17). The decoder 9 calculates an intermediate layer vector based on the sequentially input feature quantities by the first processing circuit 93, the coupling coefficients stored in the first memory 91, the recursive path data stored in the register of the third processing circuit 95, and the activation function (S18). As a result, the intermediate layer vector with the recursive path data added is stored in the register of the first processing circuit 93.

[0036] The decoder 9 calculates output data (estimated data) based on the intermediate layer vector stored in the register of the first processing circuit 93, the coupling coefficients stored in the second memory 92, and the activation function using the second processing circuit 94, and outputs the calculated estimated data sequentially in serial mode (S19). The estimated data output from the decoder 9 is provided to, for example, the control unit 31. Next, the decoder 9 calculates recursive path data based on the intermediate layer vector stored in the register of the first processing circuit 93 and the recursive path weight coefficients stored in the second memory 92 using the third processing circuit 95 (S20). The calculated recursive path data is stored in the register of the third processing circuit 95. In subsequent processing steps, in step S18, the decoder 9 calculates the intermediate layer vector based on the previously input estimated data, the coupling coefficients stored in the first memory 91, the recursive path data stored in the register of the third processing circuit 85, and the activation function using the first processing circuit 93 (S18).

[0037] Subsequently, the encoder 8 provides the recursive path data stored in the register of the third processing circuit 85 to the first processing circuit 83, and the first processing circuit 83 repeats the calculation of the intermediate layer vector, the addition of the recursive path data to the intermediate layer vector, the calculation of feature data based on the intermediate layer vector by the second processing circuit 84, the calculation of recursive path data based on the intermediate layer vector by the third processing circuit 85, and the input processing to the first processing circuit 83. The decoder 9 provides the recursive path data calculated in step S20 to the first processing circuit 93, and the first processing circuit 93 repeats the calculation of the intermediate layer vector, the addition of the recursive path data to the intermediate layer vector, the calculation of estimated data based on the intermediate layer vector by the second processing circuit 94, the calculation of recursive path data based on the intermediate layer vector by the third processing circuit 95, and the input processing to the first processing circuit 93.

[0038] As the surrogate model 7 of the state estimation unit 6 performs the above-described processing, the lower control unit 3 can estimate the operating state of the substrate processing device 1 from the sensor data from the sensor 4 and obtain the estimation result. By controlling the operation of the controlled device 5 based on the estimation result, the lower control unit 3 can control the controlled device 5 in accordance with the operating state indicated by the sensor data, thereby enabling the controlled device 5 to operate more appropriately. Therefore, the state estimation unit 6, the lower control unit 3, and the substrate processing device 1 of this embodiment can perform processing based on time-series log data related to the substrate processing device 1.

[0039] Figure 6 is a block diagram showing another example of the circuit configuration of the surrogate model. When the surrogate model 7 is put into practical use, not only the circuit configuration shown in Figure 3 but also the circuit configuration shown in Figure 6 is possible. In the surrogate model 71 shown in Figure 6, the encoder 8a does not have a second processing circuit 84, and the feature data output from the encoder 8a is included in the recursive path data, which is the output of the third processing circuit 85. Therefore, by copying the recursive path data from the third processing circuit 85 of the encoder 8a to the third processing circuit 95 of the decoder 9a, the feature data can be passed from the encoder 8a to the decoder 9a. The processing after the recursive path data is copied as an initial value to the third processing circuit 95 of the decoder 9a is the same as that of the decoder 9 shown in Figure 3, so the explanation is omitted.

[0040] Figure 7 is a flowchart showing another example of the processing procedure performed by the surrogate model, specifically an example of the processing procedure performed by the surrogate model 71 shown in Figure 6. The process shown in Figure 7 is the same as the process shown in Figure 5, but with steps S13 to S14 removed. The same steps as in Figure 5 will not be explained. In step S18, for the first processing, the decoder 9a takes a specific initial value as input, calculates an intermediate layer vector based on this input data and the coupling coefficients stored in the first memory 91, adds the recursive path data copied to the register of the third processing circuit 95 to the calculated intermediate layer vector, and applies an activation function. For the second and subsequent processing, the process is the same as described in Figure 5, so the explanation will be omitted.

[0041] The following describes specific application examples of the lower-level control unit 3 having a state estimation unit 6. Figures 8 and 9 are explanatory diagrams showing application examples of the lower-level control unit 3. For the sake of simplicity, Figures 8 and 9 only show the state estimation unit 6, control unit 31 and communication unit 33, sensor 4, and upper-level control unit 2 of the lower-level control unit 3. The upper part of Figure 8 shows an application example in which the state estimation unit 6a is provided in the power supply control unit 3a, which is the lower-level control unit 3. The power supply control unit 3a is connected to an OES 4a as a sensor 4, and the state estimation unit 6a of the power supply control unit 3a has an OES data acquisition unit 61a as a time-series data acquisition unit 61. Therefore, the surrogate model 7a of the state estimation unit 6a of the power supply control unit 3a receives OES data measured by the OES 4a. The surrogate model 7a accepts the input of OES data, performs calculations to estimate, for example, the plasma density in the chamber based on the input OES data, and outputs estimated data as a result of the calculation. The estimated plasma density data may be, for example, time-series data showing the change in plasma density over time. The power supply control unit 3a is connected to the power supply control unit 3a as the controlled device 5. The control unit 31 of the power supply control unit 3a identifies a control voltage that results in the plasma density according to the control instruction, based on the estimated plasma density data and the control instruction from the higher-level control unit 2, and controls the power supply based on the identified control voltage. This allows for more precise control of the plasma density.

[0042] Furthermore, the surrogate model 7a of the power control unit 3a may be configured to perform calculations based on the input OES data to estimate a control voltage such that the plasma density in the chamber becomes an optimal density (a predetermined value) according to a control instruction from the higher-level control unit 2, and to output estimated control voltage data. The estimated control voltage data may be, for example, time-series data showing the time change of the control voltage. In this case, the control unit 31 of the power control unit 3a can control the plasma density with higher precision by controlling the power supply based on the estimated control voltage data.

[0043] The lower part of Figure 8 shows an example of application when a state estimation unit 6b is provided in the transport control unit 3b, which is a lower-level control unit 3. The transport control unit 3b is a unit that controls the operation of a transport arm that transports a substrate into a chamber, and a torque sensor 4b is connected as a sensor 4 to measure the torque data of the transport arm. The state estimation unit 6b of the transport control unit 3b has a torque data acquisition unit 61b as a time-series data acquisition unit 61. Therefore, the surrogate model 7b of the state estimation unit 6b of the transport control unit 3b receives torque data (time-series data) measured by the torque sensor 4b. The surrogate model 7b accepts the input torque data and, based on the input torque data, performs a calculation to estimate, for example, the state of the transport arm's belt, and outputs estimated data as a result of the calculation. The estimated data here may be, for example, a label (text) indicating whether the transport arm's belt is in a normal state or a faulty state, or it may be an estimated value of the failure time of the transport arm's belt. The control unit 31 of the transport control unit 3b transmits the estimation result of the state estimation unit 6b to the higher-level control unit 2, allowing the higher-level control unit 2 to understand the state of the transport arm's belt. This makes it possible to detect when the transport arm's belt is not in a normal state before it fails, and to predict the timing of the failure, allowing for preventative measures to be taken.

[0044] FIG. 9 shows an application example when a state estimation unit 6c is provided in the temperature control unit 3c which is a lower-level control unit 3. The temperature control unit 3c is connected to a temperature sensor 4c as a sensor 4, and the state estimation unit 6c of the temperature control unit 3c has a temperature data acquisition unit 61c as a time-series data acquisition unit 61. Therefore, temperature data of a predetermined region (temperature measurement target region) of the substrate measured by the temperature sensor 4c, for example, is input to the surrogate model 7c of the state estimation unit 6c of the temperature control unit 3c. The surrogate model 7c is configured to receive the input of the temperature data of the predetermined region of the substrate, perform an operation to estimate, for example, the temperature distribution of the entire substrate based on the input temperature data, and output estimation data of the operation result. The estimation data here may be, for example, image data showing a heat map representing the temperature distribution of the entire substrate surface. A temperature control module is connected to the temperature control unit 3c as a controlled device 5, and the control unit 31 of the temperature control unit 3c controls the temperature control module so as to obtain a temperature distribution according to the control instruction based on the estimation data of the temperature distribution and the control instruction from the upper-level control unit 2. Thereby, the temperature distribution of the entire substrate surface can be estimated from the temperature data of a partial region of the substrate surface, and more accurate temperature control is possible based on the estimation result. Note that the control unit 31 of the temperature control unit 3c may transmit the estimation result of the temperature distribution to the upper-level control unit 2. In this case, the upper-level control unit 2 can grasp the state of the temperature distribution on the substrate.

[0045] The state estimation unit 6 using the surrogate model 7 may be mounted on the upper control unit 2, in addition to being mounted on the lower control unit 3. Figure 10 is an explanatory diagram showing an application example in which the state estimation unit 6 is mounted on the upper control unit 2. For the sake of simplicity, only the state estimation unit 6d, the control unit 21, and the storage unit 22 are shown in Figure 10. In the example in Figure 10, recipe data stored in the storage unit 22 is input to the state estimation unit 6d, and the state estimation unit 6d has a recipe data acquisition unit 61d as a time-series data acquisition unit 61. The recipe data describes control parameters such as the procedure or conditions for substrate processing for each processing step (for each elapsed time from the start of the process), and can be treated as time-series data (time-series log data) showing the time change of control parameters. Therefore, the recipe data read from the storage unit 22 is input to the surrogate model 7d of the state estimation unit 6d in Figure 10. The surrogate model 7d is configured to accept recipe data as input, estimate the plasma density in the chamber based on the input recipe data, perform calculations to estimate a voltage value corresponding to the estimated plasma density, and output estimated voltage value data. The control unit 21 of the higher-level control unit 2 generates control signals for each controlled device 5 based on the voltage value estimated by the state estimation unit 6d from the recipe data, and outputs the generated control signals to each lower-level control unit 3. This makes it possible to control the plasma density in the chamber with high precision based on the estimated voltage value.

[0046] As described above, the lower-level control unit 3 of this embodiment can be individually equipped with a state estimation unit 6 that is equipped with a pre-learned surrogate model 7 corresponding to the controlled device 5. Therefore, the lower-level control unit 3 can control the controlled device 5 with higher precision according to the operating state of the substrate processing apparatus 1 estimated by the state estimation unit 6 based on the measurement results from the sensor 4. Furthermore, the state estimation unit 6 equipped with the surrogate model 7 can also be installed in the higher-level control unit 2, making it possible to estimate the operating state of the substrate processing apparatus 1 based on the data handled by the higher-level control unit 2 (e.g., recipe data). Therefore, by controlling each controlled device 5 with high precision based on the estimation result of the operating state of the substrate processing apparatus 1, it becomes possible to control the substrate processing apparatus 1 to a more optimal state.

[0047] In the examples shown in Figures 8 to 10, time-series log data such as sensor data and recipe data from sensor 4 are used as input data for surrogate model 7, but the configuration is not limited to this. For example, image data captured by a camera provided on the substrate processing device 1 may be used as input data for surrogate model 7. In this case, the image data can be divided into individual pixels or into patch images containing multiple pixels, and the divided pixel data or patch image data can be sequentially used as input data for surrogate model 7, thereby inputting it to surrogate model 7 as time-series data (time-series log data). Therefore, it becomes possible to treat the image data as time-series data, and a state estimation unit 6 mounted on any of the lower-level control units 3 can be configured to estimate the operating state of the substrate processing device 1 based on the image data.

[0048] (Embodiment 2) A modification example of the circuit configurations of the encoder 8 and the decoder 9 of the surrogate model 7 will be described. FIG. 11 is a block diagram showing another example of the circuit configuration of the surrogate model 7. In the example of FIG. 11, third memories 86 and 96 for storing the weight coefficients of the recursive paths to the intermediate layer are provided, and the third processing circuits 85 and 95 calculate recursive path data based on the intermediate layer vectors calculated by the first processing circuits 83 and 93 and the weight coefficients stored in the third memories 86 and 96, and store the data in registers. Therefore, in the encoder 8 and the decoder 9 shown in FIG. 11, the second processing circuits 84 and 94 calculate output data based on the intermediate layer vectors calculated by the first processing circuits 83 and 93, the coupling coefficients stored in the second memories 82 and 92, and the activation function, and the third processing circuits 85 and 95 calculate recursive path data. These two processes can be processed in parallel, and the processing time can be shortened. Other configurations are the same as those shown in FIG. 3.

[0049] Also in the surrogate model 7 shown in FIG. 11, a modification example similar to the configuration shown in FIG. 6 is possible. FIG. 12 is a block diagram showing another example of the circuit configuration of the surrogate model, and shows a modification example of the surrogate model 7 shown in FIG. 11. In the surrogate model 72 shown in FIG. 12, the encoder 8b does not include the second memory 82 and the second processing circuit 84, and the output data from the third processing circuit 85 is input as recursive path data and feature amount data to the third processing circuit 95 of the decoder 9b. Therefore, also in the surrogate model 72 of FIG. 12, by copying the recursive path data from the third processing circuit 85 of the encoder 8b to the third processing circuit 95 of the decoder 9b, the feature amount data can be transferred from the encoder 8b to the decoder 9b. The surrogate model 72 in FIG. 12 is the same as the surrogate model 71 in FIG. 6 except that the weight coefficients of the recursive paths to the intermediate layer are stored in the third memories 86 and 96, and the same processing as the processing shown in FIG. 7 can be executed.

[0050] In each of the embodiments described above, by implementing the surrogate model 7 as a Seq2Seq model, the surrogate model 7 can be operated even on an edge computer with limited computing resources, such as the lower-level control unit 3. Therefore, the edge computer can collect sensor data and estimate the operating state of the substrate processing device 1 based on the collected sensor data. Furthermore, since the collected sensor data is input directly (as is) to the surrogate model 7 without downsampling, data loss used to estimate the operating state of the substrate processing device 1 is avoided, enabling highly accurate estimation. In addition, even an edge computer like the lower-level control unit 3 can perform the learning process of the surrogate model 7 and optimize the parameters (coupling coefficients) in the surrogate model 7. Note that the surrogate model 7 is not limited to a Seq2Seq model, as long as it is an edge-oriented model that can be operated on an edge computer. Furthermore, by implementing the surrogate model 7 on a digital circuit such as an FPGA, the estimation process of the operating state of the substrate processing device 1 by the surrogate model 7 can be executed at high speed. Furthermore, since the digital circuit on which the surrogate model 7 is implemented can be directly attached to the modules that realize each control function of the board processing device 1 (specifically, each lower control unit 3 and upper control unit 2), it is easy to expand the functionality using the surrogate model 7 (state estimation unit 6).

[0051] The embodiments disclosed herein should be considered in all respects to be illustrative and not restrictive. The scope of this disclosure is indicated by the claims, not in the sense described above, and all modifications within the sense and scope equivalent to the claims are intended.

[0052] The matters described in each embodiment can be combined with each other. Furthermore, the independent and dependent claims described in the claims can be combined with each other in any combination, regardless of the form of reference. In addition, the claims use a form in which claims referencing two or more other claims (multi-claim form), but are not limited to this. A form in which multi-claims referencing at least one multi-claim (multi-multi-claim) may also be used.

[0053] 1. Substrate processing unit 2. Higher-level control unit 3. Lower-level control unit 4. Sensor 5. Controlled device 6. State estimation unit 7. Surrogate model 8. Encoder 9. Decoder 31. Control unit 32. Memory unit 33. Communication unit 81, 91. First memory 82, 92. Second memory 83, 93. First processing circuit 84, 94. Second processing circuit 85, 95. Third processing circuit

Claims

1. A substrate processing device that acquires time-series log data relating to a substrate processing device, and includes an encoder and a decoder, and a processing unit that outputs estimated data of the operating state of the substrate processing device when time-series log data relating to the substrate processing device is input, and inputs the acquired log data to the model, which outputs estimated data of the operating state of the substrate processing device relating to the log data.

2. The substrate processing apparatus according to claim 1, wherein the time-series log data includes high-speed time-series sensor data obtained from a sensor provided in the substrate processing apparatus, and the processing unit directly inputs the high-speed time-series sensor data to the encoder in the model.

3. The substrate processing apparatus according to claim 1 or 2, wherein each of the encoder and decoder stores the weight coefficients of the recursive path in memory, calculates recursive path data based on the intermediate layer vector calculated by the intermediate layer module and the weight coefficients stored in memory, and adds the calculated recursive path data to the intermediate layer vector calculated later in the time series.

4. The substrate processing apparatus according to claim 3, wherein each of the encoder and decoder stores in the memory a coefficient for calculating output data from the intermediate layer vector calculated by the intermediate layer module, and after calculating output data based on the intermediate layer vector and the coefficient stored in the memory, calculates the recursive path data based on the intermediate layer vector and the weight coefficient stored in the memory.

5. The substrate processing apparatus according to claim 3, wherein each of the encoder and decoder stores coefficients for calculating output data from the intermediate layer vector calculated by the intermediate layer module in a second memory, and performs in parallel processing the following: the process of calculating output data based on the intermediate layer vector and the coefficients stored in the second memory, and the process of calculating the recursive path data based on the intermediate layer vector and the weight coefficients stored in the memory.

6. The substrate processing apparatus according to claim 3, wherein the recursive path data calculated by the encoder is copied to the initial value of the recursive path data in the decoder.

7. The substrate processing apparatus according to claim 1 or 2, comprising a plurality of digital circuits on which the models corresponding to each control function of the substrate processing apparatus are implemented.

8. The substrate processing apparatus according to claim 1 or 2, wherein the time-series log data includes time-series data of luminescence intensity measured by an OES (Optical Emission Spectrometer), and the model outputs estimated data of the plasma density in the substrate processing apparatus, or estimated data of a control voltage for controlling the plasma density to a predetermined value, when the time-series data of the luminescence intensity is input.

9. A processing device comprising: an intermediate layer module that performs calculations on input data based on time-series log data relating to a substrate processing device; a first memory that stores weight coefficients of recursive paths to the intermediate layer module; and a first processing circuit that calculates recursive path data based on the intermediate layer vector calculated by the intermediate layer module and the weight coefficients stored in the first memory, and adds the calculated recursive path data to an intermediate layer vector calculated later in the time series.

10. The apparatus according to claim 9, comprising: a second memory for storing coefficients for calculating the intermediate layer vector from the log data; a second processing circuit for calculating the intermediate layer vector based on the log data and the coefficients stored in the second memory; a third memory for storing coefficients for calculating output data from the intermediate layer vector; and a third processing circuit for calculating output data based on the intermediate layer vector and the coefficients stored in the third memory.

11. A processing device comprising: a first intermediate layer module that performs calculations on input data based on time-series log data relating to a substrate processing device; a first memory that stores weight coefficients for recursive paths to the first intermediate layer module; and a first processing circuit that calculates recursive path data based on the intermediate layer vector calculated by the first intermediate layer module and the weight coefficients stored in the first memory, and an encoder that adds the calculated recursive path data to an intermediate layer vector calculated later in the time series; and a second intermediate layer module that performs calculations on input data based on the output data of the encoder; a second memory that stores weight coefficients for recursive paths to the second intermediate layer module; and a second processing circuit that calculates recursive path data based on the intermediate layer vector calculated by the second intermediate layer module and the weight coefficients stored in the second memory, wherein the second processing circuit stores the recursive path data calculated by the encoder as an initial value for the recursive path data, and a decoder that adds the stored recursive path data to an intermediate layer vector calculated by the second intermediate layer module based on input data based on the output data of the encoder.

12. A substrate processing method in which a processing device acquires time-series log data relating to a substrate processing device, and a model having an encoder and a decoder that outputs estimated data of the operating state of the substrate processing device when time-series log data relating to the substrate processing device is input, and the processing device then outputs estimated data of the operating state of the substrate processing device relating to the log data.

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