Simulator tuning data derivation method and simulator tuning data derivation apparatus

Abstract

Provided are a method and apparatus for deriving simulator tuning data, which is for using a battery simulator for a first type of reference cell for a second type of target cell. The method comprises the steps of: determining a plurality of overpotential values by analyzing a plurality of voltage response curves that are associated with a plurality of pulse tests performed on the target cell by using a plurality of test conditions in which a plurality of SOC conditions are combined with a plurality of current conditions; determining a plurality of target positive electrode overpotential values from the plurality of overpotential values; determining a plurality of positive electrode reaction rate adjustment ratios corresponding to the plurality of target positive electrode overpotential values; and deriving first tuning data on the basis of the plurality of positive electrode reaction rate adjustment ratios.

Description

Method for deriving simulator tuning data and device for deriving simulator tuning data

[0001] The present invention relates to a technology for deriving tuning data necessary for using a battery simulator that simulates the charge-discharge response characteristics of a specific type of battery cell for simulating the charge-discharge response characteristics of another type of battery cell.

[0002] This application is a priority application for Korean Patent Application No. 10-2025-0006628 filed on January 16, 2025, and all contents disclosed in the specification and drawings of said application are incorporated into this application by reference.

[0003] Recently, as the demand for portable electronic products such as laptops, video cameras, and mobile phones has increased rapidly, and the development of electric vehicles, energy storage batteries, robots, and satellites has accelerated, research on high-performance batteries capable of repeated charging and discharging is actively underway.

[0004] Currently, various types of batteries are commercialized, and a representative example is the lithium-ion battery (also referred to as 'LIB (Lithium Ion Battery)'). In addition, sodium-ion batteries (also referred to as 'SIB (Sodium Ion Battery)' have lower energy density than LIBs but have the advantages of excellent electrochemical stability and high price competitiveness.

[0005] As such, for various types of battery cells each possessing unique characteristics, modeling of chemical composition and other factors is necessary to meet customer requirements or improve performance, and prior to actual mass production, it is necessary to verify in advance whether they possess target charge-discharge performance.

[0006] Battery simulators are widely used for predicting the performance of battery cells. A battery simulator is a set of equations, algorithms, and / or data that are organically combined to define the two-dimensional or three-dimensional structure of a specific type of battery cell provided as a subject of verification, as well as particle concentration, current flow, and various electrochemical reactions within it, and can be considered a type of mathematical battery model.

[0007] Battery simulators are generally provided separately for each battery type, making it difficult to mix two or more types of battery cells. For example, since a battery simulator for LIBs outputs charge-discharge behavior information based on input data that reflects the electrical or physical characteristics of the LIB, if input data regarding SIBs is provided to a LIB battery simulator, it will inevitably output charge-discharge behavior information that differs significantly from the actual charge-discharge behavior of the SIB.

[0008] The present invention aims to provide a method and apparatus for deriving tuning data required to tune a battery simulator, configured to simulate the charge-discharge response characteristics of a specific type of battery cell, to simulate the charge-discharge response characteristics of a different type of battery cell.

[0009] Other objects and advantages of the present invention may be understood from the following description and will become more clearly apparent from the embodiments of the present invention. Furthermore, it will be readily apparent that the objects and advantages of the present invention can be realized by the means and combinations thereof set forth in the claims.

[0010] A method for deriving simulator tuning data according to one aspect of the present invention is intended to utilize a battery simulator for a first type of reference cell for a second type of target cell. The method for deriving simulator tuning data comprises: a step of determining a plurality of overpotential values ​​attributable to the charge transfer resistance of the target cell by analyzing a plurality of voltage response curves associated with a plurality of pulse tests performed on the target cell using a plurality of test conditions combining a plurality of SOC conditions and a plurality of current conditions; a step of determining a plurality of target anode overpotential values ​​from the plurality of overpotential values; a step of determining a plurality of anode reaction rate adjustment ratios corresponding to the plurality of target anode overpotential values; and a step of deriving first tuning data representing the relationship between the SOC condition, the current condition, and the anode reaction rate adjustment ratio based on the plurality of anode reaction rate adjustment ratios.

[0011] The step of determining the plurality of overpotential values ​​may include: determining a plurality of resistance values ​​of interest from the plurality of voltage response curves; determining a plurality of charge transfer resistance values ​​by subtracting the ohmic resistance value of the target cell from the plurality of resistance values ​​of interest; and determining the plurality of overpotential values ​​based on the plurality of current conditions and the plurality of charge transfer resistance values.

[0012] The step of determining the plurality of resistance values ​​of interest may include: determining a plurality of voltage change values ​​at the beginning of the plurality of pulse tests from the plurality of voltage response curves; and dividing the plurality of voltage change values ​​by the plurality of current conditions to determine the plurality of resistance values ​​of interest.

[0013] The k-th anode reaction rate adjustment ratio among the above plurality of anode reaction rate adjustment ratios can be determined using the following formula.

[0014]

[0015] f pos [k]: k-th anode reaction rate adjustment ratio

[0016] α a : Charge transfer coefficient of the negative electrode

[0017] α c : Positive charge transfer coefficient

[0018] F: Faraday constant

[0019] R: Gas constant

[0020] T: Absolute temperature

[0021] η r_pos [k] k-th standard anode overpotential value

[0022] η t_pos [k]: k-th target anode overpotential value

[0023] The step of deriving the first tuning data may include: grouping the plurality of anode reaction rate adjustment ratios into a plurality of anode subsets according to the plurality of current conditions; deriving a plurality of anode main curves having a predetermined function form from the plurality of anode subsets; deriving a plurality of anode subcurves for a plurality of curve parameters of the plurality of anode main curves; and deriving a first integrated curve representing the relationship between the SOC condition, the current condition, and the anode reaction rate adjustment ratio based on the plurality of anode subcurves. The first tuning data may include the first integrated curve.

[0024] The plurality of anode main curves may be a plurality of exponential curve functions derived by applying curve fitting to the plurality of anode subsets. The plurality of curve parameters may include intercepts, scales, and growth rates.

[0025] The step of deriving the plurality of anode sub-curves may include: a step of deriving a first anode sub-curve representing the relationship between current conditions and intercepts based on a plurality of intercept values ​​of the plurality of anode main curves; a step of deriving a second anode sub-curve representing the relationship between current conditions and multipliers based on a plurality of multiplier values ​​of the plurality of anode main curves; and a step of deriving a third anode sub-curve representing the relationship between current conditions and growth rates based on a plurality of growth rate values ​​of the plurality of anode main curves.

[0026] The above method for deriving simulator tuning data comprises: a step of determining a plurality of target cathode overpotential values ​​from the plurality of overpotential values; a step of determining a plurality of cathode reaction rate adjustment ratios corresponding to the plurality of target cathode overpotential values; and

[0027] Based on the above plurality of cathode reaction rate adjustment ratios, the method may further include a step of deriving second tuning data representing the relationship between SOC conditions, current conditions, and cathode reaction rate adjustment ratios.

[0028] A simulator tuning data derivation device according to another aspect of the present invention is intended to utilize a battery simulator for a first type of reference cell for a second type of target cell. The simulator tuning data derivation device comprises: a battery tester that performs a plurality of pulse tests on the target cell using a plurality of test conditions combined with a plurality of SOC conditions and a plurality of current conditions; and a processor that obtains a plurality of voltage response curves associated with the plurality of pulse tests. The processor is configured to analyze the plurality of voltage response curves to determine a plurality of overpotential values ​​attributable to the charge transfer resistance of the target cell. The processor is configured to determine a plurality of target anode overpotential values ​​from the plurality of overpotential values. The processor is configured to determine a plurality of anode reaction rate adjustment ratios corresponding to the plurality of target anode overpotential values. The processor is configured to derive first tuning data representing the relationship between the SOC condition, the current condition, and the anode reaction rate adjustment ratio based on the plurality of anode reaction rate adjustment ratios.

[0029] The processor may be configured to determine a plurality of resistance values ​​of interest from the plurality of voltage response curves, and to determine a plurality of charge transfer resistance values ​​by subtracting the ohmic resistance value of the target cell from the plurality of resistance values ​​of interest. The processor may be configured to determine a plurality of overpotential values ​​based on the plurality of current conditions and the plurality of charge transfer resistance values.

[0030] The above processor may be configured to determine the k-th anode reaction rate adjustment ratio among the plurality of anode reaction rate adjustment ratios using the following formula.

[0031]

[0032] f pos [k]: k-th anode reaction rate adjustment ratio

[0033] α a : Charge transfer coefficient of the negative electrode

[0034] α c : Positive charge transfer coefficient

[0035] F: Faraday constant

[0036] R: Gas constant

[0037] T: Absolute temperature

[0038] η r_pos [k] k-th standard anode overpotential value

[0039] η t_pos [k]: k-th target anode overpotential value

[0040] The processor may be configured to group the plurality of anode reaction rate adjustment ratios into a plurality of anode subsets according to the plurality of current conditions. The processor may be configured to derive a plurality of anode main curves having a predetermined function form from the plurality of anode subsets. The processor may be configured to derive a plurality of anode subcurves for a plurality of curve parameters of the plurality of anode main curves. The processor may be configured to derive a first integrated curve representing the relationship between the SOC condition, the current condition, and the anode reaction rate adjustment ratio based on the plurality of anode subcurves. The first tuning data may include the first integrated curve.

[0041] The processor may be configured to determine a plurality of target cathode overpotential values ​​from the plurality of overpotential values. The processor may be configured to determine a plurality of cathode reaction rate adjustment ratios corresponding to the plurality of target cathode overpotential values. The processor may be configured to derive second tuning data representing the relationship between SOC conditions, current conditions, and cathode reaction rate adjustment ratios based on the plurality of cathode reaction rate adjustment ratios.

[0042] A battery simulation system according to another aspect of the present invention includes the simulator tuning data derivation device.

[0043] According to at least one of the embodiments of the present invention, simulator tuning data required to tune a battery simulator configured to simulate the charge-discharge response characteristics of a specific type of battery cell to simulate the charge-discharge response characteristics of another type of battery cell can be derived.

[0044] The effects of the present invention are not limited to those mentioned above, and other unmentioned effects will be clearly understood by those skilled in the art from the description in the claims.

[0045] The following drawings attached to this specification illustrate preferred embodiments of the present invention and serve to further enhance understanding of the technical concept of the present invention together with the detailed description of the invention provided below; therefore, the present invention should not be interpreted as being limited only to the matters described in such drawings.

[0046] FIG. 1 is a diagram illustrating an exemplary battery simulation system according to the present invention.

[0047] FIG. 2 is a graph referenced to schematically explain a plurality of voltage response curves corresponding individually to a plurality of pulse tests.

[0048] Figures 3a and 3b are reference drawings used to exemplarily explain the difference in voltage response characteristics between a reference cell and a target cell.

[0049] FIGS. 4 and FIGS. 5a to 5c are drawings referenced to explain the process of deriving the first tuning data.

[0050] FIGS. 6 and FIGS. 7a to 7c are drawings referenced to explain the process of deriving second tuning data.

[0051] FIG. 8 is a flowchart schematically illustrating a method for deriving simulator tuning data according to another embodiment of the present invention.

[0052] FIG. 9 is a flowchart schematically illustrating an example of subroutines that may be included in step S810 of the method according to FIG. 8.

[0053] FIG. 10 is a flowchart schematically illustrating an example of subroutines that may be included in step S828 of the method according to FIG. 8.

[0054] FIG. 11 is a flowchart schematically illustrating an example of subroutines that may be included in step S838 of the method according to FIG. 8.

[0055] Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the attached drawings. Prior to this, terms and words used in this specification and claims should not be interpreted as being limited to their ordinary or dictionary meanings, and should be interpreted in a meaning and concept consistent with the technical spirit of the present invention, based on the principle that the inventor can appropriately define the concept of the terms to best describe his invention.

[0056] Therefore, the embodiments described in this specification and the configurations illustrated in the drawings are merely the most preferred embodiments of the present invention and do not represent all of the technical ideas of the present invention; thus, it should be understood that various equivalents and modifications that can replace them may exist at the time of filing this application.

[0057] Terms including ordinal numbers, such as first, second, etc., are used for the purpose of distinguishing one of the various components from the rest, and are not used to limit the components by such terms.

[0058] Throughout the specification, when a part is described as "comprising" a certain component, this means that, unless specifically stated otherwise, it does not exclude other components but may include additional components. Furthermore, terms such as "<unit>" as used in the specification refer to a unit that performs at least one function or operation and may be implemented in hardware, software, or a combination of hardware and software.

[0059] Additionally, throughout the specification, when it is said that a part is "connected" to another part, this includes not only cases where they are "directly connected," but also cases where they are "indirectly connected" with other components in between.

[0060] FIG. 1 is a diagram illustrating an exemplary battery simulation system according to the present invention.

[0061] Referring to FIG. 1, the battery simulation system (1) includes a battery tester (10) and a simulator tuning data derivation device (100).

[0062] The battery tester (10) is configured to selectively execute one of a charging function, a resting function, and a discharging function according to a test schedule.

[0063] A battery tester (10) is provided to repeatedly perform pulse tests on a battery cell (BC) of a specific type (e.g., SIB). Each time a pulse test is performed, voltage response data reflecting the charge / discharge response characteristics of the battery cell (BC) can be obtained as a result of the pulse test.

[0064] The battery tester (10) may include a battery monitoring unit (BM), a power circuit (11), a charge / discharge circuit (12), and a test controller (13).

[0065] The power circuit (11) is configured to convert power supplied from an AC power source and / or a DC power source into DC having a predetermined voltage level that matches the input specifications of the charge / discharge circuit (12) according to the command of the test controller (13). One or a combination of known AC-DC converters and DC-DC converters may be used as the power circuit (11).

[0066] A charging / discharging circuit (12) has a pair of power terminals (+, -) provided therein connected to the positive and negative terminals of a battery cell (BC), respectively, and can apply a charging pulse or a discharging pulse to the battery cell (BC) according to a command from a test controller (13). One or a combination of both of known constant current circuits and constant voltage circuits may be used as the charging / discharging circuit (12).

[0067] The test controller (13) stores a test schedule in advance in a memory (121) mounted therein. In the memory (121), a battery simulator (BSM) may be pre-installed for simulating the charge / discharge response characteristics of a battery cell (e.g., LIB) of a different type from the battery cell (BC).

[0068] The test controller (13) controls the charge / discharge circuit (12) to sequentially perform pulse tests under various test conditions (test conditions) according to the test schedule.

[0069] The pulse test may be an electrical stimulation application procedure that continuously applies a charging current pulse or a discharging current pulse of a predetermined current rate (unit is 'C') for a certain period of time.

[0070] The charging / discharging circuit (12) can perform both the charging pulse application function and the discharging pulse application function, and can perform a rest period or SOC adjustment procedure for the next pulse test whenever a specific pulse test is completed.

[0071] The battery monitoring unit (BM) includes a voltage sensor (21) and a current sensor (22).

[0072] A voltage sensor (21) is connected between the positive terminal and the negative terminal of a battery cell (BC) to detect the voltage response of the battery cell (BC) to a pulse test and to generate (output) a signal indicating the detected voltage response.

[0073] A current sensor (22) is installed in a power path connecting a battery cell (BC) and a charge / discharge circuit (12) to detect the current response of the battery cell (BC) to a pulse test and to generate (output) a signal indicating the detected current response. For example, the current sensor (22) may include a known current detection element such as a shunt resistor and / or a Hall sensor. The voltage sensor (21) and the current sensor (22) may be integrated into a single chip.

[0074] The battery monitoring unit (BM) may be included as a sub-component of the simulator tuning data derivation device (100) rather than as a sub-component of the battery tester (10).

[0075] The test controller (13) and / or the data acquisition unit (110) can generate a battery response data set including voltage response data and / or current response data for each pulse test by repeating the process of recording voltage response and / or current response received from the battery monitoring unit (BM) in chronological order. For example, a Hybrid Pulse Power Characterization (HPPC) may be used as the pulse test.

[0076] The simulator tuning data derivation device (100) includes a data collection unit (110) and a processor (120). The simulator tuning data derivation device (100) may further include an information interface unit (130).

[0077] A simulator tuning data derivation device (100) is provided to generate tuning data that reflects the charge / discharge response characteristics of a battery cell (BC) based on a plurality of battery response data sets that correspond one-to-one to a plurality of pulse tests completed by a battery tester (10).

[0078] The data collection unit (110) may include at least one communication circuit that supports wired communication and / or wireless communication with the battery tester (10). Wired communication may be, for example, CAN (controller area network) communication, and wireless communication may be, for example, Zeegbee or Bluetooth communication. Of course, as long as wired and wireless communication is supported, the type of communication protocol is not specifically limited to the examples listed above.

[0079] The data collection unit (110) can collect time-series data of the voltage response and / or current response for each pulse test from the battery tester (10) whenever each pulse test for the battery cell (BC) is completed. Alternatively, the data collection unit (110) can collect time-series data of the voltage response and / or current response per pulse test through communication with the battery monitoring unit (BM).

[0080] The processor (120) is operably coupled to the battery tester (10), the data collection unit (110), and / or the information interface unit (130). Being operably coupled to the two components means that the two components are directly or indirectly connected so that signals can be transmitted and received in one direction or both directions.

[0081] The processor (120) can be implemented in hardware using at least one of ASICs (application specific integrated circuits), DSPs (digital signal processors), DSPDs (digital signal processing devices), PLDs (programmable logic devices), FPGAs (field programmable gate arrays), microprocessors, and other electrical components for performing functions.

[0082] A memory (121) may be embedded in the processor (120). The memory (121) may include at least one type of storage medium among, for example, a flash memory type, a hard disk type, an SSD type (Solid State Disk type), an SSD type (Silicon Disk Drive type), a multimedia card micro type, a random access memory (RAM), a static random access memory (SRAM), a read-only memory (ROM), an EEPROM (electrically erasable programmable read-only memory), and a PROM (programmable read-only memory). The memory (121) may store data and programs required for operations described below that are executable by the processor (120). The memory may store data representing the results of operations performed by the processor (120).

[0083] The information interface unit (130) is provided to output various information related to the pulse test in a form recognizable by the user. For example, the information interface unit (130) may include a monitor, a touchscreen, a speaker, and / or a vibrator.

[0084] For the battery cell (BC), the first to pth pulse tests may be performed.

[0085] Specifically, each of the first to p test conditions may be a combination of one of the first to m current conditions and one of the first to n SOC conditions. m and n are two or more natural numbers that are the same or different from each other, and p may be equal to the product of m and n.

[0086] Each of the first to m current conditions represents the magnitude and direction of the current pulse applied to the battery cell (BC) in the pulse test. For example, when m = 4, the first current condition may be a discharge current of 1 C, the second current condition may be a discharge current of 1.2 C, the third current condition may be a discharge current of 5 C, and the fourth current condition may be a discharge current of 10 C.

[0087] Each of the first to nth SOC conditions represents the SOC of the battery cell (BC) at the start of the pulse test. For example, when n = 8, the first to eighth SOC conditions may be 90%, 80%, 70%, 60%, 50%, 40%, 30%, and 20% in order.

[0088] Let i be a natural number less than or equal to m, and j be a natural number less than or equal to n. Then, among the first to p-th test conditions, the {(i-1)n + j}-th test condition may be a combination of the i-th current condition and the j-th SOC condition. For example, the combination of the first current condition and the first SOC condition is the first test condition. For another example, the combination of the m-th current condition and the n-th SOC condition is the p-th test condition. As yet another example, if m = 4 and n = 8, the combination of the second current condition and the third SOC condition is the eleventh test condition.

[0089] The first to pth pulse tests can individually correspond to the first to pth test conditions. When k = (i-1)n + j, the kth pulse test may be a current pulse of the ith current condition applied to the battery cell (BC) for a certain period of time while the SOC of the battery cell (BC) is matched to the jth SOC condition.

[0090] After the k-th pulse test according to the k-th test condition is completed, the k+1-th pulse test according to the k+1-th test condition can be executed.

[0091] Figure 2 is a graph referenced to schematically explain multiple voltage response curves corresponding individually to multiple pulse tests. For better understanding, Figure 2 shows eight voltage response curves according to eight different SOC conditions (90%, 80%, 70%, 60%, 50%, 40%, 30%, 20%) with the current condition fixed at 1 C discharge current.

[0092] In the graphs of Figure 2, the X-axis (horizontal axis) represents the duration of the pulse test, and the Y-axis (vertical axis) represents the voltage of the battery cell (BC).

[0093] In each graph, the solid line represents the actual voltage response curve of the battery cell (BC) (result of the pulse test), and the dotted line represents the voltage response curve output from the battery simulator (BSM) for specific test conditions (result of the simulation). For each graph, there is a slight discrepancy between the two voltage response curves, which is because the battery simulator (BSM) is programmed to match the characteristic information of a battery cell of a different type than the battery cell (BC).

[0094] The inventor of the present invention recognized that, after deriving tuning data for compensating for differences in characteristic information between different types of battery cells through the processes to be described below, and then tuning the battery simulator (BSM) using the tuning data, the level of error (e.g., RSME) between the voltage response curve (dotted line) output from the battery simulator (BSM) and the actual voltage response curve (solid line) becomes less than a certain value.

[0095] The processor (120) can determine the k-th target overpotential value attributable to the charge transfer resistance of the battery cell (BC) by analyzing the k-th voltage response curve. The k-th voltage response curve may be data representing the actual voltage response of the battery cell (BC) in the k-th pulse test. Since k = 1 to p, the k-th target overpotential values ​​can be determined from the k-th to p-th voltage response curves. Specifically, the processor (120) can determine the k-th resistance value of interest from the k-th voltage response curve, and then determine the k-th charge transfer resistance value by subtracting the ohmic resistance value from the k-th resistance value of interest. Subsequently, the processor (120) can determine the k-th target overpotential value based on the current conditions of the k-th pulse test and the k-th charge transfer resistance value.

[0096] The k-th voltage response curve and the k-th overpotential value may have a relationship according to the following Equations 1 and 2.

[0097] <Formula 1>

[0098]

[0099] <Equation 2>

[0100]

[0101] In Equations 1 and 2, I[i] is the current condition of the k-th pulse test (1C [C-rate] in FIG. 2), ΔV drop is the voltage change of the battery cell (BC) over the initial part of the k-th pulse test, R drop [k] is the k-th resistance value of interest, R CT [k] is the k-th charge transfer resistance value of the battery cell (BC), R ohm is the ohmic resistance value of the battery cell (BC), η t [k] represents the k-th overpotential value. R ohm is a value determined through EIS analysis (Electrochemical Impedance Spectroscopy) and can remain constant regardless of test conditions.

[0102] The initial part of the k-th pulse test may be the period from the start time of the k-th pulse test until the elapsed time of interest. The time of interest may be predetermined to be very short, such as 0.1 seconds. The initial part of the k-th pulse test may be a period during which the influence of the diffusion resistance value on the voltage change of the battery cell (BC) is small enough to be negligible. For example, ΔV drop = V a [k] - V b [k]. V a [k] is the voltage of the battery cell (BC) at the start of the k-th pulse test, V b [k] represents the voltage of the battery cell (BC) at a time of interest elapsed from the start of the k-th pulse test.

[0103] The processor (120) is ΔV drop After determining , ΔV drop Divide by I[i] to R drop[k] is determined. Then, the processor (120) R drop [k] and R ohm R is equal to the product of the difference between and I[i]. CT [k] can be determined.

[0104] Unlike ohmic resistance, which is hardly affected by test conditions, charge transfer resistance is significantly dependent on test conditions. Furthermore, in the initial phase of a pulse test, charge transfer resistance exerts a more dominant influence on the voltage response than diffusion resistance. Therefore, by utilizing the voltage response portion at the beginning of each pulse test as the subject of analysis, tuning data can be extracted that can sufficiently compensate for the characteristic differences caused by charge transfer resistance between the two different battery types.

[0105] Hereinafter, a specific type of battery cell programmed into a battery simulator (BSM) to simulate charge-discharge response characteristics will be referred to as a 'reference cell,' and a battery cell of a different type from the reference cell (BC in FIG. 1) will be referred to as a 'target cell.'

[0106] Figures 3a and 3b are reference drawings used to exemplarily explain the difference in voltage response characteristics between a reference cell and a target cell.

[0107] The graph in Fig. 3a shows the relationship between the current condition, SOC condition, and voltage change amount of the reference cell, and the graph in Fig. 3b shows the relationship between the current condition, SOC condition, and voltage change amount of the target cell.

[0108] The data points for each graph may individually correspond to the first to 32 pulse tests based on the first to fourth current conditions and the first to eighth SOC conditions. For each graph, data points having a common SOC condition are depicted as being connected by a single line.

[0109] As can be confirmed by comparing the two graphs, in the graph of FIG. 3a, the lines corresponding to the first to eighth SOC conditions are plotted close to each other, whereas in the graph of FIG. 3b, the lines corresponding to the first to eighth SOC conditions are plotted relatively far apart. That is, the reference cell has a relatively low sensitivity to the voltage change amount for SOC, whereas the target cell may have a relatively high sensitivity to the voltage change amount for SOC.

[0110] Therefore, when simulating the charge-discharge response characteristics of a target cell using a battery simulator (BSM), it is necessary to apply tuning data to the battery simulator (BSM) to replace or approximate the voltage response characteristics of the reference cell programmed into the battery simulator (BSM) with the voltage response characteristics of the target cell.

[0111] Equations 3 and 4 below are used in the governing equations of the P2D (Pseudo-two-Dimensional) model for the reference cell. The governing equations of the P2D model for the reference cell may be programmed into the battery simulator (BSM).

[0112] <Equation 3>

[0113]

[0114] <Equation 4>

[0115]

[0116] In Formulas 3 and 4, the symbols representing different parameters regarding the reference cell are defined as follows.

[0117] j r : Reaction current density

[0118] a s : Active surface area per unit volume of electrode (specific surface area)

[0119] i r : Exchange current density

[0120] α a : Charge transfer coefficient of the cathode (e.g., 0.5)

[0121] α c : Positive charge transfer coefficient (e.g., 0.5)

[0122] η r : Overpotential value

[0123] R: Gas constant

[0124] T: Absolute temperature

[0125] F: Faraday constant

[0126] k r : Reaction rate constant

[0127] c e : Concentration of working ions in the electrolyte

[0128] c s,max : Maximum concentration of working ions in a solid

[0129] c s,e : Concentration of working ions at the interface between the electrolyte and the solid

[0130]

[0131] When the reference cell is a lithium-ion cell (LIB), the operating transfer refers to lithium ions, and when the reference cell is a sodium-ion cell (SIB), the operating transfer may refer to sodium ions.

[0132] The inventor of the present invention is j r , η r , i r and k r Taking into account that the remaining parameters are either predetermined constants independent of the battery type or correspond almost during the initial part of the pulse test, k r It was recognized that it can be sufficiently suppressed through a tuning process.

[0133] From now on, k r The tuning process for is explained in detail. First, the parameters of the target cell (j t , i r , k t , η r) can be defined as follows.

[0134] j t : Reaction current density of the target cell

[0135] i t : Exchange current density

[0136] k t : Reaction rate constant of the target cell

[0137] η t : Overpotential value

[0138] Next, in the early part of the pulse test, j r and j t Assuming this is the same, the relationship according to Equation 5 below can be derived from Equations 3 and 4.

[0139] <Equation 5>

[0140]

[0141] In Equation 5, c common to the left and right sides e , c s,max and c s,e By eliminating this, Equation 5 can be simplified as Equation 6 below.

[0142] <Equation 6>

[0143]

[0144] Next, the following Equation 7 can be derived from Equation 6.

[0145] <Equation 7>

[0146]

[0147] In Equation 7, f may be a parameter representing the response rate adjustment ratio for tuning from the reference cell to the target cell, i.e., the ratio between the response rate constant of the reference cell and the response rate constant of the target cell. The processor (120) uses k of Equation 3 programmed into the battery simulator (BSM). r ul (k rIt can be replaced with ×f), and as a result, it can be said that the battery simulator (BSM) is tuned to enable the output of a charge / discharge response curve that matches the voltage response characteristics of the target cell.

[0148] Equation 8 below is Equation 7 expressed in a form specialized for the k-th pulse test.

[0149] <Equation 8>

[0150]

[0151] In Equation 8, the parameter labeled [k] indicates that it is related to the k-th pulse test. f[k] is the k-th reaction rate adjustment ratio used to compensate for the difference in reaction rates between the reference cell and the target cell for the k-th pulse test. η r [k] represents the overpotential value of the reference cell at the beginning of the k-th pulse test, and η t [k] represents the overpotential value of the target cell at the beginning of the k-th pulse test. η r [k] is a value automatically calculated when the k-th test condition is entered into the Battery Simulator (BSM), and η t [k] may be a value obtained as a result of actually performing the k-th pulse test on the target cell (see Equations 1 and 2).

[0152] Equation 9 below represents the reaction rate adjustment ratio for the anode of the target cell derived based on Equation 8, and Equation 9 represents the reaction rate adjustment ratio for the anode of the target cell derived based on Equation 8.

[0153] <Equation 9>

[0154]

[0155] <Equation 10>

[0156]

[0157] In Equations 9 and 10, η r_pos [k] and η r_neg[k] is a pre-given value that can be referred to as the k-th reference anode overpotential value and the k-th reference cathode overpotential value, respectively. Also, f pos [k] and f neg [k] can be referred to as the k-th anodic reaction rate adjustment ratio and the k-th cathodic reaction rate adjustment ratio, respectively. η r_pos [k], η r_neg [k], η t_pos [k] and η t_neg [k] may have a relationship according to the following Equations 11 and 12.

[0158] <Equation 11>

[0159]

[0160] <Equation 12>

[0161]

[0162] In Equations 11 and 12, η t_pos [k] is the total overpotential value of the target cell based on the full cell at the beginning of the k-th pulse test (i.e., η t [k]) represents the overpotential value at the anode of the target cell, and η t_neg [k] represents the overpotential value at the cathode of the target cell. R r_pos is the total overpotential value of the reference cell based on the full cell during the beginning of the k-th pulse test (i.e., η r Represents the ratio of the positive-side overpotential to [k]. R r_neg is (1-R r_pos It can be.

[0163] By substituting natural numbers from 1 to p into k in Equation 9, the first to p-th anode reaction rate adjustment ratios can be determined. Similarly, by substituting natural numbers from 1 to p into k in Equation 10, the first to p-th cathode reaction rate adjustment ratios can be determined.

[0164] The processor (120) can derive first tuning data representing the relationship between the SOC condition, the current condition, and the anode reaction rate adjustment ratio based on the first to pth anode reaction rate adjustment ratios.

[0165] FIGS. 4 and FIGS. 5a to 5c are drawings referenced to explain the process of deriving the first tuning data.

[0166] The processor (120) groups the first to p anode reaction rate adjustment ratios into the first to m anode subsets according to the first to m current conditions. Accordingly, each of the first to m anode subsets may include n anode reaction rate adjustment ratios.

[0167] Next, the processor (120) derives first to m main curves having a predetermined function form from first to m subsets of anodes. The i main curve of anodes may be an exponential curve function, a polynomial function, or a linear function derived by applying curve fitting to the i subset of anodes.

[0168] FIG. 4 shows three positive main curves (MC) individually associated with 2,5C, 5C, and 10C as first to third current conditions. pos_1 , MC pos_2 , MC pos_3 ) is exemplified.

[0169] Equation 13 below is an example of the i-th bipolar main curve expressed in the form of an exponential curve function.

[0170] <Equation 13>

[0171]

[0172] In Equation 13, f pos_i corresponds to the target anode reaction rate adjustment ratio under the i-th current condition. a, one of the three curve parameters of the exponential curve function i , b i and c i These are the intercept, scale, and growth rate, in that order.

[0173] When the derivation of the first to m-th anode main curves is completed, the first to m-th intercept values ​​(a1~a m ), 1st to mth magnification values ​​(b1~b m ) and the first to m growth rate values ​​(c1~c m ) is also determined. The i-th intercept value, the i-th scale value, and the i-th growth rate value may be related to the i-th current condition.

[0174] The processor (120) can derive a positive sub-curve for each curve parameter by applying curve fitting to the values ​​of curve parameters of the same type of positive main curve.

[0175] In detail, the processor (120) has first to m-th intercept values ​​(a1 to a m Based on ), a first anode sub-curve representing the relationship between current conditions and the intercept (the first curve parameter of the main anode curve) can be derived. FIG. 5a shows the first anode sub-curve (SC) fitted in the form of a linear function. pos_1 This is an example of ). For instance, when x and y are the current condition and the intercept, respectively, the first anode sub-curve (SC pos_1 ) is y = (-0.047 × x) -0.076.

[0176] The processor (120) has first to m-th scaling values ​​(b1 to b m Based on ), a second anode sub-curve representing the relationship between current conditions and scaling (second curve parameter of the main anode curve) can be derived. FIG. 5b shows a second anode sub-curve (SC) fitted in the form of a linear function. pos_2 This is an example of ). For instance, when x and y are the current condition and the scaling factor, respectively, the second anode sub-curve (SC pos_2 ) is y = (-0.47 × x) - 1.24.

[0177] The processor (120) has first to m growth rate values ​​(c1 to c mBased on ), a third anode sub-curve representing the relationship between current conditions and the growth rate (the third curve parameter of the main anode curve) can be derived. FIG. 5c shows a third anode sub-curve (SC) fitted in the form of an exponential curve function. pos_3 This is an example of ). For instance, when x and y are the current condition (i.e., C-rate) and the growth rate, respectively, the third anode sub-curve (SC pos_3 ) is y = -0.04 - (0.22×exp[-0.55×x]).

[0178] The processor (120) is the first to third positive sub-curves (SC pos_1 , SC pos_2 , SC pos_3 Based on ), a first integrated curve representing the relationship between SOC conditions, current conditions, and anode reaction rate adjustment ratio can be derived. The first tuning data may include the first integrated curve.

[0179] In one embodiment, the first integration curve is the curve parameters (a) of the i-th bipolar main curve according to Equation 13. i , b i , c i ) is the first to third anode sub-curve (SC pos_1 , SC pos_2 , SC pos_3 It may have been replaced by ). Accordingly, Equation 13 can be transformed into Equation 14 below.

[0180] <Equation 14>

[0181]

[0182] According to Equation 14, it will be easy for those skilled in the art to understand that the anode reaction rate adjustment ratio for any current condition and any SOC condition can be obtained from the first integrated curve, without being limited to the test conditions used in the pulse test.

[0183] The processor (120) can additionally derive second tuning data.

[0184] FIGS. 6 and FIGS. 7a to 7c are drawings referenced to explain the process of deriving second tuning data.

[0185] The processor (120) groups the first to p-th cathode reaction rate adjustment ratios into the first to m-th cathode subsets according to the first to m-th current conditions. Accordingly, each of the first to m-th cathode subsets may include n cathode reaction rate adjustment ratios.

[0186] Next, the processor (120) derives first to m cathode main curves having a predetermined function form from first to m cathode subsets. The i cathode main curve may be an exponential curve function, a polynomial function, or a linear function derived by applying curve fitting to the i cathode subset.

[0187] In FIG. 6, three cathode main curves (MC) individually associated with 2,5C, 5C, and 10C as first to third current conditions are shown. neg_1 , MC neg_2 , MC neg_3 ) is exemplified.

[0188] Equation 15 below is an example of the i-th cathode main curve expressed in the form of an exponential curve function.

[0189] <Equation 15>

[0190]

[0191] In Equation 15, f neg_i corresponds to the target cathode reaction rate adjustment ratio under the i-th current condition. A is one of the three curve parameters of the exponential curve function. i , B i and C i These are the intercept, scale, and growth rate, in that order.

[0192] When the derivation of the first to mth cathode main curves is completed, the first to mth intercept values ​​(A1~A m ), 1st to mth magnification values ​​(B1~Bm ) and the 1st to 1st mth growth rate values ​​(C1~C m ) is also determined. The i-th intercept value, the i-th scale value, and the i-th growth rate value may be related to the i-th current condition.

[0193] The processor (120) can derive a cathode sub-curve for each curve parameter by applying curve fitting to the values ​​of curve parameters of the same type as the cathode main curve.

[0194] Specifically, the processor (120) has first to m-th intercept values ​​(A1 to A m Based on ), a first cathode sub-curve representing the relationship between current conditions and the intercept (the first curve parameter of the main cathode curve) can be derived. FIG. 7a shows a first cathode sub-curve (SC) fitted in the form of a linear function. neg_1 This is an example of ). For instance, when x and y are the current condition and the intercept, respectively, the first cathode sub-curve (SC neg_1 ) is y = (-0.047 × x) -0.076.

[0195] The processor (120) has first to m-th multiplier values ​​(B1 to B m Based on ), a second cathode sub-curve representing the relationship between current conditions and scaling (second curve parameter of the main cathode curve) can be derived. FIG. 7b shows a second cathode sub-curve (SC) fitted in the form of a linear function. neg_2 This is an example of ). For instance, when x and y are the current condition and the scaling factor, respectively, the second cathode sub-curve (SC neg_2 ) is y = (-0.47 × x) - 1.24.

[0196] The processor (120) has first to m growth rate values ​​(C1 to C m Based on ), a third cathode sub-curve representing the relationship between current conditions and the growth rate (the third curve parameter of the main cathode curve) can be derived. FIG. 7c shows a third cathode sub-curve (SC) fitted in the form of an exponential curve function.neg_3 This is an example of ). For instance, when x and y are the current condition (i.e., C-rate) and the growth rate, respectively, the third cathode sub-curve (SC neg_3 ) is y = -0.04 - (0.22×exp[-0.55×x]).

[0197] The processor (120) is the first to third cathode sub-curve (SC neg_1 , SC neg_2 , SC neg_3 Based on ), a second integrated curve representing the relationship between SOC conditions, current conditions, and cathode reaction rate adjustment ratio can be derived. The second tuning data may include the second integrated curve.

[0198] In one embodiment, the second integration curve is the curve parameters (A) of the i-th cathode main curve according to Equation 15. i , B i , C i ) is the first to third cathode sub-curve (SC neg_1 , SC neg_2 , SC neg_3 It may have been replaced by ). Accordingly, Equation 15 can be transformed into Equation 16 below.

[0199] <Equation 16>

[0200]

[0201] According to Equation 16, it will be easy for those skilled in the art to understand that the cathode response rate adjustment ratio for any current condition and any SOC condition can be obtained from the second integrated curve, without being limited to the test conditions used in the pulse test.

[0202] FIG. 8 is a flowchart schematically illustrating a method for deriving simulator tuning data according to another embodiment of the present invention. The method of FIG. 8 includes steps S810, S820, S824, and S828.

[0203] Referring to FIG. 8, in step S810, the processor (120) analyzes a plurality of voltage response curves associated with a plurality of pulse tests performed on a target cell and a plurality of overpotential values ​​(η) attributable to the charge transfer resistance of the target cell. t [1]~η t [p]) is determined (see Figure 2, Equations 1 and 2). Each of the multiple pulse tests may be a procedure for applying a charge pulse or a discharge pulse to a target cell under test conditions based on a combination of any one of the multiple SOC conditions and any one of the multiple current conditions. Multiple voltage response curves may be obtained from the battery tester (10) by the data acquisition unit (110).

[0204] In step S820, the processor (120) has a plurality of overpotential values ​​(η t [1]~η t From [p]), a plurality of target anode overpotential values ​​(η t_pos [1]~η t_pos Determines [p] (see Equation 11).

[0205] In step S824, the processor (120) has a plurality of target anode overpotential values ​​(η t_pos [1]~η t_pos Multiple anodic reaction rate adjustment ratios (f) corresponding to [p]) pos [1] ~ f pos Determines [p] (see Equation 9).

[0206] In step S828, the processor (120) has a plurality of anode reaction rate adjustment ratios (f pos [1] ~ f pos Based on [p]), first tuning data is derived that represents the relationship between the SOC condition, current condition, and anode reaction rate adjustment ratio.

[0207] The method of Fig. 8 may further include S830, S834, and S838.

[0208] In step S830, the processor (120) has a plurality of overpotential values ​​(ηt [1]~η t From [p]), a plurality of target cathode overpotential values ​​(η t_neg [1]~η t_neg Determines [p] (see Equation 12).

[0209] In step S834, the processor (120) has a plurality of target cathode overpotential values ​​(η t_neg [1]~η t_neg Multiple cathodic reaction rate adjustment ratios (f) corresponding to [p]) neg [1] ~ f neg Determines [p] (see Equation 10).

[0210] In step S838, the processor (120) has a plurality of cathode reaction rate adjustment ratios (f neg [1] ~ f neg Based on [p]), second tuning data is derived that represents the relationship between the SOC condition, current condition, and cathode reaction rate adjustment ratio.

[0211] The simulator tuning data includes the first tuning data at step S828 and may further include the second tuning data at step S838. The user may input an operation to switch the target battery type of the battery simulator (BSM) from the first type to the second type into the information interface unit (130), and in response, the processor (120) may apply the simulator tuning data to the battery simulator (BSM). When applying the simulator tuning data, the reaction rate constant of the governing equation programmed into the battery simulator (BSM) may be replaced with a function according to the first tuning data (see Equation 14) and / or a function according to the second tuning data (see Equation 16).

[0212] FIG. 9 is a flowchart schematically illustrating an example of subroutines that may be included in step S810 of the method according to FIG. 8.

[0213] Referring to FIG. 9, in step S910, the processor (120) obtains a plurality of resistance values ​​of interest (R) from a plurality of voltage response curves. drop [1] ~ R drop [p]) is determined (see Equation 1). In the eksrP S910, the k-th voltage change value (ΔV) is obtained from the k-th voltage response curve. drop After [k]) is determined, the k-th voltage change value (ΔV drop [k]) is divided by the current condition (I[i]), and the k-th resistance value of interest (R drop [k]) can be determined.

[0214] In step S920, the processor (120) has a plurality of resistance values ​​of interest (R drop [1] ~ R drop By subtracting the ohmic resistance value of the target cell from [p]), a plurality of charge transfer resistance values ​​(R CT [1] ~ R CT Determines [p] (see Equation 2).

[0215] In step S930, the processor (120) has a plurality of current conditions (I[1] ~ I[m]) and a plurality of charge transfer resistance values ​​(R CT [1] ~ R CT Based on [p]), multiple overpotential values ​​(η t [1]~η t Determines [p] (see Equation 2).

[0216] FIG. 10 is a flowchart schematically illustrating an example of subroutines that may be included in step S828 of the method according to FIG. 8.

[0217] Referring to FIG. 10, in step S1010, the processor (120) groups a plurality of anode reaction rate adjustment ratios into a plurality of anode subsets according to a plurality of current conditions.

[0218] In step S1020, the processor (120) derives a plurality of anode main curves having a predetermined function form from a plurality of anode subsets (MC of FIG. 4). pos_1 , MCpos_2 , MC pos_3 reference).

[0219] In step S1030, the processor (120) derives a plurality of positive sub-curves for a plurality of curve parameters of a plurality of positive main curves (SC of FIGS. 5a to 5c). pos_1 , SC pos_2 , SC pos_3 reference).

[0220] In step S1040, the processor (120) derives a first integrated curve representing the relationship between the SOC condition, the current condition, and the anode reaction rate adjustment ratio based on a plurality of anode sub-curves (see Equation 14). The first integrated curve is included in the first tuning data.

[0221] FIG. 11 is a flowchart schematically illustrating an example of subroutines that may be included in step S838 of the method according to FIG. 8.

[0222] Referring to FIG. 11, in step S1110, the processor (120) groups a plurality of cathode reaction rate adjustment ratios into a plurality of cathode subsets according to a plurality of current conditions.

[0223] In step S1120, the processor (120) derives a plurality of cathode main curves having a predetermined function form from a plurality of cathode subsets (MC of FIG. 6). neg_1 , MC neg_2 , MC neg_3 reference).

[0224] In step S1130, the processor (120) derives a plurality of cathode sub-curves for a plurality of curve parameters of a plurality of cathode main curves (SC of FIGS. 7a to 7c). neg_1 , SC neg_2 , SC neg_3 reference).

[0225] In step S1140, the processor (120) derives a second integrated curve representing the relationship between the SOC condition, the current condition, and the cathode response rate adjustment ratio based on a plurality of cathode sub-curves (see Equation 16). The second integrated curve is included in the second tuning data.

[0226] Another embodiment of the present invention may provide a computer-readable medium having a program recorded thereon for executing the various embodiments described above on a computer.

[0227] A program may be implemented as hardware components, software components, and / or a combination of hardware and software components. A program may be executed by any system capable of executing computer-readable instructions.

[0228] Software may include computer programs, code, instructions, or a combination thereof, and may configure a processing unit to operate as desired or command the processing unit independently or collectively.

[0229] Software may be implemented as a computer program containing instructions stored on a computer-readable storage media. Examples of computer-readable storage media include magnetic storage media (e.g., ROM (read-only memory), RAM (random-access memory), floppy disks, hard disks, etc.) and optical reading media (e.g., CD-ROM, DVD (Digital Versatile Disc)). Computer-readable storage media may be distributed across networked computer systems, allowing computer-readable code to be stored and executed in a distributed manner. The storage media may be readable by a computer (one or more processors), stored in memory (one or more memory devices), and executed by a computer (one or more processors).

[0230] Computer-readable media may be provided in the form of non-transitory recording media. Here, 'non-transitory storage media' simply means that it is a tangible device and does not contain a signal (e.g., electromagnetic waves), and the term does not distinguish between cases where data is stored semi-permanently and cases where it is stored temporarily. For example, 'non-transitory storage media' may include a buffer in which data is stored temporarily.

[0231] In addition, the program may be provided by being included in a computer program product. A computer program product may be traded between a seller and a buyer as a product.

[0232] A computer program product may include a software program or a computer-readable recording medium on which the software program is stored. For example, a computer program product may include a product in the form of a software program that is distributed electronically through a manufacturer of an electronic device or an electronic market (e.g., a downloadable application). For electronic distribution, at least a portion of the software program may be stored on a recording medium or temporarily created. In this case, the recording medium may be a server of the manufacturer of the electronic device, a server of the electronic market, or a recording medium of a relay server that temporarily stores the software program.

[0233] The embodiments of the present invention described above are not limited to implementation through devices and methods, but may also be implemented through a program that realizes a function corresponding to the configuration of the embodiments of the present invention or a recording medium on which such a program is recorded. Such implementation can be easily achieved by a person skilled in the art to which the present invention pertains, based on the description of the embodiments described above.

[0234] Although the present invention has been described above by limited embodiments and drawings, the present invention is not limited thereto, and it is obvious that various modifications and variations are possible within the scope of the technical spirit of the present invention and the equivalent scope of the claims described below by those skilled in the art to which the present invention belongs.

[0235] Furthermore, since the present invention described above allows for various substitutions, modifications, and changes within the scope of the technical concept of the present invention to those skilled in the art without departing from the technical spirit of the present invention, it is not limited by the aforementioned embodiments and attached drawings, but rather all or part of each embodiment may be selectively combined to allow for various modifications.

Claims

1. A method for deriving tuning data for using a battery simulator for a first type of reference cell for a second type of target cell, A step of determining multiple overpotential values ​​attributable to the charge transfer resistance of the target cell by analyzing multiple voltage response curves associated with multiple pulse tests performed on the target cell using multiple test conditions combined with multiple SOC conditions and multiple current conditions; A step of determining a plurality of target anode overpotential values ​​from the plurality of overpotential values ​​above; A step of determining a plurality of anode reaction rate adjustment ratios corresponding to the plurality of target anode overpotential values; and A step of deriving first tuning data representing the relationship between SOC conditions, current conditions, and anode reaction rate adjustment ratios based on the above plurality of anode reaction rate adjustment ratios; A method for deriving simulator tuning data including 2. In Paragraph 1, The step of determining the above plurality of overpotential values ​​is, A step of determining a plurality of resistance values ​​of interest from the plurality of voltage response curves above; A step of determining a plurality of charge transfer resistance values ​​by subtracting the ohmic resistance value of the target cell from the plurality of interest resistance values; and A step of determining the plurality of overpotential values ​​based on the plurality of current conditions and the plurality of charge transfer resistance values; A method for deriving simulator tuning data including 3. In Paragraph 2, The step of determining the above plurality of interest resistance values ​​is, A step of determining a plurality of voltage change amount values ​​in the initial part of the plurality of pulse tests from the plurality of voltage response curves; and A step of determining the plurality of resistance values ​​of interest by dividing the plurality of voltage change values ​​by the plurality of current conditions; A method for deriving simulator tuning data including 4. In Paragraph 1, The k-th anode reaction rate adjustment ratio among the above plurality of anode reaction rate adjustment ratios is given by the following formula: f pos [k]: k-th anode reaction rate adjustment ratio α a : Charge transfer coefficient of the negative electrode α c : Positive charge transfer coefficient F: Faraday constant R: Gas constant T: Absolute temperature η r_pos [k] k-th standard anode overpotential value η t_pos [k]: k-th target anode overpotential value A method for deriving simulator tuning data determined using 5. In Paragraph 1, The step of deriving the first tuning data above is, A step of grouping the plurality of anode reaction rate adjustment ratios into a plurality of anode subsets according to the plurality of current conditions; A step of deriving a plurality of anode main curves having a predetermined function form from the plurality of anode subsets above; A step of deriving a plurality of anode sub-curves for a plurality of curve parameters of a plurality of anode main curves; and A step of deriving a first integrated curve representing the relationship between SOC conditions, current conditions, and anode reaction rate adjustment ratio based on the plurality of anode sub-curves above; A method for deriving simulator tuning data, comprising, wherein the first tuning data comprises the first integrated curve.

6. In Paragraph 5, The above plurality of anode main curves are a plurality of exponential curve functions derived by applying curve fitting to the above plurality of anode subsets, and A method for deriving simulator tuning data, wherein the above plurality of curve parameters include an intercept, a scale, and a growth rate.

7. In Paragraph 6, The step of deriving the above plurality of anode sub-curves is, A step of deriving a first anode sub-curve representing the relationship between current conditions and intercepts based on a plurality of intercept values ​​of the plurality of anode main curves; A step of deriving a second anode sub-curve representing the relationship between current conditions and magnification based on a plurality of magnification values ​​of the plurality of anode main curves; and A step of deriving a third anode sub-curve representing the relationship between current conditions and growth rates based on multiple growth rate values ​​of the plurality of anode main curves; A method for deriving simulator tuning data including 8. In Paragraph 1, A step of determining a plurality of target cathode overpotential values ​​from the plurality of overpotential values ​​above; A step of determining a plurality of cathode reaction rate adjustment ratios corresponding to the plurality of target cathode overpotential values; and A step of deriving second tuning data representing the relationship between SOC conditions, current conditions, and cathode reaction rate adjustment ratios based on the above plurality of cathode reaction rate adjustment ratios; A method for deriving simulator tuning data, further including 9. A tuning data derivation device for using a battery simulator for a first type of reference cell for a second type of target cell, A data acquisition unit for acquiring multiple voltage response curves associated with multiple pulse tests performed on the target cell using multiple test conditions combined with multiple SOC conditions and multiple current conditions; and It includes a processor configured to analyze the plurality of voltage response curves above and determine a plurality of overpotential values ​​attributable to the charge transfer resistance of the target cell, and The above processor is, From the above plurality of overpotential values, a plurality of target anode overpotential values ​​are determined, and A plurality of anode reaction rate adjustment ratios corresponding to the plurality of target anode overpotential values ​​are determined, and A simulator tuning data derivation device that derives first tuning data representing the relationship between SOC conditions, current conditions, and anode reaction rate adjustment ratios based on the above plurality of anode reaction rate adjustment ratios.

10. In Paragraph 9, The above processor is, Determining a plurality of resistance values ​​of interest from the above plurality of voltage response curves, and A plurality of charge transfer resistance values ​​are determined by subtracting the ohmic resistance value of the target cell from the plurality of interest resistance values, and A simulator tuning data derivation device configured to determine the plurality of overpotential values ​​based on the plurality of current conditions and the plurality of charge transfer resistance values.

11. In Paragraph 9, The above processor is, The following formula: f pos [k]: k-th anode reaction rate adjustment ratio α a : Charge transfer coefficient of the negative electrode α c : Positive charge transfer coefficient F: Faraday constant R: Gas constant T: Absolute temperature η r_pos [k] k-th standard anode overpotential value η t_pos [k]: k-th target anode overpotential value A simulator tuning data derivation device that determines the k-th anode reaction rate adjustment ratio among the plurality of anode reaction rate adjustment ratios using the above.

12. In Paragraph 9, The above processor is, According to the above plurality of current conditions, the plurality of anode reaction rate adjustment ratios are grouped into a plurality of anode subsets, and From the above plurality of anode subsets, a plurality of anode main curves having a predetermined function form are derived, and A plurality of anode sub-curves for a plurality of curve parameters of the plurality of anode main curves are derived, and Based on the above plurality of anode sub-curves, a first integrated curve representing the relationship between SOC conditions, current conditions, and anode reaction rate adjustment ratio is derived, A simulator tuning data derivation device comprising the first tuning data and the first integrated curve.

13. In Paragraph 9, The above processor is, From the above plurality of overpotential values, a plurality of target cathode overpotential values ​​are determined, and A plurality of cathode reaction rate adjustment ratios corresponding to the plurality of target cathode overpotential values ​​are determined, and A simulator tuning data derivation device that derives second tuning data representing the relationship between SOC conditions, current conditions, and cathode reaction rate adjustment ratios based on the above plurality of cathode reaction rate adjustment ratios.

14. A battery simulation system comprising a simulator tuning data derivation device according to any one of claims 9 to 13.

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