Display device and electronic device

Abstract

This display device comprises: a plurality of light-emitting elements; a plurality of light extraction structures spaced apart from each other on a pixel electrode layer so as to overlap the plurality of light-emitting elements; a light-blocking layer disposed between the plurality of light extraction structures; reflective layers which are interposed between the light extraction structures and the light-blocking layers, and which encompass at least a portion of the lateral sides of the plurality of light extraction structures; an organic layer disposed on the light extraction structures and the light-blocking layers; a high-refractive-index layer on the organic layer, which overlaps the light-blocking layers; and a multi-lens on the organic layer, which overlaps the high-refractive-index layer and the light extraction structures. The multi-lens can include at least one first type lens overlapping a corresponding light extraction structure and having a first curvature, and a plurality of second type lenses overlapping the high-refractive-index layer and having second curvatures different from the first curvature.

Description

Display devices and electronic devices

[0001] The present invention relates to a display device and an electronic device including a display device.

[0002] As the information society develops, the demand for display devices to display images is increasing in various forms. Display devices may be flat panel displays such as Liquid Crystal Displays, Field Emission Displays, and Light Emitting Displays.

[0003] The light-emitting display device may include an organic light-emitting display device comprising an organic light-emitting diode element as a light-emitting element, and a micro light-emitting display device comprising a micro light-emitting diode element (hereinafter referred to as a micro light-emitting element) as a light-emitting element. Since the micro light-emitting diode element is made of inorganic material, it has the advantage of having a long lifespan with fewer degradation issues compared to organic light-emitting diode elements.

[0004] The problem that the present invention aims to solve is to provide a display device capable of improving light extraction efficiency.

[0005] The problems of the present invention are not limited to the technical problems mentioned above, and other unmentioned technical problems will be clearly understood by those skilled in the art from the description below.

[0006] A display device according to one embodiment for solving the above problem comprises a substrate, a transistor layer disposed between the substrates, a pixel electrode layer disposed on the transistor layer, a plurality of light-emitting elements disposed on the pixel electrode layer, a plurality of light extraction structures disposed spaced apart from each other on the pixel electrode layer to overlap the plurality of light-emitting elements, a light-blocking layer disposed between the plurality of light extraction structures, a reflective layer interposed between the light extraction structures and the light-blocking layer and surrounding at least a portion of the sides of the plurality of light extraction structures, an organic layer disposed on the light extraction structures and the light-blocking layer, a high-refractive index layer disposed on the organic layer to overlap with the light-blocking layer, and a multi-lens that overlaps with the high-refractive index layer and the light extraction structures on the organic layer, wherein the multi-lens may include one or more first-type lenses that overlap with a corresponding light extraction structure among the plurality of light extraction structures and have a first curvature, and a plurality of second-type lenses that overlap with the high-refractive index layer and have a second curvature different from the first curvature.

[0007] The second curvature above may be greater than the first curvature above.

[0008] The plurality of second type lenses above can surround one or more first type lenses.

[0009] The first type lens above may be arranged to overlap with the light-emitting element, and the second type lens above may be arranged to overlap with the light-blocking layer.

[0010] The width of the first type lens is wider than the width of the second type lens, and the height of the first type lens may be equal to or lower than the height of the second type lens.

[0011] The first type lens and the second type lens can each independently have a planar shape selected from square, circular, or elliptical.

[0012] The refractive index of the above high-refractive index layer may be higher than the refractive index of the above organic layer.

[0013] The high-refractive index layer is positioned to surround the perimeter of the light-emitting element, but may not overlap with the light-emitting element.

[0014] The above organic layer has a groove on its upper surface, and the high refractive index layer can be disposed in the groove.

[0015] The above organic layer may include a first organic layer that flattens the light extraction structure and the light-blocking layer, and a second organic layer disposed on the upper surface of the organic layer and flattens the high-refractive index layer.

[0016] Each of the plurality of light-emitting elements is covered by a corresponding light extraction structure among the plurality of light extraction structures, and each side of the plurality of light extraction structures may include an inversely tapered inclined surface.

[0017] Each of the above plurality of light extraction structures can surround at least a portion of the side adjacent to the upper surface of the corresponding light-emitting element among the above plurality of light-emitting elements.

[0018] Each of the above plurality of light extraction structures may include scattering particles.

[0019] In cross-section, the upper edge of each of the plurality of light extraction structures may have a rounded shape.

[0020] The upper surface adjacent to the upper edge of each of the plurality of light extraction structures may not be covered by the reflection layer.

[0021] The upper surface adjacent to the upper edge of each of the plurality of light extraction structures may not be covered by the light-blocking layer.

[0022] The light-emitting element further comprises a conductive layer disposed on the lower surface of a first semiconductor layer, an active layer disposed on the first semiconductor layer, a second semiconductor layer disposed on the active layer, a protective layer surrounding the conductive layer, the first semiconductor layer, the active layer, and the second semiconductor layer, a first contact electrode disposed on the protective layer and connected to the conductive layer that is exposed and not covered by the protective layer, and a second contact electrode disposed on the protective layer and disposed in a hole penetrating the conductive layer, the first semiconductor layer, and the active layer, and the pixel electrode layer may include a pixel electrode connected to the first contact electrode and a common electrode connected to the second contact electrode.

[0023] The light-emitting element further comprises a conductive layer disposed on the lower surface of a first semiconductor layer, an active layer disposed on the first semiconductor layer, a second semiconductor layer disposed on the active layer, a protective layer surrounding the conductive layer, the first semiconductor layer, the active layer, and the second semiconductor layer, and a contact electrode disposed on the protective layer and connected to the conductive layer that is exposed and not covered by the protective layer, and the pixel electrode layer comprises a pixel electrode connected to the first contact electrode, and the display device may further comprise a common electrode disposed on the light-emitting element.

[0024] An electronic device according to one embodiment comprises a display panel, a window disposed on the display panel, and

[0025] The display panel includes a lower cover disposed on the lower part of the display panel, wherein the display panel comprises a substrate, a transistor layer disposed between the substrates, a pixel electrode layer disposed on the transistor layer, a plurality of light-emitting elements disposed on the pixel electrode layer, a plurality of light extraction structures disposed spaced apart from each other on the pixel electrode layer to overlap the plurality of light-emitting elements, a light-blocking layer disposed between the plurality of light extraction structures, a reflective layer interposed between the light extraction structures and the light-blocking layer and surrounding at least a portion of the sides of the plurality of light extraction structures, an organic layer disposed on the light extraction structures and the light-blocking layer, a high-refractive index layer disposed on the organic layer to overlap with the light-blocking layer, and a multi-lens that overlaps with the high-refractive index layer and the light extraction structures on the organic layer, wherein the multi-lens may include one or more first-type lenses that overlap with a corresponding light extraction structure among the plurality of light extraction structures and have a first curvature, and a plurality of second-type lenses that overlap with the high-refractive index layer and have a second curvature different from the first curvature.

[0026] The electronic device may further include a battery that supplies power to the display device and is disposed in the space of the lower cover, and a middle frame disposed between the window and the lower cover.

[0027] Specific details of other embodiments are included in the detailed description and drawings.

[0028] According to the display device and the method of manufacturing the same according to the embodiments, the amount of light emitted in the direction of the lower side of the light-emitting element is reduced, thereby improving the light extraction effect. Accordingly, panel brightness can be increased, and power consumption for the same brightness can be reduced.

[0029] The effects according to the embodiments are not limited to those exemplified above, and a wider variety of effects are included in this specification.

[0030] FIG. 1 is a perspective view showing a display device according to one embodiment.

[0031] FIG. 2 is a layout diagram showing a display device according to one embodiment.

[0032] FIG. 3 is a block diagram showing a display device according to one embodiment.

[0033] FIG. 4 is an equivalent circuit diagram showing a subpixel according to one embodiment.

[0034] FIG. 5 is a layout diagram showing pixels of a display area according to one embodiment.

[0035] FIG. 6 is a cross-sectional view showing an example of a cross-section of a display panel corresponding to the line I-I' of FIG. 5.

[0036] Figure 7 is a cross-sectional view showing in detail an example of area A of Figure 6.

[0037] Figure 8 is a plan view showing the multilens layer and high refractive index layer of Figure 7.

[0038] FIG. 9 is a cross-sectional view showing in detail an example of area A of FIG. 6 according to another embodiment.

[0039] FIG. 10 is a cross-sectional view showing in detail an example of area A of FIG. 6 according to another embodiment.

[0040] Figure 11 is a plan view showing the relationship between the surrounding components of the multilens layer and the high-refractive index layer of Figure 10.

[0041] FIG. 12 is a cross-sectional view showing in detail an example of area A of FIG. 6 according to another embodiment.

[0042] Figure 13 is a plan view showing the relationship between the multilens layer of Figure 12 and surrounding components.

[0043] FIG. 14 is a cross-sectional view showing in detail an example of area A of FIG. 6 according to another embodiment.

[0044] Figure 15 is a plan view showing the relationship between the high-refractive index layer of Figure 14 and surrounding components.

[0045] FIG. 16 is a layout diagram showing pixels of a display area according to one embodiment.

[0046] FIG. 17 is a cross-sectional view showing an example of a cross-section of a display panel corresponding to the line I1-I1' of FIG. 16.

[0047] FIG. 18 is a cross-sectional view showing in detail an example of area A2 of FIG. 17.

[0048] FIGS. 19 and 20 are cross-sectional views showing an example of a cross-section of a display panel corresponding to the line I1-I1' of FIG. 16 according to another embodiment.

[0049] FIGS. 21 and FIGS. 22 are exemplary drawings showing a smart watch including a display device according to one embodiment.

[0050] FIG. 23 is an exploded view of a smart watch including a display device according to one embodiment.

[0051] FIG. 24 is an exemplary drawing showing a virtual reality device including a display device according to one embodiment.

[0052] FIG. 25 is an example drawing showing a virtual reality device including a display device according to another embodiment.

[0053] FIG. 26 is an exemplary drawing showing an automobile instrument panel and center fascia including display devices according to one embodiment.

[0054] FIG. 27 is an exemplary drawing showing a transparent display device including a display device according to one embodiment.

[0055] The advantages and features of the present invention and the methods for achieving them will become clear by referring to the embodiments described below in detail together with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below but may be implemented in various different forms. These embodiments are provided merely to ensure that the disclosure of the present invention is complete and to fully inform those skilled in the art of the scope of the invention, and the present invention is defined only by the scope of the claims.

[0056] When elements or layers are referred to as being "on" another element or layer, this includes cases where another layer or element is interposed directly on or in the middle of another element. Throughout the specification, the same reference numerals refer to the same components. Shapes, sizes, ratios, angles, numbers, etc., disclosed in the drawings for describing embodiments are exemplary and the invention is not limited to the depicted details.

[0057] The features of each of the various embodiments of the present invention may be combined or combined with one another, either partially or wholly, and may technically enable various interlocking and operation. Each embodiment may be implemented independently of one another or may be implemented together in an associated relationship.

[0058] Specific embodiments will be described below with reference to the attached drawings.

[0059] FIG. 1 is a perspective view showing a display device according to one embodiment.

[0060] Referring to FIG. 1, the display device (10) is a device for displaying video or still images and can be used as a display screen for various products such as televisions, laptops, monitors, billboards, and Internet of Things (IOT) devices, as well as portable electronic devices such as mobile phones, smartphones, tablet personal computers, smart watches, watch phones, mobile communication terminals, electronic notebooks, electronic books, PMPs (portable multimedia players), navigation systems, and UMPCs (Ultra Mobile PCs).

[0061] In one embodiment, the display device (10) may be a light-emitting display device such as an organic light-emitting display device using an organic light-emitting diode, a quantum dot light-emitting display device including a quantum dot light-emitting layer, an inorganic light-emitting display device including an inorganic semiconductor, and a micro light-emitting display device using a micro or nano light-emitting diode (micro LED or nano LED). Hereinafter, the display device (10) has been described with a focus on being a micro light-emitting display device, but the present invention is not limited thereto. Meanwhile, for convenience of explanation, a micro light-emitting diode has been described as a light-emitting element below.

[0062] The display device (10) includes a display panel (100), a display driving circuit (250), a circuit board (300), and a power supply circuit (500).

[0063] The display panel (100) may be formed as a rectangular plane having a short side in a first direction (DR1) and a long side in a second direction (DR2) that intersects the first direction (DR1). The corner where the short side in the first direction (DR1) and the long side in the second direction (DR2) meet may be formed rounded to have a predetermined curvature or formed at a right angle. The plane shape of the display panel (100) is not limited to a rectangle and may be formed as other polygons, circles, or ellipses. The display panel (100) may be formed flat, but is not limited thereto. For example, the display panel (100) may include curved surfaces formed at the left and right ends that have a constant curvature or a changing curvature. In addition, the display panel (100) may be formed flexibly so that it can be bent, curved, folded, or rolled.

[0064] The substrate (SUB) of the display panel (100) may include a main area (MA) and a sub area (SBA).

[0065] The main area (MA) may include a display area (DA) that displays an image and a non-display area (NDA) which is a surrounding area of ​​the display area (DA). The display area (DA) may include a plurality of pixels that display an image. Each of the pixels may include a plurality of subpixels. For example, each of the pixels may include a first subpixel emitting light of a first color, a second subpixel emitting light of a second color, and a third subpixel emitting light of a third color, but the embodiments of the present specification are not limited thereto.

[0066] A sub-region (SBA) may protrude in a second direction (DR2) from one side of a main region (MA). Although FIG. 1 illustrates a sub-region (SBA) unfolded, the sub-region (SBA) may be bent, in which case it may be placed on the lower surface of the display panel (100). When the sub-region (SBA) is bent, it may overlap with the main region (MA) in a third direction (DR3), which is the thickness direction of the display panel (100). A display driving circuit (250) may be placed in the sub-region (SBA).

[0067] The display driving circuit (250) can generate signals and voltages to drive the display panel (100). The display driving circuit (250) may be formed as an integrated circuit (IC) and attached to the display panel (100) using a COG (chip on glass) method, a COP (chip on plastic) method, or an ultrasonic bonding method, but is not limited thereto. As an example, the display driving circuit (250) may be attached to the circuit board (300) using a COF (chip on film) method.

[0068] A circuit board (300) can be attached to one end of a sub-region (SBA) of a display panel (100). As a result, the circuit board (300) can be electrically connected to the display panel (100) and the display driving circuit (250). The display panel (100) and the display driving circuit (250) can receive digital video data, timing signals, and driving voltages through the circuit board (300). The circuit board (300) may be a flexible printed circuit board, a printed circuit board, or a flexible film such as a chip-on-film.

[0069] The power supply circuit (500) can generate multiple panel driving voltages according to the power supply voltage from an external source. The power supply circuit (500) can be formed as an integrated circuit (IC) and attached to the circuit board (300) in a COF manner.

[0070] FIG. 2 is a layout diagram showing a display device according to one embodiment. FIG. 2 illustrates a sub-region (SBA) that is unfolded without being bent.

[0071] Referring to FIG. 2, the display panel (100) may include a main area (MA) and a sub area (SBA).

[0072] The main area (MA) may include a display area (DA) for displaying an image and a non-display area (NDA) which is the surrounding area of ​​the display area (DA). The display area (DA) may occupy most of the main area (MA). The display area (DA) may be positioned in the center of the main area (MA).

[0073] A display area (DA) includes a plurality of pixels (PX) for displaying an image, and each of the plurality of pixels (PX) may include a plurality of subpixels (SPX). A pixel (PX) may be defined as a minimum unit of subpixel group capable of expressing a white gradation.

[0074] The non-display area (NDA) may be positioned adjacent to the display area (DA). The non-display area (NDA) may be an outer area of ​​the display area (DA). The non-display area (NDA) may be positioned to surround the display area (DA). The non-display area (NDA) may be an edge area of ​​the display panel (100).

[0075] The first scan drive unit (SDC1) and the second scan drive unit (SDC2) may be placed in a non-display area (NDA). The first scan drive unit (SDC1) may be placed on one side (e.g., the left side) of the display panel (100), and the second scan drive unit (SDC2) may be placed on the other side (e.g., the right side) of the display panel, but the embodiments of the present specification are not limited thereto.

[0076] Each of the first scan driver (SDC1) and the second scan driver (SDC2) can be electrically connected to the display driver circuit (250) through scan fan out lines. Each of the first scan driver (SDC1) and the second scan driver (SDC2) receives a scan control signal from the display driver circuit (250) and can generate scan signals according to the scan control signal and output them to the scan lines.

[0077] A sub-region (SBA) may protrude in a second direction (DR2) from one side of a main region (MA). The length of the second direction (DR2) of the sub-region (SBA) may be shorter than the length of the second direction (DR2) of the main region (MA). The length of the first direction (DR1) of the sub-region (SBA) may be shorter than the length of the first direction (DR1) of the main region (MA) or substantially equal to the length of the first direction (DR1) of the main region (MA). The sub-region (SBA) may be bent and may be positioned at the bottom of the display panel (100). In this case, the sub-region (SBA) may overlap with the main region (MA) in a third direction (DR3).

[0078] The sub-region (SBA) may include a connection region (CA), a pad region (PA), and a bending region (BA).

[0079] The connection area (CA) is an area protruding in a second direction (DR2) from one side of the main area (MA). One side of the connection area (CA) is in contact with the non-display area (NDA) of the main area (MA), and the other side of the connection area (CA) may be in contact with the bending area (BA).

[0080] The pad area (PA) is an area where pads (PDs) and a display driving circuit (250) are placed. The display driving circuit (250) can be attached to the driving pads of the pad area (PA) using a conductive adhesive material such as an anisotropic conductive film. The circuit board (300) can be attached to the pads (PDs) of the pad area (PA) using a conductive adhesive material such as an anisotropic conductive film. One side of the pad area (PA) may be in contact with the bending area (BA).

[0081] The bending area (BA) is a bending area. When the bending area (BA) is bent, the pad area (PA) may be positioned below the connecting area (CA) and below the main area (MA). The bending area (BA) may be positioned between the connecting area (CA) and the pad area (PA). One side of the bending area (BA) is in contact with the connecting area (CA), and the other side of the bending area (BA) may be in contact with the pad area (PA).

[0082] FIG. 3 is a block diagram showing a display device according to one embodiment.

[0083] Referring to FIG. 3, the display area (DA) includes a plurality of pixels (PX), a plurality of scan lines (SL), a plurality of light emission control lines (EL), and a plurality of data lines (DL).

[0084] Multiple pixels (PX) may be arranged in a matrix form in a first direction (DR1) and a second direction (DR2). Multiple scan lines (SL) and multiple light emission control lines (EL) may extend in the first direction (DR1) and be arranged in the second direction (DR2). Multiple data lines (DL) may extend in the second direction (DR2) and be arranged in the first direction (DR1). Multiple scan lines (SL) include multiple write scan lines (GWL), multiple control scan lines (GCL), multiple initialization scan lines (GIL), and multiple bias scan lines (GBL).

[0085] Each of the plurality of subpixels (SPX) can be connected to one of the plurality of write scan lines (GWL), one of the plurality of control scan lines (GCL), one of the plurality of initialization scan lines (GIL), one of the plurality of bias scan lines (GBL), one of the plurality of light emission control lines (EL), and one of the plurality of data lines (DL). Each of the plurality of subpixels (SPX) receives a data voltage of the data line (DL) according to the write scan signal of the write scan line (GWL), and can emit light from the light-emitting element according to the data voltage.

[0086] The non-display area (NDA) includes a first scan drive unit (SDC1), a second scan drive unit (SDC2), and a display drive circuit (250).

[0087] Each of the first scan drive unit (SDC1) and the second scan drive unit (SDC2) may include a write scan signal output unit (611), a control scan signal output unit (612), an initialization scan signal output unit (613), a bias scan signal output unit (614), and a light emission signal output unit (615). Each of the write scan signal output unit (611), the control scan signal output unit (612), the initialization scan signal output unit (613), the bias scan signal output unit (614), and the light emission signal output unit (615) may receive a scan timing control signal (SCS) from the timing control circuit (400). The write scan signal output unit (611) may generate write scan signals according to the scan timing control signal (SCS) of the timing control circuit (400) and sequentially output them to the write scan lines (GWL). The control scan signal output unit (612) can generate control scan signals according to the scan timing control signal (SCS) and output them sequentially to the control scan lines (GCL). The initialization scan signal output unit (613) can generate initialization scan signals according to the scan timing control signal (SCS) and output them sequentially to the initialization scan lines (GIL). The bias scan signal output unit (614) can generate bias scan signals according to the scan timing control signal (SCS) and output them sequentially to the bias scan lines (EBL). The light emission signal output unit (615) can generate light emission control signals according to the scan timing control signal (SCS) and output them sequentially to the light emission control lines (EL).

[0088] The display driving circuit (250) includes a timing control circuit (251) and a data driving circuit (252).

[0089] The data driving circuit (252) can receive digital video data (DATA) and a data timing control signal (DCS) from the timing control circuit (251). The data driving circuit (252) converts the digital video data (DATA) into analog data voltages according to the data timing control signal (DCS) and outputs them to the data lines (DL). In this case, subpixels (SPX) are selected by the write scan signals of the first scan driving unit (SDC1) and the second scan driving unit (SDC2), and data voltages can be supplied to the selected subpixels (SPX).

[0090] The timing control circuit (251) can receive digital video data and timing signals from an external source. The timing control circuit (251) can generate a scan timing control signal (SCS) and a data timing control signal (DCS) to control the display panel (100) according to the timing signals. The timing control circuit (400) can output the scan timing control signal (SCS) to the first scan driving unit (SDC1) and the second scan driving unit (SDC2). The timing control circuit (251) can output digital video data (DATA) and the data timing control signal (DCS) to the data driving circuit (252).

[0091] The power supply circuit (500) can generate a plurality of panel driving voltages according to the power supply voltage from an external source. For example, the power supply circuit (500) can generate a first driving voltage (VDD), a second driving voltage (VSS), and a third driving voltage (VINT) and supply them to the display panel (100).

[0092] FIG. 4 is an equivalent circuit diagram showing a subpixel according to one embodiment.

[0093] Referring to FIG. 4, a subpixel (SPX) according to one embodiment may be connected to scan lines (GWL, GIL, GCL, GBL), an emitting line (EL), and a data line (DL). For example, the subpixel (SPX) may be connected to a write scan line (GWL), an initialization scan line (GIL), a control scan line (GCL), a bias scan line (GBL), an emitting line (EL), and a data line (DL).

[0094] A subpixel (SPX) according to one embodiment includes a driving transistor (DT), switching elements, a capacitor (C1), and a light-emitting element (LE). The switching elements include first to sixth transistors (ST1, ST2, ST3, ST4, ST5, ST6).

[0095] The driving transistor (DT) includes a gate electrode, a conductive layer, and a second electrode. The driving transistor (DT) controls the drain-source current (Ids, hereinafter referred to as "driving current") flowing between the conductive layer and the second electrode according to the data voltage applied to the gate electrode.

[0096] The light-emitting element (LE) can be a micro light-emitting diode.

[0097] The light-emitting element (LE) emits light according to the driving current (Ids). The amount of light emitted by the light-emitting element (LE) may be proportional to the driving current (Ids). The anode electrode of the light-emitting element (LE) is connected to the conductive layer of the fourth transistor (ST4) and the second electrode of the sixth transistor (ST6), and the cathode electrode may be connected to the second power line (VSL) to which the second power supply voltage is applied.

[0098] A capacitor (C1) is formed between the second electrode of a driving transistor (DT) and a first power line (VDL) to which a first power supply voltage (e.g., a first driving voltage VDD) is applied. The first power supply voltage may be a voltage at a higher level than the second power supply voltage. One electrode of the capacitor (C1) may be connected to the second electrode of the driving transistor (DT), and the other electrode of the capacitor (C1) may be connected to the first power line (VDL).

[0099] As shown in FIG. 4, the first to sixth transistors (ST1, ST2, ST3, ST4, ST5, ST6) and the driving transistor (DT) can all be formed as P-type MOSFETs (metal-oxide-semiconductor field effect transistors). In this case, the active layer of each of the first to sixth transistors (ST1, ST2, ST3, ST4, ST5, ST6) and the driving transistor (DT) can be formed of polysilicon.

[0100] The gate electrode of the first transistor (ST1) and the gate electrode of the second transistor (ST2) may be connected to the write scan line (GWL), the gate electrode of the third transistor (ST3) may be connected to the initialization scan line (GIL), and the gate electrode of the fourth transistor (ST4) may be connected to the bias scan line (GBL). Since the first to sixth transistors (ST1, ST2, ST3, ST4, ST5, ST6) are formed as P-type MOSFETs, they may be turned on when a scan signal of gate low voltage and a light emission signal are applied to the control scan line (GCL), the initialization scan line (GIL), the write scan line (GWL), the bias scan line (GBL), and the light emission line (EL), respectively. One electrode of the third transistor (ST3) and one electrode of the fourth transistor (ST4) may be connected to the initialization voltage line (VIL).

[0101] Alternatively, the driving transistor (DT), the second transistor (ST2), the fourth transistor (ST4), the fifth transistor (ST5), and the sixth transistor (ST6) may be formed as P-type MOSFETs, and the first transistor (ST1) and the third transistor (ST3) may be formed as N-type MOSFETs. The active layer of each of the driving transistor (DT), the second transistor (ST2), the fourth transistor (ST4), the fifth transistor (ST5), and the sixth transistor (ST6) formed as P-type MOSFETs may be formed of polysilicon, and the active layer of each of the first transistor (ST1) and the third transistor (ST3) formed as N-type MOSFETs may be formed of an oxide semiconductor.

[0102] In this case, since the first transistor (ST1) and the third transistor (ST3) are formed as N-type MOSFETs, the first transistor (ST1) can be turned on when a gate high voltage scan signal is applied, and the third transistor (ST3) can be turned on when an initialization scan signal of a gate high voltage is applied. In contrast, since the second transistor (ST2), the fourth transistor (ST4), the fifth transistor (ST5), and the sixth transistor (ST6) are formed as P-type MOSFETs, they can be turned on when a gate low voltage scan signal and a light emission signal are applied.

[0103] Alternatively, the fourth transistor (ST4) is formed as an N-type MOSFET, and thus the active layer of each of the fourth transistors (ST4) can be formed as an oxide semiconductor. When the fourth transistor (ST4) is formed as an N-type MOSFET, it can be turned on when a scan signal of gate high voltage is applied.

[0104] Alternatively, the first to sixth transistors (ST1, ST2, ST3, ST4, ST5, ST6) and the driving transistor (DT) may all be formed as N-type MOSFETs. In this case, the active layer of each of the first to sixth transistors (ST1, ST2, ST3, ST4, ST5, ST6) and the driving transistor (DT) may be formed as an oxide semiconductor.

[0105] FIG. 5 is a layout diagram showing pixels of a display area according to one embodiment.

[0106] Referring to FIG. 5, each of the plurality of pixels (PX) of the display area (DA) may include three subpixels (SPX1, SPX2, SPX3), but the embodiments of the present specification are not limited thereto, and each of the plurality of pixels (PX) of the display area (DA) may include four subpixels. When each of the plurality of pixels (PX) includes three subpixels (SPX1, SPX2, SPX3), each of the plurality of pixels (PX) may include a first subpixel (SPX1), a second subpixel (SPX2), and a third subpixel (SPX3).

[0107] Multiple pixels (PX) can be arranged in a matrix form. In each of the multiple pixels (PX), the first sub-pixel (SPX1), the second sub-pixel (SPX2), and the third sub-pixel (SPX3) can be arranged in a first direction (DR1).

[0108] In the case where each of the plurality of pixels (PX) includes three subpixels (SPX1, SPX2, SPX3), the first subpixel (SPX1) may emit light of a first color, the second subpixel (SPX2) may emit light of a second color, and the third subpixel (SPX3) may emit light of a third color. Here, the first color light may be light in the blue wavelength band, the second color light may be light in the green wavelength band, and the third color light may be light in the red wavelength band. For example, the blue wavelength band may refer to a wavelength band in which the main peak wavelength of the light is included in the wavelength band of approximately 370 nm to 460 nm, the green wavelength band may refer to a wavelength band in which the main peak wavelength of the light is included in the wavelength band of approximately 480 nm to 560 nm, and the red wavelength band may refer to a wavelength band in which the main peak wavelength of the light is included in the wavelength band of approximately 600 nm to 750 nm.

[0109] Alternatively, if each of the plurality of pixels (PX) includes four subpixels, the first subpixel may emit light of a first color, the second subpixel and the fourth subpixel may emit light of a second color, and the third subpixel may emit light of a third color. Alternatively, the first subpixel may emit light of a first color, the second subpixel may emit light of a second color, the third subpixel may emit light of a third color, and the fourth subpixel may emit light of a fourth color. In this case, the light of the fourth color may be white light.

[0110] A first subpixel (SPX1) includes a first pixel electrode (PXE1), a plurality of light-emitting elements (LE), and a first light conversion layer (QDL1). A second subpixel (SPX2) includes a second pixel electrode (PXE2), a plurality of light-emitting elements (LE), and a second light conversion layer (QDL2). A third subpixel (SPX3) includes a third pixel electrode (PXE3), a plurality of light-emitting elements (LE), and a light-transmitting layer (TPL).

[0111] Pixel electrodes (PXE1 / PXE2 / PXE3) and common electrodes (CE1 / CE2 / CE3) may be arranged in a second direction (DR2) at each of the first subpixel (SPX1), the second subpixel (SPX2), and the third subpixel (SPX3). Each of the pixel electrodes (PXE1, PXE2, PXE3) and the common electrodes (CE1, CE2, CE3) may have a rectangular planar shape, but the embodiments of the present specification are not limited thereto. The area of ​​the first pixel electrode (PXE1) may be substantially the same as the area of ​​the first common electrode (CE1), the area of ​​the second pixel electrode (PXE2) may be substantially the same as the area of ​​the second common electrode (CE2), and the area of ​​the third pixel electrode (PXE3) may be substantially the same as the area of ​​the third common electrode (CE3), but the embodiments of the present specification are not limited thereto.

[0112] For example, as shown in FIG. 5, when the light conversion efficiency of the second light conversion layer (QDL2) is lower than the light conversion efficiency of the first light conversion layer (QDL1), the area of ​​the second pixel electrode (PXE2) may be larger than the area of ​​the first pixel electrode (PXE1), and the area of ​​the second common electrode (CE2) may be larger than the area of ​​the first common electrode (CE1). In addition, since the light transmission layer (TPL) transmits the light of the light-emitting element (LE) as is, while the first light conversion layer (QDL1) must convert the light, the area of ​​the first pixel electrode (PXE1) may be larger than the area of ​​the third pixel electrode (PXE3), and the area of ​​the first common electrode (CE1) may be larger than the area of ​​the third common electrode (CE3).

[0113] Each of the pixel electrodes (PXE1, PXE2, PXE3) can be electrically connected to at least one transistor through a pixel connection hole (CT1 / CT2 / CT3). For example, each of the pixel electrodes (PXE1, PXE2, PXE3) can be electrically connected to the second electrode of the fourth transistor (ST4 in FIG. 4) and the second electrode of the sixth transistor (ST6 in FIG. 4) of the corresponding subpixel.

[0114] The first common electrode (CE1) can be connected to a second power line (VSL) to which a second driving voltage (VSS) is applied through a first common connection hole (CT4). The second common electrode (CE2) can be connected to the second power line (VSL) through a second common connection hole (CT5). The third common electrode (CE3) can be connected to the second power line (VSL) through a third common connection hole (CT6). Thus, the second driving voltage (VSS) can be applied to each of the common electrodes (CE1, CE2, CE3). The pixel electrodes (PXE1, PXE2, PXE3) may be referred to as the anode electrode or the first electrode, and the common electrodes (CE1, CE2, CE3) may be referred to as the cathode electrode or the second electrode.

[0115] A plurality of light-emitting elements (LEs) may be disposed on pixel electrodes (PXE1 / PXE2 / PXE3) and common electrodes (CE1 / CE2 / CE3). Each of the plurality of light-emitting elements (LEs) may have a rectangular planar shape, but the embodiments of this specification are not limited thereto. As an example, each of the plurality of light-emitting elements (LEs) may have a circular planar shape.

[0116] The first light conversion layer (QDL1) can completely overlap with a plurality of light-emitting elements (LE) of the first subpixel (SPX1). The first light conversion layer (QDL1) can convert or shift the peak wavelength of incident light to light of another specific peak wavelength and emit it. For example, the first light conversion layer (QDL1) can convert or shift third light emitted from a plurality of light-emitting elements (LE) of the first subpixel (SPX1) into first light.

[0117] The second light conversion layer (QDL2) can completely overlap with the plurality of light-emitting elements (LE) of the second subpixel (SPX2). The area of ​​the second light conversion layer (QDL2) may be larger than the area of ​​the second pixel electrode (PXE2). The second light conversion layer (QDL2) can convert or shift the peak wavelength of the incident light to light of another specific peak wavelength and emit it. For example, the second light conversion layer (QDL2) can convert or shift the third light emitted from the plurality of light-emitting elements (LE) of the second subpixel (SPX2) into the second light.

[0118] The light-transmitting layer (TPL) can completely overlap with the plurality of light-emitting elements (LE) of the third subpixel (SPX3). The light-transmitting layer (TPL) can transmit incident light as is. For example, the light-transmitting layer (TPL) can transmit the third light emitted from the plurality of light-emitting elements (LE) of the third subpixel (SPX3) as is.

[0119] When the light-emitting element (LE) of the first subpixel (SPX1) emits light of the first color, the light-emitting element (LE) of the second subpixel (SPX2) emits light of the second color, and the light-emitting element (LE) of the third subpixel (SPX3) emits light of the third color, the light conversion layers (QDL1, QDL2) and the light transmission layer (TPL) may be omitted.

[0120] FIG. 6 is a cross-sectional view showing an example of a cross-section of a display panel corresponding to the line I-I' of FIG. 5. FIG. 7 is a cross-sectional view showing in detail an example of area A of FIG. 6 according to one embodiment, and FIG. 8 is a plan view showing the multi-lens layer and high-refractive index layer of FIG. 7 according to one embodiment.

[0121] Referring to FIGS. 6 to 8, the substrate (SUB) may be made of an insulating material such as glass or a polymer resin. When the substrate (SUB) is made of a polymer resin, it may be a stretchable flexible substrate. The polymer resin may be an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin.

[0122] A barrier film (BR) may be disposed on a substrate (SUB). The barrier film (BR) is a film intended to protect the transistors of the thin-film transistor layer (TFTL) from moisture penetrating through the substrate (SUB), which is susceptible to moisture permeability. The barrier film (BR) may be composed of multiple inorganic films stacked alternately.

[0123] A thin-film transistor (TFT1) may be disposed on the barrier film (BR). The thin-film transistor (TFT1) may be either the fourth transistor (ST4) or the sixth transistor (ST6) shown in FIG. 4. The thin-film transistor (TFT1) may include a first active layer (ACT1) and a first gate electrode (G1).

[0124] A first active layer (ACT1) of a thin-film transistor (TFT1) may be disposed on a barrier film (BR). The first active layer (ACT1) of the thin-film transistor (TFT1) may include polycrystalline silicon, single-crystal silicon, low-temperature polycrystalline silicon, or amorphous silicon. Alternatively, the first active layer (ACT1) of the thin-film transistor (TFT1) may be made of an oxide semiconductor including IGZO (indium (In), gallium (Ga), zinc (Zn), and oxygen (O)), IGZTO (indium (In), gallium (Ga), zinc (Zn), tin (Sn), and oxygen (O)), or IGTO (indium (In), gallium (Ga), tin (Sn), and oxygen (O)).

[0125] The first active layer (ACT1) may include a first channel region (CHA1), a first source region (S1), and a first drain region (D1). The first channel region (CHA1) may be a region that overlaps with the first gate electrode (G1) in the third direction (DR3), which is the thickness direction of the substrate (SUB). The first source region (S1) may be disposed on one side of the first channel region (CHA1), and the first drain region (D1) may be disposed on the other side of the first channel region (CHA1). The first source region (S1) and the first drain region (D1) may be regions that do not overlap with the first gate electrode (G1) in the third direction (DR3). The first source region (S1) and the first drain region (D1) may be regions that have conductivity by doping ions into a semiconductor material.

[0126] A first gate insulating film (131) may be disposed on the first channel region (CHA1), the first source region (S1), and the first drain region (D1) of the thin film transistor (TFT1).

[0127] A first gate metal layer may be disposed on the first gate insulating film (131). The first gate metal layer may include a first gate electrode (G1) and a first capacitor electrode (CAE1) of a thin-film transistor (TFT1). The first gate electrode (G1) may overlap with the first active layer (ACT1) in the third direction (DR3). Although the first gate electrode (G1) and the first capacitor electrode (CAE1) are shown as being separated from each other in FIG. 6, the first gate electrode (G1) and the first capacitor electrode (CAE1) may be connected to each other.

[0128] A second gate insulating film (132) may be disposed on the first gate electrode (G1) and the first capacitor electrode (CAE1) of the thin-film transistor (TFT1).

[0129] A second gate metal layer may be disposed on the second gate insulating film (132). The second gate metal layer may include a second capacitor electrode (CAE2). The second capacitor electrode (CAE2) may overlap with the first capacitor electrode (CAE1) in the third direction (DR3). Since the second gate insulating film (132) has a predetermined dielectric constant, a capacitor (C1 in FIG. 4) may be formed by the first capacitor electrode (CAE1), the second capacitor electrode (CAE2), and the second gate insulating film (132) disposed between them.

[0130] A first interlayer insulating film (141) may be disposed on the second capacitor electrode (CAE2).

[0131] A first data metal layer may be disposed on the first interlayer insulating film (141). The first data metal layer may include a first source connection electrode (PCE1). The first source connection electrode (PCE1) may be connected to a first drain region (D1) of the first active layer (ACT1) through a first source contact hole (PCT1) penetrating the first gate insulating film (131), the second gate insulating film (132), and the interlayer insulating film (141).

[0132] A first flattening organic film (160) for flattening the step difference caused by a thin film transistor (TFT1) may be disposed on the first source connection electrode (PCE1).

[0133] A second data metal layer may be disposed on the first planarization organic film (160). The second data metal layer may include a second source connection electrode (PCE2). The second source connection electrode (PCE2) may be connected to the first source connection electrode (PCE1) through a second pixel contact hole (PCT2) that penetrates the first planarization organic film (160).

[0134] A second planarizing organic film (180) may be placed on the second source connection electrode (PCE2).

[0135] The barrier film (BR), the first gate insulating film (131), the second gate insulating film (132), the third gate insulating film (133), and the first interlayer insulating film (141) are inorganic films, for example, silicon nitride (SiN x ), silicon nitride (SiON), silicon oxide (SiO x ), titanium oxide (TiO₂ x ), or aluminum oxide (AlO x It can be formed as ).

[0136] The first gate metal layer, the second gate metal layer, the first data metal layer, and the second data metal layer may be formed as a single layer or a multilayer composed of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof.

[0137] The first flattening organic film (160) and the second flattening organic film (180) can be formed from organic films such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, and polyimide resin.

[0138] A light-emitting element layer may be disposed on the second planarized organic film (180). The light-emitting element layer may include pixel electrodes (PXE1, PXE2, PXE3), light-emitting elements (LE), and a common electrode (CE) (e.g., common electrodes (CE1, CE2, CE3)).

[0139] A pixel electrode layer comprising pixel electrodes (PXE1, PXE2, PXE3) and common electrodes (CE1, CE2, CE3) can be disposed on a second planarization organic film (180).

[0140] Each of the first pixel electrode (PXE1), the second pixel electrode (PXE2), and the third pixel electrode (PXE3) can be connected to the second source connection electrode (PCE2) through a connection hole (CT1 / CT2 / CT3 in FIG. 5) penetrating the second planarization organic film (180). Each of the pixel electrodes (PXE1, PXE2, PXE3) can be connected to the first source region (S1) or the first drain region (D1) of the thin-film transistor (TFT1) through the first source connection electrode (PCE1) and the second source connection electrode (PCE2). Therefore, a voltage controlled by the thin-film transistor (TFT1) can be applied to each of the pixel electrodes (PXE1, PXE2, PXE3).

[0141] Common electrodes (CE1, CE2, CE3) can be connected to a second power line (VSL in FIG. 4) to which a second driving voltage (VSS in FIG. 3) is applied through common connection holes (CT4 / CT5 / CT6 in FIG. 5). For example, the first common electrode (CE1) can be connected to the second power line (VSL) through the first common connection hole (CT4). The second common electrode (CE2) can be connected to the second power line (VSL) through the second common connection hole (CT5). The third common electrode (CE3) can be connected to the second power line (VSL) through the third common connection hole (CT6). Therefore, the second driving voltage (VSS) can be applied to each of the common electrodes (CE1, CE2, CE3).

[0142] The pixel electrode layer may be formed as a single layer or a multilayer composed of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof. For example, to lower the resistance of each of the pixel electrodes (PXE1, PXE2, PXE3), the pixel electrode layer may be made of copper (Cu), which has low sheet resistance.

[0143] A light-emitting element (LE) may be disposed on each pixel electrode layer. In FIGS. 6 and 7, the light-emitting element (LE) is exemplified as a flip-type micro LED. A flip-type micro LED refers to an LED having contact electrodes (CTE1, CTE2) formed on one side (e.g., the bottom side) of the light-emitting element (LE).

[0144] Each of the multiple light-emitting elements (LEs) can be formed from an inorganic material such as gallium nitride (GaN).

[0145] Each of the plurality of light-emitting elements (LEs) can be formed by growing on a semiconductor substrate, such as a silicon substrate or a sapphire substrate. The plurality of light-emitting elements (LEs) can be transferred directly from the semiconductor substrate or via an intermediate substrate onto the pixel electrode layer of the display panel (100). Alternatively, the plurality of light-emitting elements (LEs) can be transferred onto the pixel electrode layer of the display panel (100) via an electrostatic method using an electrostatic head or a stamp method using an elastic polymer material such as PDMS (polydimethylsiloxane) or silicon as a transfer substrate.

[0146] Although not illustrated in the present specification, a reflective film may be disposed on the upper surface of the pixel electrode (PXE1) and the common electrode (CE1).

[0147] The reflective film can reflect light traveling downward from the light-emitting element (LE) and emit it to the upper surface of the light-emitting element (LE). Therefore, since the loss of light from the light-emitting element (LE) can be reduced, the light efficiency of the light-emitting element (LE) can be increased.

[0148] The reflective film can be formed as a single layer of a metal with high reflectivity, or as a multilayer such as titanium (Ti) / aluminum (Al) / titanium (Ti) or ITO / aluminum (Al) / ITO.

[0149] The light-emitting element (LE) may include a conductive layer (E1), a first semiconductor layer (SEM1), an active layer (MQW), a second semiconductor layer (SEM2), a third semiconductor layer (SEM3), a first contact electrode (CTE1), a second contact electrode (CTE2), and a protective film (INS).

[0150] A conductive layer (E1) may be disposed on the lower surface of a first semiconductor layer (SEM1). The conductive layer (E1) may include any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu).

[0151] The first semiconductor layer (SEM1) can be placed on the conductive layer (E1). The first semiconductor layer (SEM1) may be made of a semiconductor material layer doped with a first conductive type dopant such as magnesium (Mg), zinc (Zn), calcium (Ca), strontium (Sr), barium (Ba), etc., for example, gallium nitride (GaN).

[0152] The active layer (MQW) can be placed on the first semiconductor layer (SEM1). The active layer (MQW) can emit light through the coupling of electron-hole pairs according to an electric signal applied through the first semiconductor layer (SEM1) and the second semiconductor layer (SEM2).

[0153] The active layer (MQW) may include a material having a single or multiple quantum well structure. When the active layer (MQW) includes a material having a multiple quantum well structure, it may have a structure in which multiple well layers and barrier layers are alternately stacked. In this case, the well layers may be formed of indium gallium nitride (InGaN), and the barrier layers may be formed of gallium nitride (GaN) or aluminum gallium nitride (AlGaN), but the embodiments of this specification are not limited thereto.

[0154] Alternatively, the active layer (MQW) may have a structure in which semiconductor materials with large band gap energy and semiconductor materials with small band gap energy are alternately stacked, or it may include different group 3 to group 5 semiconductor materials depending on the wavelength of the emitted light.

[0155] For example, when the active layer (MQW) contains indium gallium nitride (InGaN), the color of the emitted light may vary depending on the content of indium (In). For example, as the content of indium (In) increases, the wavelength band of the light emitted by the active layer shifts to a red wavelength band, and as the content of indium (In) decreases, the wavelength band of the light emitted by the active layer shifts to a blue wavelength band. For example, the content of indium (In) in the active layer (MQW) of a light-emitting device (LE) that emits a third light (light in the blue wavelength band) may be approximately 10 wt% to 20 wt%.

[0156] The second semiconductor layer (SEM2) can be disposed on the active layer (MQW). The second semiconductor layer (SEM2) may be a semiconductor material layer doped with a second conductivity type dopant, such as silicon (Si), germanium (Ge), tin (Sn), etc., for example, gallium nitride (GaN).

[0157] A third semiconductor layer (SEM3) may be disposed on a second semiconductor layer (SEM2). The third semiconductor layer (SEM3) is a semiconductor material layer in which the N-type dopant is lower than a predetermined threshold value and may be referred to as an un-doped semiconductor layer. For example, the third semiconductor layer (SEM3) may be indium aluminum gallium nitride (InAlGaN), gallium nitride (GaN), aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN), aluminum nitride (AlN), or indium nitride (InN), in which the N-type dopant is lower than a predetermined threshold value.

[0158] The upper surface of the third semiconductor layer (SEM3) may have light extraction patterns (LEPs).

[0159] Light extraction patterns (LEPs) may be patterns designed to increase the efficiency of light emitted from the upper surface of a light-emitting element (LE). Light extraction patterns (LEPs) may be concave patterns formed as hemispheres or semi-ellipses. Light extraction patterns (LEPs) may be concave patterns having a semicircular or semi-elliptical cross-sectional shape.

[0160] An electron blocking layer may be placed between the first semiconductor layer (SEM1) and the active layer (MQW). The electron blocking layer may be a layer for suppressing or preventing too many electrons from flowing into the active layer (MQW). For example, the electron blocking layer may be aluminum gallium nitride (AlGaN) or p-type aluminum gallium nitride (AlGaN) doped with p-type magnesium (Mg). The electron blocking layer may be omitted.

[0161] A superlattice layer may be disposed between the active layer (MQW) and the second semiconductor layer (SEM2). The superlattice layer may be a layer for relieving stress between the second semiconductor layer (SEM2) and the active layer (MQW). For example, the superlattice layer may be formed of indium gallium nitride (InGaN) or gallium nitride (GaN). The superlattice layer may be omitted.

[0162] The protective film (INS) may be a film for protecting the light-emitting element (LE). The protective film (INS) may cover at least a portion of the outer surface of a plurality of semiconductor layers (SEM1, MQW, SEM2, SEM3) of the light-emitting element (LE). For example, the protective film (INS) may cover the entire outer surface of the plurality of semiconductor layers (SEM1, MQW, SEM2, SEM3) excluding the upper surface. The protective film (INS) may be disposed on the lower surface and side surface of the conductive layer (E1) and on the side surface of the plurality of semiconductor layers (SEM1, MQW, SEM2, SEM3). The protective film (INS) may be an inorganic film, for example, silicon nitride (SiN x ), silicon nitride (SiON), silicon oxide (SiO x ), titanium oxide (TiO₂ x), or aluminum oxide (AlO x It can be formed as ). It is preferable that the protective film (INS) be placed from one end to the other end of the side of the light-emitting element (LE), but it may be placed spaced apart from one end due to process error.

[0163] A hole (LEH) may be formed that penetrates the conductive layer (E1), the first semiconductor layer (SEM1), and the active layer (MQW) of the light-emitting element (LE) to expose the second semiconductor layer (SEM2). The hole (LEH) may have a rectangular planar shape, but the embodiments of this specification are not limited thereto. As an example, the hole (LEH) may have a polygonal shape such as a square, a circular shape, or an elliptical shape.

[0164] Additionally, the protective film (INS) may be disposed on the sidewall of the conductive layer (E1) exposed in the hole (LEH), the sidewall of the first semiconductor layer (SEM1), and the sidewall of the active layer (MQW). The protective film (INS) may not cover the second semiconductor layer (SEM2) in the hole (LEH). Therefore, the second semiconductor layer (SEM2) may be exposed without being covered by the protective film (INS).

[0165] The first contact electrode (CTE1) can be disposed on one side of the conductive layer (E1). The first contact electrode (CTE1) can be disposed on the lower surface of the conductive layer (E1) that is exposed and not covered by the protective film (INS). Therefore, the first contact electrode (CTE1) can be electrically connected to the conductive layer (E1).

[0166] The second contact electrode (CTE2) may be disposed on one side of the conductive layer (E1). The second contact electrode (CTE2) may be disposed on a protective film (INS) disposed in the hole (LEH) and on a second semiconductor layer (SEM2) exposed in the hole (LEH) without being covered by the protective film (INS). Therefore, the second contact electrode (CTE2) may be electrically connected to the second semiconductor layer (SEM2) in the hole (LEH).

[0167] The first contact electrode (CTE1) and the second contact electrode (CTE2) may include any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). Specifically, to increase reflectivity, the first contact electrode (CTE1) and the second contact electrode (CTE2) may be formed with a two-layer structure of chromium (Cr) and gold (Au), a three-layer structure of titanium (Ti), aluminum (Al), and titanium (Ti), or a three-layer structure of ITO (Indium Tin Oxide), silver (Ag), and ITO (Indium Tin Oxide).

[0168] The connecting electrodes (BE1, BE2) bond the light-emitting element (LE) to the pixel electrode layer and also electrically connect the light-emitting element (LE) to the pixel electrode layer. For example, the connecting electrodes (BE1, BE2) may include a first connecting electrode (BE1) and a second connecting electrode (BE2). The first connecting electrode (BE1) connects the first contact electrode (CTE1) of the light-emitting element (LE) with the pixel electrode (PXE1 / PXE2 / PXE3). The first connecting electrode (BE1) may be positioned between the first contact electrode (CTE1) of the light-emitting element (LE) and the pixel electrode (PXE2). Accordingly, the first connecting electrode (BE1) can connect the conductive layer (E1) of the light-emitting element (LE) with the pixel electrode (PXE1 / PXE2 / PXE3). Additionally, the second connecting electrode (BE2) connects the second contact electrode (CTE2) of the light-emitting element (LE) with the common electrode (CE1 / CE2 / CE3). The second connecting electrode (BE2) is disposed on a second contact electrode (CTE2) positioned on the side of a plurality of semiconductor layers (SEM1, MQW, SEM2, SEM3) and can be disposed on a common electrode (CE1 / CE2 / CE3). Accordingly, the second connecting electrode (BE2) can connect the second semiconductor layer (SEM2) of the light-emitting element (LE) with the common electrode (CE1 / CE2 / CE3).

[0169] The first connecting electrode (BE1) and the second connecting electrode (BE2) may be spaced apart from the upper surface of the semiconductor stack (STC) in the third direction (DR3). The first connecting electrode (BE1) and the second connecting electrode (BE2) may be formed lower than at least one end of the first contact electrode (CTE1) and the second contact electrode (CTE2). For example, the distance between the first connecting electrode (BE1) and the upper surface of the plurality of semiconductor layers (SEM1, MQW, SEM2, SEM3) is greater than the distance between the first contact electrode (CTE1) and the upper surface of the plurality of semiconductor layers (SEM1, MQW, SEM2, SEM3), and the distance between the second connecting electrode (BE2) and the upper surface of the plurality of semiconductor layers (SEM1, MQW, SEM2, SEM3) may be greater than the distance between the second contact electrode (CTE2) and the upper surface of the plurality of semiconductor layers (SEM1, MQW, SEM2, SEM3).

[0170] The first connecting electrode (BE1) and the second connecting electrode (BE2) may include at least one of gold (Au), copper (Cu), tin (Sn), silver (Ag), aluminum (Al), and titanium (Ti). For example, the first connecting electrode (BE1) and the second connecting electrode (BE2) may include a 9:1 alloy, an 8:2 alloy, or a 7:3 alloy of gold and tin.

[0171] The first connecting electrode (BE1) and the second connecting electrode (BE2) may include a eutectic metal or a bonding metal.

[0172] In one embodiment, light-emitting elements (LE) are bonded onto the pixel electrode layer by means of connecting electrodes (BE1, BE2), but this is not limited thereto. For example, an adhesive layer may be disposed between the light-emitting elements (LE) and the pixel electrode layer. When an adhesive layer is disposed, the contact electrodes (CTE1, CTE2) extend to the sides of the plurality of light-emitting elements (LE), and the contact electrodes (CTE1, CTE2) and the pixel electrode layer may be connected by separate connecting electrodes. This adhesive layer is an insulating material having adhesive properties and can serve to fix the light-emitting elements attached to the adhesive layer.

[0173] According to one or more embodiments, the structural configuration of the connecting electrodes (BE1, BE2) not only ensures robust electrical connectivity between the light-emitting element (LE) and the pixel electrode layer, but also contributes to thermal cycling and mechanical stability during operation. The use of a eutectic or bonding metal, such as an Au-Sn alloy, facilitates reliable bonding with low contact resistance. Additionally, optionally including an adhesive layer provides additional mechanical support and alignment precision, particularly in high-resolution display applications. This configuration improves the overall durability and performance of the display device, supporting efficient light emission and consistent electrical operation across the entire display panel.

[0174] The first organic layer (190) may be arranged to cover a portion of the side of a plurality of light-emitting elements (LE). The first organic layer (190) may also be referred to as a via layer. Additionally, the first organic layer (190) may be arranged to cover a pixel electrode layer. The upper surface of each of the plurality of light-emitting elements (LE) may be exposed and not covered by the first organic layer (190).

[0175] A passivation layer (PSV) (e.g., may refer to a first passivation layer (PSV1) (see FIG. 7)) may cover the light-emitting element (LE) and the first organic layer (190) entirely. The passivation layer (PSV) may also be referred to as a protective layer. The passivation layer (PSV) may protect components placed beneath the passivation layer (PSV). Additionally, the passivation layer (PSV) may not be placed on the upper surface of the light-emitting element (LE).

[0176] The passivation layer (PSV) may include an inorganic insulating layer including an inorganic material and / or an organic insulating layer including an organic material. The inorganic insulating layer may include, for example, at least one of metal oxides such as silicon oxide, silicon nitride, silicon oxynitride, and aluminum oxide. The organic insulating layer may include, for example, at least one of acrylic resin, epoxy resin, phenol resin, polyamide resin, polyimide resin, unsaturated polyester resin, polyphenylene ether resin, polyphenylene sulfide resin, and benzocyclobutene resin.

[0177] On the first passivation layer (PSV1) (e.g., passivation layer (PSV)), a light-blocking layer (BM), a first light-converting layer (QDL1), a second light-converting layer (QDL2), and a light-transmitting layer (TPL) may be disposed. The first light-converting layer (QDL1), the second light-converting layer (QDL2), and the light-transmitting layer (TPL) may be referred to as a light extraction structure.

[0178] A light-blocking layer (BM) may be disposed between the first light-converting layer (QDL1), the second light-converting layer (QDL2), and the light-transmitting layer (TPL). Accordingly, the light-blocking layer (BM) may surround the first light-converting layer (QDL1), the second light-converting layer (QDL2), and the light-transmitting layer (TPL). The light-blocking layer (BM) is configured to include a light-blocking material to prevent light mixing between adjacent subpixels. In the embodiments, the light-blocking layer (BM) may include an organic material. For example, the light-blocking layer (BM) may include an organic insulating material such as an acrylic resin, an epoxy resin, a phenol resin, a polyamide resin, or a polyimide resin.

[0179] The capping layer (CAP) can completely cover the light extraction structure and the passivation layer (PSV). The capping layer (CAP) can protect components beneath the capping layer (CAP), such as light-emitting elements (LE), from external moisture and humidity. The capping layer (CAP) may include at least one of a metal oxide such as silicon nitride, silicon oxide, silicon oxynitride, or aluminum oxide. However, the material of the capping layer (CAP) is not limited thereto. The capping layer (CAP) may also be omitted.

[0180] The top of the shading layer (BM) may be positioned lower than the top of the light extraction structure. The shading layer (BM) may not cover the side adjacent to the top surface of the light extraction structure.

[0181] If the light-blocking layer (BM) is formed higher than the light extraction structure, it may absorb some of the light emitted from the light-emitting element (LE), so the light extraction efficiency may decrease.

[0182] A reflective layer (RF) is interposed between a light-blocking layer (BM) and a light extraction structure. The reflective layer (RF) may surround at least one side of the light extraction structure. The reflective layer (RF) may comprise a material suitable for reflecting light. For example, in one embodiment, the reflective layer (RF) may surround at least a portion of the side surface of the light extraction structure.

[0183] The reflective layer (RF) may include at least one of aluminum (Al), silver (Ag), magnesium (Mg), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), titanium (Ti), and alloys of two or more materials selected therefrom. However, the embodiments are not limited thereto. The light extraction structure and the reflective layer (RF) may serve to improve the light emission efficiency of light generated in the light-emitting element (LE). More specifically, in one embodiment, the light extraction structure may include a negative photoresist material. Accordingly, the light extraction structure may be formed to have a side surface including an inversely tapered slope. The side surface of the light extraction structure may include an inversely tapered slope. For example, as shown in FIG. 7, the first light conversion layer (QDL1), which is the light extraction structure, may have a shape substantially identical (or similar) to a trapezoidal shape in cross-section, where the length of the upper side is greater than the length of the lower side. Light extraction structures may be placed overlappingly with corresponding light-emitting elements. The light extraction structures may surround at least a portion of the side adjacent to the upper surface of the light-emitting element. For example, a first light conversion layer (QDL1) may surround at least a portion of the side adjacent to the upper surface of the first light-emitting element (LE1). A second light conversion layer (QDL2) may surround at least a portion of the side adjacent to the upper surface of the second light-emitting element (LE2). A light transmission layer (TPL) may surround at least a portion of the side adjacent to the upper surface of the third light-emitting element (LE3).

[0184] In one embodiment, the upper edge of the light extraction structures may have a rounded shape. In this case, the side between the lower surface and the upper edge of the light extraction structure may be an inversely tapered slope.

[0185] Here, the reflective layer (RF) surrounding the side of the first light conversion layer (QDL1) may also have an inverse taper shape corresponding to the shape of the side of the first light conversion layer (QDL1). However, the top of the reflective layer (RF) may be positioned lower than the top of the first light conversion layer (QDL1). The top surface of the light extraction structures and the side adjacent to the top surface may not be covered by the reflective layer (RF). The top of the reflective layer (RF) may be positioned at the same height as or lower than the top of the light-blocking layer (BM).

[0186] The second passivation layer (PSV2) can cover the reflection layer (RF). Accordingly, the second passivation layer (PSV2) can surround the side of the first light conversion layer (QDL1) on the outside of the reflection layer (RF). The side shape of the second passivation layer (PSV2) can also have an inverse taper shape corresponding to the side shape of the first light conversion layer (QDL1).

[0187] The sides of the shading layer (BM) and the reflective layer (RF) may be aligned with each other.

[0188] Meanwhile, the first light conversion layer (QDL1) can convert a portion of the third light (light in the blue wavelength band) incident from the light-emitting element (LE) into the first light (light in the red wavelength band). The first light conversion layer (QDL1) may include a first base resin (BRS1) and a first wavelength conversion particle (WCP1). The first base resin (BRS1) may include a transparent organic material. The first wavelength conversion particle (WCP1) can convert a portion of the third light (light in the blue wavelength band) incident from the light-emitting element (LE) into the first light (light in the red wavelength band).

[0189] The second light conversion layer (QDL2) can convert a portion of the third light (light in the blue wavelength band) incident from the light-emitting element (LE) into second light (light in the green wavelength band). It may include a second base resin (BRS2) and a second wavelength conversion particle (WCP2). The second base resin (BRS2) may include a transparent organic material. The second wavelength conversion particle (WCP2) can convert a portion of the third light (light in the blue wavelength band) incident from the light-emitting element (LE) into second light (light in the green wavelength band).

[0190] The light-transmitting layer (TPL) may include a light-transmitting organic material.

[0191] For example, the first base resin (BRS1), the second base resin (BRS2), and the light-transmitting layer (TPL) may include epoxy resin, acrylic resin, cardo resin, or imide resin, etc. The first and second wavelength-converting particles (WCP1, WCP2) may be quantum dots (QD), quantum rods, fluorescent materials, or phosphorescent materials. In one embodiment, the first light-converting layer (QDL1), the second light-converting layer (QDL2), and the light-transmitting layer (TPL) may each additionally include scattering particles.

[0192] A second organic layer (210) can be placed on top of the light extraction structure and the light-blocking layer (BM).

[0193] The second organic layer (210) may be referred to as a planarization layer. The second organic layer (210) may include the same material as the first organic layer (190), but the embodiments are not limited thereto. The second organic layer (210), the high refractive index layer (HRL), and the multi-lens layer (MLL) may be referred to as an optical functional layer (LFL).

[0194] The second organic layer (210) may have a groove (210-h) in an area that overlaps with the light-blocking layer (BM) in the third direction (DR3). A high refractive index layer (HRL) may be formed in the groove (210-h) of the second organic layer (210). The high refractive index layer (HRL) may overlap with the light-blocking layer (BM) in the third direction (DR3) and may not overlap with the light-emitting element (LE). The high refractive index layer (HRL) may have a higher refractive index than that of the second organic layer (210). The high refractive index layer (HRL) may be formed as a connected pattern that surrounds the light-emitting element (LE) while being spaced apart from it. Additionally, the high refractive index layer (HRL) may have a square shape on its cross-section, but is not limited thereto, and may have a circular shape on its edge. The high refractive index layer (HRL) can change the path of light emitted from the light-emitting element (LE) so that light traveling in a lateral direction, rather than in an upward direction (third direction (DR3)), travels in an upward direction (third direction (DR3)).

[0195] A multi-lens layer (MLL) that overlaps with a light extraction structure can be disposed on the second organic layer (210).

[0196] The multi-lens layer (MLL) may include a first type lens (ML1) having a first curvature and a plurality of second type lenses (ML2) having a second curvature. The first type lens (ML1) and the plurality of second type lenses (ML2) may be provided convexly toward the front. The first curvature and the second curvature may be different. The first curvature may be smaller than the second curvature. That is, the first type lens (ML1) may be flatter than the second type lenses (ML2). The first type lens (ML1) may be circular, elliptical, or square, but is not limited thereto. The second type lenses may be circular, elliptical, or square. The shapes of the first type lens and the second type lenses may be identical to each other, but are not limited thereto. For example, the first type lens may be square and the second type lenses may be circular.

[0197] A first type lens (ML1) may be placed at the center of a multi-lens layer (MLL). The first type lens (ML1) may overlap with a light-emitting element (LE) in a third direction (DR3) and may not overlap with a light-blocking layer (BM). A plurality of second type lenses (ML2) may be placed around the first type lens (ML1). In a plane, a plurality of second type lenses (ML2) may be arranged to surround the first type lens (ML1). A plurality of second type lenses (ML2) may overlap with a portion of the light-blocking layer (BM) in a third direction (DR3) and may not overlap with a light-emitting element (LE).

[0198] The width (W1) of the first type lens (ML1) may be wider than the width (W2) of the second type lens (ML2). The height (h1) of the first type lens (ML1) may be equal to or lower than the height (h2) of the second type lens (ML2). The multi-lens layer (MLL) may be made of an organic material having a refractive index higher than that of the second organic layer (210) and equal to or lower than that of the high refractive index layer (HRL).

[0199] The first type lens (ML1) and the second type lens (ML2) can change the path of some of the light emitted from the light-emitting element (LE). The light emitted from the light-emitting element (LE) can pass through the light extraction structure, and some of the transmitted light can be incident on the multi-lens layer (MLL). The multi-lens layer (MLL) can collect the incident light and emit it outwards.

[0200] FIG. 9 is a cross-sectional view showing in detail an example of area A of FIG. 6 according to another embodiment.

[0201] FIG. 9 may differ from the embodiment of FIG. 7 in that the second organic layer (210) includes a second-1 organic layer (211) and a second-2 organic layer (212). In FIG. 9, descriptions that overlap with the embodiment described with reference to FIG. 7 are not repeated, and only the differences from the embodiment of FIG. 7 are described.

[0202] Referring to FIG. 9, a second-1 organic layer (211) is disposed on the light extraction structure and the light-blocking layer (BM), and a high-refractive index layer (HRL) and a second-2 organic layer (212) may be disposed on the light extraction structure and the second-1 organic layer (211). The second-1 organic layer (211) may serve to flatten the step difference between the light extraction structure and the light-blocking layer (BM). Additionally, a high-refractive index layer (HRL) is disposed on the second-1 organic layer (211) that overlaps with the light-blocking layer (BM) in the third direction (DR3), and the second-2 organic layer (212) may serve to flatten the step difference formed by the high-refractive index layer (HRL). The second-1 organic layer (211) and the second-2 organic layer (212) may include the same material as the first organic layer (190), but are not limited thereto.

[0203] FIG. 10 is a cross-sectional view showing in detail an example of area A of FIG. 6 according to another embodiment, and FIG. 11 is a plan view showing the relationship between the surrounding components of the multi-lens layer and the high-refractive index layer of FIG. 10.

[0204] Referring to FIGS. 10 and 11, the embodiment may differ from FIG. 7 in that multiple first-type lenses (ML1) are used. In FIGS. 10 and 11, descriptions that overlap with the embodiment described with reference to FIG. 7 are not repeated, and the description focuses on the differences from the embodiment of FIG. 7.

[0205] Referring to FIGS. 10 and 11, a first-type lens (ML1-1) and a first-type lens (ML1-2) may be arranged as a first-type lens (ML1).

[0206] The multi-lens layer (MLL) may include a first-1 type lens (ML1-1) and a first-2 type lens (ML1-2) having a first curvature, and a plurality of second type lenses (ML2-1, ML2-2) having a second curvature. The first-1 type lens (ML1-1), the first-2 type lens (ML1-2), and the plurality of second type lenses (ML2-1, ML2-2) may be provided convexly toward the front. The first curvature and the second curvature may be different. The first curvature may be smaller than the second curvature. That is, the first-1 type lens (ML1-1) and the first-2 type lens (ML1-2) may be flatter than the second type lens (ML1).

[0207] The first-1 type lens (ML1-1) and the first-2 type lens (ML1-2) may be placed at the center of the multi-lens layer (MLL). The first-1 type lens (ML1-1) and the first-2 type lens (ML1-2) may overlap with the light-emitting element (LE) in the third direction (DR3) and may not overlap with the light-blocking layer (BM). A plurality of second type lenses (ML2-1, ML2-2) may be placed around the first-1 type lens (ML1-1) and the first-2 type lens (ML1-2). In a plane, a plurality of second type lenses (ML2-1, ML2-2) may be arranged to surround the first-1 type lens (ML1-1) and the first-2 type lens (ML1-2). Multiple second type lenses (ML2-1, ML2-2) may overlap with a portion of the light-blocking layer (BM) in the third direction (DR3) and may not overlap with the light-emitting element (LE).

[0208] Type 1-1 lens (ML1-1) and Type 1-2 lens (ML1-2) may have the same width (W1). Type 2 lens (ML2-1, ML2-2) may have a width (W2) narrower than the width (W1). Type 1-1 lens (ML1-1) and Type 1-2 lens (ML1-2) may have the same height (h1). Type 2 lens (ML2) may have a height (h2) equal to or greater than the height (h1).

[0209] FIG. 12 is a cross-sectional view showing in detail an example of area A of FIG. 6 according to another embodiment, and FIG. 13 is a plan view showing the relationship between the multi-lens layer of FIG. 12 and surrounding components.

[0210] Referring to FIGS. 12 and 13, the embodiment may differ from FIG. 7 in that the high refractive index layer (HRL) is omitted. FIGS. 12 and 13 do not repeat descriptions that overlap with the embodiment described with reference to FIG. 7, but focus on the differences from FIG. 7.

[0211] Referring to FIGS. 12 and 13, a light functional layer (LFL) is disposed on top of a light extraction structure and a light-blocking layer (BM), and includes a second organic layer (210) and a multi-lens layer (MLL), and does not include a high refractive index layer (HRL).

[0212] The second organic layer (210) may also be referred to as a flattening layer. The second organic layer (210) may include the same material as the first organic layer (190), but the embodiments are not limited thereto.

[0213] A multi-lens layer (MLL) that overlaps with a light extraction structure can be disposed on the second organic layer (210).

[0214] The multi-lens layer (MLL) may include a first type lens (ML1) having a first curvature and a plurality of second type lenses (ML2) having a second curvature. The first type lens (ML1) and the plurality of second type lenses (ML2) may be provided convexly toward the front. The first curvature and the second curvature may be different. The first curvature may be smaller than the second curvature. That is, the first type lens (ML1) may be flatter than the second type lens (ML1).

[0215] Although not disclosed in the drawing, the multi-lens layer (MLL) may have a plurality of first type lenses (ML1).

[0216] FIG. 14 is a cross-sectional view showing in detail an example of area A of FIG. 6 according to another embodiment, and FIG. 15 is a plan view showing the relationship between the high-refractive index layer of FIG. 14 and surrounding components.

[0217] Referring to FIGS. 14 and 15, the embodiment may differ from FIG. 7 in that the multi-lens layer (MLL) is omitted. In FIGS. 14 and 15, descriptions that overlap with the embodiment described with reference to FIG. 7 are not repeated, and the explanation focuses on the differences from the embodiment of FIG. 7.

[0218] Referring to FIGS. 14 and 15, a light functional layer (LFL) is disposed on top of a light extraction structure and a light-blocking layer (BM), and includes a second organic layer (210) and a high refractive index layer (HRL), and does not include a multi-lens layer (MLL).

[0219] The second organic layer (210) may have a groove (210-h) in an area that overlaps with the light-blocking layer (BM) in the third direction (DR3). A high refractive index layer (HRL) may be formed in the groove (210-h) of the second organic layer (210). The high refractive index layer (HRL) may overlap with the light-blocking layer (BM) in the third direction (DR3) and may not overlap with the light-emitting element (LE). The high refractive index layer (HRL) may have a higher refractive index than that of the second organic layer (210).

[0220] The high refractive index layer (HRL) can be formed as a connected pattern that surrounds the light-emitting element (LE) while being spaced apart from it. Additionally, the high refractive index layer (HRL) may have a square shape on its cross-section, but is not limited thereto, and may have a circular shape on its edge. The high refractive index layer (HRL) can change the path of light emitted from the light-emitting element (LE) so that light traveling in a lateral direction, rather than in an upward direction (third direction (DR3)), travels in an upward direction (third direction (DR3)).

[0221] FIG. 16 is a layout diagram showing pixels of a display area according to one embodiment.

[0222] The embodiment of FIG. 16 differs from the embodiment of FIG. 5 in that the light-emitting element (LE) in each of the first subpixel (SPX1), the second subpixel (SPX2), and the third subpixel (SPX3) overlaps with the pixel electrodes (PXE1 / PXE2 / PXE3). In the embodiment of FIG. 16, descriptions that overlap with the embodiment of FIG. 5 are omitted.

[0223] Referring to FIG. 16, the first subpixel (SPX1) includes a first pixel electrode (PXE1), a plurality of light-emitting elements (LE), and a first light conversion layer (QDL1). The second subpixel (SPX2) includes a second pixel electrode (PXE2), a plurality of light-emitting elements (LE), and a second light conversion layer (QDL2). The third subpixel (SPX3) includes a third pixel electrode (PXE3), a plurality of light-emitting elements (LE), and a light-transmitting layer (or third light conversion layer) (TPL).

[0224] Each of the first pixel electrode (PXE1), the second pixel electrode (PXE2), and the third pixel electrode (PXE3) may have a rectangular planar shape having a short side in the first direction (DR1) and a long side in the second direction (DR2). The area of ​​the first subpixel (SPX1), the area of ​​the second subpixel (SPX2), and the area of ​​the third subpixel (SPX3) may be set according to the light conversion efficiency of the first light conversion layer (QDL1) and the light conversion efficiency of the second light conversion layer (QDL2). For example, the area of ​​the subpixel may be larger as the light conversion efficiency decreases.

[0225] For example, as shown in FIG. 16, if the light conversion efficiency of the second light conversion layer (QDL2) is lower than the light conversion efficiency of the first light conversion layer (QDL1), the area of ​​the second pixel electrode (PXE2) may be larger than the area of ​​the first pixel electrode (PXE1). Also, since the light transmission layer (TPL) transmits the light of the light-emitting element (LE) as is, whereas the first light conversion layer (QDL1) must convert the light, the area of ​​the first pixel electrode (PXE1) may be larger than the area of ​​the third pixel electrode (PXE3).

[0226] Each of the pixel electrodes (PXE1, PXE2, PXE3) can be electrically connected to at least one transistor through a pixel connection hole (CT1 / CT2 / CT3). For example, each of the pixel electrodes (PXE1, PXE2, PXE3) can be electrically connected to the second electrode of the fourth transistor (ST4 in FIG. 4) and the second electrode of the sixth transistor (ST6 in FIG. 4) of the corresponding subpixel.

[0227] A plurality of light-emitting elements (LEs) may be placed on each of the pixel electrodes (PXE1, PXE2, PXE3). An equal number of light-emitting elements (LEs) may be placed on each of the pixel electrodes (PXE1, PXE2, PXE3). For example, two light-emitting elements (LEs) may be placed on each of the pixel electrodes (PXE1, PXE2, PXE3).

[0228] The first light conversion layer (QDL1) can completely overlap with the plurality of light-emitting elements (LE) of the first pixel electrode (PXE1) and the first subpixel (SPX1). The area of ​​the first light conversion layer (QDL1) may be larger than the area of ​​the first pixel electrode (PXE1). The first light conversion layer (QDL1) can convert or shift the peak wavelength of incident light to light of another specific peak wavelength and emit it. For example, the first light conversion layer (QDL1) can convert or shift third light emitted from the plurality of light-emitting elements (LE) of the first subpixel (SPX1) into first light.

[0229] The second light conversion layer (QDL2) can completely overlap with the plurality of light-emitting elements (LE) of the second pixel electrode (PXE2) and the second subpixel (SPX2). The area of ​​the second light conversion layer (QDL2) may be larger than the area of ​​the second pixel electrode (PXE2). The second light conversion layer (QDL2) can convert or shift the peak wavelength of the incident light to light of another specific peak wavelength and emit it. For example, the second light conversion layer (QDL2) can convert or shift the third light emitted from the plurality of light-emitting elements (LE) of the second subpixel (SPX2) into the second light.

[0230] The light-transmitting layer (TPL) can completely overlap with the plurality of light-emitting elements (LE) of the third pixel electrode (PXE3) and the third subpixel (SPX3). The light-transmitting layer (TPL) can transmit incident light as is. For example, the light-transmitting layer (TPL) can transmit the third light emitted from the plurality of light-emitting elements (LE) of the third subpixel (SPX3) as is.

[0231] FIG. 17 is a cross-sectional view showing an example of a cross-section of a display panel corresponding to the line I1-I1' of FIG. 16. FIG. 18 is a cross-sectional view showing in detail an example of area A2 of FIG. 17.

[0232] The embodiments of FIG. 17 and FIG. 18 differ from the embodiment of FIG. 6 in that the light-emitting element (LE) is a vertical type micro LED in which each of the plurality of light-emitting elements (LE) extends in a third direction (DR3). A vertical type micro LED refers to an LED having a structure in which a first semiconductor layer (SEM1), an active layer (MQW), a second semiconductor layer (SEM2), and a third semiconductor layer (SEM3) are sequentially arranged in a third direction (DR3) which is a vertical direction.

[0233] In the embodiments of FIGS. 17 and 18, descriptions that overlap with the embodiments of FIGS. 6 and 7 are not repeated.

[0234] Referring to FIGS. 17 and 18, a pixel electrode layer may be disposed on the second planarized organic film (180). The pixel electrode layer may include a first pixel electrode (PXE1), a second pixel electrode (PXE2), and a third pixel electrode (PXE3).

[0235] Although not illustrated in the present specification, a reflective film may be disposed on the upper surface of the first pixel electrode (PXE1), the second pixel electrode (PXE2), and the third pixel electrode (PXE3).

[0236] The reflective film can reflect light traveling downward from the light-emitting element (LE) and emit it to the upper surface of the light-emitting element (LE). Therefore, since the loss of light from the light-emitting element (LE) can be reduced, the light efficiency of the light-emitting element (LE) can be increased.

[0237] A first pixel electrode (PXE1), a second pixel electrode (PXE2), and a third pixel electrode (PXE3) light-emitting element (LE) are arranged.

[0238] Each of the plurality of light-emitting elements (LE) may have a length in the first direction (DR1), a length in the second direction (DR2), and a length in the third direction (DR3), each ranging from several to several hundred μm. For example, each of the plurality of light-emitting elements (LE) may have a length in the first direction (DR1), a length in the second direction (DR2), and a length in the third direction (DR3), each ranging from approximately 100 μm or less.

[0239] The light-emitting element (LE) may include a conductive layer (E1), a first semiconductor layer (SEM1), an active layer (MQW), a second semiconductor layer (SEM2), a third semiconductor layer (SEM3), a contact electrode (CTE), and a protective film (INS). The light-emitting element (LE) may have the conductive layer (E1), the first semiconductor layer (SEM1), the active layer (MQW), the second semiconductor layer (SEM2), and the third semiconductor layer (SEM3) arranged sequentially in a third direction (DR3). Light extraction patterns (LEP) may be formed on the upper surface of the light-emitting element (LE). For example, light extraction patterns (LEP) may be formed on the upper surface of the light-emitting element (LE).

[0240] The protective film (INS) may be a film for protecting the bottom surface and sides of the light-emitting element (LE). For example, the protective film (INS) may be disposed on the bottom surface and sides of the conductive layer (E1), the sides of the first semiconductor layer (SEM1), the sides of the active layer (MQW), and the sides of the second semiconductor layer (SEM2).

[0241] The contact electrode (CTE) can be placed on the protective film (INS). The contact electrode (CTE) can be placed between the pixel electrodes (PXE1, PXE2, PXE3) and the protective film (INS). Each of the contact electrodes (CTE) can be connected to an exposed conductive layer (E1) that is not covered by the protective film (INS).

[0242] A connecting electrode (BE) may be further disposed between the contact electrode (CTE) and the pixel electrodes (PXE1, PXE2, PXE3).

[0243] The first organic layer (190) may be positioned to cover a portion of the side of a plurality of light-emitting elements (LE). A common electrode (CE) may be positioned on the upper surface of the first organic layer (190) and the light-emitting elements (LE). The common electrode (CE) may be electrically connected on the upper surface of the light-emitting elements (LE).

[0244] The first passivation layer (PSV1) can cover the common electrode (CE) entirely. On the first passivation layer (PSV1), a light-blocking layer (BM), a first light-converting layer (QDL1), a second light-converting layer (QDL2), and a light-transmitting layer (TPL) may be disposed.

[0245] A second organic layer (210) can be placed on top of the light extraction structure and the light-blocking layer (BM).

[0246] A high refractive index layer (HRL) may be disposed on the second organic layer (210) in a region overlapping with the light-blocking layer (BM) in the third direction (DR3). Additionally, a multi-lens layer (MLL) may be disposed on the second organic layer (210) overlapping with the light extraction structure.

[0247] FIGS. 19 and 20 are cross-sectional views showing an example of a cross-section of a display panel corresponding to the line I1-I1' of FIG. 16 according to another embodiment. FIGS. 19 and 20 are cross-sectional views showing in detail an example of the A2 area of ​​FIG. 17 according to one embodiment.

[0248] Referring to FIG. 19, it may differ from the embodiment of FIG. 18 in that the high refractive index layer (HRL) is omitted. In FIG. 19, descriptions that overlap with the embodiment described with reference to FIG. 17 and FIG. 18 are not repeated, and the description focuses on the differences from the embodiment of FIG. 17 and FIG. 18.

[0249] Referring to FIG. 19, a light functional layer (LFL) is placed on top of a light extraction structure and a light-blocking layer (BM), and includes a second organic layer (210) and a multi-lens layer (MLL), and does not include a high refractive index layer (HRL).

[0250] The second organic layer (210) may also be referred to as a flattening layer. The second organic layer (210) may include the same material as the first organic layer (190), but the embodiments are not limited thereto.

[0251] A multi-lens layer (MLL) that overlaps with a light extraction structure can be disposed on the second organic layer (210).

[0252] The multi-lens layer (MLL) may include a first type lens (ML1) having a first curvature and a plurality of second type lenses (ML2) having a second curvature. The first type lens (ML1) and the plurality of second type lenses (ML2) may be provided convexly toward the front. The first curvature and the second curvature may be different. The first curvature may be smaller than the second curvature. For example, the first type lens (ML1) may be flatter than the second type lens (ML1).

[0253] In one embodiment, the multi-lens layer (MLL) may have a plurality of first type lenses (ML1).

[0254] Referring to FIG. 20, it may differ from the embodiment of FIG. 17 in that the multi-lens layer (MLL) is omitted. In FIG. 20, descriptions that overlap with the embodiment described with reference to FIG. 17 and FIG. 18 are not repeated, and the description focuses on the differences from the embodiment of FIG. 17 and FIG. 18.

[0255] Referring to FIG. 20, a light functional layer (LFL) is placed on top of a light extraction structure and a light-blocking layer (BM), and includes a second organic layer (210) and a high refractive index layer (HRL), and does not include a multi-lens layer (MLL).

[0256] The second organic layer (210) may have a groove (210-h) in an area that overlaps with the light-blocking layer (BM) in the third direction (DR3). A high refractive index layer (HRL) may be formed in the groove (210-h) of the second organic layer (210). The high refractive index layer (HRL) may overlap with the light-blocking layer (BM) in the third direction (DR3) and may not overlap with the light-emitting element (LE). The high refractive index layer (HRL) may have a higher refractive index than that of the second organic layer (210).

[0257] The high refractive index layer (HRL) can be formed as a connected pattern that surrounds the light-emitting element (LE) while being spaced apart from it. Additionally, the high refractive index layer (HRL) may have a square shape on its cross-section, but is not limited thereto, and may have a circular shape on its edge. The high refractive index layer (HRL) can change the path of light emitted from the light-emitting element (LE) so that light traveling in a lateral direction, rather than in an upward direction (third direction (DR3)), travels in an upward direction (third direction (DR3)).

[0258] FIGS. 21 and FIGS. 22 are exemplary drawings showing a smart watch including a display device according to one embodiment.

[0259] Referring to FIGS. 21 and 22, a display device (10_1) according to one embodiment can be applied to a smart watch (1000_1), which is one of the smart devices.

[0260] The planar shape of the display device (10_1) may be square or circular, but is not limited thereto and can be varied in various ways, such as elliptical.

[0261] FIG. 23 is an exploded view of a smart watch including a display device according to one embodiment.

[0262] Referring to FIG. 23, the smart watch (1000_1) may include a main body unit (BP) and a wearable part (BD).

[0263] The main body unit (BP) may include a display panel (100) on which an image is displayed, a cover window (CW) placed on the display panel (100), a lower cover (BC) placed below the display panel (100), a middle frame (MF) placed between the cover window (CW) and the lower cover (BC), and a battery (BR) placed between the middle frame (MF) and the lower cover (BC). In addition, in addition to the battery (BR), a circuit board on which a main processor controlling the smart watch (1000_1), a communication chipset communicating with the outside via wired or wireless communication, and memory are mounted may be additionally placed between the middle frame (MF) and the lower cover (BC).

[0264] The main body unit (BP) may have a lower cover (BC), a battery (BR), a middle frame (MF), a display panel (100), and a cover window (CW) arranged sequentially.

[0265] A cover window (CW) is positioned on the upper part of a display panel (100) to protect the display panel (100) and to transmit light emitted from the display panel (100). As described above, the cover window (CW) may include a light-blocking portion to block a portion of the light emitted from the display panel (100). The cover window (CW) may be made of a transparent plastic material, a glass material, or a reinforced glass material.

[0266] A cover window (CW) may be positioned to overlap the display panel (100) and cover the front of the display panel (100). The cover window (CW) generally has a shape similar to the display panel (100) in planar form, but its size may be larger than that of the display panel (100). For example, the cover window (CW) may protrude outward from the display panel (100). The planar shape of the cover window (CW) may be the same as the planar shape of the main body unit (BP). For example, the planar shape of the cover window (CW) may generally be circular, but is not limited thereto and may have various shapes, such as a polygon (e.g., square) or an ellipse.

[0267] The middle frame (MF) is positioned between the cover window (CW) and the lower cover (BC) as a connecting member for joining the cover window (CW) and the lower cover (BC). For example, the middle frame (MF) may include a bracket.

[0268] The lower cover (BC) is a housing placed at the bottom of the display panel (100).

[0269] The lower cover (BC) may include a central cover portion (BCP) and a peripheral portion (BS) positioned around the central cover portion (BCP).

[0270] The central cover portion (BCP) is located in the center of the lower cover (BC) and can be generally flat.

[0271] The periphery (BS) may be positioned to surround the central cover portion (BCP). The periphery (BS) may be a bent portion formed by being folded from the central cover portion (BCP). The periphery (BS) may be folded from the edge of the central portion (CP). In some embodiments, the periphery (BS) may include a curved surface having a certain curvature in part, and a flat part in other parts. The degree (or angle) at which the periphery (BS) is folded from the central cover portion (BCP) may be obtuse, but is not limited thereto, and may be right or acute.

[0272] A storage space (BC-S) can be formed by the central cover portion (BCP) and the peripheral portion (BS). A battery (BR) can be placed in the storage space (BC-S).

[0273] The battery (BR) can be connected to a circuit board on which the main processor, etc. is mounted. The display device (10_1) is electrically connected to the circuit board and can receive digital video signals, timing signals, power, etc.

[0274] The lower cover (BC) is positioned on the outermost rear surface of the electronic device and comprises at least one material among plastic, metal, and glass, and may include a color coating layer. For example, the lower cover (BC) according to one example may be a flat glass having a transparent, translucent, or opaque color coating layer.

[0275] According to another example, the lower cover (BC) may include a glass material having the same shape as the cover window (CW) and a color coating layer. For example, according to another example, the lower cover (BC) may have a structure symmetrical to the cover window (CW) with the middle frame (MF) in between and may include a transparent, translucent, or opaque color coating layer.

[0276] The wearing part (BD) is a part for securing the main body unit (BP) to the user's wrist, etc., and may be, for example, any one of a strap, a chain, and a bracelet.

[0277] FIG. 24 is an exemplary drawing showing a virtual reality device including a display device according to one embodiment.

[0278] Referring to FIG. 24, a head-mounted display device (1000_2) according to one embodiment may include a display module that emits a display image and a reflector that reflects the emitted display screen to provide it to the user's eyes, thereby providing a virtual reality or augmented reality screen to the user.

[0279] FIG. 25 is an exemplary drawing showing a virtual reality device including a display device according to another embodiment. FIG. 25 shows a virtual reality device (1000_3) to which a display device (10_4) according to one embodiment is applied.

[0280] Referring to FIG. 25, a virtual reality device (1000_3) according to one embodiment may be a device in the form of glasses. A virtual reality device (1000_3) according to one embodiment may have a display device (10_4), a left eye lens (10a), a right eye lens (10b), a support frame (20), eyeglass frame legs (30a, 30b), a reflective member (40), and a display device housing (50).

[0281] FIG. 25 illustrates a virtual reality device (1000_3) that is an eyeglass-type display device including eyeglass frame temples (30a, 30b). That is, the virtual reality device (1000_3) according to one embodiment is not limited to that shown in FIG. 25 and can be applied in various forms in various other electronic devices.

[0282] The display device housing (50) may include a display device (10_4) and a reflective member (40). An image displayed on the display device (10_4) may be reflected from the reflective member (40) and provided to the user's right eye through the right eye lens (10b). As a result, the user can view the virtual reality image displayed on the display device (10_4) through their right eye.

[0283] In FIG. 25, the display device housing (50) is illustrated as being positioned at the right end of the support frame (20), but the embodiments of the present specification are not limited thereto. For example, the display device housing (50) may be positioned at the left end of the support frame (20), in which case the image displayed on the display device (10_4) may be reflected from the reflective member (40) and provided to the user's left eye through the left eye lens (10a). As a result, the user can view the virtual reality image displayed on the display device (10_4) through the left eye. Alternatively, the display device housing (50) may be positioned at both the left end and the right end of the support frame (20), in which case the user can view the virtual reality image displayed on the display device (10_4) through both the left eye and the right eye.

[0284] FIG. 26 is an exemplary drawing showing an automobile instrument panel and a center fascia including display devices according to one embodiment. FIG. 26 shows an automobile with display devices (10_a, 10_b, 10_c, 10_d, 10_e) according to one embodiment applied.

[0285] Referring to FIG. 26, display devices (10_a, 10_b, 10_c) according to one embodiment may be applied to an instrument panel of a vehicle, to a center fascia of a vehicle, or to a Center Information Display (CID) placed on the dashboard of a vehicle. Additionally, display devices (10_d, 10_e) according to one embodiment may be applied to a room mirror display that replaces a side mirror of a vehicle.

[0286] FIG. 27 is an exemplary drawing showing a transparent display device including a display device according to one embodiment.

[0287] Referring to FIG. 27, a display device (10_5) according to one embodiment can be applied to a transparent display device. The transparent display device can display an image (IM) and transmit light simultaneously. Therefore, a user located in front of the transparent display device can not only view the image (IM) displayed on the display device (10_5) but also see an object (RS) or background located on the back of the transparent display device. When the display device (10_5) is applied to a transparent display device, the substrate of the display device (10_5) may include a light-transmitting portion capable of transmitting light or be formed of a material capable of transmitting light.

[0288] Although embodiments of the present invention have been described above with reference to the attached drawings, those skilled in the art will understand that the present invention may be implemented in other specific forms without changing the technical concept or essential features thereof. Therefore, the embodiments described above should be understood as illustrative in all respects and not restrictive.

Claims

1. Substrate; A transistor layer disposed between substrates; A pixel electrode layer disposed on the transistor layer above; A plurality of light-emitting elements disposed on the pixel electrode layer above; A plurality of light extraction structures spaced apart from each other on the pixel electrode layer so as to overlap the plurality of emission elements; A light-blocking layer disposed between the plurality of light extraction structures above; A reflective layer interposed between the light extraction structures and the light-blocking layer, and surrounding at least a portion of the sides of the plurality of light extraction structures; An organic layer disposed on the above light extraction structure and light-blocking layer; A high-refractive index layer disposed overlapping with the light-blocking layer on the organic layer; and It includes a multi-lens that overlaps the high-refractive index layer and light extraction structures on the organic layer, The above multi-lens is a display device comprising one or more first-type lenses having a first curvature that overlaps with a corresponding light extraction structure among the plurality of light extraction structures, and a plurality of second-type lenses having a second curvature different from the first curvature that overlaps with the high-refractive index layer.

2. In claim 1, the display device wherein the second curvature is greater than the first curvature.

3. In Paragraph 1, The plurality of second-type lenses above is a display device surrounding one or more first-type lenses.

4. In Paragraph 3, A display device in which the first type lens is arranged to overlap with the light-emitting element, and the second type lens is arranged to overlap with the light-blocking layer.

5. In Paragraph 3, The width of the first type lens is wider than the width of the second type lens, and A display device in which the height of the first type lens is equal to or lower than the height of the second type lens.

6. A display device according to claim 1, wherein the first type lens and the second type lens each independently have a planar shape selected from a square, a circle, or an ellipse.

7. In Paragraph 1, A display device in which the refractive index of the above high-refractive layer is higher than the refractive index of the above organic layer.

8. In Paragraph 1, A display device in which the high-refractive index layer is arranged to surround the perimeter of the light-emitting element, but does not overlap with the light-emitting element.

9. In Paragraph 1, A display device in which the above organic layer has a groove on its upper surface, and the above high-refractive index layer is disposed in the groove.

10. In Paragraph 1, The above organic layer is, A first organic layer that flattens the light extraction structure and the light-blocking layer; and A display device comprising a second organic layer disposed on the upper surface of the above organic layer and flattening the high refractive index layer.

11. In Paragraph 1, Each of the above plurality of light-emitting elements is covered by a corresponding light extraction structure among the above plurality of light extraction structures, and A display device in which each side of the plurality of light extraction structures includes an inversely tapered inclined surface.

12. In Paragraph 1, A display device in which each of the plurality of light extraction structures surrounds at least a portion of the side adjacent to the upper surface of a corresponding light-emitting element among the plurality of light-emitting elements.

13. In Paragraph 1, Each of the above plurality of light extraction structures is a display device containing scattering particles.

14. In Paragraph 1, A display device having a rounded shape at the upper edge of each of the plurality of light extraction structures in cross-section.

15. In Paragraph 14, A display device in which the upper surface adjacent to the upper edge of each of the plurality of light extraction structures is not covered by the reflection layer.

16. In Paragraph 14, A display device in which the upper surface adjacent to the upper edge of each of the plurality of light extraction structures is not covered by the light-blocking layer.

17. In Paragraph 1, The above light-emitting element is, A conductive layer disposed on the lower surface of a first semiconductor layer; An active layer disposed on the first semiconductor layer; A second semiconductor layer disposed on the above active layer; A protective layer surrounding the conductive layer, the first semiconductor layer, the active layer, and the second semiconductor layer; A first contact electrode disposed on the protective layer and connected to the conductive layer exposed and not covered by the protective layer; and It further includes a second contact electrode disposed on the protective layer and disposed in a hole penetrating the conductive layer, the first semiconductor layer, and the active layer, and The pixel electrode layer comprises a pixel electrode connected to the first contact electrode and a common electrode connected to the second contact electrode, forming a display device.

18. In Paragraph 1, The above light-emitting element is, A conductive layer disposed on the lower surface of a first semiconductor layer; An active layer disposed on the first semiconductor layer; A second semiconductor layer disposed on the above active layer; A protective layer surrounding the conductive layer and the first semiconductor layer, the active layer, and the second semiconductor layer; and It further includes a contact electrode disposed on the protective layer and connected to the conductive layer exposed and not covered by the protective layer, The pixel electrode layer includes a pixel electrode connected to the first contact electrode, and The above display device is a display device further comprising a common electrode disposed on the light-emitting element.

19. As an electronic device, Display panel; A window placed on the above-mentioned display panel; and It includes a lower cover positioned at the bottom of the above-mentioned display panel, and The above display panel is, Substrate; A transistor layer disposed between substrates; A pixel electrode layer disposed on the transistor layer above; A plurality of light-emitting elements disposed on the pixel electrode layer above; A plurality of light extraction structures spaced apart from each other on the pixel electrode layer so as to overlap the plurality of emission elements; A light-blocking layer disposed between the plurality of light extraction structures above; A reflective layer interposed between the light extraction structures and the light-blocking layer, and surrounding at least a portion of the sides of the plurality of light extraction structures; An organic layer disposed on the above light extraction structure and light-blocking layer; A high-refractive index layer disposed overlapping with the light-blocking layer on the organic layer; and It includes a multi-lens that overlaps the high-refractive index layer and light extraction structures on the organic layer, The electronic device comprises a multi-lens having one or more first-type lenses that overlap with a corresponding light extraction structure among the plurality of light extraction structures and have a first curvature, and a plurality of second-type lenses that overlap with the high-refractive index layer and have a second curvature different from the first curvature.

20. In Paragraph 19, A battery disposed in the space of the lower cover and supplying power to the display device; and An electronic device further comprising a middle frame disposed between the above window and the above lower cover.

Images