Display device, method for manufacturing display device, and electronic device

Abstract

Provided are a display device, a method for manufacturing a display device, and an electronic device. According to one embodiment, the display device may comprise: a thin film transistor layer, a planarization layer, and a pixel electrode layer disposed on a substrate; a plurality of light-emitting elements including a first light-emitting element and a second light-emitting element on the pixel electrode layer; and an organic partition wall part disposed between the first light-emitting element and the second light-emitting element on the planarization layer, and including a first inclined part and a second inclined part, wherein the organic partition wall part has a first angle formed by an outer surface of the first inclined part and a second angle formed by an outer surface of the second inclined part, the first angle is 120 degrees or more, and the second angle is greater than the first angle by 5 degrees or more and is 135 degrees or less.

Description

Display device, method of manufacturing a display device, and electronic device

[0001] The present invention relates to a display device, a method for manufacturing a display device, and an electronic device.

[0002] As the information society develops, the demand for display devices to display images is increasing in various forms. Display devices may be flat panel displays such as Liquid Crystal Displays, Field Emission Displays, and Light Emitting Displays.

[0003] The light-emitting display device may include an organic light-emitting display device comprising an organic light-emitting diode element as a light-emitting element, and a micro light-emitting display device comprising a micro light-emitting diode element (hereinafter referred to as a micro light-emitting element) as a light-emitting element. Since the micro light-emitting diode element is made of inorganic material, it has the advantage of having a long lifespan with fewer degradation issues compared to organic light-emitting diode elements.

[0004] The problem that the present invention aims to solve is to provide a display device capable of increasing light emission efficiency, a method for manufacturing the same, and an electronic device.

[0005] The problems of the present invention are not limited to the technical problems mentioned above, and other unmentioned technical problems will be clearly understood by those skilled in the art from the description below.

[0006] A display device according to an embodiment for solving the above problem comprises a substrate, a thin film transistor layer disposed on the substrate, a planarization layer disposed on the thin film transistor layer, a pixel electrode layer disposed on the planarization layer, a plurality of light-emitting elements including a first light-emitting element and a second light-emitting element disposed along a first direction on the pixel electrode layer, and an organic barrier portion disposed on the planarization layer between the first light-emitting element and the second light-emitting element, the barrier portion including a first inclined portion formed toward the first light-emitting element and a second inclined portion formed toward the second light-emitting element, wherein the first light-emitting element comprises a first semiconductor layer, a first active layer emitting light of a first wavelength, and a second semiconductor layer, and the second light-emitting element comprises a first semiconductor layer, a second active layer emitting light of a second wavelength different from the first wavelength, and a second semiconductor layer, and the organic barrier portion at the point where the first virtual surface parallel to the boundary surface between the second semiconductor layer and the first active layer of the first light-emitting element intersects the first inclined portion A first angle formed by an outer surface; and a second angle formed by the outer surface of a second slanted portion and a second virtual surface parallel to the boundary surface between the second semiconductor layer and the second active layer of the second light-emitting element at the point where the second virtual surface and the second slanted portion intersect, wherein the first angle is 120 degrees or more, and the second angle is 5 degrees or more greater than the first angle and may be 135 degrees or less.

[0007] The organic partition includes a first-2 inclined portion disposed on the first inclined portion, and the second semiconductor layer of the first light-emitting element includes a lower surface facing the first active layer and an upper surface facing the lower surface, and the organic partition has a first-2 angle formed by the first-2 imaginary surface and the outer surface of the first-2 inclined portion at the point where the first-2 imaginary surface parallel to the upper surface and the second inclined portion intersect, the first-2 angle is smaller than the first angle, and the average of the first angle and the first-2 angle may be 120 degrees or more.

[0008] The above display device further includes a reflective film disposed on the organic partition portion, wherein the reflective film includes a first reflective film disposed on the outer surface of the first inclined portion and a second reflective film disposed on the outer surface of the second inclined portion, and the reflective film has a third angle formed by the outer surface of the first reflective film and the first imaginary surface and a fourth angle formed by the outer surface of the second reflective film and the first imaginary surface, wherein the third angle is 120 degrees or more, and the fourth angle is 5 degrees or more greater than the first angle and may be 135 degrees or less.

[0009] The above display device may further include a first protective film disposed between the organic partition and the reflective film, and a second protective film disposed outside the reflective film.

[0010] The inflection points of the first reflective film and the second reflective film may be located higher than the upper part of the active layer.

[0011] The above organic partition has a second-2 angle formed by the second-2 imaginary plane parallel to the upper surface and the outer surface of the second-2 inclined portion at the point where the second-2 imaginary plane and the second inclined portion intersect, and the second-2 angle is smaller than the second angle, and the average of the second angle and the second-2 angle may be 120 degrees or more.

[0012] The lower portion of the above reflective film may be positioned lower than the lower portion of the above light-emitting element.

[0013] The above organic barrier can surround the light-emitting element.

[0014] The shortest distance between the reflective film and the light-emitting element may be smaller than the width of the light-emitting element.

[0015] The top of the above reflective film may be located at a height of 80% or more and 120% or less of the height of the above light-emitting element.

[0016] Each of the plurality of light-emitting elements further includes a protective film disposed on the side of the first semiconductor layer, the active layer, and the second semiconductor layer, and each of the plurality of light-emitting elements may not have a reflective film disposed on the side of the first semiconductor layer, the active layer, and the second semiconductor layer on the protective film.

[0017] The above display device further includes a common electrode on top of the plurality of light-emitting elements, the pixel electrode layer includes the pixel electrode, and each of the plurality of light-emitting elements may be disposed on the pixel electrode.

[0018] The pixel electrode layer comprises a pixel electrode and a common electrode, the pixel electrode and the common electrode are spaced apart from each other, and each of the plurality of light-emitting elements can be disposed on the pixel electrode and the common electrode.

[0019] Each of the plurality of light-emitting elements may include a first contact electrode disposed on the pixel electrode and a second contact electrode disposed on the common electrode.

[0020] A method for manufacturing a display device according to another embodiment comprises the steps of: forming a plurality of pixel electrodes on a planarization layer of a circuit board; forming an organic barrier portion disposed between a first pixel electrode and a second pixel electrode on the circuit board; forming a reflective film disposed on the organic barrier portion; and disposing of a first light-emitting element on the first pixel electrode and disposing of a second light-emitting element on the second pixel electrode, wherein the first light-emitting element comprises a first semiconductor layer, a first active layer emitting light of a first wavelength, and a second semiconductor layer, and the second light-emitting element comprises a first semiconductor layer, a second active layer emitting light of a second wavelength different from the first wavelength, and a second semiconductor layer, and the organic barrier portion comprises a first angle formed by the outer surface of the first virtual plane and the first inclined portion at the point where the first virtual plane parallel to the boundary surface between the second semiconductor layer and the first active layer of the first light-emitting element intersects the first inclined portion; and at the point where the second virtual plane parallel to the interface between the second semiconductor layer and the second active layer of the second light-emitting element intersects the second inclined portion, the second virtual plane and the outer surface of the second inclined portion form a second angle, the first angle is 120 degrees or more, and the second angle is 5 degrees or more greater than the first angle and may be 135 degrees or less.

[0021] The step of forming the above organic barrier portion comprises forming a first organic layer on the circuit board and forming a second organic layer disposed on the first organic layer, wherein the second organic layer has a first-2 angle formed by the first-2 imaginary plane parallel to the upper surface and the outer surface of the first-2 inclined portion at the point where the second inclined portion intersects the first-2 imaginary plane and the second inclined portion, the first-2 angle is smaller than the first angle, and the average of the first angle and the first-2 angle may be 120 degrees or more.

[0022] The step of forming the above reflective film may involve forming a first protective material layer covering the first organic layer and the second organic layer on the front surface of the circuit board, forming a reflective film on the protective material layer that overlaps with the multilayer organic layer, forming a second protective material layer on the front surface of the circuit board to cover the reflective film, and then forming a first protective film and a second protective film that expose a pixel electrode by patterning a portion of the first protective material layer and the second protective material layer.

[0023] An electronic device according to another embodiment for solving the above problem comprises: a display panel; and a window disposed on the display panel; The display panel includes a lower cover disposed below the display panel, wherein the display panel comprises a substrate, a thin-film transistor layer disposed on the substrate, a planarization layer disposed on the thin-film transistor layer, a pixel electrode layer disposed on the planarization layer, a plurality of light-emitting elements including a first light-emitting element and a second light-emitting element disposed along a first direction on the pixel electrode layer, and an organic barrier disposed between the first light-emitting element and the second light-emitting element on the planarization layer, comprising a first inclined portion formed toward the first light-emitting element and a second inclined portion formed toward the second light-emitting element, wherein the first light-emitting element comprises a first semiconductor layer, a first active layer emitting light of a first wavelength, and a second semiconductor layer, and the second light-emitting element comprises a first semiconductor layer, a second active layer emitting light of a second wavelength different from the first wavelength, and a second semiconductor layer, and the organic barrier comprises a first virtual plane parallel to the boundary surface between the second semiconductor layer and the first active layer of the first light-emitting element and the first inclined portion at the point where the first virtual A first angle formed by a surface and the outer surface of the first inclined portion; and a second angle formed by a second virtual surface and the outer surface of the second inclined portion at the point where the second virtual surface parallel to the boundary surface between the second semiconductor layer and the second active layer of the second light-emitting element intersects the second inclined portion, wherein the first angle is 120 degrees or more, and the second angle is 5 degrees or more greater than the first angle and may be 135 degrees or less.

[0024] The above display device includes a display area and a non-display area, the display area includes a first display area and a second display area, the first display area includes a first-1 light-emitting element and a first organic barrier surrounding the first-1 light-emitting element, the second display area includes a second-1 light-emitting element and a second organic barrier surrounding the second-1 light-emitting element, and the first-11 angle formed by the first-11 virtual plane parallel to the boundary surface between the second semiconductor layer and the first active layer of the first-11 light-emitting element of the first organic barrier and the first inclined portion at the point where the first inclined portion intersects the first-11 virtual plane and the first inclined portion may be greater than the second-11 angle formed by the second virtual plane parallel to the boundary surface between the second semiconductor layer and the second active layer of the second-11 light-emitting element of the second organic barrier and the second inclined portion at the point where the second inclined portion intersects the second-11 virtual plane parallel to the boundary surface between the second semiconductor layer and the second active layer of the second-11 light-emitting element of the second organic barrier.

[0025] The second display area can be placed on a plane at the outer edge of the first display area.

[0026] The electronic device may further include a middle frame disposed between the battery window that supplies power to the display device and the lower cover, which is disposed in the space of the lower cover.

[0027] Specific details of other embodiments are included in the detailed description and drawings.

[0028] According to the display device and the method of manufacturing the same according to the embodiments, the light emission efficiency of the light-emitting element can be increased.

[0029] The effects according to the embodiments are not limited to those exemplified above, and a wider variety of effects are included in this specification.

[0030] FIG. 1 is a perspective view showing a display device according to one embodiment.

[0031] FIG. 2 is a layout diagram showing a display device according to one embodiment.

[0032] FIG. 3 is a block diagram showing a display device according to one embodiment.

[0033] FIG. 4 is an equivalent circuit diagram showing a subpixel according to one embodiment.

[0034] FIG. 5 is a layout diagram showing pixels of a display area according to one embodiment.

[0035] FIG. 6 is a cross-sectional view showing an example of a cross-section of a display panel taken along the line I1-I1' of FIG. 5.

[0036] Figure 7 is a cross-sectional view showing in detail an example of area A of Figure 6.

[0037] Figure 8 is a cross-sectional view showing another example of area A of Figure 6 in detail.

[0038] Figure 9 is an enlarged view of a part of Figure 8.

[0039] FIG. 10 is a cross-sectional view showing in detail an example of area A of FIG. 6 according to one embodiment.

[0040] FIG. 11 is a cross-sectional view showing another example of area A of FIG. 6 in detail.

[0041] FIG. 12 is a cross-sectional view showing an example of a cross-section of a display panel taken along the line I-I' of FIG. 5 according to another embodiment.

[0042] FIG. 13 is a layout diagram showing pixels of a display area according to another embodiment.

[0043] FIG. 14a is a cross-sectional view showing an example of an organic partition taken along the X1-X1', X2-X2', X3-X3' and X4-X4' lines of FIG. 12, and FIG. 14b is a cross-sectional view showing an example of an organic partition corresponding to the Y1-Y1' line of FIG. 13 according to another embodiment.

[0044] FIG. 15 is a layout diagram showing pixels of a display area according to one embodiment.

[0045] FIG. 16 is a cross-sectional view showing an example of a cross-section of a display panel taken along the line I2-I2' of FIG. 15.

[0046] FIG. 17 is a cross-sectional view showing in detail an example of region B of FIG. 16.

[0047] FIG. 18 is a cross-sectional view showing another example of region B of FIG. 16 in detail.

[0048] FIG. 19 is a cross-sectional view showing another example of region B of FIG. 16 in detail.

[0049] Figure 20 is a graph showing LEE and luminance according to the angle of the organic partition.

[0050] Figure 21 is a graph showing the light emission profile according to the angle of the organic partition.

[0051] FIG. 22 is a flowchart showing a method for manufacturing a display device according to one embodiment.

[0052] FIGS. 23 to 28 are drawings for explaining a method of manufacturing a display device according to one embodiment.

[0053] FIG. 29 is a plan view of a display panel according to another embodiment.

[0054] Figure 30 is a graph showing the simulation results of light emission from a light-emitting device depending on the presence or absence of an organic barrier.

[0055] FIGS. 31 and 32 are drawings for explaining the criteria for measuring the angle of the outer surface of an organic partition according to one embodiment.

[0056] FIGS. 33 and FIGS. 34 are exemplary drawings showing a smart watch including a display device according to one embodiment.

[0057] FIG. 35 is an exploded view of a smart watch including a display device according to one embodiment.

[0058] FIGS. 36 and FIGS. 37 are exemplary drawings showing a virtual reality device including a display device according to one embodiment.

[0059] FIG. 38 is a drawing showing a virtual reality device including a display device according to another embodiment.

[0060] FIG. 39 is a drawing showing an automobile instrument panel and center fascia including display devices according to one embodiment.

[0061] FIG. 40 is a drawing showing a transparent display device including a display device according to one embodiment.

[0062] The advantages and features of the present invention and the methods for achieving them will become clear by referring to the embodiments described below in detail together with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below but may be implemented in various different forms. These embodiments are provided merely to ensure that the disclosure of the present invention is complete and to fully inform those skilled in the art of the scope of the invention, and the present invention is defined only by the scope of the claims.

[0063] When elements or layers are referred to as being "on" another element or layer, this includes cases where another layer or element is interposed directly on or in the middle of another element. Throughout the specification, the same reference numerals refer to the same components. Shapes, sizes, ratios, angles, numbers, etc., disclosed in the drawings for describing embodiments are exemplary and therefore the invention is not limited to the depicted details.

[0064] The features of each of the various embodiments of the present invention may be combined or combined with one another, either partially or wholly, and may technically enable various interlocking and operation. Each embodiment may be implemented independently of one another or may be implemented together in an associated relationship.

[0065] Specific embodiments will be described below with reference to the attached drawings.

[0066] FIG. 1 is a perspective view showing a display device according to one embodiment.

[0067] Referring to FIG. 1, the display device (10) is a device for displaying video or still images and can be used as a display screen for various products such as televisions, laptops, monitors, billboards, and the Internet of Things (IOT), as well as portable electronic devices such as mobile phones, smartphones, tablet PCs, smart watches, watch phones, mobile communication terminals, electronic notebooks, electronic books, PMPs (portable multimedia players), navigation systems, and UMPCs (Ultra Mobile PCs).

[0068] The display device (10) may be a light-emitting display device such as an organic light-emitting display device using an organic light-emitting diode, a quantum dot light-emitting display device including a quantum dot light-emitting layer, an inorganic light-emitting display device including an inorganic semiconductor, and a micro light-emitting display device using a micro or nano light-emitting diode (micro LED or nano LED). Hereinafter, the display device (10) has been described with a focus on being a micro light-emitting display device, but the present invention is not limited thereto. Meanwhile, for convenience of explanation, a micro light-emitting diode has been described as a light-emitting element below.

[0069] The display device (10) includes a display panel (100), a display driving circuit (250), a circuit board (300), and a power supply circuit (500).

[0070] The display panel (100) may be formed as a rectangular plane having a short side in a first direction (DR1) and a long side in a second direction (DR2) that intersects the first direction (DR1). The corner where the short side in the first direction (DR1) and the long side in the second direction (DR2) meet may be formed rounded to have a predetermined curvature or formed at a right angle. The plane shape of the display panel (100) is not limited to a rectangle and may be formed as other polygons, circles, or ellipses. The display panel (100) may be formed flat, but is not limited thereto. For example, the display panel (100) may include curved surfaces formed at the left and right ends that have a constant curvature or a changing curvature. In addition, the display panel (100) may be formed flexibly so that it can be bent, curved, folded, or rolled.

[0071] The display panel (100) may include a main area (MA) and a sub-area (SBA).

[0072] The main area (MA) may include a display area (DA) that displays an image and a non-display area (NDA) which is a surrounding area of ​​the display area (DA). The display area (DA) may include a plurality of pixels that display an image. Each of the pixels may include a plurality of subpixels. For example, each of the pixels may include a first subpixel that emits a first light, a second subpixel that emits a second light, and a third subpixel that emits a third light, but the embodiments of the present specification are not limited thereto.

[0073] A sub-region (SBA) may protrude in a second direction (DR2) from one side of a main region (MA). Although FIG. 1 illustrates a sub-region (SBA) unfolded, the sub-region (SBA) may be bent, in which case it may be placed on the lower surface of the display panel (100). When the sub-region (SBA) is bent, it may overlap with the main region (MA) in a third direction (DR3), which is the thickness direction of the display panel (100). A display driving circuit (250) may be placed in the sub-region (SBA).

[0074] The display driving circuit (250) can generate signals and voltages to drive the display panel (100). The display driving circuit (250) may be formed as an integrated circuit (IC) and attached to the display panel (100) using a COG (chip on glass) method, a COP (chip on plastic) method, or an ultrasonic bonding method, but is not limited thereto. For example, the display driving circuit (250) may be attached to the circuit board (300) using a COF (chip on film) method.

[0075] A circuit board (300) can be attached to one end of a sub-region (SBA) of a display panel (100). As a result, the circuit board (300) can be electrically connected to the display panel (100) and the display driving circuit (250). The display panel (100) and the display driving circuit (250) can receive digital video data, timing signals, and driving voltages through the circuit board (300). The circuit board (300) may be a flexible printed circuit board, a printed circuit board, or a flexible film such as a chip-on-film.

[0076] The power supply circuit (500) can generate multiple panel driving voltages according to the power supply voltage from an external source. The power supply circuit (500) can be formed as an integrated circuit (IC) and attached to the circuit board (300) in a COF manner.

[0077] FIG. 2 is a layout diagram showing a display device according to one embodiment. FIG. 2 illustrates a sub-region (SBA) that is unfolded without being bent.

[0078] Referring to FIG. 2, the display panel (100) may include a main area (MA) and a sub area (SBA).

[0079] The main area (MA) may include a display area (DA) for displaying an image and a non-display area (NDA) which is the surrounding area of ​​the display area (DA). The display area (DA) may occupy most of the main area (MA). The display area (DA) may be positioned in the center of the main area (MA).

[0080] A display area (DA) includes a plurality of pixels (PX) for displaying an image, and each of the plurality of pixels (PX) may include a plurality of subpixels (SPX). A pixel (PX) may be defined as a minimum unit of subpixel group capable of expressing a white gradation.

[0081] The non-display area (NDA) may be positioned adjacent to the display area (DA). The non-display area (NDA) may be an outer area of ​​the display area (DA). The non-display area (NDA) may be positioned to surround the display area (DA). The non-display area (NDA) may be an edge area of ​​the display panel (100).

[0082] The first scan driver (SDC1) and the second scan driver (SDC2) may be placed in a non-display area (NDA). The first scan driver (SDC1) may be placed on one side (e.g., the left side) of the display panel (100), and the second scan driver (SDC2) may be placed on the other side (e.g., the right side) of the display panel, but is not limited thereto. Each of the first scan driver (SDC1) and the second scan driver (SDC2) may be electrically connected to the display driving circuit (250) through scan fan-out lines. Each of the first scan driver (SDC1) and the second scan driver (SDC2) may receive a scan control signal from the display driving circuit (250), generate scan signals according to the scan control signal, and output them to the scan lines.

[0083] A sub-region (SBA) may protrude in a second direction (DR2) from one side of a main region (MA). The length of the second direction (DR2) of the sub-region (SBA) may be shorter than the length of the second direction (DR2) of the main region (MA). The length of the first direction (DR1) of the sub-region (SBA) may be shorter than the length of the first direction (DR1) of the main region (MA) or substantially equal to the length of the first direction (DR1) of the main region (MA). The sub-region (SBA) may be bent and may be positioned at the bottom of the display panel (100). In this case, the sub-region (SBA) may overlap with the main region (MA) in a third direction (DR3).

[0084] The sub-region (SBA) may include a connection region (CA), a pad region (PA), and a bending region (BA).

[0085] The connection area (CA) is an area protruding in a second direction (DR2) from one side of the main area (MA). One side of the connection area (CA) is in contact with the non-display area (NDA) of the main area (MA), and the other side of the connection area (CA) may be in contact with the bending area (BA).

[0086] The pad area (PA) is an area where pads (PDs) and a display driving circuit (250) are placed. The display driving circuit (250) can be attached to the driving pads of the pad area (PA) using a conductive adhesive material such as an anisotropic conductive film. The circuit board (300) can be attached to the pads (PDs) of the pad area (PA) using a conductive adhesive material such as an anisotropic conductive film. One side of the pad area (PA) may be in contact with the bending area (BA).

[0087] The bending area (BA) is a bending area. When the bending area (BA) is bent, the pad area (PA) may be positioned below the connecting area (CA) and below the main area (MA). The bending area (BA) may be positioned between the connecting area (CA) and the pad area (PA). One side of the bending area (BA) is in contact with the connecting area (CA), and the other side of the bending area (BA) may be in contact with the pad area (PA).

[0088] FIG. 3 is a block diagram showing a display device according to one embodiment.

[0089] Referring to FIG. 3, the display area (DA) includes a plurality of pixels (PX), a plurality of scan lines (SL), a plurality of light emission control lines (EL), and a plurality of data lines (DL).

[0090] Multiple pixels (PX) may be arranged in a matrix form in a first direction (DR1) and a second direction (DR2). Multiple scan lines (SL) and multiple light emission control lines (EL) may extend in the first direction (DR1) and be arranged in the second direction (DR2). Multiple data lines (DL) may extend in the second direction (DR2) and be arranged in the first direction (DR1). Multiple scan lines (SL) include multiple write scan lines (GWL), multiple control scan lines (GCL), multiple initialization scan lines (GIL), and multiple bias scan lines (GBL).

[0091] Each of the plurality of subpixels (SPX) can be connected to one of the plurality of write scan lines (GWL), one of the plurality of control scan lines (GCL), one of the plurality of initialization scan lines (GIL), one of the plurality of bias scan lines (GBL), one of the plurality of light emission control lines (EL), and one of the plurality of data lines (DL). Each of the plurality of subpixels (SPX) receives a data voltage of the data line (DL) according to the write scan signal of the write scan line (GWL), and can emit light from the light-emitting element according to the data voltage.

[0092] The non-display area (NDA) includes a first scan drive unit (SDC1), a second scan drive unit (SDC2), and a display drive circuit (250).

[0093] Each of the first scan drive unit (SDC1) and the second scan drive unit (SDC2) may include a write scan signal output unit (611), an initial scan signal output unit (612), a bias scan signal output unit (613), and a light emission control signal output unit (614). Each of the write scan signal output unit (611), the initial scan signal output unit (612), the bias scan signal output unit (613), and the light emission control signal output unit (614) may receive a scan timing control signal (SCS) from the timing control circuit (251).

[0094] The write scan signal output unit (611) can generate write scan signals according to the scan timing control signal (SCS) of the timing control circuit (251) and output them sequentially to the write scan lines (GWL).

[0095] The initialization scan signal output unit (612) can generate initialization scan signals according to the scan timing control signal (SCS) and output them sequentially to the initialization scan lines (GIL).

[0096] The bias scan signal output unit (613) can generate bias scan signals according to the scan timing control signal (SCS) and output them sequentially to the bias scan lines (GBL). The light emission control signal output unit (614) can generate light emission control signals according to the scan timing control signal (SCS) and output them sequentially to the light emission control lines (EL).

[0097] The display driving circuit (250) includes a timing control circuit (251) and a data driving circuit (252).

[0098] The data driving circuit (252) can receive digital video data (DATA) and a data timing control signal (DCS) from the timing control circuit (251). The data driving circuit (252) converts the digital video data (DATA) into analog data voltages according to the data timing control signal (DCS) and outputs them to the data lines (DL). In this case, subpixels (SPX) are selected by the write scan signals of the first scan driving unit (SDC1) and the second scan driving unit (SDC2), and data voltages can be supplied to the selected subpixels (SPX).

[0099] The timing control circuit (251) can receive digital video data (DATA) and timing signals from an external source. The timing control circuit (251) can generate a scan timing control signal (SCS) and a data timing control signal (DCS) to control the display panel (100) according to the timing signals. The timing control circuit (400) can output the scan timing control signal (SCS) to the first scan driving unit (SDC1) and the second scan driving unit (SDC2). The timing control circuit (251) can output the digital video data (DATA) and the data timing control signal (DCS) to the data driving circuit (252).

[0100] The power supply circuit (500) can generate a plurality of panel driving voltages according to the power voltage supplied from the outside. For example, the power supply circuit (500) can generate a first power voltage (VDD), a second power voltage (VSS), a third power voltage (VINT), and a fourth power voltage (VAINT) and supply them to the display panel (100).

[0101] FIG. 4 is an equivalent circuit diagram showing a subpixel according to one embodiment.

[0102] Referring to FIG. 4, a subpixel (SPX) according to one embodiment may be connected to scan lines (GWL, GIL, GBL), a light emission control line (EL), and a data line (DL). For example, the subpixel (SPX) may be connected to a write scan line (GWL), an initialization scan line (GIL), a bias scan line (GBL), a light emission control line (EL), and a data line (DL).

[0103] A subpixel (SPX) according to one embodiment includes a driving transistor (DT), switching elements, a capacitor (C1), and a light-emitting element (LE). The switching elements include first to sixth transistors (ST1, ST2, ST3, ST4, ST5, ST6).

[0104] The driving transistor (DT) includes a gate electrode, a first electrode, and a second electrode. The driving transistor (DT) controls the drain-source current (Ids, hereinafter referred to as "driving current") flowing between the first electrode and the second electrode according to the data voltage applied to the gate electrode.

[0105] The light-emitting element (LE) may be a micro light-emitting diode. The light-emitting element (LE) emits light according to the driving current (Ids). The amount of light emitted by the light-emitting element (LE) may be proportional to the driving current (Ids). The anode electrode of the light-emitting element (LE) is connected to the first electrode of the fourth transistor (ST4) and the second electrode of the sixth transistor (ST6), and the cathode electrode may be connected to a second power line (VSL) to which a second power supply voltage is applied.

[0106] A capacitor (C1) is formed between the gate electrode of a driving transistor (DT) and a first power line (VDL) to which a first power supply voltage is applied. The first power supply voltage may be a voltage level higher than the second power supply voltage. One electrode of the capacitor (C1) may be connected to the gate electrode of the driving transistor (DT), and the other electrode may be connected to the first power line (VDL).

[0107] As shown in FIG. 4, the first to sixth transistors (ST1, ST2, ST3, ST4, ST5, ST6) and the driving transistor (DT) can all be formed as p-type MOSFETs. In this case, the active layer of each of the first to sixth transistors (ST1, ST2, ST3, ST4, ST5, ST6) and the driving transistor (DT) can be formed of polysilicon.

[0108] The gate electrode of the first transistor (ST1) and the gate electrode of the second transistor (ST2) may be connected to the write scan line (GWL), the gate electrode of the third transistor (ST3) may be connected to the initialization scan line (GIL), and the gate electrode of the fourth transistor (ST4) may be connected to the bias scan line (GBL). Since the first to sixth transistors (ST1, ST2, ST3, ST4, ST5, ST6) are formed as p-type MOSFETs, they may be turned on when a scan signal of gate low voltage and a light emission control signal are applied to the initialization scan line (GIL), the write scan line (GWL), the bias scan line (GBL), and the light emission line (EL), respectively. One electrode of the third transistor (ST3) may be connected to a first initialization voltage line (VIL) to which a third power supply voltage (VINT in FIG. 3) is applied, and one electrode of the fourth transistor (ST4) may be connected to a second initialization voltage line (VAIL) to which a fourth power supply voltage (VAINT in FIG. 3) is applied. The third power supply voltage (VINT in FIG. 3) and the fourth power supply voltage (VAINT in FIG. 3) may be different voltages. Additionally, the third power supply voltage (VINT in FIG. 3) and the fourth power supply voltage (VAINT in FIG. 3) may be voltages at a lower level than the first power supply voltage (VDD) and voltages at a higher level than the second power supply voltage (VSS).

[0109] Alternatively, the driving transistor (DT), the second transistor (ST2), the fourth transistor (ST4), the fifth transistor (ST5), and the sixth transistor (ST6) may be formed as p-type MOSFETs, and the first transistor (ST1) and the third transistor (ST3) may be formed as n-type MOSFETs. In this case, the active layer of each of the driving transistor (DT), the second transistor (ST2), the fourth transistor (ST4), the fifth transistor (ST5), and the sixth transistor (ST6) formed as p-type MOSFETs may be formed of polysilicon, and the active layer of each of the first transistor (ST1) and the third transistor (ST3) formed as n-type MOSFETs may be formed of oxide semiconductor. Additionally, since the first transistor (ST1) and the third transistor (ST3) are formed as n-type MOSFETs, the first transistor (ST1) may be turned on when a gate high voltage scan signal is applied, and the third transistor (ST3) may be turned on when an initialization scan signal of a gate high voltage is applied. In contrast, the second transistor (ST2), the fourth transistor (ST4), the fifth transistor (ST5), and the sixth transistor (ST6) are formed as p-type MOSFETs, so they can be turned on when a scan signal of the gate low voltage and a light emission control signal are applied.

[0110] Alternatively, if the fourth transistor (ST4) is formed as an n-type MOSFET and the remaining transistors (DT, ST1, ST2, ST3, ST5, ST6) are formed as p-type MOSFETs, the active layer of the fourth transistor (ST4) may be formed as an oxide semiconductor, and the active layer of each of the remaining transistors (DT, ST1, ST2, ST3, ST5, ST6) may be formed as polysilicon. In addition, the fourth transistor (ST4) may be turned on when a scan signal of gate high voltage is applied, whereas the remaining transistors (DT, ST1, ST2, ST3, ST5, ST6) may be turned on when a scan signal of gate low voltage and a light emission control signal are applied.

[0111] Alternatively, the first to sixth transistors (ST1, ST2, ST3, ST4, ST5, ST6) and the driving transistor (DT) may all be formed as n-type MOSFETs. In this case, the active layer of each of the first to sixth transistors (ST1, ST2, ST3, ST4, ST5, ST6) and the driving transistor (DT) is formed of an oxide semiconductor and can be turned on when a scan signal of gate high voltage and a light emission control signal are applied.

[0112] FIG. 5 is a layout diagram showing pixels of a display area according to one embodiment.

[0113] Referring to FIG. 5, each of the plurality of pixels (PX) of the display area (DA) may include three subpixels (SPX1, SPX2, SPX3), but the embodiments of the present specification are not limited thereto and may include four subpixels. When each of the plurality of pixels (PX) includes three subpixels (SPX1, SPX2, SPX3), it may include a first subpixel (SPX1), a second subpixel (SPX2), and a third subpixel (SPX3).

[0114] Multiple pixels (PX) can be arranged in a matrix form. In each of the multiple pixels (PX), the first sub-pixel (SPX1), the second sub-pixel (SPX2), and the third sub-pixel (SPX3) can be arranged in a first direction (DR1).

[0115] In the case where each of the plurality of pixels (PX) includes three subpixels (SPX1, SPX2, SPX3), the first subpixel (SPX1) may emit light of a first color, the second subpixel (SPX2) may emit light of a second color, and the third subpixel (SPX3) may emit light of a third color. Here, the first color light may be light in the blue wavelength band, the second color light may be light in the red wavelength band, and the third color light may be light in the green wavelength band. For example, the blue wavelength band may refer to a wavelength band in which the main peak wavelength of the light is included in the wavelength band of approximately 370 nm to 460 nm, the green wavelength band may refer to a wavelength band in which the main peak wavelength of the light is included in the wavelength band of approximately 480 nm to 560 nm, and the red wavelength band may refer to a wavelength band in which the main peak wavelength of the light is included in the wavelength band of approximately 600 nm to 750 nm.

[0116] Alternatively, if each of the plurality of pixels (PX) includes four subpixels, the first subpixel may emit light of a first color, the second subpixel and the fourth subpixel may emit light of a second color, and the third subpixel may emit light of a third color. Alternatively, the first subpixel may emit light of a first color, the second subpixel may emit light of a second color, the third subpixel may emit light of a third color, and the fourth subpixel may emit light of a fourth color. In this case, the light of the fourth color may be white light.

[0117] The first subpixel (SPX1) includes a first pixel electrode (PXE1) and a plurality of light-emitting elements (LE). The second subpixel (SPX2) includes a second pixel electrode (PXE2) and a plurality of light-emitting elements (LE). The third subpixel (SPX3) includes a third pixel electrode (PXE3) and a plurality of light-emitting elements (LE).

[0118] The light-emitting element (LE1) of the first subpixel (SPX1) emits light of the first color, the light-emitting element (LE2) of the second subpixel (SPX2) emits light of the second color, and the light-emitting element (LE3) of the third subpixel (SPX3) can emit light of the third color.

[0119] Each of the first pixel electrode (PXE1), the second pixel electrode (PXE2), and the third pixel electrode (PXE3) may have a rectangular planar shape having a short side in the first direction (DR1) and a long side in the second direction (DR2). The area of ​​the first subpixel (SPX1), the area of ​​the second subpixel (SPX2), and the area of ​​the third subpixel (SPX3) may be set according to the light emission efficiency of the light-emitting element (LE) included in each subpixel (SPX). For example, the area of ​​the subpixel may be larger as the light conversion efficiency is lower.

[0120] For example, as shown in FIG. 5, when the light emission efficiency of the light-emitting element (LE2) of the second subpixel (SPX2) is lower than the light emission efficiency of the light-emitting element (LE1) of the first subpixel (SPX1) and the light-emitting element (LE2) of the third subpixel (SPX2), the area of ​​the second pixel electrode (PXE2) may be larger than the area of ​​the first pixel electrode (PXE1) and larger than the area of ​​the third pixel electrode (PXE2).

[0121] Each of the pixel electrodes (PXE1, PXE2, PXE3) can be electrically connected to at least one transistor through a pixel connection hole (CT1 / CT2 / CT3). For example, each of the pixel electrodes (PXE1, PXE2, PXE3) can be electrically connected to the second electrode of the fourth transistor (ST4 in FIG. 4) and the second electrode of the sixth transistor (ST6 in FIG. 4) of the corresponding subpixel.

[0122] A plurality of light-emitting elements (LEs) may be disposed on each of the pixel electrodes (PXE1, PXE2, PXE3). An equal number of light-emitting elements (LEs) may be disposed on each of the pixel electrodes (PXE1, PXE2, PXE3). For example, two light-emitting elements (LEs) may be disposed on each of the pixel electrodes (PXE1, PXE2, PXE3). The plurality of light-emitting elements (LEs) may emit light of a third color, namely light in the blue wavelength band, but the embodiments of this specification are not limited thereto.

[0123] Each of the plurality of light-emitting elements (LE) may have a circular planar shape, but the embodiments of this specification are not limited thereto. For example, each of the plurality of light-emitting elements (LE) may have a rectangular planar shape.

[0124] FIG. 6 is a cross-sectional view showing an example of a cross-section of a display panel taken along the line I1-I1' of FIG. 5. FIG. 7 is a cross-sectional view showing in detail an example of area A of FIG. 6.

[0125] Referring to FIGS. 6 and 7, the substrate (SUB) may be made of an insulating material such as glass or a polymer resin. If the substrate (SUB) is made of a polymer resin, it may be a stretchable flexible substrate. The polymer resin may be an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin.

[0126] A barrier film (BR) may be disposed on the substrate (SUB). The barrier film (BR) is a film intended to protect the thin-film transistor layer (TFTL) from moisture penetrating through the substrate (SUB), which is susceptible to moisture permeability. The barrier film (BR) may be composed of multiple inorganic films stacked alternately.

[0127] A thin-film transistor (TFT1) may be disposed on the barrier film (BR). The thin-film transistor (TFT1) may be, for example, either the fourth transistor (ST4) or the sixth transistor (ST6) shown in FIG. 4. The thin-film transistor (TFT1) may include a first active layer (ACT1) and a first gate electrode (G1).

[0128] A first active layer (ACT1) of a thin-film transistor (TFT1) may be disposed on a barrier film (BR). The first active layer (ACT1) of the thin-film transistor (TFT1) may include polycrystalline silicon, single-crystal silicon, low-temperature polycrystalline silicon, or amorphous silicon. Alternatively, the first active layer (ACT1) of the thin-film transistor (TFT1) may be made of an oxide semiconductor including IGZO (indium (In), gallium (Ga), zinc (Zn), and oxygen (O)), IGZTO (indium (In), gallium (Ga), zinc (Zn), tin (Sn), and oxygen (O)), or IGTO (indium (In), gallium (Ga), tin (Sn), and oxygen (O)).

[0129] The first active layer (ACT1) may include a first channel region (CHA1), a first source region (S1), and a first drain region (D1). The first channel region (CHA1) may be a region that overlaps with the first gate electrode (G1) in the third direction (DR3), which is the thickness direction of the substrate (SUB). The first source region (S1) may be disposed on one side of the first channel region (CHA1), and the first drain region (D1) may be disposed on the other side of the first channel region (CHA1). The first source region (S1) and the first drain region (D1) may be regions that do not overlap with the first gate electrode (G1) in the third direction (DR3). The first source region (S1) and the first drain region (D1) may be regions that have conductivity by doping ions into a semiconductor material.

[0130] A first gate insulating film (131) may be disposed on the first channel region (CHA1), the first source region (S1), and the first drain region (D1) of the thin film transistor (TFT1).

[0131] A first gate metal layer may be disposed on the first gate insulating film (131). The first gate metal layer may include a first gate electrode (G1) and a first capacitor electrode (CAE1) of a thin-film transistor (TFT1). The first gate electrode (G1) may overlap with the first active layer (ACT1) in the third direction (DR3). Although the first gate electrode (G1) and the first capacitor electrode (CAE1) are shown as being separated from each other in FIG. 6, the first gate electrode (G1) and the first capacitor electrode (CAE1) may be connected to each other.

[0132] A second gate insulating film (132) may be disposed on the first gate electrode (G1) and the first capacitor electrode (CAE1) of the thin-film transistor (TFT1).

[0133] A second gate metal layer may be disposed on the second gate insulating film (132). The second gate metal layer may include a second capacitor electrode (CAE2). The second capacitor electrode (CAE2) may overlap with the first capacitor electrode (CAE1) of the thin film transistor (TFT1) in the third direction (DR3). Since the second gate insulating film (132) has a predetermined dielectric constant, a capacitor (C1 in FIG. 4) may be formed by the first capacitor electrode (CAE1), the second capacitor electrode (CAE2), and the second gate insulating film (132) disposed between them.

[0134] A first interlayer insulating film (141) may be disposed on the second capacitor electrode (CAE2).

[0135] A first data metal layer may be disposed on the first interlayer insulating film (141). The first data metal layer may include a first source connection electrode (PCE1). The first source connection electrode (PCE1) may be connected to a first drain region (D) of the first active layer (ACT1) through a first source contact hole (PCT1) penetrating the first gate insulating film (131), the second gate insulating film (132), and the first interlayer insulating film (141).

[0136] A first flattening organic film (160) for flattening the step difference caused by a thin film transistor (TFT1) may be disposed on the first source connection electrode (PCE1).

[0137] A second data metal layer may be disposed on the first planarization organic film (160). The second data metal layer may include a second source connection electrode (PCE2). The second source connection electrode (PCE2) may be connected to the first source connection electrode (PCE1) through a second pixel contact hole (PCT2) that penetrates the first planarization organic film (160).

[0138] A second planarizing organic film (180) may be placed on the second source connection electrode (PCE2).

[0139] The barrier film (BR), the first gate insulating film (131), the second gate insulating film (132), the third gate insulating film (133), and the first interlayer insulating film (141) are inorganic films, for example, silicon nitride (SiN x ), silicon nitride (SiON), silicon oxide (SiO x ), titanium oxide (TiO x ), or aluminum oxide (AlO x It can be formed as ).

[0140] The first gate metal layer, the second gate metal layer, the first data metal layer, and the second data metal layer may be formed as a single layer or a multilayer composed of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof.

[0141] The first flattening organic film (160) and the second flattening organic film (180) can be formed from organic films such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, and polyimide resin.

[0142] A light-emitting element layer may be disposed on the second planarized organic film (180). The light-emitting element layer may include pixel electrodes (PXE1, PXE2, PXE3), light-emitting elements (LE), a common electrode (CE), and a first organic layer (190).

[0143] A pixel electrode layer and a first organic layer (190) may be disposed on the second planarizing organic film (180). The pixel electrode layer may include a first pixel electrode (PXE1), a second pixel electrode (PXE2), and a third pixel electrode (PXE3). Each of the pixel electrodes (PXE1, PXE2, PXE3) may be connected to a second source connection electrode (PCE2) through a connection hole (CT1 / CT2 / CT3 in FIG. 5) penetrating the second planarizing organic film (180). Each of the pixel electrodes (PXE1, PXE2, PXE3) may be connected to a first source region (S1) or a first drain region (D1) of a thin film transistor (TFT1) through the first source connection electrode (PCE1) and the second source connection electrode (PCE2). Therefore, a voltage controlled by the thin-film transistor (TFT1) can be applied to each of the pixel electrodes (PXE1, PXE2, PXE3).

[0144] The pixel electrodes (PXE1, PXE2, PXE3) may be formed as a single layer or a multilayer composed of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof. For example, to lower the resistance of each of the pixel electrodes (PXE1, PXE2, PXE3), the pixel electrode layer may be made of copper (Cu), which has low sheet resistance. In addition, the pixel electrodes (PXE1, PXE2, PXE3)

[0145] When pixel electrodes (PXE1, PXE2, PXE3) are formed in multiple layers, they may include a first layer made of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu) or an alloy thereof, and a second layer made of a highly reflective metallic material such as aluminum (Al) on the first layer.

[0146] The organic barrier (BWL) can be formed on the second flattened organic film (180) with a first inclination angle (θ1) and a first height (h1). The bottom of the organic barrier (BWL) can be positioned lower than the bottom of the light-emitting element (LE).

[0147] When the top of the organic barrier (BWL) is formed lower than the light-emitting element (LE), there is an advantage that the light-emitting element (LE) can be easily transferred during the light-emitting element (LE) transfer process.

[0148] The first inclination angle may be approximately 120 to 135 degrees. The first height (h1) may be approximately 5 μm to 8 μm, but is not limited thereto.

[0149] An organic barrier (BWL) may have a first aperture region (OP-A) defined therein. The first aperture region (OP-A) may expose the second planarized organic film (180), which is the lower layer, and pixel electrodes (PXE1, PXE2, PXE3). The area exposed by the first aperture region (OP-A) may be larger than the area of ​​the light-emitting element (LE).

[0150] The organic partition (BWL) may include a first organic layer (190) defining the shape of the partition, a first protective film (INS1) covering the first organic layer (190), a reflective film (RF), and a second protective film (INS2).

[0151] The top of the first organic layer (190) may be higher than the active layer (MQW) of the light-emitting element (LE) and lower than the top of the light-emitting element (LE).

[0152] The first organic layer (190) can be formed from organic materials such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, and polyimide resin.

[0153] A first protective film (INS1) is placed outside the first organic layer (190). The first protective film (INS1) can cover the entire first organic layer (190).

[0154] A reflective film (RF) is positioned on the outer side of the first protective film (INS1).

[0155] A second protective layer (INS2) is placed on top of the reflective film (RF). The reflective film (RF) is surrounded by the first protective layer (INS1) and the second protective layer (INS2).

[0156] The reflective film (RF) may be a closed-loop shape that surrounds the side of the light-emitting element (LE) while being spaced apart from the light-emitting element (LE) in a planar plane. The top of the reflective film (RF) may be positioned higher than the active layer (MQW) of the light-emitting element (LE). The bottom of the reflective film (RF) may be positioned lower than the light-emitting element (LE). The reflective film (RF) may include a highly reflective metallic material such as aluminum (Al).

[0157] The reflective film (RF) can reflect light traveling laterally from the light-emitting element (LE) and emit it onto the upper surface of the light-emitting element (LE). Therefore, since the loss of light from the light-emitting element (LE) can be reduced, the light efficiency of the light-emitting element (LE) can be increased.

[0158] The greater the inclination (θ1) of the reflective film (RF), the greater the frontal light emission efficiency may be; however, the greater the inclination (θ1) of the reflective film (RF), the wider the width of the first organic layer (190). Therefore, it may be preferable for the inclination (θ1) of the reflective film (RF) to be approximately 120° to 130°. This will be explained in detail in relation to FIGS. 18 and 19.

[0159] The first protective layer (INS1) and the second protective layer (INS2) are inorganic films, for example, silicon nitride (SiN x ), silicon nitride (SiON), silicon oxide (SiO x ), titanium oxide (TiO x), or aluminum oxide (AlO x It can be formed as ).

[0160] Multiple light-emitting elements (LEs) can be placed on pixel electrodes (PXE1, PXE2, PXE3). FIGS. 6 and 7 illustrate that each of the multiple light-emitting elements (LEs) is a vertical type micro LED extended in a third direction (DR3). A vertical type micro LED refers to an LED having a structure in which a first semiconductor layer (SEM1), an active layer (MQW), and a second semiconductor layer (SEM2) are sequentially arranged in a third direction (DR3) which is a vertical direction.

[0161] The light-emitting element (LE) may include substantially vertical sides as illustrated in FIG. 7. For example, the light-emitting element (LE) may be patterned through vertical etching and may have a rectangular or square cross-sectional shape in which the width of the top surface and the width of the bottom surface are substantially the same. The shape of the light-emitting element (LE) may vary depending on the embodiments. For example, the light-emitting element (LE) may have an inverted taper cross-sectional shape. For example, the light-emitting element (LE) may have an inverted trapezoidal cross-sectional shape in which the width of the top surface is wider than the width of the bottom surface.

[0162] Each of the plurality of light-emitting elements (LE) may be formed of an inorganic material such as gallium nitride (GaN). Each of the plurality of light-emitting elements (LE) may have a length in a first direction (DR1), a length in a second direction (DR2), and a length in a third direction (DR3), each ranging from several to several hundred μm. For example, each of the plurality of light-emitting elements (LE) may have a length in a first direction (DR1), a length in a second direction (DR2), and a length in a third direction (DR3), each ranging from approximately 6 μm to 10 μm or less.

[0163] Each of the plurality of light-emitting elements (LE) can be formed by growing on a semiconductor substrate such as a silicon substrate or a sapphire substrate. The plurality of light-emitting elements (LE) can be transferred directly from the semiconductor substrate onto the pixel electrodes (PXE1, PXE2, PXE3) of the display panel (100). Alternatively, the plurality of light-emitting elements (LE) can be transferred onto the pixel electrodes (PXE1, PXE2, PXE3) of the display panel (100) via an electrostatic method using an electrostatic head or a stamp method using an elastic polymer material such as PDMS or silicon as a transfer substrate.

[0164] The light-emitting element (LE) may include a conductive layer (E1), a semiconductor stack (STC), a contact electrode (CTE), and a protective film (INS). The semiconductor stack (STC) may include a first semiconductor layer (SEM1), an active layer (MQW), and a second semiconductor layer (SEM2) arranged sequentially in a third direction (DR3).

[0165] A conductive layer (E1) may be disposed on the lower surface of a first semiconductor layer (SEM1). Although FIG. 7 illustrates a case where the conductive layer (E1) covers the entire lower surface of the first semiconductor layer (SEM1), the embodiments of this specification are not limited thereto. As an example, the conductive layer (E1) may be disposed on a part of the lower surface of the first semiconductor layer (SEM1). The conductive layer (E1) may include any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu).

[0166] The first semiconductor layer (SEM1) can be placed on the conductive layer (E1). The first semiconductor layer (SEM1) may be made of a semiconductor material layer doped with a first conductive type dopant such as magnesium (Mg), zinc (Zn), calcium (Ca), strontium (Sr), barium (Ba), etc., for example, gallium nitride (GaN).

[0167] The active layer (MQW) can be placed on the first semiconductor layer (SEM1). The active layer (MQW) can emit light through the coupling of electron-hole pairs according to an electric signal applied through the first semiconductor layer (SEM1) and the second semiconductor layer (SEM2).

[0168] The active layer (MQW) may include a material having a single or multiple quantum well structure. When the active layer (MQW) includes a material having a multiple quantum well structure, it may have a structure in which multiple well layers and barrier layers are alternately stacked. In this case, the well layers may be formed of indium gallium nitride (InGaN), and the barrier layers may be formed of gallium nitride (GaN) or aluminum gallium nitride (AlGaN), but the embodiments of this specification are not limited thereto.

[0169] Alternatively, the active layer (MQW) may have a structure in which semiconductor materials with large band gap energy and semiconductor materials with small band gap energy are alternately stacked, or it may include different group 3 to group 5 semiconductor materials depending on the wavelength of the emitted light.

[0170] For example, when the active layer (MQW) contains indium gallium nitride (InGaN), the color of the emitted light may vary depending on the content of indium (In). For example, as the content of indium (In) increases, the wavelength band of the light emitted by the active layer shifts to a red wavelength band, and as the content of indium (In) decreases, the wavelength band of the light emitted by the active layer shifts to a blue wavelength band. For example, the content of indium (In) in the active layer (MQW) of a light-emitting device (LE) that emits a third light (light in the blue wavelength band) may be approximately 10 wt% to 20 wt%.

[0171] A second semiconductor layer (SEM2) may be disposed on a first semiconductor layer (SEM1). The second semiconductor layer (SEM2) may be a semiconductor material layer doped with a second conductivity type dopant, such as silicon (Si), germanium (Ge), tin (Sn), etc., for example, gallium nitride (GaN).

[0172] An electron blocking layer may be placed between the first semiconductor layer (SEM1) and the active layer (MQW). The electron blocking layer may be a layer for suppressing or preventing too many electrons from flowing into the active layer (MQW). For example, the electron blocking layer may be aluminum gallium nitride (AlGaN) or p-type aluminum gallium nitride (AlGaN) doped with p-type magnesium (Mg). The electron blocking layer may be omitted.

[0173] A superlattice layer may be disposed between the active layer (MQW) and the second semiconductor layer (SEM2). The superlattice layer may be a layer for relieving stress between the second semiconductor layer (SEM2) and the active layer (MQW). For example, the superlattice layer may be formed of indium gallium nitride (InGaN) or gallium nitride (GaN). The superlattice layer may be omitted.

[0174] Light extraction patterns (LEPs) can be formed on the upper surface of the semiconductor stack (STC). For example, light extraction patterns (LEPs) can be formed on the upper surface of the second semiconductor layer (SEM2).

[0175] Light extraction patterns (LEPs) may be patterns designed to increase the efficiency of light emitted from the upper surface of a light-emitting element (LE). Light extraction patterns (LEPs) may be concave patterns formed as hemispheres or semi-ellipses. Light extraction patterns (LEPs) may be concave patterns having a semicircular or semi-elliptical cross-sectional shape.

[0176] The protective film (INS) may be a film for protecting the bottom surface and side surface of the light-emitting element (LE). The protective film (INS) may be disposed on the bottom surface and side surface of the conductive layer (E1) and on the side surface of the semiconductor stack (STC). Specifically, the protective film (INS) may be disposed on the bottom surface and side surface of the conductive layer (E1), on the side surface of the first semiconductor layer (SEM1), on the side surface of the active layer (MQW), and on the side surface of the second semiconductor layer (SEM2). The protective film (INS) may be an inorganic film, for example, silicon nitride (SiN x ), silicon nitride (SiON), silicon oxide (SiO x ), titanium oxide (TiO x ), or aluminum oxide (AlO x It can be formed as ).

[0177] The contact electrode (CTE) may be placed on the protective film (INS). The contact electrode (CTE) may be placed between the pixel electrodes (PXE1, PXE2, PXE3) and the protective film (INS). The contact electrode (CTE) may be in contact with the pixel electrodes (PXE1, PXE2, PXE3).

[0178] The contact electrode (CTE) can be connected to the exposed conductive layer (E1) without being covered by the protective film (INS).

[0179] The contact electrode (CTE) may include any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). Specifically, to increase reflectivity, the plurality of contact electrodes (CTE) may be formed into a two-layer structure of chromium (Cr) and gold (Au), a three-layer structure of titanium (Ti), aluminum (Al), and titanium (Ti), or a three-layer structure of ITO (Indium Tin Oxide), silver (Ag), and ITO (Indium Tin Oxide).

[0180] The distance (D1) between the light-emitting element (LE) and the organic barrier (BWL) may be smaller than the width (W1) of the light-emitting element (LE).

[0181] The second organic layer (211) can be arranged to cover the sides of a plurality of light-emitting elements (LE).

[0182] The second organic layer (211) is a layer for flattening the step difference caused by the plurality of light-emitting elements (LE). The height of the second organic layer (211) may be arranged to cover most of the side of each of the plurality of light-emitting elements (LE), but in other embodiments, it may be arranged to cover the side of each of the light-emitting elements (LE) by a plurality of organic films.

[0183] The second organic layer (211) can be formed from an organic film such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin.

[0184] A common electrode (CE) can be disposed on the upper surface of each of the plurality of light-emitting elements (LE) and on the upper surface of the second organic layer (211).

[0185] The common electrode (CE) may be a common layer formed in common on the first subpixel (SPX1), the second subpixel (SPX2), and the third subpixel (SPX3). The common electrode (CE) may be made of a transparent conductive material (TCO) such as Indium Tin Oxide (ITO) and Indium Zinc Oxide (IZO) that can transmit light.

[0186] The pixel electrodes (PXE1, PXE2, PXE3) are referred to as the anode electrode or the first electrode, and the common electrode (CE) may be referred to as the cathode electrode or the second electrode.

[0187] The first capping layer (CAP1) can be placed on the common electrode (CE). The first capping layer (CAP1) can serve to encapsulate the lower component.

[0188] The first capping layer (CAP1) is an inorganic film, for example, silicon nitride (SiN x ), silicon nitride (SiON), silicon oxide (SiO x ), titanium oxide (TiO x ), or aluminum oxide (AlO x It can be formed as ).

[0189] A third organic layer (213) may be disposed on the first capping layer (CAP1). A plurality of color filters (CF1, CF2, CF3) may be disposed on the third organic layer (213). The plurality of color filters (CF1, CF2, CF3) may include first color filters (CF1), second color filters (CF2), and third color filters (CF3).

[0190] A first color filter (CF1) placed in a first subpixel (SPX1) can transmit a first light (light in the blue wavelength band). Accordingly, the first subpixel (SPX1) can emit the first light (light in the blue wavelength band).

[0191] The second color filter (CF2) placed in the second subpixel (SPX2) can transmit the second light (light in the red wavelength band). Therefore, the second subpixel (SPX2) can emit the second light (light in the red wavelength band).

[0192] A third color filter (CF3) placed in the third subpixel (SPX3) can transmit third light (light in the green wavelength band). Therefore, the third subpixel (SPX3) can emit third light (light in the green wavelength band).

[0193] The first color filter (CF1), the second color filter (CF2), and the third color filter (CF3) overlapping in the third direction (DR3) can overlap with the organic partition (BWL) in the third direction (DR3).

[0194] A fourth organic film (214) for flattening can be placed on a plurality of color filters (CF1, CF2, CF3).

[0195] The third organic film (213) and the fourth organic film (214) can be formed from acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, etc.

[0196] FIG. 8 is a cross-sectional view showing another example of area A1 of FIG. 6 in detail. FIG. 9 is an enlarged view of a part of FIG. 8.

[0197] The embodiments of FIGS. 8 and 9 differ from the embodiment of FIG. 7 in that the organic partition (BWL) includes a first organic layer (191) and a second organic layer (192). In FIGS. 8 and 9, descriptions that overlap with the embodiment of FIG. 7 are omitted, and the explanation focuses on the differences from the embodiment of FIG. 7.

[0198] Referring to FIGS. 8 and 9, the organic partition (BWL) may include a first organic layer (191) and a second organic layer (192) disposed on the first organic layer (191).

[0199] The first organic layer (191) and the second organic layer (192) have different slopes.

[0200] The angle of inclination (θ11) of the first organic layer (191) may be greater than the second angle of inclination (θ12) of the second organic layer (192). For example, the angle of inclination (θ11) of the first organic layer (191) is 120 degrees or more, and the second angle of inclination (θ12) of the second organic layer (192) is 120 degrees or less. Additionally, the average of the angle of inclination (θ11) of the first organic layer (191) and the second angle of inclination (θ12) of the second organic layer (192) may be about 120 degrees or more. Preferably, the average of the angle of inclination (θ11) of the first organic layer (191) and the second angle of inclination (θ12) of the second organic layer (192) may be about 120 degrees to 135 degrees.

[0201] The inflection point of the inclination angle (θ11) of the first organic layer (191) and the second inclination angle (θ12) of the second organic layer (192) can be located higher than the active layer (MQW) of the light-emitting element (LE). Therefore, the upper part of the active layer (MQW) can be located lower than the upper part of the first organic layer (191).

[0202] Here, since the organic barrier (BWL) has a three-layer structure of a first protective film (INS1), a reflective film (RF), and a second protective film (INS2) on the first organic layer (191) and the second organic layer (192) (outside), for convenience of explanation, if the reflective film (RF) placed on the outside of the first organic layer (191) is called the first reflective film and the reflective film (RF) placed on the outside of the second organic layer (192) is called the second reflective film, then the inclination angle (θ11) of the first reflective film is the same as that of the first organic layer (191), and the inclination angle (θ12) of the second reflective film is the same as that of the second organic layer (192).

[0203] Accordingly, the average angle of the inclination angle (θ11) of the first reflective film and the second inclination angle (θ12) of the second reflective film is 120 degrees or more, preferably 120 degrees to 135 degrees. In addition, the inclination angle (θ11) of the first reflective film is greater than the inclination angle (θ12) of the second reflective film. For example, the inclination angle (θ11) of the first reflective film may be 120 degrees or more, and the inclination angle (θ12) of the second reflective film may be 120 degrees or less.

[0204] Additionally, the inflection point of the inclination angle (θ11) of the first reflective film and the second inclination angle (θ12) of the second reflective film can be located higher than the active layer (MQW) of the light-emitting element (LE). Therefore, the upper part of the active layer (MQW) can be located lower than the upper part of the first reflective film.

[0205] FIG. 10 is a cross-sectional view showing in detail an example of region A1 of FIG. 6 according to another embodiment.

[0206] Referring to FIG. 10, it differs from the embodiment of FIG. 8 in that the top of the organic barrier (BWL) is higher than the top of the light-emitting element (LE). In FIG. 10, descriptions that overlap with the embodiment of FIG. 8 are omitted, and the explanation focuses on the differences from the embodiment of FIG. 8.

[0207] Referring to FIG. 10, the organic partition (BWL) may include a first organic layer (191) and a second organic layer (192) disposed on the first organic layer (191).

[0208] The first organic layer (191) has a first inclination angle (θ11) formed by the outer surface and the bottom surface of 120 degrees or more. The second organic layer (192) has a second inclination angle (θ12) formed by the outer surface and the bottom surface of smaller than the first inclination angle, and the average of the first inclination angle (θ11) and the second inclination angle (θ12) is 120 degrees or more. The first organic layer (191) and the inflection point of the first organic layer (191) are located higher than the top of the active layer (MQW). Therefore, the top of the first organic layer (191) is located higher than the top of the active layer (MQW).

[0209] The top of the first organic layer (191) may be positioned higher than the top of the active layer (MQW), and the top of the first organic layer (192) may be positioned higher than the top of the light-emitting element (LE). Accordingly, the top of the reflective film (RF) placed on the outside of the first organic layer (191) and the second organic layer (192) may be positioned higher than the light-emitting element (LE). Thus, the reflective film (RF) may surround all sides of the light-emitting element (LE).

[0210] In one embodiment, when the top of the organic barrier (BWL) is formed higher than the top of the light-emitting element (LE), the reflective film (RF) disposed on the outside of the organic barrier (BWL) is positioned higher than the top of the light-emitting element (LE), which is advantageous in that it can effectively reflect light traveling in the lateral direction of the light-emitting element (LE) to the front surface.

[0211] FIG. 11 is a cross-sectional view showing another example of region A1 of FIG. 6 in detail.

[0212] The embodiment of FIG. 11 differs from the embodiment of FIG. 7 in that the organic partition (BWL) includes a first organic layer (191-1), a second organic layer (192-1), and a third organic layer (193). In FIG. 11, descriptions that overlap with the embodiment of FIG. 7 are omitted, and the explanation focuses on the differences from the embodiment of FIG. 7.

[0213] Referring to FIG. 11, the organic partition (BWL) may include a first organic layer (191-1) and a second organic layer (192-1) disposed on the first organic layer (191-1). Additionally, the organic partition (BWL) may further include a third organic layer (193) disposed on the second organic layer (192-1).

[0214] The first organic layer (191-1), the second organic layer (192-1), and the third organic layer (193) have different inclinations. The inclination of the organic layer placed at the bottom may be greater. For example, the inclination angle (θ21) of the first organic layer (191-1) may be greater than the inclination angle (θ22) of the second organic layer (192-1), and the inclination angle (θ22) of the second organic layer (192-1) may be greater than the inclination angle (θ23) of the third organic layer (193).

[0215] The average of the inclination angles of the plurality of organic layers may be 120 degrees or more, and preferably about 120 to 135 degrees. For example, the average of the inclination angle (θ21) of the first organic layer (191-1), the inclination angle (θ22) of the second organic layer (192-1), and the inclination angle (θ23) of the third organic layer (193) may be 120 degrees or more, and preferably about 120 to 135 degrees.

[0216] In a display device according to various embodiments, there is no reflective layer placed directly on the light-emitting element (LE), and since the bottom of the reflective film (RF) within the organic barrier (BWL) is located below the bottom of the light-emitting element (LE), the organic barrier (BWL) can effectively reflect the side light of the light-emitting element (LE).

[0217] In addition, the average inclination angle of the organic partition (BWL) can be increased to 120 degrees or more to improve LEE (a), luminance (b), and frontal light emission efficiency. This will be explained in detail with reference to FIGS. 18 and 19.

[0218] LEE (light extraction efficiency) refers to the light emission efficiency, representing the value indicating how much light a light-emitting element can emit.

[0219] FIG. 12 is a cross-sectional view showing an example of a cross-section of a display panel taken along the line I-I' of FIG. 5 according to another embodiment.

[0220] FIG. 12 differs from the embodiment of FIG. 6 in that the light-emitting element (LE) emits light in the blue wavelength band, and a light conversion layer (QDL1, QDL2) or a light-transmitting layer (TPL) is disposed on top of the light-emitting element (LE). In FIG. 11, descriptions that overlap with the embodiment of FIG. 6 are omitted, and the explanation focuses on the differences from the embodiment of FIG. 6.

[0221] Referring to FIG. 12, the light-emitting element (LE) placed in the first subpixel (SPX1), the second subpixel (SPX1), and the second subpixel (SPX3) can emit light of a blue wavelength.

[0222] A light-blocking layer (BM), a light-transmitting layer (TPL), a first light-converting layer (QDL1), and a second light-converting layer (QDL2) may be disposed on the first capping layer (CAP1). The light-transmitting layer (TPL), the first light-converting layer (QDL1), and the second light-converting layer (QDL2) may be formed by the partitions of the light-blocking layer (BM). Therefore, a light-transmitting layer (TPL) may be disposed on the first capping layer (CAP1) in the first subpixel (SPX1), a first light-converting layer (QDL1) may be disposed on the first capping layer (CAP1) in the second subpixel (SPX2), and a second light-converting layer (QDL2) may be disposed on the first capping layer (CAP1) in the third subpixel (SPX3). The light-blocking layer (BM) may not overlap with a plurality of light-emitting elements (LE) in the third direction (DR3).

[0223] The light-transmitting layer (TPL) may include a light-transmitting organic material.

[0224] The light-transmitting layer (TPL) can transmit light in the blue wavelength band incident from the light-emitting element (LE) to one side of the light-transmitting layer (TPL).

[0225] The first light conversion layer (QDL1) can convert a portion of the blue wavelength band light incident from the light-emitting element (LE) into red wavelength band light. The first light conversion layer (QDL1) may include a first base resin (BRS1) and a first wavelength conversion particle (WCP1). The first base resin (BRS1) may include a transparent organic material. The first wavelength conversion particle (WCP1) can convert a portion of the blue wavelength band light incident from the light-emitting element (LE) into red wavelength band light.

[0226] The second light conversion layer (QDL2) can convert a portion of the blue wavelength band light incident from the light-emitting element (LE) into green wavelength band light. It may include a second base resin (BRS2) and a second wavelength conversion particle (WCP2). The second base resin (BRS2) may include a light-transmitting organic material. The second wavelength conversion particle (WCP2) can convert a portion of the blue wavelength band light incident from the light-emitting element (LE) into green wavelength band light.

[0227] For example, the first base resin (BRS1), the second base resin (BRS2), and the light-transmitting layer (TPL) may include epoxy resin, acrylic resin, cardo resin, or imide resin, etc. The first and second wavelength conversion particles (WCP1, WCP2) may be quantum dots (QD), quantum rods, fluorescent materials, or phosphorescent materials.

[0228] The light-blocking layer (BM) can be formed from an organic film such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin. The light-blocking layer (BM) may include a light-blocking material to prevent light from a light-emitting element (LE) of one subpixel from proceeding to an adjacent subpixel. For example, the light-blocking layer (BM) may include an inorganic black pigment such as carbon black or an organic black pigment.

[0229] In FIG. 12, the shading layer (BM) is formed as a single layer, but is not limited thereto and can be formed as multiple layers as needed.

[0230] A reflective film (RF) can be placed between the light-blocking layer (BM) and the first light-converting layer (QDL1), between the light-blocking layer (BM) and the second light-converting layer (QDL2), and between the light-blocking layer (BM) and the light-transmitting layer (TPL).

[0231] The reflective film (RF) may include a highly reflective metallic material such as aluminum (Al). The thickness of the reflective film (RF) may be approximately 0.1 μm.

[0232] Alternatively, the reflective film (RF) may comprise a pair of first and second layers, M (where M is an integer greater than or equal to 2), having different refractive indices to function as Distributed Bragg Reflectors (DBRs). In this case, M first layers and M second layers may be arranged alternately. The first and second layers are inorganic films, for example, silicon nitride (SiN x ), silicon nitride (SiON), silicon oxide (SiO x ), titanium oxide (TiO x ), or aluminum oxide (AlO x It can be formed as ).

[0233] It can be disposed on the second capping layer (CAP2), the first light conversion layer (QDL1), the second light conversion layer (QDL2), and the light transmission layer (TPL).

[0234] The first capping layer (CAP1), the second capping layer (CAP2), and the third capping layer (CAP3) are inorganic films, for example, silicon nitride (SiN x ), silicon nitride (SiON), silicon oxide (SiO x ), titanium oxide (TiO x ), or aluminum oxide (AlO x It can be formed as follows. The first light conversion layer (QDL1), the second light conversion layer (QDL2), and the light transmission layer (TPL) can be encapsulated by the first capping layer (CAP1), the second capping layer (CAP2), and the third capping layer (CAP3).

[0235] A third organic film (213) may be disposed on the second capping layer (CAP2). A plurality of color filters (CF1, CF2, CF3) may be disposed on the third organic film (213).

[0236] FIG. 13 is a layout diagram showing pixels of a display area according to another embodiment, FIG. 14a is a cross-sectional view showing an example of an organic partition corresponding to the X1-X1' line, X2-X2' line, X3-X3' line and X4-X4' line of FIG. 13, and FIG. 14b is a cross-sectional view showing an example of an organic partition taken along the Y1-Y1' line of FIG. 13 according to another embodiment.

[0237] Referring to FIG. 13, the first subpixel (SPX1), the second subpixel (SPX2), the third subpixel (SPX3), and the fourth subpixel (SPX4) can be arranged in the first direction.

[0238] A first subpixel (SPX1) may include a first light-emitting element (LE1) that emits blue light, a second subpixel (SPX2) may include a second light-emitting element (LE2) that emits red light, a third subpixel (SPX3) may include a third light-emitting element (LE3) that emits green light, and a fourth subpixel (SPX4) may include a fourth light-emitting element (LE4) that emits blue light.

[0239] The distance from the center of each of the first subpixel (SPX1), second subpixel (SPX2), third subpixel (SPX3), and fourth subpixel (SPX4) to the center of an adjacent subpixel may be the same. For example, the distance (DS1) from the center of the width of the first direction (DR1) of the first subpixel (SPX1) to the center of the width of the first direction (DR1) of the second subpixel (SPX2) and the distance (DS2) from the center of the width of the first direction (DR1) of the second subpixel (SPX2) to the center of the width of the first direction (DR1) of the third subpixel (SPX3) are the same. In addition, the distance (DS2) from the center of the width of the first direction (DR1) of the second subpixel (SPX2) to the center of the width of the first direction (DR1) of the third subpixel (SPX3), and the distance (DS3) from the center of the width of the first direction (DR1) of the third subpixel (SPX3) to the center of the width of the first direction (DR1) of the neighboring fourth subpixel (SPX4) are the same.

[0240] On the other hand, the width (WS2) of the first direction (DR1) of the second subpixel (SPX2) containing the second light-emitting element (LE2) with the lowest light-emitting efficiency is wider than the width (WS1) of the neighboring first subpixel (SPX1) and the width (WS3) of the third subpixel (SPX3).

[0241] Accordingly, the inclination angle (θ11-2) of the first organic layer (191) of the organic partition (BWL1) facing the second subpixel (SPX2) may be greater than the inclination angle (θ11-1) of the first organic layer (191) of the organic partition (BWL1) facing the first subpixel (SPX1), and greater than the inclination angle (θ11-3) of the organic partition (BWL2) facing the second subpixel (SPX2).

[0242] For example, referring to FIG. 14a, it can be seen that the organic barrier (BWL1) between the first subpixel (SPX1) and the second subpixel (SPX2) is asymmetric with respect to a central axis extending in the third direction (DR3).

[0243] The angle of inclination (θ11-1) formed by the outer surface (SS1) and the bottom surface of the first organic layer (191) facing the first subpixel (SPX1) may be approximately 130 degrees, and the angle of inclination (θ11-2) formed by the outer surface (SS2) and the bottom surface of the first organic layer (191) facing the second subpixel (SPX2) may be approximately 132 degrees. Additionally, the angle of inclination (θ12-1) formed by the outer surface (SS1) and the bottom surface of the second organic layer (192) may be approximately 115 degrees, and the angle of inclination (θ12-2) formed by the outer surface (SS2) and the bottom surface of the second organic layer (192) facing the second subpixel (SPX2) may be approximately 113 degrees.

[0244] It can be seen that the organic barrier (BWL2) between the second subpixel (SPX2) and the third subpixel (SPX3) is asymmetrical with respect to the central axis extending in the third direction (DR3).

[0245] The angle of inclination (θ11-3) formed by the outer surface (SS3) and the bottom surface of the first organic layer (191) facing the second subpixel (SPX2) is approximately 132 degrees, and the angle of inclination (θ11-4) formed by the outer surface (SS4) and the bottom surface of the first organic layer (191) facing the third subpixel (SPX3) is approximately 130 degrees. Additionally, the angle of inclination (θ12-3) formed by the outer surface (SS3) and the bottom surface of the second organic layer (192) facing the second subpixel (SPX2) is approximately 113 degrees, and the angle of inclination (θ12-4) formed by the outer surface (SS4) and the bottom surface of the second organic layer (192) facing the third subpixel (SPX3) may be approximately 115 degrees.

[0246] It can be seen that the organic barrier (BWL3) between the third subpixel (SPX3) and the fourth subpixel (SPX4) is symmetrical with respect to a central axis extending in the third direction (DR3).

[0247] The angle of inclination (θ11-5) formed by the outer surface (SS5) and the lower surface of the first organic layer (191) facing the third subpixel (SPX3) is approximately 130 degrees, and the angle of inclination (θ11-6) formed by the outer surface (SS4) and the lower surface of the first organic layer (191) facing the fourth subpixel (SPX4) is approximately 130 degrees.

[0248] Additionally, the angle of inclination (θ12-5) formed by the outer surface (SS5) and the lower surface of the second organic layer (192) facing the third subpixel (SPX3) is approximately 115 degrees, and the angle of inclination (θ12-6) formed by the outer surface (SS4) and the lower surface of the first organic layer (191) facing the fourth subpixel (SPX4) is approximately 115 degrees.

[0249] Meanwhile, the organic barrier (BWL4) located in the second direction (DR2) of the plurality of subpixels (SPX1, SPX2, SPX3, SPX4) can be formed as a single layer of organic layer (190). Additionally, the angle of inclination (θ11-7) formed by the outer surface (SS6) and the lower surface of the subpixel adjacent to the organic layer (190) is approximately 135 degrees.

[0250] In one embodiment, the distance between adjacent subpixels may vary depending on the light emission efficiency of the subpixels (or light-emitting elements (LE)). The light emission efficiency can be improved by forming a larger inclination angle of the organic barrier (BWL) facing the subpixel with low light emission efficiency (e.g., a subpixel emitting red light).

[0251] Additionally, the organic barrier (BWL) may be formed with different angles of inclination depending on the distance between adjacent subpixels. Therefore, even a single organic barrier (BWL) may be formed symmetrically or asymmetrically depending on the distance between adjacent subpixels. Even for an organic barrier (BWL) surrounding a single subpixel, the angle of inclination formed by the outer surface and the bottom surface may differ depending on the type of adjacent subpixel.

[0252] FIG. 14b is a drawing illustrating an organic barrier (BWL) disposed between a first light-emitting element (LE1) and a second light-emitting element (LE2). FIG. 14B may be an embodiment different from FIG. 14A.

[0253] Referring to FIG. 14b, the first light-emitting element (LE1) may include a first semiconductor layer (SEM1), a first active layer (MQW) that emits light of a first wavelength, and a second semiconductor layer (SEM2), and the second light-emitting element (LE2) may include a first semiconductor layer (SEM1), a second active layer (MQW) that emits light of a second wavelength different from the first wavelength, and a second semiconductor layer (SEM2).

[0254] The description of the first light-emitting element (LE1) and the second light-emitting element (LE2) may refer to the first light-emitting element (LE1) and the second light-emitting element (LE2) described with reference to FIGS. 6 and 7. However, the first light-emitting element (LE1) and the second light-emitting element (LE2) of FIG. 14b may differ in that their upper surfaces do not have a light extraction pattern (LEP).

[0255] As illustrated in FIG. 10, the organic barrier (BWL) may be formed higher than the adjacent light-emitting element. Although not illustrated in FIG. 14b, other components (e.g., a common electrode (CE), a first capping layer (CAP1), a color filter) may be disposed on top of the organic barrier (BWL) and the light-emitting elements (LE1, LE2) as described with reference to FIG. 6, FIG. 7 and FIG. 10.

[0256] The organic partition (BWL) may include a first organic layer (191) and a second organic layer (192).

[0257] The first organic layer (191) may include a first inclined portion (191-1) positioned toward the first light-emitting element (LE1) and a second inclined portion (191-2) positioned toward the second light-emitting element (LE2).

[0258] The first inclined section (191-1) and the second inclined section (191-2) can be formed asymmetrically with respect to each other.

[0259] For example, at the point where the first slope (191-1) intersects the first imaginary plane (VS1) and the first slope (191-1), the first angle (θ-V1) formed by the first imaginary plane (VS1) and the outer surface of the first slope (191-1) is 120 degrees or more. At the point where the second slope (191-2) intersects the second imaginary plane (VS2) and the second slope (191-2), the second angle (θ-V2) formed by the second imaginary plane (VS2) and the outer surface of the second slope is 5 degrees or more greater than the first angle (θ-V1) and 135 degrees or less. Here, the first virtual plane (VS1) is a plane extended parallel to the interface between the second semiconductor layer (SEM2) and the first active layer (MQW) of the first light-emitting element (LE1), and the second virtual plane (VS2) may be a plane extended parallel to the interface between the second semiconductor layer (SEM2) and the second active layer (MQW) of the second light-emitting element (LE2). The first virtual plane (VS1) and the second virtual plane (VS2) may be parallel to or coincide with each other.

[0260] The second organic layer (192) may include a first-2 inclined portion (191-2) positioned toward the first light-emitting element (LE1) and a second-2 inclined portion (192-2) positioned toward the second light-emitting element (LE2).

[0261] The first-2 slope (192-1) is positioned on the first slope (191-1), and the first-2 slope (192-1) has a first-2 angle (θ-V12) formed by the first-2 imaginary plane (VS1-1) and the outer surface of the first-2 slope (192-1) at the point where the first-2 imaginary plane (VS1-1) and the first-2 slope (192-1) intersect, and the first-2 angle (θ-V12) is smaller than the first angle (θ-V1), and the average of the first angle (θ-V1) and the first-2 angle (θ-V12) is 120 degrees or more. Preferably, the average of the first angle (θ-V1) and the first-2 angle (θ-V12) is within the range of 120 degrees to 135 degrees.

[0262] Here, the first-second virtual plane (VS1-1) is a plane extended parallel to the upper plane of the second semiconductor layer (SEM2) of the first light-emitting element (LE).

[0263] The upper surface of the second semiconductor layer (SEM2) is the surface facing the lower surface of the second semiconductor layer (SEM2), and the lower surface refers to the surface facing the first active layer (MQW). That is, in the second semiconductor layer (SEM2), the surface closer to the first active layer (MQW) becomes the lower surface, and the surface further from the first active layer (MQW) becomes the upper surface.

[0264] The second-2 slope (192-2) is positioned on the second slope (191-2), and the second-2 slope (192-2) has a second-2 angle (θ-V22) formed by the outer surface of the second-2 imaginary surface (VS2-2) and the second-2 slope (192-2) at the point where the second-2 imaginary surface (VS2-2) and the second-2 slope (192-2) intersect, and the second-2 angle (θ-V12) is smaller than the second angle (θ-V2), and the average of the second angle (θ-V2) and the second-2 angle (θ-V22) is 120 degrees or more. Preferably, the average of the second angle (θ-V2) and the second-2 angle (θ-V22) is within the range of 120 degrees to 135 degrees.

[0265] The organic partition (BWL) may further include a reflective film (RF) disposed on the outer surface of the first organic layer (191) and the second organic layer (192). The reflective film (RF) has a constant thickness on the outer surface of the first organic layer (191) and the second organic layer (192), and may have a slope equal to the slope of the first inclined portion (191-1) and the second inclined portion (191-2) of the first organic layer (191). For example, when the reflective film (RF) placed on the outer surface of the first inclined portion (191-1) of the first organic layer (191) is referred to as the first reflective film for convenience of explanation, and the reflective film (RF) placed on the outer surface of the second inclined portion (191-2) is referred to as the second reflective film (RF), the third angle (θ-V3) formed by the outer surface of the first reflective film and the first imaginary surface (VS1) may be the same as the first angle (θ-V1). Similarly, the fourth angle (θ-V4) formed by the outer surface of the second reflective film and the second imaginary surface may be the same as the second angle (θ-V2). The third angle (θ-V3) may be 120 degrees or more, and the fourth angle (θ-V4) may be 5 degrees or more greater than the third angle and 135 degrees or less.

[0266] Protective films (INS1, INS2) may be further disposed on the inner and outer sides of the reflective film (RF). Refer to FIG. 7 for the protective films (INS1, INS2).

[0267] FIG. 15 is a layout diagram showing pixels of a display area according to one embodiment.

[0268] The embodiment of FIG. 15 differs from the embodiment of FIG. 5 in that the light-emitting element (LE) in each of the first sub-pixel (SPX1), the second sub-pixel (SPX2), and the third sub-pixel (SPX3) is disposed on the pixel electrode (PXE1 / PXE2 / PXE3) and the common electrode (CE). In FIG. 15, descriptions that overlap with the embodiment of FIG. 5 are omitted, and the explanation focuses on the differences from the embodiment of FIG. 5.

[0269] Referring to FIG. 15, pixel electrodes (PXE1 / PXE2 / PXE3) and a common electrode (CE) may be arranged in a second direction (DR2) at each of the first subpixel (SPX1), the second subpixel (SPX2), and the third subpixel (SPX3). Each of the pixel electrodes (PXE1, PXE2, PXE3) and the common electrodes (CE) may have a rectangular planar shape, but the embodiments of the present specification are not limited thereto.

[0270] If the light conversion efficiency of the second light conversion layer (QDL2) is lower than the light conversion efficiency of the first light conversion layer (QDL1), the area of ​​the second pixel electrode (PXE2) may be larger than the area of ​​the first pixel electrode (PXE1). Additionally, since the light transmission layer (TPL) transmits the light of the light-emitting element (LE) as is, while the first light conversion layer (QDL1) must convert the light, the area of ​​the first pixel electrode (PXE1) may be larger than the area of ​​the third pixel electrode (PXE3).

[0271] The common electrode (CE) can be connected to a second power line (VSL) to which a second driving voltage (VSS) is applied. Therefore, the second driving voltage (VSS) can be applied to each of the common electrodes (CE).

[0272] In each of the first subpixel (SPX1), second subpixel (SPX2), and third subpixel (SPX3), the pixel electrode (PXE1 / PXE2 / PXE3) and the common electrode (CE) are positioned such that the light-emitting element (LE) is placed on the pixel electrode (PXE1 / PXE2 / PXE3) and the common electrode (CE), so the length of the second direction (DR2) of the light-emitting element (LE) may be longer than the length of the first direction (DR1).

[0273] FIG. 16 is a cross-sectional view showing an example of a cross-section of a display panel taken along the line I2-I2' of FIG. 15. FIG. 17 is a cross-sectional view showing in detail an example of area B of FIG. 16.

[0274] The embodiments of FIGS. 16 and 17 differ from the embodiments of FIGS. 6 and 7 in that the light-emitting element (LE) is a flip-type micro LED. In FIGS. 16 and 17, descriptions that overlap with the embodiments of FIGS. 6 and 7 are omitted, and the explanation focuses on the differences from the embodiments of FIGS. 6 and 7.

[0275] Referring to FIGS. 16 and 17, a pixel electrode layer comprising pixel electrodes (PXE1, PXE2, PXE3) and common electrodes (CE1, CE2, CE3) can be disposed on a second planarization organic film (180).

[0276] The light-emitting element (LE) may be a flip-type micro LED. A flip-type micro LED refers to an LED in which contact electrodes (CTE1, CTE2) are formed on one side (e.g., the bottom side) of the light-emitting element (LE).

[0277] FIG. 17 illustrates that a protective film (INS) is disposed on the sides of the first semiconductor layer (SEM1), the sides of the active layer (MQW), and the sides of the second semiconductor layer (SEM2) of the semiconductor stack (STC), but is not disposed on the sides of the third semiconductor layer (SEM3); however, embodiments of the present specification are not limited thereto. As an example, the protective film (INS) may be disposed on the sides of the first semiconductor layer (SEM1), the sides of the active layer (MQW), the sides of the second semiconductor layer (SEM2), and the sides of the third semiconductor layer (SEM3) of the semiconductor stack (STC).

[0278] The organic partition (BWL) can be formed on the second flattened organic film (180) with a first inclination angle (θ1) and a first height (h1).

[0279] The first inclination angle (θ1) may be 120 degrees or more. Preferably, the first inclination angle (θ1) may be about 120 degrees to 135 degrees. The first height (h1) may be about 5 µm to 6 µm.

[0280] An organic barrier (BWL) may define a first aperture region (OP-A). The first aperture region (OP-A) may expose a second planarized organic film (180) which is a lower layer, pixel electrodes (PXE1, PXE2, PXE3), and a common electrode (CE). The area exposed by the first aperture region (OP-A) may be larger than the area of ​​the light-emitting element (LE).

[0281] The organic partition (BWL) may include a first organic layer (190) defining the shape of the partition, a first protective film (INS1) covering the first organic layer (190), a reflective film (RF), and a second protective film (INS2).

[0282] A reflective film (RF) is positioned outside the first protective film (INS1). A second protective film (INS2) is positioned on top of the reflective film (RF). The reflective film (RF) is surrounded by the first protective film (INS1) and the second protective film (INS2).

[0283] The reflective film (RF) may be a closed-loop shape that surrounds the side of the light-emitting element (LE) while being spaced apart from the light-emitting element (LE) in a planar plane. The top of the reflective film (RF) may be positioned higher than the active layer (MQW) of the light-emitting element (LE). The bottom of the reflective film (RF) may be positioned lower than the light-emitting element (LE). The reflective film (RF) may include a highly reflective metallic material such as aluminum (Al).

[0284] The vertical distance from the shortest part to the bottom part of the reflective film (RF) is 80% to 120% of the height of the light-emitting element (LE).

[0285] A plurality of light-emitting elements (LEs) can be placed on pixel electrodes (PXE1, PXE2, PXE3) and a common electrode (CE).

[0286] A first contact electrode (CTE1) may be disposed on pixel electrodes (PXE1, PXE2, PXE3) and a second contact electrode (CTE2) may be disposed on a common electrode (CE).

[0287] A hole (LEH) may be formed that penetrates the conductive layer (E1), the first semiconductor layer (SEM1), and the active layer (MQW) of the light-emitting element (LE) to expose the second semiconductor layer (SEM2). The hole (LEH) may have a circular planar shape, but the embodiments of this specification are not limited thereto. As an example, the hole (LEH) may have a polygonal planar shape such as an ellipse or a square.

[0288] Additionally, the protective film (INS) may be disposed on the sidewall of the conductive layer (E1) exposed in the hole (LEH), the sidewall of the first semiconductor layer (SEM1), the active layer (MQW), and the sidewall of the second semiconductor layer (SEM2). The protective film (INS) may not cover the second semiconductor layer (SEM2) in the hole (LEH).

[0289] The first contact electrode (CTE1) can be disposed on one side of the conductive layer (E1). Therefore, the first contact electrode (CTE1) can be electrically connected to the conductive layer (E1).

[0290] The second contact electrode (CTE2) may be disposed on one side of the conductive layer (E1) spaced apart from the first contact electrode (CTE1). The second contact electrode (CTE2) may be disposed on a protective film (INS) disposed in the hole (LEH) and on a second semiconductor layer (SEM2) exposed in the hole (LEH) without being covered by the protective film (INS). Therefore, the second contact electrode (CTE2) may be electrically connected to the second semiconductor layer (SEM2) in the hole (LEH).

[0291] FIG. 18 is a cross-sectional view showing another example of region B of FIG. 16 in detail.

[0292] The embodiment of FIG. 18 differs from the embodiment of FIG. 17 in that the organic partition (BWL) includes a first organic layer (191) and a second organic layer (192). In FIG. 18, descriptions that overlap with the embodiment of FIG. 17 are omitted, and the explanation focuses on the differences from the embodiment of FIG. 17.

[0293] Referring to FIG. 18, the organic partition (BWL) may include a first organic layer (191) and a second organic layer (192) disposed on the first organic layer (191).

[0294] The first organic layer (191) and the second organic layer (192) have different slopes.

[0295] The angle of inclination (θ11) of the first organic layer (191) may be greater than the second angle of inclination (θ12) of the second organic layer (192). The average of the angle of inclination (θ11) of the first organic layer (191) and the second angle of inclination (θ12) of the second organic layer (192) may be 120 degrees or more, and preferably about 120 to 135 degrees. For example, as shown in FIG. 10, the angle of inclination (θ11) of the first organic layer (191) is about 132 degrees and the second angle of inclination (θ12) of the second organic layer (192) is about 113.5 degrees, and the average of the angle of inclination (θ11) of the first organic layer (191) and the second angle of inclination (θ12) of the second organic layer (192) may be about 122.8 degrees. The sum of the heights of the first organic layer (191) and the second organic layer (192) may be 4.48 μm.

[0296] FIG. 19 is a cross-sectional view showing another example of region B of FIG. 16 in detail.

[0297] The embodiment of FIG. 19 differs from the embodiment of FIG. 15 in that the organic partition (BWL) includes a first organic layer (191-1), a second organic layer (192-1), and a third organic layer (193). In FIG. 17, descriptions that overlap with the embodiment of FIG. 15 are omitted, and the explanation focuses on the differences from the embodiment of FIG. 15.

[0298] Referring to FIG. 19, the organic partition (BWL) may include a first organic layer (191-1) and a second organic layer (192-1) disposed on the first organic layer (191-1). Additionally, the organic partition (BWL) may further include a third organic layer (193) disposed on the second organic layer (192-1).

[0299] The first organic layer (191-1), the second organic layer (192-1), and the third organic layer (193) have different inclinations. The inclination of the organic layer placed at the bottom may be greater. For example, the inclination angle (θ21) of the first organic layer (191-1) may be greater than the inclination angle (θ22) of the second organic layer (192-1), and the inclination angle (θ22) of the second organic layer (192-1) may be greater than the inclination angle (θ23) of the third organic layer (193).

[0300] The average of the inclination angles of the plurality of organic layers is about 120 degrees or more, and preferably about 120 to 135 degrees. For example, the average of the inclination angle (θ21) of the first organic layer (191-1), the inclination angle (θ22) of the second organic layer (192-1), and the inclination angle (θ23) of the third organic layer (193) may be about 120 to 135 degrees.

[0301] Figure 20 is a graph showing LEE and brightness according to the angle of the organic partition, and Figure 21 is a graph showing the light emission profile according to the angle of the organic partition.

[0302] The embodiment of FIG. 20 shows LEE (a) and luminance (b) that appear when the inclination angle of the organic barrier (BWL) is changed in the display device of FIG. 6 and FIG. 7, and the embodiment of FIG. 21 shows a frontal light emission profile that appears when the inclination angle of the organic barrier (BWL) is changed in the display device of FIG. 6 and FIG. 7. In FIG. 21, the unit of the frontal light emission profile is nit.

[0303] The angle of inclination of the organic barrier (BWL) is the same as the angle of inclination of the first organic layer (190) and the angle of inclination of the reflective film (RF). For example, if the angle of inclination of the organic barrier (BWL) is 120 degrees, the angle of inclination of the first organic layer (190) of the organic barrier (BWL) and the angle of inclination of the reflective film (RF) may also be 120 degrees.

[0304] Referring to FIG. 20, when LEE (a) and luminance (b) are based on an inclination angle of 90 degrees of the organic partition (BWL), it can be seen that as the inclination angle of the organic partition (BWL) increases, LEE (a) and luminance (b) generally increase.

[0305] Specifically, compared to the reference organic partition (BWL) angle of inclination of 90 degrees, when the organic partition (BWL) angle of inclination is 100 degrees, LEE(a) and luminance (b) increase slightly to 104% and 104%, and when the organic partition (BWL) angle of inclination is 100 degrees, LEE(a) and luminance (b) increase slightly to 129% and 105%, respectively. Additionally, compared to the reference organic partition (BWL) angle of inclination of 90 degrees, when the organic partition (BWL) angle of inclination is 120 degrees, LEE(a) increases significantly to 152% and luminance (b) increases significantly to 222%, and when the organic partition (BWL) angle of inclination is 100 degrees, LEE(a) increases significantly to 168% and luminance (b) increases significantly to 279%.

[0306] As such, it can be seen that LEE(a) and luminance(b) increased significantly based on 120 degrees.

[0307] Referring to FIG. 21, when the inclination angle of the organic partition (BWL) is 90 degrees and the LEE (a) and luminance (b) are used as a reference, it can be seen that when the inclination angle of the organic partition (BWL) is 120 degrees or more, the frontal light emission profile from -60 to +60 increases significantly.

[0308] Accordingly, in the display device according to the present embodiment, the average inclination angle of the organic partition (BMW) is set to 120 degrees or more, thereby improving LEE (a), brightness (b), and front light emission efficiency.

[0309] FIG. 22 is a flowchart showing a method for manufacturing a display device according to one embodiment.

[0310] FIGS. 23 to 28 are drawings for explaining a method of manufacturing a display device according to one embodiment.

[0311] Hereinafter, a method for manufacturing a display device according to one embodiment is described in detail by combining FIG. 22 with FIG. 23 to 28. The method for manufacturing a display device described with reference to FIG. 23 to 28 may be a display device comprising a light-emitting element and a display panel described with reference to FIG. 5 to 7. FIG. 23 to 28 are cross-sectional views of a display panel corresponding to FIG. 7. In some drawings, a plan view corresponding to the cross-sectional view is also shown for convenience of explanation.

[0312] First, a pixel electrode layer is formed on the circuit board (S110 of FIG. 22).

[0313] As illustrated in FIG. 23, the circuit board includes a second planarizing organic film (180) and forms a pixel electrode (PXE) on the second planarizing organic film (180). For example, a conductive material layer is deposited entirely on the second planarizing organic film (180), a mask pattern is formed on the conductive material layer, and the conductive material layer not covered by the mask pattern is etched. Subsequently, the pixel electrode (PXE) is formed by removing the mask pattern through an ashing process. In another embodiment, as illustrated in FIG. 14a, FIG. 14b and FIG. 15, a pixel electrode and a common electrode may be formed as a pixel electrode layer on the second planarizing organic film (180).

[0314] Secondly, a first organic layer (190) having a first opening region (OP-A) is formed (S120 of FIG. 22).

[0315] Referring to FIG. 24, the first organic layer (190) having a first opening region (OP-A) can be formed by an inkjet process using an organic material, but is not limited thereto.

[0316] The inclination angle (θ1) of the first organic layer (190) may be 120 to 135 degrees.

[0317] In FIG. 24, the first organic layer (190) is formed as a single layer, but is not limited thereto and can be formed as a multilayer organic layer as shown in FIG. 8 to FIG. 12. When formed as a multilayer organic layer, a lower organic layer can be formed, and an upper organic layer can be formed on the organic layer. When forming a multilayer organic layer, the average of the inclination angles of each organic layer can be 120 to 135 degrees.

[0318] Third, an organic barrier (BWL) is formed by placing a first protective film (INS1), a reflective film (RF), and a second protective film (INS2) on the first organic layer (190). (S130 of FIG. 22)

[0319] Referring to FIG. 25, a protective material layer is formed on the front surface of the second planarizing organic film (180) of the circuit board. Next, a reflective material layer is deposited on the front surface of the second planarizing organic film (180), and the reflective material layer is patterned to form a reflective film (RF) outside the first protective layer (INS1) that overlaps with the first organic layer (190). Subsequently, a protective material layer is formed on the front surface of the second planarizing organic film (180) to completely cover the reflective film (RF). Subsequently, a portion of the protective material layers within the first aperture region (OP-A) is removed from a portion of the second planarizing organic film (180) surrounding the pixel electrode (PXE) and the pixel electrode (PXE). Thus, a raised barrier (BWL) having a three-layer structure of the first protective film (INS1), the reflective film (RF), and the second protective film (INS2) is formed on the first organic layer (190). The reflective film (RF) can be surrounded by the first protective film (INS1) and the second protective film (INS2).

[0320] Fourth, a light-emitting element (LE) is placed on the pixel electrode layer. (S140 of FIG. 22)

[0321] Light-emitting diodes (LEs) can be grown on a semiconductor substrate. The semiconductor substrate can be a silicon wafer substrate or a sapphire substrate.

[0322] A plurality of semiconductor layers can be formed on a semiconductor substrate through an epitaxial growth process. As an epitaxial growth process, electron beam deposition, physical vapor deposition (PVD), chemical vapor deposition (CVD), plasma laser deposition (PLD), dual-type thermal evaporation, sputtering, metal-organic chemical vapor deposition (MOCVD), etc., may be used. Preferably, metal-organic chemical vapor deposition (MOCVD) may be used, but the embodiments of this specification are not limited thereto. The plurality of semiconductor layers may include a first semiconductor layer, an active layer, and a second semiconductor layer.

[0323] After forming a semiconductor layer, a conductive layer and a contact electrode can be formed on the semiconductor layer.

[0324] Referring to FIG. 27, light-emitting elements (LEs) can be transferred directly from a semiconductor substrate onto a pixel electrode layer (e.g., a pixel electrode (PXE)). Alternatively, light-emitting elements (LEs) can be transferred onto pixel electrodes (PXE) via an electrostatic method using an electrostatic head or a stamping method using an elastic polymer material such as PDMS or silicon as a transfer substrate.

[0325] Fifth, a common electrode (CE) is formed (S150 in FIG. 22).

[0326] Referring to FIG. 27, a second organic layer (211) is formed to fix the light-emitting elements (LE) and flatten the step difference caused by the light-emitting elements (LE). The second organic layer (211) can expose the upper surface of the light-emitting elements (LE).

[0327] Referring to FIG. 28, a common electrode (CE) is formed on the light-emitting element (LE) and the third organic layer (211). The common electrode (CE) can be in direct contact with the light-emitting element (LE).

[0328] Afterwards, one or more of the light-blocking layer, wavelength conversion layer, light-transmitting layer, and color filter layer are additionally formed as shown in FIG. 7.

[0329] FIG. 29 is a plan view of a display panel according to another embodiment.

[0330] As illustrated in FIG. 29, the display area (DA) of the display panel may be divided into a plurality of areas. For example, the display area (DA) may include a first area (DA-a1) and a second area (DA-a2).

[0331] The second region (Da-a2) may be positioned adjacent to the first region (DA-a1). The second region (Da-a2) may be an outer region of the first region (DA-a1). The second region (Da-a2) may be positioned to surround the first region (DA-a1). The second region (Da-a2) may be an edge region of the first region (DA-a1).

[0332] The first region (DA-a1) may be a region with higher luminance than the second region (Da-a2). Each of the first region (DA-a1) and the second region (DA-a2) may include a plurality of pixels (PX), and each of the plurality of pixels (PX) may include a plurality of subpixels (SPX).

[0333] Each subpixel (SPX) of the first region (DA-a1) may include any one of the subpixels (SPX) described with reference to FIGS. 6 to 17. For example, the subpixel (SPX) of the first region (DA-a1) may include a pixel electrode layer disposed on a thin-film transistor layer (TFTL of FIG. 6), a light-emitting element (LE) disposed on the pixel electrode layer, and an organic barrier (BWL). Additionally, the subpixel (SPX) of the second region (DA-a2) may include a pixel electrode layer disposed on a thin-film transistor layer (TFTL of FIG. 6), a light-emitting element (LE) disposed on the pixel electrode layer, and an organic barrier (BWL) surrounding the light-emitting element (LE).

[0334] Meanwhile, if the first region (DA-a1) has a higher luminance than the second region (Da-a2), the average of the inclination angles of the reflective layers included in the organic partition (BWL) placed in the first region (DA-a1) may be greater than the average of the inclination angles of the reflective layers included in the organic partition (BWL) placed in the second region (DA-a2). The average of the inclination angles of the reflective layers included in the organic partition (BWL) placed in the first region (DA-a1) is 120 degrees or more, and preferably between 120 and 135 degrees.

[0335] Figure 30 is a graph showing the simulation results of light emission from a light-emitting element depending on the presence or absence of an organic barrier.

[0336] Figure 30 (a) shows the light emission simulation result when the display device does not include an organic partition, and Figure 30 (b) shows the light emission simulation result when the display device includes an organic partition (one embodiment of Figure 8).

[0337] Referring to Figures 30 (a) and (b), it can be seen that when the display device includes an organic partition, the light emission efficiency from the front increases.

[0338] FIGS. 31 and 32 are drawings for explaining the criteria for measuring the angle of the outer surface of an organic partition according to one embodiment.

[0339] A reference plane is required to measure the angle of the inclined surface of the organic barrier (BWL). The reference plane can be defined by a light-emitting element (LE). The reference plane can be set as the interface between the active layer and the second semiconductor layer; however, if it is not easy to locate the interface between the active layer and the second semiconductor layer, the reference plane can be found as follows.

[0340] Referring to FIG. 31, in the case of a vertical type light-emitting element (LE) according to one embodiment, the reference plane can be set as a plane (BAP1) passing through the point halfway up the height of the light-emitting element (LE). The point halfway up the height of the light-emitting element (LE) can be identified by measuring the height of the highest point of the light-emitting element (LE) and finding the point that is half the height to the highest point (h-LE).

[0341] Referring to FIG. 32, in the case of a flip-type light-emitting element (LE) according to one embodiment, the reference plane can be set as a plane (BAP2) passing through half the height (h-LEH) between the end surface (ESP) of the light-emitting element (LE) and the bottom surface (BSP) of the hole (LEH). Meanwhile, to measure the angle of the outer surface of the organic partition (BWL), a measurement area is first set. The measurement area is set to include the outer surface of the organic partition (BWL) corresponding to the reference plane.

[0342] Next, measure the width and height of the measurement area. Calculate the angle of inclination using the tangent value of the height of the measurement area relative to the width of the measurement area.

[0343] To measure the angle of the outer surface of the organic partition, equipment capable of measuring thickness (step difference) and width may be used. Examples of equipment capable of measuring thickness (step difference) and width include CD-SEM, AFM, WSI (white-light scanning interferometer / confocal, etc.).

[0344] FIGS. 33 and FIGS. 34 are drawings showing a smart watch including a display device according to one embodiment.

[0345] Referring to FIGS. 33 and 34, a display device (10_1) according to one embodiment can be applied to a smart watch (1000_1), which is one of the smart devices.

[0346] The planar shape of the display device (10_1) may be square or circular, but is not limited thereto and can be varied in various ways, such as elliptical.

[0347] FIG. 35 is an exploded view of a smart watch including a display device according to one embodiment.

[0348] Referring to FIG. 35, the smart watch (1000_1) may include a main body unit (BP) and a wearable part (BD).

[0349] The main body unit (BP) may include a display panel (100) on which an image is displayed, a cover window (CW) placed on the display panel (100), a lower cover (BC) placed below the display panel (100), a middle frame (MF) placed between the cover window (CW) and the lower cover (BC), and a battery (BR) placed between the middle frame (MF) and the lower cover (BC). In addition, in addition to the battery (BR), a circuit board on which a main processor controlling the smart watch (1000_1), a communication chipset communicating with the outside via wired or wireless communication, and memory are mounted may be additionally placed between the middle frame (MF) and the lower cover (BC).

[0350] The main body unit (BP) may have a lower cover (BC), a battery (BR), a middle frame (MF), a display panel (100), and a cover window (CW) arranged sequentially.

[0351] A cover window (CW) is positioned on the upper part of a display panel (10) to protect the display panel (10) and to transmit light emitted from the display panel (10). As described above, the cover window (CW) may include a light-blocking portion to block a portion of the light emitted from the display panel (10). The cover window (CW) may be made of a transparent plastic material, a glass material, or a reinforced glass material.

[0352] A cover window (CW) may be positioned to overlap the display panel (10) and cover the front of the display panel (10). The cover window (CW) generally has a shape similar to the display panel (10) in planar form, but its size may be larger than that of the display panel (10). For example, the cover window (CW) may protrude outward from the display panel (10). The planar shape of the cover window (CW) may be the same as the planar shape of the main body unit (BP). For example, the planar shape of the cover window (CW) may generally be circular, but is not limited thereto and may have various shapes, such as a polygon (e.g., square) or an ellipse.

[0353] The middle frame (MF) is positioned between the cover window (CW) and the lower cover (BC) as a connecting member for joining the cover window (CW) and the lower cover (BC). For example, the middle frame (MF) may include a bracket.

[0354] The lower cover (BC) is a housing placed at the bottom of the display panel (10).

[0355] The lower cover (BC) may include a central cover portion (BCP) and a peripheral portion (BS) positioned around the central cover portion (BCP).

[0356] The central cover portion (BCP) is located in the center of the lower cover (BC) and can be generally flat.

[0357] The periphery (BS) may be positioned to surround the central cover portion (BCP). The periphery (BS) may be a bent portion formed by being folded from the central cover portion (BCP). The periphery (BS) may be folded from the edge of the central portion (CP). In some embodiments, the periphery (BS) may include a curved surface having a certain curvature in part, and a flat part in other parts. The degree (or angle) at which the periphery (BS) is folded from the central cover portion (BCP) may be obtuse, but is not limited thereto, and may be right or acute.

[0358] A storage space (BC-S) can be formed by the central cover portion (BCP) and the peripheral portion (BS). A battery (BR) can be placed in the storage space (BC-S).

[0359] The battery (BR) can be connected to a circuit board on which the main processor, etc. is mounted. The display device (10_1) is electrically connected to the circuit board and can receive digital video signals, timing signals, power, etc.

[0360] The lower cover (BC) is positioned on the outermost rear surface of the electronic device and comprises at least one material among plastic, metal, and glass, and may include a color coating layer. For example, the lower cover (BC) according to one example may be a flat glass having a transparent, translucent, or opaque color coating layer.

[0361] According to another example, the lower cover (BC) may include a glass material having the same shape as the cover window (CW) and a color coating layer. For example, according to another example, the lower cover (BC) may have a structure symmetrical to the cover window (CW) with the middle frame (MF) in between and may include a transparent, translucent, or opaque color coating layer.

[0362] The wearing part (BD) is a part for securing the main body unit (BP) to the user's wrist, etc., and may be, for example, any one of a strap, a chain, and a bracelet.

[0363] FIGS. 36 and FIGS. 37 are exemplary drawings showing a virtual reality device including a display device according to one embodiment.

[0364] Referring to FIGS. 36 and 37, a head-mounted display device (1000_2) according to one embodiment includes a first display device (10_2), a second display device (10_3), a display device storage unit (1100), a storage unit cover (1200), a first eyepiece (1210), a second eyepiece (1220), a head-mounted band (1300), a middle frame (1400), a first optical member (1510), a second optical member (1520), and a control circuit board (1600).

[0365] The first display device (10_2) provides an image to the user's left eye, and the second display device (10_3) provides an image to the user's right eye. Since each of the first display device (10_2) and the second display device (10_3) is substantially the same as the display device (10) described in conjunction with FIG. 1 and FIG. 2, the description of the first display device (10_2) and the second display device (10_3) is omitted.

[0366] The first optical member (1510) may be positioned between the first display device (10_2) and the first eyepiece (1210). The second optical member (1520) may be positioned between the second display device (10_3) and the second eyepiece (1220). Each of the first optical member (1510) and the second optical member (1520) may include at least one convex lens.

[0367] The middle frame (1400) is positioned between the first display device (10_2) and the control circuit board (1600), and may be positioned between the second display device (10_3) and the control circuit board (1600). The middle frame (1400) serves to support and fix the first display device (10_2), the second display device (10_3), and the control circuit board (1600).

[0368] The control circuit board (1600) may be placed between the middle frame (1400) and the display device housing (1100). The control circuit board (1600) may be connected to the first display device (10_2) and the second display device (10_3) through a connector. The control circuit board (1600) may convert an image source input from the outside into digital video data (DATA) and transmit the digital video data (DATA) to the first display device (10_2) and the second display device (10_3) through the connector.

[0369] The control circuit board (1600) can transmit digital video data (DATA) corresponding to a left-eye image optimized for the user's left eye to the first display device (10_2) and digital video data (DATA) corresponding to a right-eye image optimized for the user's right eye to the second display device (10_3). Alternatively, the control circuit board (1600) can transmit the same digital video data (DATA) to the first display device (10_2) and the second display device (10_3).

[0370] The display device housing (1100) serves to house the first display device (10_2), the second display device (10_3), the middle frame (1400), the first optical member (1510), the second optical member (1520), and the control circuit board (1600). The housing cover (1200) is positioned to cover an open side of the display device housing (1100). The housing cover (1200) may include a first eyepiece (1210) in which the user's left eye is positioned and a second eyepiece (1220) in which the user's right eye is positioned. Although FIGS. 36 and 37 illustrate the first eyepiece (1210) and the second eyepiece (1220) being positioned separately, the embodiments of this specification are not limited thereto. The first eyepiece (1210) and the second eyepiece (1220) may be combined into one.

[0371] The first eyepiece (1210) is aligned with the first display device (10_2) and the first optical member (1510), and the second eyepiece (1220) can be aligned with the second display device (10_3) and the second optical member (1520). Accordingly, the user can view an image of the first display device (10_2) magnified into a virtual image by the first optical member (1510) through the first eyepiece (1210), and can view an image of the second display device (10_3) magnified into a virtual image by the second optical member (1520) through the second eyepiece (1220).

[0372] The head mounting band (1300) serves to secure the display device storage unit (1100) to the user's head so that the first eyepiece (1210) and the second eyepiece (1220) of the storage unit cover (1200) can be positioned on the user's left and right eyes, respectively. When the display device storage unit (1200) is implemented as a lightweight and compact unit, the head-mounted display device (1000) may be equipped with an eyeglass frame as shown in FIG. 32 instead of the head mounting band (800).

[0373] In addition, the head-mounted display device (1000) may further be equipped with a battery for supplying power, an external memory slot for storing external memory, an external connection port for receiving video sources, and a wireless communication module. The external connection port may be a USB (universe serial bus) terminal, a display port, or an HDMI (high-definition multimedia interface) terminal, and the wireless communication module may be a 5G communication module, a 4G communication module, a Wi-Fi module, or a Bluetooth module.

[0374] FIG. 38 is an example drawing showing a virtual reality device including a display device according to another embodiment. FIG. 39 shows a virtual reality device (1000_3) to which a display device (10_4) according to one embodiment is applied.

[0375] Referring to FIG. 38, a virtual reality device (1000_3) according to one embodiment may be a device in the form of glasses. A virtual reality device (1000_3) according to one embodiment may have a display device (10_4), a left eye lens (10a), a right eye lens (10b), a support frame (20), eyeglass frame legs (30a, 30b), a reflective member (40), and a display device housing (50).

[0376] FIG. 38 illustrates a virtual reality device (1000_3) that is an eyeglass-type display device including eyeglass frame temples (30a, 30b). That is, the virtual reality device (1000_3) according to one embodiment is not limited to that shown in FIG. 38 and can be applied in various forms in various other electronic devices.

[0377] The display device housing (50) may include a display device (10_4) and a reflective member (40). An image displayed on the display device (10_4) may be reflected from the reflective member (40) and provided to the user's right eye through the right eye lens (10b). As a result, the user can view the virtual reality image displayed on the display device (10_4) through their right eye.

[0378] FIG. 38 illustrates that the display device housing (50) is positioned at the right end of the support frame (20), but the embodiments of this specification are not limited thereto. For example, the display device housing (50) may be positioned at the left end of the support frame (20), in which case the image displayed on the display device (10_4) may be reflected from the reflective member (40) and provided to the user's left eye through the left eye lens (10a). As a result, the user can view the virtual reality image displayed on the display device (10_4) through the left eye. Alternatively, the display device housing (50) may be positioned at both the left end and the right end of the support frame (20), in which case the user can view the virtual reality image displayed on the display device (10_4) through both the left eye and the right eye.

[0379] FIG. 39 is an exemplary drawing showing an automobile instrument panel and a center fascia including display devices according to one embodiment. FIG. 39 shows an automobile with display devices (10_a, 10_b, 10_c, 10_d, 10_e) according to one embodiment applied.

[0380] Referring to FIG. 39, display devices (10_a, 10_b, 10_c) according to one embodiment may be applied to an instrument panel of a vehicle, to a center fascia of a vehicle, or to a Center Information Display (CID) placed on the dashboard of a vehicle. Additionally, display devices (10_d, 10_e) according to one embodiment may be applied to a room mirror display that replaces a side mirror of a vehicle.

[0381] FIG. 40 is an exemplary drawing showing a transparent display device including a display device according to one embodiment.

[0382] Referring to FIG. 40, a display device (10_5) according to one embodiment can be applied to a transparent display device. The transparent display device can display an image (IM) and transmit light at the same time. Therefore, a user located in front of the transparent display device can not only view the image (IM) displayed on the display device (10_5), but also see an object (RS) or background located on the back of the transparent display device. When the display device (10_5) is applied to a transparent display device, the substrate of the display device (10_5) may include a light-transmitting portion capable of transmitting light, or be formed of a material capable of transmitting light.

[0383] Although embodiments of the present invention have been described above with reference to the attached drawings, those skilled in the art will understand that the present invention may be implemented in other specific forms without changing the technical concept or essential features thereof. Therefore, the embodiments described above should be understood as illustrative in all respects and not restrictive.

Claims

1. Substrate; A thin-film transistor layer disposed on the above substrate; A planarization layer disposed on the above thin film transistor layer; A pixel electrode layer disposed on the above-mentioned planarization layer; A plurality of light-emitting elements, including a first light-emitting element and a second light-emitting element arranged along a first direction on the pixel electrode layer; The organic partition portion is disposed between the first light-emitting element and the second light-emitting element on the planarization layer and includes a first inclined portion formed toward the first light-emitting element and a second inclined portion formed toward the second light-emitting element. The above-mentioned first light-emitting element includes a first semiconductor layer, a first active layer emitting light of a first wavelength, and a second semiconductor layer. The above second light-emitting element comprises a first semiconductor layer, a second active layer that emits light of a second wavelength different from the first wavelength, and a second semiconductor layer. The above organic barrier portion has a first angle formed by the outer surface of the first inclination portion and the first virtual surface at the point where the first virtual surface extending parallel to the boundary surface between the second semiconductor layer and the first active layer of the first light-emitting element intersects the first inclination portion; and a second angle formed by the outer surface of the second inclination portion and the second virtual surface extending parallel to the boundary surface between the second semiconductor layer and the second active layer of the second light-emitting element intersects the second inclination portion. A display device in which the first angle is 120 degrees or more, and the second angle is 5 degrees or more greater than the first angle and 135 degrees or less.

2. In Paragraph 1, The above organic partition includes a first-second inclined section positioned above the first inclined section, and The second semiconductor layer of the first light-emitting element includes a lower surface facing the first active layer and an upper surface facing the lower surface, The above organic partition has a first-2 angle formed by the outer surface of the first-2 imaginary plane and the first-2 inclined plane at the point where the first-2 imaginary plane, which is extended parallel to the upper surface, and the first-2 inclined plane intersects. A display device in which the first-2 angle is smaller than the first angle, and the average of the first angle and the first-2 angle is 120 degrees or more.

3. In Paragraph 2, A display device in which the average of the first angle and the first-second angle is 120 to 135 degrees.

4. In Paragraph 2, The above organic partition includes an organic layer having the first inclined portion and the second inclined portion, and further includes a reflective film disposed on the organic layer. The above reflective film comprises a first reflective film disposed on the outer surface of the first inclined portion, and It includes a second reflective film disposed on the outer surface of the second inclined portion, and The above reflective film is a third angle formed by the outer surface of the first reflective film and the first imaginary surface; and It has a fourth angle formed by the outer surface of the second reflective film and the second virtual surface, and A display device in which the third angle is 120 degrees or more, and the fourth angle is 5 degrees or more greater than the third angle and 135 degrees or less.

5. A display device according to claim 4, further comprising a first protective film disposed between the organic layer and the reflective film, and a second protective film disposed outside the reflective film.

6. In Paragraph 4, A display device in which the inflection points of the first reflective film and the second reflective film are located higher than the upper part of the first active layer.

7. In Paragraph 4, The lower portion of the above reflective film is positioned lower than the lower portion of the above light-emitting element, and A display device in which the shortest distance between the above-mentioned reflective film and the corresponding light-emitting element is smaller than the width of the corresponding light-emitting element.

8. In Paragraph 1, The above organic partition is a display device that surrounds the corresponding light-emitting element on a flat surface.

9. In Paragraph 1, A display device in which the upper surface of the above-mentioned reflective film is located at a height of 80% or more and 120% or less of the height of the above-mentioned light-emitting element.

10. In Paragraph 1, Each of the plurality of light-emitting elements further includes a protective film disposed on the side of the first semiconductor layer, the active layer, and the second semiconductor layer, and A display device in which each of the plurality of light-emitting elements does not have a reflective film disposed on the side of the first semiconductor layer, the active layer, and the second semiconductor layer on the protective film.

11. In Paragraph 10, The above plurality of light-emitting elements further include a common electrode, and The pixel electrode layer includes the pixel electrode, A display device in which the plurality of light-emitting elements are each disposed on a corresponding pixel electrode.

12. In Paragraph 11, The pixel electrode layer includes pixel electrodes and a common electrode arranged spaced apart from each other. A display device in which the plurality of light-emitting elements are each disposed on a common electrode and a corresponding pixel electrode.

13. In Paragraph 12, A display device comprising a plurality of light-emitting elements, each including a first contact electrode disposed on a corresponding pixel electrode and a second contact electrode disposed on a common electrode.

14. A step of arranging a plurality of pixel electrodes on a planarization layer of a circuit board; A step of disposing of an organic partition portion having a first inclined portion and a second inclined portion, disposed between a first pixel electrode and a second pixel electrode on the circuit board on a flat plane; Step of placing a reflective film on the above organic partition; and A step of placing a first light-emitting element comprising a first semiconductor layer, a first active layer emitting light of a first wavelength, and a second semiconductor layer on the first pixel electrode; The method includes the step of placing a second light-emitting element comprising a first semiconductor layer, a second active layer emitting light of a second wavelength different from the first wavelength, and a second semiconductor layer on the second pixel electrode. The above organic barrier portion has a first angle formed by the outer surface of the first inclination portion and the first virtual surface at the point where the first virtual surface extending parallel to the boundary surface between the second semiconductor layer and the first active layer of the first light-emitting element intersects the first inclination portion; and a second angle formed by the outer surface of the second inclination portion and the second virtual surface extending parallel to the boundary surface between the second semiconductor layer and the second active layer of the second light-emitting element intersects the second inclination portion. A method for manufacturing a display device in which the first angle is 120 degrees or more, and the second angle is 5 degrees or more greater than the first angle and 135 degrees or less.

15. In Paragraph 14, The step of arranging the above organic partition is, A first organic layer is disposed on the above circuit board, and A second organic layer having a first-2 angle formed by the outer surface of the first-2 inclination portion and the first-2 imaginary surface, at the point where the first-2 imaginary surface extended parallel to the upper surface and the second inclination portion intersect, is disposed on the first organic layer, and A method for manufacturing a display device in which the first-2 angle is smaller than the first angle, and the average of the first angle and the first-2 angle is 120 degrees or more.

16. In Paragraph 15, The step of placing the above reflective film is, A first protective material layer covering the first organic layer and the second organic layer is disposed on the front surface of the circuit board, and A reflective film is disposed on the protective material layer that overlaps with the first organic layer and the second organic layer, and A method for manufacturing a display device, wherein a second protective material layer is formed on the front surface of the circuit board to cover the reflective film, and then a portion of the first protective material layer and the second protective material layer is patterned to expose a pixel electrode corresponding to either the first pixel electrode or the second pixel electrode, thereby forming a first protective film and a second protective film.

17. As an electronic device, Display panel; A window placed on the above-mentioned display panel; and It includes a lower cover positioned at the bottom of the above-mentioned display panel, and The above display panel is, Substrate; A thin-film transistor layer disposed on the above substrate; A planarization layer disposed on the above thin film transistor layer; A pixel electrode layer disposed on the above-mentioned planarization layer; A plurality of light-emitting elements, including a first light-emitting element and a second light-emitting element arranged along a first direction on the pixel electrode layer; The organic partition portion is disposed between the first light-emitting element and the second light-emitting element on the planarization layer and includes a first inclined portion formed toward the first light-emitting element and a second inclined portion formed toward the second light-emitting element. The above-mentioned first light-emitting element includes a first semiconductor layer, a first active layer emitting light of a first wavelength, and a second semiconductor layer. The above second light-emitting element comprises a first semiconductor layer, a second active layer that emits light of a second wavelength different from the first wavelength, and a second semiconductor layer. The above organic barrier portion has a first angle formed by the outer surface of the first inclination portion and the first virtual surface at the point where the first virtual surface extending parallel to the boundary surface between the second semiconductor layer and the first active layer of the first light-emitting element intersects the first inclination portion; and a second angle formed by the outer surface of the second inclination portion and the second virtual surface extending parallel to the boundary surface between the second semiconductor layer and the second active layer of the second light-emitting element intersects the second inclination portion. An electronic device in which the first angle is 120 degrees or more, and the second angle is 5 degrees or more greater than the first angle and 135 degrees or less.

18. In Paragraph 17, A battery disposed in the space of the lower cover and supplying power to the display device; and An electronic device further comprising a middle frame disposed between the above window and the above lower cover.

19. In Paragraph 17, The above display device includes a display area and a non-display area, and The above display area includes a first display area and a second display area, and The first display area includes a first-1 light-emitting element on a plane and a first organic partition surrounding the first-1 light-emitting element, and The second display area above includes a second-1 light-emitting element on a plane and a second organic partition surrounding the second-1 light-emitting element, and An electronic device in which the angle formed by the 11-1 virtual plane parallel to the boundary surface between the second semiconductor layer and the first active layer of the 1-1 light-emitting element of the 1-1 organic barrier section and the outer surface of the 1-1 inclined section at the point where the 11-1 virtual plane and the outer surface of the 1-1 inclined section intersect is greater than the angle formed by the 11-2 virtual plane parallel to the boundary surface between the second semiconductor layer and the second active layer of the 2-1 light-emitting element of the 2-1 organic barrier section and the outer surface of the 2-2 inclined section at the point where the 2-2 virtual plane intersects the 2-1 inclined section.

20. In Paragraph 19, The second display area is an electronic device positioned on a plane at the outer edge of the first display area.

Images