Integrated SBD in a trench of a trench mosfet

The integration of a Schottky barrier diode within the trench of a trench MOSFET addresses performance and cost challenges by reducing resistance and capacitance, enhancing current capacity and fault tolerance in high-voltage applications.

WO2026155891A1PCT designated stage Publication Date: 2026-07-23MICROCHIP TECHNOLOGY INC
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Patent Information

Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
MICROCHIP TECHNOLOGY INC
Filing Date
2025-12-31
Publication Date
2026-07-23

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Abstract

A semiconductor device including a volume of semiconductor material, an integrated metal-oxide semiconductor field-effect transistor (MOSFET), and an integrated Schottky barrier diode (SBD). The volume of semiconductor material presents laterally spaced first and second sides and a trench. The trench extends from the first end and is spaced between the sides. The MOSFET includes a split gate comprising a first gate section located within the trench and a laterally spaced apart second gate section located within the trench. The SBD is located within the trench. The SBD includes a Schottky metal.
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Description

61510-USINTEGRATED SBD IN A TRENCH OF A TRENCH MOSFET CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] The current patent application claims the benefit under 35 U.S.C. § 119(e) of the priority date of U.S. Provisional Application Ser. No. 63 / 747,279; titled “INTEGRATED SBD IN A TRENCH OF A TRENCH MOSFET”; and filed January 20, 2025. The Provisional Application is hereby incorporated by reference, in its entirety, into the current patent application as if fully set forth herein.TECHNICAL FIELD

[0002] The present disclosure relates to semiconductor devices including an integrated metal oxide semiconductor field-effect transistor (MOSFET) and an integrated Schottky barrier diode (SBD).BACKGROUND

[0003] A metal oxide semiconductor field-effect transistor (MOSFET) is an active, voltage-controlled semiconductor device, in which varying an electrical voltage between a gate and a body controls an electrical current flowing through a semiconductor channel between a drain and a source. Applications for MOSFETs include amplifiers, switches, resistors, regulators, oscillators, and choppers. It is generally desirable to improve the performance and reduce the cost of MOSFETs, but it can be difficult to do so.

[0004] This background discussion is intended to provide related information, and is not necessarily prior art.SUMMARY OF THE INVENTIONIn various examples of the present disclosure, a semiconductor device includes a volume of semiconductor material, an integrated metal-oxide semiconductor field-effect transistor (MOSFET), and an integrated Schottky barrier diode (SBD). The volume of semiconductor material presents laterally spaced first and second sides and a trench. The trench extends from the first end and is spaced between the sides. The MOSFET includes a split gate comprising a first61510-USgate section located within the trench and a laterally spaced apart second gate section located within the trench. The SBD is located within the trench. The SBD includes a Schottky metal.

[0005] This summary is not intended to identify essential features of the examples, and is not intended to be used to limit the scope of the claims. These and other aspects of the present examples are described below in greater detail.BRIEF DESCRIPTION OF THE DRAWINGS

[0006] FIG. 1 is a cross-sectional elevation view of an example semiconductor device including an integrated MOSFET and integrated SBD; and

[0007] FIGs. 2A-2F are cross-sectional elevation views of an example semiconductor device including an integrated MOSFET and integrated SBD at various stages of manufacture.

[0008] Unless otherwise indicated, the figures provided herein are meant to illustrate features of examples of this disclosure. These features are believed to be applicable in a wide variety of systems comprising one or more examples of this disclosure. As such, the figures are not meant to include all conventional features known by those of ordinary skill in the art to be required for the practice of the examples disclosed herein.DETAILED DESCRIPTION

[0009] In the following detailed description, reference is made to the accompanying drawings, which form a part hereof and in which are shown, by way of illustration, specific examples in which the present disclosure may be practiced. These examples are described in sufficient detail to enable a person of ordinary skill in the art to practice the present disclosure. However, other examples may be utilized, and structural, material, procedural, operational, and other changes may be made without departing from the scope of the disclosure. Unless clearly understood or expressly identified otherwise, structures, materials, procedures, operations, and other aspects described in the context of one example may be incorporated into other examples.

[0010] The illustrations presented herein are not meant to be actual views of any particular method, system, device, or structure, but are merely idealized representations that are employed to describe the examples of the present disclosure. The drawings presented herein are not necessarily drawn to scale. Similar structures or components in the various drawings may retain the same or similar numbering for the convenience of the reader; however, any similarity in numbering does61510-USnot necessarily mean that the structures or components are necessarily identical in size, composition, configuration, or any other property.

[0011] Terms of relative location and direction (e.g., above, below, left, right, upper, lower, vertical, horizontal (or lateral)) may be used to facilitate the present descriptions of examples with reference to the figures, but unless clearly understood or expressly identified otherwise, these terms are not meant to be limiting with regard to location, direction, or overall orientation, and may, for example, change as a result of a change in overall orientation.

[0012] Thus, it will be readily understood that the components of the examples as generally described herein and illustrated in the drawings could be arranged and designed in a wide variety of different configurations. Thus, the following description of various examples is not intended to limit the scope of the present disclosure but is merely representative of various examples.

[0013] Examples provide a semiconductor device including an integrated trench metal-oxide semiconductor field-effect transistor (MOSFET) and integrated Schottky barrier diode (SBD). The example MOSFET may be suitable for high-voltage applications, and may operate at a voltage greater than one thousand (1,000) volts (V). More specifically, the example MOSFET may be rated for a voltage of around twelve hundred (1,200) V. It will be appreciated by one of ordinary skill in the art that the example MOSFET may be suitable for lower voltage applications without departing from the scope of the present disclosure.

[0014] The example semiconductor device may include a volume of semiconductor material including an integrated MOSFET having a split gate configuration including laterally spaced apart first and second gate sections located within the trench, and an integrated SBD. A trench may be provided between the gate sections. An insulating material, such as a gate oxide, may be provided in the trench (and in some cases may fill the trench apart from the gate sections and SBD, as will be described). The SBD may be located in the trench. In various examples, the split gate configuration, the trench, and the integrated SBD may reduce a resistance between the source, gate, and / or drain, thereby improving the current carrying capacity of the semiconductor device in addition to lowering a gate-to-drain capacitance (Cgd).

[0015] Referring to FIG. 1, an example of a semiconductor device 100 is shown. The semiconductor device 100 may generally include a volume of semiconductor material 102 including a trench 122; an integrated MOSFET 103 including a first gate section 104A and a second gate section 104B; and an integrated SBD 150 located within the trench 122.61510-US

[0016] The volume of semiconductor material 102 presents a first end 107, a second end 109 opposite and vertically spaced from the first end 107, a first side 111, and a second side 113 opposite and laterally spaced from the first side 111. The volume of semiconductor material 102 may be constructed from or include an N-type epitaxial semiconductor material. The volume of semiconductor material 102 includes a drift region 132, which in the illustrated example extends along part of and below the trench 122 towards the second end 109.

[0017] A drain 106 may be located at the second end 109 of the volume of semiconductor material 102 and may be constructed from or include an N+ substrate material, although certain examples contemplate the drain being located elsewhere relative to the volume of semiconductor material. The volume of semiconductor material 102 may be grown or otherwise formed on the N+ substrate material. A drain contact 118 may be located adjacent the drain 106 and spaced apart from the second end 109.

[0018] A gate oxide 105 may include first and second gate oxide portions that are located adjacent the gate sections 104 A, 104B. The first and second gate oxide portions may be located adjacent and below the first end 107. In the illustrated example, the gate oxide 105 may fill the trench 122 (except where the trench 122 is occupied by the SBD 150 and / or the gate sections 104A, 104B), although it is within the ambit of other examples for the gate oxide 105 to be otherwise configured, such as lining (but not filling) the trench 122, otherwise partially filling the trench 122, etc. The gate oxide 105 may be constructed from or include a dielectric material, such as silicon dioxide (SiO2). In accordance with certain aspects of various examples, the dielectric material may be formed of non-oxide insulator.

[0019] In various examples, the SBD 150 may include a Schottky metal 152 and an SBD contact 154. The SBD 150 may be located between and below the first and second gate sections 104 A, 104B. The SBD contact 154 may extend between the first end 107 and the Schottky metal 152. The Schottky metal 152 may be located in a second trench portion, as discussed in connection with FIGs. 2D and 2E. The Schottky metal 152 and the SBD contact 154 may be constructed from an electrically conductive metal, such as titanium, molybdenum, platinum, chromium, tungsten, aluminum, and combinations thereof. In various examples, the Schottky metal 152 and the SBD contact 154 may include dissimilar metals, although alternative examples contemplate forming the SBD contact 154 and Schottky metal 152 of the same material. With respect to the SBD contact 154 and the Schottky metal 152 including dissimilar materials, the SBD contact 154 may include61510-UStitanium, copper, or aluminum while the Schottky metal 152 may include tungsten or platinum. The SBD metal 152 may contact the volume of semiconductor material 102 such that when a voltage is applied to the SBD contact 154, the SBD metal 152 and the volume of semiconductor material 102 form a Schottky contact, thereby enabling a flow of electrical energy through the drift region 132. The integrated SBD 150 may improve a switching time of the semiconductor device 100, as the integrated SBD 150 may be activated more quickly than the integrated MOSFET 103. Additionally, the integrated SBD 150 may provide fault tolerance by conducting electrical energy in the event of a failure of one or more components of the integrated MOSFET 103 (e.g., one of the sources 108 A, 108B).

[0020] The first and second gate sections 104 A, 104B may be laterally spaced apart from each other and located adjacent and below the first end 107, with the SBD 150 and a portion of the gate oxide 105 being interposed between the first and second gate sections 104A, 104B. The first gate section 104A may be located closer to the first side 111 than the second gate section 104B. The second gate section 104B may be located closer to the second side 213 than the first gate section 104A. The first and second gate sections 104 A, 104B are located within the trench 122 to define a trench MOSFET configuration of the MOSFET 103. The first and second gate sections 104A, 104B may be constructed from or include a doped polysilicon material. The doped poly silicon may be constructed from or include a P-type or N-type poly silicon material. Gate contacts 116A, 116B may be located above the respective gate sections 104A, 104B. According to some examples, the gate contacts 116A, 116B may be shorted or otherwise electrically connected.

[0021] Various structures and materials of the MOSFET 103 of the semiconductor device 100 may be implanted (using, e.g., an ion implanter), deposited, or otherwise provided using a suitable technique in or on respective subvolumes of the volume semiconductor material 102. These structures and materials and their sizes and positions may vary and include the following. In the illustrated example, the MOSFET 103 includes a first source 108 A, a second source 108B, a first body contact 110A, a second body contact HOB, a first well 112A, and a second well 112B.

[0022] The first and second sources 108 A, 108B may be constructed from or include an N+ material and may be located at the first end 107 and generally opposite the drain 106. The first and second sources 108A, 108B may be located adjacent the trench 122. The first source 108A may be located adjacent the first body contact 110A and the first well 112A. A first source contact61510-US120A and a second source contact 120B may be located above the first end 107, with the first source contact 120A contacting the first source 108A and the first body contact 110A and the second source contact 120B contacting the second source 108B and the second body contact HOB. According to some examples, the source contacts 120A, 120B may be shorted or otherwise electrically connected.

[0023] The first and second body contacts 110 A, 11 OB may be constructed from or include a P+ material and may be located at the first end 107 and adjacent to the respective first and second sources 108A, 108B and adjacent the respective first and second wells 112A, 112B. The first body contact 110A may be located adjacent the first side 111. The second body contact HOB may be located adjacent the second side 113. The first and second wells 112A, 112B may be constructed from or include a P material and may be located below and adjacent to the respective first and second sources 108A, 108B. The first and second wells 112A, 112B may be located adjacent the trench 122.

[0024] The wells 112A, 112B and the body contacts 110A, HOB may be referred to as respective first and second well portions, where the second well portions (e.g., the body contacts 110A, HOB) extend closer toward the second end 109 than the first well portions (e.g., the wells 112A, 112B). The second well portions may extend closer toward the second end 109 than the trench 122. It would be appreciated by one of ordinary skill in the art that the depth of the body contacts 110A, HOB may be variable and, in some examples, the trench may extend towards the second end 109 farther than the body contacts 110A, HOB, without departing from the scope of the present disclosure.

[0025] First and second channels 124A, 124B may be provided by a channel portion of the volume of semiconductor material 102. The first and second channels 124A, 124B extend through the drift region 132 between the respective first and second sources 108A, 108B and the drain 106. The majority charge carriers may move and the electrical current may flow through the channels 124 A, 124B. It will be understood by one of ordinary skill in the art that the dashed lines representing the channels 124A, 124B are merely representative and charge carriers moving through the channels 124A, 124B do not necessarily follow a single, straight line.

[0026] It will be appreciated that the example MOSFET 103 is an N-channel MOSFET. However, certain aspects of the example MOSFET might be applicable to P-channel MOSFETs.61510-US

[0027] In operation, when a voltage, Vgs, is applied between the sources 108 A, 108B and the gate sections 104A, 104B, the generated electric field creates an inversion layer at the semiconductor-dielectric interface. The inversion layer provides the channels 124A, 124B through which electrical current can flow when another voltage, Vds, is applied between the sources 108A, 108B and the drain 106. More specifically, Vgs controls the width of the depletion region at the P-N junction where the charge carriers of the P- and N-type materials diffuse into each other, which "depletes" the available concentrations of majority charge carrier in each material, and thereby controls the current, Id, from the drain 106 to the sources 110A, HOB. In the present examples, the trench 122, the gate oxide 105, and the integrated SBD 150 improves reverse conduction by avoiding bipolar degradation when the parasitic P-N body diode is opened, and provides a much lower gate-to-drain capacitance (Cgd).

[0028] FIGs. 2A-2F illustrate an example semiconductor device 200 during various stages of manufacture. The semiconductor device 200 may include an integrated trench MOSFET 203 and an integrated SBD 250. The integrated MOSFET 203 may be a silicon carbide (SiC) based MOSFET. Example manufacturing steps described may be utilized to form the semiconductor device 100 of FIG. 1, and the components described with respect to the semiconductor device 200 may be analogous to corresponding components of the semiconductor device 100.

[0029] Referring to FIG. 2A, a doped material substrate 206 may be provided. The doped material substrate 206 may be constructed from or include an N+ doped substrate material.

[0030] A volume of semiconductor material 202 may be grown or otherwise deposited on the doped material substrate 206. The volume of semiconductor material 202 may present a first end 207, a second end opposite 209 and vertically spaced from the first end 207, a first side 211, and a second side 213 opposite from and laterally spaced from the first side 211. The doped substrate material 206 may be located at the second end 209.

[0031] The volume of semiconductor material 202 may be constructed from or include an N-type epitaxial semiconductor material. Channels may be formed between the sources 208A, 208B and the doped material substrate 206 so as to extend through the drift region 232, as shown in FIG. 1.

[0032] The volume of semiconductor material 202 may further include respective instances of various structures and materials. The respective instances of the various structures and materials may be implanted (using, e.g., an ion implanter), deposited, or otherwise provided using61510-USa suitable technique in or on respective subvolumes of the volume semiconductor material 202. These structures and materials and their sizes and positions may vary, but may generally include a first source 208 A, a second source 208B, a first body contact 210A, a second body contact 21 OB, a first well 212A, and a second well 212B.

[0033] First and second structures of P material for the respective first and second wells 212A, 212B may be implanted or otherwise provided in the respective subvolumes at the first end 207 of the volume of semiconductor material 202. First and second structures of N+ material for the respective first and second sources 208A, 208B may be implanted or otherwise provided in the respective subvolumes of the volume of semiconductor material 202 at the first end 207, over and adjacent to the respective first and second structures of P material and generally opposite the doped substrate material 206. First and second structures of P+ material for the respective first and second body contacts 210A, 210B may be implanted or otherwise provided adjacent to the respective first and second sources 208A, 208B, such that each body contact 210A, 210B is located between a respective one of the sides 211, 213 and a corresponding one of the sources 208 A, 208B.

[0034] Referring to FIG. 2B, a first trench portion 222 may be formed in the volume of semiconductor material 202. The first trench portion 222 may be formed through an etching process or another suitable technique. In various examples, a mask may be placed across the first end 207 such that etching only occurs in an area in which the first trench portion 222 is formed. The mask may be removed after etching the first trench portion 222.

[0035] The first trench portion 222 may present laterally spaced first and second trench sides 223, 225, and a trench bottom 227 extending between the trench sides 223, 223. The first trench portion 222 may be located between the wells 212A, 212B and between the sources 208A, 208B. The trench bottom 227 may be spaced apart from the first end 207, such that the first trench portion 222 extends from the first end 207 toward the second end 209. The first trench side 223 may be spaced apart from the first side 211 by a first dimension. The second trench side 225 may be spaced apart from the second side 213 by a second dimension. The first and second dimensions may be the same, although alternative (or variable) spacing is within the ambit of certain examples. The well contacts 210A, 210B may extend closer to the second end 209 than the trench bottom 228. The first trench portion 222 may extend closer to the second end 209 than the wells 212A, 212B, although similar or alternatively arranged well-to-trench dimensions are contemplated by certain example semiconductor devices.61510-US

[0036] Referring to FIG. 2C, first and second gate sections 204A, 204B and a dielectric material 205 (e.g., a gate oxide) may be formed and / or deposited within the first trench portion 222. The gate sections 204A, 204B may be encapsulated in the dielectric material 205, such that the gate sections 204A, 204B do not directly contact the trench sides 223, 225 or the trench bottom 227. The dielectric material 205 may completely fill the first trench portion 222 except for where the gate sections 204A, 204B fill the first trench portion 222. The first gate section 204A may be located adjacent the first trench side 223 and may extend from the first end 207 toward the trench bottom 227. The second gate section 204B may be located adjacent the second trench side 225 and may extend from the first end 207 toward the trench bottom 227. The first and second gate sections 204 A, 204B may be constructed from or include a doped poly silicon material. The doped poly silicon may be constructed from or include a P-type or N-type poly silicon material.

[0037] Referring to FIG. 2D, a second trench portion 234 may be formed between the trench sides 223, 225 of the first trench portion 222 by etching or otherwise removing portions of the dielectric material 205 that are located between the first and second gate sections 204 A, 204B. The second trench portion 234 may include laterally spaced apart first and second trench sides 238, 240 and a second trench bottom 236 extending between the trench sides 238, 240. The first and second trench sides 238, 240 may extend from the second trench bottom 236 toward the first end 207. The second trench bottom 236 may be closer to the second end 209 than the first trench bottom 227 of the first trench portion 222.

[0038] Referring to FIG. 2E, a Schottky metal 252 may be placed in the second trench portion 234. The Schottky metal 252 may be constructed from an electrically conductive metal, such as titanium, molybdenum, platinum, chromium, tungsten, aluminum, and combinations thereof. The SBD metal 252 may contact the volume of semiconductor material 202 such that when a voltage is applied to the SBD contact 254, the SBD metal 252 and the volume of semiconductor material 202 form a Schottky contact, thereby enabling a flow of electrical energy through the volume of semiconductor material 202 to the substrate 206.

[0039] In various examples, the Schottky metal 252 includes a first metal portion lining the first side 238 of the second trench portion 234 (in contact with the volume of semiconductor material 202), a second metal portion lining the second side 240 of the second trench portion 234 (in contact with the volume of semiconductor material 202), and a third metal portion extending61510-USbetween the first and second metal portions and lining the second trench bottom 236. The Schottky metal 252 may be contained entirely below the first trench bottom 227.

[0040] In an alternative example, rather than having a “U” shape as shown in FIG. 2E, the Schottky metal 252 may completely fill the second trench portion 234 below the first trench bottom 227, such that the Schottky metal 252 extends continuously between the first and second trench sides 238, 240 of the second trench portion 234 and between the first and second trench bottoms 227, 236. In another alternative example, the Schottky metal 252 may extend from the second trench bottom 236 towards the first trench bottom 227, where a topmost margin of the Schottky metal 252 is below or above (e.g., spaced apart from) the first trench bottom 227.

[0041] Referring to FIG. 2F, an SBD contact 254 may be placed in the second trench portion 234. The SBD contact 254 may extend from above the first end 207 toward the second trench bottom 236 and may contact the Schottky metal 252. The Schottky metal 252 and the SBD contact 254 may collectively form an SBD 250. Remaining portions of the second trench portion 234 (e.g., portions not occupied by the SBD 250) may be filled with the insulating material 205.

[0042] The SBD contact 254 may be constructed from an electrically conductive metal, such as titanium, molybdenum, platinum, chromium, tungsten, aluminum, and combinations thereof. In various examples, the SBD contact 254 and the Schottky metal 252 may include dissimilar metals. For example, the SBD contact 254 may include titanium, copper, or aluminum while the Schottky metal 252 may include tungsten or platinum.

[0043] Electrical contacts 216A, 216B, 218, 220 A, 220B may be added to facilitate applying appropriate electrical voltages during operation of the device 200. More specifically, first and second gate contacts 216A, 216B may be added to the respective first and second gates 204 A, 204B. First and second source contacts 220 A, 220B may be added to the respective first and second sources 208 A, 208B. A drain contact 218 may be added that spans the substrate 206. As noted previously, according to certain examples, the gate contacts 216A, 216B may be shorted, and the source contacts 220A, 220B may be shorted.FEATURE COMBINATIONS

[0044] According to various examples of the present disclosure, a semiconductor device may include a volume of semiconductor material, an integrated MOSFET, and an integrated SBD. The volume of semiconductor material may present laterally spaced first and second sides,61510-USvertically spaced first and second ends, and a trench extending from the first end and being spaced between the sides. The integrated MOSFET may include a split gate located within the trench and presenting laterally spaced apart first and second gate sections. The integrated SBD may be located within the trench and include a Schottky metal.

[0045] The preceding example may include any one or more of the following features.

[0046] The SBD may be located below the first and second gate sections.

[0047] The MOSFET may include an SBD contact that extends between the first end of the volume of semiconductor material and the Schottky metal.

[0048] The SBD contact and the Schottky metal may be formed of dissimilar materials.

[0049] The Schottky metal may be selected from the group consisting of: titanium, molybdenum, platinum, chromium, tungsten, aluminum, and combinations thereof.

[0050] The MOSFET may include a drain located at the second end of the volume of semiconductor material.

[0051] The SBD may be located between the first and second gate sections.

[0052] The SBD may be located below the first and second gate sections.

[0053] The trench may include a first trench portion and a second trench portion, wherein the second trench portion extends closer to the second end of the volume of semiconductor material than the first trench portion. The SBD may be located in the second trench portion.

[0054] The second trench portion may be defined by a second trench bottom and laterally spaced second trench sides extending from the second trench bottom toward the first end of the volume of semiconductor material. The Schottky metal may line the second trench bottom.

[0055] The second trench portion may be defined by a second trench bottom and laterally spaced second trench sides extending from the second trench bottom toward the first end of the volume of semiconductor material. The Schottky metal may line the second trench bottom and the second trench sides.

[0056] The first trench portion may have a first trench bottom and laterally spaced first trench sides extending from the first trench bottom to the first end of the volume of semiconductor material. The second trench sides may extend from the second trench bottom to the first trench bottom.

[0057] The first and second gate sections may be located adjacent respective ones of the first trench sides.61510-US

[0058] The second trench portion may be spaced equally between the first trench sides.

[0059] The semiconductor device may comprise an SBD contact extending from the first end of the volume of semiconductor material to the Schottky metal.

[0060] The MOSFET may include a gate oxide that fills the first and second trench portions apart from the gate sections, the SBD contact, and the Schottky metal.

[0061] The Schottky metal may be selected from the group consisting of: titanium, molybdenum, platinum, chromium, tungsten, aluminum, and combinations thereof.

[0062] The semiconductor device may comprise laterally spaced apart first and second wells laterally spaced apart first and second sources adjacent the respective first and second wells, a drain, and a channel provided by a channel portion of the volume of semiconductor material extending between the source and the drain. The trench may be located between the wells and the sources;

[0063] The first and second sources may include an N+ material. The first and second wells may include a P material. The drain may include an N+ material. The channel portion of the volume of semiconductor material may include N material.

[0064] Each of the first and second wells may include a first well portion and a second well portion, with the first well portion being located adjacent the trench, the second well portion being located adjacent the first well portion and extending from the first end of the volume of semiconductor material closer to the second end of the volume of semiconductor material than the trench.GENERAL CONSIDERATIONS

[0065] While the present disclosure has been described herein with respect to certain illustrated examples, those of ordinary skill in the art will recognize and appreciate that the present disclosure is not so limited. Rather, many additions, deletions, and modifications to the illustrated and described examples may be made without departing from the scope of the disclosure as hereinafter claimed along with their legal equivalents. In addition, features from one example may be combined with features of another example while still being encompassed within the scope of the disclosure as contemplated by the inventors.

[0066] For example, although described herein with regard or in relation to one or more particular kinds of electronic devices (e.g., metal oxide semiconductor field-effect transistor), the61510-UStechnology may be more broadly applicable to one or more other kinds of electronic devices as well. Further, one with ordinary skill in the art will recognize that the technology described herein may, when applicable, be implemented in enhancement mode or depletion mode. Additionally, the technology described herein may, when applicable, be implemented as anN-channel or P-channel device, wherein, in general, regions that are N-doped or P-doped in N-channel implementations may be, respectively, P-doped or N-doped in P-channel implementations. Additionally, the various example materials identified herein may, in some aspects, be replaced or supplemented with substantially any other suitable material. For example, gate material may include polysilicon, a metal or alloy of metals, or other suitable material; gate oxide or dielectric may include silicon dioxide, aluminum dioxide, hafnium dioxide, silicon nitride, or other suitable material; and semiconductor material may include silicon carbide, gallium nitride, zinc oxide, or other suitable material.

[0067] It will be appreciated that the sides of the illustrated volume of semiconductor material are defined herein merely as an example, and may in various examples represent only a portion of semiconductor material relative to the illustrated device. In practice, the volume of semiconductor material may extend laterally (leftward and rightward when viewing FIG. 1) beyond the bounds illustrated in the drawings to present additional semiconductor material in which additional devices may be provided. (The semiconductor material may similarly extend inwardly or outwardly (relative to the lateral or cross-sectional direction depicted in FIG. 1) to present additional devices in a direction transverse to the lateral direction.) Such additional devices may be similarly or alternatively constructed to the illustrated device 100 or may be entirely different devices providing different operations or functions than the illustrated device 100. In other words, in practice, the illustrated device 100 may be just one of numerous devices spaced laterally and transversely within a single, integrally formed component, such as a wafer or integrated circuit (not shown).

[0068] Additionally, in general, unless otherwise specified or unless one with ordinary skill in the art would understand otherwise, doping concentrations (measured in parts per cubic centimeter) for contact implants may be approximately between 10A18 and 10A22; doping concentrations for channel and threshold forming implants may be approximately between 10A16 and 10A17; doping concentrations for shielding implants may be approximately between 10A17 and 10A19; and doping concentrations for conductivity improvement implants (e.g., N-61510-USdoping in the junction field-effect transistor neck region of a metal oxide semiconductor fieldeffect transistor) may be approximately between 10A16 and 10Al 7. Relatedly, a structure or region may contain two or more different doping doses. For example, one with ordinary skill in the art will recognize that some P-wells may contain a lower dose P-well portion and a higher dose unclamped inductive switching portion.

[0069] In this description, references to “one embodiment,” “an embodiment,” “embodiments,” “an example,” “one example,” or “examples” mean that the feature or features being referred to are included in at least one embodiment or example of the technology. Separate references to “one embodiment,” “an embodiment,” “embodiments,” “an example,” “one example,” or “examples” in this description do not necessarily refer to the same embodiment or example and are also not mutually exclusive unless so stated and / or except as will be readily apparent to those skilled in the art from the description. For example, a feature, structure, act, etc. described in one embodiment may also be included in other embodiments but is not necessarily included. Thus, the current technology can include a variety of combinations and / or integrations of the embodiments described herein.

[0070] Throughout this specification, plural instances may implement components, operations, or structures described as a single instance. Although individual operations of one or more methods are illustrated and described as separate operations, one or more of the individual operations may be performed concurrently, and nothing requires that the operations be performed in the order illustrated. Structures and functionality presented as separate components in example configurations may be implemented as a combined structure or component. Similarly, structures and functionality presented as a single component may be implemented as separate components. These and other variations, modifications, additions, and improvements fall within the scope of the subject matter herein, unless otherwise expressly stated and / or readily apparent to those skilled in the art from the description.

[0071] As used herein, the terms “comprises,” “comprising,” “includes,” “including,” “has,” “having” or any other variation thereof, are intended to cover a non-exclusive inclusion. For example, a process, method, article, or apparatus that comprises a list of elements is not necessarily limited to only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Further, unless expressly stated to the contrary, “or” refers to an inclusive or and not to an exclusive or. For example, a condition A or B is satisfied by61510-USany one of the following: A is true (or present) and B is false (or not present), A is false (or not present) and B is true (or present), and both A and B are true (or present).

[0072] The patent claims at the end of this patent application are not intended to be construed under 35 U.S.C. § 112(f) unless traditional means-plus-function language is expressly recited, such as “means for” or “step for” language being explicitly recited in the claim(s).

Claims

61510-USWHAT IS CLAIMED IS:

1. A semiconductor device comprising:a volume of semiconductor material presenting laterally spaced first and second sides, vertically spaced first and second ends, and a trench, extending from the first end and being spaced between the sides;an integrated metal-oxide semiconductor field-effect transistor (MOSFET) including a split gate that comprises a first gate section located within the trench and a laterally spaced apart second gate section located within the trench; andan integrated trench Schottky barrier diode (SBD) located within the trench, the SBD including a Schottky metal.

2. The semiconductor device of claim 1,the SBD being located below the first and second gate sections.

3. The semiconductor device of claim 2,the MOSFET including an SBD contact that extends between the first end of the volume of semiconductor material and the Schottky metal.

4. The semiconductor device of claim 3,the SBD contact and the Schottky metal being formed of dissimilar materials.

5. The semiconductor device of claim 4,the Schottky metal being selected from the group consisting of: titanium, molybdenum, platinum, chromium, tungsten, aluminum, and combinations thereof.

6. The semiconductor device of claim 2,the MOSFET including a drain located at the second end of the volume of semiconductor material.

7. The semiconductor device of claim 1,the SBD being located between the first and second gate sections.61510-US8. The semiconductor device of claim 7,the SBD being located below the first and second gate sections.

9. The semiconductor device of claim 8,the trench including a first trench portion and a second trench portion, wherein the second trench portion extends closer to the second end of the volume of semiconductor material than the first trench portion,the SBD being located in the second trench portion.

10. The semiconductor device of claim 9,the second trench portion being defined by a second trench bottom and laterally spaced second trench sides extending from the second trench bottom toward the first end of the volume of semiconductor material,the Schottky metal lining the second trench bottom.

11. The semiconductor device of claim 9,the second trench portion being defined by a second trench bottom and laterally spaced second trench sides extending from the second trench bottom toward the first end of the volume of semiconductor material,the Schottky metal lining the second trench bottom and the second trench sides.

12. The semiconductor device of claim 11,the first trench portion having a first trench bottom and laterally spaced first trench sides extending from the first trench bottom to the first end of the volume of semiconductor material, the second trench sides extending from the second trench bottom to the first trench bottom.

13. The semiconductor device of claim 12,the first and second gate sections being located adjacent respective ones of the first trench sides.

14. The semiconductor device of claim 13,61510-USthe second trench portion being spaced equally between the first trench sides.

15. The semiconductor device of claim 13, comprising:an SBD contact extending from the first end of the volume of semiconductor material to the Schottky metal.

16. The semiconductor device of claim 15,the MOSFET including a gate oxide that fills the first and second trench portions apart from the gate sections, the SBD contact, and the Schottky metal.

17. The semiconductor device of claim 1,the Schottky metal being selected from the group consisting of titanium, molybdenum, platinum, chromium, tungsten, aluminum, and combinations thereof.

18. The semiconductor device of claim 1, comprising:laterally spaced apart first and second wells;laterally spaced apart first and second sources adjacent the respective first and second wells, the trench being located between the wells and the sources;a drain; anda channel provided by a channel portion of the volume of semiconductor material extending between the source and the drain.

19. The semiconductor device of claim 18,the first and second sources including an N+ material,the first and second wells including a P material,the drain including an N+ material,the channel portion of the volume of semiconductor material including N material.

20. The semiconductor device of claim 18,each of the first and second wells including a first well portion and a second well portion, the first well portion being located adjacent the trench,61510-USthe second well portion being located adjacent the first well portion and extending from the first end of the volume of semiconductor material closer to the second end of the volume of semiconductor material than the trench.