Array substrate, display panel, display apparatus, drive circuit board and drive method

Abstract

Provided are an array substrate, a display panel, a display apparatus, a drive circuit board (XPCB) and a drive method. At least one gate line of the array substrate serves as a temperature sensing line in a time-division multiplexing manner. The drive circuit board (XPCB) comprises: a first electronic switch (SW1), the first electronic switch (SW1) electrically being connected to both a gate drive circuit (GOA) and the temperature sensing line; a first resistor (R1), one end of the first resistor (R1) being connected to the end of the temperature sensing wire that is away from the first electronic switch (SW1), and the other end of the first resistor (R1) being grounded (GND); and a microcontroller (MCU), the microcontroller (MCU) being configured to control the first electronic switch (SW1) to provide a first level signal (Vg1) to the gate drive circuit (GOA) within a display time period of one frame and provide the first level signal (Vg1) to the temperature sensing line within a blank time period of one frame, and to collect the voltage at the position where the temperature sensing line is connected to the first resistor (R1) and use same as a sampling signal.

Description

Array substrate, display panel, display device and driving circuit board, driving method Technical Field

[0001] This disclosure relates to the field of display technology, and in particular to an array substrate, display panel, display device, driving circuit board, and driving method. Background Technology

[0002] Over the decades, the television industry has undergone a dramatic transformation, much like the mobile phone industry, evolving from bulky black-and-white TVs to color TVs, and now to large-screen smart displays. Technological innovation has been relentless. With product updates and the increasing demands of users for monitors, there's a need to constantly break with traditional technologies. Beyond advancements in low cost, high transmittance, and high contrast, the integration of sensors into display products—such as adding light and temperature sensors—aims to enhance the user experience. Summary of the Invention

[0003] The array substrate, display panel, display device, driving circuit board, and driving method disclosed herein are specifically as follows:

[0004] On one hand, embodiments of this disclosure provide an array substrate, including:

[0005] A substrate, the substrate including a display area and a non-display area located on at least one side of the display area;

[0006] The gate driving circuit is located in the non-display area;

[0007] Multiple gate lines extend along a first direction and are arranged along a second direction. The multiple gate lines pass through the display area along the first direction and are electrically connected to the gate driving circuit. At least one of the gate lines is time-division multiplexed as a temperature sensing line.

[0008] In some embodiments, in the array substrate provided in the present disclosure, the non-display area includes a first non-display area for bonding a driving circuit, and at least one of the gate lines near the first non-display area is time-division multiplexed as the temperature sensing line.

[0009] On the other hand, embodiments of this disclosure provide a driving circuit board configured to drive the aforementioned array substrate, the driving circuit board comprising:

[0010] A first electronic switch is electrically connected to the gate driving circuit and the temperature sensing wire, respectively.

[0011] A first resistor, one end of which is connected to the end of the temperature sensing wire away from the first electronic switch, and the other end of which is grounded;

[0012] A microcontroller is configured to control the first electronic switch to provide a first level signal to the gate drive circuit during a display time period of a frame; to provide the first level signal to the temperature sensing line during a blank time period of a frame; and to collect the voltage at the connection point between the temperature sensing line and the first resistor as a sampling signal.

[0013] In some embodiments, the driving circuit board provided in the present disclosure further includes a first inverter, the input terminal of the first inverter being electrically connected to the connection position of the temperature sensing line and the first resistor, and the output terminal of the first inverter being electrically connected to the microcontroller.

[0014] In some embodiments, in the driving circuit board provided in the present disclosure, there are multiple temperature sensing lines, multiple first resistors, and multiple first inverters, wherein different first resistors are electrically connected to different temperature sensing lines, and different first inverters are electrically connected to different connection positions of the temperature sensing lines and the first resistors.

[0015] In some embodiments, the driving circuit board provided in the present disclosure further includes a second inverter, a second resistor, and a third resistor, wherein the input terminal of the second inverter is connected to a first level signal, the output terminal of the second inverter is electrically connected to one end of the second resistor, the other end of the second resistor is electrically connected to one end of the third resistor, and the other end of the third resistor is grounded.

[0016] The microcontroller is also configured to acquire the voltage at the connection point of the second resistor and the third resistor as a reference signal, and to characterize the panel temperature based on the reference signal and the sampled signal.

[0017] In some embodiments, in the driving circuit board provided in the present disclosure, the gate driving circuit includes a first gate driving circuit and a second gate driving circuit disposed opposite to each other on both sides of the display area, wherein the first gate driving circuit is electrically connected to the first electronic switch.

[0018] The driving circuit board also includes a second electronic switch, which is electrically connected to the second gate driving circuit.

[0019] The microcontroller is also configured to control the second electronic switch to provide the first level signal to the second gate drive circuit while simultaneously controlling the first electronic switch to provide the first level signal to the second gate drive circuit.

[0020] In some embodiments, the driving circuit board provided in the present disclosure includes multiple sub-circuit boards, wherein the first resistor and the microcontroller are disposed on the same sub-circuit board, and the first electronic switch and the microcontroller are located on different sub-circuit boards.

[0021] On the other hand, embodiments of this disclosure provide a driving method for the above-mentioned driving circuit board, including:

[0022] During the display period of one frame, a first-level signal is provided to the gate drive circuit;

[0023] During a blank time period of one frame, a first level signal is provided to the temperature sensing line, and the voltage at the connection point between the temperature sensing line and the first resistor is collected as a sampling signal. Then, the panel temperature is obtained based on the sampling signal.

[0024] In some embodiments, the driving method described above, provided in the present disclosure, further includes the following before providing the first level signal to the gate driving circuit during a display time period of one frame:

[0025] Receive an initial trigger signal of one frame, and determine that the preset time after the falling edge of the initial trigger signal is the display time period and the remaining time after the preset time is the blank time period.

[0026] In some embodiments, the driving method described above, provided in the present disclosure, further includes the following before providing the first level signal to the gate driving circuit during a display time period of one frame:

[0027] A total reset signal of one frame is received, and the time before the first falling edge of the total reset signal is determined as the display time period, and the time between the first high level and the second high level of the total reset signal is determined as the blank time period.

[0028] In some embodiments, in the driving method provided in the present disclosure, the driving circuit board further includes a second inverter, a second resistor, and a third resistor, and the driving method further includes: acquiring the voltage at the connection position of the second resistor and the third resistor as a reference signal;

[0029] Obtaining the panel temperature based on the sampling signal specifically includes: characterizing the panel temperature based on the reference signal and the sampling signal.

[0030] In some embodiments, the driving method provided in this disclosure, characterizing the panel temperature based on the reference signal and the sampling signal, specifically includes:

[0031] The change range of the reference signal relative to the initial reference signal is determined, and the sampled signal is reversed according to the change range to obtain the target sampled signal; wherein, the initial reference signal is the reference signal when the first level signal does not fluctuate;

[0032] The panel temperature is calculated based on a pre-stored linear function representing the change of the temperature-sensing line voltage with temperature, corresponding to the target sampling signal.

[0033] On the other hand, this disclosure provides a display panel including the array substrate provided in this disclosure and a counter substrate disposed opposite to the array substrate.

[0034] On the other hand, this disclosure provides a display device, including a display panel and a driving circuit board electrically connected to the display panel, wherein the display panel is the display panel provided in this disclosure, and the driving circuit board is the driving circuit board provided in this disclosure. Attached Figure Description

[0035] Figure 1 is a schematic diagram of the structure of the array substrate provided in an embodiment of this disclosure;

[0036] Figure 2a is a schematic diagram of a display device provided in an embodiment of the present disclosure;

[0037] Figure 2b is a schematic diagram of a display device provided in an embodiment of this disclosure;

[0038] Figure 3 is a flowchart of the driving method of the driving circuit board provided in the embodiment of this disclosure;

[0039] Figure 4 is a signal acquisition timing diagram provided in an embodiment of this disclosure;

[0040] Figure 5 is another signal acquisition timing diagram provided in an embodiment of this disclosure;

[0041] Figure 6 is a schematic diagram of the structure of the display panel provided in an embodiment of this disclosure;

[0042] Figure 7 is a schematic diagram of another structure of the display device provided in the embodiments of this disclosure. Detailed Implementation

[0043] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. It should be noted that, for clarity, the thickness of layers, films, panels, regions, etc., is enlarged in the drawings. Exemplary embodiments are described in this disclosure with reference to cross-sectional views as schematic diagrams of idealized embodiments. Thus, deviations from the shape of the figures will be expected as a result of, for example, manufacturing techniques and / or tolerances. Therefore, the embodiments described in this disclosure should not be construed as limited to the specific shape of the regions shown in this disclosure, but rather include deviations in shape caused, for example, by manufacturing processes. For example, a region illustrated or described as flat may typically have rough and / or non-linear characteristics; a sharp corner illustrated may be rounded, etc. Therefore, the regions shown in the figures are schematic in nature, and their dimensions and shapes are not intended to illustrate the precise shape of the regions or reflect true proportions; their purpose is merely to illustrate the content of this disclosure. And throughout, the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions. To keep the following description of the embodiments of this disclosure clear and concise, detailed descriptions of known functions and known components are omitted.

[0044] Unless otherwise defined, the technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” and similar terms used in this disclosure and the claims do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as “comprising” or “including” mean that the element or object preceding the word covers the element or object listed following the word and its equivalents, without excluding other elements or objects. Terms such as “connected” or “linked” are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. Terms such as “inner,” “outer,” “upper,” and “lower” are used only to indicate relative positional relationships, and these relative positional relationships may change accordingly when the absolute position of the described object changes.

[0045] In the following description, when an element or layer is referred to as "on" or "connected to" another element or layer, the element or layer may be directly on or directly connected to the other element or layer, or there may be intermediate elements or intermediate layers. When an element or layer is referred to as "located on one side of" another element or layer, the element or layer may be directly on or directly connected to the other element or layer, or there may be intermediate elements or intermediate layers. However, when an element or layer is referred to as "directly on" or "directly connected to" another element or layer, no intermediate elements or intermediate layers are present. The term "and / or" includes any and all combinations of one or more of the related listed items.

[0046] For LCD products, Panel as System (PAS) is a significant development trend. Its fundamental concept is to integrate more functions onto the panel, bringing greater added value. Panel-integrated sensors are a technology that has emerged in recent years, with temperature sensors being one example. Since liquid crystal response time is significantly affected by temperature, related overdrive (OD) solutions may cause changes in dynamic image quality during system operation. Temperature sensors can detect panel temperature and, through the timing control board (Tcon IC) or system oscillator (SOC), call different overdrive tables to perform varying degrees of compensation, thereby improving image quality. In some embodiments, to avoid affecting the normal display of the display area AA, a metal wire can be used to connect to the driver circuit board (XPCB) around the outer black matrix (BM) of the display area AA for driving and detection. Since the metal wires are concentrated at the edges, and the panel perimeter is attached to the backlight module, the backlight temperature may be uneven during system operation, potentially causing the temperature of the outer BM area to differ from the temperature of the display area AA.

[0047] To address the aforementioned technical problems, this disclosure provides an array substrate. Figure 1 is a schematic diagram of the array substrate provided in this disclosure. As shown in Figure 1, the array substrate of this disclosure may include a substrate ST, which includes a display area AA and a non-display area located on at least one side of the display area AA. Optionally, the non-display area includes a first non-display area DP, a second non-display area DPO, and a third non-display area GL & GR. The first non-display area DP can be used to bond a driving circuit, which may be a source driver chip (SIC) or a circuit board, such as a flexible circuit board, on which the source driver chip is bonded. One or both of the third non-display areas GL & GR may be provided with a gate driver circuit GOA. This disclosure illustrates an example where the right third non-display area GL is provided with a first gate driver circuit GOA1 and the left third non-display area GL is provided with a second gate driver circuit GOA2. The display area AA may be provided with gate lines G1 to Gn extending along the first direction X and arranged along the second direction Y, and data lines D1 to Dm extending along the second direction Y and arranged along the first direction X. The area defined by the intersection of the gate lines G1 to Gn and the data lines D1 to Dm is a sub-pixel area. The sub-pixel area includes, but is not limited to, a red sub-pixel area R, a green sub-pixel area G, and a blue sub-pixel area B. The sub-pixel area may be provided with a transistor TFT and a pixel electrode. The gate of the transistor TFT is electrically connected to the gate lines G1 to Gn, the first electrode of the transistor TFT is electrically connected to the data lines D1 to Dm, and the second electrode of the transistor TFT is electrically connected to the pixel electrode.

[0048] Optionally, in this disclosure, gate lines G1 to Gn pass through the display area AA along the first direction X and are electrically connected to the gate driving circuit GOA. The portion of gate lines G1 to Gn in the display area AA may belong to the gate metal layer, and the portion of gate lines G1 to Gn in the third non-display area GL & GR may belong to the source / drain metal layer (SD). The gate metal layer and the source / drain metal layer may be made of metal materials such as aluminum (Al) or copper (Cu), and their resistance has temperature characteristics, so they can be reused as temperature sensing lines. Based on this, in some embodiments, this disclosure can time-division multiplex at least one of the gate lines G1 to Gn as a temperature sensing line. Optionally, in this disclosure, gate lines G1 to Gn can be loaded with a scan signal to participate in the image display during the display time of one frame; at least one of the gate lines G1 to Gn can be multiplexed as a temperature sensing line during the blank time of one frame to detect the panel temperature. This not only does not affect the display, but also, because the temperature sensing line passes through the display area AA, it can more accurately reflect the temperature of the display area AA.

[0049] In some embodiments, the method of detecting temperature using metal lines surrounding the outer black matrix (BM) requires changing the mask to add these metal lines, which increases manufacturing costs. Considering that during panel fabrication, the last row of gate lines Gn in the display area AA is pulled out to the driver circuit board XPCB for detecting the waveform of gate line Gn, this disclosure can time-division multiplex the gate line (i.e., gate line Gn) closest to the first non-display area DP as a temperature sensing line. This eliminates the need to change the panel structure; only the design of the driver circuit board XPCB needs to be modified to achieve the temperature sensing detection. In other words, this invention can reuse the lead-out gate line used to test the waveform of gate line Gn as a temperature sensing detection line. Since each row inside the panel has grid lines G1 to Gn, for example, in the newly designed display panel, grid lines at different positions can be pulled out (for example, the first grid line G1, the middle grid line Gn / 2, and the last grid line Gn). This would enable temperature detection in different areas of the panel (for example, the far, middle, and near areas where the first grid line G1, the middle grid line Gn / 2, and the last grid line Gn are located), achieving more precise temperature control and adjustment.

[0050] In some embodiments, this disclosure provides a driving circuit board XPCB for driving the array substrate described above. Figure 2a is a schematic diagram of the driving circuit board XPCB provided in this disclosure driving the last gate line Gn. As shown in Figure 2a, the driving circuit board XPCB of this disclosure may include: a first electronic switch SW1, which is electrically connected to the gate driving circuit GOA and the temperature sensing line (e.g., gate line Gn); a first resistor R1, one end of which is connected to the end of the temperature sensing line (e.g., gate line Gn) away from the first electronic switch SW1, and the other end of which is grounded to GND; and a microcontroller MCU, which is configured to control the first electronic switch SW1 to provide a first level signal Vgl to the gate driving circuit GOA during a display time frame; to provide the first level signal Vgl to the temperature sensing line (e.g., gate line Gn) during a blank time frame, and to collect the voltage at the connection position between the temperature sensing line (e.g., gate line Gn) and the first resistor R1 as a sampling signal. The first level signal Vgl can be a signal used for noise reduction of the pull-up node PU and / or output terminal (e.g., scan signal output terminal gout and / or cascaded output terminal Cout) of the gate drive circuit. Optionally, if the transistor of the gate drive circuit GOA is an N-type transistor, the first level signal Vgl is low; if the transistor of the gate drive circuit GOA is an N-type transistor, the first level signal Vgl is high. This disclosure illustrates the case with the first level signal Vgl being low as an example.

[0051] During the temperature detection phase, a complete circuit is formed by the first level signal Vgl → temperature sensing line (e.g., gate line Gn) → first resistor R1 → GND (optionally, other electronic components may be included in the circuit, but this is not limited). When the temperature changes, the resistance of the temperature sensing line (e.g., gate line Gn) changes, causing a change in the sampling voltage. This converts the resistance change of the temperature sensing line (e.g., gate line Gn) caused by temperature into a voltage change through the circuit connected in series with the first resistor R1. Temperature information can then be calculated based on this voltage change. In some embodiments, the microcontroller (MCU) can define the number of samples using an algorithm, take the average value, and then perform the calculation to improve the accuracy of temperature detection. Furthermore, this disclosure uses the first level signal Vgl to drive the temperature detection phase, which can prevent large voltage fluctuations in the gate line (e.g., gate line Gn) multiplexed as the temperature sensing line, minimizing the impact on the display effect.

[0052] It should be understood that, as shown in Figure 2b, when multiple gate lines G1 to Gn (e.g., the first gate line G1, the middle gate line Gn / 2, and the last gate line Gn) are multiplexed as temperature sensing lines, in order to accurately detect the voltage changes of different temperature sensing lines, multiple first resistors R1 and multiple first inverters INV1 can be set, and different first resistors R1 are electrically connected to different temperature sensing lines (e.g., the first gate line G1, the middle gate line Gn / 2, and the last gate line Gn), and different first inverters INV1 are electrically connected to different temperature sensing lines. The temperature sensing wires (e.g., the first gate line G1, the middle gate line Gn / 2, and the last gate line Gn) are electrically connected to the different connection positions of the first resistor R1. In other words, the first resistor R1 is electrically connected to the temperature sensing wires (e.g., the first gate line G1, the middle gate line Gn / 2, and the last gate line Gn) in a one-to-one correspondence. The first inverter INV1 is electrically connected to the temperature sensing wires (e.g., the first gate line G1, the middle gate line Gn / 2, and the last gate line Gn) and the different connection positions of the first resistor R1 in a one-to-one correspondence.

[0053] In some embodiments, the drive circuit board XPCB provided in this disclosure, as shown in FIG2a, may further include a first inverter INV1. The input terminal of the first inverter INV1 is electrically connected to the connection point of the temperature sensing line (e.g., gate line Gn) and the first resistor R1, and the output terminal of the first inverter INV1 is electrically connected to the microcontroller MCU. When the sampling signal is negative, the microcontroller MCU defaults to zero (the sampling voltage min value is 0), causing the microcontroller MCU to misidentify and affecting the detection accuracy. This disclosure utilizes the first inverter INV1 to convert the negative voltage at the connection point of the temperature sensing line (e.g., gate line Gn) and the first resistor R1 into a positive voltage before providing it to the microcontroller MCU, thereby improving the detection accuracy.

[0054] In some embodiments, the drive circuit board XPCB provided in this disclosure, as shown in FIG2a, may further include a second inverter INV2. The input terminal of the second inverter INV2 is connected to the first level signal Vgl, and the output terminal of the second inverter INV2 is electrically connected to the microcontroller MCU. Since the first level signal Vgl may fluctuate slightly in practical applications, and the amplitude of the sampling voltage change due to temperature variations is small, slight fluctuations in the first level signal Vgl may affect the detection results. This disclosure uses the second inverter INV2 to convert the negative voltage of the first level signal Vgl into a positive voltage that can be recognized by the MCU as a reference signal. Because fluctuations in the first level signal Vgl will cause the sampling signal to fluctuate with the same amplitude, the sampling signal can be processed in reverse according to the fluctuation amplitude of the reference signal to eliminate the influence caused by the fluctuation of the first level signal Vgl, retain the voltage value changed by temperature variations, and improve the accuracy of temperature detection. For example, if the reference signal increases by 5% due to fluctuations in the first level signal Vgl, the sampled signal also increases by 5% due to fluctuations in the first level signal Vgl. In this case, reducing the sampled signal by 5% will yield the voltage value that has changed due to temperature. Thus, accurate temperature information can be obtained based on the 5% reduction in the sampled signal.

[0055] In some embodiments, as shown in FIG2a, the drive circuit board XPCB of this disclosure may further include a second resistor R2 and a third resistor R3, wherein one end of the second resistor R2 is electrically connected to the output terminal of the second inverter INV2, the other end of the second resistor R2 is electrically connected to one end of the third resistor R3, and the other end of the third resistor R3 is grounded to GND; the microcontroller MCU may also collect the voltage at the connection point of the second resistor R2 and the third resistor R3 as a reference signal, and characterize the panel temperature based on the reference signal and the above-mentioned sampling signal. Since the microcontroller MCU has a voltage withstand limit, by setting the second resistor R2 and the third resistor R3, the sampling voltage of the microcontroller MCU can be prevented from being too high and damaging the microcontroller MCU. For example, in this disclosure, the absolute value of the first level signal Vgl is 6V to 8V, and the voltage withstand limit of the microcontroller MCU is 3V. This disclosure may set the resistance value of the second resistor R2 to be twice that of the third resistor R3, so that the sampling voltage of the microcontroller MCU at the connection point of the second resistor R2 and the third resistor R3 is about 2V to 2.7V, which will not damage the microcontroller MCU.

[0056] In some embodiments, as shown in FIG2a, the gate driving circuit GOA in the above-described driving circuit XPCB provided in the present disclosure may include a first gate driving circuit GOA1 and a second gate driving circuit GOA2 for two third non-display areas GL&GR. Optionally, the first gate driving circuit GOA1 is electrically connected to the first electronic switch SW1, and the driving circuit XPCB may also include a second electronic switch SW2, which is electrically connected to the second gate driving circuit GOA2. The microcontroller MCU may also control the first electronic switch SW1 to provide the first level signal Vgl to the first gate driving circuit GOA1, and simultaneously control the second electronic switch SW2 to provide the first level signal Vgl to the second gate driving circuit GOA2, thereby realizing bilateral driving of gate lines G1 to Gn.

[0057] In some embodiments, the driver circuit board XPCB provided in this disclosure, as shown in FIG2a, may further include multiple sub-circuit boards. This disclosure illustrates an example including a first sub-circuit board XPCB1 and a second sub-circuit board XPCB2. Optionally, the first resistor R1, the second resistor R2, the second resistor R3, the first inverter INV1, the second inverter INV2, the microcontroller MCU, and the second electronic switch SW2 are disposed on the same sub-circuit board, while the first electronic switch SW1 and the microcontroller MCU are located on different sub-circuit boards. For example, the first resistor R1, the second resistor R2, the second resistor R3, the first inverter INV1, the second inverter INV2, the microcontroller MCU, and the second electronic switch SW2 are disposed on the first sub-circuit board XPCB1, and the first electronic switch SW1 is disposed on the second sub-circuit board XPCB2. Optionally, only one driver circuit board may be provided, and the above-mentioned resistors, inverters, and other structures may be disposed on one driver circuit board to improve integration.

[0058] On the other hand, this disclosure provides a driving method for the above-mentioned driving circuit board. Since the principle of this driving method in solving the problem is similar to that of the above-mentioned driving circuit board in solving the problem, the implementation of the driving method provided in this disclosure can refer to the implementation of the above-mentioned driving circuit board provided in this disclosure, and repeated details will not be described again.

[0059] In some embodiments, FIG3 illustrates a flowchart of a driving method provided by an embodiment of the present disclosure. As shown in FIG3, the driving method provided by an embodiment of the present disclosure may include:

[0060] S301. Provide the first level signal to the gate drive circuit during the display period of one frame;

[0061] S302. During a blank time period of one frame, a first level signal is provided to the temperature sensing line, and the voltage at the connection point between the temperature sensing line and the first resistor is used as a sampling signal. Then, the panel temperature is obtained based on the sampling signal.

[0062] Since the partial pressure of the temperature-sensitive line caused by temperature has a linear relationship with temperature, this disclosure can store a linear function characterizing the change of the partial pressure of the temperature-sensitive line with temperature, and substitute the sampled signal into the linear function to obtain the corresponding temperature information. In some embodiments, this disclosure can store only the two endpoint values ​​of the linear function characterizing the change of the partial pressure of the temperature-sensitive line with temperature. The slope of the linear function can be determined from these two endpoint values, and the corresponding temperature information can be obtained by dividing the sampled signal by the slope.

[0063] In some embodiments, in the driving method provided in this disclosure, to eliminate the influence of fluctuations in the first level signal, the voltage at the connection point of the second resistor and the third resistor can be collected as a reference signal before, simultaneously with, or after the voltage at the connection point of the temperature sensing line and the first resistor is collected as a sampling signal, and the panel temperature is characterized based on the reference signal and the sampling signal. In some embodiments, the change amplitude of the reference signal relative to the initial reference signal (i.e., the reference signal when the first level signal has not fluctuated) can be determined first, and the sampling signal can be reversed according to the change amplitude to obtain the target sampling signal; then, the temperature corresponding to the target sampling signal can be calculated as the panel temperature according to a pre-stored linear function representing the change of the voltage division of the temperature sensing line with temperature.

[0064] In some embodiments, in the driving method provided in this disclosure, before performing step S301 and providing the first level signal to the gate driving circuit during the display time period of a frame, the following steps may also be performed: receiving the initial trigger signal STV1 of a frame t (i.e., the signal on the initial trigger signal line of the first-stage shift register), and determining that the preset time after the falling edge of the initial trigger signal STV1 is the display time period ta, and the remaining time after the preset time is the blank time period tb, as shown in Figure 4; or, receiving the total reset signal STV0 of a frame t (i.e., the Total Reset signal that resets each stage of the shift registers of the gate driving circuit GOA), and determining that the time before the first high-level falling edge of the total reset signal STV0 is the display time period ta, and the time between the first high level and the second high level of the total reset signal STV0 is the blank time period tb, as shown in Figure 5. For example, within a frame t, the 8.1ms before the first high-level falling edge of the total reset signal STV0 is the display time period ta, and the time between the two high levels in the total reset signal STV0 is the blank time period tb used for temperature sensing detection, with the blank time period tb being approximately 0.2ms.

[0065] For panels with fully tuned Gate Assist Timing (GOA), the widths of the display time period ta and the blank time period tb are fixed. The initial trigger signal STV1 or the total reset signal STV0 can be used as flags, and the blank time position can be accurately located by delaying for a specific time. The delay time setting is related to the panel refresh rate; different refresh rate products have different frame times, leading to variations in delay time. However, even products with the same refresh rate may exhibit slight differences due to various factors. In some embodiments, a 60Hz refresh rate product may perform temperature detection after a 16.2ms to 16.5ms delay following the rising edge of the initial trigger signal STV1; a 120Hz refresh rate product may perform temperature detection after an 8.1ms to 8.2ms delay; and a 144Hz refresh rate product may perform temperature detection after a 6.75ms to 6.85ms delay.

[0066] To better understand the driving scheme provided in this disclosure, a detailed description is given below in conjunction with Figures 2a and 3.

[0067] The first step is to receive the initial trigger signal STV1 (i.e., the signal on the initial trigger signal line of the first shift register) of a frame t, and determine the preset time after the falling edge of the initial trigger signal STV1 as the display time period ta, and the remaining time after the preset time as the blank time period tb, as shown in Figure 3.

[0068] The second step involves the first electronic switch SW1 connecting the first level signal Vgl to the first gate drive circuit GOA1 and the second electronic switch SW2 connecting the first level signal Vgl to the second gate drive circuit GOA2 during the display period ta, so that the panel can display normally.

[0069] Thirdly, when the microcontroller (MCU) detects the entry into a blank time period tb, it inverts the control signal SEL of the first electronic switch SW1 and the second electronic switch SW2, causing the second electronic switch SW2 to open. The first electronic switch SW1 connects the first level signal Vgl to the last gate line Gn of the display area AA, thus briefly isolating the last gate line Gn for temperature detection. At this time, the first level signal Vgl → the last gate line Gn → the first resistor R1 → GND form a complete loop. When the temperature changes, the resistance of the last gate line Gn changes, causing the sampling voltage on the first resistor R1 to change. This signal is converted from negative to positive after passing through the first inverter INV1 and is input to the microcontroller MCU as a sampling signal to realize the detection function. The microcontroller MCU can also define the number of samples through an algorithm, take the average value, and then perform calculations. Optionally, the microcontroller MCU can also collect the voltage at the connection point of the second resistor R2 and the third resistor R3 as a reference signal during the blank time period tb. When the first-level signal Vgl fluctuates, it causes the reference signal and the sampling signal to fluctuate with the same amplitude. Therefore, the change amplitude of the reference signal relative to the initial reference signal (i.e., the reference signal when the first-level signal does not fluctuate) can be determined first. Then, the sampling signal is changed in reverse according to the change amplitude and used as the target sampling signal. Then, the slope of the linear function is determined according to the endpoint value of the pre-stored linear function representing the change of the temperature sensing line voltage with temperature. The target sampling signal is divided by the slope to obtain the corresponding temperature information, thereby improving the accuracy of the temperature monitoring panel.

[0070] After the current frame's blank time period tb ends, the microcontroller MCU detects the start of the next frame's display time period ta. The microcontroller MCU then reverses the control signals SEL of the first electronic switch SW1 and the second electronic switch SW2, restoring them to the state of the second step and maintaining normal display. After the microcontroller MCU detects the start of the next frame's blank time period tb, it executes the third step described above. This cycle repeats, achieving real-time monitoring of the panel temperature without affecting the display.

[0071] Based on the same inventive concept, this disclosure provides a display panel, as shown in FIG6, including the array substrate 001 provided in this disclosure embodiment and a counter substrate 002 disposed opposite to the array substrate 001. Since the principle of solving the problem by this display panel is similar to the principle of solving the problem by the array substrate described above, the implementation of the display panel provided in this disclosure embodiment can refer to the implementation of the array substrate provided in this disclosure embodiment, and repeated details will not be described again.

[0072] In some embodiments, as shown in FIG6, the display panel provided in this disclosure may further include a liquid crystal layer 003 between the array substrate 001 and the opposing substrate 002. In some embodiments, a first polarizer 004 may be disposed on the side of the array substrate 001 away from the opposing substrate 002, and a second polarizer 005 may be disposed on the side of the opposing substrate 002 away from the array substrate 001, wherein the polarization direction of the first polarizer 004 and the polarization direction of the second polarizer 005 are perpendicular to each other. Other essential components of the display panel are those which should be understood by those skilled in the art and will not be described in detail here, nor should they be construed as limiting this disclosure.

[0073] Based on the same inventive concept, this disclosure provides a display device, as shown in Figures 2a and 7, including the display panel PNL and driving circuit board XPCB provided in this disclosure, and a backlight module BLU located on the light-incident side of the display panel PNL. The backlight module BLU can be a direct-lit backlight module or an edge-lit backlight module. Optionally, an edge-lit backlight module may include LED strips, stacked reflective sheets, light guide plates, diffusers, prism groups, etc., with the LED strips located on one side of the thickness direction of the light guide plate. A direct-lit backlight module may include a matrix light source, a reflective sheet, a diffuser plate, and a brightness enhancement film stacked on the light-emitting side of the matrix light source, with the reflective sheet including openings directly opposite the positions of the LEDs in the matrix light source. The LEDs in the LED strips and the LEDs in the matrix light source can be light-emitting devices (LEDs), such as quantum dot LEDs.

[0074] In some embodiments, the LEDs can also be micro-light-emitting devices (such as Mini LEDs and Micro LEDs). Sub-millimeter or even micrometer-scale micro-light-emitting devices, like organic light-emitting devices (OLEDs), are self-emissive devices. Like OLEDs, they offer advantages such as high brightness, ultra-low latency, and ultra-wide viewing angles. Furthermore, because inorganic light-emitting devices emit light based on more stable and lower-resistance metal semiconductors, they offer advantages over organic light-emitting devices (based on organic materials) in terms of lower power consumption, greater resistance to high and low temperatures, and longer lifespan. Moreover, when micro-light-emitting devices are used as backlights, they can achieve more precise dynamic backlighting effects, effectively improving screen brightness and contrast while also solving the glare problem caused by traditional dynamic backlighting between bright and dark areas of the screen, thus optimizing the visual experience.

[0075] In some embodiments, the display device provided in this disclosure can be any product or component with display function, such as a projector, 3D printer, virtual reality device, mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, navigator, smartwatch, fitness wristband, or personal digital assistant. Optionally, the display device provided in this disclosure includes, but is not limited to, components such as a radio frequency unit, network module, audio output & input unit, sensor, display unit, user input unit, interface unit, and control chip. Optionally, the control chip is a central processing unit, digital signal processor, system-on-a-chip (SoC), etc. For example, the control chip may also include a memory, a power module, etc., and achieve power supply and signal input / output functions through additionally provided wires, signal lines, etc. For example, the control chip may also include hardware circuits and computer-executable code. The hardware circuit may include conventional very-large-scale integrated circuits (VLSI) or gate arrays, as well as existing semiconductors or other discrete components such as logic chips and transistors; the hardware circuit may also include field-programmable gate arrays, programmable array logic, programmable logic devices, etc. Furthermore, those skilled in the art will understand that the above structure does not constitute a limitation on the display device provided in the embodiments of this disclosure. In other words, the display device provided in the embodiments of this disclosure may include more or fewer of the above components, or combine certain components, or have different component arrangements.

[0076] Although preferred embodiments of this disclosure have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of this disclosure.

[0077] Obviously, those skilled in the art can make various modifications and variations to the embodiments of this disclosure without departing from the spirit and scope of the embodiments of this disclosure. Therefore, if these modifications and variations to the embodiments of this disclosure fall within the scope of the claims of this disclosure and their equivalents, this disclosure is also intended to include these modifications and variations.

Images