Enhancements to write booster buffer
A partial flushing mechanism for the pinned region of write booster buffers in data storage devices addresses inefficiencies in flushing mechanisms, enhancing read performance by retaining frequently accessed data and optimizing system performance.
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- QUALCOMM INC
- Filing Date
- 2025-01-24
- Publication Date
- 2026-07-30
AI Technical Summary
Existing data storage devices face challenges in maintaining high read performance for frequently accessed data due to inefficient flushing mechanisms in write booster buffers, which can impact read operations and overall system performance.
Implementing a partial flushing mechanism for the pinned region of the write booster buffer, allowing selective flushing of unused data while retaining frequently accessed data, thereby enhancing read throughput.
Improves read performance by selectively flushing unused data from the pinned region, maintaining high-speed access for frequently accessed data and reducing unnecessary data movement, thus optimizing system performance.
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Figure CN2025074616_30072026_PF_FP_ABST
Abstract
Description
ENHANCEMENTS TO WRITE BOOSTER BUFFERTECHNICAL FIELD
[0001] The technology discussed below relates generally to data storage devices, and more particularly, to write booster buffers in data storage devices. INTRODUCTION
[0002] Data storage devices (DSDs) -such as solid state devices (SSDs) with non-volatile memories (NVMs) -are utilized in a wide variety of devices in stationary and mobile computing environments. Examples of such devices include desktop computers, portable notebook computers, tablets, portable hard disk drives, mobile devices, cellular phones, portable media players, wearable devices, etc. One example of SSDs is the Universal Flash Storage (UFS) device. A UFS device is commonly used as data storage in mobile devices (e.g., mobile phones, smartphones, tablets, vehicles, portable computers, etc. ) because the UFS device can provide high performance and low power storage memory. Specifications for UFS and its associated UFS Host Controller Interface (UFSHCI) are included in the Joint Electron Device Engineering Council (JEDEC) standards. BRIEF SUMMARY OF SOME EXAMPLES
[0003] The following presents a summary of one or more aspects of the present disclosure, in order to provide a basic understanding of such aspects. This summary is not an extensive overview of all contemplated features of the disclosure, and is intended neither to identify key or critical elements of all aspects of the disclosure nor to delineate the scope of any or all aspects of the disclosure. Its sole purpose is to present some concepts of one or more aspects of the disclosure in a form as a prelude to the more detailed description that is presented later.
[0004] In one example, an apparatus at a host is provided that includes an interconnect circuit configured to communicate with a device via a link between the host and the device. The apparatus further includes a host controller configured to identify data stored in a pinned region of a write booster buffer of the device and send a query request to the device via the interconnect circuit to perform a partial flush of the data stored in the pinned region. The partial flush of the data is configured to flush a portion of the data from the pinned region to a normal storage region of the device.
[0005] Another example provides a method operable at a host. The method includes identifying data stored in a pinned region of a write booster buffer of a device, where the device is coupled to the host via a link therebetween. The method further includes sending a query request to the device to perform a partial flush of the data stored in the pinned region. The query request identifies a portion of the data to flush from the pinned region to a normal storage region of the device.
[0006] Another example provides a host including means for identifying data stored in a pinned region of a write booster buffer of a device, where the device is coupled to the host via a link therebetween. The host further includes means for sending a query request to the device to perform a partial flush of the data stored in the pinned region. The query request identifies a portion of the data to flush from the pinned region to a normal storage region of the device.
[0007] These and other aspects will become more fully understood upon a review of the detailed description, which follows. Other aspects, features, and examples will become apparent to those of ordinary skill in the art upon reviewing the following description of specific exemplary aspects in conjunction with the accompanying figures. While features may be discussed relative to certain examples and figures below, all examples can include one or more of the features discussed herein. In other words, while one or more examples may be discussed as having certain features, one or more of such features may also be used in accordance with the various examples discussed herein. Similarly, while examples may be discussed below as device, system, or method examples, it should be understood that such examples can be implemented in various devices, systems, and methods.BRIEF DESCRIPTION OF THE DRAWINGS
[0008] FIG. 1 is a diagram depicting an apparatus employing a data storage device according to some aspects.
[0009] FIG. 2 is a diagram illustrating an apparatus including a Universal Flash Storage (UFS) system in accordance with some aspects of the disclosure.
[0010] FIG. 3 is a diagram illustrating an example of communication between a host and a data storage device according to some aspects.
[0011] FIGs. 4A and 4B are diagrams illustrating examples of write booster buffer configurations according to some aspects.
[0012] FIG. 5 is a diagram illustrating a main storage of a data storage device according to some aspects.
[0013] FIG. 6 is a diagram illustrating a command configured to write data to a pinned region of a write booster buffer according to some aspects.
[0014] FIG. 7 is a diagram illustrating examples of write booster buffer flags according to some aspects.
[0015] FIGs. 8A and 8B are diagrams illustrating examples of write booster buffer device descriptors and attributes for partial flush modes according to some aspects.
[0016] FIG. 9 is a diagram illustrating an example of a write booster buffer flush operation according to some aspects.
[0017] FIG. 10 is a diagram illustrating an example of a pinned partial flush flag according to some aspects.
[0018] FIG. 11 is a diagram illustrating an example of a pinned partial write booster buffer flush operation according to some aspects.
[0019] FIG. 12 is a diagram illustrating an example of a query request to initiate a pinned partial flush operation according to some aspects.
[0020] FIG. 13 is a diagram illustrating an example of maintaining pinned information for a pinned region of a write booster buffer according to some aspects.
[0021] FIG. 14 is a diagram illustrating an example of a response configured to indicate whether data is stored in a pinned region of a write booster buffer according to some aspects.
[0022] FIG. 15 is a diagram illustrating an example of a copy operation to copy data from a normal storage region to a pinned region of a data storage device according to some aspects.
[0023] FIG. 16 is a diagram illustrating an example of a command configured to initiate copying of data from the normal storage region to the pinned region according to some aspects.
[0024] FIG. 17 is a flow chart illustrating an exemplary process for initiating a pinned partial flush according to some aspects.
[0025] FIG. 18 is a flow chart illustrating an exemplary process for performing a pinned partial flush according to some aspects.
[0026] FIG. 19 is a flow chart illustrating an exemplary process for initiating a copy from a normal storage region to a pinned storage region according to some aspects.
[0027] FIG. 20 is a flow chart illustrating an exemplary process for performing a copy from a normal storage region to a pinned storage region according to some aspects.DETAILED DESCRIPTION
[0028] The detailed description set forth below in connection with the appended drawings is intended as a description of various configurations and is not intended to represent the only configurations in which the concepts described herein may be practiced. The detailed description includes specific details for the purpose of providing a thorough understanding of various concepts. However, it will be apparent to those skilled in the art that these concepts may be practiced without these specific details. In some instances, well-known structures and components are shown in block diagram form in order to avoid obscuring such concepts.
[0029] Several aspects of the invention will now be presented with reference to various apparatus and methods. These apparatus and methods will be described in the following detailed description and illustrated in the accompanying drawings by various blocks, modules, components, circuits, steps, processes, algorithms, etc. (collectively referred to as “elements” ) . These elements may be implemented using electronic hardware, computer software, firmware, or any combination thereof. Whether such elements are implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system.
[0030] While aspects and examples are described in this application by illustration to some examples, those skilled in the art will understand that additional implementations and use cases may come about in many different arrangements and scenarios. Innovations described herein may be implemented across many differing platform types, devices, systems, shapes, sizes, and packaging arrangements. For example, aspects and / or uses may come about via integrated chip examples and other non-module-component-based devices (e.g., end-user devices, vehicles, communication devices, computing devices, industrial equipment, retail / purchasing devices, medical devices, artificial intelligence (AI) -enabled devices, etc. ) . While some examples may or may not be specifically directed to use cases or applications, a wide assortment of applicability of described innovations may occur. Implementations may range in spectrum from chip-level or modular components to non-modular, non-chip-level implementations and further to aggregate, distributed, or original equipment manufacturer (OEM) devices or systems incorporating one or more aspects of the described innovations. In some practical settings, devices incorporating described aspects and features may also necessarily include additional components and features for the implementation and practice of described examples. It is intended that innovations described herein may be practiced in a wide variety of devices, chip-level components, systems, distributed arrangements, end-user devices, etc., of varying sizes, shapes, and constitution.
[0031] An apparatus, such as a mobile device, internet of things (IoT) device, or automotive product, may include a UFS system including a UFS host and a UFS device connected via a UFS interface (e.g., a data link) . The UFS device may include, for example, a data storage device (DSD) , such as a non-volatile memory (NVM) or solid state device (SSD) . The UFS host includes a UFS host controller (e.g., hardware, such as a processing unit) managed by a UFS driver via a UFS host controller interface (UFSHCI) (e.g., a set of registers) . The UFS driver includes software executed by, for example, a central processing unit (CPU) of the apparatus. The CPU is further controlled by an operating system having instructions executable by the CPU. The UFS host further includes a UFS interconnect layer (UIC) , which handles the connection (e.g., the link) between the UFS host and the UFS device.
[0032] The UFS device can include a write booster buffer for managing write request commands. The write booster buffer can be logically partitioned from the NVM and can be configured, for example, as single level cell (SLC) NAND flash memory for improved write performance. The write booster buffer may further include a pinned region used to store frequently accessed data and a non-pinned region used to store other data. The data written to the write booster buffer can be flushed into a normal storage region (e.g., triple level cell (TLC) NAND) of the NVM by an explicit command or implicitly while in a hibernate state. To flush data in the pinned region, the pinned data can first be unpinned and then flushed by a write booster flush operation.
[0033] In some examples, the data may be partially flushed in a FIFO (First-In-First-Out) mode or in a pinned mode. In the FIFO mode, the data written later to the write booster buffer (whether in the pinned or non-pinned region) is excluded from the write booster flush operation, whereas in the pinned mode, the data in the pinned region is excluded from the write booster flush operation. However, in either the normal write booster buffer flush mode (without any partial flushing) or in the FIFO mode, the entire data in the pinned region may be flushed to normal storage (normal storage region of NVM) , which may impact the read performance of data that is accessed frequently. In addition, data that is no longer accessed frequently may not be targeted for write booster buffer flushing, while keeping other frequently accessed data in the pinned region. Moreover, frequently accessed data stored in the normal storage region of NVM may not be moved into the write booster buffer to improve the read performance.
[0034] In various aspects of the disclosure, to improve the read performance of frequently accessed data, partial flushing of unused data in the pinned region of the write booster buffer can be supported. In addition, the contents of the pinned region may be updated to copy frequently accessed data from the normal storage region to the pinned region to enhance the read throughput. In various aspects, the host (e.g., UFS host controller) can identify data stored in the pinned region of the write booster buffer and send a query request to the device (e.g., UFS device) to perform a partial flush of the data stored in the pinned region. The query request can identify a portion of the data (e.g., unused data) to flush from the pinned region to the normal storage region of the device.
[0035] In some examples, the query request can include a start address and a size of the portion of the data to be flushed. For example, the query request can include one or more reserved fields that include the start address and the size of the data to be flushed. In some examples, the query request further includes an operation code to set a flag in the device and a flag identifier field that identifies the flag (e.g., a partial flush flag) to set in the device to initiate the partial flush of the portion of the data in the pinned region.
[0036] In some examples, the host can send at least one command (e.g., a Write Command within a Command UPIU) to the device to write the data to the pinned region and receive at least one response (e.g., a Response UPIU) from the device indicating successful execution or failed execution of the at least one command. In some examples, each command includes a group number field including a particular group number that instructs the device to write the data to the pinned region. In some examples, each response includes a bit field including a bit set to indicate whether the data was written to the pinned region. Based on the received responses, the host can maintain a table including a respective start address and respective length of the data written the pinned region for each command.
[0037] In some examples, the host can send a command (e.g., Read or Write Command within a Command UPIU) to the device to copy data from the normal storage region to the pinned region of the write booster buffer. For example, the command can include a bit field including a bit set to initiate copy of the data from the normal storage region to the write booster buffer. In addition, the command can include a logical block address and transfer length of the data to be copied.
[0038] FIG. 1 is a diagram depicting an apparatus employing a data storage device according to some aspects. In one example, the apparatus 100 may include a radio communication device that communicates through a radio frequency (RF) communications transceiver 116 and antenna 118 with a radio access network (RAN) , a core access network, the Internet and / or another network. In other examples, the apparatus 100 may include other types of devices, including, for example, IoT devices or automotive products, which may or may not include the transceiver 116 and / or antenna 118.
[0039] The apparatus 100 may further include a central processing unit (CPU) 102, one or more neural signal processors (NSPs) 104, and one or more graphics processing units (GPUs) 106, which may be implemented, for example, on a system-on-chip (SoC) . In an example, the CPU 102 may include a processor 110 and memory 114 (e.g., L1 and / or L2 caches or registers or RAM) , and may be controlled by an operating system 112 that is loaded from internal or external storage as data and instructions that are executable by the processor 110. The apparatus 100 may further include or access a data storage device (DSD) 108, such as a Universal Flash Storage (UFS) device or other non-volatile memory (NVM) device. The DSD 108 can be used to maintain data, operational parameters, and other information used to configure and operate the apparatus 100. The CPU 102 may also be operably coupled to internal and / or external devices such as a display / user interface 124, operator controls, such as buttons 126, 128, and other components.
[0040] A data communication interface (e.g., bus) 120 may be provided to support communication between the CPU 102, NSP 104, GPU 106, and / or one or more peripherals (not shown) . The data communication interface 120 may be operated in accordance with standard protocols defined for interconnecting certain components of mobile devices. For example, there may be multiple types of interfaces defined for communications between CPU 102, a user interface, displays, and camera components of a device. In addition, a link 122 may be provided to support communication between the CPU 102, the DSD 108, and various other components, such as the NSP 104 and the GPU 106. For example, the link 122 may correspond to a UFS interface.
[0041] FIG. 2 is a diagram depicting an apparatus including a Universal Flash Storage (UFS) system in accordance with some aspects of the disclosure. In this example, the apparatus 200 can be a computer system or a part thereof. The apparatus 200 includes one or more processors (e.g., one exemplary processor 202 shown in FIG. 2) that can be configured to perform various functions of the apparatus, including, for example, functions typically performed by portable devices such as mobile devices, tablets, portable computers, wearable devices (e.g., earbuds, headphones, etc. ) , smartwatches, and other such devices. These functions can include wireless communications with other devices (e.g., smartphones, computers, etc. ) and application specific functions. The apparatus 200 can include a data storage system for storing various data at the apparatus. In one aspect, the data storage system can be a UFS system that includes a UFS host 204 and one or more UFS devices (e.g., one exemplary UFS device 206 shown in FIG. 2) . In some examples, the UFS host 204 can be included in or implemented by the processor 202 (e.g., a CPU) .
[0042] The processor 202 can perform various functions (e.g., using software / application 208) and can communicate with the UFS host 204 using a UFS driver 220. Using the UFS driver 220, the processor 202 can communicate, control, and exchange data with the UFS host 204, for example, via a UFS host controller 212 that provides a UFS host controller interface (UFSHCI) to the processor 202. For example, the host controller 212 (e.g., the UFSHCI) can provide a set of registers that can be accessed by the processor 202 using the UFS driver 220. The UFS host controller 212 is responsible for managing the interface and data transfer between host software (e.g., application 208) and the UFS device. This can include interface management, power management, and control functions. The UFS host controller 212 includes a UFS Transport Protocol (UTP) layer that provides services to the higher layer (e.g., application layer of the UFS driver 220) and exchanges UFS Protocol Information Units (UPIUs) with the UTP layer on the UFS device. For example, upon receiving a request from an application (host software) , the UTP can generate a UPIU for that request and transport the generated UPIU to the peer UTP on the UFS device. The UTP layer further provides three service access points, including a UFS device manager service access point (UDM_SAP) to perform device level management, such as descriptor access, a UTP command service access point (UTP_CMD_SAP) to transport commands, and a UTP task management service access point (UTP_TM_SAP) to transmit task-management functions, such as abort task functions.
[0043] The UFS host 204 and UFS device 206 are connected through a UFS interface 214. For example, each of the UFS host 204 and UFS device 206 has a UFS interconnect interface 216 that transfers data and control signals between the UFS host and UFS device. The UFS interconnect interface 216 includes a UFS interconnect layer (UIC) that handles connections between the UFS host and the UFS device. The UIC can include, for example, a Mobile Industry Processor Interface Alliance layer configured in accordance with the Unified Protocol (UniPro) high-speed interface protocol standard and MIPI Alliance layer configured in accordance with the M-PHY physical layer protocol standard. The UTP layer of the UFS host controller 212 can encapsulate requests from the application layer (e.g., the application 208) into the appropriate frame structure (e.g., UPIU messages) for the UIC.
[0044] The UFS driver 220 can use a combination of registers and transfer request descriptors in system memory 210 (e.g., one or more memories (e.g., random access memory) ) to communicate with host controller hardware. In some examples, the UFS device 206 can be a memory card, an embedded bootable mass storage device, an input-output (IO) device, etc. In some aspects, the UFS device 206 includes a device controller 218 (e.g., a CPU or other processor or processing unit) and a data storage 222 that can include a non-volatile memory (NVM) for storing data. In one example, the NVM may be NAND Flash memory or the like. However, the UFS device 206 is not limited to using only NAND Flash and can use other types of NVM. The device controller 218 is configured to perform the same tasks as the UFS host controller 212 along with other device level functions, and to manage the flow of data to and from the data storage 222.
[0045] In some aspects, some or all of the functions described herein can be performed by the apparatus 200 using the processor 202, UFS host 204, and / or UFS device 206. In some examples, the processor 202, UFS host 204, and UFS device 206 may each include a microprocessor, a microcontroller, an embedded controller, a logic circuit, software, firmware, ASIC, or any kind of processing device, for performing one or more of the functions described herein as being performed by the apparatus 200.
[0046] FIG. 3 is a diagram illustrating an example of communication between a host 302 and a data storage device (device) 304 according to some aspects. In some examples, the host 302 may be a UFS host and the device 304 may be a UFS device implemented on an apparatus (e.g., a mobile device, IoT device, or automotive device) . The host 302 includes a processing unit 306, a host controller 312, and an interconnect circuit 314. The processing unit 306 may include one or more application clients 308 and a UFS driver 310 that may be executed by the processing unit 306. In some examples, the processing unit 306 corresponds to a CPU and the one or more application clients 308 correspond to host applications (e.g., OSs or other applications) . The UFS driver 310 may be configured to support UFS native command sets and / or small computer system interface (SCSI) command sets based on the SCSI architecture model (SAM) . In some examples, the UFS driver 310 may be configured to receive requests from one or more application clients 308 and to generate SCSI commands, such as Read, Write, Read Capacity, Report LUNS, Test Unit Ready, Start Stop Unit, Inquiry, etc., based on the request (s) . The UFS driver 310 may further be configured to send the SCSI commands to the device 304 via the host controller 312 and interconnect circuits 314 and 318 (e.g., UniPro ports) on the host 302 and device 304, respectively, and a link 316 (e.g., a communication link, such as a UFS link or other non-volatile storage link) between the host 302 and the device 304. The SCSI commands may be formatted into UFS Protocol Information Units (UPIUs) at the host controller 312. At the interconnect circuit 314, the UniPro layer may divide its transactions into UniPro messages that contain one or more UPIUs.
[0047] The device 304 may include a device manager 320, a plurality of logical units (LUs) 322 (e.g., LU-0 …LU-N) , device configuration information 328, and main storage 324 (e.g., non-volatile storage) , which may include, for example, a plurality of storage units 326 and a write booster buffer 330 (e.g., a turbo write booster (TWB) buffer) . Each LU 322 is an independent and separately, externally addressable processing entity that processes tasks (e.g., SCSI commands (e.g., read, write, etc. ) ) and performs other task management functions. An LU 322 may be configured by allocating an amount of physical memory (e.g., DDR / DRAM and / or storage unit (s) 324) to the LU 322 and allocating processing capabilities to the LU 322. One or more of the LUs 322 may be well known logical units (WKLUs) that support specific types of commands and for specific UFS functions.
[0048] The storage units 326 may correspond to a normal storage region of the main storage 324, which includes, for example, triple level cell (TLC) NAND (e.g., which uses one cell to store three bits) and / or multi-level cell (MLC) NAND (e.g., which uses one cell to store multiple bits) . The write performance of TLC NAND is considerably lower than single level cell (SLC) NAND (e.g., which uses one cell to store one bit) because the logically defined TLC bits require more programming steps and have a higher error correction probability. To improve the write performance, part of the TLC NAND (normal storage 326) may be configured as SLC NAND and used as a write booster buffer 330 (temporarily or permanently) . Using SLC NAND as a write booster buffer 330 enables write requests to be processed with lower latency.
[0049] The device manager 320 performs device level functions (e.g., power management) and controls operations of the device 304 using the configuration information 328. The device manager 320 and logical units 322 may be implemented, for example, by a controller (e.g., controller 218 shown in FIG. 2) that may include, for example, one or more processors. The configuration information 328 may include, for example, descriptors, flags, and attributes of the device 304 that define and control specifics of the device, such as operating characteristics, interfaces, number of LUs 322, operating speeds, power profiles, etc. Descriptors may correspond to data structures with pre-defined formats, and each descriptor may have multiple fields defined. A flag may be, for example, a single Boolean value that represents a TRUE or FALSE, ‘0’ or ‘1’ , or ON or OFF type of value. An attribute is a parameter that represents a specific range of numeric values that can be written or read. During device initialization (bootup) , the host 302 discovers a set of the configuration information 328 by reading various descriptors, flags, and attributes from the device 304. For example, the host 302 may exchange UPIU Query Request (Read) commands and UPIU Query Responses with the device 304 to read the descriptors, flags, and attributes from the device 304.
[0050] FIGs. 4A and 4B are diagrams illustrating examples of write booster buffer configurations according to some aspects. There are two write booster buffer modes of operation: LU-dedicated buffer mode and shared buffer mode. FIG. 4A illustrates an example of LU-dedicated buffer mode, whereas FIG. 4B illustrates an example of shared buffer mode. In the example shown in FIG. 4A, a single write booster buffer 404a is allocated to a single LU 402 (e.g., LU #1) . Thus, the single write booster buffer 404a is dedicated to one logical LU 402 (e.g., LU#1) . In the example shown in FIG. 4B, a single shared write booster buffer 404b is shared by all of the LUs 402 (e.g., LU #0 …LU #31) . Thus, all LUs 402 share the same write booster buffer 404b. A device may be configured to support either the LU-dedicated buffer mode or the shared buffer mode.
[0051] FIG. 5 is a diagram illustrating a main storage of a data storage device according to some aspects. The main storage 502 (e.g., storage medium) includes a write booster buffer 504 (e.g., a turbo write booster buffer (TWB) ) and a normal storage region 506. The normal storage 506 may be configured as configured as TLC NAND and / or MLC NAND. The TWB 504 can be partitioned from the main storage 502 and configured as SLC NAND in a temporary or permanent manner. Using SLC NAND as the TWB 504 enables write requests to be processed with lower latency and improves the overall write performance. However, it should be understood that the main storage 502 may use technologies other than TLC and SLC NAND.
[0052] The TWB 504 includes a pinned region 508 and a non-pinned region 510. The pinned region 508 may be a specific region of the TWB 504 to minimize the amplification factor and ensure consistent performance with respect to read operations. For example, by storing essential data in the pinned region 508, the host controller can avoid unnecessary data movement during frequent access, which can eventually affect the write amplification factor (WAF) . In addition, since pinned data remains in physical blocks in the pinned region 508, the read access latency remains constant. Thus, the pinned region 508 functions as a read buffer within the write booster buffer 504, adaptively handling all read requests based on system requirements.
[0053] FIG. 6 is a diagram illustrating a command configured to write data to a pinned region of a write booster buffer according to some aspects. The write command 602 shown in FIG. 6 is a Write UFS command that requests a device (e.g., UFS device) to transfer a specified number of logical blocks from an application client and to write them to the storage medium. The write command 602 may be sent, for example, within a Command UPIU. The number of logical blocks may be specified, for example, by a logical block address field 604 indicating a starting logical block address of the data to transfer and a transfer length field 606 indicating a size (e.g., length or number of bytes of data) to transfer. As further illustrated in FIG. 6, the write command 602 includes a Group Number field 608. If the Group Number field 608 is set to group number 18h, as shown in FIG. 6, the write command 602 instructs the device to write the data to the pinned region of the write booster buffer.
[0054] FIG. 7 is a diagram illustrating examples of write booster buffer flags according to some aspects. Various flags may be set in the device by the host controller to manage and control operations of the write booster buffer. The flags can include, for example, an fWriteBoosterEn flag 702, an fWriteBoosterBufferFlushEn flag 704, an fWriteBoosterBufferFlushDuringHibernate flag 706, and an fUnpinEn flag 708. The fWriteBoosterEn flag 702 enables or disables the write booster buffer. For example, if the fWriteBoosterEn flag 702 is set to zero (0x0) , the write booster buffer is not enabled, whereas if the fWriteBoosterEn flag 702 is set to one (0x1) , the write booster buffer is enabled (and, as such, data can be written to the write booster buffer, including to the pinned region of the write booster buffer) .
[0055] The fWriteBoosterBufferFlushEn flag 704 is configured to initiate or enable a flush operation of the write booster buffer. For example, if the fWriteBoosterBufferFlushEn flag 704 is set to zero (0x0) , a flush operation of the write booster buffer is not performed, whereas if the fWriteBoosterBufferFlushEn flag 704 is set to one (0x1) , a flush operation of the write booster buffer is performed. The fWriteBoosterBufferFlushDuringHibernate flag 706 is configured to enable or disable flushing of the write booster buffer during a link hibernate state. For example, if the fWriteBoosterBufferFlushDuringHibernate flag 706 is set to zero (0x0) , the device does not initiate a write booster buffer flush operation whenever the link enters the hibernate state, whereas if the fWriteBoosterBufferFlushDuringHibernate flag 706 is set to one (0x1) , the device initiates a write booster buffer flush operation whenever the link enters the hibernate state.
[0056] The fUnpinEn flag 708 is configured to release or not release the data in the pinned region of the write booster buffer in order to allow or disallow flushing of the data in the pinned region of the write booster buffer. For example, if the fUnpinEn flag 708 is set to zero (0x0) , the pinned data in the write booster buffer is not flushed by a write booster buffer flush operation (e.g., when the fWriteBoosterBufferFlushEn flag 704 is set to one or when the fWriteBoosterBufferFlushDuringHibernate flag 706 is set to one) , whereas if the fUnpinEn flag 708 is set to one (0x1) , the pinned data in the write booster buffer is flushed by a write booster buffer flush operation.
[0057] In some examples, the device may be configured by the host to implement a partial flush mode that enables flushing of a portion of the write booster buffer. If the data is expected to be accessed soon or frequently, keeping the data in the write booster buffer for as long as possible can improve the overall performance. Using the partial flush mode, the host can indicate the data which is not to be moved out of the write booster buffer during a flush operation. The partial flush mode can improve the overall performance since high speed access for frequently accessed data can be continued even after the partial flush. There are two partial flush modes supported in UFS: FIFO (First-In-First-Out) mode and Pinned mode. In the FIFO partial flush mode, the data written later to the write booster buffer is excluded from the write booster flush operation. In the pinned partial flush mode, the data written to the pinned region of the write booster buffer is excluded from the write booster flush operation.
[0058] FIGs. 8A and 8B are diagrams illustrating examples of write booster buffer device descriptors and attributes for partial flush modes according to some aspects. FIG. 8A illustrates an example of a device descriptor supporting partial flush modes, whereas FIG. 8B illustrates an example of an attribute supporting partial flush modes. For example, as shown in FIG. 8A, a bExtendedWriteBoosterSupport descriptor 802 is configured to indicate whether one or more write booster buffer features are supported. The features include, for example, a FIFO partial flush mode and a pinned partial flush mode. In addition, as shown in FIG. 8B, a bWriteBoosterBufferPartialFlushMode attribute 804 is configured to enable one of the partial flush modes. For example, if the bWriteBoosterBufferPartialFlushMode attribute 804 is set to zero (0x0) , no partial flush mode is enabled, if the bWriteBoosterBufferPartialFlushMode attribute 804 is set to one (0x1) , the FIFO partial flush mode is enabled, and if the bWriteBoosterBufferPartialFlushMode attribute 804 is set to two (0x2) , the pinned partial flush mode is enabled.
[0059] In the FIFO partial flush mode (e.g., WriteBoosterBufferPartialFlushMode=1) , the data written later to the write booster buffer (whether in the pinned region or the non-pinned region) is excluded from the write booster buffer flush operation. The data size to be excluded from the write booster buffer flush operation may be set, for example, in a dCurrentFIFOSizeForWriteBoosterPartialFlushMode attribute (not specifically shown) . In the pinned partial flush mode (e.g., WriteBoosterBufferPartialFlushMode=2) , the data of write commands with group number 18h is intended to be written to the pinned region of the write booster buffer, and therefore, excluded from the write booster buffer flush operation. Thus, the pinned data in the pinned region of the write booster buffer can be released by either setting the fUnpinEn flag to one (0x1) or by changing the bWriteBoosterBufferPartialFlushMode to 0x0 (No partial flush mode) or 0x1 (FIFO partial flush mode) . The released pinned data is then flushed by the next write booster buffer (WriteBooster) flush operation.
[0060] FIG. 9 is a diagram illustrating an example of a write booster buffer flush operation according to some aspects. In the example shown in FIG. 9, a host controller 902 (e.g., UFS host controller) is configured to write data to a data storage device 904 (e.g., UFS device) . The data storage device 904 includes an fWriteBoosterEn flag set to one, and therefore, includes a normal storage region 906 and a write booster buffer 908. The normal storage region 906 may include, for example, TLC NAND. The write booster buffer may include, for example, SLC NAND. The write booster buffer 908 may include a pinned region 910 used to store frequently accessed data and a non-pinned region 912 used to store other data.
[0061] The host controller 902 can instruct the device to write data to the pinned region 910 using, for example, the Group Number 18h. For example, the host controller 902 can send commands 914 (e.g., write commands) with Group Number = 18h (e.g., commands C1+18h and C2+18h) to the data storage device 904. The data storage device 904 can then write the data identified by the commands 914 to the pinned region 910 of the write booster buffer 908 and send a respective response 916 (e.g., Response UPIUs R1 and R2) to the host controller 902 indicating success or failure of the respective write operations. In addition, the host controller 902 can instruct the device to write data to the non-pinned region 912 by excluding Group Number 18h from the corresponding write commands. For example, the host controller 902 can send commands 918 (e.g., write commands) without a group number (e.g., commands C3 and C4) to the data storage device 904. The data storage device 904 can then write the data identified by the commands 918 to the non-pinned region 912 of the write booster buffer 908 and send a respective response 920 (e.g., Response UPIUs R3 and R4) to the host controller 902 indicating success or failure of the respective write operations.
[0062] In the example shown in FIG. 9, to initiate a flush operation of the entire write booster buffer 908 including the pinned region 910, the host controller 902 can set the fUnpinEn flag in the data storage device 904 to one (fUnpinEn=1) and then set the flag fWriteBoosterBufferFlushEn to one (fWriteBoosterBufferFlushEn=1) to flush (e.g., copy over) the data in the write booster buffer 908 to the normal storage region 906. Although not illustrated, instead of setting the fUnpinEn flag to one, the pinned region 910 may be flushed by setting the bWriteBoosterBufferPartialFlushMode to either zero (0x0) to prevent a partial flush of the write booster buffer 908 or to one (0x1) to exclude only the latest written data (in the pinned region 910 and / or non-pinned region 912) from being flushed from the write booster buffer 908.
[0063] In any of the above scenarios, frequently read data may be flushed from the pinned region 910, which may impact the read performance of the device 904. For example, consider the use case in which all application metadata or gaming resources for a mobile device or laptop are stored in the pinned region 910 of the write booster buffer 908 for quicker access. This may include metadata for highly utilized applications, along with metadata for less utilized applications. Based on system analytics and to improve system performance, the host controller 902 may decide to move the less used application data from the pinned region 910 out to normal storage 906. However, in the current implementation, the entire metadata or gaming resources may be flushed for all the applications, including the metadata for the highly utilized applications.
[0064] To improve the read performance for frequently access data, in various aspects, a new partial flushing feature can support partial flushing of the data in the pinned region of the write booster buffer instead of flushing all of the data in the pinned region. The new partial flushing operation enables flushing of unused (or less frequently used) data in the pinned region, while retaining used (or more frequently used) data in the pinned region. To facilitate the new partial flushing feature, a new pinned partial flush flag can be provided in the data storage device.
[0065] FIG. 10 is a diagram illustrating an example of a pinned partial flush flag according to some aspects. As shown in FIG. 10, a fWriteBoosterBufferPinnedpartialFlushEn flag 1002 is configured to flush or not flush selected data in the pinned region of the write booster buffer to the normal storage region (e.g., user area) of a data storage device. For example, if the fWriteBoosterBufferPinnedpartialFlushEn flag 1002 is set to zero (0x0) , the partial flush operation is not performed, whereas if the fWriteBoosterBufferPinnedpartialFlushEn flag 1002 is set to one (0x1) , the partial flush operation is performed.
[0066] FIG. 11 is a diagram illustrating an example of a pinned partial write booster buffer flush operation according to some aspects. In the example shown in FIG. 11, a host controller 1102 (e.g., UFS host controller) is configured to write data to a data storage device 1104 (e.g., UFS device) . The data storage device 1104 includes an fWriteBoosterEn flag set to one, and therefore, includes a normal storage region 1106 and a write booster buffer 1108. The normal storage region 1106 may include, for example, TLC NAND. The write booster buffer may include, for example, SLC NAND. The write booster buffer 1108 may include a pinned region 1110 used to store frequently accessed data and a non-pinned region 1112 used to store other data.
[0067] In the example shown in FIG. 11, to initiate a flush operation of a portion of the data in the pinned region 1110 of the write booster buffer 1108, the host controller 1102 can send a query request 1114 to set an fWriteBoosterBufferPinnedpartialFlushEn flag in the data storage device 1104 to one (e.g., fWriteBoosterBufferPinnedpartialFlushEn flag =1) . The query request 1114 can identify the portion of the data to be flushed from the pinned region 1110. For example, the query request 1114 can include a start address and a size (e.g., length or number of bytes) of the portion of the data to be flushed from the pinned region 1110. The data storage device 1104 can then send a query response 1116 to the host controller 1102 indicating, for example, success or failure of the pinned partial flush operation.
[0068] FIG. 12 is a diagram illustrating an example of a query request to initiate a pinned partial flush operation according to some aspects. The query request 1202 shown in FIG. 12 is a Query Request UPIU generated by the host (e.g., the UFS host controller) and sent to a data storage device (e.g., UFS device) . The format of the Query Request UPIU 1202 includes a plurality of fields, including for example, transaction specific fields 1204. The transaction specific fields 1204 may include, for example, an operation code field 1206 indicating that the request 1202 is a set flag request to set a flag in the data storage device to one, a flag identifier field 1208 that specifies the particular flag to set in the data storage device (e.g., the fWriteBoosterBufferPinnedpartialFlushEn flag) , and reserved fields 1210 that specify the starting address and size (e.g., length or number of bytes) of data to be flushed. In some examples, instead of including the starting address and size of data to be flushed, the reserved fields 1210 can include the starting address and size of data to be excluded from the flush operation.
[0069] In order to include the starting address and size of data to be flushed (or excluded from being flushed) in the pinned region, the host controller can be informed by the data storage device whether the data sent in write commands with group number 18h is written to SLC (e.g., the pinned region of the write booster buffer) or TLC (e.g., normal storage) . The host controller can further store the addresses and size (e.g., length or number of bytes) of each of the data stored in the pinned region of the write booster buffer.
[0070] FIG. 13 is a diagram illustrating an example of maintaining pinned information for a pinned region of a write booster buffer according to some aspects. In the example shown in FIG. 13, a host controller 1302 (e.g., UFS host controller) is configured to write data to a data storage device 1304 (e.g., UFS device) . The data storage device 1304 includes an fWriteBoosterEn flag set to one, and therefore, includes a normal storage region 1306 and a write booster buffer 1308. The normal storage region 1306 may include, for example, TLC NAND. The write booster buffer may include, for example, SLC NAND. The write booster buffer 1308 may include a pinned region 1310 used to store frequently accessed data and a non-pinned region 1312 used to store other data.
[0071] The host controller 1302 can instruct the device 1304 to write data to the pinned region 1310 using, for example, the Group Number 18h. For example, the host controller 1302 can send commands 1314 (e.g., write commands) with Group Number = 18h (e.g., commands C1+18h and C2+18h) to the data storage device 1304. The data storage device 1304 can then write the data identified by the commands 1314 to the pinned region 1310 of the write booster buffer 1308 and send a respective response 1316 (e.g., Response UPIUs R1 and R2) to the host controller 1302 indicating success or failure of the respective write operations. The host controller 1302 can further instruct the device to write data to the non-pinned region 1312 by excluding Group Number 18h from the corresponding write commands. For example, the host controller 1302 can send commands 1318 (e.g., write commands) without a group number or without group number 18h (e.g., commands C3 and C4) to the data storage device 1304. The data storage device 1304 can then write the data identified by the commands 1318 to the non-pinned region 1312 of the write booster buffer 1308 and send a respective response 1320 (e.g., Response UPIUs R3 and R4) to the host controller 1302 indicating success or failure of the respective write operations.
[0072] In addition, the Response UPIUs 1316 for the data written with group number 18h can further indicate whether the respective data for each of the write commands 1314 was written to TLC (e.g., normal storage 1306) or SLC (e.g., the pinned region 1310) . In some examples, the pinned region 1310 may be full and the data storage device 1306 may not be able to write the data to the pinned region 1310. In this example, the data storage device 1304 may write the data to the normal storage region 1306 (or the non-pinned region 1312, if available) . In either case (normal storage 1306 or non-pinned region 1312) , the Response UPIU 1316 can indicate TLC to inform the host controller 1302 that the data was not stored in the pinned region 1310. In the example shown in FIG. 13, the data for each of the write commands 1314 was written to the pinned region 1310 of the write booster buffer. Therefore, each of the illustrated Response UPIUs 1316 indicates SLC (e.g., R1+SLC and R2+SLC) .
[0073] The host controller 1302 can further maintain a table 1322 that includes, for each write command with group number 18h, a respective start address and respective length of the corresponding data written to the pinned region of the write booster buffer. Based on the Response UPIUs 1316 received for write commands 1314 with group number 18h, the host controller 1302 can further update the table with the command, start address, and length of data stored in the pinned region. For example, the host controller 1302 can update the table to include the command, start address and length for each received Response UPIU 1316 that indicates that the corresponding data was stored in SLC. The host controller 1302 can utilize the table 1322 to identify unused data or data accessed less frequently to be flushed from the pinned region 1310 of the write booster buffer 1308 in a pinned partial flush operation. For example, the host controller 1302 can set the flag WriteBoosterBufferPinnedpartialFlushEn=1 using a query request including the starting address and size of the data to be flushed obtained from the table 1322. The host controller 1302 can further update the table 1322 to remove the flushed data.
[0074] FIG. 14 is a diagram illustrating an example of a response configured to indicate whether data is stored in a pinned region of a write booster buffer according to some aspects. The response shown in FIG. 14 is a Response UPIU 1402 sent from a data storage device to a host controller in response to receiving a command (e.g., a write command in a Command UPIU) from the host controller.
[0075] The format of the Response UPIU 1402 includes a header containing a plurality of fields. The fields include, for example, a transaction type 1404 containing a Type Code Value (xx10 0001b) indicating that the UPIU is a Response UPIU. The fields may further include a Flags field 1406 including, for example, a flag that may vary with the transaction type, a LUN field 1408 containing the logical unit number to which the request (e.g., write buffer command) was targeted, and a Task Tag 1410 generated by the host for the task (e.g., write command) . The Response UPIU 1402 may further include an Initiator ID (IID) field 1412 and EXT_IID field 1414 configured to identify the initiator (host) of the task (e.g., write command) . The Response UPIU 1402 may further include a Command Set Type 1416 that indicates the type of command set (e.g., SCSI command set, UFS specific command set) associated with the Response UPIU 1402 and a Status field 1418 indicating the command set specific status of the specific command (e.g., write command) issued by the initiator device. For example, if the command set indicated in the Command Set Type 1416 is the SCSI command set, the Status field 1418 may include an Opcode that indicates, for example, that the Status is “Good” or other defined Opcode.
[0076] The Response UPIU 1402 may further include a Total Extra Header Segment (EHS) Length field 1420 that represents the size in 32-byte units of all extra header segments contained within the Response UPIU 1402, a Device Information field 1422 that provides device level information not necessarily related with the logical unit executing the command, a data segment length field 1424 containing the number of bytes in a data segment (not specifically shown in FIG. 14) of the Response UPIU 1402, and a Residual Transfer Count field 1426 that is valid based on type of flag indicated in the Flags field 1406. When the Data Segment Length field 1424 contains zero, it indicates that there is no data segment area in the UPIU. The Response UPIU 1402 may further include a Response field 1428 that indicates the overall success or failure of the task (e.g., write buffer command) . The Response field 1428 may include, for example, an Opcode 00h indicating “Target Success” or an Opcode 01h indicating “Target Failure” .
[0077] In various aspects, the Response UPIU 1402 can further include a Memory Type field 1430 in one of the previously reserved fields of the Response UPIU 1402. The Memory Type field 1430 is a bit field including a bit set to indicate whether the data was written to the pinned region of the write booster buffer. For example, the bit field may have a first value (e.g., 1) that specifies the data was written to an SLC memory associated with the pinned region of the write booster buffer or a second value (e.g., 0) that specifies that the data was written to TLC memory associated with the normal storage region of the device (or non-pinned region of the write booster buffer) . The Memory Type field 1430 can be included at least in all Response UPIUs 1402 for write commands including the group number 18h.
[0078] In some examples, the pinned region of the write booster buffer may be unavailable (e.g., full or not configured) . In this example, the data associated with write commands with group number 18h may be written to the non-pinned region of the write booster buffer or to the normal storage region of the device if the non-pinned region is also unavailable (e.g., full or not configured) . However, in current UFS systems, if the pinned region later becomes available (e.g., after a partial or full flush or after configuration) , frequently accessed (frequently read) data stored in the non-pinned region or in normal storage is not moved to the pinned region (e.g., the data remains in the normal storage region or the non-pinned region) . As a result, frequently read data that is not stored in the pinned region may suffer a penalty from being read from the TLC memory.
[0079] FIG. 15 is a diagram illustrating an example of a copy operation to copy data from a normal storage region to a pinned region of a data storage device according to some aspects. In the example shown in FIG. 15, a host controller 1502 (e.g., UFS host controller) is configured to write data to a data storage device 1504 (e.g., UFS device) . The data storage device 1504 includes an fWriteBoosterEn flag set to one, and therefore, includes a normal storage region 1506 and a write booster buffer 1508. The normal storage region 1506 may include, for example, TLC NAND. The write booster buffer may include, for example, SLC NAND. The write booster buffer 1508 may include a pinned region 1510 used to store frequently accessed data and a non-pinned region 1512 used to store other data.
[0080] The host controller 1502 can instruct the device 1504 to write data to the write booster buffer 1508 or to normal storage 1506 depending on the write booster configuration. For example, if the fWriteBoosterEn flag is set to one and the device 1504 is configured in shared buffer mode (as shown in FIG. 4B) , data written to any logical unit (LU) by the host controller is written to the write booster buffer 1508. However, if the fWriteBoosterEn flag is set to one and the device 1504 is configured in LU dedicated buffer mode (as shown in FIG. 4A) , data written to the LU configured to use a dedicated buffer is written to the write booster buffer 1508, whereas data written to any other LU is written to normal storage 1506. For data written to the write booster buffer 1508, the host controller 1502 can further instruct the device 1504 to write data to the pinned region 1510 by including Group Number 18h in the write command or to the non-pinned region 1512 by excluding Group Number 18h from the write command.
[0081] In the example shown in FIG. 15, the pinned region 1510 is unavailable (e.g., full or not configured) . In this example, the device 1504 notifies the host controller 1502 with a PINNED_WRITEBOOSTER_BUFFER_FULL exception mechanism. The mechanism is enabled by setting a PINNED_WRITEBOOSTER_EVENT_EN bit of a wExceptionEventControl attribute in the device 1504. Therefore, subsequent write commands (e.g., C1 and C2) sent by the host controller 1502 can write new data to the non-pinned region 1512 or to the normal storage 1506 if the non-pinned region 1512 is full or not configured, the latter being illustrated.
[0082] In examples in which the pinned region 1510 is full, the host controller 1502 can initiate a partial flush of the pinned region 1510 by setting the WriteBoosterBufferPinnedpartialFlushEn=1 to move a portion of the data (e.g., less frequently accessed data) in the pinned region 1510 to normal storage 1506. In other examples, the host controller 1502 may unpin the data in the pinned region 1510 and initiate a flush of the entire write booster buffer 1508 (including the pinned region 1510 and the non-pinned region 1512) . In still other examples, the host controller 1502 may set the bWriteBoosterBufferPartialFlushMode to either zero (0x0) and initiate a flush of the entire write booster buffer 1508 or to one (0x1) and initiate a flush of the entire write booster buffer 1508, excluding only the latest written data from being flushed.
[0083] The host controller 1502 can further monitor the data in the normal storage 1506 to identify frequently accessed data and send a command 1516 (e.g., a read command or write command sent in a Command UPIU) to instruct the device 1504 to copy the frequently accessed data in the normal storage 1506 to the pinned region 1510 of the write booster buffer. In some examples, the frequently accessed data includes data intended to be stored to a pinned region of a write booster buffer. For example, the data can include data stored to the normal storage region in response to the pinned region being unavailable. In some examples, the frequently accessed data includes data previously stored in a pinned region of a write booster buffer and flushed to the normal storage. In some examples, the host controller can maintain a table of frequently accessed data that is accessed more than a threshold number of times in a predefined period of time or that is of a particular data type. Examples of frequently access data may include, but are not limited to, operating system (OS) files (e.g., critical components of the device’s operating system) , boot files (e.g., files necessary for the device’s boot process) , frequently used applications (e.g., applications or application data that are accessed often) , hot data (e.g., any data that is frequently accessed or updated, such as database indices or user preferences) , and metadata and file system structures (e.g., UFS metadata, such as Inode tables, directory structures, file allocation tables, etc. ) .
[0084] For example, the copied data may include the new data written by commands C1 and C2 and may also include other data previously flushed from the pinned region 1510. The host controller 1502 may send the command 1516, for example, based on determining that there is available space in the pinned region 1510. In some examples, the host controller 1502 may determine that there is available space in response to performing the flush or configuring the pinned region 1510.
[0085] FIG. 16 is a diagram illustrating an example of a command configured to initiate copying of data from the normal storage region to the pinned region according to some aspects. The command 1602 shown in FIG. 16 is a Command UPIU sent from the host controller of the host to the device. The Command UPIU includes a header containing a plurality of fields. The fields include, for example, a transaction type 1604 containing a Type Code Value (xx00 0001b) indicating that the UPIU is a Command UPIU. The fields may further include a Flags field 1606 including, for example, a flag that may vary with the transaction type, a LUN field 1608 containing the logical unit number to which the request (e.g., command) was targeted, and a Task Tag 1610 generated by the initiator device for the task (e.g., command) . The Command UPIU 1602 may further include an Initiator ID (IID) field 1212 and EXT_IID field 1614 configured to identify the initiator device of the task (e.g., command) . The Command UPIU 1602 may further include a Command Set Type 1616 that indicates the type of command set (e.g., SCSI command set, UFS specific command set) associated with the Command UPIU 1602, a Total Extra Header Segment (EHS) Length field 1618 that represents the size in 32-byte units of all extra header segments contained within the Command UPIU 1602 and a data segment length field 1620 containing the number of bytes in a data segment of the Command UPIU 1602 (not shown) .
[0086] The Command UPIU 1602 further includes a Read Performance Alert field 1622 (e.g., a bit field) that may be set to one to initiate a copy of data from a normal storage region of the device to a pinned region of a write booster buffer of the device. In addition, the Command UPIU 1602 further includes an expected data transfer length field 1624 representing the number of bytes to be transferred to complete the command request. The Command UPIU 1602 can further include a command descriptor block (CDB) field 1626 containing a CDB of the UFS command or SCSI command. For example, the CDB field 1626 may include an array of 16 bytes containing a standard CDB as defined by one of the supported UFS command set types or up to a 16 byte CDB for SCSI commands. The CDB field 1626 may include, for example, a write command (e.g., as shown in FIG. 6) or read command that includes the logical block address and transfer length of the data to be copied.
[0087] FIG. 17 is a flow chart illustrating an exemplary process 1700 for initiating a pinned partial flush according to some aspects. As described below, some or all illustrated features may be omitted in a particular implementation within the scope of the present disclosure, and some illustrated features may not be required for implementation of all embodiments. In some examples, the process 1700 may be carried out by the host controller 212 shown in FIG. 2, the host controller 312 shown in FIG. 3, the host controller 902 shown in FIG. 9, the host controller 1102 shown in FIG. 11, the host controller 1302 shown in FIG. 13, and / or the host controller 1502 shown in FIG. 15. In some examples, the process 1700 may be carried out by any suitable apparatus or means for carrying out the functions or algorithm described below.
[0088] At block 1702, the process begins identifying data stored in a pinned region of a write booster buffer of a device that is coupled to a host via a link therebetween. For example, the host controller can send at least one command to the device to write the data to the pinned region of the write booster buffer of the device and receive at least one response from the device that indicates successful execution or failed execution of the at least one command. Each command of the at least one command can include a group number field having a group number that instructs the device to write the data to the pinned region of the write booster buffer. In addition, each response of the at least one response can include a bit field having a bit set to indicate whether the data was written to the pinned region of the write booster buffer. The bit field can include a value that specifies that the data was written to single level cell memory associated with the pinned region of the write booster buffer or to triple level cell memory associated with the normal storage region of the device. In addition, the host controller can maintain a table including, for each of the at least one command, a respective start address and respective length of the data written to the pinned region of the write booster buffer based on the bit field in the at least one response.
[0089] At block 1704, the process continues with sending a query request to the device to perform a partial flush of the data stored in the pinned region. The query request identifies a portion of the data to flush from the pinned region to a normal storage region of the device. In some examples, the query request includes a start address and a size of the portion of the data to be flushed. In some examples, the query request includes one or more reserved fields including the start address and the size of the data to be flushed. In some examples, the query request further includes a set flag operation code and a flag identifier field that identifies a partial flush flag to set in the device to initiate the flush of the portion of the data in the pinned region.
[0090] In some examples, the host controller may further send a command to the device to copy additional data from the normal storage region to the pinned region of the write booster buffer. In some examples, the command includes a bit field having a bit set to initiate the copy of the additional data from the normal storage region to the pinned region of the write booster buffer. In some examples, the command is a command Universal Flash Storage (UFS) Protocol Information Unit (UPIU) . The command UPIU can include a write command or a read command and a logical block address and transfer length of the additional data to be copied.
[0091] In one configuration, an apparatus includes means for identifying data stored in a pinned region of a write booster buffer of a device, wherein the device is coupled to the host via a link therebetween, and means for sending a query request to the device to perform a partial flush of the data stored in the pinned region, wherein the query request identifies a portion of the data to flush from the pinned region to a normal storage region of the device. In one aspect, the aforementioned means may be the host controller 212 shown in FIG. 2, the host controller 312 shown in FIG. 3, the host controller 902 shown in FIG. 9, the host controller 1102 shown in FIG. 11, the host controller 1302 shown in FIG. 13, and / or the host controller 1502 shown in FIG. 15 configured to perform the functions recited by the aforementioned means. In another aspect, the aforementioned means may be a circuit or any apparatus configured to perform the functions recited by the aforementioned means.
[0092] Of course, in the above examples, the host controller is merely provided as an example, and other means for carrying out the described functions may be included within various aspects of the present disclosure, including any other suitable apparatus or means described in any one of the FIGs. 1–4, 9, 11, 13, and / or 15, and utilizing, for example, the processes and / or algorithms described herein in relation to FIG. 17.
[0093] FIG. 18 is a flow chart illustrating another exemplary process 1800 for performing a pinned partial flush according to some aspects. As described below, some or all illustrated features may be omitted in a particular implementation within the scope of the present disclosure, and some illustrated features may not be required for implementation of all embodiments. In some examples, the process 1800 may be carried out by the UFS device 206 (e.g., device controller 218) shown in FIG. 2, the device 304 shown in FIG. 3, the device 904 shown in FIG. 9, the device 1104 shown in FIG. 11, the device 1304 shown in FIG. 13, and / or the device 1504 shown in FIG. 15. In some examples, the process 1800 may be carried out by any suitable apparatus or means for carrying out the functions or algorithm described below.
[0094] At block 1802, the process begins with receiving a query request from a host to perform a partial flush of the data stored in a pinned region of a write booster buffer of the device. The query request identifies a portion of the data to flush from the pinned region to a normal storage region of the device. In some examples, the query request includes a start address and a size of the portion of the data to be flushed. In some examples, the query request includes one or more reserved fields including the start address and the size of the data to be flushed. In some examples, the query request further includes a set flag operation code and a flag identifier field that identifies a partial flush flag to set in the device to initiate the flush of the portion of the data in the pinned region. At block 1804, the process continues with performing the partial flush of the portion of the data from the pinned region to the normal storage region.
[0095] In some examples, the device may further receive a command from the host to copy additional data from the normal storage region to the pinned region of the write booster buffer. In some examples, the command includes a bit field having a bit set to initiate the copy of the additional data from the normal storage region to the pinned region of the write booster buffer. In some examples, the command is a command Universal Flash Storage (UFS) Protocol Information Unit (UPIU) . The command UPIU can include a write command or a read command and a logical block address and transfer length of the additional data to be copied.
[0096] In one configuration, an apparatus includes means for receiving a query request from a host to perform a partial flush of the data stored in a pinned region of a write booster buffer of the device, wherein the query request identifies a portion of the data to flush from the pinned region to a normal storage region of the device, and means for performing the partial flush of the portion of the data from the pinned region to the normal storage region. In one aspect, the aforementioned means may be the UFS device 206 (e.g., device controller 218) shown in FIG. 2, the device 304 shown in FIG. 3, the device 904 shown in FIG. 9, the device 1104 shown in FIG. 11, the device 1304 shown in FIG. 13, and / or the device 1504 shown in FIG. 15 configured to perform the functions recited by the aforementioned means. In another aspect, the aforementioned means may be a circuit or any apparatus configured to perform the functions recited by the aforementioned means.
[0097] Of course, in the above examples, the device is merely provided as an example, and other means for carrying out the described functions may be included within various aspects of the present disclosure, including any other suitable apparatus or means described in any one of the FIGs. 1–4, 9, 11, 13, and / or 15, and utilizing, for example, the processes and / or algorithms described herein in relation to FIG. 18.
[0098] FIG. 19 is a flow chart illustrating an exemplary process 1900 for initiating a copy from a normal storage region to a pinned storage region according to some aspects. As described below, some or all illustrated features may be omitted in a particular implementation within the scope of the present disclosure, and some illustrated features may not be required for implementation of all embodiments. In some examples, the process 1900 may be carried out by the host controller 212 shown in FIG. 2, the host controller 312 shown in FIG. 3, the host controller 902 shown in FIG. 9, the host controller 1102 shown in FIG. 11, the host controller 1302 shown in FIG. 13, and / or the host controller 1502 shown in FIG. 15. In some examples, the process 1900 may be carried out by any suitable apparatus or means for carrying out the functions or algorithm described below.
[0099] At block 1902, the process begins with identifying frequently access data stored in normal storage region of a device that is coupled to a host via a link therebetween. In some examples, the frequently accessed data includes data intended to be stored to a pinned region of a write booster buffer. For example, the data can include data stored to the normal storage region in response to the pinned region being unavailable. In some examples, the frequently accessed data includes data previously stored in a pinned region of a write booster buffer and flushed to the normal storage. In some examples, the host controller can maintain a table of frequently accessed data that is accessed more than a threshold number of times in a predefined period of time or that is of a particular data type.
[0100] At block 1904, the process continues with sending a command to the device to copy the frequently accessed data from the normal storage region to a pinned region of a write booster buffer of the device. In some examples, the command includes a bit field having a bit set to initiate the copy of the frequently accessed data from the normal storage region to the pinned region of the write booster buffer. In some examples, the command is a command Universal Flash Storage (UFS) Protocol Information Unit (UPIU) . The command UPIU can include a write command or a read command and a logical block address and transfer length of the frequently accessed data to be copied.
[0101] In one configuration, an apparatus includes means for identifying frequently access data stored in normal storage region of a device that is coupled to a host via a link therebetween and means for sending a command to the device to copy the frequently accessed data from the normal storage region to a pinned region of a write booster buffer of the device. In one aspect, the aforementioned means may be the host controller 212 shown in FIG. 2, the host controller 312 shown in FIG. 3, the host controller 902 shown in FIG. 9, the host controller 1102 shown in FIG. 11, the host controller 1302 shown in FIG. 13, and / or the host controller 1502 shown in FIG. 15 configured to perform the functions recited by the aforementioned means configured to perform the functions recited by the aforementioned means. In another aspect, the aforementioned means may be a circuit or any apparatus configured to perform the functions recited by the aforementioned means.
[0102] Of course, in the above examples, the host is merely provided as an example, and other means for carrying out the described functions may be included within various aspects of the present disclosure, including any other suitable apparatus or means described in any one of the FIGs. 1–4, 9, 11, 13, and / or 15, and utilizing, for example, the processes and / or algorithms described herein in relation to FIG. 19.
[0103] FIG. 20 is a flow chart illustrating an exemplary process 2000 for performing a copy from a normal storage region to a pinned storage region according to some aspects. As described below, some or all illustrated features may be omitted in a particular implementation within the scope of the present disclosure, and some illustrated features may not be required for implementation of all embodiments. In some examples, the process 2000 may be carried out by the UFS device 206 (e.g., device controller 218) shown in FIG. 2, the device 304 shown in FIG. 3, the device 904 shown in FIG. 9, the device 1104 shown in FIG. 11, the device 1304 shown in FIG. 13, and / or the device 1504 shown in FIG. 15. In some examples, the process 2000 may be carried out by any suitable apparatus or means for carrying out the functions or algorithm described below.
[0104] At block 2002, the process begins with receiving a command from a host to copy frequently accessed data from a normal storage region of the device to a pinned region of a write booster buffer of the device. In some examples, the command includes a bit field having a bit set to initiate the copy of the frequently accessed data from the normal storage region to the pinned region of the write booster buffer. In some examples, the command is a command Universal Flash Storage (UFS) Protocol Information Unit (UPIU) . The command UPIU can include a write command or a read command and a logical block address and transfer length of the frequently accessed data to be copied. At block 2004, the process continues with copying the frequently accessed data from the normal storage region of the device to the pinned region of the device.
[0105] In one configuration, an apparatus includes means for receiving a command from a host to copy frequently accessed data from a normal storage region of the device to a pinned region of a write booster buffer of the device, and means for copying the frequently accessed data from the normal storage region of the device to the pinned region of the device. In one aspect, the aforementioned means may be the UFS device 206 (e.g., device controller 218) shown in FIG. 2, the device 304 shown in FIG. 3, the device 904 shown in FIG. 9, the device 1104 shown in FIG. 11, the device 1304 shown in FIG. 13, and / or the device 1504 shown in FIG. 15 configured to perform the functions recited by the aforementioned means. In another aspect, the aforementioned means may be a circuit or any apparatus configured to perform the functions recited by the aforementioned means.
[0106] Of course, in the above examples, the device is merely provided as an example, and other means for carrying out the described functions may be included within various aspects of the present disclosure, including any other suitable apparatus or means described in any one of the FIGs. 1–4, 9, 11, 13, and / or 15, and utilizing, for example, the processes and / or algorithms described herein in relation to FIG. 20.
[0107] The following provides an overview of aspects of the present disclosure:
[0108] Aspect 1: A method operable at a host, the method comprising: identifying data stored in a pinned region of a write booster buffer of a device, wherein the device is coupled to the host via a link therebetween; and sending a query request to the device to perform a partial flush of the data stored in the pinned region, wherein the query request identifies a portion of the data to flush from the pinned region to a normal storage region of the device.
[0109] Aspect 2: The method of aspect 1, wherein the query request comprises a start address and a size of the portion of the data to be flushed.
[0110] Aspect 3: The method of aspect 2, wherein the query request comprises one or more reserved fields including the start address and the size of the data to be flushed.
[0111] Aspect 4: The method of aspect 2 or 3, wherein the query request further comprises a set flag operation code and a flag identifier field that identifies a partial flush flag to set in the device to initiate the flush of the portion of the data in the pinned region.
[0112] Aspect 5: The method of any of aspects 1 through 4, further comprising: sending at least one command to the device to write the data to the pinned region of the write booster buffer of the device; and receiving at least one response from the device that indicates successful execution or failed execution of the at least one command.
[0113] Aspect 6: The method of aspect 5, wherein each command of the at least one command comprises a group number field comprising a group number that instructs the device to write the data to the pinned region of the write booster buffer.
[0114] Aspect 7: The method of aspect 6, wherein each response of the at least one response comprises a bit field comprising a bit set to indicate whether the data was written to the pinned region of the write booster buffer.
[0115] Aspect 8: The method of aspect 7, wherein the bit field comprises a value that specifies that the data was written to single level cell memory associated with the pinned region of the write booster buffer or to triple level cell memory associated with the normal storage region of the device.
[0116] Aspect 9: The method of aspect 7 or 8, further comprising: maintaining a table comprising, for each of the at least one command, a respective start address and respective length of the data written to the pinned region of the write booster buffer based on the bit field in the at least one response.
[0117] Aspect 10: The method of any of aspects 1 through 9, further comprising: sending a command to the device to copy additional data from the normal storage region to the pinned region of the write booster buffer.
[0118] Aspect 11: The method of aspect 10, wherein the command comprises a bit field comprising a bit set to initiate the copy of the additional data from the normal storage region to the pinned region of the write booster buffer.
[0119] Aspect 12: The method of aspect 10 or 11, wherein the command is a command Universal Flash Storage (UFS) Protocol Information Unit (UPIU) , wherein the command UPIU comprises a write command or a read command and a logical block address and transfer length of the additional data to be copied.
[0120] Aspect 13: An apparatus at a host comprising an interconnect circuit configured to communicate with a device via a link between the host and the device and a host controller configured to perform a method of any of aspects 1 through 12.
[0121] Aspect 14: A host comprising means for performing a method of any of aspects 1 through 12.
[0122] Within the present disclosure, the word “exemplary” is used to mean “serving as an example, instance, or illustration. ” Any implementation or aspect described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other aspects of the disclosure. Likewise, the term “aspects” does not require that all aspects of the disclosure include the discussed feature, advantage or mode of operation. The term “coupled” is used herein to refer to the direct or indirect coupling between two objects. For example, if object A physically touches object B, and object B touches object C, then objects A and C may still be considered coupled to one another-even if they do not directly physically touch each other. For instance, a first object may be coupled to a second object even though the first object is never directly physically in contact with the second object. The terms “circuit” and “circuitry” are used broadly, and intended to include both hardware implementations of electrical devices and conductors that, when connected and configured, enable the performance of the functions described in the present disclosure, without limitation as to the type of electronic circuits, as well as software implementations of information and instructions that, when executed by a processor, enable the performance of the functions described in the present disclosure.
[0123] One or more of the components, steps, features and / or functions illustrated in FIGs. 1–20 may be rearranged and / or combined into a single component, step, feature or function or embodied in several components, steps, or functions. Additional elements, components, steps, and / or functions may also be added without departing from novel features disclosed herein. The apparatus, devices, and / or components illustrated in FIGs. 1–4, 9, 11, 13, and 15 may be configured to perform one or more of the methods, features, or steps described herein. The novel algorithms described herein may also be efficiently implemented in software and / or embedded in hardware.
[0124] Any reference to an element herein using a designation e.g., “first, ” “second, ” and so forth does not generally limit the quantity or order of those elements. Rather, these designations are used herein as a convenient way of distinguishing between two or more elements or instances of an element. Thus, a reference to first and second elements does not mean that only two elements can be employed, or that the first element must precede the second element.
[0125] It is to be understood that the specific order or hierarchy of steps in the methods disclosed is an illustration of exemplary processes. Based upon design preferences, it is understood that the specific order or hierarchy of steps in the methods may be rearranged. The accompanying method claims present elements of the various steps in a sample order, and are not meant to be limited to the specific order or hierarchy presented unless specifically recited therein.
[0126] The previous description is provided to enable any person skilled in the art to practice the various aspects described herein. Various modifications to these aspects will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other aspects. Thus, the claims are not intended to be limited to the aspects shown herein, but are to be accorded the full scope consistent with the language of the claims, wherein reference to an element in the singular is not intended to mean “one and only one” unless specifically so stated, but rather “one or more. ” Unless specifically stated otherwise, the term “some” refers to one or more. A phrase referring to “at least one of” a list of items refers to any combination of those items, including single members. As an example, “at least one of: a, b, or c” is intended to cover: a; b; c; a and b; a and c; b and c; and a, b and c. All structural and functional equivalents to the elements of the various aspects described throughout this disclosure that are known or later come to be known to those of ordinary skill in the art are expressly incorporated herein by reference and are intended to be encompassed by the claims. Moreover, nothing disclosed herein is intended to be dedicated to the public regardless of whether such disclosure is explicitly recited in the claims. No claim element is to be construed under the provisions of 35 U.S.C. §112 (f) unless the element is expressly recited using the phrase “means for” or, in the case of a method claim, the element is recited using the phrase “step for. ”
Claims
1.An apparatus at a host, comprising:an interconnect circuit configured to communicate with a device via a link between the host and the device; anda host controller configured to:identify data stored in a pinned region of a write booster buffer of the device, andsend a query request to the device via the interconnect circuit to perform a partial flush of the data stored in the pinned region, wherein the partial flush of the data is configured to flush a portion of the data from the pinned region to a normal storage region of the device.2.The apparatus of claim 1, wherein the query request comprises a start address and a size of the portion of the data to be flushed.3.The apparatus of claim 2, wherein the query request comprises one or more reserved fields including the start address and the size of the data to be flushed.4.The apparatus of claim 2, wherein the query request further comprises a set flag operation code and a flag identifier field that identifies a partial flush flag to set in the device to initiate the partial flush of the portion of the data in the pinned region.5.The apparatus of claim 1, wherein the host controller is further configured to:send at least one command to the device to write the data to the pinned region of the write booster buffer of the device; andreceive at least one response from the device that indicates successful execution or failed execution of the at least one command.6.The apparatus of claim 5, wherein each command of the at least one command comprises a group number field comprising a group number that instructs the device to write the data to the pinned region of the write booster buffer.7.The apparatus of claim 6, wherein each response of the at least one response comprises a bit field comprising a bit set to indicate whether the data was written to the pinned region of the write booster buffer.8.The apparatus of claim 7, wherein the bit field comprises a value that specifies that the data was written to single level cell memory associated with the pinned region of the write booster buffer or to triple level cell memory associated with the normal storage region of the device.9.The apparatus of claim 7, wherein the host controller is further configured to:maintain a table comprising, for each of the at least one command, a respective start address and respective length of the data written to the pinned region of the write booster buffer based on the bit field in the at least one response.10.The apparatus of claim 1, wherein the host controller is further configured to:send a command to the device to copy additional data from the normal storage region to the pinned region of the write booster buffer.11.The apparatus of claim 10, wherein the command comprises a bit field comprising a bit set to initiate the copy of the additional data from the normal storage region to the pinned region of the write booster buffer.12.The apparatus of claim 10, wherein the command is a command Universal Flash Storage (UFS) Protocol Information Unit (UPIU) , wherein the command UPIU comprises a write command or a read command and a logical block address and transfer length of the additional data to be copied.13.A method operable at a host, the method comprising:identifying data stored in a pinned region of a write booster buffer of a device, wherein the device is coupled to the host via a link therebetween; andsending a query request to the device to perform a partial flush of the data stored in the pinned region, wherein the query request identifies a portion of the data to flush from the pinned region to a normal storage region of the device.14.The method of claim 13, wherein the query request comprises one or more reserved fields including a start address and a size of the portion of the data to be flushed.15.The method of claim 14, wherein the query request further comprises a set flag operation code and a flag identifier field that identifies a partial flush flag to set in the device to initiate the flush of the portion of the data in the pinned region.16.The method of claim 13, further comprising:sending at least one command to the device to write the data to the pinned region of the write booster buffer of the device, wherein each command of the at least one command comprises a group number field comprising a group number that instructs the device to write the data to the pinned region of the write booster buffer; andreceiving at least one response from the device that indicates successful execution or failed execution of the at least one command, wherein each response of the at least one response comprises a bit field comprising a bit set to indicate whether the data was written to the pinned region of the write booster buffer.17.The method of claim 16, wherein the bit field comprises a value that specifies that the data was written to single level cell memory associated with the pinned region of the write booster buffer or to triple level cell memory associated with the normal storage region of the device.18.The method of claim 17, further comprising:maintaining a table comprising, for each of the at least one command, a respective start address and respective length of the data written to the pinned region of the write booster buffer based on the bit field in the at least one response.19.The method of claim 13, further comprising:sending a command to the device to copy additional data from the normal storage region to the pinned region of the write booster buffer, wherein the command comprises a bit field comprising a bit set to initiate the copy of the additional data from the normal storage region to the pinned region of the write booster buffer.20.A host, comprising:means for identifying data stored in a pinned region of a write booster buffer of a device, wherein the device is coupled to the host via a link therebetween; andmeans for sending a query request to the device to perform a partial flush of the data stored in the pinned region, wherein the query request identifies a portion of the data to flush from the pinned region to a normal storage region of the device.