Metal interconnect structure and method for forming same

Abstract

A metal interconnect structure and a method for forming same, the method comprising: providing a semiconductor substrate, wherein there is an inter-metal dielectric (IMD) on the surface of the semiconductor substrate; etching the IMD to form a trench and a through hole; forming buffer layers at the bottoms of the trench and the through hole; forming metal barrier material layers on the surfaces of the buffer layers, and bombarding the metal barrier material layers to form metal barrier layers on sidewalls of the trench and the through hole; and filling the trench and the through hole with a metal material to form metal interconnect lines. By means of the solution, the problem of IMD damage at the bottom of a metal trench caused by the formation process of a metal barrier layer can be effectively avoided, thereby prolonging the TDDB lifetime of an IMD.

Description

Metal interconnect structures and their formation methods

[0001] This application claims priority to Chinese Patent Application No. 202510098761.3, filed on January 22, 2025, entitled "Metal Interconnect Structure and Method for Forming the Same", the entire contents of which are incorporated herein by reference. Technical Field

[0002] This invention belongs to the field of semiconductor technology, and particularly relates to a metal interconnect structure and a method for forming the same. Background Technology

[0003] In existing metal interconnect structure formation processes, the process of forming a metal barrier layer on the sidewall of a metal trench often results in damage to the inter-metal dielectric (IMD) layer at the bottom of the metal trench (or between the upper and lower metal wires).

[0004] Specifically, in existing metal barrier layer formation schemes, a metal barrier material layer is typically deposited at the bottom of the metal trench first; then the metal barrier material at the bottom of the metal trench is bombarded (e.g., by using a re-sputter process) so that the metal barrier material at the bottom of the metal trench is bombarded to the sidewall of the metal trench, forming a metal barrier layer on the sidewall, thereby effectively preventing the metal material in the metal trench from diffusing to the IMD outside the sidewall of the metal trench.

[0005] However, in metal interconnect structures, besides the inter-mold dielectric (IMD) between the upper and lower metal lines (i.e., the two metal lines are insulated from each other by the IMD), there is often a metal interconnection relationship between the current metal line and other metal lines in the previous layer (i.e., electrical connection is achieved through metal vias). Therefore, in order to increase the coverage of the metal barrier material on the sidewalls of the metal trenches and vias (the higher the coverage of the metal barrier material on the sidewalls, the stronger the anti-metal diffusion effect is usually), and to reduce the resistivity between the upper and lower metal lines, during the bombardment of the metal barrier material layer at the bottom of the metal trenches and vias, the amount of metal barrier material remaining at the bottom of the metal trenches and vias after bombardment is minimized to reduce resistivity. This inevitably leads to damage to the IMD between the upper and lower metal lines during the bombardment process (for example, the formation of irregular needle tips at the bottom of the metal trench). The electric field enhancement effect of the needle tips will greatly reduce the breakdown voltage between the upper and lower metal lines, seriously affecting the time-dependent breakdown (TDDB) lifetime of the IMD.

[0006] Therefore, there is an urgent need to provide an improved method for forming metal interconnect structures that can effectively avoid the IMD damage problem at the bottom of the metal trench caused by the metal barrier layer formation process. Summary of the Invention

[0007] The technical problem solved by the embodiments of the present invention is how to avoid IMD damage at the bottom of the metal trench caused by the metal barrier layer formation process, and improve the TDDB life of the IMD.

[0008] To address the aforementioned technical problems, embodiments of the present invention provide a method for forming a metal interconnect structure, specifically comprising: providing a semiconductor substrate, the surface of which has a metal interconnect dielectric layer; etching the metal interconnect dielectric layer to form trenches and vias; forming a buffer layer at the bottom of the trenches and vias; forming a metal barrier material layer on the surface of the buffer layer and bombarding the metal barrier material layer to form a metal barrier layer on the sidewalls of the trenches and vias; and filling the trenches and vias with a metal material to form metal interconnects.

[0009] Optionally, the diffusion coefficient of the buffer layer is less than that of the metallic material.

[0010] Optionally, the material of the metal barrier layer includes TaN, and the resistivity of the buffer layer material is less than that of TaN.

[0011] Optionally, one or more of the following conditions must be met: the material of the metal barrier layer includes TaN and / or Ta; the material of the buffer layer is Ta and / or Co.

[0012] Optionally, before filling the trenches and vias with metal material to form metal interconnects, the method further includes depositing a copper seed adhesion layer at the bottom of the trenches and vias, the copper seed adhesion layer covering the bottom of the trenches and vias.

[0013] Optionally, the material of the copper seed crystal adhesion layer is Ta and / or Co.

[0014] Optionally, the metal barrier material layer is a stacked structure of a Ta deposition layer and a TaN deposition layer.

[0015] Optionally, the step of forming a metal barrier material layer on the surface of the buffer layer and bombarding the metal barrier material layer is performed once or repeatedly.

[0016] Optionally, the power of each bombardment of the metal barrier material layer during multiple executions is less than the power of bombardment of the metal barrier material layer during a single execution.

[0017] This invention also provides a metal interconnect structure, comprising: a semiconductor substrate; a metal interconnect dielectric layer located on the surface of the semiconductor substrate; trenches and vias located within the metal interconnect dielectric layer; a buffer layer located at the bottom of the trenches and vias; a metal barrier layer located within the trenches and vias and covering the sidewalls of the trenches and vias; and metal interconnect lines covering the metal barrier layer.

[0018] Optionally, the diffusion coefficient of the buffer layer is less than the diffusion coefficient of the metal material forming the metal interconnect.

[0019] Optionally, the material of the metal barrier layer includes TaN, and the resistivity of the buffer layer material is less than that of TaN.

[0020] Optionally, one or more of the following conditions must be met: the material of the metal barrier layer includes TaN and / or Ta; the material of the buffer layer is Ta and / or Co.

[0021] Optionally, the metal interconnect structure further includes a copper seed crystal adhesion layer located between the buffer layer and the metal interconnect.

[0022] Optionally, the material of the copper seed crystal adhesion layer is Ta and / or Co.

[0023] Compared with the prior art, the technical solution of the embodiments of the present invention has the following beneficial effects:

[0024] This invention provides a method for forming a metal interconnect structure, specifically including: providing a semiconductor substrate, the surface of which has a metal interconnect dielectric layer; etching the metal interconnect dielectric layer to form trenches and vias; forming a buffer layer at the bottom of the trenches and vias; forming a metal barrier material layer on the surface of the buffer layer and bombarding the metal barrier material layer to form a metal barrier layer on the sidewalls of the trenches and vias; and filling the trenches and vias with metal material to form metal interconnects.

[0025] Therefore, by forming the buffer layer at the bottom of the trench before forming the metal barrier material layer, the buffer layer can protect the bottom of the trench during the subsequent bombardment of the metal barrier material layer, which helps to prevent the bottom IMD of the trench from being damaged (e.g., forming irregular spikes) during the bombardment process. This can improve the breakdown resistance of the IMD between the current layer metal interconnect and the previous layer metal interconnect formed later, and improve its TDDB lifetime.

[0026] Furthermore, since the metal interconnects formed in the current layer often have a metal interconnect relationship with the metal interconnects in the previous layer, in this embodiment of the invention, by selecting a material with low resistivity to form the buffer layer, compared to the small amount of metal blocking material (with a resistivity higher than that of the buffer layer) remaining at the bottom of the via after bombarding the metal blocking material layer in the prior art, the buffer layer in this embodiment can both protect the bottom of the trench and achieve a lower resistivity between the upper and lower metal interconnects formed through the via (meaning better electrical connectivity), thus improving device performance.

[0027] Furthermore, the diffusion coefficient of the buffer layer is smaller than that of the metal material, which can effectively reduce the diffusion of the buffer layer material itself to the IMD at the bottom of the trench, and also effectively block the diffusion of the metal material filled in the trench to the IMD at the bottom of the trench.

[0028] Furthermore, since Ta and / or Co not only have the function of preventing the diffusion of metallic materials, but also have lower resistivity or better conductivity compared to non-metallic materials with the function of preventing diffusion (such as TaN), by selecting Ta and / or Co as the material of the buffer layer, multiple functions can be achieved at the same time, such as preventing the diffusion of metallic materials in the trench to the IMD at the bottom of the trench, forming protection for the bottom of the trench during the bombardment of the metallic barrier material layer, and ensuring better electrical connectivity between the upper and lower metallic interconnects.

[0029] Furthermore, depositing the copper seed crystal adhesion layer before filling the trench with metal material helps to enhance the anti-diffusion effect of metal material to the IMD at the bottom of the trench, based on the buffer layer remaining at the bottom of the trench after bombardment. Furthermore, by selecting Ta and / or Co as the materials of the copper seed crystal adhesion layer, since Ta and / or Co have anti-metal diffusion properties while also possessing relatively low resistivity, the electrical continuity between the upper and lower metal interconnect layers can also be guaranteed.

[0030] Furthermore, repeatedly performing the steps of forming a metal barrier material layer on the surface of the buffer layer and bombarding the metal barrier material layer helps to improve the uniformity of the metal barrier material layer covering the trench sidewalls. Furthermore, since the thickness of the metal barrier material layer formed in each repeated process can be designed to be smaller than that formed in a single process, relatively lower power can be used for bombardment. Lower power means less bombardment force and greater controllability, thereby further reducing damage to the trench bottom. Attached Figure Description

[0031] Figure 1 is a flowchart of a method for forming a metal interconnect structure according to an embodiment of the present invention;

[0032] Figures 2 to 7 are schematic cross-sectional views of the device corresponding to each step of a method for forming a metal interconnect structure in an embodiment of the present invention.

[0033] Figure 8 is a comparison diagram of the metal interconnect structure formed by the metal interconnect structure forming method of the present invention and the existing metal interconnect structure forming method;

[0034] Explanation of reference numerals in the attached figures: 100 - Semiconductor substrate; 110 - Metal interconnect dielectric layer; 111 - Previous metal interconnect dielectric layer; 121 - Previous metal interconnect line; 1311 - Trench; 1312 - Through-hole; 141 - Buffer layer; 151 - Metal barrier material layer; 161 - Metal barrier layer; 1511 - TaN deposition layer; 1512 - Ta deposition layer; 161 - Metal barrier layer; 171 - Copper seed crystal adhesion layer; 181 - Metal interconnect line. Detailed Implementation

[0035] To make the above-mentioned objectives, features and beneficial effects of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0036] Referring to FIG1, FIG1 is a flowchart of a method for forming a metal interconnect structure according to an embodiment of the present invention. The forming method may include steps S11 to S15:

[0037] Step S11: Provide a semiconductor substrate, the surface of which has a metal interconnect dielectric layer;

[0038] Step S12: Etch the metal interconnect dielectric layer to form trenches and vias;

[0039] Step S13: Form a buffer layer at the bottom of the trench and through hole;

[0040] Step S14: Form a metal barrier material layer on the surface of the buffer layer and bombard the metal barrier material layer to form a metal barrier layer on the sidewalls of the trench and through hole.

[0041] Step S15: Fill the trenches and through holes with metal material to form metal interconnects.

[0042] The steps described above will be explained in detail below with reference to Figures 2 to 7.

[0043] Figures 2 to 7 are schematic cross-sectional views of the device corresponding to each step of a method for forming a metal interconnect structure in an embodiment of the present invention.

[0044] Referring to FIG2, a semiconductor substrate 100 is provided, the surface of which has an inter-metal dielectric (IMD) layer 110.

[0045] The metal interconnect dielectric layer 110 can be a bottom metal interconnect dielectric layer, a middle metal interconnect dielectric layer, or a top metal interconnect dielectric layer. When the metal interconnect dielectric layer 110 is a middle metal interconnect dielectric layer or a top metal interconnect dielectric layer, the surface of the semiconductor substrate 100 may also have a previous metal interconnect dielectric layer 111 and a previous metal interconnect line 121.

[0046] In specific implementations, the semiconductor substrate 100 can be a silicon substrate, or the material of the semiconductor substrate 100 can also be germanium, silicon germanide, silicon carbide, gallium arsenide, or indium gallium dihydrogen phosphate, etc. The semiconductor substrate 100 can also be a silicon-on-insulator substrate or a germanium-on-insulator substrate, or a substrate with an epitaxy layer (Epi layer) grown on it. Preferably, the semiconductor substrate 100 can be a lightly doped semiconductor substrate.

[0047] The metal interconnect dielectric layer 110 can be a silicon oxide layer (e.g., SiO2), fluorine-doped silicon oxide (F-SiO2), low dielectric constant material (Low-K), ultra-low dielectric constant material (Ultra Low-K, ULK), silicon nitride layer (e.g., Si3N4), silicon carbide (SiC), nitrogen-doped silicon carbide (NDC), aluminum nitride (AlN), and combinations thereof.

[0048] Referring to FIG3, the metal interconnect dielectric layer 110 is etched to form trenches 1311 and vias 1312.

[0049] In a specific implementation, a patterned mask layer can be formed on the surface of the metal interconnect dielectric layer 110. Using the patterned mask layer as a mask, the metal interconnect dielectric layer 110 can be etched to form trenches 1311 and vias 1312.

[0050] Specifically, for trench 1311, there is a metal interconnect dielectric layer between the bottom of trench 1311 and the top surface of the previous metal interconnect 121. After the current layer metal interconnect is formed in trench 1311, it is insulated from the previous layer metal interconnect 121.

[0051] Specifically, for via 1312, the bottom of via 1312 can expose the top surface of the previous layer metal interconnect 121. After the current layer metal interconnect is formed in via 1312, it can be metal interconnected with the previous layer metal interconnect 121.

[0052] Referring to FIG4, a buffer layer 141 is formed at the bottom of the groove 1311 and the bottom of the through hole 1312, and then a metal barrier material layer 151 is formed on the surface of the buffer layer 141.

[0053] In a specific implementation, a deposition process can be used to form a buffer layer 141 at the bottom of the trench 1311 and the through hole 1312.

[0054] Furthermore, the metal barrier material layer 151 is bombarded.

[0055] Referring to FIG5, the metal barrier material layer 151 is bombarded (refer to FIG4) to form metal barrier layers 161 on the sidewalls of the trench 1311 and the through hole 1312, respectively.

[0056] In specific implementation, a reverse sputtering process or other existing appropriate processes can be used to bombard the metal barrier material layer 151 (for example, inert gas ions can be used for bombardment) so that the material of the metal barrier material layer 151 is sputtered onto the sidewalls of the trench 1311 and the through hole 1312, so as to cover the metal barrier layer 161 on the sidewalls of the trench 1311 and the through hole 1312.

[0057] In this embodiment of the invention, before forming the metal barrier material layer 151, a buffer layer 141 is first formed at the bottom of the trench 1311. The buffer layer 141 can protect the bottom of the trench 1311 during the subsequent bombardment of the metal barrier material layer 151, which helps to prevent the bottom IMD of the trench 1311 from being damaged (e.g., forming irregular spikes) during the bombardment process. This can improve the breakdown resistance of the IMD between the current layer metal interconnect 181 (see Figure 7) and the previous layer metal interconnect 121, and improve its TDDB lifetime.

[0058] Furthermore, the materials of the metal barrier material layer 151 and the metal barrier layer 161 include TaN, and the resistivity of the material of the buffer layer 141 is less than that of TaN.

[0059] It should be noted that, as mentioned above, since the metal interconnect 181 formed in the current layer and the metal interconnect 121 of the previous layer are often interconnected (or electrically connected) through vias 1312 (specifically, refer to the current layer metal interconnect 181 and the previous layer metal interconnect 121 located on the right side of the metal interconnect dielectric layer 110 shown in Figure 7, which are interconnected), in this embodiment of the invention, by selecting a material with lower resistivity to form the buffer layer 141, compared to the small amount of metal blocking material (with a resistivity higher than that of the buffer layer 141) remaining at the bottom of the via 1312 after bombarding the metal blocking material layer 151 in the prior art, the buffer layer 141 in this embodiment can both protect the bottom of the trench 1311 and ensure that the resistivity between the upper and lower metal interconnects interconnected through the via 1312 is low (meaning better electrical connectivity), thus improving device performance.

[0060] Non-limiting, the material of the metal barrier layer 161 may include tantalum nitride (TaN) and / or tantalum (Ta); the material of the buffer layer 141 may be tantalum (Ta) and / or cobalt (Co).

[0061] In one specific embodiment, a layer of Ta can be deposited at the bottom of the trench 1311 and the through hole 1312 to form a buffer layer 141.

[0062] In another specific embodiment, a layer of Co can be deposited at the bottom of the trench 1311 and the through hole 1312 to form a buffer layer 141.

[0063] In another specific embodiment, the buffer layer 141 may be a stacked structure of Ta deposition layer and Co deposition layer (not shown). Preferably, a layer of Ta may be deposited first at the bottom of the trench 1311 and the through hole 1312 to form a Ta deposition layer; then a layer of Co may be deposited on the surface of the Ta deposition layer to form a Co deposition layer.

[0064] In this embodiment of the invention, since Ta and / or Co not only have the function of preventing the diffusion of metal materials, but also have lower resistivity or better conductivity compared to non-metallic materials (such as TaN) with the function of preventing diffusion, by selecting Ta and / or Co as the material of buffer layer 141, multiple functions can be achieved simultaneously, such as preventing the diffusion of metal materials in trench 1311 to the bottom of trench 1311, forming protection for the bottom of trench 1311 during the bombardment of metal barrier material layer 151, and ensuring better electrical connectivity between the upper and lower metal interconnects.

[0065] In one specific embodiment, the metal barrier material layer 151 is a stacked structure of TaN deposition layer 1511 and Ta deposition layer 1512 (see Figure 4). Specifically, a layer of TaN can be deposited first on the surface of the buffer layer 141 to form TaN deposition layer 1511; then, a layer of Ta can be deposited on the surface of TaN deposition layer 1511 to form Ta deposition layer 1512. Thus, a stacked structure of TaN deposition layer 1511 and Ta deposition layer 1512 is formed.

[0066] In this embodiment of the invention, by employing a stacked structure of TaN deposition layer 1511 and Ta deposition layer 1512, it is helpful to cover the sidewalls of trench 1311 and through hole 1312 with a metal barrier layer 161 containing Ta and TaN composite material under bombardment. Compared with a metal barrier layer containing only Ta or TaN single material, the Ta and TaN composite material has a stronger anti-metal diffusion effect.

[0067] Referring to FIG6, a copper seed crystal adhesion layer 171 is deposited at the bottom of the trench 1311 and the bottom of the through hole 1312, and the copper seed crystal adhesion layer 171 covers the bottom of the trench 1311 and the through hole 1312.

[0068] It is understood that after bombarding the metal barrier material layer 151, the bottom of the trench 1311 and the through hole 1312 may contain only a portion of the buffer layer 141, or it may contain both a portion of the buffer layer 141 and a portion of the metal barrier material layer 151 remaining after bombardment. Accordingly, the copper seed crystal adhesion layer 171 may cover a portion of the buffer layer 141, or it may cover a portion of the buffer layer 141 and a portion of the metal barrier material layer 151 remaining after bombardment.

[0069] Furthermore, the material of the copper seed crystal adhesion layer 171 is Ta and / or Co.

[0070] In one specific embodiment, a layer of Ta can be deposited at the bottom of the trench 1311 and the through hole 1312 to form a copper seed crystal adhesion layer 171.

[0071] In another specific embodiment, a layer of Co can be deposited at the bottom of the trench 1311 and the through hole 1312 to form a copper seed crystal adhesion layer 171.

[0072] In another specific embodiment, the copper seed crystal adhesion layer 171 can be a stacked structure of a Ta deposition layer and a Co deposition layer (not shown). Preferably, a Ta layer can be deposited first at the bottom of the trench 1311 and the through hole 1312 to form a Ta deposition layer; then a Co layer can be deposited on the surface of the Ta deposition layer to form a Co deposition layer.

[0073] In this embodiment of the invention, before filling the trench 1311 with metal material, depositing the copper seed crystal adhesion layer 171 first helps to enhance the anti-diffusion effect of the metal material to the bottom 131 of the trench 131, based on the remaining buffer layer 141 at the bottom of the trench 131 after bombardment. Furthermore, by selecting Ta and / or Co as the material of the copper seed crystal adhesion layer 171, since Ta and / or Co have anti-metal diffusion effects while also possessing relatively low resistivity, the electrical continuity between the upper and lower metal interconnects (metal interconnects 181 and 121 as shown in Figure 7) can also be guaranteed.

[0074] Referring to Figure 7, the trench 1311 and the through hole 1312 are filled with metal material to form a metal interconnect 181.

[0075] In specific implementations, the metal material can be copper (Cu). Alternatively, other suitable metal materials (such as cobalt) or metal alloys can be selected.

[0076] It should be noted that when the metal material is Cu, a copper seed layer for the copper interconnect can be deposited first in the trench 1311 and via 1312, and then copper can be filled into the trench 1311 and via 1312 using an electrochemical deposition process. After filling the metal material, the metal material can be planarized to form the metal interconnect 181. Through the planarization process, the metal interconnect 181 can be embedded in the metal interconnect dielectric layer 110, forming a metal interconnect structure with a flat surface, preparing for subsequent processes.

[0077] Furthermore, the diffusion coefficient of the buffer layer 141 is less than that of the metal material filling the trench 1311 and the through hole 1312. Therefore, the buffer layer 141 can effectively reduce the diffusion of its own material to the IMD at the bottom of the trench, and can also effectively block the diffusion of the metal material filling the trench to the IMD at the bottom of the trench.

[0078] Furthermore, the step of forming a metal barrier material layer 151 on the surface of the buffer layer 141 and bombarding the metal barrier material layer 151 is performed once or repeatedly.

[0079] Furthermore, the power of each bombardment of the metal barrier material layer 151 during multiple executions is less than the power of bombardment of the metal barrier material layer 151 during a single execution.

[0080] In this embodiment of the invention, performing the step of forming the metal barrier material layer 151 once and bombarding the metal barrier material layer 151 helps to improve efficiency and reduce process costs. Performing the aforementioned steps multiple times helps to improve the uniformity of the metal barrier layer 161 covering the sidewalls of the trench 1311 and the through-hole 1312. Furthermore, since the metal barrier material layer 151 formed in each cycle of multiple executions is thinner than the metal barrier material layer 151 formed in a single execution, relatively lower power can be used for bombardment. Lower power means less bombardment force and greater controllability, thereby further reducing damage to the bottom of the trench 1311.

[0081] This invention also discloses a metal interconnect structure, as shown in FIG7. The metal interconnect structure may include: a semiconductor substrate 100; a metal interconnect dielectric layer 110 located on the surface of the semiconductor substrate 100; a trench 1311 and a via 1312 located within the metal interconnect dielectric layer 110; a buffer layer 141 located at the bottom of the trench 1311 and the bottom of the via 1312; a metal barrier layer 161 located within the trench 1311 and the via 1312, and covering the sidewalls of the trench 1311 and the sidewalls of the via 1312; and a metal interconnect line 181 covering the metal barrier layer 161.

[0082] Furthermore, the diffusion coefficient of the buffer layer 141 is less than the diffusion coefficient of the metal material forming the metal interconnect 181.

[0083] Furthermore, the material of the metal barrier layer 161 includes TaN, and the resistivity of the material of the buffer layer 141 is less than that of TaN.

[0084] In some non-limiting embodiments, the material of the metal barrier layer 161 includes TaN and / or Ta; the material of the buffer layer 141 is Ta and / or Co.

[0085] Furthermore, the metal interconnect structure also includes a copper seed crystal adhesion layer 171, which is located between the buffer layer 141 and the metal interconnect line 181.

[0086] In a non-limiting embodiment, the material of the copper seed crystal adhesion layer 171 is Ta and / or Co.

[0087] For the principles, specific implementation, and beneficial effects of this metal interconnect structure, please refer to the previous description of the formation method of the metal interconnect structure; it will not be repeated here.

[0088] Referring to Figure 8, Figure 8 is a comparison diagram of the metal interconnect structure formed by the metal interconnect structure formation method of the present invention and the existing metal interconnect structure formation method. Both images in Figure 8 are presented using a transmission electron microscope (TEM). The left image shows the metal interconnect structure formed using the existing metal interconnect structure formation method, while the right image shows the metal interconnect structure formed using the metal interconnect structure formation method of the present invention.

[0089] As can be seen from the images, the bottom of the current layer trench in the left image has spikes, while the bottom of the current layer trench in the right image is smoother and flatter and does not have spikes.

[0090] Furthermore, the reliability test results of the IMD shown in Table 1 below indicate that in the metal interconnect structure formed using the embodiments of the present invention, the IMD between the upper and lower metal interconnects has a longer TDDB lifetime (see the lifetime index in column 3 of Table 1 below), and the TDDB lifetime of the IMD at the bottom of the trench at different locations on the wafer shows better uniformity (see the Weibull slope in column 2 of Table 1 below; the larger the value, the more similar the TDDB lifetime of the IMD at different locations on the wafer).

[0091] Table 1

[0092] It should be understood that the term "and / or" in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this article indicates that the preceding and following related objects have an "or" relationship.

[0093] In the embodiments of this application, "multiple" refers to two or more.

[0094] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A method for forming a metal interconnect structure, characterized in that, include: A semiconductor substrate is provided, the surface of which has a metal interconnect dielectric layer; The metal interconnect dielectric layer is etched to form trenches and vias; A buffer layer is formed at the bottom of the trench and through hole; A metal barrier material layer is formed on the surface of the buffer layer, and the metal barrier material layer is bombarded to form a metal barrier layer on the sidewalls of the trench and through hole. The trenches and through holes are filled with metal material to form metal interconnects.

2. The method as described in claim 1, characterized in that, The diffusion coefficient of the buffer layer is less than that of the metallic material.

3. The method as described in claim 1, characterized in that, The material of the metal barrier layer includes TaN. The resistivity of the buffer layer material is less than that of TaN.

4. The method as described in claim 1, characterized in that, The metal barrier layer is made of one or more of the following materials: TaN and / or Ta. The material of the buffer layer is Ta and / or Co.

5. The method as described in claim 1, characterized in that, Before filling the trenches and through-holes with metallic material to form metallic interconnects, the method further includes: A copper seed crystal adhesion layer is deposited at the bottom of the trench and the through hole, and the copper seed crystal adhesion layer covers the bottom of the trench and the through hole.

6. The method as described in claim 5, characterized in that, The material of the copper seed crystal adhesion layer is Ta and / or Co.

7. The method as described in claim 1, characterized in that, The metal barrier material layer is a stacked structure of Ta deposition layer and TaN deposition layer.

8. The method according to any one of claims 1 to 7, characterized in that, The step of forming a metal barrier material layer on the surface of the buffer layer and bombarding the metal barrier material layer is performed once or repeatedly.

9. The method as described in claim 8, characterized in that, The power of each bombardment of the metal barrier material layer during multiple executions is less than the power of bombardment of the metal barrier material layer during a single execution.

10. A metal interconnect structure, characterized in that, include: Semiconductor substrate; A metal interconnect dielectric layer is located on the surface of the semiconductor substrate; Trenches and vias are located within the metal interconnect dielectric layer; A buffer layer is located at the bottom of the trench and through-hole; A metal barrier layer is located within the trench and through-hole and covers the sidewalls of the trench and through-hole; Metal interconnects covering the metal barrier layer.

11. The metal interconnect structure as claimed in claim 10, characterized in that, The diffusion coefficient of the buffer layer is less than the diffusion coefficient of the metal material forming the metal interconnect.

12. The metal interconnect structure as claimed in claim 10, characterized in that, The material of the metal barrier layer includes TaN, and the resistivity of the buffer layer material is less than that of TaN.

13. The metal interconnect structure as claimed in claim 10, characterized in that, Meet one or more of the following: The material of the metal barrier layer includes TaN and / or Ta; The material of the buffer layer is Ta and / or Co.

14. The metal interconnect structure as claimed in claim 10, characterized in that, The metal interconnect structure further includes a copper seed crystal adhesion layer, which is located between the buffer layer and the metal interconnect line.

15. [Amended according to Rule 26, 25.03.2025] The metal interconnect structure as described in claim 14, characterized in that, The material of the copper seed crystal adhesion layer is Ta and / or Co.

Images