LED chip and manufacturing method therefor
By adjusting the structure of the transparent conductive layer and the current blocking layer in the LED chip, direct contact between the pad and the transparent conductive layer is avoided, which solves the problem of the lead wires being easily broken during wire bonding and improves the reliability and efficiency of wire bonding.
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- JIANGXI CHANGELIGHT CO LTD
- Filing Date
- 2025-06-26
- Publication Date
- 2026-07-30
AI Technical Summary
The existing LED chip packaging wire bonding process suffers from the problem that the leads are easily broken at the connection shoulder.
In an LED chip, the transparent conductive layer extends outward along the shoulder where the pad and lead are connected, forming a gap there. At the same time, the current blocking layer contracts at the shoulder to prevent the pad from directly contacting the transparent conductive layer.
The interface between the pad contact film layer at the connection shoulder has been improved, avoiding the solder breakage problem at the lead shoulder during wire bonding, thus improving the reliability and efficiency of wire bonding.
Smart Images
Figure CN2025103773_30072026_PF_FP_ABST
Abstract
Description
An LED chip and its fabrication method
[0001] This application claims priority to Chinese Patent Application No. 202510093946.5, filed on January 21, 2025, entitled "An LED Chip and a Method for its Preparation", and Chinese Patent Application No. 202520142569.5, entitled "An LED Chip", the entire contents of which are incorporated herein by reference. Technical Field
[0002] This invention relates to the field of light-emitting chip technology, specifically to an LED chip and its fabrication method. Background Technology
[0003] With the gradual development of LEDs, LED lighting has completely replaced traditional lighting sources. Keeping pace with technological innovation and the continuous innovation of intelligent manufacturing in terms of scale, automation, and digitalization, the current LED market is highly competitive. Various LED packaging plants are pursuing high cost-effectiveness, high production efficiency, and high quality, and are placing increasingly higher demands on the precision and efficiency of packaging wire bonding, as well as on the reliability of the wire bonding.
[0004] In conventional LED chips, the pads and lead connection shoulders of the P-type electrodes are stacked in a film layering manner of current blocking layer / transparent conductive layer / pad. During the encapsulation and wire bonding process, the lead is prone to breakage at the connection shoulder. Summary of the Invention
[0005] In view of the shortcomings of the prior art, the purpose of this invention is to provide an LED chip and a manufacturing method, which aims to solve the problem that the lead wires are easily broken at the connection shoulder during the packaging and bonding process in the LED manufacturing process of the prior art.
[0006] One aspect of the present invention is to provide an LED chip, the chip comprising a substrate and an epitaxial layer, the epitaxial layer comprising an N-type semiconductor layer, a multiple quantum well layer, and a P-type semiconductor layer.
[0007] The chip further includes a current blocking layer disposed on the P-type semiconductor layer, a transparent conductive layer disposed on the current blocking layer, and a P-type electrode disposed on the transparent conductive layer. The P-type electrode includes a pad portion and a lead portion for connecting to the pad portion.
[0008] The transparent conductive layer extends outward along the connection shoulder between the pad portion and the lead portion to avoid direct contact between the pad portion at the connection shoulder and the transparent conductive layer.
[0009] Furthermore, in the aforementioned LED chip, the transparent conductive layer has a notch extending toward the lead portion at the connection shoulder, so that the transparent conductive layer expands outward along the direction of the connection shoulder between the pad portion and the lead portion.
[0010] Furthermore, in the aforementioned LED chip, the notch includes an arcuate portion disposed away from the pad portion and lower edges extending outward from both ends of the arcuate portion.
[0011] Furthermore, in the aforementioned LED chip, the current blocking layer contracts along the direction of the connection shoulder between the pad portion and the lead portion, so that a portion of the current blocking layer is left empty at the connection shoulder.
[0012] Furthermore, in the aforementioned LED chip, the cross-sections of the current blocking layer and the transparent conductive layer facing the side of the connecting shoulder are in the same vertical plane.
[0013] Furthermore, in the aforementioned LED chip, the transparent conductive layer is made of ITO, IZO, or other transparent conductive materials.
[0014] Furthermore, in the aforementioned LED chip, the thickness of the current blocking layer is...
[0015] Furthermore, in the aforementioned LED chip, the thickness of the transparent conductive layer is...
[0016] Another object of the present invention is to provide a method for preparing an LED chip, the method being used to prepare the aforementioned LED chip, the method comprising:
[0017] A substrate is provided and an epitaxial layer is fabricated on the substrate, the epitaxial layer comprising an N-type semiconductor layer, a multiple quantum well region and a P-type semiconductor layer;
[0018] A current blocking layer, a transparent conductive layer, and a P-type electrode are sequentially fabricated on the P-type semiconductor layer.
[0019] The transparent conductive layer extends outward along the connection shoulder between the pad portion and the lead portion to avoid direct contact between the pad portion at the connection shoulder and the transparent conductive layer.
[0020] Furthermore, in the above-mentioned method for fabricating an LED chip, the step of sequentially fabricating a current blocking layer, a transparent conductive layer, and a P-type electrode on the P-type semiconductor layer includes:
[0021] Design a photomask for extending the transparent conductive layer outward at the connection shoulder between the pad portion and the lead portion, and obtain the corresponding transparent conductive layer layer through the photomask;
[0022] The transparent conductive layer is obtained by etching and removing the adhesive.
[0023] Using the LED chip and fabrication method shown in this invention, when fabricating the transparent conductive layer, the transparent conductive layer is extended outward along the direction of the connection shoulder between the pad portion and the lead portion of the P-type electrode. This avoids direct contact between the pad portion and the transparent conductive layer at the connection shoulder, improving the interface between the pad contact film layer and the connection shoulder, and preventing the lead portion from being easily broken during wire bonding. This solves the problem in the prior art where the lead is easily broken at the connection shoulder during wire bonding.
[0024] Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description
[0025] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, in which:
[0026] Figure 1 is a plan view of the structure of one type of LED chip in an embodiment of the present invention;
[0027] Figure 2 is a plan view of the structure of another LED chip in one embodiment of the present invention;
[0028] Figure 3 is a flowchart illustrating the LED chip fabrication method in the second embodiment of the present invention. Detailed Implementation
[0029] To make the objectives, features, and advantages of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings. Several embodiments of the present invention are shown in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of the present invention will be more thorough and complete.
[0030] Example 1
[0031] To address the problem in existing technologies where wires are easily broken at the connection shoulder during wire bonding, a first embodiment of the present invention provides an LED chip. This chip includes a substrate and an epitaxial layer, wherein the epitaxial layer comprises an N-type semiconductor layer, a multiple quantum well layer, and a P-type semiconductor layer. The specific material of the substrate is understood by those skilled in the art and will not be elaborated here.
[0032] Meanwhile, as shown in Figure 1, the chip also includes a current blocking layer 10 disposed on the P-type semiconductor layer, a transparent conductive layer 20 disposed on the current blocking layer 10, and a P-type electrode 30 disposed on the transparent conductive layer 20. The P-type electrode 30 includes a pad portion 31 and a lead portion 32 for connecting to the pad portion 31. In practice, through a large number of experimental verifications and simulated packaging wire bonding batch data, as well as big data pattern statistics, it was finally found that the root cause of the breakage at the shoulder of the lead portion 32 was that the pad portion 31 was in direct contact with the transparent conductive layer 20, resulting in a poor contact interface and causing the lead portion 32 to be easily broken. Therefore, in this embodiment of the invention, the situation is improved by changing the contact between the pad portion 31 and the transparent conductive layer 20. Specifically, the transparent conductive layer 20 expands outward along the direction of the connection shoulder between the pad portion 31 and the lead portion 32 to avoid direct contact between the portion of the pad portion 31 at the connection shoulder and the transparent conductive layer 20. More specifically, the transparent conductive layer 20 forms a notch 201 extending towards the lead portion 32 at the connection shoulder, thereby allowing the transparent conductive layer 20 to expand outward along the direction of the connection shoulder between the pad portion 31 and the lead portion 32, that is, removing part of the transparent conductive layer 20 at the shoulder connection between the pad portion 31 and the lead portion 32. For example, the notch 201 includes an arc portion disposed away from the pad portion 31 and lower edges extending outward from both ends of the arc portion to avoid stress concentration.
[0033] As an example, and not a limitation, in specific implementations, the transparent conductive layer 20 is made of ITO, IZO, or other transparent conductive materials, and the thickness of the transparent conductive layer 20 is [missing information]. For example The thickness of the current blocking layer 10 is... For example wait.
[0034] Furthermore, in some optional embodiments of the present invention, to further improve the film layer interface under the pad portion 31, as shown in FIG2, the current blocking layer 10 shrinks along the direction of the connection shoulder between the pad portion 31 and the lead portion 32, so that the portion of the current blocking layer 10 at the connection shoulder is empty. That is, the portions of the transparent conductive layer 20 and the current blocking layer 10 at the connection shoulder of the pad portion 31 are removed simultaneously. In a specific implementation, the cross-sections of the portions of the current blocking layer 10 and the transparent conductive layer 20 facing the connection shoulder are in the same vertical plane. This ensures that the empty positions of the transparent conductive layer and the current blocking layer below the connection shoulder of the pad portion 31 are consistent.
[0035] In summary, the LED chip proposed in the above embodiments of the present invention extends the transparent conductive layer outward along the shoulder of the connection between the pad portion and the lead portion. This avoids direct contact between the pad portion of the P-type electrode and the transparent conductive layer at the shoulder, improving the interface between the pad and the film layer at the shoulder and preventing the lead portion from being easily broken during wire bonding. This solves the problem in the prior art where the lead is easily broken at the shoulder during wire bonding.
[0036] Example 2
[0037] Please refer to Figure 3. The second embodiment of the present invention provides a method for preparing an LED chip. The method is used to prepare the LED chip described in the first embodiment. The method includes steps S10-S11:
[0038] Step S10: Provide a substrate and fabricate an epitaxial layer on the substrate, the epitaxial layer including an N-type semiconductor layer, a multiple quantum well region and a P-type semiconductor layer.
[0039] Step S11: A current blocking layer, a transparent conductive layer, and a P-type electrode are sequentially fabricated on the P-type semiconductor layer.
[0040] The transparent conductive layer extends outward along the shoulder of the connection between the pad and the lead to avoid direct contact between the pad and the transparent conductive layer at the shoulder.
[0041] Further, the step of sequentially fabricating a current blocking layer, a transparent conductive layer, and a P-type electrode on the P-type semiconductor layer includes:
[0042] Design a photomask for extending the transparent conductive layer outward at the connection shoulder between the pad portion and the lead portion, and obtain the corresponding transparent conductive layer layer through the photomask;
[0043] The transparent conductive layer is obtained by etching and removing the adhesive.
[0044] Specifically, the epitaxial layer is cleaned, and a MESA photolithography pattern is prepared by photoresist coating, exposure, and development. The MESA region is etched by ICP, and then the photoresist is removed. Next, a SiO2 barrier layer is deposited on the surface of the wafer using a PECVD machine to obtain a current blocking layer, wherein the thickness is [missing information]. Next, a transparent conductive layer with a thickness of [thickness missing] is deposited on the surface of the substrate using a sputtering process. The transparent conductive layer is annealed in a rapid annealing furnace at a temperature of 500℃ to 650℃ for 1 to 10 minutes. Following this, a P-type electrode is fabricated, consisting of a pad and a lead. Before fabricating the P-type electrode, an insulating layer is typically deposited. In practice, photoresist is used as a mask to create the corresponding layer. Photolithography, etching, and photoresist removal are then employed to fabricate the current blocking layer, transparent conductive layer, and insulating layer.
[0045] More specifically, to eliminate the gap in the transparent conductive layer below the connection shoulder of the pad and lead portions, a photomask with the corresponding transparent conductive layer structure is designed during the fabrication of the transparent conductive layer. The corresponding transparent conductive layer layer can be obtained through photolithography. Then, through etching and resist removal, the desired transparent conductive layer is finally obtained. To eliminate both the transparent conductive layer and the current blocking layer below the connection shoulder of the pad and lead portions, a photomask for the current blocking layer is first designed. The corresponding current blocking layer layer can be obtained through photolithography of the current blocking layer. Then, through etching and resist removal, the current blocking layer is finally obtained. Next, a photomask with the corresponding transparent conductive layer structure is designed. The corresponding transparent conductive layer layer can be obtained through photolithography. Then, through etching and resist removal, the desired transparent conductive layer is finally obtained.
[0046] In summary, the LED chip fabrication method proposed in the above embodiments of the present invention, when fabricating the transparent conductive layer, extends the transparent conductive layer outward along the direction of the connection shoulder between the pad portion and the lead portion of the P-type electrode. This avoids direct contact between the pad portion at the connection shoulder and the transparent conductive layer, improving the interface between the pad contact film layer at the connection shoulder and preventing the lead portion from being easily broken during wire bonding. This solves the problem in the prior art where the lead is easily broken at the connection shoulder during wire bonding.
[0047] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. Therefore, the protection scope of this patent should be determined by the appended claims.
Claims
1. An LED chip, the chip comprising a substrate and an epitaxial layer, the epitaxial layer comprising an N-type semiconductor layer, a multiple quantum well layer, and a P-type semiconductor layer, characterized in that: The chip further includes a current blocking layer disposed on the P-type semiconductor layer, a transparent conductive layer disposed on the current blocking layer, and a P-type electrode disposed on the transparent conductive layer. The P-type electrode includes a pad portion and a lead portion for connecting to the pad portion. The transparent conductive layer extends outward along the connection shoulder between the pad portion and the lead portion to avoid direct contact between the pad portion at the connection shoulder and the transparent conductive layer.
2. The LED chip according to claim 1, characterized in that: The transparent conductive layer has a notch at the connection shoulder extending toward the lead portion, so that the transparent conductive layer expands outward along the direction of the connection shoulder between the pad portion and the lead portion.
3. The LED chip according to claim 2, characterized in that: The notch includes an arc portion located away from the pad portion and a lower edge portion extending outward from both ends of the arc portion.
4. The LED chip according to claim 1, characterized in that: The current blocking layer tapers along the shoulder where the pad portion and the lead portion connect, so that a portion of the current blocking layer is left empty at the shoulder.
5. The LED chip according to claim 4, characterized in that: The cross-sections of the current blocking layer and the portion of the transparent conductive layer facing the connecting shoulder are in the same vertical plane.
6. The LED chip according to any one of claims 1-5, characterized in that: The transparent conductive layer is made of ITO, IZO or other transparent conductive materials.
7. The LED chip according to any one of claims 1-5, characterized in that: The thickness of the current blocking layer is 8. The LED chip according to any one of claims 1-5, characterized in that: The thickness of the transparent conductive layer is 9. A method for fabricating an LED chip, characterized in that: The preparation method is used to prepare the LED chip according to any one of claims 1-8, and the preparation method includes: A substrate is provided and an epitaxial layer is fabricated on the substrate, the epitaxial layer comprising an N-type semiconductor layer, a multiple quantum well region and a P-type semiconductor layer; A current blocking layer, a transparent conductive layer, and a P-type electrode are sequentially fabricated on the P-type semiconductor layer. The P-type electrode includes a pad portion and a lead portion for connecting to the pad portion. The transparent conductive layer extends outward along the connection shoulder between the pad portion and the lead portion to avoid direct contact between the pad portion at the connection shoulder and the transparent conductive layer.
10. The method for preparing an LED chip according to claim 9, characterized in that: The step of sequentially fabricating a current blocking layer, a transparent conductive layer, and a P-type electrode on the P-type semiconductor layer includes: Design a photomask for the outer expansion of the transparent conductive layer at the connection shoulder between the pad portion and the lead portion, and obtain the corresponding transparent conductive layer layer through the photomask; The transparent conductive layer is obtained by etching and removing the adhesive.