Display driving method, driving circuit, display apparatus and device

Abstract

A display driving method, a driving circuit, a display apparatus and a device, which relate to the technical field of communications, and are used for solving the problem of different display brightness in display areas of different refresh rates during area-based refresh. The refresh cycle of a first display area of a display screen is greater than the refresh cycle of a second display area thereof, the refresh cycle of the first display area containing a first holding frame, and the refresh cycle of the second display area containing a write frame. The method comprises: a driving circuit outputs a driving voltage to a first display area and a second display area by means of a plurality of data lines, the driving voltage comprising a first holding voltage and a data voltage, the driving voltage transitioning at a first moment of a first holding frame such that the data voltage is provided, and the first holding voltage changing with the refresh rate and grayscale of the first display area, the refresh rate, grayscale and display brightness of the second display area and the temperature of a display screen.

Description

A display driving method, driving circuit, display device, and equipment.

[0001] This application claims priority to Chinese Patent Application No. 202510121118.8, filed on January 23, 2025, entitled “A display driving method, driving circuit, display device and apparatus”, the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of communication technology, and in particular to a display driving method, driving circuit, display device and equipment. Background Technology

[0003] Currently, power consumption of display devices is reduced through partitioned refresh technology. These devices include a display screen and a driving circuit; for example, the driving circuit can be a display driver integrated circuit (DDIC), and the display screen can be an active matrix organic light-emitting diode (AMOLED) display. Partial refresh technology determines the refresh frequency of the display screen based on whether the image needs updating. Specifically, when a portion of the display screen's image needs updating, the driving circuit drives that area to maintain a high refresh rate (e.g., 120Hz), while other areas that do not require updating are driven to maintain a low refresh rate (e.g., 1Hz), thereby reducing the display device's power consumption. To further reduce power consumption, for low-frequency refresh areas, when the driving circuit is not writing data, the display's data lines are typically kept in a high-impedance state.

[0004] However, when the data cable is in a high-impedance state, the display brightness of the low-frequency refresh area will increase, resulting in a difference in display brightness between the low-frequency refresh area and the high-frequency refresh area, causing a split-screen phenomenon and affecting the user experience. Summary of the Invention

[0005] This application provides a display driving method, driving circuit, display device, and equipment to solve the problem of different display brightness in display areas with different refresh rates during partitioned refresh, thereby improving display effect and enhancing user experience.

[0006] To achieve the above objectives, the embodiments of this application adopt the following technical solutions:

[0007] A first aspect provides a display driving method applied in a driving circuit for driving a display screen, the display screen including a first display area and a second display area, the refresh period of the first display area being greater than the refresh period of the second display area, the i-th refresh period of the first display area including a first hold frame, the j-th refresh period of the second display area including a write frame, i and j being positive integers, and the driving circuit being coupled to multiple data lines of the display screen. The method includes: the driving circuit outputting a driving voltage to the first display area and the second display area through multiple data lines; the driving voltage including a first hold voltage and a data voltage, the first hold voltage being used to keep the first display area from refreshing within the first hold frame, the data voltage being used to refresh the second display area within the write frame, the driving voltage switching to providing a data voltage at a first moment of the first hold frame; the valley voltage of the data voltage being greater than the first hold voltage, and the difference between the valley voltage and the first hold voltage being greater than a preset threshold; the first hold voltage varying with changes in the refresh frequency and grayscale of the first display area, the refresh frequency and grayscale of the second display area, the display brightness, and the temperature of the display screen.

[0008] In the above technical solution, during the partitioned refresh process of the first display area and the second display area, for the first holding frame in the i-th refresh cycle of the first display area, the driving circuit can output a first holding voltage through multiple data lines in the first holding frame. For the write frame in the j-th refresh cycle of the second display area, the driving circuit can output a data voltage through multiple data lines in the write frame. The voltage of the multiple data lines is the first holding voltage in the first holding frame and the data voltage in the write frame. Moreover, the first holding voltage changes with the refresh frequency, grayscale of the first display area, the refresh frequency, grayscale of the second display area, the display brightness, and the temperature of the display screen. That is, the first holding voltage is dynamically adjusted by parameters such as the refresh frequency, grayscale of the first display area, the refresh frequency, grayscale of the second display area, the display brightness, and the temperature of the display screen, thereby compensating for the display brightness of the first display area and making the display brightness of display areas with different refresh frequencies consistent, thus solving the problem of different display brightness between the first display area and the second display area during the partitioned refresh process.

[0009] In any possible implementation of the first aspect, the driving circuit includes a power management circuit, and the method further includes: the power management circuit receiving refresh frequency, grayscale of a first display area, refresh frequency, grayscale of a second display area, display brightness, and display temperature from the processor; the power management circuit determining and outputting a first holding voltage based on the refresh frequency, grayscale of the first display area, refresh frequency, grayscale of the second display area, display brightness, and display temperature. In the above possible implementations, the power management circuit determines the first holding voltage based on the refresh frequency, grayscale of the first display area, refresh frequency, grayscale of the second display area, display brightness, and display temperature, and the first holding voltage can be dynamically adjusted based on the above parameters, improving the efficiency of determining the first holding voltage and the efficiency of dynamic adjustment.

[0010] In any possible implementation of the first aspect, the first holding voltage is a DC voltage. In the above possible implementations, the first holding voltage is a stable DC voltage, which increases stability while keeping the first display area from refreshing within the first holding frame.

[0011] In any possible implementation of the first aspect, the first holding voltage is an AC voltage, the valley voltage of the data voltage is greater than the peak voltage of the first holding voltage, and the difference between the valley voltage and the peak voltage is greater than a preset threshold. In the above possible implementations, using an AC voltage as the first holding voltage increases selectivity.

[0012] In any possible implementation of the first aspect, the display screen further includes a third display area adjacent to the second display area. The third display area is a GOA down-processed display area, and the refresh cycle of the third display area is the same as the refresh cycle of the first display area. The i-th refresh cycle of the third display area includes a second holding frame. The method further includes: a driving circuit outputting a second holding voltage to the third display area through multiple data lines. The second holding voltage is used to keep the third display area from refreshing within the second holding frame; the driving voltage jumps to provide the second holding voltage at the second moment of writing the frame, with the first moment preceding the second moment; the first holding voltage is different from the second holding voltage. In the above possible implementations, the first holding voltage is different from the second holding voltage. The voltage difference between the first holding voltage and the second holding voltage eliminates the display problems caused by GOA down-processing, making the display brightness of the GOA down-processed third display area consistent with the display brightness of the first display area, thereby improving the display effect.

[0013] Secondly, a display driving method is provided, applied to a display screen, the display screen including a first display area and a second display area, the refresh period of the first display area being greater than the refresh period of the second display area, the i-th period of the first display area including a first hold frame, the j-th refresh period of the second display area including a write frame, i and j being positive integers, multiple data lines of the display screen being coupled to a driving circuit, the driving circuit being used to drive the display screen, the method further including: the display screen receiving a driving voltage from the driving circuit through the multiple data lines; the driving voltage including a first hold voltage and a data voltage; the driving voltage switching to providing a data voltage at a first moment of the first hold frame; the valley voltage of the data voltage being greater than the first hold voltage, and the difference between the valley voltage and the first hold voltage being greater than a preset threshold; the first hold voltage changing with the refresh frequency and grayscale of the first display area, the refresh frequency and grayscale of the second display area, the display brightness, and the temperature of the display screen. The display screen keeps the first display area unrefreshed within the first hold frame based on the first hold voltage; and refreshes the second display area within the write frame based on the data voltage.

[0014] In the above technical solution, during the partitioned refresh process of the first and second display areas, for the first hold frame within the i-th refresh cycle of the first display area, the display screen can receive a first hold voltage through multiple data lines in the first hold frame, and keep the first display area from refreshing within the first hold frame based on the first hold voltage; for the write frame within the j-th refresh cycle of the second display area, the display screen can receive a data voltage through multiple data lines in the write frame, and refresh the second display area within the write frame based on the data voltage. That is, the voltage of the multiple data lines is the first hold voltage in the first hold frame, and the voltage of the multiple data lines is the data voltage in the write frame. Moreover, the first hold voltage changes with the refresh frequency, grayscale of the first display area, the refresh frequency, grayscale of the second display area, the display brightness, and the temperature of the display screen. In other words, the first hold voltage is dynamically adjusted by parameters such as the refresh frequency, grayscale of the first display area, the refresh frequency, grayscale of the second display area, the display brightness, and the temperature of the display screen, thereby compensating for the display brightness of the first display area and making the display brightness of display areas with different refresh frequencies consistent, thus solving the problem of different display brightness between the first and second display areas during the partitioned refresh process.

[0015] In any possible implementation of the second aspect, the driving circuit includes a power management circuit, and the first holding voltage is determined by the power management circuit based on the refresh frequency and grayscale of the first display area, the refresh frequency and grayscale of the second display area, the display brightness, and the temperature of the display screen. In the above possible implementations, the power management circuit determines the first holding voltage based on the refresh frequency and grayscale of the first display area, the refresh frequency and grayscale of the second display area, the display brightness, and the temperature of the display screen, and the first holding voltage can be dynamically adjusted based on the aforementioned parameters, thus improving the efficiency of determining and dynamically adjusting the first holding voltage.

[0016] In any possible implementation of the second aspect, the first holding voltage is a DC voltage. The above possible implementations increase stability.

[0017] In any possible implementation of the second aspect, the first holding voltage is an AC voltage, the valley voltage of the data voltage is greater than the peak voltage of the first holding voltage, and the difference between the valley voltage and the peak voltage is greater than a preset threshold. In the above possible implementations, using an AC voltage as the first holding voltage increases selectivity.

[0018] In any possible implementation of the second aspect, the display screen further includes a third display area adjacent to the second display area. The third display area is a GOA down-processed display area, and its refresh cycle is the same as that of the first display area. The i-th refresh cycle of the third display area includes a second holding frame. The method further includes: the display screen receiving a second holding voltage through multiple data lines and keeping the third display area unrefreshed within the second holding frame; the driving voltage switching to provide the second holding voltage at the second moment of writing the frame, with the first moment preceding the second moment; and the first holding voltage being different from the second holding voltage. In the above possible implementations, the first holding voltage is different from the second holding voltage. The voltage difference between the first holding voltage and the second holding voltage eliminates the display problems caused by the GOA down-processing, making the display brightness of the GOA down-processed third display area consistent with the display brightness of the first display area, thereby improving the display effect.

[0019] Thirdly, a driving circuit is provided for driving a display screen, which includes a first display area and a second display area. The refresh period of the first display area is greater than that of the second display area. The i-th refresh period of the first display area includes a first hold frame, and the j-th refresh period of the second display area includes a write frame, where i and j are positive integers. The driving circuit is coupled to multiple data lines of the display screen. The driving circuit is also used to output driving voltages to the first and second display areas through the multiple data lines. The driving voltages include a first hold voltage and a data voltage. The first hold voltage is used to keep the first display area from refreshing during the first hold frame, and the data voltage is used to refresh the second display area during the write frame. The driving voltage abruptly switches to providing a data voltage at a first moment of the first hold frame. The valley value of the data voltage is greater than the first hold voltage, and the difference between the valley value and the first hold voltage is greater than a preset threshold. The first hold voltage varies with changes in the refresh frequency and grayscale of the first display area, the refresh frequency and grayscale of the second display area, the display brightness, and the temperature of the display screen.

[0020] In any possible implementation of the third aspect, the driving circuit includes a power management circuit for receiving refresh frequency, grayscale of a first display area, refresh frequency, grayscale of a second display area, display brightness, and display temperature from the processor; the power management circuit is also used to output a first holding voltage to the first display area via multiple data lines based on the refresh frequency, grayscale of the first display area, refresh frequency, grayscale of the second display area, display brightness, and display temperature.

[0021] In any possible implementation of the third aspect, the first holding voltage is a DC voltage.

[0022] In any possible implementation of the third aspect, the first holding voltage is an AC voltage, the valley voltage of the data voltage is greater than the peak voltage of the first holding voltage, and the difference between the valley voltage and the peak voltage is greater than a preset threshold.

[0023] In any possible implementation of the third aspect, the display screen further includes a third display area adjacent to the second display area. The third display area is a display area with GOA down-processing. The refresh cycle of the third display area is the same as the refresh cycle of the first display area. The i-th refresh cycle of the third display area includes a second holding frame. The driving circuit is also used to output a second holding voltage to the third display area through multiple data lines. The second holding voltage is used to keep the third display area from refreshing within the second holding frame. The driving voltage jumps to a data supply voltage at the second moment of writing the frame, and the first moment is earlier than the second moment. The first holding voltage is different from the second holding voltage.

[0024] Fourthly, a display screen is provided, comprising a first display area and a second display area. The refresh cycle of the first display area is greater than that of the second display area. The i-th cycle of the first display area includes a first holding frame, and the j-th refresh cycle of the second display area includes a write frame, where i and j are positive integers. Multiple data lines of the display screen are coupled to a driving circuit, which drives the display screen. The display screen is configured to receive a driving voltage from the driving circuit via the multiple data lines. The driving voltage includes a first holding voltage and a data voltage. The driving voltage transitions to a data voltage at a first moment of the first holding frame. The valley value of the data voltage is greater than the first holding voltage, and the difference between the valley value and the first holding voltage is greater than a preset threshold. The first holding voltage varies with the refresh frequency and grayscale of the first display area, the refresh frequency and grayscale of the second display area, the display brightness, and the temperature of the display screen. The display screen is further configured to keep the first display area unrefreshed within the first holding frame based on the first holding voltage, and refresh the second display area within the write frame based on the data voltage.

[0025] In any possible implementation of the fourth aspect, the driving circuit includes a power management circuit, wherein the first holding voltage is determined by the power management circuit based on the refresh frequency and grayscale of the first display area, the refresh frequency and grayscale of the second display area, the display brightness, and the temperature of the display screen.

[0026] In any possible implementation of the fourth aspect, the first holding voltage is a DC voltage.

[0027] In any possible implementation of the fourth aspect, the first holding voltage is an AC voltage, the valley voltage of the data voltage is greater than the peak voltage of the first holding voltage, and the difference between the valley voltage and the peak voltage is greater than a preset threshold.

[0028] In any possible implementation of the fourth aspect, the display screen further includes a third display area adjacent to the second display area. The third display area is a GOA-downgraded display area, and the refresh cycle of the third display area is the same as that of the first display area. The i-th refresh cycle of the third display area includes a second holding frame. The display screen is also configured to receive a second holding voltage from the driving circuit via multiple data lines and to keep the third display area from refreshing within the second holding frame. The driving voltage jumps to a data supply voltage at the second moment of the write frame, with the first moment preceding the second moment. The first holding voltage is different from the second holding voltage.

[0029] Fifthly, a display device is provided, the display device including a driving circuit and a display screen, the driving circuit being for driving the display screen, the driving circuit being as provided in the third aspect or any possible implementation of the third aspect, and the display screen being as provided in the fourth aspect or any possible implementation of the fourth aspect.

[0030] A sixth aspect provides an electronic device, the electronic device including a processor and a display device coupled to the processor; wherein the display device is the display device provided in the fifth aspect.

[0031] In a seventh aspect, a computer-readable storage medium is provided, wherein instructions are stored therein, which, when executed on a device, cause the device to perform a display driving method as provided in the first aspect or any possible implementation thereof.

[0032] Eighthly, a computer-readable storage medium is provided, wherein instructions are stored therein, which, when executed on a device, cause the device to perform a display driving method as provided in the second aspect or any possible implementation thereof.

[0033] Ninth aspect, a computer program product is provided, the computer program product including a computer program that, when the computer program is run on a device, causes the device to perform a display driving method as provided in the first aspect or any possible implementation of the first aspect.

[0034] In a tenth aspect, a computer program product is provided, comprising a computer program that, when executed on a device, causes the device to perform a display driving method as provided in the second aspect or any possible implementation thereof.

[0035] Understandably, the beneficial effects that can be achieved by the third to tenth aspects mentioned above can be referred to in relation to the beneficial effects provided by the first aspect or any possible implementation of the first aspect, which will not be repeated here. Attached Figure Description

[0036] Figure 1 is a schematic diagram of the structure of a display screen provided in an embodiment of this application;

[0037] Figure 2 is a schematic diagram of a display device provided in an embodiment of this application;

[0038] Figure 3 is a schematic diagram of a partition refresh provided in an embodiment of this application;

[0039] Figure 4 is a schematic diagram of another display screen provided in an embodiment of this application;

[0040] Figure 5 is a schematic diagram of the structure of an electronic device provided in an embodiment of this application;

[0041] Figure 6 is a flowchart illustrating a display driving method provided in an embodiment of this application;

[0042] Figure 7 is a schematic diagram of another display screen provided in an embodiment of this application;

[0043] Figure 8 is a schematic diagram of the voltage of the data line during partition refresh according to an embodiment of this application;

[0044] Figure 9 is a schematic diagram of the voltage of the data line during another partition refresh provided in an embodiment of this application;

[0045] Figure 10 is a schematic diagram of another display device provided in an embodiment of this application;

[0046] Figure 11 is a schematic diagram of another display device provided in an embodiment of this application;

[0047] Figure 12 is a schematic diagram of another display screen provided in an embodiment of this application;

[0048] Figure 13 is a schematic diagram of the voltage of the data line during GOA down-clocking according to an embodiment of this application;

[0049] Figure 14 is a schematic diagram of the voltage of the data line during another GOA down-frequency processing provided in an embodiment of this application;

[0050] Figure 15 is a schematic diagram of a driving circuit provided in an embodiment of this application;

[0051] Figure 16 is a schematic diagram of another display device provided in an embodiment of this application. Detailed Implementation

[0052] The following sections will discuss the fabrication and use of various embodiments in detail. However, it should be understood that many applicable inventive concepts provided in this application can be implemented in a variety of specific environments. The specific embodiments discussed are merely illustrative of specific ways of implementing and using this application and technology, and do not limit the scope of this application.

[0053] Unless otherwise defined, all technical terms used herein have the same meaning as commonly known to one of ordinary skill in the art.

[0054] Each circuit or other component may be described or referred to as "for" performing one or more tasks. In this context, "for" is used to imply a structure by indicating that the circuit / component includes a structure (e.g., a circuit system) that performs one or more tasks during operation. Therefore, even when the specified circuit / component is currently inoperable (e.g., not turned on), it can still be referred to as "for performing that task." Circuits / components used with the term "for" include hardware, such as circuits that perform operations.

[0055] The technical solutions in the embodiments of this application will be described below with reference to the accompanying drawings. In this application, "at least one" means one or more, and "more than one" means two or more. "And / or" describes the relationship between related objects, indicating that there can be three relationships. For example, A and / or B can mean: A exists alone, A and B exist simultaneously, or B exists alone, where A and B can be singular or plural. The character " / " generally indicates that the related objects before and after are in an "or" relationship. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c can mean: a, b, c, a and b, a and c, b and c, a, b, and c; where a, b, and c can be single or multiple.

[0056] The embodiments of this application use terms such as "first" and "second" to distinguish objects with similar names, functions, or roles. Those skilled in the art will understand that terms such as "first" and "second" do not limit the quantity or execution order.

[0057] It should be noted that, in this application, the terms "exemplary" or "for example" are used to indicate that something is being described as an example, illustration, or illustration. Any embodiment or design described as "exemplary" or "for example" in this application should not be construed as being more preferred or advantageous than other embodiments or design solutions. Specifically, the use of terms such as "exemplary" or "for example" is intended to present the relevant concepts in a concrete manner.

[0058] Before introducing the embodiments of this application, the application scenarios involved in this application will be described first.

[0059] With the maturity of low-temperature polycrystalline oxide (LTPO) technology, displays can achieve ultra-low refresh rates, such as 1Hz. To reduce the power consumption of display devices, partitioned refresh technology has emerged. This technology involves a display screen and a driving circuit, such as a display driver integrated circuit (DDIC) and an active matrix organic light-emitting diode (AMOLED) display. Partial refresh technology determines the refresh rate of the display screen based on whether the image needs updating. Specifically, when a portion of the display screen needs updating, the driving circuit drives that area to refresh at a high frequency (e.g., 120Hz), while other areas that do not require updating are driven to refresh at a low frequency (e.g., 1Hz), thus reducing the power consumption of the display device.

[0060] For example, as shown in Figure 1, the display screen includes three sequentially adjacent display areas: display area A, display area B, and display area C. These three display areas can be used to display images or content at different refresh rates. For instance, display area A can be used to display a title bar, display area B can be used to display a video window, and display area C can be used to display a navigation bar. The refresh rate of display areas A and C is 1Hz, and the refresh rate of display area B is 120Hz. If a traditional refresh method is used, the display screen refreshes at 120Hz for the entire screen. Therefore, the partitioned refresh technology can reduce the number of invalid refreshes and reduce power consumption.

[0061] To further reduce display power consumption, for low-frequency refresh rate display areas, the display data lines are typically kept in a high-impedance state when the drive circuit is not writing data. The voltage of the data lines during partitioned refresh is explained below with reference to Figures 2 and 3.

[0062] Figure 2 is a schematic diagram of a display device according to an embodiment of this application. The display device includes a driving circuit and a display screen. The display screen includes a pixel array, which comprises multiple rows and columns of pixel units (or pixel circuits, or simply pixels). These multiple rows and columns of pixel units can also be referred to as multiple pixel rows and multiple pixel columns. For each pixel column in the pixel array, the pixel column corresponds to a data line; that is, multiple pixel units in the pixel column are respectively coupled to the data line, and multiple pixel columns correspond to multiple data lines. The driving circuit provides a driving voltage to each pixel column in the pixel array and provides an array gate driver on array (GOA) signal to each pixel row in the pixel array. Each pixel in the pixel array also receives a power supply signal VDD, which can be used to power each pixel. Optionally, the multiple pixel rows in the display screen can be divided into multiple display areas, each display area may include multiple adjacent pixel rows, and the multiple display areas may have different refresh rates.

[0063] In Figure 2 above, the data lines corresponding to the multiple pixel columns are represented as S1 to Sn, the driving voltages corresponding to the multiple pixel columns are represented as V1 to Vn, and the GOA signals corresponding to the multiple pixel rows are represented as G1 to Gm. m and n are integers greater than 1. Optionally, the driving circuit may include a display driver integrated chip (DDIC) and an array gate driver on array (GOA) circuit. The DDIC can be used to provide multiple driving voltages V1 to Vn, and the GOA circuit can be used to provide multiple GOA signals G1 to Gm.

[0064] Taking the partitioned refresh shown in Figure 1 as an example, in the structure of the display device shown in Figure 2, if we take the refresh cycle of the display area with a low refresh rate (e.g., 1Hz) as an example, then the refresh cycle is 1, and this refresh cycle is equal to 120 times the refresh cycle of the display area refreshed at 120Hz. That is, the display areas A and C are refreshed once in cycle 1, and the display area B is refreshed 120 times in cycle 1. Thus, the display screen displays 120 frames in cycle 1. As shown in Figure 3, when implementing partitioned refresh, if the refresh cycle is divided into 120 time periods, each time period is 1 / 120. Time period 1 / 120 is the time period required to scan the display screen once, that is, time period 1 / 120 is the time period required to display one frame. Therefore: During the first 1 / 120th of a time period, data is written to the entire display screen. The driving circuit outputs data voltage to data lines S1 to Sn. This data voltage is used to write data to the entire display screen, specifically to display areas A, B, and C. The voltage in data lines S1 to Sn during this time period is the data voltage, and this time period can be called the first frame, which is the time period required to display the first frame of the image. The first frame includes a first write frame, a second write frame, and a third write frame. The time period corresponding to the first write frame is the time period for writing data to display area A, the time period corresponding to the second write frame is the time period for writing data to display area B, and the time period corresponding to the third frame is the time period for writing data to display area C.

[0065] During each 1 / 120th time interval from the second to the 120th 1 / 120th interval, display area B continues to write data, while display areas A and C no longer receive data. When refreshing display area B, the driving circuit outputs a data voltage to data lines S1 to Sn. This data voltage is used for writing data to display area B, and the voltage on data lines S1 to Sn is the data voltage. This time interval can be called the second write frame. When not refreshing display area B, the driving circuit outputs a voltage of 0 or close to 0 (e.g., 100mV) to data lines S1 to Sn. That is, the driving circuit outputs a voltage of 0 or close to 0 in display area A, and data lines S1 to Sn are in a high-impedance state. This time interval can be called the first hold frame. Similarly, the driving circuit outputs a voltage of 0 or close to 0 in display area C, and data lines S1 to Sn are in a high-impedance state. This time interval can be called the second hold frame. The time period from the second 1 / 120th to the 120th 1 / 120th can be referred to as the second frame to the 120th frame. In Figure 3, multiple data lines are in a high-impedance state during the first and second holding frames, and the voltage in the multiple data lines will continuously decrease as time goes by.

[0066] However, when the data lines (including data lines S1 to Sn) are in a high-impedance state, parasitic capacitive coupling in the pixel circuit causes a difference in display brightness between the low-frequency refresh area and the high-frequency refresh area, resulting in a split-screen phenomenon and affecting the user experience. For example, referring to Figure 2 and using the partitioned refresh shown in Figures 1 and 3 as an example, as shown in Figure 4, during the partitioned refresh process, the display brightness of display areas A and C differs from that of display area B.

[0067] Based on this, embodiments of this application provide a display driving method to solve the display problem of display areas with different refresh rates during partitioned refresh. Specifically, it can be used to solve the problem of different display brightness in display areas with different refresh rates, thereby improving the display effect and enhancing the user experience. This method can be applied to various electronic devices with display devices, which may include a driving circuit and a display screen.

[0068] Optionally, the electronic device may include, but is not limited to: mobile phone, tablet computer, laptop computer, PDA, mobile internet device (MID), camera, wearable device (e.g., smartwatch, smart bracelet, pedometer, etc.), audio equipment, audio and video player, set-top box, game console, printer, mouse, keyboard, in-vehicle equipment (e.g., equipment on vehicles such as cars, airplanes, ships, trains and high-speed trains), virtual reality (VR) device, augmented reality (AR) device, wireless terminal in industrial control, smart home device (e.g., refrigerator, television, air conditioner, electricity meter, etc.), smart robot, workshop equipment, wireless terminal in self-driving, wireless terminal in remote medical surgery, wireless terminal in smart grid, wireless terminal in transportation safety, wireless terminal in smart city, or wireless terminal in smart home, flying equipment (e.g., smart robot, hot air balloon, drone, airplane), etc.

[0069] The following example, using a mobile phone as an example, illustrates the structure of this electronic device. As shown in Figure 5, the electronic device may include: a radio frequency (RF) circuit 110, a memory 120, an input unit 130, a display unit 140, a sensor 150, an audio circuit 160, a processor 170, and a power supply 180, among other components. Optionally, the display unit 140 may be one of the display devices described above.

[0070] RF circuit 110 can be used to send and receive information, or to receive or send signals during a call. Specifically, it receives downlink information from the base station and processes it in processor 170; additionally, it sends uplink data to the base station. Typically, RF circuit 110 includes, but is not limited to, an antenna, at least one amplifier, a transceiver, a coupler, a low-noise amplifier (LNA), a duplexer, etc. Furthermore, RF circuit 110 can also communicate wirelessly with networks and other devices.

[0071] The memory 120 can be used to store data, software programs, and modules; it mainly includes a program storage area and a data storage area. The program storage area can store the operating system and at least one application program required for a function, such as sound playback or image playback. The data storage area can store data created based on the use of the electronic device, such as audio data, image data, and a phone book. Furthermore, the electronic device may include high-speed random access memory and non-volatile memory, such as at least one disk storage device, flash memory device, or other volatile solid-state storage device. In this embodiment, the memory may include multiple memories, including a first memory and a second memory.

[0072] The input unit 130 can be used to receive input numerical or character information, and to generate key signal inputs related to user settings and function control of the electronic device. Specifically, the input unit 130 may include a touch screen 131 and other input devices 132. The touch screen 131 can collect touch operations performed by the user on or near it (such as operations performed by the user using a finger, stylus, or any suitable object or accessory on or near the touch screen), and drive the corresponding connected devices according to a pre-set program. Optionally, other input devices 132 may include, but are not limited to, one or more of the following: a physical keyboard, function keys (such as volume control buttons, power switch buttons, etc.), a trackball, a mouse, a joystick, etc.

[0073] Display unit 140 can be used to display information input by the user or information provided to the user, as well as various menus of the electronic device. In one example, display unit 140 may include display screen 141, which may be configured as a liquid crystal display (LCD), organic light-emitting diode (OLED), or similar device. Furthermore, touchscreen 131 may cover display screen 141. When touchscreen 131 detects a touch operation on or near it, it transmits the information to processor 170 to determine the type of touch event. Subsequently, processor 170 provides corresponding visual output on display screen 141 based on the type of touch event. Although in the figures, touchscreen 131 and display screen 141 are shown as two separate components to implement the input and output functions of the electronic device, in some embodiments, touchscreen 131 and display screen 141 can be integrated to achieve the input and output functions of the electronic device.

[0074] Sensor 150 may include one or more sensors for providing status assessments of various aspects of the electronic device. Sensor 150 may include a light sensor, which can be used in imaging applications, i.e., as a component of a camera or video camera. Furthermore, sensor 150 may also include an accelerometer, gyroscope, magnetometer, pressure sensor, or temperature sensor. Sensor 150 can detect acceleration / deceleration, orientation, on / off state, relative positioning of components, or temperature changes of the electronic device.

[0075] Audio circuitry 160, a speaker, and a microphone provide an audio interface between the user and the electronic device. Audio circuitry 160 converts received audio data into electrical signals and transmits them to the speaker, where the speaker converts them into sound signals for output. On the other hand, the microphone converts collected sound signals into electrical signals, which are then received by audio circuitry 160, converted into audio data, and output to RF circuitry 110 for transmission to, for example, another mobile phone, or to memory 120 for further processing.

[0076] The processor 170 is the control center of the electronic device, connecting various parts of the device through various interfaces and lines. It executes software programs and / or modules stored in the memory 120, and calls data stored in the memory 120, to perform various functions and process data, thereby providing overall monitoring of the electronic device. Optionally, the processor 170 may include one or more processing units, which may include, but are not limited to: a central processing unit (CPU), a network processing unit (NPU), a graphics processing unit (GPU), an image signal processor (ISP), a tensor processing unit (TPU), a data processing unit (DPU), a digital signal processor (DSP), a microcontroller, or a microprocessor. Furthermore, the processor 170 may also include other hardware circuits or accelerators, such as application-specific integrated circuits (ASICs), complex programmable logic devices (CPLDs), or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. Optionally, the processor 170 may also be a combination of functions that implement computing, such as a combination of one or more microprocessors, a combination of a digital signal processor and a microprocessor, etc.

[0077] The electronic device may also include a power supply 180 (e.g., a battery) to power various components. The power supply 180 can be logically connected to the processor 170 via a power management system, thereby enabling functions such as charging, discharging, and power consumption management through the power management system. Optionally, the power management system can simultaneously support fast charging and non-fast charging technologies. In practical applications, the power management system can charge the battery in the power supply 180 using either fast charging or non-fast charging technologies.

[0078] Although not shown, the electronic device may also include a wireless fidelity (WiFi) module, a Bluetooth module, etc., which will not be described in detail in the embodiments of this application. Those skilled in the art will understand that the structure of the electronic device shown in the figure does not constitute a limitation on the electronic device, and may include more or fewer components than shown, or combine certain components, or have different component arrangements.

[0079] Figure 6 is a schematic flowchart of a display driving method provided in an embodiment of this application. This method can be applied to a display device, which includes a driving circuit and a display screen. The display screen includes a first display area and a second display area. The method includes the following steps.

[0080] S601a: The driving circuit outputs driving voltages to the first display area and the second display area through multiple data lines. This driving voltage includes a first holding voltage and a data voltage. The first holding voltage is used to keep the first display area from refreshing during a first holding frame, and the data voltage is used to refresh the second display area during a write frame. The driving voltage abruptly switches to provide the data voltage at the first moment of the first holding frame; the valley value of the data voltage is greater than the first holding voltage, and the difference between the valley value and the first holding voltage is greater than a preset threshold. The first holding voltage varies with changes in the refresh rate and grayscale of the first display area, the refresh rate and grayscale of the second display area, the display brightness, and the temperature of the display screen.

[0081] The display screen may include multiple display areas with different refresh rates, and these multiple display areas may include at least a first display area and a second display area. The refresh rate of the first display area is lower than that of the second display area, so the refresh period of the first display area is greater than that of the second display area. For example, as shown in Figure 7(a), the display may include two display areas, with the first display area having a refresh rate of 1Hz and the second display area having a refresh rate of 120Hz; or, as shown in Figure 7(b), the display may include three display areas, with the first and third display areas both having a refresh rate of 1Hz, and the second display area having a refresh rate of 120Hz, located between the first and third display areas. The following description uses the display screen shown in Figure 7(b) as an example.

[0082] Furthermore, since the refresh cycle of the first display area is the same as that of the third display area, the following explanation will use the refresh cycle of the first display area as an example. The first and second display areas can operate at multiple refresh cycles, and the refresh cycles of the first and second display areas are different. For ease of description, any refresh cycle of the first display area will be denoted as the i-th refresh cycle of the first display area, and any refresh cycle of the second display area will be denoted as the j-th refresh cycle of the second display area, where i and j are positive integers.

[0083] Furthermore, the i-th refresh cycle of the first display area may include multiple frames. For example, the first frame of the multiple frames sequentially includes a first write frame, a second write frame, and a third write frame; the second frame and each subsequent frame of the multiple frames sequentially include a first hold frame, a second write frame, and a second hold frame. The time period corresponding to the first write frame is the time period for writing data to the first display area; the time period corresponding to the second write frame is the time period for writing data to the second display area; and the time period corresponding to the third write frame is the time period for writing data to the third display area. The time period corresponding to the first hold frame is the time period for holding the data displayed in the first display area; and the time period corresponding to the second hold frame is the time period for holding the data displayed in the second display area. The first hold frame overlaps with the first write frame in timing, and the second hold frame overlaps with the third write frame in timing; that is, the time period corresponding to the first hold frame overlaps with the time period corresponding to the first write frame, and the time period corresponding to the second hold frame overlaps with the time period corresponding to the third write frame. In this paper, any hold frame corresponding to the first display area included in the i-th refresh cycle of the first display area is called the first hold frame, the write frame of the j-th refresh cycle of the second display area is called the second write frame, and the hold frame corresponding to the third display area included in the i-th refresh cycle of the third display area is called the second hold frame.

[0084] In one possible embodiment, the driving circuit outputs multiple driving voltages to the first display area and the second display area. For example, these multiple driving voltages may include driving voltages corresponding to each pixel column among multiple pixel columns corresponding to the first, second, and third display areas. Each of these multiple driving voltages can be used to switch from providing the first holding voltage to providing the data voltage at a first moment of the first holding frame. Each driving voltage is also used to switch from providing the data voltage to providing the first holding voltage at a second moment of the second write frame; that is, each driving voltage is also used to switch to providing the first holding voltage at a second moment of the second write frame. The first moment is the end moment of the first holding frame, and the second moment is the end moment of the second write frame. The data voltages provided by the driving voltages in the first, second, and third write frames can be used to refresh the display screen; that is, the data voltages provided by the driving voltages in the first, second, and third write frames can be used to provide data to the first, second, and third display areas. The data voltages provided by the driving voltages in the second write frame can be used to refresh the second display area; that is, the data voltages provided by the driving voltages in the second write frame can be used to provide data to the second display area. The driving voltage provided by the first holding frame and the second holding frame can be used to hold data in the first display area and the second display area.

[0085] Optionally, the multiple pixel rows in the pixel array included in the display screen can be divided into different display areas by row. For example, a first display area includes multiple first pixel rows, a second display area includes multiple second pixel rows, and a third display area includes multiple third pixel rows, with the multiple first pixel rows preceding the multiple second pixel rows, and the multiple second pixel rows preceding the multiple third pixel rows. The first display area is adjacent to the second display area, and the second display area is adjacent to the third display area.

[0086] Secondly, the data voltage is a first AC voltage, meaning the data voltage is an alternating voltage. The first holding voltage can be a first DC voltage or a second AC voltage. In this paper, the data voltage is taken as the first AC voltage. When the first holding voltage is an AC voltage, the first holding voltage is taken as the second AC voltage; when the first holding voltage is a DC voltage, the first holding voltage is taken as the first DC voltage.

[0087] The following explanation, using Figure 7(b) as an example, focuses on the first refresh cycle of the first display area. The first refresh cycle is 1, and it is equal to 120 times the refresh cycle of the second display area, which refreshes at 120Hz. When implementing partitioned refresh, if the first refresh cycle is divided into 120 time segments, each segment being 1 / 120, then the first refresh cycle comprises 120 frames, with each frame being 1 / 120. The voltages in the multiple data lines when the first holding voltage is different will be explained using Figures 8 and 9.

[0088] In one example, the first holding voltage is a first DC voltage. The driving voltage can be switched from the first holding voltage to a data supply voltage, in which case the voltage of each data line among the plurality of data lines changes from the first DC voltage to a first AC voltage. Alternatively, the driving voltage can be switched from a data voltage to a first holding voltage, in which case the voltage of each data line among the plurality of data lines changes from the first AC voltage to the first DC voltage. Wherein, the valley voltage (the minimum voltage value among the data voltages) is greater than the first DC voltage, and the difference between the valley voltage and the first DC voltage is a preset threshold value; that is, the valley voltage of the first AC voltage is greater than the first DC voltage, and the difference between the valley voltage and the first DC voltage is a preset threshold value. This preset threshold value can be set based on experience or the experience of relevant personnel, and this application does not specifically limit it.

[0089] For example, taking one data line out of multiple data lines as an example, as shown in Figure 8, for each frame from the second frame to the 120th frame, the voltage of this data line is a first holding voltage (i.e., a first DC voltage) in the first holding frame, a data voltage (a first AC voltage) in the second write frame, and a first holding voltage (i.e., a first DC voltage) in the second holding frame. The voltage of this data line changes from the first holding voltage (i.e., DC voltage) to the data voltage (a first AC voltage) at a first moment T1 in the first holding frame, and changes from the data voltage (a first AC voltage) to the first holding voltage (i.e., the first DC voltage) at a second moment T2 in the second write frame. Since the first refresh cycle includes multiple write frames in the first frame of the 120 frames, and the driving voltage provides the data voltage in the first frame, the first frame is not shown in Figure 8. Figure 8 uses one data line out of multiple data lines as an example.

[0090] In this example, the driving circuit outputs a stable DC voltage to the display area corresponding to the low refresh rate, and this DC voltage can be dynamically adjusted. The voltage of the data line in the low refresh rate display area is a DC voltage, and this DC voltage can be dynamically adjusted, that is, the DC voltage changes with the changes in the relevant parameters of the display screen. The relevant parameters of the display screen include the refresh rate and grayscale of the first display area, the refresh rate and grayscale of the second display area, the display brightness, and the temperature of the display screen. For example, when the display brightness of the first display area changes, the DC voltage also changes accordingly, thereby solving the problem of different display brightness in display areas with different refresh rates.

[0091] In another example, the first holding voltage is an alternating second AC voltage. The drive voltage can switch from the first holding voltage to providing a data voltage, in which case the voltage of each of the multiple data lines switches from the second AC voltage to the first AC voltage; the drive voltage can also switch from a data voltage to providing the first holding voltage, in which case the voltage of each of the multiple data lines switches from the first AC voltage to the second AC voltage. Wherein, the valley voltage of the data voltage is greater than the peak voltage of the first holding voltage (the maximum voltage value in the first holding voltage), and the difference between the valley voltage and the peak voltage is greater than a preset threshold.

[0092] For example, taking one of multiple data lines as an example, as shown in Figure 9, for each frame from the second frame to the 120th frame, the voltage of the data line is a first holding voltage (i.e., the second AC voltage) in the first holding frame, a data voltage (i.e., the first AC voltage) in the second write frame, and a first holding voltage (i.e., the second AC voltage) in the second holding frame. Furthermore, the voltage of the data line changes from the first holding voltage (i.e., the second AC voltage) to the data voltage (i.e., the first AC voltage) at a first moment T1 in the first holding frame, and changes from the data voltage (i.e., the first AC voltage) to the first holding voltage (i.e., the second AC voltage) at a second moment T2 in the second write frame. The first frame is not shown in Figure 9.

[0093] In this embodiment, the driving circuit outputs an AC voltage that can be dynamically adjusted. For example, when the relevant parameters of the display screen change, the AC voltage also changes accordingly, thereby solving the problem of different display brightness in display areas with different refresh rates.

[0094] In one possible embodiment, for the display screen shown in Figure 7(a), the relevant parameters of the display screen include the refresh rate and grayscale of the first display area, the refresh rate and grayscale of the second display area, the display brightness, and the temperature of the display screen. The above example uses the display screen shown in Figure 7(b) as an example.

[0095] Optionally, the data voltage and the first holding voltage can be provided by the same circuit or by different circuits. The two possible cases are explained below with reference to Figures 10 and 11.

[0096] In one possible embodiment, the data voltage and the first holding voltage are provided by different circuits; for example, the data voltage is provided by the data channel circuit, and the first holding voltage is provided by the power management circuit.

[0097] For example, as shown in FIG10, the driving circuit includes a power management circuit. The method provided in this application embodiment further includes: the power management circuit receiving relevant parameters of the display screen sent by the processor; and outputting a first holding voltage to the first display area and the third display area through multiple data lines based on the relevant parameters of the display screen. For example, the power management circuit may include a voltage calculation control unit and a power management unit (PMU). The voltage calculation control unit can be used to receive relevant parameters of the display screen from the processor, determine a voltage codeword based on the relevant parameters of the display screen, and send the determined voltage codeword to the power management unit (PMU). The PMU outputs the first holding voltage according to the voltage codeword.

[0098] The data voltage is provided by the data channel circuit in the driving circuit. For example, the data channel circuit in the driving circuit determines and outputs the data voltage based on the display content.

[0099] In one possible embodiment, the data voltage and the first holding voltage are provided by the same circuit; for example, both the first holding voltage and the data voltage can be provided by the data channel circuit.

[0100] As shown in Figure 11, the first calculation unit in the driving circuit determines the first gamma of the second display area based on the displayed content of the second display area. The first gamma is the gamma of the red, green, and blue components of the second display area. The second calculation unit in the driving circuit determines the second gamma of the first and third display areas based on relevant parameters of the display screen. The second gamma is the gamma of the red, green, and blue components of the first and third display areas. The data channel provides a data voltage based on the first gamma and a first holding voltage based on the second gamma. For example, when the first gamma is valid, the data channel circuit provides a data voltage based on the first gamma; when the second gamma is valid, the data channel circuit provides a first holding voltage based on the second gamma.

[0101] Optionally, when the red, green, and blue gamma components of the first or third display area are set to the same value, the first holding voltage is a first DC voltage; when any two gamma components of the red, green, and blue gamma components of the first or third display area are set to different values, the first holding voltage is a second AC voltage.

[0102] In the display devices shown in Figures 10 and 11, the driving circuit switches between the first holding voltage and the data voltage according to the partition switching signal. This partition switching signal is determined by the driving circuit based on the row information of the plurality of second pixel rows included in the second display area. Specifically, before outputting the driving voltage, the driving circuit receives row information from the processor, which consists of the row coordinates of the plurality of second pixel rows included in the second display area. The driving circuit determines the partition switching signal based on the row coordinates of the plurality of second pixel rows. This partition switching information may include a low level (e.g., a low level can be represented as 0) and a high level (e.g., a high level can be represented as 1). For example, the partition switching signal corresponding to the first display area and the third display area is a low level, and the partition switching signal corresponding to the second display area is a high level.

[0103] As shown in Figure 10, when the partition switching signal is low, the PMU provides a first holding voltage; when the partition switching signal is high, the data channel circuit provides a data voltage. At the first moment of the first holding frame, the partition switching signal changes from low to high, and the driving voltage changes from the first holding voltage provided by the PMU to the data voltage provided by the data channel circuit. At the second moment of the second write frame, the partition switching signal changes from high to low, and the driving voltage changes from the data voltage provided by the data channel circuit to the first holding voltage provided by the PMU.

[0104] As shown in Figure 11, when the partition switching signal is low (i.e., 0), the second gamma is active, and the data channel circuit provides the first holding voltage based on the second gamma; when the partition switching signal is high (i.e., 1), the first gamma is active, and the data channel circuit provides the data voltage based on the first gamma. At the first moment of the first holding frame, the partition switching signal changes from low to high, and the data channel circuit changes from providing the first holding voltage to providing the data voltage at the first moment of the first holding frame; at the second moment of the second write frame, the partition switching signal changes from high to low, and the data channel circuit changes from providing the data voltage to providing the first holding voltage at the second moment of the second write frame.

[0105] S601b: The display screen receives a first holding voltage and a data voltage from the driving circuit through multiple data lines, and keeps the first display area and the third display area from being refreshed in the first holding frame and the second holding frame based on the first holding voltage, and refreshes the second display area in the second write frame based on the data voltage.

[0106] In the above embodiments, the third display area is described as not having undergone GOA downclocking processing.

[0107] In one possible embodiment, to further reduce power consumption, the third display area with a low refresh rate following the high refresh rate second display area is subjected to GOA downclocking. For example, the driving circuit outputs a continuous clock level to the multiple third pixel rows included in the third display area. This continuous clock level can be either a continuous low level or a continuous high level. Compared to when the third display area is not subjected to GOA downclocking, and the driving circuit outputs a clock signal with alternating high and low levels to the multiple third pixel rows included in the third display area, the power consumption of the driving circuit is reduced. Referring to Figure 7(b) and as shown in Figure 12, after the third display area is subjected to GOA downclocking, the display brightness of the first display area is different from that of the third display area, resulting in three different display brightnesses on the screen.

[0108] The method provided in this application embodiment further includes: the driving circuit outputs a second holding voltage to the third display area through multiple data lines, the second holding voltage being used to keep the third display area from being refreshed within the second holding frame; the driving voltage jumps to provide the second holding voltage at the second moment of writing the frame; the first holding voltage is different from the second holding voltage.

[0109] The second holding voltage can be either a second DC voltage or a third AC voltage. In this paper, when the second holding voltage is an AC voltage, we will take the third AC voltage as the example; when the second holding voltage is a DC voltage, we will take the second DC voltage as the example. The following explanation will cover each case separately.

[0110] In one possible embodiment, the second holding voltage is a second DC voltage.

[0111] For example, referring to Figure 8 and Figure 13, for each frame from the second frame to the 120th frame, the voltage of the data line is a first holding voltage (i.e., a first DC voltage) in the first holding frame, a data voltage (a first AC voltage) in the second write frame, and a second holding voltage (i.e., a second DC voltage) in the second holding frame. At a first moment T1 in the first holding frame, the voltage changes from the first holding voltage (i.e., the first DC voltage) to the data voltage (i.e., the first AC voltage), and at a second moment T2 in the second write frame, it changes from the data voltage (i.e., the first AC voltage) to the second holding voltage (i.e., the second DC voltage). The first DC voltage and the second DC voltage are different; that is, there is a voltage difference between the first DC voltage and the second DC voltage. For example, the first DC voltage can be greater than the second DC voltage; or, the first DC voltage can be less than the second DC voltage. Figure 13 illustrates this using the example of the first DC voltage being greater than the second DC voltage.

[0112] Among them, the valley voltage of the data voltage is greater than the second DC voltage, and the difference between the valley voltage and the second DC voltage is greater than a preset threshold.

[0113] In one possible embodiment, the second holding voltage is a third AC voltage.

[0114] For example, referring to Figure 9 and as shown in Figure 14, for each frame from the second frame to the 120th frame, the voltage of the data line is a first holding voltage (i.e., the second AC voltage) in the first holding frame, a data voltage (i.e., the first AC voltage) in the second write frame, and a second holding voltage (i.e., the third AC voltage) in the second holding frame. Furthermore, the voltage of the data line changes from the first holding voltage (i.e., the second AC voltage) to the data voltage (i.e., the first AC voltage) at a first moment T1 in the first holding frame, and changes from the data voltage (i.e., the first AC voltage) to the second holding voltage (i.e., the third AC voltage) at a second moment T2 in the second write frame. The second AC voltage is different from the third AC voltage; that is, there is a voltage difference between the second AC voltage and the third AC voltage. Figure 14 illustrates this using the example where the second AC voltage is greater than the third AC voltage.

[0115] Among them, the valley voltage of the data voltage is greater than the peak voltage of the third AC voltage (i.e., the maximum voltage value in the third AC voltage), and the difference between the valley voltage and the peak voltage of the third AC voltage is greater than a preset threshold.

[0116] In the two embodiments described above, the voltage difference between the first holding voltage and the second holding voltage can be determined based on relevant parameters of the display screen. The voltage difference between the first holding voltage and the second holding voltage eliminates the impact of GOA down-clocking on the display brightness of the third display area, thereby ensuring that the display brightness of the first display area and the third display area are the same.

[0117] It is understood that, in this embodiment of the application, different refresh frequencies including 1Hz and 120Hz are used as examples. In practical applications, the different refresh frequencies can also be other values, and can include three or more refresh frequencies. This embodiment of the application does not impose specific limitations on this. When the different refresh frequencies include three or more refresh frequencies, the first display area can be the display area with the lowest refresh frequency, and the second display area can be the display area with the highest refresh frequency.

[0118] In this embodiment, during the partitioned refresh process of the first display area and the second display area, for the first holding frame within the i-th refresh cycle of the first display area, the driving circuit can output a first holding voltage through multiple data lines in the first holding frame. At this time, the voltage of the multiple data lines is the first holding voltage, and the first holding voltage changes with the refresh frequency, grayscale of the first display area, the refresh frequency, grayscale of the second display area, the display brightness, and the temperature of the display screen. That is, the first holding voltage is dynamically adjusted by parameters such as the refresh frequency, grayscale of the first display area, the refresh frequency, grayscale of the second display area, the display brightness, and the temperature of the display screen. The display brightness of the first display area is compensated by capacitive coupling in the display screen, so that the display brightness of display areas with different refresh frequencies is consistent, thereby solving the problem of different display brightness between the first display area and the second display area during the partitioned refresh process.

[0119] The above mainly describes the solution provided by the embodiments of this application from the perspective of the interaction between the driving circuit and the display screen in the display device. It is understood that, in order to achieve the above functions, the display device includes corresponding hardware structures and / or software modules for executing each function. Those skilled in the art should readily recognize that, based on the units and algorithm steps of the examples described in conjunction with the embodiments disclosed herein, this application can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed by hardware or by computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0120] This application embodiment can divide the driving circuit into functional modules according to the above method example. For example, each function can be divided into its own functional modules, or two or more functions can be integrated into one module. The integrated module can be implemented in hardware or as a software functional module. It should be noted that the module division in this application embodiment is illustrative and only represents one logical functional division. In actual implementation, there may be other division methods. The following description uses the division of functional modules according to each function as an example.

[0121] In the case of using integrated units, Figure 15 shows a schematic diagram of a driving circuit involved in the above embodiments. This driving circuit may include a first driving unit 301 and a second driving unit 302 for driving the display screen. The first driving unit 301 can be used to support the driving circuit in executing S601a in the above method embodiments; the second driving unit 302 is used to support the driving circuit in outputting a GOA signal to the display screen.

[0122] Based on the hardware implementation, as shown in Figure 16, the first driving unit 301 can be DDIC and the second driving unit 302 can be GOA.

[0123] All relevant content of each step involved in the above method embodiments can be referenced from the functional description of the corresponding functional module, and will not be repeated here in the embodiments of this application.

[0124] This application also provides a display device, which may include a driving circuit and a display screen. The driving circuit can be used to drive the display screen. The driving circuit includes a DDIC and a GOA, and the driving circuit can be any of the driving circuits provided above.

[0125] It is understood that all relevant content of each step involved in the above method embodiments can be referenced in the embodiments of the display device, and the embodiments of this application will not be repeated here.

[0126] In another embodiment of this application, an electronic device is also provided, which includes a processor and a display device; wherein the display device can be any of the display devices provided above, and is used to perform the steps in the method embodiments provided above.

[0127] It is understood that all relevant content of each step involved in the above method embodiments can be referenced in the embodiments of the electronic device, and the embodiments of this application will not be repeated here.

[0128] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative. For instance, the division of modules or units is merely a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another apparatus, or some features may be ignored or not executed.

[0129] The units described as separate components may or may not be physically separate. A component shown as a unit can be one or more physical units; that is, it can be located in one place or distributed in multiple different locations. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0130] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a readable storage medium. This readable storage medium may include various media capable of storing program code, such as a USB flash drive, external hard drive, read-only memory, random access memory, magnetic disk, or optical disk. Based on this understanding, the technical solution of the embodiments of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product.

[0131] In another embodiment of this application, a readable storage medium is also provided, which stores a computer program or instructions. When a device (which may be a chip or a microcontroller, etc.) or a processor runs the computer program or instructions, it executes the steps in the above method embodiments.

[0132] In another embodiment of this application, a computer program product is also provided, which includes a computer program or instructions stored in a readable storage medium; at least one processor of the device can read the computer program or instructions from the readable storage medium, and when the at least one processor executes the computer program or instructions, it performs the steps in the above method embodiments.

[0133] Finally, it should be noted that the above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A display driving method, characterized by, The method is applied in a driving circuit for driving a display screen, which includes a first display area and a second display area. The refresh period of the first display area is greater than that of the second display area. The i-th refresh period of the first display area includes a first hold frame, and the j-th refresh period of the second display area includes a write frame. i and j are positive integers. The driving circuit is coupled to multiple data lines of the display screen. The driving circuit outputs driving voltages to the first display area and the second display area through the plurality of data lines; the driving voltage includes a first holding voltage and a data voltage, the first holding voltage is used to keep the first display area from being refreshed within the first holding frame, and the data voltage is used to refresh the second display area within the write frame; the driving voltage jumps to provide the data voltage at a first moment of the first holding frame; the valley voltage of the data voltage is greater than the first holding voltage, and the difference between the valley voltage and the first holding voltage is greater than a preset threshold. The first holding voltage varies with the refresh rate and grayscale of the first display area, the refresh rate and grayscale of the second display area, the display brightness, and the temperature of the display screen.

2. The method of claim 1, wherein, The driving circuit includes a power management circuit, which is coupled to the processor. The method further includes: The power management circuit receives the refresh rate and grayscale of the first display area, the refresh rate and grayscale of the second display area, the display brightness, and the temperature of the display screen from the processor. The power management circuit outputs the first holding voltage based on the refresh rate and grayscale of the first display area, the refresh rate and grayscale of the second display area, the display brightness, and the temperature of the display screen.

3. The method according to claim 1 or 2, characterized in that, The first holding voltage is a DC voltage.

4. The method according to claim 1 or 2, characterized in that, The first holding voltage is an AC voltage, the valley voltage of the data voltage is greater than the peak voltage of the first holding voltage, and the difference between the valley voltage and the peak voltage is greater than the preset threshold.

5. The method according to any one of claims 1 to 4, characterized in that, The display screen further includes a third display area adjacent to the second display area. The third display area is a display area with GOA downclocking processing. The refresh period of the third display area is the same as the refresh period of the first display area. The i-th refresh period of the third display area includes a second hold frame. The method further includes: The driving circuit outputs a second holding voltage to the third display area through the plurality of data lines. The second holding voltage is used to keep the third display area from being refreshed during the second holding frame. The driving voltage jumps to provide the second holding voltage at the second moment of the write frame, and the first moment is earlier than the second moment. The first holding voltage is different from the second holding voltage.

6. A display driving method, comprising: The method is applied to a display screen, which includes a first display area and a second display area. The refresh period of the first display area is greater than that of the second display area. The i-th refresh period of the first display area includes a first hold frame, and the j-th refresh period of the second display area includes a write frame. i and j are positive integers. Multiple data lines of the display screen are coupled to a driving circuit, which drives the display screen. The method further includes: The display screen receives a driving voltage from the driving circuit via the plurality of data lines; the driving voltage includes a first holding voltage and a data voltage; the driving voltage transitions to provide the data voltage at a first moment of the first holding frame; the valley voltage of the data voltage is greater than the first holding voltage, and the difference between the valley voltage and the first holding voltage is greater than a preset threshold; the first holding voltage varies with changes in the refresh rate and grayscale of the first display area, the refresh rate and grayscale of the second display area, the display brightness, and the temperature of the display screen. The display screen keeps the first display area from refreshing within the first holding frame based on the first holding voltage; and refreshes the second display area within the writing frame based on the data voltage.

7. The method of claim 6, wherein, The driving circuit includes a power management circuit, and the first holding voltage is determined by the power management circuit based on the refresh frequency and grayscale of the first display area, the refresh frequency and grayscale of the second display area, the display brightness, and the temperature of the display screen.

8. The method according to claim 6 or 7, characterized in that, The first holding voltage is a DC voltage.

9. The method according to claim 6 or 7, characterized in that, The first holding voltage is an AC voltage, the valley voltage of the data voltage is greater than the peak voltage of the first holding voltage, and the difference between the valley voltage and the peak voltage is greater than the preset threshold.

10. The method according to any one of claims 6-9, characterized in that, The display screen further includes a third display area adjacent to the second display area. The third display area is a display area with GOA downclocking processing. The refresh period of the third display area is the same as the refresh period of the first display area. The i-th refresh period of the third display area includes a second hold frame. The method further includes: The display screen receives a second holding voltage through multiple data lines and keeps the third display area from refreshing during the second holding frame; the driving voltage jumps to provide the second holding voltage at the second moment of the write frame, the first moment being earlier than the second moment; the first holding voltage is different from the second holding voltage.

11. A drive circuit, characterized by The driving circuit is used to drive the display screen, which includes a first display area and a second display area. The refresh period of the first display area is greater than the refresh period of the second display area. The i-th refresh period of the first display area includes a first hold frame, and the j-th refresh period of the second display area includes a write frame. i and j are positive integers. The driving circuit is coupled to multiple data lines of the display screen. The driving circuit is further configured to output driving voltages to the first display area and the second display area through the plurality of data lines; the driving voltages include a first holding voltage and a data voltage, the first holding voltage is configured to keep the first display area from being refreshed within the first holding frame, the data voltage is configured to refresh the second display area within the write frame, and the driving voltage jumps to provide the data voltage at a first moment of the first holding frame; the valley voltage of the data voltage is greater than the first holding voltage, and the difference between the valley voltage and the first holding voltage is greater than a preset threshold. The first holding voltage varies with the refresh rate and grayscale of the first display area, the refresh rate and grayscale of the second display area, the display brightness, and the temperature of the display screen.

12. The drive circuit of claim 11, wherein, The driving circuit includes a power management circuit, which is coupled to the processor. The power management circuit is used to receive the refresh rate and grayscale of the first display area, the refresh rate and grayscale of the second display area, the display brightness, and the temperature of the display screen from the processor. The power management circuit is further configured to output the first holding voltage to the first display area via the plurality of data lines based on the refresh frequency, grayscale of the first display area, the refresh frequency, grayscale of the second display area, the display brightness, and the temperature of the display screen.

13. The drive circuit according to claim 11 or 12, characterized in that, The first holding voltage is a DC voltage.

14. The drive circuit according to claim 11 or 12, characterized in that, The first holding voltage is an AC voltage, the valley voltage of the data voltage is greater than the peak voltage of the first holding voltage, and the difference between the valley voltage and the peak voltage is greater than the preset threshold.

15. The drive circuit according to any one of claims 11 to 14, characterized by The display screen also includes a third display area adjacent to the second display area. The third display area is a display area with GOA downclocking processing. The refresh period of the third display area is the same as that of the first display area. The i-th refresh period of the third display area includes a second hold frame. The driving circuit is further configured to output a second holding voltage to the third display area through the plurality of data lines. The second holding voltage is used to keep the third display area from being refreshed during the second holding frame. The driving voltage jumps to provide the data voltage at a second moment of the write frame, the first moment being earlier than the second moment. The first holding voltage is different from the second holding voltage.

16. A display screen, characterized by The display screen includes a first display area and a second display area. The refresh period of the first display area is greater than that of the second display area. The i-th refresh period of the first display area includes a first hold frame, and the j-th refresh period of the second display area includes a write frame. i and j are positive integers. Multiple data lines of the display screen are coupled to a driving circuit, which drives the display screen. The display screen is configured to receive a driving voltage from the driving circuit via the plurality of data lines; the driving voltage includes a first holding voltage and a data voltage; the driving voltage transitions to provide the data voltage at a first moment of the first holding frame; the valley voltage of the data voltage is greater than the first holding voltage, and the difference between the valley voltage and the first holding voltage is greater than a preset threshold; the first holding voltage varies with changes in the refresh rate and grayscale of the first display area, the refresh rate and grayscale of the second display area, the display brightness, and the temperature of the display screen. The display screen is also configured to keep the first display area from being refreshed within the first holding frame based on the first holding voltage; and to refresh the second display area within the write frame based on the data voltage.

17. The display screen of claim 16, wherein, The driving circuit includes a power management circuit, and the first holding voltage is determined by the power management circuit based on the refresh frequency and grayscale of the first display area, the refresh frequency and grayscale of the second display area, the display brightness, and the temperature of the display screen.

18. A display screen according to claim 16 or 17, characterised in that, The first holding voltage is a DC voltage.

19. The display screen according to claim 16 or 17, characterized in that, The first holding voltage is an AC voltage, the valley voltage of the data voltage is greater than the peak voltage of the first holding voltage, and the difference between the valley voltage and the peak voltage is greater than the preset threshold.

20. The display screen according to any one of claims 16-19, characterized in that, The display screen also includes a third display area adjacent to the second display area. The third display area is a display area with GOA downclocking processing. The refresh period of the third display area is the same as that of the first display area. The i-th refresh period of the third display area includes a second hold frame. The display screen is also configured to receive a second holding voltage from the driving circuit through the plurality of data lines, and to keep the third display area from being refreshed during the second holding frame; the driving voltage jumps to provide the data voltage at a second moment of the write frame, the first moment being earlier than the second moment; the first holding voltage is different from the second holding voltage.

21. A display device, characterized in that, The display device includes a driving circuit and a display screen, the driving circuit being used to drive the display screen, the driving circuit being a driving circuit as described in any one of claims 11-15, and the display screen being a display screen as described in any one of claims 16-20.

22. An electronic device, characterized in that, The electronic device includes a processor and a display device coupled to the processor, wherein the display device is the display device as described in claim 21.

23. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores instructions that, when executed on the device, cause the device to perform the display driving method as described in any one of claims 1-10.

24. A computer program product, characterized in that, The computer program product includes a computer program that, when run on a device, causes the device to perform the display driving method as described in any one of claims 1-10.

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