Firmware refresh method and device, and readable storage medium and program product

Abstract

The present application relates to the technical field of computer application. Disclosed are a firmware refresh method and device, and a readable storage medium and a program product. The method comprises: when it is detected that an upgrade of basic input / output system firmware in a flash memory has been completed, acquiring the current system advanced configuration and power interface state; when it is determined that the current system advanced configuration and power interface state is an all-devices-off state, controlling an auxiliary power signal and an all-devices-off power retention signal to be in a disabled state, so as to clear a global reset state record; and when it is detected that both the auxiliary power signal and the all-devices-off power retention signal are in the disabled state, refreshing the upgraded basic input / output system firmware in the flash memory to a synchronous static random-access memory. In the present application, basic input / output system firmware is upgraded without requiring power-off, thereby reducing labor costs and avoiding the impact on current operating services of a system.

Description

A firmware flashing method, device, readable storage medium, and program product.

[0001] Cross-references to related applications

[0002] This application claims priority to Chinese Patent Application No. 202510098712.X, filed on January 22, 2025, entitled "A Firmware Refresh Method, Device, Readable Storage Medium and Program Product", the entire contents of which are incorporated herein by reference. Technical Field

[0003] This application relates to the field of computer application technology, and in particular to a firmware flashing method, device, computer non-volatile readable storage medium, and computer program product. Background Technology

[0004] For system security and functional expansion, the Basic Input / Output System (BIOS) firmware (FW) needs to be upgraded. During an in-band BIOS upgrade, the Central Processing Unit (CPU)'s Synchronous Static Random-Access Memory (S3M SRAM) is already accessing the BIOS Flash memory. If the CPU is unaware of the firmware upgrade in the Flash memory, the firmware update can cause the server to fail to boot. This typically requires a power outage for system recovery, necessitating a server restart and manual intervention such as unplugging and replugging power cords, resulting in high labor costs. Furthermore, restarting the server requires shutting down related services, impacting critical business data for customers and the data center. Summary of the Invention

[0005] The purpose of this application is to provide a firmware flashing method that enables the upgrading of basic input / output system firmware without power interruption, saving labor costs and avoiding impact on the current operation of the system; another purpose of this application is to provide a firmware flashing device, a computer non-volatile readable storage medium, and a computer program product.

[0006] To solve the above-mentioned technical problems, this application provides the following technical solution:

[0007] A firmware flashing method includes:

[0008] When the firmware upgrade of the basic input / output system in the flash memory is detected to be complete, the current system advanced configuration and power interface status are obtained.

[0009] When the current system advanced configuration and power interface status are determined to be in the state of all devices being off, the control auxiliary power signal and the device all-off power reserve signal are disabled to clear the global reset status record;

[0010] When both the auxiliary power signal and the device-wide power-off hold signal are detected to be disabled, the upgraded basic input / output system firmware in the flash memory is refreshed to the synchronous static random access memory.

[0011] In some embodiments of this application, after flashing the upgraded Basic Input / Output System firmware from flash memory to synchronous static random access memory, the method further includes:

[0012] The control auxiliary power signal and the power-off retention signal for all equipment are switched from the disabled state to the enabled state.

[0013] In some embodiments of this application, the control auxiliary power signal and the device all power off retention signal are in an enabled state, including:

[0014] The control auxiliary power signal and the signal for all equipment power off remain at a low level.

[0015] Accordingly, when both the auxiliary power signal and the device-wide power-off hold signal are detected to be disabled, the upgraded basic input / output system firmware in the flash memory is refreshed to the synchronous static random access memory, including:

[0016] When both the auxiliary power signal and the power-off hold signal are detected to be low, the upgraded basic input / output system firmware in the flash memory is refreshed to the synchronous static random access memory.

[0017] Correspondingly, the control auxiliary power signal and the equipment all-off power reserve signal transition from the disabled state to the enabled state, including:

[0018] The control auxiliary power signal and the power-off reserve signal for all equipment switch from a low level to a high level.

[0019] In some embodiments of this application, the control of the auxiliary power supply signal and the device all-off power reserve signal to transition from a low level state to a high level state includes:

[0020] The duration for which the auxiliary power signal and the power-off retention signal remain at a low level are statistically analyzed to obtain the statistical duration.

[0021] When the statistical duration reaches the preset duration, the control auxiliary power signal and the power-off retention signal of all equipment switch from a low level to a high level.

[0022] In some embodiments of this application, after obtaining the current system advanced configuration and power interface status, the method further includes:

[0023] When the current system advanced configuration and power interface status are determined to be in the working state, the preset upgrade flag is changed from the disabled state to the enabled state.

[0024] In some embodiments of this application, after changing the preset upgrade flag from a disabled state to an enabled state, the method further includes:

[0025] Monitor the current system advanced configuration and power interface status;

[0026] When the system detects that the current advanced configuration and power interface status has changed from the working state to the device all-off state, the step of controlling the auxiliary power signal and the device all-off power reserve signal to be disabled is executed.

[0027] In some embodiments of this application, it also includes:

[0028] If the current system advanced configuration and power interface status changes from the device being completely off to the working state during the firmware flashing to synchronous static random access memory, the preset upgrade operation statistics flag will be changed from the disabled state to the enabled state.

[0029] The number of upgrade operations is counted to obtain the count result.

[0030] In some embodiments of this application, when the current system advanced configuration and power interface status are determined to be a fully powered-off state, the control auxiliary power signal and the fully powered-off power reserve signal are disabled, including:

[0031] When it is determined that the current system advanced configuration and power interface status are all devices in a powered-off state, obtain the upgrade operation statistics flag bit;

[0032] When the upgrade operation statistics flag is enabled, obtain the count result;

[0033] Determine whether the counting result is greater than or equal to a preset value;

[0034] If the count result is less than the preset value, then the step of controlling the auxiliary power supply signal and keeping the power supply of all equipment in the off state is executed.

[0035] If the count result is greater than or equal to the preset value, an error message indicating an abnormality in the upgrade process will be output.

[0036] In some embodiments of this application, it also includes:

[0037] When it is detected that the upgraded basic input / output system firmware in flash memory has been successfully flashed to synchronous static random access memory, the upgrade flag and upgrade operation statistics flag are both switched from enabled to disabled, and the count result is cleared to zero.

[0038] In some embodiments of this application, when it is detected that the basic input / output system firmware upgrade in the flash memory is complete, the current system advanced configuration and power interface status are obtained, including:

[0039] When a system management interrupt is detected to have completed the firmware upgrade of the basic input / output system in flash memory, the current system advanced configuration and power interface status are obtained.

[0040] In some embodiments of this application, when it is detected that the basic input / output system firmware upgrade in the flash memory is complete, the current system advanced configuration and power interface status are obtained, including:

[0041] When the baseboard management controller detects that it has completed refreshing the new version of the basic input / output system firmware to the flash memory, the current system advanced configuration and power interface status are obtained.

[0042] In some embodiments of this application, after flashing the upgraded Basic Input / Output System firmware from flash memory to synchronous static random access memory, the method further includes:

[0043] When the system detects that the current advanced configuration and power interface status have changed from a fully powered-off state to a powered-on state, the control server runs based on the newly refreshed version of the basic input / output system firmware.

[0044] A firmware flashing device, comprising:

[0045] Memory, used to store computer programs;

[0046] A processor is used to execute computer programs to implement the steps of the firmware flashing method described above.

[0047] A computer non-volatile readable storage medium stores a computer program, which, when executed by a processor, implements the steps of the firmware flashing method described above.

[0048] A computer program product includes a computer program that, when executed by a processor, implements the steps of the aforementioned firmware flashing method.

[0049] The firmware flashing method provided in this application, when detecting that the basic input / output system firmware upgrade in the flash memory is complete, obtains the current system advanced configuration and power interface status; when determining that the current system advanced configuration and power interface status is a device-all-off state, controls the auxiliary power signal and the device-all-off power reserve signal to be in an enabled state to clear the global reset status record; when detecting that both the auxiliary power signal and the device-all-off power reserve signal are in an enabled state, flashes the upgraded basic input / output system firmware in the flash memory to the synchronous static random access memory.

[0050] The beneficial effect of this application is that, when the firmware upgrade of the Basic Input / Output System (BIOS) in the flash memory is detected to be complete, and when the current system advanced configuration and power interface status are determined to be in a fully powered-off state, the auxiliary power signal and the fully powered-off power reserve signal are disabled, thereby clearing the global reset status record. This informs the CPU that the auxiliary power signal and the fully powered-off power reserve signal are in an unready state, and also informs the synchronous static random access memory (SRAM) that the BIOS firmware needs to be refreshed from the flash memory again. This achieves the effect of a power outage restart without requiring manual unplugging and replugging of the power cord, thus enabling BIOS firmware upgrades without power interruption, saving labor costs and avoiding impact on current system operations.

[0051] Accordingly, this application also provides a firmware flashing device, a computer non-volatile readable storage medium, and a computer program product corresponding to the above firmware flashing method, which have the above-mentioned technical effects, and will not be described in detail here. Attached Figure Description

[0052] To more clearly illustrate the technical solutions in the embodiments or related technologies of this application, the accompanying drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0053] Figure 1 is a flowchart illustrating the implementation of a firmware flashing method in some embodiments of this application;

[0054] Figure 2 is a flowchart illustrating the implementation of another firmware flashing method in some embodiments of this application;

[0055] Figure 3 is a structural block diagram of a firmware flashing device in some embodiments of this application;

[0056] Figure 4 is a structural block diagram of a firmware flashing device in some embodiments of this application;

[0057] Figure 5 is a schematic diagram of the specific structure of a firmware flashing device provided in some embodiments of this application. Detailed Implementation

[0058] To enable those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments. Obviously, the described embodiments are merely some embodiments of the present application, and not all embodiments. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0059] Referring to Figure 1, which is a flowchart of an implementation of a firmware flashing method in some embodiments of this application, the method may include the following steps:

[0060] S101: When the firmware upgrade of the basic input / output system in the flash memory is detected to be complete, obtain the current system advanced configuration and power interface status.

[0061] The system monitors the firmware upgrade status of the Basic Input / Output System (BIOS) in the flash memory. When the firmware upgrade is detected as complete, the system obtains the current Advanced Configuration and Power Interface (ACPI) status. The ACPI status can include both the device being completely off (S5 state) and the device being operational (S0 state).

[0062] S102: When the current system advanced configuration and power interface status are determined to be in the state of all devices being off, the control auxiliary power signal and the device all power off reserve signal are disabled to clear the global reset status record.

[0063] After obtaining the current system advanced configuration and power interface status, if it is determined that the current system advanced configuration and power interface status is that all devices are off, it means that the basic input / output system firmware in the synchronous static random access memory can be refreshed based on the new version of the basic input / output system firmware in the flash memory. This controls the auxiliary power signal (AUX_PWRGOOD) and the device all-off power reserve signal (S5_PWR_RETAINED) to be in an enabled state, thereby informing the central processing unit that the auxiliary power signal and the device all-off power reserve signal are in an unready state, and informing the synchronous static random access memory that it needs to refresh the basic input / output system firmware from the flash memory again, thereby clearing the global reset status record and avoiding service shutdown.

[0064] S103: When the auxiliary power signal and the device all-off power reserve signal are both detected to be in an disabled state, the upgraded basic input / output system firmware in the flash memory is refreshed to the synchronous static random access memory.

[0065] After disabling both the auxiliary power signal and the "all devices off power reserve" signal, the system checks whether both signals are disabled. If both are disabled, the system achieves a power-off restart without requiring manual unplugging or replugging of the power cord. The upgraded Basic Input / Output System (BIOS) firmware is then flashed from the flash memory to the Synchronous Static Random Access Memory (SRAM). This allows for firmware upgrades without power interruption, saving labor costs and avoiding disruption to current system operations.

[0066] As can be seen from the above technical solution, when the firmware upgrade of the Basic Input / Output System (BIOS) in the flash memory is detected to be complete, and when the current system advanced configuration and power interface status are determined to be in a fully powered-off state, the auxiliary power signal and the fully powered-off power reserve signal are disabled, thereby clearing the global reset status record. This informs the CPU that the auxiliary power signal and the fully powered-off power reserve signal are not ready, and also informs the synchronous static random access memory (SRAM) to refresh the BIOS firmware from the flash memory. This achieves the effect of a power outage restart without requiring manual unplugging and replugging of the power cord, thus enabling BIOS firmware upgrades without power interruption, saving labor costs and avoiding impact on current system operations.

[0067] It should be noted that, based on the above embodiments, this application also provides corresponding improvement solutions. In subsequent embodiments, steps that are the same as or corresponding to those in the above embodiments can be referred to each other, and the corresponding beneficial effects can also be referred to each other. These improvements will not be elaborated upon in the following improved embodiments.

[0068] Referring to Figure 2, which is a flowchart of another firmware flashing method in some embodiments of this application, the method may include the following steps:

[0069] S201: When the firmware upgrade of the basic input / output system in the flash memory is detected to be complete, obtain the current system advanced configuration and power interface status.

[0070] The firmware version information of the Basic Input / Output System (BIOS) in the flash memory can be detected at preset time intervals or in real time to obtain the first BIOS firmware version information and the pre-stored second BIOS firmware version information. It is then determined whether the first and second BIOS firmware version information are consistent. If they are consistent, it indicates that the BIOS firmware in the flash memory has not been upgraded and no action is required. If they are inconsistent, it indicates that the BIOS firmware in the flash memory has been upgraded. Next, when the conditions for upgrading the BIOS firmware in the Synchronous Static Random Access Memory (SRAM) are met, the firmware in the SRAM should be upgraded. By detecting the firmware upgrade status of the BIOS in the flash memory based on firmware version comparison, accurate and rapid detection of the firmware upgrade status in the flash memory is achieved.

[0071] S202: When it is determined that the current system advanced configuration and power interface status is that all devices are off, the control auxiliary power signal and the device all-off power reserve signal are disabled to clear the global reset status record.

[0072] S203: When the auxiliary power signal and the device all-off power reserve signal are both detected to be in an enabled state, refresh the upgraded basic input / output system firmware in the flash memory to the synchronous static random access memory.

[0073] S204: The control auxiliary power supply signal and the power-off retention signal for all equipment are switched from the disabled state to the enabled state.

[0074] After the upgraded Basic Input / Output System (BIOS) firmware in flash memory is flashed to synchronous static random access memory (SRAM), the auxiliary power signal and the device-all-power-off reserve signal are switched from disabled to enabled. This promptly informs the CPU that the auxiliary power signal and the device-all-power-off reserve signal are ready, and that the BIOS firmware flashing in SRAM is complete.

[0075] S205: When the current system advanced configuration and power interface status are detected to change from the device all-off state to the working state, the control server runs based on the refreshed new version of the basic input / output system firmware.

[0076] After updating the basic input / output (BIO) firmware from flash memory to synchronous static random access memory (SRAM), the control server operates based on the updated BIO firmware when the system's advanced configuration and power interface status are detected to have changed from a fully powered-off state to an operational state. This enables the server to run on the updated BIO firmware, allowing for firmware upgrades without power interruption, saving labor costs and improving firmware update efficiency.

[0077] In some embodiments of this application, setting the control auxiliary power signal and the device all power off retention signal to an enabled state may include the following steps:

[0078] The control auxiliary power signal and the signal for all equipment power off remain at a low level.

[0079] Accordingly, when both the auxiliary power signal and the device-wide power-off hold signal are detected to be disabled, the upgraded basic input / output system firmware in the flash memory is flashed to the synchronous static random access memory, which may include the following steps:

[0080] When both the auxiliary power signal and the power-off hold signal are detected to be low, the upgraded basic input / output system firmware in the flash memory is refreshed to the synchronous static random access memory.

[0081] Accordingly, the transition of the control auxiliary power signal and the equipment all-off power-reservation signal from the disabled state to the enabled state may include the following steps:

[0082] The control auxiliary power signal and the power-off reserve signal for all equipment switch from a low level to a high level.

[0083] When the current system advanced configuration and power interface status are determined to be in a fully powered-off state, it indicates that the basic input / output (BIO) firmware in the synchronous static random access memory (SRAM) can be refreshed based on the new version of the BIO firmware in the flash memory. This controls the auxiliary power signal and the fully powered-off power reserve signal to a low level, informing the CPU that these signals are not ready and that the SRAM needs to refresh the BIO firmware from the flash memory. When both the auxiliary power signal and the fully powered-off power reserve signal are detected to be low, it indicates that a power-off restart has been achieved, but no manual unplugging or replugging of the power cord is required. The upgraded BIO firmware in the flash memory is then refreshed to the SRAM. After refreshing the upgraded BIO firmware from the flash memory to the SRAM, the auxiliary power signal and the fully powered-off power reserve signal are switched from low to high. This promptly informs the CPU that the auxiliary power signal and the fully powered-off power reserve signal are ready, and that the BIO firmware refresh in the SRAM is complete. The auxiliary power signal and the device all-off power reserve signal are generally in a high-level state. By setting the low-level state of the auxiliary power signal and the low-level state of the device all-off power reserve signal as the trigger conditions for refreshing the basic input / output system firmware in the synchronous static random access memory, the system can easily and accurately identify the firmware refresh timing, thus improving the firmware refresh accuracy.

[0084] Once the firmware upgrade of the Basic Input / Output System (BIOS) in the flash memory is complete, an execution command to upgrade the BIOS firmware in the Synchronous Static Random Access Memory (SRAM) can be sent to the Baseboard Management Controller (BMC) via the Intelligent Platform Management Interface (IPMI). After receiving the execution command, the BMC sends a command to the Complex Programmable Logic Device (CPLD) via the Inter-Integrated Circuit (I2C) bus. Upon receiving the command, the CPLD recognizes that the system state is all devices off and controls the auxiliary power signal and the device all-off power-reservation signal to a low level.

[0085] In some embodiments of this application, the transition of the control auxiliary power signal and the device all-off power reserve signal from a low level to a high level may include the following steps:

[0086] Step 1: Statistically analyze the duration of the auxiliary power signal and the power-off retention signal of all equipment remaining at a low level to obtain the statistical duration;

[0087] Step 2: When the statistical duration reaches the preset duration, the control auxiliary power signal and the power-off retention signal of all equipment are switched from low level to high level.

[0088] For ease of description, the two steps above can be combined for explanation.

[0089] After controlling the auxiliary power signal and the device all-off power-reservation signal to a low level, the duration for which these signals remain low is recorded. When the recorded duration reaches a preset value, the auxiliary power signal and the device all-off power-reservation signal are switched from a low level to a high level. By automatically switching these signals from low to high based on duration statistics, the firmware update is completed while simultaneously and automatically reverting them to their previous state without manual intervention, saving manpower and improving the user experience.

[0090] It should be noted that the preset duration can be set and adjusted according to the actual situation. For example, the preset duration can be set and adjusted according to the time required from the control auxiliary power signal and the device power-off retention signal being in a low-level state until the firmware refresh is completed. This application embodiment does not limit this.

[0091] In some embodiments of this application, after obtaining the current system advanced configuration and power interface status, the method may further include the following steps:

[0092] When the current system advanced configuration and power interface status are determined to be in the working state, the preset upgrade flag is changed from the disabled state to the enabled state.

[0093] After obtaining the current system advanced configuration and power interface status, if the current system advanced configuration and power interface status are determined to be in an active state, it indicates that the firmware in the synchronous static random access memory (SRAM) cannot be updated based on the new version of the SRAM firmware in the flash memory. The preset upgrade flag is then changed from disabled to enabled. By pre-setting the upgrade flag to indicate that the firmware in the SRAM needs to be updated, an effective flag for firmware updates is established. This facilitates timely firmware updates when the system advanced configuration and power interface status change to a fully powered-off state, by recognizing the upgrade flag.

[0094] In some embodiments of this application, after changing the preset upgrade flag from a disabled state to an enabled state, the method may further include the following steps:

[0095] Step 1: Monitor the current system advanced configuration and power interface status;

[0096] Step 2: When the current system advanced configuration and power interface status are detected to change from working state to device all-off state, execute the step of controlling the auxiliary power signal and the device all-off power reserve signal to be in an enabled state.

[0097] For ease of description, the two steps above can be combined for explanation.

[0098] After switching the preset upgrade flag from disabled to enabled, the system monitors the current advanced configuration and power interface status. When the status changes from active to fully powered off, the auxiliary power signal and the fully powered-off reserved signal are disabled, thus initiating firmware updates. By monitoring the current advanced configuration and power interface status after switching the preset upgrade flag, timely firmware update timing is achieved, improving firmware update efficiency.

[0099] In some embodiments of this application, the method may further include the following steps:

[0100] Step 1: If the current system advanced configuration and power interface status changes from the device being completely off to the working state during the firmware flashing to the synchronous static random access memory, then the preset upgrade operation statistics flag will be changed from the disabled state to the enabled state.

[0101] Step 2: Count the number of upgrade operations and obtain the count result.

[0102] For ease of description, the two steps above can be combined for explanation.

[0103] If, during the firmware update to synchronous static random access memory (SRAM), the current system advanced configuration and power interface status changes from a fully powered-off state to a powered-on state, it indicates that the firmware update process has been interrupted. In this case, the pre-set upgrade operation statistics flag is switched from disabled to enabled, and the number of upgrade operations is counted. This upgrade operation statistics flag indicates that the basic input / output system firmware has been updated, but the update process was interrupted and incomplete. This allows both the system and the user to promptly monitor the firmware update status based on the upgrade operation statistics flag. Counting the number of upgrade operations allows users to quickly identify the number of times the firmware update was incomplete and take timely countermeasures based on the count results.

[0104] In some embodiments of this application, when it is determined that the current system advanced configuration and power interface status is a device all-off state, the control auxiliary power signal and the device all-off power reserve signal are disabled, which may include the following steps:

[0105] Step 1: When it is determined that the current system advanced configuration and power interface status are all devices in a powered-off state, obtain the upgrade operation statistics flag bit;

[0106] Step 2: When the upgrade operation statistics flag is enabled, obtain the counting result;

[0107] Step 3: Determine if the counting result is greater than or equal to the preset value. If the counting result is less than the preset value, proceed to Step 4. If the counting result is greater than or equal to the preset value, proceed to Step 5.

[0108] Step 4: Control the auxiliary power supply signal and ensure all equipment power is off, keeping the signal in an enabled state;

[0109] Step 5: Output error messages during the upgrade process.

[0110] For ease of description, the five steps above can be combined for explanation.

[0111] When the current system advanced configuration and power interface status are determined to be in a fully powered-off state, the upgrade operation statistics flag is retrieved. When the upgrade operation statistics flag is enabled, the count result is retrieved, and it is determined whether the count result is greater than or equal to a preset value. If the count result is less than the preset value, it indicates that the number of firmware update failures is within the normal range, and the auxiliary power signal and the fully powered-off power reserve signal are disabled. If the count result is greater than or equal to the preset value, it indicates that the number of firmware update failures is within the abnormal range, possibly due to a system malfunction causing the firmware update failure, and an upgrade process error message is output. By setting an upper limit for the number of upgrade operation statistics, when the upper limit is exceeded, an upgrade process error message is output, thereby notifying the user of a firmware update error and facilitating timely troubleshooting.

[0112] It should be noted that the preset value can be set and adjusted according to the actual situation. This application embodiment does not limit this, such as it can be set to 3.

[0113] In some embodiments of this application, the method may further include the following steps:

[0114] When it is detected that the upgraded basic input / output system firmware in flash memory has been successfully flashed to synchronous static random access memory, the upgrade flag and upgrade operation statistics flag are both switched from enabled to disabled, and the count result is cleared to zero.

[0115] When the successful flashing of the upgraded Basic Input / Output System (BIOS) firmware from flash memory to synchronous static random access memory (SRAM) is detected, the firmware flashing task is considered complete. The upgrade flag and upgrade operation statistics flag are then switched from enabled to disabled, and the count is reset to zero. By promptly switching the upgrade flag and upgrade operation statistics flag from enabled to disabled and resetting the count to zero after successfully flashing the BIOS firmware to SRAM, interference with subsequent firmware flashing tasks is avoided, ensuring accurate recording of the firmware flashing status.

[0116] In some embodiments of this application, when it is detected that the basic input / output system firmware upgrade in the flash memory is complete, obtaining the current system advanced configuration and power interface status may include the following steps:

[0117] When a system management interrupt is detected to have completed the firmware upgrade of the basic input / output system in flash memory, the current system advanced configuration and power interface status are obtained.

[0118] When the system management interrupt is triggered to complete the firmware upgrade of the Elementary Input / Output System (Elementary I / O) in flash memory, the current system advanced configuration and power interface status are obtained. In-band firmware upgrades for the Elementary I / O system are achieved by triggering a system management interrupt to upgrade the Elementary I / O firmware in flash memory.

[0119] In some embodiments of this application, when it is detected that the basic input / output system firmware upgrade in the flash memory is complete, obtaining the current system advanced configuration and power interface status may include the following steps:

[0120] When the baseboard management controller detects that it has completed refreshing the new version of the basic input / output system firmware to the flash memory, the current system advanced configuration and power interface status are obtained.

[0121] When the Baseboard Management Controller (BMC) detects that it has completed flashing the new version of the Basic Input / Output System (BIOS) firmware to flash memory, the current system advanced configuration and power interface status are obtained. By utilizing the BMC to flash the new version of the BIOS firmware, out-of-band upgrades of the BIOS firmware are achieved. For example, remote management and upgrades of the BIOS firmware can be performed via Internet Protocol (IP), improving the user experience.

[0122] Corresponding to the above method embodiments, this application also provides a firmware flashing device, and the firmware flashing device described below can be referred to in correspondence with the firmware flashing method described above.

[0123] Referring to Figure 3, which is a structural block diagram of a firmware flashing device in some embodiments of this application, the device may include:

[0124] The advanced configuration and power interface status acquisition module 31 is used to acquire the current system advanced configuration and power interface status when it is detected that the basic input / output system firmware upgrade in the flash memory is complete.

[0125] The signal status control module 32 is used to control the auxiliary power signal and the device all-off power reserve signal to be disabled when it is determined that the current system advanced configuration and power interface status is the device all-off state, so as to clear the global reset status record.

[0126] The firmware refresh module 33 is used to refresh the upgraded basic input / output system firmware in the flash memory to the synchronous static random access memory when the auxiliary power signal and the device all power off retention signal are both in an disabled state.

[0127] As can be seen from the above technical solution, when the firmware upgrade of the Basic Input / Output System (BIOS) in the flash memory is detected to be complete, and when the current system advanced configuration and power interface status are determined to be in a fully powered-off state, the auxiliary power signal and the fully powered-off power reserve signal are disabled, thereby clearing the global reset status record. This informs the CPU that the auxiliary power signal and the fully powered-off power reserve signal are not ready, and also informs the synchronous static random access memory (SRAM) to refresh the BIOS firmware from the flash memory. This achieves the effect of a power outage restart without requiring manual unplugging and replugging of the power cord, thus enabling BIOS firmware upgrades without power interruption, saving labor costs and avoiding impact on current system operations.

[0128] In some embodiments of this application, the device may further include:

[0129] The signal conversion module is used to switch the control auxiliary power signal and the device power-off reserved signal from the disabled state to the enabled state after the upgraded basic input / output system firmware in the flash memory is flashed to the synchronous static random access memory.

[0130] In some embodiments of this application, the signal status control module 32 is specifically a module that controls the auxiliary power signal and the device power-off retention signal to be in a low-level state;

[0131] The firmware refresh module 33 is specifically a module that refreshes the upgraded basic input / output system firmware in the flash memory to the synchronous static random access memory when the auxiliary power signal and the device power-off retention signal are both in a low-level state.

[0132] The signal conversion module is specifically designed to switch the control auxiliary power signal and the power-off retention signal of all equipment from a low level to a high level.

[0133] In some embodiments of this application, the signal conversion module includes:

[0134] The statistical duration acquisition submodule is used to statistically analyze the duration of the auxiliary power signal and the power-off retention signal of all equipment in a low-level state to obtain the statistical duration.

[0135] The level state transition submodule is used to control the auxiliary power signal and the power-off retention signal of all equipment to transition from a low level to a high level when the statistical duration reaches the preset duration.

[0136] In some embodiments of this application, the device may further include:

[0137] The upgrade flag state conversion module is used to change the preset upgrade flag from the disabled state to the enabled state when the current system advanced configuration and power interface state are determined to be in the working state after obtaining the current system advanced configuration and power interface state.

[0138] In some embodiments of this application, the device may further include:

[0139] The advanced configuration and power interface status monitoring module is used to monitor the current system advanced configuration and power interface status after the preset upgrade flag is changed from the disabled state to the enabled state.

[0140] Specifically, the signal status control module 32 is a module that controls the auxiliary power signal and the device all-off power reserve signal to be in an enabled state when it detects that the current system advanced configuration and power interface status has changed from the working state to the device all-off state.

[0141] In some embodiments of this application, the device may further include:

[0142] The upgrade operation statistics flag state transition module is used to change the preset upgrade operation statistics flag from the disabled state to the enabled state if the current system advanced configuration and power interface state changes from the device all-off state to the working state during the firmware flashing to synchronous static random access memory.

[0143] The counting result acquisition module is used to count the number of upgrade operations and obtain the counting result.

[0144] In some embodiments of this application, the signal status control module 32 includes:

[0145] The upgrade operation statistics flag acquisition submodule is used to acquire the upgrade operation statistics flag when it is determined that the current system advanced configuration and power interface status are all devices in the off state.

[0146] The counting result acquisition submodule is used to acquire the counting result when the upgrade operation statistics flag is enabled.

[0147] The judgment submodule is used to determine whether the counting result is greater than or equal to a preset value;

[0148] The signal status control submodule is used to control the auxiliary power signal and the power-off signal of all equipment to be in an enabled state when the count result is determined to be less than the preset value.

[0149] The prompt message output submodule is used to output an abnormal prompt message during the upgrade process when the count result is greater than or equal to a preset value.

[0150] In some embodiments of this application, the device may further include:

[0151] The counting result clearing module is used to change both the upgrade flag and the upgrade operation statistics flag from the enabled state to the disabled state and clear the counting result when it detects that the upgraded basic input / output system firmware in the flash memory has been successfully refreshed to the synchronous static random access memory.

[0152] In some embodiments of this application, the advanced configuration and power interface status acquisition module 31 is specifically a module that acquires the current advanced configuration and power interface status of the system when it detects that a system management interrupt has been triggered to complete the upgrade of the basic input / output system firmware in the flash memory.

[0153] In some embodiments of this application, the advanced configuration and power interface status acquisition module 31 is specifically a module that acquires the current system advanced configuration and power interface status when it detects that the baseboard management controller has completed refreshing the new version of the basic input / output system firmware to the flash memory.

[0154] In some embodiments of this application, the device may further include:

[0155] The operation control module is used to control the server based on the refreshed version of the basic input / output system firmware when the current system advanced configuration and power interface status are detected to change from the device all-off state to the working state.

[0156] Corresponding to the above method embodiments, referring to Figure 4, Figure 4 is a schematic diagram of the firmware flashing device provided in this application, which may include:

[0157] Memory 332 is used to store computer programs;

[0158] The processor 322 is used to implement the firmware flashing method steps of the above method embodiments when executing a computer program.

[0159] Specifically, please refer to Figure 5, which is a schematic diagram of the specific structure of a firmware flashing device provided in some embodiments of this application. This firmware flashing device can vary significantly due to different configurations or performance. It may include a processor (central processing unit, CPU) 322 (e.g., one or more processors) and a memory 332. The memory 332 stores one or more computer programs 342 or data 344. The memory 332 can be temporary or persistent storage. The program stored in the memory 332 may include one or more modules (not shown in the figure), each module may include a series of instruction operations on the data processing device. Furthermore, the processor 322 may be configured to communicate with the memory 332 and execute the series of instruction operations in the memory 332 on the firmware flashing device 301.

[0160] The firmware flashing device 301 may also include one or more power supplies 326, one or more wired or wireless network interfaces 350, one or more input / output interfaces 358, and / or one or more operating systems 341.

[0161] The steps in the firmware flashing method described above can be implemented by the structure of the firmware flashing device.

[0162] Corresponding to the above method embodiments, this application also provides a computer non-volatile readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, it can perform the following steps:

[0163] When the firmware upgrade of the Basic Input / Output System (BIOS) in the flash memory is detected as complete, the current system advanced configuration and power interface status are obtained. When it is determined that the current system advanced configuration and power interface status is that all devices are off, the auxiliary power signal and the device all-off power reserve signal are disabled to clear the global reset status record. When it is detected that both the auxiliary power signal and the device all-off power reserve signal are disabled, the upgraded BIOS firmware in the flash memory is refreshed to the synchronous static random access memory.

[0164] The non-volatile readable storage medium for this computer may include: USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks or optical disks, and other media capable of storing program code.

[0165] For a description of the non-volatile readable storage medium provided in this application, please refer to the above method embodiments; further details will not be repeated here.

[0166] Corresponding to the above method embodiments, this application also provides a computer program product, including a computer program that, when executed by a processor, implements the steps of the firmware flashing method as described above.

[0167] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the devices, computer non-volatile readable storage media, and computer program products disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the descriptions are relatively simple, and relevant details can be found in the method section.

[0168] This document uses specific examples to illustrate the principles and implementation methods of this application. The descriptions of the above embodiments are only for the purpose of helping to understand the technical solutions and core ideas of this application. It should be noted that for those skilled in the art, several improvements and modifications can be made to this application without departing from the principles of this application, and these improvements and modifications also fall within the protection scope of this application.

Claims

1. A firmware flashing method, characterized in that, include: When the firmware upgrade of the basic input / output system in the flash memory is detected to be complete, the current system advanced configuration and power interface status are obtained. When the current system advanced configuration and power interface status are determined to be in a state where all devices are off, the control auxiliary power signal and the device all-off power reserve signal are disabled to clear the global reset status record. When both the auxiliary power signal and the device power-off reserved signal are detected to be in the disabled state, the upgraded basic input / output system firmware in the flash memory is refreshed to the synchronous static random access memory.

2. The firmware flashing method according to claim 1, characterized in that, After flashing the upgraded basic input / output system firmware in the flash memory to synchronous static random access memory, the process also includes: The auxiliary power signal and the device power off retention signal are switched from the disabled state to the enabled state.

3. The firmware flashing method according to claim 2, characterized in that, The control auxiliary power supply signal and the signal indicating that all equipment power is off are in an disabled state, including: The auxiliary power supply signal and the signal indicating that all devices are powered off are kept at a low level. Accordingly, when both the auxiliary power signal and the device power-off reserved signal are detected to be in the disabled state, the upgraded basic input / output system firmware in the flash memory is refreshed to the synchronous static random access memory, including: When both the auxiliary power signal and the device power-off retention signal are detected to be in a low-level state, the upgraded basic input / output system firmware in the flash memory is refreshed to the synchronous static random access memory. Accordingly, controlling the auxiliary power signal and the device's fully powered-off reserved signal to switch from the disabled state to the enabled state includes: The auxiliary power signal and the device power off reserve signal are switched from a low level to a high level.

4. The firmware flashing method according to claim 3, characterized in that, Controlling the auxiliary power signal and the device's fully powered-off reserved signal to transition from a low level to a high level includes: The duration for which the auxiliary power signal and the power-off retention signal of the device are in a low-level state is statistically analyzed to obtain the statistical duration. When the statistical duration reaches the preset duration, the auxiliary power signal and the device power-off retention signal are controlled to switch from a low level to a high level.

5. The firmware flashing method according to claim 1, characterized in that, After obtaining the current system advanced configuration and power interface status, the following is also included: When the current system advanced configuration and power interface status are determined to be in the working state, the preset upgrade flag is changed from the disabled state to the enabled state.

6. The firmware flashing method according to claim 5, characterized in that, After changing the preset upgrade flag from disabled to enabled, the following steps are also included: Monitor the current system advanced configuration and power interface status; When it is detected that the current system advanced configuration and power interface status has changed from the working state to the device all off state, the step of setting the control auxiliary power signal and the device all off power retention signal to the disabled state is executed.

7. The firmware flashing method according to claim 6, characterized in that, Also includes: If the current system advanced configuration and power interface status changes from the device being completely off to the working state during the firmware update to the synchronous static random access memory, then the preset upgrade operation statistics flag will be changed from the disabled state to the enabled state. The number of upgrade operations is counted to obtain the count result.

8. The firmware flashing method according to claim 7, characterized in that, When the current system advanced configuration and power interface status are determined to be in a fully powered-off state, the control auxiliary power signal and the fully powered-off power reserve signal are disabled, including: When it is determined that the current system advanced configuration and power interface status are all devices in a powered-off state, the upgrade operation statistics flag is obtained; When the upgrade operation statistics flag is enabled, the counting result is obtained; Determine whether the counting result is greater than or equal to a preset value; If the counting result is less than the preset value, then the step of keeping the control auxiliary power signal and the device power off retention signal in an enabled state is executed; If the counting result is greater than or equal to the preset value, an abnormal upgrade process prompt message will be output.

9. The firmware flashing method according to claim 8, characterized in that, Also includes: When it is detected that the upgraded basic input / output system firmware in the flash memory has been successfully flashed to the synchronous static random access memory, the upgrade flag and the upgrade operation statistics flag are both switched from the enabled state to the disabled state, and the count result is cleared to zero.

10. The firmware flashing method according to claim 1, characterized in that, When the firmware upgrade of the Basic Input / Output System (BIOS) in the flash memory is detected as complete, the current system advanced configuration and power interface status are obtained, including: When a system management interrupt is detected to have completed the firmware upgrade of the basic input / output system in the flash memory, the current system advanced configuration and power interface status are obtained.

11. The firmware flashing method according to claim 1, characterized in that, When the firmware upgrade of the Basic Input / Output System (BIOS) in the flash memory is detected as complete, the current system advanced configuration and power interface status are obtained, including: When the baseboard management controller detects that it has completed refreshing the new version of the basic input / output system firmware to the flash memory, the current system advanced configuration and power interface status are obtained.

12. The firmware flashing method according to claim 1, characterized in that, After flashing the upgraded basic input / output system firmware in the flash memory to synchronous static random access memory, the process also includes: When the current system advanced configuration and power interface status are detected to change from the device's fully off state to the working state, the control server runs based on the refreshed new version of the basic input / output system firmware.

13. The firmware flashing method according to claim 4, characterized in that, Also includes: The preset duration is set and adjusted based on the time required from the control auxiliary power signal and the device power-off retention signal being in a low-level state until the firmware update is completed.

14. The firmware flashing method according to claim 8, characterized in that, The preset value is set to 3.

15. The firmware flashing method according to claim 1, characterized in that, When the firmware upgrade of the Basic Input / Output System (BIOS) in the flash memory is detected as complete, the current system advanced configuration and power interface status are obtained, including: The version information of the basic input / output system firmware in the flash memory is detected at preset time intervals or in real time to obtain the first basic input / output system firmware version information. Retrieve the pre-stored second basic input / output system firmware version information; Determine whether the firmware version information of the first basic input / output system is consistent with the firmware version information of the second basic input / output system; If the firmware version information of the first basic input / output system is inconsistent with the firmware version information of the second basic input / output system, it is determined that the basic input / output system firmware upgrade in the flash memory is complete, and the current system advanced configuration and power interface status are obtained.

16. The firmware flashing method according to claim 15, characterized in that, Also includes: If the firmware version information of the first basic input / output system is consistent with the firmware version information of the second basic input / output system, then it is determined that the basic input / output system firmware in the flash memory has not been upgraded.

17. The firmware flashing method according to claim 1, characterized in that, The system's advanced configuration and power interface status include whether the devices are all off or running.

18. A firmware flashing device, characterized in that, include: Memory, configured to store computer programs; The processor is configured to implement the steps of the firmware flashing method as described in any one of claims 1 to 17 when executing the computer program.

19. A computer non-volatile readable storage medium, characterized in that, The computer non-volatile readable storage medium stores a computer program, which, when executed by a processor, implements the steps of the firmware flashing method as described in any one of claims 1 to 17.

20. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by the processor, it implements the steps of the firmware flashing method as described in any one of claims 1 to 17.

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