Current monitoring circuit and method, power supply chip, storage medium and electronic apparatus

Abstract

Provided in the present application are a current monitoring circuit and method, a power supply chip, a storage medium, an electronic apparatus and a program product. The circuit comprises: a plurality of power supply circuits configured to respectively supply power to a plurality of groups of memory modules comprised in a server; an amplifier; and a power supply chip. A non-inverting input terminal of the amplifier is connected, by means of a first monitoring link, to a current input terminal of each first voltage-dividing device comprised in the plurality of power supply circuits, and an inverting input terminal of the amplifier is connected to a current output terminal of each first voltage-dividing device by means of a second monitoring link; an output end of the amplifier is connected to the power supply chip; the power supply chip is configured to monitor currents of the plurality of power supply circuits; the plurality of groups of memory modules are distributed on multiple sides of a central processing unit comprised in the server; in any power supply circuit, the current input terminal of the first voltage-dividing device is connected to an input voltage, and the current output terminal of the first voltage-dividing device is connected to one group of memory modules.

Description

Current monitoring circuits, methods, power supply chips, storage media, and electronic devices

[0001] Cross-reference of related applications

[0002] This application claims priority to Chinese Patent Application No. 202510109448.5, filed on January 23, 2025, entitled "Current Monitoring Circuit, Method, Power Chip, Storage Medium and Electronic Device", the entire contents of which are incorporated herein by reference. Technical Field

[0003] This application relates to the field of computers, and in particular to a current monitoring circuit, method, power chip, storage medium, electronic device, and program product. Background Technology

[0004] In computer motherboards, space and wiring in the server memory power supply area are typically very limited. Because a single power supply circuit usually powers multiple memory modules surrounding the server's central processing unit (CPU), this circuit must pass through the side area of ​​the CPU, resulting in long power supply paths and a large amount of space occupied by the wiring. Summary of the Invention

[0005] This application provides a current monitoring circuit, method, power chip, storage medium, electronic device, and program product to at least solve the problems of long power supply circuits and large trace space occupied in related technologies.

[0006] According to one embodiment of this application, a current monitoring circuit is provided, comprising: multiple power supply circuits, an amplifier, and a power supply chip. The multiple power supply circuits supply power to multiple sets of memory modules included in a server. The non-inverting input terminal of the amplifier is connected to the current input terminal of each first voltage divider device included in the multiple power supply circuits via a first monitoring link. The inverting input terminal of the amplifier is connected to the current output terminal of each first voltage divider device via a second monitoring link. The output terminal of the amplifier is connected to the power supply chip, which is configured to monitor the current of the multiple power supply circuits. The multiple sets of memory modules are distributed on multiple sides of a central processing unit included in the server. In any power supply circuit, the current input terminal of the first voltage divider device is connected to the input voltage, and the current output terminal of the first voltage divider device is connected to a set of memory modules.

[0007] In one exemplary embodiment, the current monitoring circuit further includes a plurality of filtering circuits, wherein the plurality of filtering circuits are respectively configured to filter interference signals on each first monitoring link and each second monitoring link.

[0008] In an exemplary embodiment, for any one of the multiple filtering circuits: the filtering circuit includes a capacitor and a second voltage divider, wherein the second voltage divider is located in the monitoring link connected to the first voltage divider in the corresponding power supply circuit, and the capacitor is connected in parallel between the first monitoring link and the second monitoring link connected to the first voltage divider in the corresponding power supply circuit.

[0009] In one exemplary embodiment, the second voltage divider is located in the first monitoring link connected to the first voltage divider included in the corresponding power supply circuit; or, the second voltage divider is located in the second monitoring link connected to the first voltage divider included in the corresponding power supply circuit; or, there are multiple second voltage dividers, some of which are located in the first monitoring link connected to the first voltage divider included in the corresponding power supply circuit, and the remaining second voltage dividers are located in the second monitoring link connected to the first voltage divider included in the corresponding power supply circuit.

[0010] In an exemplary embodiment, the first end of the capacitor is connected to the current input terminal of the first voltage divider device included in the corresponding power supply circuit; the second end of the capacitor is connected to the current output terminal of the first voltage divider device included in the corresponding power supply circuit.

[0011] In one exemplary embodiment, the first end of the capacitor is connected to the non-inverting input of the amplifier; the second end of the capacitor is connected to the inverting input of the amplifier.

[0012] In one exemplary embodiment, the first voltage divider is positioned at the location where the sum of the physical path distances to each memory module included in the corresponding memory module group is minimized.

[0013] In an exemplary embodiment, the first voltage divider includes a current sensing resistor; the amplifier includes an operational amplifier, an adjustable gain amplifier, and a differential amplifier, wherein, when the amplifier is an adjustable gain amplifier, the gain of the adjustable gain amplifier is determined based on the current range to be monitored by the current monitoring circuit and the maximum input voltage range of the power supply chip.

[0014] In an exemplary embodiment, the current monitoring circuit further includes: a plurality of overvoltage protection circuits, each configured to provide overvoltage protection for each first voltage divider device. For any one of the plurality of overvoltage protection circuits: one end of the overvoltage protection circuit is connected to the current input terminal of the corresponding first voltage divider device, and the other end of the overvoltage protection circuit is connected to the current output terminal of the first voltage divider device. The overvoltage protection circuit includes at least one of the following: a Zener diode and a transient voltage suppression diode.

[0015] In one exemplary embodiment, the second voltage divider includes: a voltage divider with adjustable resistance; a first voltage divider; and / or, the second voltage divider is provided with a heat dissipation device.

[0016] According to another embodiment of this application, a current monitoring method is provided, applied in the aforementioned current monitoring circuit, comprising: acquiring a target voltage signal output by an amplifier, wherein the voltage signal is determined by the amplifier based on an initial voltage signal input by a first monitoring link and a second monitoring link; performing analog-to-digital conversion on the target voltage signal to obtain a target voltage value; and performing a rate conversion on the target voltage value to obtain the sum of currents of multiple power supply circuits.

[0017] According to another embodiment of this application, a power supply chip is also provided. The power supply chip is located in a current monitoring circuit, which further includes: multiple power supply circuits and an amplifier. The multiple power supply circuits supply power to multiple memory modules included in the server. The non-inverting input terminal of the amplifier is connected to the current input terminal of each first voltage divider device included in the multiple power supply circuits through a first monitoring link. The inverting input terminal of the amplifier is connected to the current output terminal of each first voltage divider device through a second monitoring link. The output terminal of the amplifier is connected to the power supply chip. The power supply chip is configured to monitor the current of the multiple power supply circuits. The blocks are distributed across multiple sides of the central processing unit in the server. In any power supply circuit, the current input terminal of the first voltage divider is connected to the input voltage, and the current output terminal of the first voltage divider is connected to a group of memory modules. The power supply chip includes: an acquisition module configured to acquire the target voltage signal output by the amplifier, wherein the voltage signal is determined by the amplifier based on the initial voltage signal input by the first monitoring link and the second monitoring link; a first conversion module configured to perform analog-to-digital conversion on the target voltage signal to obtain the target voltage value; and a second conversion module configured to perform rate conversion on the target voltage value to obtain the current sum of multiple power supply circuits.

[0018] According to yet another embodiment of this application, a computer-readable storage medium is also provided, in which a computer program is stored, wherein the computer program is configured to perform the steps in any of the above method embodiments when it is run.

[0019] According to yet another embodiment of this application, an electronic device is also provided, including a memory and a processor, wherein a computer program is stored in the memory and the processor is configured to run the computer program to perform the steps in any of the above method embodiments.

[0020] According to yet another embodiment of this application, a computer program product is also provided, including a computer program that, when executed by a processor, implements the steps in any of the above method embodiments.

[0021] This application solves the problem of long power supply paths and large wiring space occupied by power supply circuits in related technologies by providing power to multiple memory modules located on multiple sides of the server's central processing unit through multiple power supply circuits, thereby achieving the effect of shortening the power supply path length and saving wiring space. Attached Figure Description

[0022] Figure 1 is a schematic diagram of a current monitoring circuit according to an embodiment of this application;

[0023] Figure 2 is a schematic diagram of a current monitoring circuit according to an embodiment of this application;

[0024] Figure 3 is a hardware structure block diagram of a server device for a current monitoring method according to an embodiment of this application;

[0025] Figure 4 is a flowchart of a current monitoring method according to an embodiment of this application;

[0026] Figure 5 is a structural block diagram of a power chip according to an embodiment of this application. Detailed Implementation

[0027] The embodiments of this application will be described in detail below with reference to the accompanying drawings and examples.

[0028] It should be noted that the terms "first," "second," etc., in the specification, claims, and drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0029] This embodiment provides a current monitoring circuit. Figure 1 is a schematic diagram of a current monitoring circuit according to an embodiment of this application. As shown in Figure 1, the current monitoring circuit includes: multiple power supply circuits, an amplifier, and a power chip. The multiple power supply circuits supply power to multiple memory modules included in the server. The non-inverting input terminal of the amplifier is connected to the current input terminal of each first voltage divider device included in the multiple power supply circuits through a first monitoring link. The inverting input terminal of the amplifier is connected to the current output terminal of each first voltage divider device through a second monitoring link. The output terminal of the amplifier is connected to the power chip, which is configured to monitor the current of the multiple power supply circuits. The multiple memory modules are distributed on multiple sides of the central processing unit included in the server. In any power supply circuit, the current input terminal of the first voltage divider device is connected to the input voltage, and the current output terminal of the first voltage divider device is connected to a group of memory modules.

[0030] In the aforementioned current monitoring circuit, the power supply chip, for example, includes, but is not limited to: analog-to-digital converter chips, microcontrollers, digital signal processors, field-programmable gate arrays, sensor chips, and other chips capable of analog-to-digital conversion. For example, the analog-to-digital converter chip includes, but is not limited to: successive approximation analog-to-digital converter chips, ΔΣ analog-to-digital converter chips, etc.

[0031] Multiple memory modules are not limited to those distributed on both sides of the central processing unit (CPU) in the server, or distributed around the CPU in the server, etc., as shown in Figure 1. For example, the power monitoring circuit in this application is illustrated by taking multiple memory modules distributed on both sides of the CPU as an example: As shown in Figure 1, the power monitoring circuit includes two power supply circuits. The first voltage divider devices in the power supply circuits configured to supply power to the memory modules located on both sides of the CPU are current sensing resistors. Since the voltage drop across the current sensing resistor is much smaller than the input voltage of the power supply circuit, the input voltage of the power supply circuit (i.e., 12V_Input as shown in the figure) is directly regarded as the input voltage (12V_DIMM1) of the memory module. As shown in Figure 1, the non-inverting input terminal of the amplifier is connected to the current input terminal of the current sensing resistor, and the inverting input terminal of the amplifier is connected to the current output terminal of the current sensing resistor. The power chip determines the current value of the memory module in the server based on the voltage output by the amplifier. In the above embodiments, when the ratio of the input voltage of the power supply circuit to the voltage drop across the first voltage divider is greater than a predetermined threshold, the input voltage of the power supply circuit can be regarded as the input voltage of the memory module. The predetermined threshold includes, but is not limited to, 20, 50, 100, etc., and the predetermined threshold can be adjusted according to the application scenario.

[0032] In the current monitoring circuit of this embodiment, multiple power supply circuits are used to supply power to multiple memory modules located on multiple sides of the server's central processing unit. This solves the problem in related technologies where a single power supply circuit is used to supply power to memory modules on multiple sides of the central processing unit, resulting in a long power supply circuit path and a large amount of wiring space required because it needs to pass through the side area of ​​the central processing unit. This shortens the power supply path length and saves wiring space.

[0033] In an optional embodiment, the current monitoring circuit further includes a plurality of filtering circuits, wherein the plurality of filtering circuits are respectively configured to filter interference signals on each first monitoring link and each second monitoring link.

[0034] In the above embodiments, the filtering circuit is, for example, determined by means of the following methods: Step 1, determining the type of interference signal on the first monitoring link and the second monitoring link; Step 2, determining the type of filtering circuit according to the type of interference signal to be eliminated. For example, when the interference signal is mainly high-frequency noise, a low-pass filter is selected to form the power supply circuit. The low-pass filter can allow low-frequency normal current signals to pass through while filtering out high-frequency noise signals. When the interference signal includes components in a specific frequency range, a band-stop filter can be selected to form the power supply circuit. The band-stop filter can block signals in a specific frequency range from passing through while allowing signals of other frequencies to be transmitted normally; Step 3, determining the parameters of the filtering circuit of this type. For example, when a low-pass filter is selected to form the power supply circuit, the cutoff frequency of the low-pass filter is set according to the frequency range of the current signal of the current monitoring circuit. For example, when the frequency of the current signal at the current output terminal of the voltage divider is about 50Hz, the cutoff frequency of the low-pass filter can be set to about 100Hz, thereby achieving the filtering out of interference signals while ensuring the transmission of normal current signals. When selecting a band-stop filter to form the power supply circuit, the stopband frequency range of the band-stop filter is set according to the frequency range of the interference signal. For example, if the frequency range of the interference signal is 1kHz-2kHz, the stopband frequency range of the band-stop filter is set to 1kHz-2kHz. At the same time, it is also necessary to determine whether the attenuation of the filter can suppress the interference signal to a certain extent within the stopband frequency range. For example, the attenuation of the interference signal within the stopband frequency range should reach 40dB, so as to ensure that the interference signal is sufficiently suppressed without significantly affecting the current monitoring results. For example, the filtering circuit includes, but is not limited to, being located near the signal source of the monitoring link (e.g., the current output terminal of the first voltage divider). The filtering circuit may include one or more filters. In the case of multiple filters, the multiple filters may be connected in a cascaded manner. For example, when the interference signal includes high-frequency components and components within a specific frequency range, the low-pass filter circuit included in the filtering circuit can be connected to the monitoring link first to initially filter out the high-frequency interference. Then, the band-stop filter circuit included in the filtering circuit can be connected to the output terminal of the low-pass filter circuit to further filter out the interference signal within the specific frequency range, thereby achieving a more effective filtering effect.

[0035] In the above embodiments, by adding a filter circuit to each monitoring link, interference signals can be effectively removed, and the accuracy of current measurement can be improved.

[0036] In an optional embodiment, for any one of the multiple filtering circuits: the filtering circuit includes a capacitor and a second voltage divider, wherein the second voltage divider is located in the monitoring link connected to the first voltage divider in the corresponding power supply circuit, and the capacitor is connected in parallel between the first monitoring link and the second monitoring link connected to the first voltage divider in the corresponding power supply circuit.

[0037] In the above embodiments, Figure 2 is a schematic diagram of the current monitoring circuit according to an embodiment of this application. As shown in Figure 2, the power monitoring circuit includes two power supply circuits. The first voltage divider is R1 as shown in the figure. The current Sense1 loop of R1 flows through node 101, which is the SENSE1_P signal. The current Sense1 loop of R1 flows through node 102, which is the SENSE1_N signal. The second voltage divider is R2 as shown in the figure. The current Sense1 loop of R1 flows through node 201, which is the SENSE2_P signal. The current Sense1 loop of R1 flows through node 202, which is the SENSE2_N signal. Node 151 is the combined signal of nodes 101 and 201. Node 151 is connected to the non-inverting input terminal of the amplifier (U1 as shown in the figure). Node 152 is the combined signal of nodes 102 and 202. Node 152 is connected to the inverting input terminal of the amplifier. The output signal of the amplifier flows through node 103 and is output to the analog-to-digital converter receiver of the power chip. In the power supply circuit where R1 is located, C1 is a capacitor, and R4 and R6 are the second voltage divider devices. C1, R4 and R6 form a filter configured to reduce the influence of interference signals on the current Sense1. In the power supply circuit where R2 is located, C2 is a capacitor, and R3 and R5 are the second voltage divider devices. C2, R3 and R5 form a filter configured to reduce the influence of interference signals on the current Sense2.

[0038] In the above embodiments, by adding a capacitor and a second voltage divider device to the monitoring link, the filtering effect is enhanced and the accuracy of current monitoring is improved.

[0039] In one optional embodiment, the second voltage divider is located in the first monitoring link connected to the first voltage divider included in the corresponding power supply circuit; or, the second voltage divider is located in the second monitoring link connected to the first voltage divider included in the corresponding power supply circuit; or, there are multiple second voltage dividers, some of which are located in the first monitoring link connected to the first voltage divider included in the corresponding power supply circuit, and the remaining second voltage dividers are located in the second monitoring link connected to the first voltage divider included in the corresponding power supply circuit.

[0040] In the above embodiments, as shown in FIG2, taking the power supply circuit where R1 is located as an example, the distribution of the second voltage divider device is illustrated. The second voltage divider device includes, but is not limited to: only R4 shown in the figure, only R6 shown in the figure, and both R4 and R6.

[0041] In the above embodiments, by including multiple voltage dividers in the second voltage divider device, deploying some of the second voltage dividers in the first monitoring link and deploying the remaining second voltage dividers in the second monitoring link, two-stage filtering of the signal is achieved, which helps to reduce signal fluctuations and improve the stability and accuracy of current monitoring.

[0042] In an optional embodiment, the first end of the capacitor is connected to the current input terminal of the first voltage divider device included in the corresponding power supply circuit; the second end of the capacitor is connected to the current output terminal of the first voltage divider device included in the corresponding power supply circuit.

[0043] In the above embodiments, as shown in FIG2, taking the power supply circuit where R1 is located as an example, when the voltage divider device only includes R4 as shown in the figure, the first end of the capacitor is not limited to being located between node 101 and R4, and the second end of the capacitor is not limited to being located between node 102 and node 152; when the voltage divider device only includes R6 as shown in the figure, the first end of the capacitor is not limited to being located between node 101 and node 151, and the second end of the capacitor is not limited to being located between node 102 and R6; when the voltage divider device includes both R4 and R6 as shown in the figure, the first end of the capacitor is not limited to being located between node 101 and R4, and the second end of the capacitor is not limited to being located between node 102 and R6.

[0044] In an optional embodiment, the first terminal of the capacitor is connected to the non-inverting input terminal of the amplifier; the second terminal of the capacitor is connected to the inverting input terminal of the amplifier.

[0045] In the above embodiments, as shown in FIG2, taking the power supply circuit where R1 is located as an example, when the voltage divider device only includes R4 as shown in the figure, the first end of the capacitor is not limited to being located between node 151 and R4, and the second end of the capacitor is not limited to being located between node 102 and node 152; when the voltage divider device only includes R6 as shown in the figure, the first end of the capacitor is not limited to being located between node 101 and node 151, and the second end of the capacitor is not limited to being located between node 152 and R6; when the voltage divider device includes both R4 and R6 as shown in the figure, the first end of the capacitor is not limited to being located between node 151 and R4, and the second end of the capacitor is not limited to being located between node 152 and R6.

[0046] In an optional embodiment, the first voltage divider is positioned at the location where the sum of the physical path distances to each memory module included in the corresponding memory module group is minimized.

[0047] In this embodiment, by placing the first voltage divider at the position where the sum of the physical path distances to each memory module in its corresponding memory module group is minimized, the path length of the power supply circuit to the memory module is minimized, saving wiring space.

[0048] In an optional embodiment, the first voltage divider includes a current sensing resistor; the amplifier includes an operational amplifier, an adjustable gain amplifier, and a differential amplifier, wherein, when the amplifier is an adjustable gain amplifier, the gain of the adjustable gain amplifier is determined based on the current range to be monitored by the current monitoring circuit and the maximum input voltage range of the power supply chip.

[0049] In the above embodiments, the current sensing resistors in multiple power supply circuits can be the same or different. For example, the current sensing resistors include, but are not limited to: external current sensing resistors, internal current sensing resistors, metal foil-based resistors, foil-mounted resistors, electron beam welding resistors, etc. The resistance values ​​of the current sensing resistors include, but are not limited to: 0.1mΩ to 1mΩ, 0.2mΩ to 5mΩ, etc. The type and resistance value of the current sensing resistor can be selected according to different application scenarios. For example, the type and resistance value of the current sensing resistor can be determined based on the following factors: maximum current. The maximum current expected to flow through the current sensing resistor is the primary factor in selecting the current sensing resistor. The resistance value of the shunt resistor under the maximum current... The voltage drop must be within the measurement range of the power supply chip's voltage; power consumption and thermal management are crucial, as the current sensing resistor consumes power and generates heat during operation. Therefore, the selection of the current sensing resistor needs to consider power consumption and thermal management to avoid overheating, which could affect the stability and lifespan of the circuit; accuracy requirements must be considered when selecting the current sensing resistor, for example, a lower resistance value should be selected when high accuracy is required; system noise should be taken into account, and the resistance value should be determined based on the noise level of the environment where the server memory module is located, for example, a lower resistance value should be selected when the noise level of the environment is high; cost and availability are also important considerations; the gain of the current sensing amplifier; and ambient temperature, etc.

[0050] In the above embodiments, by employing an adjustable gain amplifier in the current monitoring circuit, the measurable current range can be flexibly adjusted according to monitoring requirements, thereby adapting to different monitoring needs and improving the accuracy of current monitoring. At the same time, by precisely controlling the amplifier gain, signal distortion during amplification can be reduced, thereby improving measurement accuracy.

[0051] In an optional embodiment, the current monitoring circuit further includes: a plurality of overvoltage protection circuits, each configured to provide overvoltage protection for each first voltage divider device. For any one of the plurality of overvoltage protection circuits: one end of the overvoltage protection circuit is connected to the current input terminal of the corresponding first voltage divider device, and the other end of the overvoltage protection circuit is connected to the current output terminal of the first voltage divider device. The overvoltage protection circuit includes at least one of the following: a Zener diode and a transient voltage suppression diode.

[0052] In the above embodiments, for example, when the overvoltage protection circuit includes a Zener diode, the Zener voltage of the Zener diode is higher than the input voltage of the first voltage divider device. For example, when the input voltage of the first voltage divider device is 12V, the Zener voltage of the Zener diode is 13V, 14V, 15V, etc.

[0053] In the above embodiments, by setting an overvoltage protection circuit on each first voltage divider device, damage to circuit components caused by overvoltage can be effectively prevented. Optionally, by deploying Zener diodes and transient voltage suppression diodes in the overvoltage protection circuit, the Zener diodes and TVS diodes included in the overvoltage protection circuit can have no effect on the normal operation of the circuit under normal operating voltage, but will quickly conduct when the voltage exceeds a preset value, clamping the excessive voltage within a safe range, thereby protecting the first voltage divider device from damage and improving the stability of the circuit under abnormal conditions.

[0054] In an optional embodiment, the second voltage divider includes: a voltage divider with adjustable resistance; a first voltage divider; and / or, the second voltage divider is provided with a heat dissipation device.

[0055] In the above embodiments, the voltage divider device with adjustable resistance includes, but is not limited to, potentiometers, adjustable resistors, etc. The heat dissipation device includes, but is not limited to, metal heat sinks, heat pipes, thermal pads, liquid cooling systems, fans, water-cooled plates, etc. The heat dissipation device can be determined according to the application scenario and the heat dissipation requirements of the first voltage divider device and the second voltage divider device. For example, when the component arrangement density in the server is high, a heat sink is selected as the heat dissipation device.

[0056] In the above embodiments, by installing heat dissipation devices on the first and second voltage dividers, the problem of device damage caused by the rise in temperature due to long-term load operation can be avoided, thus preventing damage to the devices due to excessive temperature, improving the stability of the voltage dividers and extending their lifespan.

[0057] The current monitoring circuit in this application will be described exemplarily below with reference to embodiments:

[0058] As shown in Figure 2, in this embodiment, the power monitoring circuit includes two power supply circuits. In the power supply circuit with R1 as the first voltage divider, node 101 carries the SENSE1_P signal of the current Sense1 loop of R1, and node 102 carries the SENSE1_N signal of the current Sense1 loop of R1. In the power supply circuit with R2 as the first voltage divider, node 201 carries the SENSE2_P signal of the current Sense1 loop of R1, and node 202 carries the SENSE2_N signal of the current Sense1 loop of R1. Node 151 is the combined signal of nodes 101 and 201, and is connected to the non-inverting input terminal of the amplifier (U1 in the figure). Node 152 is the combined signal of nodes 102 and 202, and is connected to the inverting input terminal of the amplifier. Node 103 carries the output signal of the amplifier and is output to the analog-to-digital converter receiver of the power chip. For example, in this embodiment, taking R1=R2=R, R3=R4, R5=R6, and the amplifier gain as β, the process of the power supply chip measuring the current of multiple power supply circuits is explained:

[0059] The formulas for calculating the current I1 flowing through R1 and the voltage difference ΔV1 across R1 are as follows:

[0060] Among them, V 101 V is the voltage at node 101. 102 This refers to the voltage at node 102;

[0061] The formulas for calculating the current I2 flowing through R2 and the voltage difference ΔV2 across R2 are as follows:

[0062] Among them, V 201 V is the voltage at node 201. 202 This refers to the voltage at node 202;

[0063] The total current flowing through the memory module is I = I1 + I2. The formula for calculating the total current I is as follows:

[0064] Voltage V at node 151 151 It is the average voltage of node 101 and node 201, V 151 The calculation formula is as follows:

[0065] Voltage V at node 152 152 It is the average voltage of node 102 and node 202, V 152 The calculation formula is as follows:

[0066] The voltage V at the output node 103 of the amplifier 301 The calculation formula is as follows:

[0067] The voltage V received by the power chip from the output of node 103 103 Then, an analog-to-digital conversion is performed, and the converted voltage value is multiplied by a factor of 2 / (β*R) to obtain the total current I of the power supply circuit after conversion. out I out The calculation formula is as follows:

[0068] As can be seen from the above, in this embodiment, the total current determined by the power chip is equal to the sum of the currents of the memory modules on both sides of the CPU (i.e., the sum of the currents of the power supply circuits of the memory modules), thereby enabling the effective calculation of the memory current without adding operational amplifiers and power chips.

[0069] This embodiment also provides a current monitoring method. The method embodiments provided in this application can be executed in a server device or a similar computing device. Taking running on a server device as an example, FIG3 is a hardware structure block diagram of a server device for the current monitoring method according to an embodiment of this application. As shown in FIG3, the server device may include one or more (only one is shown in FIG3) processors 302 (processors 302 may include, but are not limited to, microprocessors MCU (Microcontroller Unit) or programmable logic devices FPGA (Field Programmable Gate Array), etc.) and a memory 304 configured to store data. The server device may also include a transmission device 306 configured for communication functions and an input / output device 308. Those skilled in the art will understand that the structure shown in FIG3 is only illustrative and does not limit the structure of the server device. For example, the server device may also include more or fewer components than shown in FIG3, or have a different configuration than shown in FIG3.

[0070] The memory 304 can be configured to store computer programs, such as application software programs and modules, like the computer program corresponding to the current monitoring method in this embodiment. The processor 302 executes various functional applications and data processing by running the computer program stored in the memory 304, thereby implementing the aforementioned method. The memory 304 may include high-speed random access memory and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory 304 may further include memory remotely located relative to the processor 302, and these remote memories can be connected to server devices via a network. Examples of such networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof.

[0071] The transmission device 306 is configured to receive or transmit data via a network. Examples of such networks may include a wireless network provided by a communication provider for the server device. In one example, the transmission device 306 includes a Network Interface Controller (NIC), which can connect to other network devices via a base station to communicate with the Internet. In another example, the transmission device 306 may be a Radio Frequency (RF) module configured to communicate wirelessly with the Internet.

[0072] This embodiment provides a current monitoring method applied to the aforementioned current monitoring circuit. Figure 4 is a flowchart of the current monitoring method according to an embodiment of this application. As shown in Figure 4, the process includes the following steps:

[0073] Step S402: Obtain the target voltage signal output by the amplifier, wherein the voltage signal is determined by the amplifier based on the initial voltage signals input by the first monitoring link and the second monitoring link;

[0074] Step S404: Perform analog-to-digital conversion on the target voltage signal to obtain the target voltage value;

[0075] Step S406: Perform a rate conversion on the target voltage value to obtain the sum of currents for multiple power supply circuits.

[0076] The entities performing the above steps include, but are not limited to, analog-to-digital converters, chips equipped with analog-to-digital converters, etc. In the above steps, the target voltage value is determined based on the target voltage signal output by the amplifier, and the current of the power supply circuit is determined based on the target voltage value, thereby achieving accurate current measurement.

[0077] In an optional embodiment, the method further includes: determining the power consumption and distribution of each memory module in a plurality of memory modules in a server; determining a first average power consumption of the plurality of memory modules; dividing the plurality of memory modules into multiple groups of memory modules based on the power consumption and distribution of each memory module, wherein the absolute value of the difference between the average power consumption of each group of memory modules and the first average value is less than a first threshold, and the sum of the power consumption of each group of memory modules is less than a second threshold; and determining the power supply circuit for each group of memory modules.

[0078] The first threshold and the second threshold can be preset. The first threshold and the second threshold can be adjusted according to different application scenarios. The distribution method includes, but is not limited to: the position of each memory module, the positional relationship between each memory module and other memory modules (i.e., the positional relationship between multiple memory modules), and the positional relationship between each memory module and the central processing unit.

[0079] For example, the entities executing the above steps include, but are not limited to, server management systems, automated testing equipment, and other terminal devices capable of executing the above module grouping method. Optionally, the server management system can collect power consumption data and its location information within the server for each memory module through built-in hardware monitoring tools or dedicated management software. For example, it can use an Intelligent Platform Management Interface (IPMI) or a similar interface to obtain this data. The server management system analyzes the collected power consumption data to calculate the average power consumption of all memory modules. Power consumption data can be automatically collected at predetermined intervals. Based on the collected power consumption data and its distribution, the server management system can automatically divide the memory modules into multiple groups, ensuring that the difference between the average power consumption of each group and the overall average is within a set threshold. For example, the division of memory modules can be achieved through optimization algorithms (e.g., genetic algorithms, simulated annealing algorithms, etc.) deployed in the server management system. Optionally, automated testing equipment (ATE) can perform power consumption testing and location marking on each memory module during the production phase, thereby accurately recording the power consumption and location information of each memory module. The testing equipment automatically calculates the average power consumption of all tested memory modules and uploads the results to the central database. At the same time, it automatically divides the memory modules into groups according to a preset algorithm to ensure that the power consumption of each group meets the quality control standards.

[0080] In the above steps, by rationally grouping the memory modules based on their power consumption and distribution, it can be ensured that the power consumption of each group of memory modules is within a controllable range. This avoids problems such as system overload, overheating, or power instability caused by excessive power consumption of a single or multiple memory modules, thereby improving the stability and reliability of the entire server system. Optionally, by dividing the memory modules into multiple groups and ensuring that the difference between the average power consumption of each group and the overall average is within a set threshold, more refined power management can be achieved. This ensures more even power distribution, avoids power overload in certain areas, improves power utilization efficiency, and reduces energy waste. Furthermore, it allows for the grouping of high-power memory modules into different groups, thereby avoiding localized overheating, improving the overall system's heat dissipation efficiency, helping to extend the lifespan of memory modules, and reducing system failures caused by high temperatures.

[0081] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes several instructions to cause a terminal device (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods of the various embodiments of this application.

[0082] This embodiment also provides a power supply chip configured to implement the above embodiments and preferred embodiments, and details already described will not be repeated. As used below, the term "module" can refer to a combination of software and / or hardware that implements a predetermined function. Although the power supply chip described in the following embodiments is preferably implemented in software, hardware implementation, or a combination of software and hardware, is also possible and contemplated.

[0083] Figure 5 is a structural block diagram of a power supply chip according to an embodiment of this application. The power supply chip is located in a current monitoring circuit, which further includes multiple power supply circuits and an amplifier. The multiple power supply circuits supply power to multiple memory modules included in the server. The non-inverting input terminal of the amplifier is connected to the current input terminal of each first voltage divider device included in the multiple power supply circuits via a first monitoring link. The inverting input terminal of the amplifier is connected to the current output terminal of each first voltage divider device via a second monitoring link. The output terminal of the amplifier is connected to the power supply chip. The power supply chip is configured to monitor the current of the multiple power supply circuits. The multiple memory modules are distributed in the server. The central processing unit includes multiple sides. In any power supply circuit, the current input terminal of the first voltage divider device is connected to the input voltage, and the current output terminal of the first voltage divider device is connected to a set of memory modules. As shown in Figure 5, the power supply chip includes: an acquisition module 52, configured to acquire the target voltage signal output by the amplifier, wherein the voltage signal is determined by the amplifier based on the initial voltage signal input by the first monitoring link and the second monitoring link; a first conversion module 54, configured to perform analog-to-digital conversion on the target voltage signal to obtain the target voltage value; and a second conversion module 56, configured to perform rate conversion on the target voltage value to obtain the current sum of multiple power supply circuits.

[0084] It should be noted that the above modules can be implemented by software or hardware. For the latter, they can be implemented in the following ways, but are not limited to: all the above modules are located in the same processor; or, the above modules are located in different processors in any combination.

[0085] Embodiments of this application also provide a computer-readable storage medium storing a computer program, wherein the computer program is configured to perform the steps in any of the method embodiments described above when executed. The computer-readable storage medium may be a non-volatile readable storage medium.

[0086] In one exemplary embodiment, the aforementioned computer-readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard disk, magnetic disk, or optical disk.

[0087] Embodiments of this application also provide an electronic device, including a memory and a processor, wherein the memory stores a computer program and the processor is configured to run the computer program to perform the steps in any of the above method embodiments.

[0088] In one exemplary embodiment, the electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the processor and the input / output device is connected to the processor.

[0089] Embodiments of this application also provide a computer program product, which includes a computer program that, when executed by a processor, implements the steps in any of the above method embodiments.

[0090] Specific examples in this embodiment can be found in the examples described in the above embodiments and exemplary implementations, and will not be repeated here.

[0091] Obviously, those skilled in the art should understand that the modules or steps of this application described above can be implemented using general-purpose computing devices. They can be centralized on a single computing device or distributed across a network of multiple computing devices. They can be implemented using computer-executable program code, and thus can be stored in a storage device for execution by a computing device. In some cases, the steps shown or described can be performed in a different order than those presented here, or they can be fabricated as separate integrated circuit modules, or multiple modules or steps can be fabricated as a single integrated circuit module. Thus, this application is not limited to any particular combination of hardware and software.

[0092] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the principles of this application should be included within the protection scope of this application.

Claims

1. A current monitoring circuit, characterized in that, include: The system includes multiple power supply circuits, an amplifier, and a power chip. The multiple power supply circuits provide power to multiple memory modules included in the server. The non-inverting input terminal of the amplifier is connected to the current input terminal of each first voltage divider device included in the multiple power supply circuits through a first monitoring link. The inverting input terminal of the amplifier is connected to the current output terminal of each first voltage divider device through a second monitoring link. The output terminal of the amplifier is connected to the power chip, which is configured to monitor the current of the multiple power supply circuits. The multiple sets of memory modules are distributed on multiple sides of the central processing unit included in the server. In any of the power supply circuits, the current input terminal of the first voltage divider is connected to the input voltage, and the current output terminal of the first voltage divider is connected to a set of memory modules.

2. The current monitoring circuit according to claim 1, characterized in that, Also includes: Multiple filtering circuits are configured to filter interference signals on each of the first monitoring link and each of the second monitoring links.

3. The current monitoring circuit according to claim 2, characterized in that, For any one of the filter circuits included in the plurality of filter circuits: The filtering circuit includes a capacitor and a second voltage divider, wherein the second voltage divider is located in the monitoring link connected to the first voltage divider in the corresponding power supply circuit, and the capacitor is connected in parallel between the first monitoring link and the second monitoring link connected to the first voltage divider in the corresponding power supply circuit.

4. The current monitoring circuit according to claim 3, characterized in that, The second voltage divider is located in the first monitoring link connected to the first voltage divider included in the corresponding power supply circuit; or, The second voltage divider is located in the second monitoring link connected to the first voltage divider included in the corresponding power supply circuit; or, The number of the second voltage divider devices is multiple. Some of the second voltage divider devices are located in the first monitoring link connected to the first voltage divider device included in the corresponding power supply circuit, and the remaining second voltage divider devices are located in the second monitoring link connected to the first voltage divider device included in the corresponding power supply circuit.

5. The current monitoring circuit according to claim 3, characterized in that, The first terminal of the capacitor is connected to the current input terminal of the first voltage divider device included in the corresponding power supply circuit. The second terminal of the capacitor is connected to the current output terminal of the first voltage divider device included in the corresponding power supply circuit.

6. The current monitoring circuit according to claim 3, characterized in that, The first terminal of the capacitor is connected to the non-inverting input terminal of the amplifier. The second terminal of the capacitor is connected to the inverting input terminal of the amplifier.

7. The current monitoring circuit according to claim 1, characterized in that, The first voltage divider is positioned at the location where the sum of the physical path distances to each memory module in the corresponding memory module group is minimized.

8. The current monitoring circuit according to claim 1, characterized in that, The first voltage divider device includes: a current sensing resistor; The amplifier includes an operational amplifier, an adjustable gain amplifier, and a differential amplifier. When the amplifier is the adjustable gain amplifier, the gain of the adjustable gain amplifier is determined based on the current range to be monitored by the current monitoring circuit and the maximum input voltage range of the power supply chip.

9. The current monitoring circuit according to claim 1, characterized in that, Also includes: Multiple overvoltage protection circuits are configured to provide overvoltage protection for each of the first voltage divider devices. For any one of the multiple overvoltage protection circuits: One end of the overvoltage protection circuit is connected to the current input terminal of the corresponding first voltage divider device, and the other end of the overvoltage protection circuit is connected to the current output terminal of the first voltage divider device. The overvoltage protection circuit includes at least one of the following: a Zener diode and a transient voltage suppressor diode.

10. The current monitoring circuit according to claim 9, characterized in that, When the overvoltage protection circuit includes the Zener diode, the Zener voltage of the Zener diode is higher than the input voltage of the first voltage divider device.

11. The current monitoring circuit according to claim 3, characterized in that, The second voltage divider includes: a voltage divider with adjustable resistance; The first voltage divider device and / or the second voltage divider device are provided with a heat dissipation device.

12. The current monitoring circuit according to claim 3, characterized in that, If the ratio of the input voltage of the power supply circuit to the voltage drop across the first voltage divider is greater than a predetermined threshold, the input voltage of the power supply circuit is determined as the input voltage of the memory module.

13. A current monitoring method, characterized in that, Applied in the current monitoring circuit of any one of claims 1 to 12, comprising: Acquire the target voltage signal output by the amplifier, wherein the voltage signal is determined by the amplifier based on the initial voltage signals input by the first monitoring link and the second monitoring link; The target voltage signal is converted from analog to digital to obtain the target voltage value; The target voltage value is converted by a multiplier to obtain the sum of currents in multiple power supply circuits.

14. The current monitoring method according to claim 13, characterized in that, The rate conversion includes multiplying the target voltage value with a first parameter, the first parameter being 2 / (β*R), where β is configured to indicate the multiplier of the amplifier, and R is configured to indicate the resistance of a first voltage divider or a second voltage divider.

15. The current monitoring method according to claim 13, characterized in that, The method further includes: determining the power consumption and distribution pattern of each memory module in the server; determining a first average power consumption of the multiple memory modules; dividing the multiple memory modules into multiple groups of memory modules based on the power consumption and distribution pattern of each memory module, wherein the absolute value of the difference between the average power consumption of each group of memory modules and the first average value is less than a first threshold, and the sum of the power consumption of each group of memory modules is less than a second threshold; and determining the power supply circuit of each group of memory modules.

16. The current monitoring method according to claim 13, characterized in that, The distribution method includes the positional relationship between each memory module and the central processing unit.

17. A power supply chip, characterized in that, The power supply chip is located in the current monitoring circuit, which further includes multiple power supply circuits and an amplifier. The multiple power supply circuits supply power to multiple memory modules included in the server. The non-inverting input of the amplifier is connected to the current input terminal of each first voltage divider device included in the multiple power supply circuits via a first monitoring link. The inverting input of the amplifier is connected to the current output terminal of each first voltage divider device via a second monitoring link. The output of the amplifier is connected to the power supply chip, which is configured to monitor the current of the multiple power supply circuits. The multiple memory modules are distributed on multiple sides of the central processing unit included in the server. In any one of the power supply circuits, the current input terminal of the first voltage divider device is connected to the input voltage, and the current output terminal of the first voltage divider device is connected to a group of memory modules. The power chip includes: The acquisition module is configured to acquire a target voltage signal output by the amplifier, wherein the voltage signal is determined by the amplifier based on an initial voltage signal input by a first monitoring link and a second monitoring link; The first conversion module is configured to perform analog-to-digital conversion on the target voltage signal to obtain the target voltage value; The second conversion module is configured to perform a rate conversion on the target voltage value to obtain the current of multiple power supply circuits.

18. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, wherein the computer program, when executed by a processor, implements the steps of the method of claim 13.

19. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the steps of the method described in claim 13.

20. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the method described in claim 13.

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