Data transmission method, device, and storage medium

Abstract

The present application provides a data transmission method, a device, and a storage medium. The data transmission method applied to a first communication node comprises: receiving a preamble sent by a second communication node, wherein the preamble comprises a transmission start indication part and a chip length indication part; and performing data reception on the basis of the preamble comprising the transmission start indication part and the chip length indication part.

Description

Data transmission method, device and storage medium TECHNICAL FIELD

[0001] The present application relates to the technical field of communication, in particular to a data transmission method, device and storage medium. BACKGROUND

[0002] In the field of wireless communication, Internet of Things can associate multiple things with each other to improve production efficiency or increase life comfort. Since Internet of Things application needs to deploy hundreds of millions of devices, the size of Internet of Things devices needs to be small, the complexity needs to be low and the power consumption needs to be low.

[0003] Based on the low complexity design requirement of Internet of Things devices, some Internet of Things devices do not have energy storage devices, and then the device needs to obtain energy from the surrounding environment (for example, high level of downlink signaling). The uplink signal is transmitted by backscattering. The synchronization between the Internet of Things device and the base station is poor, but the Internet of Things scenario also needs to meet certain coverage requirements, so the data transmission needs to be designed to meet the application in the low complexity system. SUMMARY

[0004] The embodiment of the present application provides a data transmission method, device and storage medium, which can effectively detect the start position of downlink data transmission.

[0005] The embodiment of the present application provides a data transmission method, applied to a first communication node, comprising:

[0006] Receiving a preamble sent by a second communication node; wherein the preamble comprises a transmission start indication part and a chip length indication part;

[0007] Based on the preamble containing the transmission start indication part and the chip length indication part, data reception is performed.

[0008] The embodiment of the present application provides a data transmission method, applied to a second communication node, comprising:

[0009] Sending a preamble containing a transmission start indication part and a chip length indication part to a first communication node, so that the first communication node performs data reception based on the preamble containing the transmission start indication part and the chip length indication part.

[0010] The embodiment of the present application provides a data transmission device, applied to a first communication node, comprising:

[0011] The receiving module is configured to receive a preamble sent by a second communication node; wherein the preamble comprises a transmission start indication part and a chip length indication part;

[0012] The transmission module is configured to receive data based on a preamble that includes the transmission start indication portion and the chip length indication portion.

[0013] This application provides a data transmission device applied to a second communication node, comprising:

[0014] The transmitting module is configured to send a preamble containing a transmission start indication portion and a chip length indication portion to a first communication node, so that the first communication node can receive data based on the preamble containing the transmission start indication portion and the chip length indication portion.

[0015] This application provides a communication device, including: a memory, and one or more processors;

[0016] The memory is configured to store one or more programs;

[0017] When the one or more programs are executed by the one or more processors, the one or more processors implement the method described in any of the above embodiments.

[0018] This application provides a storage medium storing a computer program, which, when executed by a processor, implements the methods described in any of the above embodiments. Attached Figure Description

[0019] Figure 1 is a flowchart of a data transmission method provided in an embodiment of this application;

[0020] Figure 2 is a flowchart of another data transmission method provided in an embodiment of this application;

[0021] Figure 3 is a structural block diagram of a data transmission device provided in an embodiment of this application;

[0022] Figure 4 is a structural block diagram of another data transmission device provided in an embodiment of this application;

[0023] Figure 5 is a schematic diagram of the structure of a communication device provided in an embodiment of this application. Detailed Implementation

[0024] The embodiments of this application will be described below with reference to the accompanying drawings. The examples given are for illustrative purposes only and are not intended to limit the scope of this application.

[0025] Since IoT devices are generally passive (without batteries), their signaling design and transmission differ from those of active terminals such as mobile phones.

[0026] For passive IoT devices, the base station (or excitation source or reader) needs to continuously send high-level signals to power, activate, or charge the IoT device. After being activated, the IoT device receives downlink signaling from the base station and returns uplink signaling to the base station via backscatter.

[0027] In A-IoT (Ambient-IoT) communication scenarios, the device that communicates with A-IoT devices can be called a reader. The reader can be a base station or User Equipment (UE). The UE can be a mobile phone or other 5G terminal device.

[0028] In A-IoT communication scenarios, due to the simplicity of A-IoT devices, it is impossible to continuously maintain synchronization between A-IoT devices and readers. Therefore, before each uplink / downlink communication, it may be necessary to send a preamble sequence for synchronization, and carry some information in the preamble sequence.

[0029] Downlink signaling can be used to send pilot sequences (preamble sequences), control information, or downlink data to IoT devices. The IoT devices then respond with corresponding data or feedback information uplink based on the received signaling. For example, downlink signaling might include a read command and the read location (content). The IoT device retrieves the data at the indicated location and sends it to the base station. Alternatively, downlink signaling might include a write command, the write location, and the data to be written. Upon receiving the signaling, the IoT device stores the downlink data at the indicated location. Typically, a downlink signaling sequence contains pilot signals and data (data is sent after the pilot signal), or it might contain pilot signals, control information, and data (control information follows the pilot signal, and data follows the control information).

[0030] The preamble has two functions: first, it indicates the start of downlink (reader-to-device: R2D) transmission; second, it indicates the length of the R2D chip. The chip is the basic unit of downlink transmission. The first part can be called the Start Indicator Part (SIP), and the second part can be called the Clock Acquisition Part (CAP). The SIP precedes the CAP.

[0031] Ambient IoT uses a 5G NR system and employs OOK4 or OOK1 modulation for downlink (R2D) transmission. OOK4 means one Orthogonal Frequency Division Multiplexing (OFDM) symbol carries M chips, while OOK1 means one OFDM symbol carries one chip. Before receiving the preamble, the device does not know when a downlink transmission will occur, nor does it know the length of a single chip (different values ​​of M correspond to different chip lengths, with multiple candidate values ​​for M). Therefore, it needs to detect the preamble to make this determination. OOK stands for On-Off Keying.

[0032] In an A-IoT system, the time unit / resource unit can be a chip, with each encoded bit corresponding to one chip. Bit 0 corresponds to a low level on one chip, and bit 1 corresponds to a high level on one chip. In some embodiments, the preamble does not require encoding, and each bit corresponds to one chip.

[0033] Since the start indication section indicates the beginning of downlink transmission, it needs to be easy to detect and preferably distinguishable from subsequent downlink transmissions to prevent IoT devices from mistaking the data portion of the downlink transmission for the start indication section.

[0034] In one embodiment, FIG1 is a flowchart of a data transmission method provided by an embodiment of this application. This embodiment can be executed by a first communication node. Exemplarily, the first communication node may include IoT devices such as tags, electronic tags, and Ambient-IoT terminals. As shown in FIG1, this embodiment includes: S110-S120.

[0035] S110, Receive the preamble sent by the second communication node; wherein the preamble includes a transmission start indication part and a chip length indication part.

[0036] In one example, the transmission start indication portion refers to the position that can be used to indicate the start of downlink transmission; the chip length indication portion refers to the chip length associated with the downlink data portion transmission. In one example, the transmission start indication portion may include one or more high / low level structures, and the high and / or low levels include at least two lengths. For example, the transmission start indication portion contains multiple high / low level structures (e.g., 101100111000 includes three high / low level structures), and the high and low levels have different lengths. In one example, the transmission start indication portion contains one high / low level structure (e.g., 111100 includes one high / low level structure), and the high and low levels have different lengths. In one example, both the transmission start indication portion and the chip length indication portion in the preamble consist of one or more high and low levels. In one example, the transmission start indication portion can be SIP; the chip length indication portion can be CAP.

[0037] In one example, the start-of-transmission indicator includes two high-low level structures, and the lengths of the two high-low level structures are different. In one example, the start-of-transmission indicator includes no more than five high-low level structures. In one example, the start-of-transmission indicator includes two high-low level structures, and the M value of the start-of-transmission indicator is one of the following: 4, 6, 8, 10, 12.

[0038] For example, the transmission start indication portion includes one of the following: [10111000] and M=8, [11100010] and M=8, [11001110] and M=8, [11101100] and M=8, [11100100] and M=8, [1111110000] and M=10, [1100111000] and M=10, [1110001100] and M=10, [1111000110] and M=10, [111100001100] and M=12, [111110001100] and M=12, [111100011100] and M=12.

[0039] S120. Data is received based on a preamble that includes a transmission start indication portion and a chip length indication portion.

[0040] In one example, the second communication node sends a preamble containing a transmission start indication portion and a chip length indication portion to the first communication node. The first communication node can know the starting position of the downlink transmission of the second communication node based on the transmission start indication portion, so as to accurately detect and receive the relevant data transmitted by the downlink of the second communication node. Furthermore, the first communication node can obtain the length of one chip of the data portion based on the chip length indication portion, so as to transmit / receive downlink data based on the chip length and decode the downlink data.

[0041] In one embodiment, the transmission start indication portion includes a first sub-block and / or a second sub-block. In one example, the transmission start indication portion may include two sub-blocks, such as a first sub-block and a second sub-block.

[0042] In one embodiment, the first sub-block satisfies one of the following conditions: the first sub-block is symmetrical; the first sub-block is symmetrical from beginning to end; the first sub-block is symmetrical from beginning to end, and the first bit and the last bit in the first sub-block are both 1; the other bits in the first sub-block except for the last bit are symmetrical; the first bit and the last two bits in the first sub-block have the same value; the first bit and the last two bits in the first sub-block are both 1.

[0043] In one embodiment, the second sub-block satisfies one of the following conditions: the second sub-block is symmetrical; the second sub-block is symmetrical from beginning to end; the second sub-block is symmetrical from beginning to end, and the first bit and the last bit in the second sub-block are both 0; the length of the last consecutive low level in the second sub-block is greater than or equal to the length of the first chip.

[0044] In some embodiments, the first chip length is a chip length of a predefined M value. The predefined M value is at least one of the following: 1, 2, 4, 6, 8, 12, 16, 24, 32. In some embodiments, the first chip length is two consecutive chip lengths of a predefined M value. The predefined M value is at least one of the following: 2, 4, 6, 8, 12, 16, 24, 32.

[0045] In one example, the conditions that the first sub-block and the second sub-block satisfy can be different or the same.

[0046] In one example, the first sub-block is symmetric, and the second sub-block is all zeros. Symmetrical first sub-block means that the value of the i-th chip in the first sub-block equals the value of the (k1+1-i)-th chip; where k1 is the number of chips in the first sub-block, and i is a positive integer greater than or equal to 1 and less than or equal to k1. The second sub-block can occupy 0.5 OFDM symbols, or a non-integer number of OFDM symbols, or it can occupy a length of K2 OFDM symbols. K2 is 1, 2, or 3. For example, the transmission start indication portion can be 1111 0000 1111 0000 0000 0000, 111110011111 0000 0000 0000, 1100 0000 11000000, 110000000011 000000000000, 10111101 0000, 101101 000000, 111011 110111 0000, 1010 0000, 1100 1100 0000, 1110 0111 0000; correspondingly, the first sub-block can be 1111 0000 1111, 11111001 1111, 1100 0000 11, 1100 0000 0011, 1011 1101, 101101, 111011 110111, 101, 11011, 11100111. In one example, when the transmission start indication part is 1111 0000 1111 0000 0000 0000, 1111100111110000 0000 0000, or 110000000011 000000000000, the value of M is 12 or 24; where M is the number of chips contained in one OFDM symbol used in the transmission start indication part. In this case, the transmission start indication part occupies 2 or 1 OFDM symbols. In one example, when the start of transmission indication is 10111101 0000, M is 4 or 12, and this start of transmission indication occupies 3 or 1 OFDM symbols. In another example, when the start of transmission indication is 101101 000000, M is 6 or 12, and this start of transmission indication occupies 2 or 1 OFDM symbols. In yet another example, when the start of transmission indication is 111011 110111 0000, M is 6 or 12, and this start of transmission indication occupies a non-integer number of OFDM symbols.

[0047] In one example, the first sub-block is symmetrical from beginning to end, and the second sub-block is all zeros. Symmetry in the first sub-block means that the first bit and the last bit in the first sub-block are the same, or the value of the i-th chip equals the value of the (k1+1-i)-th chip; where i is a positive integer greater than or equal to 1 and less than or equal to P; and P is an integer less than k1 / 2. The second sub-block can occupy 0.5 OFDM symbols, or a non-integer number of OFDM symbols, or it can occupy K2 OFDM symbols; K2 is 1, 2, or 3.

[0048] In some embodiments, the first sub-block occupies a non-integer number of OFDM symbols.

[0049] In one example, the first sub-block is symmetrical from beginning to end, and the first bit and the last bit in the first sub-block are both 1; the second sub-block is symmetrical from beginning to end, and the first bit and the last bit in the second sub-block are both 0.

[0050] In one example, the first sub-block is symmetrical, and the first bit and the last bit in the first sub-block are both 0; the second sub-block is symmetrical, and the first bit and the last bit in the second sub-block are both 0.

[0051] In one example, the bits other than the last bit in the first sub-block have a symmetric structure, meaning the value of the i-th chip in the first sub-block equals the value of the (k1-i)-th chip; where k1 is the number of chips in the first sub-block; and i is a positive integer greater than or equal to 1 and less than or equal to k1. In another example, the bits other than the last bit in the first sub-block have a symmetric structure, and the value of the k1-th chip in the first sub-block equals the value of the first chip. For example, the first sub-block could be: 1011, 110111, 101011, 100011, etc.

[0052] In some embodiments, the order of the first sub-block and the second sub-block is not specified. In some embodiments, the first sub-block comes before the second sub-block.

[0053] In some embodiments, the length of the last consecutive low level in the second sub-block is greater than or equal to the length of the first chip. For example, the length of the first chip can be a chip length of M=6; where M is the number of chips contained in one OFDM symbol in the data portion, and correspondingly, the length of one chip is the ratio between the length of one OFDM symbol and M; the larger the value of M, the shorter the length of one chip. In one example, the length of the last consecutive low level in the second sub-block being greater than or equal to the length of the first chip means that the M value used in the second sub-block is greater than 6, then the last few chips of the second sub-block are all low level, and the length of the consecutive low level is greater than or equal to the chip length of M=6. Alternatively, the last chip in the second sub-block is low level, and the M value used in the transmission start indication portion is less than or equal to 6. It should be noted that the chip length of M=6 can be equivalent to a time length. When the length of the consecutive low level is greater than this time length, it can be accurately detected, thus determining the start position of the downlink transmission; when the length of the consecutive low level is less than this time length, it may be difficult to detect, thus affecting the detection of the start position of the downlink transmission.

[0054] In one example, the first or second sub-block includes a symmetrical structure of length 5. For example, the first or second sub-block includes one of the following: 00000, 00100, 01010, 01110, 10001, 10101, 11011, and 11111.

[0055] In one example, the transmission start indication portion includes a symmetrical structure of length 5. For example, the transmission start indication portion includes one of the following: 00000, 00100, 01010, 01110, 10001, 10101, 11011, and 11111.

[0056] In one example, the first or second sub-block includes a symmetrical structure of length 7. For example, the first or second sub-block includes one of the following: 0000000, 0001000, 0010100, 0011100, 0100010, 0101010, 0110110, 0111110, 1000001, 1001001, 1010101, 1011101, 1100011, 1101011, 1110111, and 1111111.

[0057] In one example, the transmission start indication portion includes a symmetrical structure of length 7. Exemplarily, the transmission start indication portion includes one of the following: 0000000, 0001000, 0010100, 0011100, 0100010, 0101010, 0110110, 0111110, 1000001, 1001001, 1010101, 1011101, 1100011, 1101011, 1110111, and 1111111.

[0058] In some embodiments, the length of the first sub-block or the second sub-block is 6. For example, the first sub-block or the second sub-block includes one of the following: 000000, 001100, 010010, 011110, 100001, 101101, 110011, and 111111.

[0059] In some embodiments, the length of the first sub-block or the second sub-block is 6. For example, the transmission start indication portion includes one of the following: 000000, 001100, 010010, 011110, 100001, 101101, 110011, and 111111. In some embodiments, the length of the first sub-block or the second sub-block is 8. For example, the first sub-block or the second sub-block includes one of the following: 00000000, 00011000, 00100100, 00111100, 01000010, 01011010, 01100110, 01111110, 10000001, 10011001, 10100101, 10111101, 11000011, 11011011, 11100111, and 11111111.

[0060] In one example, the transmission start indication portion includes a sequence of length 8. For example, the transmission start indication portion includes one of the following: 00000000, 00011000, 00100100, 00111100, 01000010, 01011010, 01100110, 01111110, 10000001, 10011001, 10100101, 10111101, 11000011, 11011011, 11100111, and 11111111.

[0061] In some embodiments, the length of the first sub-block or the second sub-block is 10. For example, the first sub-block or the second sub-block includes one of the following: 0000000000, 0000110000, 0001001000, 0001111000, 0010000100, 0010110100, 0011001100, 0011111100, 0100000010, 0100110010, 0101001010, 0101111010, 0110000110, 0110110110. 0111001110, 0111111110, 1000000001, 1000110001, 1001001001, 1001111001, 1010000101, 1010110101, 1011001101, 1011111101, 1100000011, 1100110011, 1101001011, 1101111011, 1110000111, 1110110111, 1111001111 and 11111111111.

[0062] In one example, the transmission start indication portion includes a sequence of length 10. For example, the transmission start indication portion includes one of the following: 0000000000, 0000110000, 0001001000, 0001111000, 0010000100, 0010110100, 0011001100, 0011111100, 0100000010, 0100110010, 0101001010, 0101111010, 0110000110, 0110110110. , 0111001110, 0111111110, 1000000001, 1000110001, 1001001001, 1001111001, 1010000101, 1010110101, 1011001101, 1011111101, 1100000011, 1100110011, 1101001011, 1101111011, 1110000111, 1110110111, 1111001111 and 11111111111.

[0063] In some embodiments, the length of the first sub-block or the second sub-block is 12. For example, the first sub-block or the second sub-block includes one of the following: 000000000000, 00000110000, 000010010000, 000011110000, 000100001000, 000101101000, 000110011000, 000111111000, 001000000100, 001001100100, 001010010100, 001011110100, 0011010001100, 001101 101100, 001110011100, 001111111100, 010000000010, 010001100010, 010010010010, 010011110010, 010100001010, 010101101010, 010110011010, 010111111010, 011000000110, 011001100110, 011010010110, 011011110110, 011100001110, 011101101110, 0111 10011110, 011111111110, 100000000001, 100001100001, 100010010001, 100011110001, 100100001001, 100101101001, 100110011001, 100111111001, 101000000101, 101001100101, 101010010101, 101011110101, 101100001101, 101101101101, 101110011101, 10 1111111101, 110000000011, 110001100011, 110010010011, 110011110011, 110100001011, 110101101011, 110110011011, 110111111011, 111000000111, 111001100111, 111010010111, 1110111101111, 11110011111, and 1111111111111.

[0064] In one example, the transmission start indication portion includes a sequence of length 12. For example, the transmission start indication portion includes one of the following: 000000000000, 00000110000, 000010010000, 000011110000, 000100001000, 000101101000, 000110011000, 000111111000, 001000000100, 001001100100, 001010010100, 001011110100, 001100001100, 00110 1101100, 001110011100, 001111111100, 010000000010, 010001100010, 010010010010, 010011110010, 010100001010, 010101101010, 010110011010, 010111111010, 011000000110, 011001100110, 011010010110, 011011110110, 01100001110, 011101101110, 011 110011110, 011111111110, 100000000001, 100001100001, 100010010001, 100011110001, 100100001001, 100101101001, 100110011001, 100111111001, 101000000101, 101001100101, 101010010101, 101011110101, 101100001101, 101101101101, 1 01111111101, 110000000011, 110001100011, 110010010011, 110100001011, 110100001011, 110101101011, 110110011011, 110111111011, 111000000111, 111001100111, 111010010111, 1110111101111, 111100001111, 111101101111, 111110011111 and 1111111111111.

[0065] In one embodiment, the transmission start indication portion includes a portion of length 6. For example, the transmission start indication portion includes at least one of the following: 100000, 100001, 100010, 100011, 100100, 100101, 100110, 100111, 101000, 101001, 101010, 101011, 1011 00, 101101, 101110, 101111, 110000, 110001, 110010, 110011, 110100, 110101, 110110, 110111, 111000, 111001, 111010, 111011, 111100, 111101, 111110 and 111111.

[0066] In some embodiments, the first sub-block satisfies at least one of the following conditions: the first sub-block is symmetrical; the first sub-block is symmetrical from beginning to end; the first sub-block is symmetrical from beginning to end, and the first bit and the last bit in the first sub-block are both 1; the other bits in the first sub-block, except for the last bit, have a symmetrical structure; the first bit and the last two bits in the first sub-block have the same value; the first bit and the last two bits in the first sub-block are both 1; the first sub-block includes at least one high level of three or more consecutive chips; the first sub-block includes at least one low level of three or more consecutive chips; the maximum length of the consecutive high level in the second sub-block is less than the maximum length of the consecutive high level in the first sub-block; the maximum length of the consecutive low level in the second sub-block is greater than the maximum length of the consecutive low level in the first sub-block; the number of high-low level switching in the second sub-block is greater than the number of high-low level switching in the first sub-block; or, the number of high-low level switching in the second sub-block is equal to the number of high-low level switching in the first sub-block.

[0067] In some embodiments, the second sub-block satisfies at least one of the following conditions: the second sub-block is symmetrical; the second sub-block is symmetrical from beginning to end; the second sub-block is symmetrical from beginning to end, and the first bit and the last bit in the second sub-block are both 0; the length of the last consecutive low level in the second sub-block is greater than or equal to the length of the first chip; the second sub-block includes at least one high level of three or more consecutive chips; the second sub-block includes at least one low level of three or more consecutive chips; the maximum length of the consecutive high level in the second sub-block is less than the maximum length of the consecutive high level in the first sub-block; the maximum length of the consecutive low level in the second sub-block is greater than the maximum length of the consecutive low level in the first sub-block; the number of high-low level switching in the second sub-block is greater than the number of high-low level switching in the first sub-block; or, the number of high-low level switching in the second sub-block is equal to the number of high-low level switching in the first sub-block; the start level of the second sub-block is different from the end level of the first sub-block.

[0068] In some embodiments, the first sub-block and the second sub-block satisfy at least one of the following conditions: the maximum length of continuous low level in the second sub-block is greater than the maximum length of continuous low level in the first sub-block; the number of high-low level switching in the second sub-block is greater than the number of high-low level switching in the first sub-block; or, the number of high-low level switching in the second sub-block is equal to the number of high-low level switching in the first sub-block; the start level of the second sub-block is different from / opposite to the end level of the first sub-block.

[0069] In some embodiments, the number of high-low level switching operations in the second sub-block is less than the number of high-low level switching operations in the first sub-block.

[0070] The number of high-low level transitions is the number of 0->1 and / or 1->0 transitions. For example, if the first code block sequence is 110010010011, then its number of high-low level transitions is 6, including 3 1->0 transitions and 3 0->1 transitions. In some embodiments, the number of high-low level transitions is calculated only for the number of 0->1 transitions or only for the number of 0->0 transitions.

[0071] For example, if the maximum length of consecutive low levels in the second sub-block is greater than the maximum length of consecutive low levels in the first sub-block, the transmission start indication portion can be one of the following:

[0072] 110011000000, where 110011 is the first sub-block and 000000 is the second sub-block;

[0073] 100011000000, where 100011 is the first sub-block and 000000 is the second sub-block;

[0074] 110001000000, where 110001 is the first sub-block and 000000 is the second sub-block;

[0075] 100001000000, where 100001 is the first sub-block and 000000 is the second sub-block;

[0076] 111011000000, where 111011 is the first sub-block and 000000 is the second sub-block;

[0077] 110111000000, where 110111 is the first sub-block and 000000 is the second sub-block;

[0078] 110011110000, where 110011 is the first sub-block and 110000 is the second sub-block;

[0079] 100011110000, where 100011 is the first sub-block and 110000 is the second sub-block;

[0080] 110001100000, where 110001 is the first sub-block and 100000 is the second sub-block;

[0081] 100001100000, where 100001 is the first sub-block and 100000 is the second sub-block;

[0082] 111011110000, where 111011 is the first sub-block and 110000 is the second sub-block;

[0083] 110111110000, where 110111 is the first sub-block and 110000 is the second sub-block;

[0084] 111001110000, where 11100111 is the first sub-block and 0000 is the second sub-block;

[0085] 111001111000, where 11100111 is the first sub-block and 1000 is the second sub-block;

[0086] 11101100, where 1110 is the first sub-block and 1100 is the second sub-block.

[0087] For example, if the maximum length of consecutive high levels in the second sub-block is less than the maximum length of consecutive high levels in the first sub-block, the transmission start indication portion can be one of the following:

[0088] 110011001000, where 110011 is the first sub-block and 001000 is the second sub-block;

[0089] 100011000100, where 100011 is the first sub-block and 000100 is the second sub-block;

[0090] 110001000100, where 110001 is the first sub-block and 000100 is the second sub-block;

[0091] 100001000100, where 100001 is the first sub-block and 000100 is the second sub-block;

[0092] 111011000100, where 111011 is the first sub-block and 000100 is the second sub-block;

[0093] 110111000100, where 110111 is the first sub-block and 000100 is the second sub-block;

[0094] 11110110, where 111101 is the first sub-block and 10 is the second sub-block;

[0095] 111001111100, where 11100111 is the first sub-block and 1100 is the second sub-block;

[0096] 111001111110, where 11100111 is the first sub-block and 1110 is the second sub-block.

[0097] For example: If the number of high / low level switching operations in the second sub-block is greater than the number of high / low level switching operations in the first sub-block, the transmission start indication section can be one of the following:

[0098] 1110 1010;

[0099] 1111 0100;

[0100] 1000 1010;

[0101] 110011 101010;

[0102] 111100 110011;

[0103] 111100 001100.

[0104] For example: the number of high / low level switching in the second sub-block is equal to the number of high / low level switching in the first sub-block, and the transmission start indication section can be one of the following:

[0105] 1110 1100;

[0106] 111100 110000;

[0107] 111100 111000;

[0108] 110000 111100;

[0109] 110000 111000.

[0110] A space represents the distinction between the first and second code blocks.

[0111] In one embodiment, the last Q bits of the start-of-transmission indication portion are all zero bits; where Q is a positive integer greater than or equal to 1 and less than or equal to 32. Alternatively, the last bit of the start-of-transmission indication portion is a continuous low level.

[0112] In one example, the length of a series of low levels is greater than or equal to the length of a chip when M=6; or, the length of a series of low levels is less than or equal to the length of an OFDM symbol.

[0113] In one example, the length of a continuous low level satisfies one of the following: the length is equal to 1 / 2 (0.5) OFDM symbols; the length is equal to 2 consecutive M=6 chip lengths; the length is equal to 3 or 5 consecutive M=8 chip lengths; the length is equal to 5, 7 or 9 consecutive M=12 chip lengths; the length is equal to 5, 6, 7, 9, 10, 11, 12, 13 or 14 M=16 chip lengths; the length is equal to 5, 7, 8, 9, 10, 11, 13, 14, 15, 16, 18, 20 or 22 M=24 chip lengths.

[0114] In some embodiments, when the length of the continuous low level satisfies condition 1, the transmission start indication portion includes one of the following: a continuous high / low level with a length equal to 1 / 2 (0.5) OFDM symbols; a continuous high / low level with a length equal to 2 M=6 chip lengths; a continuous high / low level with a length equal to 3 or 5 M=8 chip lengths; a continuous high / low level with a length equal to 5, 7, or 9 M=12 chip lengths; a continuous high / low level with a length equal to 5, 6, 7, 9, 10, 11, 12, 13, or 14 M=16 chip lengths; or a continuous high / low level with a length equal to 5, 7, 8, 9, 10, 11, 13, 14, 15, 16, 18, 20, or 22 M=24 chip lengths.

[0115] In one example, condition 1 includes one of the following: a level length equal to M = 1, 2, 4, 6, 8, 12, 16, 24, 32; or two level lengths equal to M = 1, 2, 4, 6, 8, 12, 16, 24, 32.

[0116] The relationship between M and the length of a chip (i.e., the length of a chip) is: Chip length = OFDM symbol length / M.

[0117] In one embodiment, the transmission start indication portion is related to the number of first chips; wherein the number of first chips is the number of chips contained in one OFDM symbol of the data portion, or the M value used in the data portion. In one example, the second communication node can determine the transmission start indication portion based on the number of first chips and send the transmission start indication portion to the first communication node. The transmission start indication portion received by the first communication node is related to the number of first chips in the data portion. For example, the number of first chips can be denoted as M. The first communication node can determine information related to the number of first chips in the data portion based on the received transmission start indication portion.

[0118] For example, when the M value of the data portion is 1, 2, 4, 6, 8, or 12, the second communication node determines that the transmission start indication portion is first type information and sends it to the first communication node. The first communication node receives the transmission start indication portion and determines that the received transmission start indication portion is first type information; therefore, the first communication node knows that the M value of the data portion is 1, 2, 4, 6, 8, or 12. Similarly, when the M value of the data portion is 1, 2, 4, or 32, the second communication node determines that the transmission start indication portion is second type information and sends it to the first communication node. The first communication node receives the transmission start indication portion and determines that the received transmission start indication portion is second type information; therefore, the first communication node knows that the M value of the data portion is 1, 2, 4, or 32.

[0119] In one embodiment, when the number of first chips is a first type value, the transmission start indication portion is first type information; when the number of first chips is a second type value, the transmission start indication portion is second type information.

[0120] In one embodiment, the first type value includes at least one of the following: 1; 2; 4; 6; 8; 12; and the second type value includes at least one of the following: 12; 16; 24; 32. In one example, the first type value may include 1, 2, 4, 6, or 8; and the second type value may include 12, 16, 24, or 32. In another example, the first type value may include 1, 2, 4, 6, 8, or 12; and the second type value may include 16, 24, or 32.

[0121] In one embodiment, the first type of information occupies an integer number of OFDM symbols; the second type of information occupies a non-integer number of OFDM symbols.

[0122] In one example, the case where the start-of-transmission indicator occupies a non-integer number of OFDM symbols means that the start-of-transmission indicator can occupy half, one and a half, two and a half OFDM symbols, or p OFDM symbols and k chips; or, the last half of the OFDM symbol in the start-of-transmission indicator is a continuous low level. Here, p and k are both integers.

[0123] In one example, when M is 16, 24, or 32, the CP length of an OFDM symbol is greater than the length of a chip. Even with a symmetrical structure, this can lead to rising or falling edges within the CP. Furthermore, if the Chip Length Indicator (CAP) follows the Start of Transmission Indicator (SIP), and the CAP is at the beginning of an OFDM symbol, adding a CP at that beginning makes it difficult to determine the length of the first chip in the CAP, thus affecting the determination of the data chip length. In this case, the SIP can be extended by half an OFDM symbol (or k chips), and the CAP can begin at the first symbol of a half OFDM symbol or a non-OFDM symbol. Since the CAP is not connected to a CP, the chip length of the CAP is unaffected by the CP, making CAP determination easier and allowing for accurate chip length determination.

[0124] In one embodiment, the second type of information is a combination of the first type of information and a continuous low-level sequence. In one example, a continuous low-level sequence may be placed after the first type of information. The low-level length of this continuous low-level sequence may be half the length of an OFDM symbol, a quarter the length of an OFDM symbol, or k chips. In one example, the transmission start indication portion of the first type of information may be a subset of the transmission start indication portion of the second type of information, or the transmission start indication portion of the second type of information may include a sequence corresponding to the transmission start indication portion of the first type of information.

[0125] When the M value is large, the length of the CP in an OFDM symbol is greater than the length of a single chip. If the CAP starts at the beginning of an OFDM symbol, it becomes difficult to determine the length of the first chip in the CAP. Therefore, starting a CAP in the middle of an OFDM symbol will not affect the CAP due to the CP.

[0126] In some embodiments, the transmission start indication portion is associated with one of the following: R2D type, R2D carried information, and device type. That is, the transmission start indication portion includes multiple types; different R2D types, different R2D carried information, or different device types correspond to different transmission start indication portions. In one example, the R2D type is the command type of R2D. In one example, the R2D type includes at least one of the following: read command, write command, paging command, unicast command, multicast command, and broadcast command. The R2D carried information includes at least one of the following: paging information, read information, write information, and selection information. The device type includes at least one of the following: device type 1, device type 2a, and device type 2b. Type 1 device: power consumption ≈ 1 microwatt (μW), no DL or UL amplifier, uplink signal feedback via backscatter. Type 2a device: power consumption ≤ several hundred μW, with DL and / or UL amplifier, uplink signal feedback via backscatter. Type 2b device: power consumption ≤ several hundred μW, with DL and / or UL amplifiers, and autonomously generates uplink signals.

[0127] In one example, the Chip Length Indicator (CAP) is used to identify the length of a chip in the data portion. In one embodiment, the CAP includes alternating high-low-high-low (or 1010) or low-high-low-high (0101) levels. The first bit (or chip or level) of the CAP is opposite to the last bit (or chip or level) of the SIP. Opposite means that bit 1 is opposite to bit 0, chip 1 is opposite to chip 0, and high level is opposite to low level. In some embodiments, the chip length of the CAP is the same as the chip length of the data portion. The device can determine the chip length of the data portion by measuring the chip length of the CAP. Data reception is performed based on the chip length of the data portion.

[0128] In one embodiment, the data transmission method applied to the first communication node further includes: determining the number of chips contained in the chip length indication portion based on the information type of the transmission start indication portion. For example, when the information type of the transmission start indication portion is a first type of information, the number of chips (or bits) in CAP can be A; when the information type of the transmission start indication portion is a second type of information, the number of chips (or bits) in CAP is B. For example, A = 3, 4, or 5; B = 7, 9, or an integer greater than 5. In one example, the value of A is less than the value of B.

[0129] In one embodiment, the data transmission method applied to the first communication node further includes: determining the number of chips included in the chip length indication part according to the information type of the transmission start indication part and the number of first chips in the data part; wherein, the number of first chips is the number of chips included in one OFDM symbol of the data part. For example, when the information type of the transmission start indication part is the first type of information, if the number of first chips in the data part is M = 1, the number of chips (or bits) of the CAP is A; if the number of first chips M is not equal to 1, the number of chips (or bits) of the CAP is B; when the information type of the transmission start indication part is the second type of information, the number of chips (or bits) of the CAP is C. For instance, the value of A >= the value of B >= the value of C. For example, A = 3; B = 5 or 6 or 7; C = 7 or 9 or an integer greater than 5.

[0130] In one embodiment, when the number of first chips M is greater than 8, the number of chips (or bits) of the CAP is B; when the number of first chips M is less than or equal to 8, the number of chips (or bits) of the CAP is A. A is a positive integer less than 10, and B is a positive integer greater than or equal to 10. For example, A = 5, B = 13, 11, or 15.

[0131] In one embodiment, when the number of first chips M is greater than 12, the number of chips (or bits) of the CAP is C; when the number of first chips M is less than or equal to 并且大于4时,CAP的码片(或比特)数量为B;第一码片数量M小于等于4时,CAP码片数量为A。A,B为小于10的正整数,A<B,C为大于10的正整数。例如,A=5,B=7,或9,C=11,13,或15。在一些实施例中,A,B,C为小于等于16的正整数。 (这里中文原文有误,已修正并翻译) In one embodiment, when the number of first chips M is greater than 12, the number of chips (or bits) of the CAP is C; when the number of first chips M is less than or equal to 12 and greater than 4, the number of chips (or bits) of the CAP is B; when the number of first chips M is less than or equal to 4, the number of chips of the CAP is A. A and B are positive integers less than 10, A < B, and C is a positive integer greater than 10. For example, A = 5, B = 7 or 9, C = 11, 13, or 15. In some embodiments, A, B, and C are positive integers less than or equal to 16.

[0132] In one embodiment, when the number of first chips M = 2, the sequence of the CAP includes at least one of the following: 0100, 0100110100, 1011, 1011001011, 0110, 1001. When the number of first chips M is not 2, the sequence of the CAP is a sequence of multiple high-low alternations (such as 1010...) or multiple low-high alternations (such as 0101...). The purpose of this is to make the CAP for each M value include at least two consecutive chips without CP.

[0133] In one example, the type (pattern) of the chip length indication part can be determined based on the information type of the transmission start indication part.

[0134] In one embodiment, the chip length indication portion includes one or more first bits; wherein the first bits indicate that the number of first chips in the data portion is equal to the number of chips in the chip length indication portion, or equal to a derived value of the number of chips in the chip length indication portion. For example, the first bit can be m bits, and the number of first chips in the data portion is denoted as M. CAP includes m bits, and the m bits are used to indicate that the M value of the downlink data portion (R2D data) is equal to the M value of CAP, or equal to a derived value of the M value of CAP.

[0135] Example 1:

[0136] The chip length used by CAP includes at least one of the following: chip length M=2, chip length M=4, chip length M=6, chip length M=8, and chip length M=12. Alternatively, the value of M in CAP is one of the following: 2, 4, 6, 8, or 12.

[0137] The last bit (first bit) of CAP indicates that the M value of the R2D data is equal to the M value of CAP or a derivative of the M value of CAP. Table 1 below is an example.

[0138] Table 1

[0139] For example, the CAP chip length is M=4, consisting of 5 chips. The first 4 chips are either 1010 or 0101, and the value of the last chip is determined by the M value of the data bits. If the M value of the data bits is 16, then the last chip of CAP is 1; if the M value of the data bits is 4, then the last chip of CAP is 0. If the A-IoT device detects 10101 and the M value of CAP is 4, then the device knows that the M value of the data part is 16. If the A-IoT device detects 10100 and the M value of CAP is 4, then the device knows that the M value of the data part is 4.

[0140] For example, the CAP chip length is M=12, consisting of 9 chips. The first 8 chips are either 10101010 or 01010101, and the value of the last chip is determined by the M value of the data bits. If the M value of the data bits is 24, then the last chip of CAP is 1; if the M value of the data bits is 12, then the last chip of CAP is 0. If the A-IoT device detects 10101 and the M value of CAP is 12, then the device knows that the M value of the data portion is 24. If the A-IoT device detects 10100 and the M value of CAP is 12, then the device knows that the M value of the data portion is 12.

[0141] Example 2:

[0142] The chip length of CAP includes at least one of the following: chip length M=1, chip length M=2, chip length M=4, chip length M=6, chip length M=8, and chip length M=12.

[0143] When the chip length of CAP is 8, CAP also includes two bits to indicate that the M value of R2D data is equal to the M value of CAP or a derived value equal to the M value of CAP.

[0144] For example, when the chip length of CAP is 8, it has two more bits than other chip lengths of CAP.

[0145] For example, the CAP chip length is M = 8, totaling 9 chips. The first 7 chips are either 1010101 or 0101010, and the last two chips are determined by the M value of the data bits. The relationship can be illustrated in the example in Table 2 below.

[0146] Table 2

[0147] The first communication node can deduce the chip length of the downlink data based on the chip length in the CAP and the indication of the last two bits. For example, if the first communication node detects that the M value of CAP is 8 and detects 101010100, then the device knows that the M value of the data portion is 8. For example, if the first communication node detects that the M value of CAP is 8 and detects 101010111, then the device knows that the M value of the data portion is 32. For example, if the first communication node detects that the M value of CAP is 8 and detects 101010101, then the device knows that the M value of the data portion is 16. For example, if the first communication node detects that the M value of CAP is 4 and detects 1010101, then the device knows that the M value of the data portion is 4. For example, if the first communication node detects that the M value of CAP is 1 and detects 1010101, then the device knows that the M value of the data portion is 1.

[0148] It should be noted that the 8-bit chip length design of CAP here can be considered together with various CAP lengths or patterns mentioned above. For example, based on the design of some embodiments, CAP with M=8 has 2 extra bits after it.

[0149] In one embodiment, the number of chips included in the chip length indication portion is related to the number of first chips in the data portion;

[0150] When the number of the first chip is less than or equal to 2, the number of chips in the chip length indication section is 3 or 4;

[0151] When the number of the first chip is greater than 2 and less than or equal to 16, the number of chips in the chip length indication section is 6, 7 or 9;

[0152] When the number of first chips is greater than 12, the number of chips in the chip length indicator is 5, 7, 9, 16 or 17.

[0153] In one embodiment, the data transmission method applied to the first communication node further includes: receiving downlink control information sent by the second communication node; wherein the downlink control information includes downlink transport block size (TBS) indication information; wherein the downlink transport block size indication information includes bits of a first value; the first value is a positive integer greater than or equal to 1 and less than or equal to 6; the bits of the first value include the value of a second value (also referred to as a codepoint). For example, the first value can be X; the second value can be 2. X That is, X bits can include 2. X The length of the downlink data can be determined using numerical values ​​or code points. In one example, the downlink TBS indication information can be used to determine the length of the downlink data; alternatively, a postamble can be used. When the first communication node detects the postamble, it can be determined that the downlink data transmission is complete. In one example, the downlink control information may include downlink TBS indication information, which includes X bits, where X bits can correspond to 2... X There are several possible values. In one example, the first communication node receives downlink control information sent by the second communication node, determines the length of the downlink data through the TBS indication information in the downlink control information, and performs the downlink data reception process based on the length of the downlink data.

[0154] In one embodiment, at least one value (or code point) of the second numerical value is used to indicate that the downlink transport block size is greater than a first threshold; wherein the first threshold is a value of the downlink transport block size. In some embodiments, the first threshold is the maximum TBS corresponding to downlink transmission without CRC. In one example, 2 X At least one value is used to indicate that the TBS is greater than a first threshold; at least one value is used to indicate the specific downlink transmission TBS value. Additionally, one or more values ​​may correspond to reserved bits. When the data length is small, using the TBS indication information to indicate a specific value can accurately and reliably determine the data length while reducing resource overhead. If there are too many candidate TBS values, using the TBS indication information to indicate each TBS will lead to increased overhead. In this case, postamble can be used to reduce resource overhead. For example, assuming the maximum value of the specific TBS that TBS can indicate is T, 2... XOne of the possible values ​​is used to indicate that the value of TBS is greater than T.

[0155] For example, the downlink TBS indication includes 3 bits (i.e., X = 3). There are a total of 8 possible values ​​(or code points). The relationship between the TBS indication information and the indicated downlink data TBS is shown in Table 3. As shown in Table 3, the 3-bit code point can be 111, which indicates that the downlink data TBS is a value greater than A7.

[0156] Table 3

[0157] Where A1, A2, A3, A4, A5, A6, and A7 are positive integers greater than or equal to 1 and less than or equal to 100. For example, A1 = 8, A2 = 12, A3 = 16, A4 = 20, A5 = 24, A6 = 28, and A7 = 32. When the device detects a TBS indication of 000, it knows that the TBS value of the downlink data is A1. If the first communication node detects a TBS indication of 111, it knows that the TBS length of the downlink data is greater than A7, and the end of the downlink transmission needs to be determined by detecting the postamble.

[0158] For example, the downlink TBS indicator includes 3 bits, for a total of 8 values. Its indication content is shown in Table 4.

[0159] Table 4

[0160] In one embodiment, at least one of the values ​​of the second numerical value is used to indicate the range of the downlink TBS; at least one value is used to indicate the downlink TBS value. For example, when the code point of the TBS indication information is 110 and A6 = 40, 110 indicates that the range of the TBS is greater than 40; or, for example, when the code point of the TBS indication information is 111, 111 indicates that the value range of the TBS is greater than 40. In one embodiment, 111 is a reserved bit.

[0161] Table 5

[0162] Where A1, A2, A3, A4, A5, A6, and A7 are positive integers greater than or equal to 1 and less than or equal to 100. For example, A1 = 8, A2 = 12, A3 = 16, A4 = 20, A5 = 24, A6 = 28, and A7 = 32. When the device detects a TBS indication of 000, it knows that the TBS value of the downlink data is A1. If the first communication node detects a TBS indication of 110, it knows that the TBS length of the downlink data is greater than A6 and less than or equal to A7, and the end of the downlink transmission needs to be determined by detecting the postamble. If the first communication node detects a TBS indication of 111, it knows that the TBS length of the downlink data is greater than A7, and the end of the downlink transmission needs to be determined by detecting the postamble.

[0163] Table 6

[0164] For example, the downlink TBS indication includes 2 bits (i.e., X = 2). There are a total of 4 possible values ​​(or code points). The relationship between the TBS indication information and the indicated downlink data TBS is shown in Table 6. As shown in Table 6, the 2-bit code point can be 11, which indicates that the downlink data TBS is a value greater than A3. When the TBS indication information indicates a TBS range, the device may need to determine the end of the downlink transmission by detecting the postamble. A1, A2, and A3 are positive integers greater than or equal to 1 and less than or equal to 50. For example, A1 = 8, A2 = 12, A3 = 16, or A1 = 8, A2 = 16, A3 = 24. In some embodiments, A3 is the maximum TBS value that does not require additional CRC.

[0165] Table 7

[0166] For example, the downlink TBS indication includes 1 bit (i.e., X = 1). There are a total of 2 possible values ​​(or code points). The relationship between the TBS indication information and the indicated downlink data TBS is shown in Table 7. As shown in Table 7, the 1-bit code point can be 1, which indicates that the downlink data TBS is a value greater than A1. When the TBS indication information indicates a TBS range, the device may need to determine the end of the downlink transmission by detecting the postamble. A1 is a positive integer greater than or equal to 1 and less than or equal to 30. For example, A1 = 8, or A1 = 16. In some embodiments, A1 is the maximum TBS value that does not require additional CRC.

[0167] In one embodiment, the downlink control information includes uplink transmission rate indication information. The rate indication information also implicitly indicates FEC (Flexible Encryption and Control) information. For example, when the rate indication information indicates a rate of A, it implicitly indicates that FEC is not used; when the rate indication information indicates a rate other than A, it implicitly indicates that FEC is used. In some embodiments, A is the maximum rate supported by the device. The device sends uplink signaling based on the received rate indication information.

[0168] In one embodiment, FIG2 is a flowchart of another data transmission method provided by an embodiment of this application. This embodiment can be executed by a second communication node. Exemplarily, the second communication node may include devices such as card readers and reader-writers; wherein, the reader-writer may include: a base station or user equipment; wherein, the user equipment may include: a smartphone or other access standard (e.g., 4G, 5G, etc.) terminal device. As shown in FIG2, this embodiment includes: S210.

[0169] S210. Send a preamble containing a transmission start indication portion and a chip length indication portion to the first communication node, so that the first communication node can receive data based on the preamble containing the transmission start indication portion and the chip length indication portion.

[0170] In one embodiment, the transmission start indication portion includes a first sub-block and / or a second sub-block.

[0171] In one embodiment, the first sub-block satisfies at least one of the following conditions: the first sub-block is symmetrical; the first sub-block is symmetrical from beginning to end; the first sub-block is symmetrical from beginning to end, and the first bit and the last bit in the first sub-block are both 1; the other bits in the first sub-block, except for the last bit, have a symmetrical structure; the first bit and the last two bits in the first sub-block have the same value; the first bit and the last two bits in the first sub-block are both 1; the first sub-block includes at least one high level of three or more consecutive chips; the first sub-block includes at least one low level of three or more consecutive chips; the maximum length of the consecutive high level in the second sub-block is less than the maximum length of the consecutive high level in the first sub-block; the maximum length of the consecutive low level in the second sub-block is greater than the maximum length of the consecutive low level in the first sub-block; the number of high-low level switching in the second sub-block is greater than the number of high-low level switching in the first sub-block; the number of high-low level switching in the second sub-block is equal to the number of high-low level switching in the first sub-block.

[0172] In one embodiment, the second sub-block satisfies at least one of the following conditions: the second sub-block is symmetrical; the second sub-block is symmetrical from beginning to end; the second sub-block is symmetrical from beginning to end, and the first bit and the last bit in the second sub-block are both 0; the length of the last consecutive low level in the second sub-block is greater than or equal to the length of the first chip; the second sub-block includes at least one high level of three or more consecutive chips; the second sub-block includes at least one low level of three or more consecutive chips; the maximum length of the consecutive high level in the second sub-block is less than the maximum length of the consecutive high level in the first sub-block; the maximum length of the consecutive low level in the second sub-block is greater than the maximum length of the consecutive low level in the first sub-block; the number of high-low level switching in the second sub-block is greater than the number of high-low level switching in the first sub-block; the number of high-low level switching in the second sub-block is equal to the number of high-low level switching in the first sub-block; the start level of the second sub-block is different from the end level of the first sub-block.

[0173] In one embodiment, the transmission start indication portion is related to the first chip number; wherein the first chip number is the number of chips contained in one OFDM symbol of the data portion.

[0174] In one embodiment, when the number of first chips is a first type value, the transmission start indication portion is first type information;

[0175] When the number of first chips is of the second type, the transmission start indication part is of the second type.

[0176] In one embodiment, the first type of value includes at least one of the following: 1; 2; 4; 6; 8; 12; and the second type of value includes at least one of the following: 12; 16; 24; 32.

[0177] In one embodiment, the first type of information occupies an integer number of OFDM symbols; the second type of information occupies a non-integer number of OFDM symbols.

[0178] In one embodiment, the second type of information is a combination of the first type of information and a continuous low-level sequence.

[0179] In one embodiment, the data transmission method applied to the second communication node further includes: determining the number of chips contained in the chip length indication portion based on the information type of the transmission start indication portion.

[0180] In one embodiment, the data transmission method applied to the second communication node further includes: determining the number of chips contained in the chip length indication portion based on the information type of the transmission start indication portion and the first chip quantity; wherein, the first chip quantity is the number of chips contained in one OFDM symbol of the data portion.

[0181] In one embodiment, the chip length indication portion includes at least one first bit; wherein the first bit indicates that the number of first chips in the data portion is equal to the number of chips in the chip length indication portion, or is equal to a derived value of the number of chips in the chip length indication portion.

[0182] In one embodiment, the number of chips included in the chip length indication portion is related to the number of first chips;

[0183] When the number of the first chip is less than or equal to 2, the number of chips in the chip length indication section is 3 or 4;

[0184] When the number of the first chip is greater than 2 and less than or equal to 16, the number of chips in the chip length indication section is 6, 7 or 9;

[0185] When the number of first chips is greater than 12, the number of chips in the chip length indicator is 5, 7, 9, 16 or 17.

[0186] In one embodiment, the data transmission method applied to the second communication node further includes: sending downlink control information to the first communication node; wherein the downlink control information includes downlink transport block size indication information; wherein the downlink transport block size indication information includes bits of a first value; the first value is a positive integer greater than or equal to 2 and less than or equal to 6; the bits of the first value include code points of a second value.

[0187] In one embodiment, at least one of the code points of the second value is used to indicate that the downlink transport block size is greater than a first threshold; wherein the first threshold is the downlink transport block size indicated by another value of the code points of the second value.

[0188] In one embodiment, at least one code point in the second numerical code point is used to indicate the downlink transport block size, and the second numerical code point further includes at least one code point used to indicate the range of the downlink transport block size.

[0189] In one embodiment, when the downlink control information includes downlink transport block size indication information indicating the downlink transport block size, the data portion is not followed by a terminator; when the downlink control information includes downlink transport block size indication information indicating a range of downlink transport block sizes, the data portion is followed by a terminator.

[0190] It should be noted that the explanation and determination process of parameters such as the transmission start indication part, chip length indication part, downlink TBS indication information, first sub-block, second sub-block, first type information, second type information, and number of first chips in the data transmission method applied to the second communication node can be found in the description of the corresponding parameters in the data transmission method applied to the first communication node, and will not be repeated here.

[0191] In one embodiment, FIG3 is a structural block diagram of a data transmission device provided in an embodiment of this application. This embodiment is applied to a first communication node. As shown in FIG3, the data transmission device in this embodiment includes: a receiving module 310 and a transmitting module 320.

[0192] The receiving module 310 is configured to receive a preamble sent by the second communication node; wherein the preamble includes a transmission start indication part and a chip length indication part.

[0193] The transmission module 320 is configured to receive data based on a preamble that includes a transmission start indication portion and a chip length indication portion.

[0194] In one embodiment, the transmission start indication portion includes a first sub-block and / or a second sub-block.

[0195] In one embodiment, the first sub-block satisfies at least one of the following conditions: the first sub-block is symmetrical; the first sub-block is symmetrical from beginning to end; the first sub-block is symmetrical from beginning to end, and the first bit and the last bit in the first sub-block are both 1; the other bits in the first sub-block, except for the last bit, have a symmetrical structure; the first bit and the last two bits in the first sub-block have the same value; the first bit and the last two bits in the first sub-block are both 1; the first sub-block includes at least one high level of three or more consecutive chips; the first sub-block includes at least one low level of three or more consecutive chips; the maximum length of the consecutive high level in the second sub-block is less than the maximum length of the consecutive high level in the first sub-block; the maximum length of the consecutive low level in the second sub-block is greater than the maximum length of the consecutive low level in the first sub-block; the number of high-low level switching in the second sub-block is greater than the number of high-low level switching in the first sub-block; the number of high-low level switching in the second sub-block is equal to the number of high-low level switching in the first sub-block.

[0196] In one embodiment, the second sub-block satisfies at least one of the following conditions: the second sub-block is symmetrical; the second sub-block is symmetrical from beginning to end; the second sub-block is symmetrical from beginning to end, and the first bit and the last bit in the second sub-block are both 0; the length of the last consecutive low level in the second sub-block is greater than or equal to the length of the first chip; the second sub-block includes at least one high level of three or more consecutive chips; the second sub-block includes at least one low level of three or more consecutive chips; the maximum length of the consecutive high level in the second sub-block is less than the maximum length of the consecutive high level in the first sub-block; the maximum length of the consecutive low level in the second sub-block is greater than the maximum length of the consecutive low level in the first sub-block; the number of high-low level switching in the second sub-block is greater than the number of high-low level switching in the first sub-block; the number of high-low level switching in the second sub-block is equal to the number of high-low level switching in the first sub-block; the start level of the second sub-block is different from the end level of the first sub-block.

[0197] In one embodiment, the transmission start indication portion is related to the first chip number; wherein the first chip number is the number of chips contained in one OFDM symbol of the data portion.

[0198] In one embodiment, when the number of first chips is a first type value, the transmission start indication portion is first type information;

[0199] When the number of first chips is of the second type, the transmission start indication part is of the second type.

[0200] In one embodiment, the first type of value includes at least one of the following: 1; 2; 4; 6; 8; 12; and the second type of value includes at least one of the following: 12; 16; 24; 32.

[0201] In one embodiment, the first type of information occupies an integer number of OFDM symbols; the second type of information occupies a non-integer number of OFDM symbols.

[0202] In one embodiment, the second type of information is a combination of the first type of information and a continuous low-level sequence.

[0203] In one embodiment, the data transmission device applied to the first communication node further includes:

[0204] The module is configured to determine the number of chips contained in the chip length indication section based on the information type of the transmission start indication section.

[0205] In one embodiment, the data transmission device applied to the first communication node further includes:

[0206] The determination module is configured to determine the number of chips contained in the chip length indication section based on the information type of the transmission start indication section and the number of first chips; wherein, the number of first chips is the number of chips contained in one OFDM symbol of the data section.

[0207] In one embodiment, the chip length indication portion includes at least one first bit; wherein the first bit indicates that the number of first chips in the data portion is equal to the number of chips in the chip length indication portion, or is equal to a derived value of the number of chips in the chip length indication portion.

[0208] In one embodiment, the number of chips included in the chip length indication portion is related to the number of first chips;

[0209] When the number of the first chip is less than or equal to 2, the number of chips in the chip length indication section is 3 or 4;

[0210] When the number of the first chip is greater than 2 and less than or equal to 16, the number of chips in the chip length indication section is 6, 7 or 9;

[0211] When the number of first chips is greater than 12, the number of chips in the chip length indicator is 5, 7, 9, 16 or 17.

[0212] In one embodiment, the data transmission method applied to the first communication node further includes: receiving downlink control information sent by the second communication node; wherein the downlink control information includes downlink transport block size indication information; wherein the downlink transport block size indication information includes bits of a first value; the first value is a positive integer greater than or equal to 1 and less than or equal to 6; the bits of the first value include code points of a second value.

[0213] In one embodiment, at least one of the code points of the second value is used to indicate that the downlink transport block size is greater than a first threshold; wherein the first threshold is the downlink transport block size indicated by another value of the code points of the second value.

[0214] In one embodiment, at least one code point in the second numerical code point is used to indicate the downlink transport block size, and the second numerical code point further includes at least one code point used to indicate the range of the downlink transport block size.

[0215] In one embodiment, when the downlink control information includes a downlink transport block size indication that indicates the downlink transport block size, there is no end-of-line character after the data portion; when the downlink control information includes a downlink transport block size indication that indicates a range of downlink transport block sizes, there is an end-of-line character after the data portion.

[0216] The data transmission device provided in this embodiment is configured to implement the data transmission method applied to the first communication node in the embodiment shown in FIG1. ​​The implementation principle and technical effect of the data transmission device provided in this embodiment are similar, and will not be described again here.

[0217] In one embodiment, FIG4 is a structural block diagram of another data transmission device provided in this application. This embodiment is applied to a second communication node. As shown in FIG4, the data transmission device in this embodiment includes: a sending module 410.

[0218] The transmitting module 410 is configured to send a preamble containing a transmission start indication portion and a chip length indication portion to the first communication node, so that the first communication node can receive data based on the preamble containing the transmission start indication portion and the chip length indication portion.

[0219] In one embodiment, the transmission start indication portion includes a first sub-block and / or a second sub-block.

[0220] In one embodiment, the first sub-block satisfies at least one of the following conditions: the first sub-block is symmetrical; the first sub-block is symmetrical from beginning to end; the first sub-block is symmetrical from beginning to end, and the first bit and the last bit in the first sub-block are both 1; the other bits in the first sub-block, except for the last bit, have a symmetrical structure; the first bit and the last two bits in the first sub-block have the same value; the first bit and the last two bits in the first sub-block are both 1; the first sub-block includes at least one high level of three or more consecutive chips; the first sub-block includes at least one low level of three or more consecutive chips; the maximum length of the consecutive high level in the second sub-block is less than the maximum length of the consecutive high level in the first sub-block; the maximum length of the consecutive low level in the second sub-block is greater than the maximum length of the consecutive low level in the first sub-block; the number of high-low level switching in the second sub-block is greater than the number of high-low level switching in the first sub-block; the number of high-low level switching in the second sub-block is equal to the number of high-low level switching in the first sub-block.

[0221] In one embodiment, the second sub-block satisfies at least one of the following conditions: the second sub-block is symmetrical; the second sub-block is symmetrical from beginning to end; the second sub-block is symmetrical from beginning to end, and the first bit and the last bit in the second sub-block are both 0; the length of the last consecutive low level in the second sub-block is greater than or equal to the length of the first chip; the second sub-block includes at least one high level of three or more consecutive chips; the second sub-block includes at least one low level of three or more consecutive chips; the maximum length of the consecutive high level in the second sub-block is less than the maximum length of the consecutive high level in the first sub-block; the maximum length of the consecutive low level in the second sub-block is greater than the maximum length of the consecutive low level in the first sub-block; the number of high-low level switching in the second sub-block is greater than the number of high-low level switching in the first sub-block; the number of high-low level switching in the second sub-block is equal to the number of high-low level switching in the first sub-block; the start level of the second sub-block is different from the end level of the first sub-block.

[0222] In one embodiment, the transmission start indication portion is related to the first chip number; wherein the first chip number is the number of chips contained in one OFDM symbol of the data portion.

[0223] In one embodiment, when the number of first chips is a first type value, the transmission start indication portion is first type information;

[0224] When the number of first chips is of the second type, the transmission start indication part is of the second type.

[0225] In one embodiment, the first type value includes at least one of the following: 1; 2; 4; 6; 8; 12; and the second type value includes at least one of the following: 12; 16; 24; 32.

[0226] In one embodiment, the first type of information occupies an integer number of OFDM symbols; the second type of information occupies a non-integer number of OFDM symbols.

[0227] In one embodiment, the second type of information is a combination of the first type of information and a continuous low-level sequence.

[0228] In one embodiment, the data transmission device applied to the second communication node further includes:

[0229] The determining module is configured to determine the number of chips contained in the chip length indicating portion based on the information type of the transmission start indicating portion.

[0230] In one embodiment, the data transmission device applied to the second communication node further includes:

[0231] The determining module is configured to determine the number of chips contained in the chip length indicating portion based on the information type of the transmission start indicating portion and the first chip quantity; wherein, the first chip quantity is the number of chips contained in one OFDM symbol of the data portion.

[0232] In one embodiment, the chip length indication portion includes at least one first bit; wherein the first bit indicates that the number of first chips in the data portion is equal to the number of chips in the chip length indication portion, or is equal to a derived value of the number of chips in the chip length indication portion.

[0233] In one embodiment, the number of chips included in the chip length indication portion is related to the number of first chips;

[0234] When the number of the first chip is less than or equal to 2, the number of chips in the chip length indication section is 3 or 4;

[0235] When the number of the first chip is greater than 2 and less than or equal to 16, the number of chips in the chip length indication section is 6, 7 or 9;

[0236] When the number of first chips is greater than 12, the number of chips in the chip length indicator is 5, 7, 9, 16 or 17.

[0237] In one embodiment, the data transmission method applied to the second communication node further includes: sending downlink control information to the first communication node; wherein the downlink control information includes downlink transport block size indication information; wherein the downlink transport block size indication information includes bits of a first value; the first value is a positive integer greater than or equal to 2 and less than or equal to 6; the bits of the first value include code points of a second value.

[0238] In one embodiment, at least one of the code points of the second value is used to indicate that the downlink transport block size is greater than a first threshold; wherein the first threshold is the downlink transport block size indicated by another value of the code points of the second value.

[0239] In one embodiment, at least one code point in the second numerical code point is used to indicate the downlink transport block size, and the second numerical code point further includes at least one code point used to indicate the range of the downlink transport block size.

[0240] In one embodiment, when the downlink control information includes a downlink transport block size indication that indicates the downlink transport block size, there is no end-of-line character after the data portion; when the downlink control information includes a downlink transport block size indication that indicates a range of downlink transport block sizes, there is an end-of-line character after the data portion.

[0241] The data transmission device provided in this embodiment is configured to implement the data transmission method applied to the second communication node in the embodiment shown in Figure 2. The implementation principle and technical effect of the data transmission device provided in this embodiment are similar, and will not be described again here.

[0242] In one embodiment, FIG5 is a schematic diagram of the structure of a communication device provided in this application. As shown in FIG5, the device provided in this application includes: a processor 510, a memory 520, and a communication module 530. The number of processors 510 in the device can be one or more; FIG5 shows one processor 510 as an example. The number of memories 520 in the device can be one or more; FIG5 shows one memory 520 as an example. The processor 510, memory 520, and communication module 530 of the device can be connected via a bus or other means; FIG5 shows a connection via a bus as an example. In this embodiment, the device can be a first communication node or a second communication node.

[0243] The memory 520, as a computer-readable storage medium, can be configured to store software programs, computer-executable programs, and modules, such as program instructions / modules corresponding to the device in any embodiment of this application (e.g., receiving module 310 and transmitting module 320 applied to the data transmission apparatus of the first communication node). The memory 520 may include a program storage area and a data storage area, wherein the program storage area may store an operating system and an application program required for at least one function; the data storage area may store data created according to the use of the device, etc. Furthermore, the memory 520 may include high-speed random access memory and may also include non-volatile memory, such as at least one disk storage device, flash memory device, or other non-volatile solid-state storage device. In some instances, the memory 520 may further include memory remotely located relative to the processor 510, and these remote memories can be connected to the device via a network. Examples of such networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof.

[0244] When the communication device is the first communication node, the device provided above can be configured to execute the data transmission method applied to the first communication node provided in any of the above embodiments, and has the corresponding functions and effects.

[0245] When the communication device is a second communication node, the device provided above can be configured to execute the data transmission method for the second communication node provided in any of the above embodiments, and has the corresponding functions and effects.

[0246] This application also provides a storage medium containing computer-executable instructions. When executed by a computer processor, the computer-executable instructions are used to perform a data transmission method applied to a first communication node. The method includes: receiving a preamble sent by a second communication node; wherein the preamble includes a transmission start indication portion and a chip length indication portion; and receiving data based on the preamble including the transmission start indication portion and the chip length indication portion.

[0247] This application also provides a storage medium containing computer-executable instructions. When executed by a computer processor, the computer-executable instructions are used to perform a data transmission method applied to a second communication node. The method includes: sending a preamble containing a transmission start indication portion and a chip length indication portion to a first communication node, so that the first communication node receives data based on the preamble containing the transmission start indication portion and the chip length indication portion.

[0248] Those skilled in the art will understand that the term user equipment covers any suitable type of wireless user equipment, such as mobile phones, portable data processing devices, portable web browsers, or vehicle-mounted mobile stations.

[0249] Generally, the various embodiments of this application can be implemented in hardware or dedicated circuitry, software, logic, or any combination thereof. For example, some aspects can be implemented in hardware, while others can be implemented in firmware or software that can be executed by a controller, microprocessor, or other computing device, although this application is not limited thereto.

[0250] Embodiments of this application can be implemented by executing computer program instructions through the data processor of a mobile device, for example, in a processor entity, or through hardware, or through a combination of software and hardware. The computer program instructions can be assembly instructions, Instruction Set Architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, status setting data, or source code or object code written in any combination of one or more programming languages.

[0251] Any block diagram of logical flow in the accompanying drawings of this application may represent program steps, or may represent interconnected logic circuits, modules, and functions, or may represent a combination of program steps and logic circuits, modules, and functions. The computer program may be stored on memory. The memory may be of any type suitable to the local technical environment and may be implemented using any suitable data storage technology, such as, but not limited to, read-only memory (ROM), random access memory (RAM), optical storage devices and systems (Digital Video Disc (DVD) or Compact Disk (CD)), etc. Computer-readable media may include non-transitory storage media. The data processor may be of any type suitable to the local technical environment, such as, but not limited to, general-purpose computers, special-purpose computers, microprocessors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), and processors based on multi-core processor architectures.

[0252] This application also provides a computer program product, including a computer program that, when executed by a processor, can implement the data transmission method provided in any embodiment of this application.

[0253] In the implementation of the computer program product, computer program code for performing the operations of this application can be written in one or more programming languages ​​or a combination thereof. Programming languages ​​include object-oriented programming languages ​​such as Java, Smalltalk, and C++, as well as conventional procedural programming languages ​​such as C or similar languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving remote computers, the remote computer can be connected to the user's computer through any type of network—including a Local Area Network (LAN) or a Wide Area Network (WAN)—or can be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0254] The above are merely preferred embodiments of this application and are not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A data transmission method, applied to a first communication node, comprising: Receive a preamble sent by a second communication node; wherein the preamble includes a transmission start indication portion and a chip length indication portion; Data reception is performed based on a preamble that includes the transmission start indication portion and the chip length indication portion.

2. The method according to claim 1, wherein, The transmission start indication portion includes at least one of a first sub-block and a second sub-block.

3. The method according to claim 2, wherein, The first sub-block satisfies at least one of the following conditions: the first sub-block is symmetrical; the first sub-block is symmetrical from beginning to end; the first sub-block is symmetrical from beginning to end, and the first bit and the last bit in the first sub-block are both 1; the bits in the first sub-block, except for the last bit, have a symmetrical structure; the first bit and the last two bits in the first sub-block have the same value; the first bit and the last two bits in the first sub-block are both 1; the first sub-block includes at least one high level of three or more consecutive chips; the first sub-block includes at least one low level of three or more consecutive chips; the maximum length of the consecutive high level in the second sub-block is less than the maximum length of the consecutive high level in the first sub-block; the maximum length of the consecutive low level in the second sub-block is greater than the maximum length of the consecutive low level in the first sub-block; the number of high-low level switching in the second sub-block is greater than the number of high-low level switching in the first sub-block; the number of high-low level switching in the second sub-block is equal to the number of high-low level switching in the first sub-block.

4. The method according to claim 2, wherein, The second sub-block satisfies at least one of the following conditions: the second sub-block is symmetrical; the second sub-block is symmetrical from beginning to end; the second sub-block is symmetrical from beginning to end, and the first bit and the last bit in the second sub-block are both 0; the length of the last consecutive low level in the second sub-block is greater than or equal to the length of the first chip; the second sub-block includes at least one high level of three or more consecutive chips; the second sub-block includes at least one low level of three or more consecutive chips; the maximum length of the consecutive high level in the second sub-block is less than the maximum length of the consecutive high level in the first sub-block; the maximum length of the consecutive low level in the second sub-block is greater than the maximum length of the consecutive low level in the first sub-block; the number of high-low level switching in the second sub-block is greater than the number of high-low level switching in the first sub-block; the number of high-low level switching in the second sub-block is equal to the number of high-low level switching in the first sub-block; the start level of the second sub-block is different from the end level of the first sub-block.

5. The method according to claim 1, wherein, The transmission start indication portion is related to the first chip number; wherein the first chip number is the number of chips contained in one OFDM symbol of the data portion.

6. The method according to claim 5, wherein, When the number of the first chips is a value of the first type, the transmission start indication portion is information of the first type; When the number of the first chips is a second type value, the transmission start indication portion is second type information.

7. The method according to claim 6, wherein, The first type of value includes at least one of the following: 1; 2; 4; 6; 8; 12; the second type of value includes at least one of the following: 12; 16; 24; 32.

8. The method according to claim 6, wherein, The first type of information occupies an integer number of OFDM symbols; the second type of information occupies a non-integer number of OFDM symbols.

9. The method according to claim 6, wherein, The second type of information is a combination of the first type of information and a continuous low-level sequence.

10. The method according to claim 1, further comprising: The number of chips contained in the chip length indication portion is determined based on the information type of the transmission start indication portion.

11. The method according to claim 1, further comprising: The number of chips contained in the chip length indication portion is determined based on the information type of the transmission start indication portion and the number of first chips; wherein, the number of first chips is the number of chips contained in one OFDM symbol of the data portion.

12. The method according to claim 1, wherein, The chip length indication portion includes at least one first bit; wherein the first bit indicates that the number of first chips in the data portion is equal to the number of chips in the chip length indication portion, or the first bit indicates that the number of first chips in the data portion is equal to a derived value of the number of chips in the chip length indication portion.

13. The method according to claim 1, wherein, The number of chips included in the chip length indication portion is related to the number of the first chip; When the number of the first chip is less than or equal to 2, the number of chips in the chip length indication portion is 3 or 4; When the number of the first chips is greater than 2 and less than or equal to 16, the number of chips in the chip length indication portion is 6, 7 or 9; When the number of the first chips is greater than 12, the number of chips in the chip length indication portion is 5, 7, 9, 16 or 17.

14. The method according to any one of claims 1-13, further comprising: The system receives downlink control information sent by a second communication node; wherein the downlink control information includes downlink transport block size indication information; wherein the downlink transport block size indication information includes bits of a first value; the first value is a positive integer greater than or equal to 1 and less than or equal to 6; the bits of the first value include code points of a second value.

15. The method according to claim 14, wherein, At least one of the code points of the second value is used to indicate that the downlink transport block size is greater than a first threshold; wherein the first threshold is the downlink transport block size indicated by another value of the code points of the second value.

16. The method of claim 14, wherein, At least one code point in the second numerical code point is used to indicate the downlink transport block size, and the second numerical code point also includes at least one code point used to indicate the range of the downlink transport block size.

17. The method according to claim 16, wherein, When the downlink control information includes a downlink transport block size indication that indicates the downlink transport block size, there is no end-of-line character after the data portion; when the downlink control information includes a downlink transport block size indication that indicates a range of downlink transport block sizes, there is an end-of-line character after the data portion.

18. A data transmission method, applied to a second communication node, comprising: A preamble containing a transmission start indication portion and a chip length indication portion is sent to a first communication node, so that the first communication node can receive data based on the preamble containing the transmission start indication portion and the chip length indication portion.

19. The method of claim 18, further comprising: Send downlink control information to the first communication node; wherein the downlink control information includes downlink transport block size indication information; wherein the downlink transport block size indication information includes bits of a first value; the first value is a positive integer greater than or equal to 1 and less than or equal to 6; the bits of the first value include code points of a second value.

20. A communication device, comprising: Memory, and at least one processor; The memory is configured to store at least one program; When the at least one program is executed by the at least one processor, the at least one processor performs the method as described in any one of claims 1-17 or 18-19.

21. A storage medium storing a computer program that, when executed by a processor, implements the method as described in any one of claims 1-17 or 18-19.

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