Display panel and display apparatus

Abstract

The present application relates to the technical field of display. Disclosed are a display panel and a display apparatus. The display panel comprises a base substrate, a plurality of light-emitting units, a pixel defining layer, an isolation layer, a support layer, and an encapsulation layer. Isolation columns in the isolation layer may be located between adjacent light-emitting units to block light rays emitted by the adjacent light-emitting units, thereby reducing light ray crosstalk and improving the display effect. In addition, the support layer may be configured to support the encapsulation layer, thus avoiding deformation of the encapsulation layer, and ensuring reliability of the display panel.

Description

Display panel and display device

[0001] This disclosure claims priority to Chinese Patent Application No. 202510104850.4, filed on January 22, 2025, entitled “Display Panel and Display Device”, the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of display technology, and in particular to a display panel and display device. Background Technology

[0003] With the rapid development of the information age, OLED (Organic Light-Emitting Diode) display technology has gradually become an indispensable part of display technology due to its advantages such as self-illumination, wide viewing angle, thinness, low energy consumption, and flexibility. Summary of the Invention

[0004] This application provides a display panel and a display device, the technical solution of which is as follows:

[0005] On one hand, a display panel is provided, characterized in that the display panel comprises:

[0006] A substrate, the substrate including a display area and a peripheral area surrounding the display area;

[0007] Multiple light-emitting units are located in the display area and are used to emit light.

[0008] A pixel defining layer is located on one side of the substrate, and the pixel defining layer includes a plurality of pixel openings located in the display area and corresponding to the plurality of light-emitting units;

[0009] An isolation layer, the isolation layer including a plurality of isolation pillars located in the display area, the isolation pillars being located on the side of the pixel defining layer away from the substrate, and the orthographic projection of the isolation pillars on the substrate and the orthographic projection of the pixel opening on the substrate not overlapping;

[0010] A support layer is located on the side of the pixel defining layer away from the substrate. The orthographic projection of the support layer on the substrate and the orthographic projection of the pixel opening on the substrate do not overlap, and the orthographic projection of the isolation pillar on the substrate do not overlap.

[0011] And an encapsulation layer, which is located on the side of the support layer away from the substrate, and is used to encapsulate the plurality of light-emitting units.

[0012] Optionally, the support layer includes a plurality of support portions, wherein the orthographic projection of the support portion on the substrate and the orthographic projection of the light-emitting unit on the substrate do not overlap, and the orthographic projection of each support portion on the substrate is located on one side of the orthographic projection of the light-emitting unit on the substrate.

[0013] Optionally, the support portion is provided around the orthographic projection of each of the light-emitting units on the substrate.

[0014] Optionally, the shape of the orthographic projection of the light-emitting unit on the substrate is polygonal;

[0015] The support layer includes a plurality of support portions located around the light-emitting unit and corresponding to the number of sides of the polygon; each support portion is located on one side of the corresponding side of the orthographic projection of the light-emitting unit onto the substrate.

[0016] Optionally, the display panel is a rigid display panel.

[0017] Optionally, the plurality of light-emitting units includes a plurality of first-type light-emitting units and a plurality of second-type light-emitting units;

[0018] The support portion is provided on at least one side of the orthogonal projection of the first type of light-emitting unit onto the substrate.

[0019] The second type of light-emitting unit does not have the support portion provided on the side of its orthogonal projection on the substrate.

[0020] Optionally, the display panel is a flexible display panel.

[0021] Optionally, the orthographic projection of the support portion on the substrate is located between the orthographic projections of adjacent light-emitting units on the substrate.

[0022] Optionally, the orthographic projection of the isolation post on the substrate is located between the orthographic projections of two adjacent support portions on the substrate, or...

[0023] The orthographic projection of the isolation pillar on the substrate lies between the orthographic projection of the support portion on the substrate and the orthographic projection of the light-emitting unit on the substrate, or,

[0024] The orthographic projection of the isolation pillar on the substrate is located between the orthographic projections of two adjacent light-emitting units on the substrate.

[0025] Optionally, the display panel includes a light-emitting unit layer, which includes the plurality of light-emitting units; the light-emitting unit layer includes: a first electrode layer, a first light-emitting functional layer, a charge-generating layer, a second light-emitting functional layer, and a second electrode layer stacked together.

[0026] The first electrode layer includes the first electrode pattern of the plurality of light-emitting units, and both the first light-emitting functional layer and the second light-emitting functional layer include a light-emitting layer, which includes the light-emitting pattern of the plurality of light-emitting units. The charge-generating layer is isolated at the isolation pillar.

[0027] Optionally, the charge-generating layer includes a portion located on the side of the support portion away from the substrate; the cross-sectional shape of the support portion is an inverted trapezoid or a stepped shape;

[0028] The cross-section is perpendicular to the bearing surface of the substrate and parallel to the arrangement direction of the support and the light-emitting unit.

[0029] Optionally, the isolation layer includes: a first isolation layer and a second isolation layer stacked along a direction away from the pixel defining layer and away from the substrate;

[0030] The isolation pillar includes a first isolation pillar portion located in the first isolation layer and a second isolation pillar portion located in the second isolation layer; the orthogonal projection of the first isolation pillar portion on the substrate is located inside the orthogonal projection of the second isolation pillar portion on the substrate.

[0031] The first insulating layer is made of a conductive material, and the second electrode layer includes a second electrode pattern, which is electrically connected to the first insulating pillar portion.

[0032] Optionally, the isolation layer further includes an isolation wall located in the peripheral area, wherein the orthographic projection of the isolation wall on the substrate at least partially surrounds the orthographic projection of the plurality of light-emitting units on the substrate;

[0033] The isolation wall includes a first isolation wall portion located in the first isolation layer and a second isolation wall portion located in the second isolation layer; the orthographic projection of the first isolation wall portion on the substrate is located inside the orthographic projection of the second isolation wall portion on the substrate.

[0034] The second electrode pattern in the second electrode layer is also electrically connected to the first isolation wall portion.

[0035] Optionally, the display panel further includes: a conductive patterning layer and a third electrode layer;

[0036] The conductive patterned layer includes a first conductive patterned portion located within the pixel opening, the first conductive patterned portion being located on the side of the second electrode pattern away from the substrate, and the first conductive patterned portion exposing at least a portion of the second electrode pattern;

[0037] The third electrode layer includes a third electrode pattern, which is electrically connected to at least a portion of the second electrode pattern exposed by the first conductive patterned portion, and the third electrode pattern is also electrically connected to a portion of the first isolation pillar.

[0038] Optionally, the second partition wall portion includes a first portion located on the first partition wall portion and a second portion extending beyond the first partition wall portion;

[0039] The width of the side of the second part closer to the display area is greater than the width of the side of the second part farther from the display area.

[0040] Optionally, the distance between the side of the support layer away from the substrate and the substrate is greater than the distance between the side of the isolation layer away from the substrate and the substrate.

[0041] Optionally, the plurality of light-emitting units include: a first light-emitting unit, a second light-emitting unit, and a third light-emitting unit;

[0042] The first light-emitting unit, the second light-emitting unit, and the third light-emitting unit emit different colors.

[0043] On the other hand, a display device is provided, the display device comprising: a power supply component and a display panel as described above;

[0044] The power supply component is connected to the display panel, and the power supply component is used to supply power to the display panel. Attached Figure Description

[0045] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0046] Figure 1 is a partial cross-sectional schematic diagram of a display panel provided in an embodiment of this application;

[0047] Figure 2 is a top view of a substrate provided in an embodiment of this application;

[0048] Figure 3 is a schematic diagram of the stacking of a multilayer light-emitting device provided in an embodiment of this application;

[0049] Figure 4 is a cross-sectional schematic diagram of a support layer provided in an embodiment of this application;

[0050] Figure 5 is a top view of an isolation wall provided in an embodiment of this application;

[0051] Figure 6 is a partial cross-sectional schematic diagram of another display panel provided in an embodiment of this application;

[0052] Figure 7 is a partial cross-sectional schematic diagram of the peripheral area of ​​a display panel provided in an embodiment of this application;

[0053] Figure 8 is a top view of a first mask opening, a second mask opening, and a third mask opening provided in an embodiment of this application;

[0054] Figure 9 is a schematic diagram of light interference of a light-emitting unit provided in an embodiment of this application;

[0055] Figure 10 is a schematic diagram of the deformation of the encapsulation layer provided in an embodiment of this application;

[0056] Figure 11 is a partial top view of a light-emitting unit, an isolation column, and a support provided in an embodiment of this application;

[0057] Figure 12 is a partial top view of a light-emitting unit and a support provided in an embodiment of this application;

[0058] Figure 13 is a partial top view of another light-emitting unit, isolation column and support provided in an embodiment of this application;

[0059] Figure 14 is a partial top view of another light-emitting unit, isolation column and support provided in an embodiment of this application;

[0060] Figure 15 is a schematic diagram of the structure of a display device provided in an embodiment of this application. Detailed Implementation

[0061] To make the objectives, technical solutions, and advantages of this application clearer, the embodiments of this application will be described in further detail below with reference to the accompanying drawings.

[0062] In related technologies, a display panel includes a substrate and multiple light-emitting units located in the display area of ​​the substrate. The light-emitting units are used to emit light.

[0063] However, crosstalk may occur between light emitted from adjacent light-emitting units in the display panel, resulting in poor display performance.

[0064] Figure 1 is a partial cross-sectional schematic diagram of a display panel provided in an embodiment of this application. Referring to Figure 1, the display panel 100 includes: a substrate 101, a plurality of light-emitting units 102, a pixel defining layer 103, an isolation layer 104, a support layer 105, and an encapsulation layer 106. Optionally, the substrate 101 may be a glass substrate.

[0065] Referring to FIG2, the substrate 101 includes a display area 101a and a peripheral area 102b surrounding the display area 101a. A plurality of light-emitting units 102 are located in the display area 101a, and the light-emitting units 102 are used to emit light.

[0066] The pixel defining layer 103 is located on one side of the substrate 101, and the pixel defining layer 103 includes a plurality of pixel openings 103a located in the display area 101a and corresponding to a plurality of light-emitting units 102.

[0067] The isolation layer 104 includes a plurality of isolation pillars 1041 located in the display area 101a. The isolation pillars 1041 are located on the side of the pixel defining layer 103 away from the substrate 101, and the orthographic projections of the isolation pillars 1041 on the substrate 101 and the orthographic projections of the pixel openings 103a on the substrate 101 do not overlap. This prevents the isolation pillars 1041 from affecting the light emission effect of the corresponding light-emitting unit 102 at the pixel opening 103a. Furthermore, since the orthographic projections of the isolation pillars 1041 on the substrate 101 and the pixel openings 103a on the substrate 101 do not overlap, the orthographic projections of the isolation pillars 1041 on the substrate 101 can be located between the orthographic projections of adjacent pixel openings 103a on the substrate 101. This allows the isolation pillars 1041 to block light emitted from adjacent light-emitting units 102, reducing crosstalk between adjacent light-emitting units 102 and improving the display effect.

[0068] The support layer 105 is located on the side of the pixel defining layer 103 away from the substrate 101. The orthographic projection of the support layer 105 on the substrate 101 does not overlap with the orthographic projection of the pixel opening 103a on the substrate 101, nor does it overlap with the orthographic projection of the isolation pillar 1041 on the substrate 101. For example, a portion of the pixel defining layer 103 on the side away from the substrate 101 may be provided with the support layer 105, and another portion may be provided with the isolation pillar 1041.

[0069] The encapsulation layer 106 is located on the side of the support layer 105 away from the substrate 101, and the encapsulation layer 106 can be used to encapsulate multiple light-emitting units 102. The support layer 105 can be used to provide support for the encapsulation layer 106, thereby preventing deformation of the encapsulation layer 106 and ensuring the reliability of the display panel 100. Optionally, the encapsulation layer 106 can be glass.

[0070] In summary, this application provides a display panel comprising a substrate, multiple light-emitting units, a pixel defining layer, an isolation layer, a support layer, and an encapsulation layer. The isolation pillars in the isolation layer can be located between adjacent light-emitting units to block light emitted by adjacent units, reducing crosstalk and improving display performance. Furthermore, the support layer can support the encapsulation layer, preventing deformation and ensuring the reliability of the display panel.

[0071] Referring to Figure 1, the support layer 105 includes multiple support portions 1051 (one support portion 1051 is shown in Figure 1). The orthographic projection of the support portion 1051 on the substrate 101 and the orthographic projection of the light-emitting unit 102 on the substrate 101 do not overlap, and the orthographic projection of each support portion 1051 on the substrate 101 is located on one side of the orthographic projection of the light-emitting unit 102 on the substrate 101. Since the support portion 1051 and the light-emitting unit 102 in the support layer 105 do not overlap, the support portion 1051 can avoid affecting the normal light emission of the light-emitting unit 102.

[0072] In this embodiment, the plurality of light-emitting units 102 may include a first light-emitting unit, a second light-emitting unit, and a third light-emitting unit. The first light-emitting unit, the second light-emitting unit, and the third light-emitting unit emit different colors.

[0073] Optionally, the first light-emitting unit emits red light, and can be a red light-emitting unit. The second light-emitting unit emits green light, and can be a green light-emitting unit. The third light-emitting unit emits blue light, and can be a blue light-emitting unit.

[0074] Optionally, the size of the light-emitting region of the light-emitting unit 102 can be different for different light-emitting colors. For example, the relationship between the sizes of the light-emitting regions of different light-emitting units 102 can be determined based on the luminous efficiency or lifetime of different light-emitting colors. For instance, the size of the light-emitting region of a blue light-emitting unit can be larger than the size of the light-emitting region of a red light-emitting unit, and also larger than the size of the light-emitting region of a green light-emitting unit. The size of the light-emitting region of a red light-emitting unit can be larger than the size of the light-emitting region of a green light-emitting unit.

[0075] In this embodiment, the display panel 100 may include a light-emitting unit layer. The light-emitting unit layer may include a plurality of light-emitting units 102. The light-emitting unit 102 may be a single-layer light-emitting device or a tandem light-emitting device. When the light-emitting unit 102 is a tandem light-emitting device, referring to FIG3, the light-emitting unit layer may include: a first electrode layer b1, a first light-emitting functional layer b2, a charge-generating layer b3, a second light-emitting functional layer b4, and a second electrode layer b5 stacked together.

[0076] The first electrode layer b1 includes a first electrode pattern b11 of multiple light-emitting units 102, and both the first light-emitting functional layer b2 and the second light-emitting functional layer b4 include light-emitting layers. Each light-emitting layer includes the light-emitting pattern of multiple light-emitting units 102. Furthermore, both the first light-emitting functional layer b2 and the second light-emitting functional layer b4 also include a hole transport layer and an electron transport layer. The hole transport layer, electron transport layer, and charge generation layer b3 can be isolated at the isolation pillar 1041. This avoids mutual interference between signals transmitted in the hole transport layer, electron transport layer, and charge generation layer b3 at different locations of the light-emitting units 102, ensuring the reliability of the light emission from the light-emitting unit 102.

[0077] In this embodiment, since the charge generation layer b3 is a single-layer deposited film, it can include not only the portion located inside the pixel opening 103a, but also the portion located on the side of the support portion 1051 away from the substrate 101, or the portion located on the side of the isolation pillar 1041 away from the substrate 101. The isolation pillar 1041 can isolate the charge generation layer b3, so the light-emitting unit 102 adjacent to the isolation pillar 1041 will not experience increased light crosstalk due to the presence of the charge generation layer b3. Furthermore, the charge transfer path can be extended by shaping the support portion 1051 to reduce light crosstalk between adjacent light-emitting units 102 and improve the display effect.

[0078] Optionally, referring to Figure 1, the cross-section of the support portion 1051 has a convex arc shape on the side away from the substrate 101. Alternatively, the cross-section of the support portion 1051 can be an inverted trapezoid or a step shape. For example, in Figure 4, the cross-section of the support portion 1051 is step-shaped. The cross-section is perpendicular to the bearing surface of the substrate 101 and parallel to the arrangement direction of the support portion 1051 and the light-emitting unit 102.

[0079] When the cross-sectional shape of the support portion 1051 is an inverted trapezoid or a boss shape, the length of the charge generation layer b3 formed on the side of the support portion 1051 away from the substrate 101 can be extended, thereby extending the charge transfer path of the adjacent light-emitting unit 102.

[0080] Referring to Figure 1, the isolation layer 104 includes a first isolation layer a1 and a second isolation layer a2 stacked along a direction away from the pixel defining layer 103 and away from the substrate 101. The isolation pillar 1041 includes a first isolation pillar portion 10411 located in the first isolation layer a1 and a second isolation pillar portion 10412 located in the second isolation layer a2. The orthographic projection of the first isolation pillar portion 10411 onto the substrate 101 is located inside the orthographic projection of the second isolation pillar portion 10412 onto the substrate 101.

[0081] The function of the isolation pillar 1041 is to isolate the common layer in the light-emitting unit layer. The common layer may include, but is not limited to, the hole transport layer, the electron transport layer, and the charge generation layer b3. For example, when forming the hole transport layer, the electron transport layer, and the charge generation layer b3, the design of the isolation pillar 1041 can cause the hole transport layer, the electron transport layer, and the charge generation layer b3 to break at the boundary of the isolation pillar 1041, thereby reducing crosstalk.

[0082] Optionally, the material of the first isolation layer a1 may include a conductive material, and the second electrode layer b5 and the first isolation pillar portion 10411 are electrically connected. That is, the first isolation pillar portion 10411 of the isolation pillar 1041 can serve as an auxiliary electrode for the second electrode layer b5. The material of the second isolation layer a2 may include a conductive material or may not include a conductive material.

[0083] Optionally, the first electrode layer b1 can be an anode layer, the second electrode layer b5 can be a cathode layer, and the first isolation column portion 10411 of the isolation column 1041 can be an auxiliary cathode.

[0084] In this embodiment, the hole transport layer, electron transport layer, and charge generation layer b3 are all integrally vapor-deposited. Therefore, the surface of the isolation pillar 104 away from the substrate 101 can also have the hole transport layer, electron transport layer, and charge generation layer b3. Of course, the hole transport layer, electron transport layer, and charge generation layer b3 on the surface of the isolation pillar 104 away from the substrate 101 can also be removed by photolithography. For example, in Figure 1, the surface of the isolation pillar 104 away from the substrate 101 can be provided with the material of the hole transport layer, electron transport layer, and charge generation layer b3. Additionally, the second electrode layer b5 can also be integrally vapor-deposited, and the surface of the isolation pillar 104 away from the substrate 101 can also have the second electrode layer b5. Of course, referring to Figure 1, the second electrode layer b5 on the surface of the isolation pillar 104 away from the substrate 101 can also be removed by means of stripping or photolithography.

[0085] Referring to FIG. 1, the display panel 100 further includes a conductive patterning layer 107 and a third electrode layer 108. The conductive patterning layer 107 may be located on the side of the second electrode layer b5 away from the substrate 101. The conductive patterning layer 107 includes a first conductive patterned portion 1071 within a pixel opening 103a, the first conductive patterned portion 1071 exposing at least a portion of the second electrode pattern b51 of the second electrode layer b5. For example, the edge portion of the second electrode pattern b51 of the second electrode layer b5 may be exposed. Further, the conductive patterning layer 107 also includes a third conductive patterned portion 1073 located on the side of the isolation pillar 104 away from the substrate 101.

[0086] The conductive patterning layer 107 exposes the edge portion of the second electrode pattern b51, so that when the third electrode layer 108 is formed after the conductive patterning layer 107, the third electrode pattern 1081 in the third electrode layer 108 can be formed above the edge portion of the second electrode pattern b51, thereby allowing the third electrode pattern 1081 in the third electrode layer 108 formed after the conductive patterning layer 107 to be electrically connected to at least a portion of the second electrode pattern. For example, the second electrode pattern b51 includes an edge portion extending from the pixel opening 103a to above the pixel defining layer 103, and the edge portion of the third electrode pattern 1081 overlaps with the edge portion of the second electrode pattern b51. Furthermore, the third electrode pattern 1081 is electrically connected to the first isolation pillar portion 10411 of the isolation pillar 1041, thereby allowing the third electrode pattern 1081 to electrically connect the first isolation pillar portion 10411 to the second electrode layer b5, enabling the first isolation pillar portion 10411 to function as an auxiliary cathode.

[0087] Optionally, the light-emitting unit 102 may have a light-emitting region 102a, which can be a region capable of emitting light. The region between adjacent light-emitting units 102 can be a non-light-emitting region.

[0088] According to the resistance formula, the resistance R satisfies: R = ρ * L / S. Here, ρ is the resistivity, L is the length of the resistor, and S is the area through which the current flows. By setting the third electrode layer 108, it can overlap with the second electrode layer b5 in the non-light-emitting area, thus allowing the first isolation pillar portion 10411 of the isolation pillar 1041 to function as an auxiliary electrode, effectively increasing the area of ​​the cathode. According to the above formula, with a fixed resistivity and resistor length, increasing the area S reduces the resistance R. In other words, by designing the third electrode layer 108 so that the isolation pillar 1041 acts as an auxiliary electrode of the cathode, the resistance of the cathode can be effectively reduced.

[0089] In this embodiment, the material of the conductive patterning layer 107 can be a material capable of patterning the cathode material within a wavelength range of 300 nm to 1100 nm. The conductive patterning layer 107 is necessary because the third electrode pattern 1081 of the third electrode layer 108 needs to be obtained based on the mutual repulsion between the cathode material and the cathodic patterning layer. If a fine metal mask (FMM) is used to fabricate multiple patterned structures in the third electrode layer 108, the high temperature of the cathode material (such as an alloy of silver) can easily cause deformation of the FMM, which is detrimental to mass production.

[0090] Optionally, the material of the conductive patterned layer 107 may include a high-fluorine compound, which has poor compatibility with the cathode material. The conductive patterned layer 107 exposes the edge portion of the second electrode pattern b51, so that when the third electrode layer 108 is formed after the conductive patterned layer 107, the third electrode pattern 1081 of the third electrode layer 108 can be formed at the edge portion of the second electrode pattern, thereby allowing the third electrode pattern 1081 of the third electrode layer 108 formed after the conductive patterned layer 107 to overlap with the edge portion of the second electrode pattern b51.

[0091] When fabricating the display panel 100, a first electrode pattern b11 of multiple light-emitting units 102 needs to be fabricated on a substrate 101 firstly. Then, a pixel defining layer 103 is formed on the side of the first electrode pattern b11 of the multiple light-emitting units 102 away from the substrate 101, and multiple pixel openings 103a of the pixel defining layer 103 expose the first electrode pattern b11 of the multiple light-emitting units 102. Afterwards, an isolation layer 104 and a support layer 105 are formed on the side of the pixel defining layer 103 away from the substrate 101. Then, a conductive patterning layer 107 can be formed by vapor deposition, such that the portion of the conductive patterning layer 107 located within the pixel opening 103a exposes the edge portion of the second electrode pattern b51.

[0092] After the conductive patterned layer 107 is formed, the cathode material of the third electrode layer 108 can be deposited on the side of the conductive patterned layer 107 away from the pixel defining layer 103. Since the compatibility between the cathode material and the conductive patterned layer 107 is very poor, it is difficult for the cathode material to adhere to the conductive patterned layer 107. Therefore, the cathode material can adhere to the edge portion of the exposed second electrode pattern b51 of the conductive patterned layer 107. Furthermore, by controlling the deposition angle, the cathode material can be attached to the first isolation pillar portion 10411 of the isolation pillar 1041, so that the third electrode pattern 1081 in the formed third electrode layer 108 connects the first isolation pillar portion 10411 and the second electrode pattern b51. The conductive patterned layer 107 can also be called a cathode patterning material (CPM).

[0093] This configuration allows the third electrode pattern 1081 of the third electrode layer 108 to connect the first isolation pillar portion 10411 and the second electrode pattern b51 in the second electrode layer b5, enabling the isolation pillar 1041 to function as a cathode auxiliary electrode. Simultaneously, a large portion of the second electrode pattern b51 on the side furthest from the substrate 101 is provided with a conductive patterned layer 107. Since the transmittance of the conductive patterned layer 107 is higher than that of the cathode material, this structure also avoids placing the third electrode layer 108 above the second electrode layer b5, which would affect the transmittance of the display panel.

[0094] Since it is difficult for cathode material to adhere to the conductive patterned layer 107, the conductive patterned layer 107 may be completely free of cathode material or may have only a small amount of cathode material attached. In either case, since the transmittance of the conductive patterned layer 107 is very high and there is very little or no cathode material on the conductive patterned layer 107, this structure avoids affecting the transmittance of the display panel 100 due to the setting of the cathode auxiliary electrode.

[0095] In this embodiment, due to the poor compatibility between the material of the conductive patterned layer 107 and the cathode material, it is difficult for the cathode material of the third electrode layer 108 to adhere to the conductive patterned layer 107 during the fabrication of the third electrode layer 108. That is, the third electrode pattern 1081 of the third electrode layer 108 and the conductive patterned layer 107 do not overlap.

[0096] The fact that the third electrode pattern 1081 of the third electrode layer 108 and the conductive patterned layer 107 do not overlap can mean that the third electrode layer 108 and the conductive patterned layer 107 will not overlap due to direct contact, but their orthographic projections can partially overlap when they are not in contact.

[0097] Optionally, the isolation pillar 1041 can be an undercut structure. An undercut structure refers to a structure where the width of the film layer is narrower on the side closer to the substrate and wider on the side farther from the substrate. This facilitates the breakage of the hole transport layer, electron transport layer, and charge generation layer b3 at the edge of the second isolation pillar portion 10412 in the isolation pillar 1041, reducing signal crosstalk between different light-emitting units 102. Even if the hole transport layer, electron transport layer, and charge generation layer b3 are not broken at the edge of the second isolation pillar portion 10412 in the isolation pillar 1041, the arrangement of the isolation pillar 1041 can still extend the paths of the hole transport layer, electron transport layer, and charge generation layer b3, thereby extending the charge transfer path.

[0098] Referring to Figure 1, the sidewall of the first isolation pillar portion 10411 can be an arc-shaped sidewall, and the third electrode pattern 1081 in the third electrode layer 108 can contact the arc-shaped sidewall of the first isolation pillar portion 10411. Of course, the sidewall of the first isolation pillar portion 10411 can also be other shapes, and this embodiment does not limit this.

[0099] Optionally, referring to FIG1, the dimension c1 of the first isolation pillar portion 10411 on the side closer to the substrate 101 is larger than the dimension c2 of the first isolation pillar portion 10411 on the side farther from the substrate 101. Specifically, of the two sides of the first isolation pillar portion 10411, the side farther from the substrate 101, at least the orthographic projection of the side farther from the substrate 101 onto the substrate 101 lies within the orthographic projection of the second isolation pillar portion 10412 onto the substrate 101.

[0100] In this embodiment, since the second electrode pattern b51 of the second electrode layer b5 can serve as a cathode layer and act as a microcavity for the light-emitting unit 102, the orthogonal projection of the second electrode pattern b51 on the substrate 101 overlaps the orthogonal projection of the light-emitting pattern 102a on the substrate 101. Furthermore, since the third electrode layer 108 is used to electrically connect the second electrode pattern b51 of the second electrode layer b5 to the first isolation pillar portion 10411, to avoid the third electrode layer 108 affecting the light-emitting region 102a, the orthogonal projection of the third electrode layer 108 on the substrate 101 and the orthogonal projection of the light-emitting pattern on the substrate 101 can be made to not overlap.

[0101] In this embodiment, referring to Figures 5 and 6, the isolation layer 104 further includes an isolation wall 1042 located in the peripheral region 102b. The orthographic projection of the isolation wall 1042 onto the substrate 101 at least partially surrounds the orthographic projections of the plurality of light-emitting units 102 onto the substrate 101. The isolation wall 1042 includes a first isolation wall portion 10421 located in the first isolation layer a1 and a second isolation wall portion 10422 located in the second isolation layer a2. The orthographic projection of the first isolation wall portion 10421 onto the substrate 101 is located inside the orthographic projection of the second isolation wall portion 10422 onto the substrate 101. The material of the first isolation wall portion 10421 includes a conductive material, and the second electrode pattern b51 of the second electrode layer b5 is also electrically connected to the first isolation wall portion 10421.

[0102] Optionally, the second electrode pattern b51 of the second electrode layer b5 can be electrically connected to the side of the first isolation wall portion 10421 near the display area 101a via the third electrode pattern 1081 of the third electrode layer 108. This allows the first isolation wall portion 10421 of the isolation wall 1042 to function as an auxiliary electrode for the cathode. As described above, by making the first isolation wall portion 10421 of the isolation wall 1042 function as an auxiliary electrode for the cathode, the area of ​​the cathode is effectively increased, thereby effectively reducing the cathode resistance.

[0103] In this embodiment, since the isolation pillars 1041 in the isolation layer 104 can also serve as auxiliary electrodes, the width of the isolation wall 1042 can be appropriately reduced, thereby reducing the width of the display panel bezel and achieving a narrow bezel effect. For example, when the display panel is smaller than 8 inches, the width of the display panel bezel can be reduced by approximately 0.4 mm.

[0104] Optionally, referring to Figure 6, the second partition wall portion 10422 includes a first portion located on the first partition wall portion 10421, and a second portion extending beyond the first partition wall portion 10421. The width d1 of the second portion on the side closer to the display area 101a is greater than the width d2 of the second portion on the side farther from the display area 101a.

[0105] Since the isolation wall 1042 only needs to be connected to the third electrode pattern 1081 of the third electrode layer 108 on the side closest to the display area 101a, while the side furthest from the corresponding display area 101a does not need to be connected, the width d1 of the second part on the side closest to the display area 101a directly determines the overlap area between the isolation wall 1042 and the third electrode layer 108. The larger the width d1 of the second part on the side closest to the display area 101a, the larger the overlap area between the isolation wall 1042 and the third electrode pattern 1081 of the third electrode layer 108; the smaller the width d1 of the second part on the side closest to the display area 101a, the smaller the overlap area between the isolation wall 1042 and the third electrode pattern 1081 of the third electrode layer 108.

[0106] In this embodiment, referring to FIG2, the substrate 101 further includes a peripheral region 102b surrounding the display region 101a. Referring to FIG7, the display panel 100 further includes: power traces (not shown in FIG7) at least partially located in the peripheral region 102b, a signal transition pattern 109, a fourth electrode pattern 110, and a fifth electrode pattern 111. The signal transition pattern 109 and the first electrode pattern b11 are located on the same layer. Optionally, the signal transition pattern 109 and the first electrode pattern b11 can be made of the same material and fabricated using a single process. Additionally, the fourth electrode pattern 110 and the second electrode pattern b51 are located on the same layer. Optionally, the fourth electrode pattern 110 and the second electrode pattern b51 can be made of the same material and fabricated using a single process. The fifth electrode pattern 111 and the third electrode pattern 1081 are located on the same layer. Optionally, the fifth electrode pattern 111 and the third electrode pattern 1081 can be made of the same material and fabricated using a single process.

[0107] Optionally, the thickness of the second electrode layer b5 is greater than 0 nm and less than or equal to 20 nm. The second electrode layer b5 may include a first sublayer and a second sublayer. The material of the first sublayer may be ytterbium (Yb). The material of the second sublayer may be a metal or a metal alloy, for example, the material of the second sublayer may include at least one of magnesium (Mg) and silver (Ag). Optionally, the ratio of magnesium to silver in the material of the second sublayer may be greater than 0 and less than 1. It should be noted that the first sublayer may also be omitted, and this embodiment of the application does not limit this.

[0108] Optionally, since the third electrode layer 108 is used for signal transmission, the conductivity of the third electrode layer 108 is greater than or equal to the conductivity of the second electrode layer b5. The material of the third electrode layer 108 is a metal or a metal alloy. To ensure the conductivity of the third electrode layer 108, the material of the third electrode layer 108 includes at least silver (Ag), and may also include other metals or metal alloys; this embodiment does not limit this. Furthermore, since the third electrode layer 108 does not affect the display, the thickness of the third electrode layer 108 can be greater than or equal to 20 nm. The third electrode layer 108 can be transparent or opaque. It includes at least one of magnesium (Mg) and other metals.

[0109] Optionally, the materials of the second electrode layer b5 and the third electrode layer 108 can be the same or different materials, and this application embodiment does not limit this.

[0110] In this embodiment, the signal conversion pattern 109 can be connected to the power supply trace, the fourth electrode pattern 110 is connected to the signal conversion pattern 109, the fourth electrode pattern 110 is also electrically connected to the first isolation pillar portion 10411, and the fifth electrode pattern 111 is electrically connected to the fourth electrode pattern 110. Since the first isolation pillar portion 10411 is connected to the second electrode layer b5 of the light-emitting unit 102 through the first electrode pattern b11, the power supply trace can be connected to the second electrode layer b5 of the light-emitting unit 102 in sequence through the signal conversion pattern 109, the fourth electrode pattern 110, the first isolation pillar portion 10411, and the third electrode layer 108, thereby enabling the power supply trace to transmit the power signal received from the external circuit to the second electrode layer b5. Optionally, the power supply trace can be a negative power supply trace, or it can also be called a VSS trace.

[0111] In this embodiment of the application, the fifth electrode pattern 111 can be connected to the first isolation wall portion 10421 of the isolation wall 1042, so that both the fifth electrode pattern 111 and the first isolation wall portion 10421 can serve as auxiliary electrodes of the cathode, playing the role of cathode resistor.

[0112] Referring to Figure 7, the conductive patterned layer 107 also includes a second cathode patterned portion 1072 located on the side of the fourth electrode pattern 110 away from the substrate 101. The second cathode patterned portion 1072 exposes the edge portion of the fourth electrode pattern 110 away from the display area 101a. The fifth electrode pattern 111 is connected to the edge portion of the fourth electrode pattern 110 exposed by the second cathode patterned portion 1072.

[0113] Since the materials of the conductive patterned layer 107 and the cathode material are mutually repulsive, the second cathode patterned portion 1072 exposes the edge portion of the fourth electrode pattern 110, so that when the cathode material layer is formed after the conductive patterned layer 107, the cathode material layer can be formed above the edge portion of the fourth electrode pattern 110 (i.e., the fifth electrode pattern 111 is obtained), thereby allowing the fifth electrode pattern 111 formed after the conductive patterned layer 107 to overlap with the edge portion of the fourth electrode pattern 110.

[0114] In this embodiment, the second electrode layer b5 can be fabricated using an open mask, which can be referred to as the first open mask. The conductive patterning layer 107 is fabricated using an open mask, which can be referred to as the second open mask. The third electrode layer 108 can be fabricated using an open mask, which can be referred to as the third open mask.

[0115] The first open mask has a first mask opening that covers the display area 101a and a portion of the peripheral area 102b closest to the display area 101a. The second open mask has a second mask opening that covers the display area 101a and a portion of the peripheral area 102b closest to the display area 101a. The third open mask has a third mask opening that covers the display area 101a.

[0116] To ensure the effectiveness of the overlap, the size of the third mask opening can be greater than or equal to the size of the first mask opening, and the size of the first mask opening can be greater than the size of the second mask opening. Furthermore, referring to FIG8, during the fabrication process, the orthographic projection of the third mask opening onto the substrate 101 overlaps the orthographic projection of the first mask opening onto the substrate 101, and the orthographic projection of the first mask opening onto the substrate 101 overlaps the orthographic projection of the second mask opening onto the substrate 101.

[0117] Optionally, the design relationship between the fourth electrode pattern 110, the second cathode patterned portion 1072, and the fifth electrode pattern 111 can be measured by the distance between the fourth electrode pattern 110 and the boundary of the pixel defining layer 103 away from the display area 101a. For example, the distance e1 between the fourth electrode pattern 110 and the boundary of the pixel defining layer 103 away from the display area 101a is greater than the distance e2 between the second cathode patterned portion 1072 and the boundary of the pixel defining layer 103 away from the display area 101a, and the distance e2 between the second cathode patterned portion 1072 and the boundary of the pixel defining layer 103 away from the display area 101a is less than the distance e3 between the fifth electrode pattern 111 and the boundary of the pixel defining layer 103 away from the display area 101a. Furthermore, the distance e1 between the fourth electrode pattern 110 and the boundary of the display area 101a and the pixel defining layer 103 and the boundary of the display area 101a can be greater than the distance e3 between the fifth electrode pattern 111 and the boundary of the display area 101a and the boundary of the pixel defining layer 103. Of course, the distance e1 between the fourth electrode pattern 110 and the boundary of the display area 101a and the boundary of the pixel defining layer 103 and the boundary of the display area 101a can also be less than or equal to the distance e3 between the fifth electrode pattern 111 and the boundary of the pixel defining layer 103 and the boundary of the display area 101a; this embodiment does not limit this.

[0118] To ensure that the fifth electrode pattern 111 can connect with the exposed edge of the second cathode patterned portion 1072, the distance between the boundary of the fifth electrode pattern 111 away from the display area 101a and the boundary of the second cathode patterned portion 1072 away from the display area 101a needs to be greater than or equal to the alignment accuracy of the open mask. Optionally, assuming the alignment accuracy of the open mask is 50 μm, the distance between the boundary of the fifth electrode pattern 111 away from the display area 101a and the boundary of the second cathode patterned portion 1072 away from the display area 101a needs to be greater than or equal to 50 μm.

[0119] Optionally, the thickness of the fourth electrode pattern 110 may be less than the thickness of the second cathode patterned portion 1072, and the thickness of the second cathode patterned portion 1072 may be less than the thickness of the fifth electrode pattern 111.

[0120] Since the fourth electrode pattern 110 is located in the second electrode layer b5, the thickness of the fourth electrode pattern 110 can be the same as the thickness of the second electrode layer b5. The portion of the second electrode layer b5 located within the pixel opening is for adjusting the microcavity of the light-emitting unit 102, which requires high transmittance; therefore, the thickness of the second electrode layer b5 needs to be designed to be thinner. Correspondingly, the thickness of the fourth electrode pattern 110 located in the second electrode layer b5 is also relatively thin.

[0121] Furthermore, since the fifth electrode pattern 111 is located in the third electrode layer 108, the thickness of the fifth electrode pattern 111 can be the same as the thickness of the third electrode layer 108. The third electrode pattern 1081 in the third electrode layer 108 is designed to reduce resistance, so the thickness of the third electrode layer 108 is designed to be thicker. Correspondingly, the thickness of the fifth electrode pattern 111 located in the third electrode layer 108 is also relatively thick.

[0122] In addition, the thickness of the second cathode patterned portion 1072 can be between the thickness of the fourth electrode pattern 110 and the thickness of the fifth electrode pattern 111.

[0123] Furthermore, because the fifth electrode pattern 111 needs to slope up the boundary of the second cathode patterned portion 1072 away from the display area 101a, the angle between the side of the second cathode patterned portion 1072 away from the display area 101a and the surface of the second cathode patterned portion 1072 near the substrate 101 can be an acute angle, i.e., less than 90°. The angle between the side of the second cathode patterned portion 1072 away from the display area 101a and the surface of the fifth electrode pattern 111 near the substrate 101 can be complementary to the angle between the side of the second cathode patterned portion 1072 away from the display area 101a and the surface of the second cathode patterned portion 1072 near the substrate 101.

[0124] In this embodiment, in the display area 101a, the distance h1 between the side of the support layer 105 away from the substrate 101 and the substrate 101 is greater than the distance h2 between the side of the isolation layer 104 away from the substrate 101 and the substrate 101. When the support layer 105 and the isolation layer 104 are located in the same plane (e.g., both are located on the side of the pixel defining layer 103 away from the substrate 101), the height of the support layer 105 is greater than the height of the isolation pillar 1041.

[0125] Optionally, the height of the support layer 105 can be approximately 1.5 μm. The height of the isolation pillar 1041 can be less than 1.5 μm. The width of the isolation pillar 1041 can be greater than or equal to 2 μm and less than or equal to 200 μm.

[0126] Optionally, the exposure accuracy of the support layer 105 is approximately ±2 micrometers, the edge-binding accuracy of the pixel-defining layer 103 of the anode is approximately ±2 micrometers, and the anode etching accuracy is approximately ±2 micrometers. The minimum distance between the isolation pillar 1041 and the support pillar can be approximately 6 μm.

[0127] Optionally, the display panel 100 can be a rigid display panel or a flexible display panel.

[0128] Referring to Figure 9, for a rigid display panel, because the sizes of the light-emitting areas of different light-emitting units 102 are different, and the light is refracted on both sides of the encapsulation layer 106, interference easily occurs after the light is emitted, resulting in rainbow patterns. Furthermore, referring to Figure 10, if the height of the encapsulating adhesive (frit) around the display panel does not match the height of the support layer 105, the encapsulation layer 106 is prone to deformation, causing interference of the light emitted by the light-emitting unit 102 after passing through the encapsulation layer 106, resulting in Newton's rings. Additionally, if the light-emitting unit 102 is a tandem light-emitting device, the need for a charge generation layer b3 (CGL) in the tandem light-emitting device leads to severe crosstalk between adjacent light-emitting units 102.

[0129] To prevent the encapsulation layer 106 from deforming and generating Newton's rings, the number of support portions 1051 provided in the support layer 105 can be increased. Optionally, referring to FIG11, each light-emitting unit 102 is provided with a support portion 1051 around its orthographic projection on the substrate 101.

[0130] Optionally, the orthographic projection of the light-emitting unit 102 onto the substrate 101 is polygonal. Correspondingly, the support layer 105 may include a plurality of support portions 1051 located around the light-emitting unit 102 and corresponding to the number of sides of the polygon. Each support portion 1051 is located on one side of the corresponding side of the orthographic projection of the light-emitting unit 102 onto the substrate 101. For example, in FIG. 11, the orthographic projection of the light-emitting unit 102 onto the substrate 101 is rectangular (i.e., the light-emitting unit 102 has four sides). Accordingly, four support portions 1051 are respectively disposed on one side of the four sides of the light-emitting unit 102.

[0131] In this embodiment of the application, referring to FIG11, the orthographic projection of the support portion 1051 on the substrate 101 is located between the orthographic projections of the adjacent light-emitting units 102 on the substrate 101, thereby avoiding the normal light emission of the light-emitting units 102 caused by the support portion 1051.

[0132] Additionally, referring to FIG11, the orthographic projection of the isolation pillar 1041 on the substrate 101 can be located between the orthographic projections of two adjacent support portions 1051 on the substrate 101. Alternatively, the orthographic projection of the isolation pillar 1041 on the substrate 101 can also be located between the orthographic projections of the support portions 1051 on the substrate 101 and the orthographic projections of the light-emitting units 102 on the substrate 101. Or, the orthographic projection of the isolation pillar 1041 on the substrate 101 can be located between the orthographic projections of two adjacent light-emitting units 102 on the substrate 101.

[0133] For example, in Figure 11, in the first direction X, the orthographic projection of the isolation pillar 1041 on the substrate 101 lies between the orthographic projections of the two adjacent support portions 1051 on the substrate 101. In the second direction Y, the orthographic projection of the isolation pillar 1041 on the substrate 101 lies between the orthographic projections of the support portions 1051 on the substrate 101 and the orthographic projection of the light-emitting unit 102 on the substrate 101. The first direction X and the second direction Y can be perpendicular. For example, the first direction X can be the column direction of the display panel, and the second direction Y can be the row direction of the display panel.

[0134] In this embodiment of the application, Figure 12 is a top view of a support pillar, a light-emitting unit, and a pixel opening provided in this embodiment. Referring to Figure 12 and Table 1, the distance 'a' between pixel openings 103a corresponding to adjacent light-emitting units 102 can be approximately 19.7 μm. The distance 'b' between the first electrode patterns 'b11' of adjacent light-emitting units 102 can be approximately 4.5 μm, satisfying the requirement that the etching process is greater than or equal to 3.5 micrometers. The distance 'c' between the pixel opening 103a of the pixel defining layer 103 and the first electrode pattern 'b11' can be approximately 3 μm. The minimum width 'd' of the pixel opening 103a can be approximately 7.08 μm. The distance 'e' between the pixel openings 103a corresponding to two adjacent green light-emitting units 102-G can be approximately 14 μm. The distance between the support pillar and the pixel opening 103a can be 5.1 μm. The width and height of the support pillar can be approximately 9.5 μm and 21 micrometers, respectively, and the support pillar density can be approximately 4.46%.

[0135] Table 1

[0136] For flexible display panels, the support portion 1051 is easily scratched, which can cause bright spots during display. Therefore, to reduce the impact of the support portion 1051 on the display, its design density can be reduced.

[0137] Optionally, referring to Figure 13, the plurality of light-emitting units 102 include a plurality of first-type light-emitting units 102-1 and a plurality of second-type light-emitting units 102-2. At least one side of the orthographic projection of the first-type light-emitting unit 102-1 onto the substrate 101 is provided with a support portion 1051. The sides of the orthographic projection of the second-type light-emitting units 102-2 onto the substrate 101 are not provided with support portions 1051. That is, not every side of all the multiple light-emitting units 102 is provided with a support portion 1051, which can reduce the design density of the support portions 1051 and reduce the impact of the support portions 1051 on the display.

[0138] In this embodiment of the application, referring to FIG14, the minimum distance c between the boundary of the first electrode pattern b11 and the boundary of the pixel opening 103a is approximately 3 μm, and the minimum distance f between the support portion 1051 and the boundary of the pixel opening 103a is approximately 5 μm.

[0139] For both rigid and flexible display panels, the design of the isolation pillar 1041 and support portion 1051 is not limited by the arrangement of the multiple light-emitting units 102. For example, the multiple light-emitting units 102 can be arranged in a diamond-like pattern, a real RGB pattern, an RGBW pattern, or an RGBY pattern. In the case of an RGBW pattern, the multiple light-emitting units 102 may include a red light-emitting unit 102-R, a green light-emitting unit 102-G, a blue light-emitting unit 102-B, and a white light-emitting unit 102-W. In the case of an RGBY pattern, the multiple light-emitting units 102 may include a red light-emitting unit 102-R, a green light-emitting unit 102-G, a blue light-emitting unit 102-B, and a yellow light-emitting unit 102-Y.

[0140] In summary, this application provides a display panel comprising a substrate, multiple light-emitting units, a pixel defining layer, an isolation layer, a support layer, and an encapsulation layer. The isolation pillars in the isolation layer can be located between adjacent light-emitting units to block light emitted by adjacent units, reducing crosstalk and improving display performance. Furthermore, the support layer can support the encapsulation layer, preventing deformation and ensuring the reliability of the display panel.

[0141] Figure 15 is a schematic diagram of a display device provided in an embodiment of this application. Referring to Figure 15, the display device includes a power supply component 200 and a display panel 100 as described in the above embodiment. The power supply component 200 is connected to the display panel 100 and is used to supply power to the display panel 100.

[0142] Optionally, the display device can be an organic light-emitting diode (OLED) display device. The display device can be any suitable display device, including but not limited to mobile phones, tablets, televisions, monitors, laptops, digital photo frames, car navigation systems, and e-readers, as well as any product or component with display functionality.

[0143] Since the display device can have essentially the same technical effects as the display panel described in the previous embodiments, for the sake of brevity, the technical effects of the display device will not be described again here.

[0144] The terminology used in the embodiments section of this application is for explaining the embodiments of this application only and is not intended to limit this application. Unless otherwise defined, the technical or scientific terms used in the embodiments of this application should have the ordinary meaning understood by one of ordinary skill in the art to which this application pertains.

[0145] The Description of Embodiments section of this application describes several embodiments; however, this description is exemplary and not restrictive, and it will be apparent to those skilled in the art that many more embodiments and implementations are possible within the scope of the embodiments described herein. Although many possible combinations of features are shown in the drawings and discussed in the detailed description, many other combinations of the disclosed features are also possible. Unless specifically limited, any feature or element of any embodiment may be used in combination with, or may replace, any feature or element of any other embodiment.

[0146] This application includes and contemplates combinations of features and elements known to those skilled in the art. The embodiments, features, and elements disclosed in this application may also be combined with any conventional features or elements to form a unique inventive scheme as defined by the claims. Any feature or element of any embodiment may also be combined with features or elements from other inventive schemes to form another unique inventive scheme as defined by the claims. Therefore, it should be understood that any feature shown and / or discussed in this application may be implemented individually or in any suitable combination. Therefore, the embodiments are not limited except by the limitations imposed by the appended claims and their equivalents. Furthermore, various modifications and changes may be made within the scope of the appended claims.

[0147] Furthermore, in describing representative embodiments, the specification may have presented methods and / or processes as a specific sequence of steps. However, the method or process should not be limited to the specific order of steps described herein, to the extent that it does not depend on such a specific order. As will be understood by those skilled in the art, other sequences of steps are also possible. Therefore, the specific order of steps set forth in the specification should not be construed as a limitation of the claims. Moreover, the claims concerning the method and / or process should not be limited to the steps performed in the written order, and those skilled in the art will readily understand that these orders can be varied and still remain within the spirit and scope of the embodiments of this application.

[0148] In the accompanying drawings, the size of one or more constituent elements, the thickness of layers, or areas are sometimes exaggerated for clarity. Furthermore, the drawings schematically illustrate ideal examples, and this application is not limited to the shapes or numerical values ​​shown in the drawings.

[0149] The ordinal numbers "first," "second," and "third" used in this specification are for the purpose of avoiding confusion among the constituent elements, not for limiting the quantity. The term "multiple" in this application refers to two or more quantities.

[0150] The thickness range of the film layer in this specification is A to B, which means that the thickness is between A and B, including the two endpoints of A and B.

[0151] In this specification, for convenience, terms such as "middle," "upper," "lower," "front," "rear," "vertical," "horizontal," "top," "bottom," "inner," and "outer" are used to indicate orientation or positional relationships in conjunction with the accompanying drawings. This is solely for the purpose of facilitating the description and simplification, and does not imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation of this application. The positional relationships of the constituent elements may be appropriately varied depending on the orientation of the described constituent elements. Therefore, the use of terms not limited to those described in the specification may be appropriately replaced as needed.

[0152] In this specification, unless otherwise expressly specified and limited, the terms "connected" or "linked" should be interpreted broadly. For example, it can refer to a fixed connection, a detachable connection, or an integral connection; it can refer to a mechanical connection or an electrical connection; it can refer to a direct connection, an indirect connection via an intermediate component, or a connection within two components. Those skilled in the art will understand the meaning of the above terms in this application according to the specific circumstances.

[0153] In this specification, "connection" includes the situation where constituent elements are connected together by a component that has a certain electrical function. There are no particular limitations on the "component that has a certain electrical function," as long as it enables the transmission of electrical signals between the connected constituent elements. Examples of "components that have a certain electrical function" include not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, and other components with various functions.

[0154] In this application, "thickness" and "height" refer to the vertical distance between the surface of the film layer away from the substrate and the surface of the film layer closer to the substrate.

[0155] In this specification, circles, rectangles, hexagons, or rhombuses are not strictly defined; they can be approximate circles, rectangles, hexagons, or rhombuses. Small deformations due to tolerances are possible, as are chamfers, curved edges, and other variations.

[0156] In this application, "about" means a value that is not strictly limited and allows for process and measurement errors.

[0157] The above description is merely an optional embodiment of this application and is not intended to limit this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A display panel, characterized by, The display panel includes: A substrate, the substrate including a display area and a peripheral area surrounding the display area; Multiple light-emitting units are located in the display area and are used to emit light. A pixel defining layer is located on one side of the substrate, and the pixel defining layer includes a plurality of pixel openings located in the display area and corresponding to the plurality of light-emitting units; An isolation layer, the isolation layer including a plurality of isolation pillars located in the display area, the isolation pillars being located on the side of the pixel defining layer away from the substrate, and the orthographic projection of the isolation pillars on the substrate and the orthographic projection of the pixel opening on the substrate not overlapping; A support layer is located on the side of the pixel defining layer away from the substrate. The orthographic projection of the support layer on the substrate and the orthographic projection of the pixel opening on the substrate do not overlap, and the orthographic projection of the isolation pillar on the substrate do not overlap. And an encapsulation layer, which is located on the side of the support layer away from the substrate, and is used to encapsulate the plurality of light-emitting units.

2. The display panel of claim 1, wherein, The support layer includes multiple support portions, the orthographic projection of the support portion on the substrate and the orthographic projection of the light-emitting unit on the substrate do not overlap, and the orthographic projection of each support portion on the substrate is located on one side of the orthographic projection of the light-emitting unit on the substrate.

3. The display panel of claim 2, wherein, Each of the light-emitting units is surrounded by the support portion around its orthogonal projection on the substrate.

4. The display panel of claim 3, wherein, The shape of the orthographic projection of the light-emitting unit onto the substrate is polygonal; The support layer includes a plurality of support portions located around the light-emitting unit and corresponding to the number of sides of the polygon; each support portion is located on one side of the corresponding side of the orthographic projection of the light-emitting unit onto the substrate.

5. The display panel of claim 3, wherein, The display panel is a rigid display panel.

6. The display panel of claim 2, wherein, The plurality of light-emitting units includes a plurality of first-type light-emitting units and a plurality of second-type light-emitting units; The support portion is provided on at least one side of the orthogonal projection of the first type of light-emitting unit onto the substrate. The second type of light-emitting unit does not have the support portion provided on the side of its orthogonal projection on the substrate.

7. The display panel of claim 6, wherein, The display panel is a flexible display panel.

8. The display panel of any of claims 2 to 7, wherein, The orthographic projection of the support portion on the substrate is located between the orthographic projections of the adjacent light-emitting units on the substrate.

9. The display panel of claim 8, wherein, The orthographic projection of the isolation pillar on the substrate lies between the orthographic projections of two adjacent support portions on the substrate, or... The orthographic projection of the isolation pillar on the substrate lies between the orthographic projection of the support portion on the substrate and the orthographic projection of the light-emitting unit on the substrate, or, The orthographic projection of the isolation pillar on the substrate is located between the orthographic projections of two adjacent light-emitting units on the substrate.

10. The display panel of any of claims 1 to 7, and 9, wherein, The display panel includes a light-emitting unit layer, which includes the plurality of light-emitting units; the light-emitting unit layer includes: a first electrode layer, a first light-emitting functional layer, a charge-generating layer, a second light-emitting functional layer, and a second electrode layer stacked together. The first electrode layer includes the first electrode pattern of the plurality of light-emitting units, and both the first light-emitting functional layer and the second light-emitting functional layer include a light-emitting layer, which includes the light-emitting pattern of the plurality of light-emitting units. The charge-generating layer is isolated at the isolation pillar.

11. The display panel of claim 10, wherein, The charge-generating layer includes a portion located on the side of the support portion away from the substrate; the cross-sectional shape of the support portion is an inverted trapezoid or a stepped shape; The cross-section is perpendicular to the bearing surface of the substrate and parallel to the arrangement direction of the support and the light-emitting unit.

12. The display panel of claim 11, wherein, The isolation layer includes: a first isolation layer and a second isolation layer stacked along a direction away from the pixel defining layer and away from the substrate. The isolation pillar includes a first isolation pillar portion located in the first isolation layer and a second isolation pillar portion located in the second isolation layer; the orthogonal projection of the first isolation pillar portion on the substrate is located inside the orthogonal projection of the second isolation pillar portion on the substrate. The first insulating layer is made of a conductive material, and the second electrode layer includes a second electrode pattern, which is electrically connected to the first insulating pillar portion.

13. The display panel of claim 12, wherein, The isolation layer also includes an isolation wall located in the peripheral area, wherein the orthogonal projection of the isolation wall on the substrate at least partially surrounds the orthogonal projection of the plurality of light-emitting units on the substrate. The isolation wall includes a first isolation wall portion located in the first isolation layer and a second isolation wall portion located in the second isolation layer; the orthographic projection of the first isolation wall portion on the substrate is located inside the orthographic projection of the second isolation wall portion on the substrate. The second electrode pattern in the second electrode layer is also electrically connected to the first isolation wall portion.

14. The display panel of claim 12 or 13, wherein, The display panel further includes: a conductive patterning layer and a third electrode layer; The conductive patterned layer includes a first conductive patterned portion located within the pixel opening, the first conductive patterned portion being located on the side of the second electrode pattern away from the substrate, and the first conductive patterned portion exposing at least a portion of the second electrode pattern; The third electrode layer includes a third electrode pattern, which is electrically connected to at least a portion of the second electrode pattern exposed by the first conductive patterned portion, and the third electrode pattern is also electrically connected to a portion of the first isolation pillar.

15. The display panel of claim 13, wherein, The second isolation wall portion includes a first portion located on the first isolation wall portion, and a second portion extending beyond the first isolation wall portion; The width of the side of the second part closer to the display area is greater than the width of the side of the second part farther from the display area.

16. The display panel according to any one of claims 1 to 7, 9, 11 to 13 and 15, characterized by, The distance between the side of the support layer away from the substrate and the substrate is greater than the distance between the side of the isolation layer away from the substrate and the substrate.

17. The display panel according to any one of claims 1 to 7, 9, 11 to 13 and 15, characterized by, The plurality of light emitting units comprises a first light emitting unit, a second light emitting unit and a third light emitting unit. The light emitting colors of the first light emitting unit, the second light emitting unit and the third light emitting unit are different from each other.

18. A display device comprising: The display device comprises a power supply assembly and the display panel as claimed in any one of claims 1 to 17. The power supply assembly is connected with the display panel, and the power supply assembly is configured to supply power to the display panel.

Images