Display panel and display device

Abstract

The present disclosure belongs to the technical field of display. Provided are a display panel and a display device. The display panel in the present disclosure comprises a base substrate, a pixel defining layer arranged on the base substrate, and a plurality of light-emitting devices, wherein each light-emitting device comprises a first electrode, a light-emitting functional layer and a second electrode, which are sequentially arranged in a direction facing away from the base substrate, each light-emitting functional layer comprising at least a light-emitting layer and a common transmission layer, and the light-emitting devices share the common transmission layer; the pixel defining layer comprises a plurality of pixel openings and a barrier wall structure for forming the pixel openings; the light-emitting layers are at least partially defined in the pixel openings; the part of the barrier wall structure between every two adjacent pixel openings of at least some adjacent pixel openings is provided with at least one groove; the grooves are located on a surface of the side of the barrier wall structure facing away from the base substrate; and the common transmission layer is located in a first sub-portion of the barrier wall structure facing away from the base substrate and the first sub-portion is recessed in the grooves.

Description

Display panel and display device Technical Field

[0001] This disclosure belongs to the field of display technology, specifically relating to a display panel and a display device. Background Technology

[0002] OLED light-emitting devices emit light by recombination of holes generated at the anode and electrons generated at the cathode within an organic light-emitting material. The common transport layer in different color light-emitting devices is deposited entirely by vapor deposition. This common transport layer significantly promotes the transport of electrons and / or holes, potentially causing lateral leakage. This can lead to a situation where driving one color OLED device may cause another color OLED device to emit light, resulting in an impure monochromatic display and subsequent white balance deviations, thus affecting the display effect. Summary of the Invention

[0003] This disclosure aims to at least solve one of the technical problems existing in the prior art, and to provide a display panel and a display device.

[0004] In a first aspect, the technical solution adopted to solve the technical problem of this disclosure is a display panel, which includes a substrate, a pixel defining layer disposed on the substrate, and a plurality of light-emitting devices; the light-emitting device includes a first electrode, a light-emitting functional layer, and a second electrode disposed sequentially in a direction away from the substrate; the light-emitting functional layer includes at least a light-emitting layer and a common transmission layer; the common transmission layer is shared by each of the light-emitting devices;

[0005] The pixel defining layer includes a plurality of pixel openings and a barrier structure for forming the pixel openings; at least a portion of the light-emitting layer is defined within the pixel openings; at least a portion of the barrier structure between adjacent pixel openings is provided with at least one groove, the groove being located on the surface of the barrier structure facing away from the substrate, and the common transmission layer being recessed in the groove in a first sub-portion of the barrier structure facing away from the substrate.

[0006] In some embodiments, the groove includes a first sidewall and a bottom wall, and the first sub-part includes a first sub-section covering the first sidewall and a second sub-section covering the bottom wall, wherein the first sub-section and the second sub-section are integral structures.

[0007] In some embodiments, the dihedral angle formed between the first surface where the first sidewall is located and the second surface where the bottom wall is located is greater than 90°.

[0008] In some embodiments, the height of the retaining wall structure is greater than the thickness of the common transmission layer; the depth of the groove is greater than the thickness of at least one sub-film layer in the common transmission layer.

[0009] In some embodiments, the depth of the groove is less than the thickness of the light-emitting functional layer.

[0010] In some embodiments, the orthographic projection of the center line connecting any adjacent pixel openings on the substrate passes through the orthographic projection of at least one of the grooves on the substrate.

[0011] In some embodiments, any two adjacent grooves are spaced apart.

[0012] In some embodiments, the orthogonal projection of the groove on the substrate surrounds the orthogonal projection of the light-emitting device on the substrate.

[0013] In some embodiments, the first sub-part is separated by the groove at least partially by its thickness.

[0014] In some embodiments, the groove includes a first sidewall and a bottom wall, wherein the dihedral angle formed between the first surface where the first sidewall is located and the second surface where the bottom wall is located is less than 85°.

[0015] In some embodiments, the orthographic projection of a portion of the center line connecting adjacent pixel openings on the substrate passes through the orthographic projection of at least one groove on the substrate; the orthographic projection of a portion of the center line connecting adjacent pixel openings on the substrate does not overlap with the orthographic projection of the groove on the substrate.

[0016] In some embodiments, the grooves on the retaining wall structure are spaced apart.

[0017] In some embodiments, the second sidewall in the retaining structure that defines the pixel opening blocks at least a portion of the thickness of the common transport layer.

[0018] In some embodiments, the second sidewall includes a side surface near the pixel opening, a portion of which is a concave surface.

[0019] In some embodiments, the side surface of the second sidewall near the pixel opening is a flat third surface, and the dihedral angle formed between the third surface and the fourth surface parallel to the substrate is less than 85°.

[0020] In some embodiments, the second electrodes of each of the light-emitting devices are connected as a single structure.

[0021] Secondly, this disclosure also provides a display device, which includes a display panel as described in any one of the first aspects. Attached Figure Description

[0022] Figure 1a is a schematic diagram of an existing display panel.

[0023] Figure 1b is the emission spectrum of the display panel shown in Figure 1a.

[0024] Figure 2a is a schematic diagram of the display panel in Example 1 provided in the embodiments of this disclosure.

[0025] Figure 2b is a magnified view of region Q1 in Figure 2a.

[0026] Figure 3 is a schematic diagram of the groove in Example 1 provided in the embodiments of this disclosure.

[0027] Figure 4 is a schematic diagram of a single-layer light-emitting device provided in an embodiment of this disclosure.

[0028] Figure 5 is a schematic diagram of a series light-emitting device provided in an embodiment of this disclosure.

[0029] Figure 6 is a planar schematic diagram of a groove distribution provided in an embodiment of this disclosure.

[0030] Figure 7 is a planar schematic diagram of another groove distribution provided in an embodiment of this disclosure.

[0031] Figure 8a is a schematic diagram of the display panel in Example 2 provided in the embodiments of this disclosure.

[0032] Figure 8b is a magnified view of region Q2 in Figure 8a.

[0033] Figure 9 is a plan view of the light-emitting functional layer in the display panel of Example 2 provided in the embodiments of this disclosure.

[0034] Figure 10 is a planar schematic diagram of another groove distribution provided in an embodiment of this disclosure.

[0035] Figure 11 is a schematic diagram of the display panel in Example 3 provided in the embodiments of this disclosure.

[0036] Figure 12 is a schematic diagram of the retaining wall structure in the display panel of Example 3, which is an improvement of the present disclosure.

[0037] Figure 13 is a light emission spectrum diagram of the display panel under Example 3 provided in the embodiments of this disclosure.

[0038] Figure 14 is a schematic diagram of the display panel in Example 4 provided in the embodiments of this disclosure.

[0039] Figure 15 is a schematic diagram of the retaining wall structure in the display panel of Example 4, which is an improvement of the present disclosure.

[0040] Figure 16 is a schematic diagram of the display panel in Example 5 provided in the embodiments of this disclosure.

[0041] Figure 17 is a schematic diagram of the display panel in Example 6 provided in the embodiments of this disclosure.

[0042] Figure 18 is a schematic diagram of the display panel in Example 7 provided in the embodiments of this disclosure.

[0043] Figures 19a to 19f are process flow diagrams of the undercut structure provided in the embodiments of this disclosure. Detailed Implementation

[0044] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this disclosure, and not all of them. The components of the embodiments of this disclosure described and shown in the accompanying drawings can generally be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of this disclosure provided in the accompanying drawings is not intended to limit the scope of the claimed disclosure, but merely represents selected embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the embodiments of this disclosure without inventive effort are within the scope of protection of this disclosure.

[0045] Unless otherwise defined, the technical or scientific terms used in this disclosure shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” and similar terms used in this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, the terms “an,” “a,” or “the,” and similar terms do not indicate a quantity limitation, but rather indicate the presence of at least one. The terms “including,” “comprising,” or “containing,” and similar terms mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. The terms “connected,” “linked,” or similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. The terms “upper,” “lower,” “left,” and “right,” etc., are used only to indicate relative positional relationships, and these relative positional relationships may change accordingly when the absolute position of the described objects changes.

[0046] In this disclosure, "multiple or several" refers to two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, or B alone. The character " / " generally indicates that the preceding and following related objects have an "or" relationship.

[0047] In related technologies, as shown in Figure 1a, the light-emitting device 2 includes an anode AND, a light-emitting layer EML, and a cathode CTD. To improve carrier (hole and / or electron) transport efficiency and thus increase luminous efficiency, the light-emitting device 2 also includes a common transport layer 24 to assist hole and / or electron transport, such as a hole transport layer (HTL, not shown in the figure) and an electron transport layer (ETL, not shown in the figure). The hole transport layer (HTL) significantly promotes hole transport, and the electron transport layer (ETL) significantly promotes electron transport. However, this can lead to lateral leakage between adjacent light-emitting devices 2, causing one color light-emitting device 2 to emit light simultaneously with another color light-emitting device 2, resulting in impure monochrome display and causing partial white balance deviations, thus affecting the display effect. Furthermore, if the light-emitting layers EML of adjacent light-emitting devices 2 overlap due to process fluctuations, lateral leakage can also occur, causing cross-coloring. As shown in Figure 1b, when the green light-emitting device G is lit, the red light-emitting device R is also lit, resulting in red-green cross-coloring. The horizontal axis represents wavelength, and the vertical axis represents luminous intensity.

[0048] In view of this, the present disclosure provides a display panel that essentially reduces the transmission efficiency of charge carriers (holes and / or electrons) by increasing the resistance of the common transmission layer 24 shared by each light-emitting device 2, thereby reducing lateral leakage current and improving the display effect.

[0049] Specifically, Figure 2a is a schematic diagram of the display panel in Example 1 provided by the embodiment of this disclosure, and Figure 2b is a partial enlarged view of region Q1 in Figure 2a. As shown in Figure 2a, the display panel includes a substrate 1, a pixel limiting layer (PDL) disposed on the substrate 1, and a plurality of light-emitting devices 2. The light-emitting device 2 includes a first electrode 21, a light-emitting functional layer 23, and a second electrode 22 disposed sequentially along a direction away from the substrate 1. One of the first electrode 21 and the second electrode 22 is an anode (AND), and the other is a cathode (CTD). For ease of understanding, this disclosure uses the example of the first electrode 21 being the anode (AND) and the second electrode 22 being the cathode (CTD) for explanation. The light-emitting functional layer 23 includes at least a light-emitting layer (EML) and a common transport layer 24; the common transport layer 24 is shared by all light-emitting devices 2.

[0050] Optionally, the plurality of light-emitting devices 2 include a red light-emitting device R, a green light-emitting device G, and a blue light-emitting device B. The common transmission layer 24 of the red light-emitting device R, the common transmission layer 24 of the green light-emitting device G, and the common transmission layer 24 of the blue light-emitting device B are shared. The red light-emitting layer R-EML in the red light-emitting device R, the green light-emitting layer G-EML in the green light-emitting device G, and the blue light-emitting layer B-EML in the blue light-emitting device B are spaced apart, or partially overlapped due to process influences.

[0051] Optionally, the common transport layer 24 includes at least one of a hole injection layer HIL, a hole transport layer HTL, an electron blocking layer EBL, an electron injection layer EIL, an electron transport layer ETL, and a hole blocking layer HBL. The hole injection layer HIL is primarily used to improve hole injection efficiency, the hole transport layer HTL is primarily used to improve hole transport efficiency, the electron blocking layer EBL is primarily used to block electron transport, the electron injection layer EIL is primarily used to improve electron injection efficiency, the electron transport layer ETL is primarily used to improve electron transport efficiency, and the hole blocking layer HBL is primarily used to block holes. Optionally, for the tandem light-emitting device 2, the common transport layer 24 further includes a charge generation separation unit CGL. The charge generation separation unit CGL includes a first charge generation separation layer N-CGL and a second charge generation separation layer P-CGL. The first charge generation separation layer N-CGL is used to generate electrons and serves as an auxiliary cathode; the second charge generation separation layer P-CGL is used to generate holes and serves as an auxiliary anode.

[0052] The pixel defining layer (PDL) includes a plurality of pixel openings V and a barrier structure 3 for forming the pixel openings V. At least a portion of the light-emitting layer (EML) is defined within the pixel openings V, for example, the light-emitting layer EML extends from the pixel openings V toward the surrounding barrier structure 3. Alternatively, the light-emitting layer EML is defined within the pixel openings V. The pixel defining layer (PDL) is a full-layer structure having a plurality of pixel openings V, each pixel opening V corresponding to a light-emitting device 2, for defining the light-emitting area of ​​the light-emitting device 2. In the embodiments of this disclosure, the light-emitting device 2 refers to a light-emitting unit composed of a first electrode 21 exposed by the pixel opening V, a light-emitting layer EML defined within the pixel opening V, and a second electrode 22.

[0053] As shown in Figure 2b, at least one groove 4 is provided in the barrier structure 3 between at least some of the adjacent pixel openings V. The groove 4 is located on the surface of the barrier structure 3 facing away from the substrate 1. The common transmission layer 24 is located in the first sub-part 241 of the barrier structure 3 facing away from the substrate 1 and is recessed in the groove 4. Optionally, the light-emitting layer EML is located in the second sub-part 242 of the barrier structure 3 facing away from the substrate 1 and is recessed in the groove 4.

[0054] It should be noted that for large-size display panels, the resistivity of the common transport layer 24 is related to the carrier concentration and carrier mobility, i.e., ρ = 1 / (n × q × μ), where ρ represents resistivity, n represents carrier concentration, q represents electron charge, and μ represents carrier mobility. The resistance of the common transport layer 24 is related to the material resistivity, dimensions, and cross-sectional area, i.e., R = ρ × L / S, where R represents resistance, ρ represents material resistivity, L represents resistance length, and S represents resistance cross-sectional area. Therefore, a higher resistance results in lower carrier mobility and greater resistance to carrier movement, thus reducing lateral leakage. In this embodiment, the common transmission layer 24 extends from the pixel opening V to the surrounding barrier structure 3, passes through the groove 4 on the barrier structure 3 and is recessed, so that the first sub-part 241 is no longer a flat structure, but a recessed structure. Compared with the flat structure shown in FIG1a, this disclosure increases the leakage path of the common transmission layer 24, which is equivalent to increasing the length L of the common transmission layer 24, or the recessed first sub-part 241 may be blocked by the groove 4, which is equivalent to reducing the area S of the common transmission layer 24. In both cases, the resistance of the common transmission layer 24 can be increased, thereby reducing lateral leakage.

[0055] In some embodiments, the second electrodes 22 of each light-emitting device 2 are connected as an integral structure, that is, the second electrodes 22 of each light-emitting device 2 are shared. They can be integrally formed by whole-surface vapor deposition process, which can simplify the process flow and circuit layout design, while ensuring low cost.

[0056] In some embodiments, the groove 4 may be a through groove or a blind groove. The design of the groove 4 depth needs to ensure that the second electrode 22 is not interrupted, so as to ensure the continuity of the second electrode 22 deposited over the entire surface. The specific value of the groove 4 depth is not limited in this disclosure.

[0057] In some embodiments, as shown in FIG2b, the groove 4 does not separate the first sub-part 241. The groove 4 includes a first sidewall 41 and a bottom wall 42, and a portion of the structure in the first sub-part 241 fills the groove 4 continuously. The first sub-part 241 specifically includes a first sub-section 2411 covering the first sidewall 41 and a second sub-section 2412 covering the bottom wall 42. The first sub-section 2411 and the second sub-section 2412 are an integral structure. The term "integral structure" here refers to a structure that is connected in the same layer as an integral structure. For example, the first sub-part 241 includes a hole injection layer HIL, a hole transport layer HTL, an electron blocking layer EBL, an electron injection layer EIL, an electron transport layer ETL, and a hole blocking layer HBL, which are sequentially disposed along the direction away from the substrate 1. The first sub-part 2411 and the second sub-part 2412 are an integral structure, meaning that the hole injection layer HIL, which covers the first sidewall 41 and the bottom wall 42 and is of the same layer, is connected as an integral structure; similarly, the hole transport layer HTL, which covers the first sidewall 41 and the bottom wall 42 and is of the same layer, is connected as an integral structure; the electron blocking layer EBL, which covers the first sidewall 41 and the bottom wall 42 and is of the same layer, is connected as an integral structure; the electron injection layer EIL, which covers the first sidewall 41 and the bottom wall 42 and is of the same layer, is connected as an integral structure; the electron transport layer ETL, which covers the first sidewall 41 and the bottom wall 42 and is of the same layer, is connected as an integral structure; and the hole blocking layer HBL, which covers the first sidewall 41 and the bottom wall 42 and is of the same layer, is connected as an integral structure.

[0058] Specifically, Figure 3 is a schematic diagram of the groove in Example 1 provided by the present disclosure. As shown in Figure 3, in the design of the groove 4 in this embodiment, the leakage path L of the common transmission layer 24 is 2×k×h / sin(β)+W×k+L1+L2+…. Wherein, k represents the number of grooves 4 between two adjacent light-emitting devices 2; W represents the maximum lateral dimension of the bottom wall 42; h represents the depth of the groove 4; β represents the slope angle of the groove 4, that is, the dihedral angle formed between the first surface where the first sidewall 41 is located and the second surface where the bottom wall 42 is located; h / sin(β) represents the oblique dimension of the first sidewall 41; L1 and L2, …, successively represent the lateral dimensions of the barrier structure 3 that the common transmission layer 24 passes through on the side facing away from the substrate 1. Thus, compared with the prior art where the leakage path is the width W' of the barrier structure 3 between two adjacent light-emitting devices 2 in the horizontal direction, the leakage path L of the common transmission layer 24 in this disclosure is greater than W'. Therefore, this embodiment increases the leakage path compared with the prior art, improving the poor lateral leakage.

[0059] Optionally, as shown in Figure 3, the dihedral angle β formed between the first surface where the first sidewall 41 is located and the second surface where the bottom wall 42 is located is greater than 90°, ensuring that the first sub-part 241 is both recessed into the groove 4 and can remain continuous. Optionally, the dihedral angle β is an obtuse angle, for example, β is greater than 95°, forming a gentle slope, which is beneficial to ensuring the continuity of the second electrodes 22 of each light-emitting device 2.

[0060] In this embodiment, the first sub-part 2411 is inclined, which increases the leakage path of the common transmission layer 24 compared to the horizontal setting. This is equivalent to increasing the length L of the common transmission layer 24, thus increasing the resistance of the common transmission layer 24 and reducing lateral leakage.

[0061] It should be noted that the width of the groove 4, such as the width W of the bottom wall 42, depends on the number k of the grooves 4 and the slope angle β of the grooves 4. In this disclosure, the number k of the grooves 4 can be determined comprehensively based on the characteristics of the OLED organic material and the performance of the product, and is not limited here.

[0062] In some embodiments, as shown in FIG3, the height H of the barrier structure 3 is greater than the thickness of the common transport layer 24, ensuring that the groove 4 provided on the barrier structure 3 can achieve the effect of recessing the common transport layer 24. The depth h of the groove 4 is greater than the thickness of at least one sub-film layer in the common transport layer 24. Exemplarily, the common transport layer 24 includes at least one of the hole injection layer HIL, hole transport layer HTL, electron blocking layer EBL, electron injection layer EIL, electron transport layer ETL, and hole blocking layer HBL. The depth of the groove 4 is greater than the thickness of any one of the hole injection layer HIL, hole transport layer HTL, electron blocking layer EBL, electron injection layer EIL, electron transport layer ETL, and hole blocking layer HBL.

[0063] Optionally, as shown in Figure 4, for the light-emitting device 2 with a single-layer light-emitting layer EML, the common transport layer 24 includes a hole transport layer HTL and an electron transport layer ETL. The depth h of the groove 4 is at least greater than the thickness of the hole transport layer HTL, so as to extend the leakage path of the hole transport layer HTL after the groove is recessed, thereby reducing lateral leakage.

[0064] Optionally, as shown in Figure 5, the series-connected light-emitting device 2 includes multiple light-emitting layers EML. Taking two light-emitting layers EML as an example, they are respectively denoted as the first light-emitting layer EML1 and the second light-emitting layer EML2. The common transport layer 24 includes a hole injection layer HIL, a first hole transport layer HTL1, a first hole blocking layer HBL1, a first charge generation separation layer N-CGL, a second charge generation separation layer P-CGL, a second hole transport layer HTL2, a second hole blocking layer HBL2, an electron transport layer ETL, and an electron injection layer EIL. The series-connected light-emitting device 2 includes a first electrode 21, a hole injection layer HIL, a first hole transport layer HTL1, an electron blocking layer EBL, a first light-emitting layer EML1, a first hole blocking layer HBL1, a first charge generation separation layer N-CGL, a second charge generation separation layer P-CGL, a second hole transport layer HTL2, a second light-emitting layer EML2, a second hole blocking layer HBL2, an electron transport layer ETL, an electron injection layer EIL, and a second electrode 22, arranged sequentially along the direction away from the substrate 1. The depth h of the groove 4 is at least greater than the sum of the thicknesses of the hole injection layer HIL, the first hole transport layer HTL1, the first hole blocking layer HBL1, the first light-emitting layer EML1, the first charge generation separation layer N-CGL, and the second charge generation separation layer P-CGL, so as to extend the leakage path of charge carriers and reduce lateral leakage after the groove is recessed.

[0065] In some embodiments, the depth h of the groove 4 is less than the thickness of the light-emitting functional layer 23, ensuring that the second electrode 22 located on the side of the light-emitting functional layer 23 away from the substrate 1 can be continuous.

[0066] In some embodiments, FIG6 is a planar schematic diagram of a groove distribution provided by an embodiment of the present disclosure, and FIG7 is a planar schematic diagram of another groove distribution provided by an embodiment of the present disclosure. For the display panel under Example 1 above, the groove 4 distribution can be as shown in FIG6 and FIG7. The orthographic projection of the center line connecting any adjacent pixel openings V on the substrate 1 passes through the orthographic projection of at least one groove 4 on the substrate 1, which means that the groove 4 is used to extend the leakage path between any adjacent light-emitting devices 2 to reduce lateral leakage.

[0067] Optionally, as shown in Figure 6, any two adjacent grooves 4 are spaced apart. For example, multiple grooves 4 surround each pixel opening V, and the multiple grooves 4 are evenly distributed, with adjacent grooves 4 spaced apart, to ensure the continuity of the second electrode 22.

[0068] Optionally, as shown in FIG7, the orthographic projection of the groove 4 on the substrate 1 surrounds the orthographic projection of the light-emitting device 2 on the substrate 1, further extending the leakage path compared to the structure in FIG6, so as to reduce lateral leakage. For example, one or two grooves 4 are provided between adjacent light-emitting devices 2.

[0069] In some embodiments, FIG8a is a schematic diagram of the display panel under Example 2 provided in the present disclosure, and FIG8b is a partial enlarged view of region Q2 in FIG8a. As shown in FIG8a and FIG8b, the first sub-part 241 is at least partially blocked by a groove 4. Specifically, the first sub-part 241 is blocked by a groove 4, and at the blocked location, the common transmission layer 24 forms an opening 25 opposite to the groove 4, as shown in FIG9. Different grooves 4 are spaced apart from each other, so different openings 25 are spaced apart from each other, which is equivalent to reducing the area S of the common transmission layer 24. This can increase the resistance of the common transmission layer 24, thereby reducing lateral leakage current.

[0070] Optionally, the light-emitting layer EML is located in the second sub-part 242 of the barrier structure 3 away from the substrate 1 and is separated by the groove 4.

[0071] Optionally, as shown in FIG8b, the groove 4 includes a first sidewall 41 and a bottom wall 42. The dihedral angle α formed between the first surface where the first sidewall 41 is located and the second surface where the bottom wall 42 is located is less than 85°, forming an undercut structure for cutting off the first sub-part 241 that falls into the groove 4.

[0072] Optionally, for the light-emitting device 2 with a single-layer light-emitting layer EML, the common transport layer 24 includes a first transport unit 231 located on the side of the light-emitting layer EML near the first electrode 21 and a second transport unit 232 located on the side of the light-emitting layer EML near the second electrode 22. For example, as shown in FIG4, the first transport unit 231 includes at least a hole transport layer HTL, and the second transport unit 232 includes at least an electron transport layer ETL. The first sub-part 241 is completely separated by the groove 4; that is, the groove 4 separates the hole transport layer HTL and the electron transport layer ETL.

[0073] It should be noted that if the light-emitting layer EML extends to the side of the barrier structure 3 away from the substrate 1, the groove 4 will simultaneously block the light-emitting layer EML.

[0074] Optionally, for the series-connected light-emitting device 2, the first sub-part 241 includes multiple sub-film layers, and the groove 4 at least isolates the charge generation separation unit CGL and the sub-film layers between it and the first electrode 21. Specifically, as shown in FIG5, the common transport layer 24 includes the charge generation separation unit CGL, a first transport unit 231 and a second transport unit 232 located on the side of the charge generation separation unit CGL near the first electrode 21, and a third transport unit 233 and a fourth transport unit 234 located on the side of the charge generation separation unit CGL near the second electrode 22; a first light-emitting layer EML1 is disposed between the first transport unit 231 and the second transport unit 232, and a second light-emitting layer EML2 is disposed between the third transport unit 233 and the fourth transport unit 234; the first transport unit 231 is closer to the first electrode 21 than the second transport unit 232, and the third transport unit 233 is closer to the first electrode 21 than the fourth transport unit 234; the first transport unit 231, the second transport unit 232 and the charge generation separation unit CGL in the first sub-part 241 are isolated by the groove 4. The sub-film layer between the charge generation separation unit CGL and the second electrode 22 is not interrupted, thereby ensuring the continuity of the second electrode 22. For example, as shown in FIG5, the groove 4 interrupts the hole injection layer HIL, the first hole transport layer HTL1, the electron blocking layer EBL, the first light-emitting layer EML1, the first charge generation separation layer N-CGL, the second charge generation separation layer P-CGL, and the second hole transport layer HTL2, while at least a portion of the second light-emitting layer EML2, the second hole blocking layer HBL2, the electron transport layer ETL, and the electron injection layer EIL is not interrupted, thus ensuring the continuity of the second electrode 22.

[0075] It should be noted that, due to the influence of the depth and undercut morphology of the groove 4, the second electrode 22 and the light-emitting functional layer 23 below it are easily completely isolated. Therefore, by improving the distribution of the groove 4, it is possible to further ensure that the second electrodes 22 of adjacent light-emitting devices 2 are electrically connected to each other. In some embodiments, FIG10 is a planar schematic diagram of another groove distribution provided by the present disclosure. For the display panel under Example 2 above, the groove 4 can be distributed as shown in FIG10. The orthographic projection of the center line connecting the adjacent pixel openings V on the substrate 1 passes through the orthographic projection of at least one groove 4 on the substrate 1; the orthographic projection of the center line connecting the adjacent pixel openings V on the substrate 1 does not overlap with the orthographic projection of the groove 4 on the substrate 1, which means that the first sub-part 241 in the non-overlapping area is not isolated, and thus the second electrode 22 located thereon is also not isolated, extending flatly to avoid the second electrodes 22 of adjacent light-emitting devices 2 from being disconnected from each other.

[0076] Optionally, the cavity lengths of the different colored light-emitting devices 2 are different; the cavity length of the red light-emitting device R is greater than that of the green light-emitting device G, and the cavity length of the green light-emitting device G is greater than that of the blue light-emitting device B. Therefore, to avoid the second electrode 22 of the blue light-emitting device B being blocked, as shown in FIG10, the orthographic projection of the line connecting the center of the pixel opening V of the red light-emitting device R and the pixel opening V of the green light-emitting device G on the substrate 1 passes through the orthographic projection of at least one groove 4 on the substrate 1; the orthographic projection of the line connecting the center of the pixel opening V of the blue light-emitting device B and the pixel opening V of the red light-emitting device R on the substrate 1 does not overlap with the orthographic projection of the groove 4 on the substrate 1; the orthographic projection of the line connecting the center of the pixel opening V of the blue light-emitting device B and the pixel opening V of the green light-emitting device G on the substrate 1 does not overlap with the orthographic projection of the groove 4 on the substrate 1.

[0077] Optionally, the grooves on the retaining wall structure are spaced apart. As shown in Figure 10, the grooves 4 surrounding the red light-emitting device R are spaced apart and evenly distributed, and the number of grooves is unlimited. The grooves 4 surrounding the green light-emitting device G are spaced apart and evenly distributed, and the number of grooves is unlimited.

[0078] In some embodiments, the second sidewall in the barrier structure 3, which defines the pixel opening V, blocks at least a portion of the thickness of the common transmission layer 24.

[0079] In one possible implementation, FIG11 is a schematic diagram of the display panel under Example 3 provided in the embodiment of the present disclosure. As shown in FIG11, the second sidewall includes a side surface near the pixel opening V, a portion of which is a concave surface. Specifically, the concave surface is concave to the side away from the pixel opening V, such that the sidewall of the barrier structure 3 near the pixel opening V forms an undercut structure to block at least a portion of the thickness of the common transmission layer 24.

[0080] Optionally, as shown in FIG11, the barrier structure 3 includes a first sub-layer 31, a second sub-layer 32, and a third sub-layer 33 sequentially arranged along the direction away from the substrate 1. The first sub-layer 31 protrudes from the side of the pixel opening V defined by the first sub-layer 31 to the side of the second sub-layer 32 defining the pixel opening V, and the third sub-layer 33 protrudes from the side of the second sub-layer 32 defining the pixel opening V. The common transmission layer 24 is blocked by at least a portion of its thickness by the third sub-layer 33. The blocking principle is that the third sub-layer 33 protrudes from the second sub-layer 32, so that a discontinuity is formed between the third sub-layer 33 and the second sub-layer 32. By using a suitable discontinuity distance, at least a portion of the thickness of the common transmission layer 24 can be cut off. That is, by setting the discontinuity distance between the surface of the third sub-layer 33 near the substrate 1 and the surface of the first sub-layer 31 away from the substrate 1, any thickness of the common transmission layer 24 can be selectively blocked. Here, the design of the break height needs to meet the condition that the second electrode 22 cannot be interrupted, so as to ensure the continuity of the second electrode 22 that is vapor-deposited on the whole surface. As for the specific value of the break height, it can be designed according to the structural data of the actual product, and this disclosure does not limit it.

[0081] Figure 12 is a schematic diagram of the barrier structure in the display panel of Example 3 of the present disclosure. As shown in Figure 12, the first sub-layer 31 includes a first sub-surface 311 away from the substrate 1, the second sub-layer 32 includes a second sub-surface 321 near the pixel opening V, and the third sub-layer 33 includes a third sub-surface 331 near the substrate 1. The first sub-surface 311, the second sub-surface 321 and the third sub-surface 331 are connected to form a concave surface.

[0082] To prevent the second electrodes 22 of adjacent light-emitting devices 2 from being disconnected from each other, optionally, as shown in Figures 11 and 12, the discontinuity height h' is less than the sum of the thicknesses of the common transmission layer 24 and the light-emitting layer EML. Based on this, by reasonably setting the discontinuity height h', a portion of the thickness of the common transmission layer 24 is separated by the third sub-layer 33.

[0083] Optionally, due to the different cavity lengths of the light-emitting devices 2 of different colors, the portion of the light-emitting device 2 with a longer cavity length can be selected, and the second sidewall of the surrounding baffle structure 3 can be undercut; for the portion of the light-emitting device 2 with a shorter cavity length, the second sidewall of the surrounding baffle structure 3 can be left uncut. Because of the longer cavity length, the thickness between the first electrode 21 and the second electrode 22 is greater, so the second sidewall only blocks a portion of the thickness of the common transport layer 24, without cutting off the entire vapor-deposited second electrode 22, thus ensuring electrical connection. Furthermore, utilizing the longer cavity length, the discontinuity distance can be appropriately greater than 20 nm, facilitating fabrication.

[0084] Optionally, the bottom cut-off distance of the second sidewall of the surrounding baffle structure 3 corresponding to the longer cavity length light-emitting device 2 is greater than that corresponding to the shorter cavity length light-emitting device 2. For example, the longer cavity length portion of the light-emitting device 2 can be reasonably selected, and the second sidewall of its surrounding baffle structure 3 can be undercut, with a cut-off distance greater than 20 nm. For the shorter cavity length portion of the light-emitting device 2, the second sidewall of its surrounding baffle structure 3 is also undercut, but a cut-off distance less than 20 nm should be selected to avoid interrupting the second electrode 22 and improve lateral leakage. As shown in Figure 13, this is the emission spectrum under the interrupted structure design. When the green light-emitting device G is lit, the pure green display effect is excellent, and there is no obvious color crosstalk compared to existing technologies.

[0085] For example, it is known that the cavity length of the red light-emitting device R is greater than that of the green light-emitting device G, and the cavity length of the green light-emitting device G is greater than that of the blue light-emitting device B. Therefore, the second sidewall of the barrier structure 3 around the red light-emitting device R and the green light-emitting device G blocks part of the thickness of the common transport layer 24; the second sidewall of the barrier structure 3 around the blue light-emitting device B is not undercut, or the discontinuity distance is small, and only blocks part of the film layer of the common transport layer 24, thereby ensuring the electrical connection of the second electrode 22 deposited on the front side.

[0086] For the case of isolation, for example, for a light-emitting device 2 with a single-layer light-emitting layer EML, a third sublayer 33 can be used to isolate the first transmission unit 231 and the light-emitting layer EML; the remaining second transmission unit 232 is not isolated. For example, as shown in FIG4, the third sublayer 33 is used to isolate the hole transport layer HTL and the light-emitting layer EML to improve the electrical connection stability and continuity between the second electrodes 22 of adjacent light-emitting devices 2. For example, for a series-connected light-emitting device 2, the third sublayer 33 can be used to isolate the first transmission unit 231, the first light-emitting layer EML1, the second transmission unit 232 and the charge generation separation unit CGL; the remaining third transmission unit 233, the second light-emitting layer EML2 and the fourth transmission unit 234 are not isolated. For example, as shown in Figure 5, the third sub-layer 33 is used to isolate the hole injection layer HIL, the first hole transport layer HTL1, the electron blocking layer EBL, the first light-emitting layer EML1, the first charge generation separation layer N-CGL, and the second charge generation separation layer P-CGL, so as to improve the electrical connection stability and continuity between the second electrodes 22 of adjacent light-emitting devices 2.

[0087] Optionally, as shown in Figure 11, the materials of the first sublayer 31, the second sublayer 32, and the third sublayer 33 may be inorganic, organic, and inorganic stacked materials, or multilayer inorganic stacked materials, such as a stacked material of silicon dioxide (SiO2), silicon oxynitride (SiNx), and silicon dioxide (SiO2).

[0088] Optionally, for the three-layer undercut design shown in Figure 11, the fabrication process includes: firstly, sequentially depositing the first sublayer material, the second sublayer material, and the third sublayer material across the entire surface; then, coating with photoresist and exposing and developing to expose the area to be etched, and performing a first etching on the second and third sublayer materials within the area to be etched to form the third sublayer 33; then, performing a second etching on the second sublayer material to form a concave surface and obtaining the second sublayer 32; then, performing a third etching on the first sublayer material to form the first sublayer 31; finally, removing the photoresist to obtain a barrier structure 3 with isolation capabilities.

[0089] Optionally, Figure 14 is a schematic diagram of the display panel in Example 4 provided by the embodiments of this disclosure. As shown in Figure 14, the barrier structure 3 includes a fourth sub-layer 34 and a fifth sub-layer 35 arranged sequentially along the direction away from the substrate 1. The fifth sub-layer 35 protrudes from the side of the fourth sub-layer 34 that defines the pixel opening V. The common transport layer 24 is separated by at least a portion of its thickness by the fifth sub-layer 35. The separation principle is that the fifth sub-layer 35 protrudes from the fourth sub-layer 34, creating a gap between the first sub-layer 31 and the second sub-layer 32. By using a suitable gap distance, at least a portion of the thickness of the common transport layer 24 can be cut off. That is, by setting the gap distance between the surface of the fifth sub-layer 35 near the substrate 1 and the surface of the fourth sub-layer 34 near the substrate 1, any thickness of the common transport layer 24 can be selectively separated. Here, the design of the gap height h' needs to meet the condition that the second electrode 22 cannot be separated, so as to ensure the continuity of the second electrode 22 deposited on the entire surface. As for the specific value of the gap height, it can be designed according to the structural data of the actual product, and this disclosure does not limit it.

[0090] Figure 15 is a schematic diagram of the barrier structure in the display panel of Example 4 of the present disclosure. As shown in Figure 15, the fourth sub-layer 34 includes a fourth sub-surface 341 near the pixel opening V, and the fifth sub-layer 35 includes a fifth sub-surface 351 near the substrate 1. The fourth sub-surface 341 and the fifth sub-surface 351 are connected to form a concave surface.

[0091] To prevent the second electrodes 22 of adjacent light-emitting devices 2 from being disconnected from each other, optionally, as shown in Figures 14 and 15, the discontinuity height h' is less than the sum of the thicknesses of the common transmission layer 24 and the light-emitting layer EML. Based on this, by reasonably setting the discontinuity height h', the fifth sublayer 35 is used to isolate part of the thickness of the common transmission layer 24.

[0092] For example, for a light-emitting device 2 with a single-layer light-emitting layer EML, the first transmission unit 231 and the light-emitting layer EML can be isolated using a fifth sublayer 35; the remaining second transmission unit 232 is not isolated. For example, as shown in FIG4, the hole transport layer HTL and the light-emitting layer EML are isolated using a fifth sublayer 35 to improve the electrical connection stability and continuity between the second electrodes 22 of adjacent light-emitting devices 2.

[0093] For example, for the series-connected light-emitting device 2, the first transmission unit 231, the first light-emitting layer EML1, the second transmission unit 232, and the charge generation separation unit CGL can be isolated using the fifth sub-layer 35; the remaining third transmission unit 233, the second light-emitting layer EML2, and the fourth transmission unit 234 are not isolated. For example, as shown in FIG5, the hole injection layer HIL, the first hole transport layer HTL1, the electron blocking layer EBL, the first light-emitting layer EML1, the first charge generation separation layer N-CGL, and the second charge generation separation layer P-CGL are isolated using the fifth sub-layer 35 to improve the electrical connection stability and continuity between the second electrodes 22 of adjacent light-emitting devices 2.

[0094] Optionally, as shown in Figure 15, the materials of the fourth sublayer 34 and the fifth sublayer 35 can be organic and inorganic stacked materials, or multilayer inorganic stacked materials, such as a stacked material of silicon oxynitride (SiNx) and silicon dioxide (SiO2).

[0095] In another possible implementation, FIG16 is a schematic diagram of the display panel under Example 5 provided in the embodiments of this disclosure. As shown in FIG16, the thickness of the barrier structure 3 is less than the sum of the thicknesses of the common transport layer 24 and the light-emitting layer EML. Optionally, the side surface of the second sidewall near the pixel opening V is a flat third surface S3. The dihedral angle γ formed between the third surface S3 and the fourth surface parallel to the substrate 1 is less than 85°, forming an undercut structure to cut off part of the thickness of the common transport layer 24 falling into the pixel opening V, thereby avoiding the disconnection between the second electrodes 22 of adjacent light-emitting devices 2 and improving the electrical connection stability and continuity between the second electrodes 22 of each light-emitting device 2.

[0096] Alternatively, the material of the retaining wall structure 3 can be a negative photoresist material, so that the undercut structure can be formed in a single etching process, thereby simplifying the process and reducing costs.

[0097] In some embodiments, FIG17 is a schematic diagram of the display panel under Example 6 provided in the embodiments of this disclosure. The partition design of the retaining wall structure 3 of Example 3 can be combined with the groove 4 structure of Example 1, as shown in FIG17, to comprehensively improve the poor lateral leakage by combining partitioning and extending the leakage path.

[0098] In some embodiments, FIG18 is a schematic diagram of the display panel under Example 7 provided in the present disclosure. The partition design of the retaining wall structure 3 of Example 3 can be combined with the groove 4 structure of Example 2, as shown in FIG18, to comprehensively improve the lateral leakage problem by combining partitioning and reducing the leakage area.

[0099] Similarly, the partition design of the retaining wall structure 3 in Example 4 can also be combined with the groove 4 structure in Example 1 or Example 2, and the repeated parts will not be described again. The partition design of the retaining wall structure 3 in Example 5 can also be combined with the groove 4 structure in Example 1 or Example 2, and the repeated parts will not be described again.

[0100] Of course, in this disclosure, the undercut structure shown in Figures 12, 15 and 16 can also be set as an independent partition structure on the side of the pixel limiting layer PDL close to the substrate 1, and the pixel opening V corresponds one-to-one with the opening of the undercut structure.

[0101] Figures 19a to 19f are process flow diagrams of the undercut structure provided in the embodiments of this disclosure. For the three-layer undercut structure design shown in Figures 11 and 12, the fabrication process is as follows: S11. An intermediate substrate is provided. This intermediate substrate can be a semi-finished product from an intermediate fabrication stage, such as including the aforementioned substrate 1, and a driving layer 5 and a planarization layer PLN sequentially disposed on the substrate 1. The driving layer 5 includes at least a pixel driving circuit (not shown in the figures) for driving the light-emitting device 2. The pixel driving circuit includes at least a transistor TFT. S12. As shown in Figure 19a, a first sublayer material 3101, a second sublayer material 3201, and a third sublayer material 3301, such as a stacked material of silicon dioxide (SiO2), silicon oxynitride (SiNx), and silicon dioxide (SiO2), are sequentially deposited on the entire surface of the intermediate substrate. S13. As shown in Figure 19b, photoresist (such as PR resist) is coated on the side of the third sublayer material 3301 facing away from the planarization layer PLN, and then exposed and developed to obtain a photoresist pattern 71. The photoresist pattern includes at least a light-shielding area and a light-transmitting area; the portion of the photoresist pattern located in the light-shielding area is used to block the non-etched portions of the stacked material, and the light-transmitting area is used to expose the etchable portions of the stacked material. S14, As shown in Figure 19c, the third sublayer material 3301 and the second sublayer material 3201 exposed by the photoresist pattern are etched in the first step to form the third sublayer 33 and the intermediate section of the second sublayer material 3201. S15, As shown in Figure 19d, the intermediate section of the second sublayer material 3201 is etched in the second step to form a concave surface and obtain the second sublayer 32. S17, As shown in Figure 19e, the first sublayer material 3101 exposed by the photoresist pattern is etched in the third step to form the first sublayer 31. S18, As shown in Figure 19f, the photoresist pattern is removed to obtain a barrier structure 3 with isolation capabilities.

[0102] This disclosure also provides a display device comprising the display panel described in any of the above embodiments. The display device can be, for example, any product with a display function such as a mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, or in-vehicle device. Other essential components of this display device are readily understood by those skilled in the art and will not be described in detail here, nor should they be construed as limiting the scope of this disclosure.

[0103] It is understood that the above embodiments are merely exemplary embodiments used to illustrate the principles of this disclosure, and this disclosure is not limited thereto. For those skilled in the art, various modifications and improvements can be made without departing from the spirit and substance of this disclosure, and these modifications and improvements are also considered to be within the scope of protection of this disclosure.

Claims

1. A display panel, comprising a substrate, a pixel defining layer disposed on the substrate, and a plurality of light-emitting devices; each light-emitting device includes a first electrode, a light-emitting functional layer, and a second electrode disposed sequentially in a direction away from the substrate; the light-emitting functional layer includes at least a light-emitting layer and a common transmission layer; the common transmission layer is shared by each of the light-emitting devices; The pixel defining layer includes a plurality of pixel openings and a barrier structure for forming the pixel openings; at least a portion of the light-emitting layer is defined within the pixel openings; at least a portion of the barrier structure between adjacent pixel openings is provided with at least one groove, the groove being located on the surface of the barrier structure facing away from the substrate, and the common transmission layer being recessed in the groove in a first sub-portion of the barrier structure facing away from the substrate.

2. The display panel of claim 1, wherein, The groove includes a first sidewall and a bottom wall. The first sub-part includes a first sub-section covering the first sidewall and a second sub-section covering the bottom wall. The first sub-section and the second sub-section are an integral structure.

3. The display panel of claim 2, wherein, The dihedral angle formed between the first surface where the first sidewall is located and the second surface where the bottom wall is located is greater than 90°.

4. The display panel of claim 2, wherein, The height of the retaining wall structure is greater than the thickness of the common transmission layer; the depth of the groove is greater than the thickness of at least one sub-film layer in the common transmission layer.

5. The display panel of claim 2, wherein, The depth of the groove is less than the thickness of the light-emitting functional layer.

6. The display panel according to any one of claims 1 to 5, wherein The orthographic projection of the center line connecting any two adjacent pixel openings onto the substrate passes through the orthographic projection of at least one of the grooves onto the substrate.

7. The display panel of claim 6, wherein, The grooves are spaced apart from any two adjacent grooves.

8. The display panel of claim 6, wherein, The orthogonal projection of the groove on the substrate surrounds the orthogonal projection of the light-emitting device on the substrate.

9. The display panel of claim 1, wherein, The first sub-part is separated by the groove at least partially by its thickness.

10. The display panel of claim 9, wherein, The groove includes a first sidewall and a bottom wall, and the dihedral angle formed between the first surface where the first sidewall is located and the second surface where the bottom wall is located is less than 85°.

11. The display panel of claim 2 or 9, wherein, A portion of the orthographic projection of the center line connecting adjacent pixel openings on the substrate passes through the orthographic projection of at least one groove on the substrate; a portion of the orthographic projection of the center line connecting adjacent pixel openings on the substrate does not overlap with the orthographic projection of the groove on the substrate.

12. The display panel of claim 11, wherein, The grooves on the retaining wall structure are spaced apart.

13. The display panel of claim 2 or 9, wherein, The second sidewall in the retaining wall structure, which defines the pixel opening, blocks at least a portion of the thickness of the common transport layer.

14. The display panel of claim 13, wherein, The second sidewall includes a side surface near the pixel opening, a portion of which is a concave surface.

15. The display panel of claim 13, wherein, The side surface of the second sidewall near the pixel opening is a flat third surface, and the dihedral angle formed between the third surface and the fourth surface parallel to the substrate is less than 85°.

16. The display panel of claim 1, wherein, The second electrodes of each of the light-emitting devices are connected as a single structure.

17. A display device, wherein, Includes the display panel as described in any one of claims 1 to 16.

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