Voltage drop acquisition circuit, power device driving circuit and electronic device

Abstract

A voltage drop acquisition circuit, a power device driving circuit and an electronic device. The voltage drop acquisition circuit is suitable for acquiring an on-state voltage drop of a power device, and comprises: a target device, which is a device on a driver chip desaturation protection path (12); and a voltage sampling unit (31), which is connected to a first node and a second node of the target device, wherein the first node or the second node of the target device is adapted to be connected to the power device (2), and the voltage sampling unit (31) is configured to acquire node voltages of the first node and the second node, convert the node voltages into an on-state voltage drop of the power device (2), and output the on-state voltage drop.

Description

Voltage drop acquisition circuit, power device drive circuit and electronic equipment

[0001] Cross-references to related applications

[0002] This application claims priority to Chinese Patent Application No. 202510107134.1, filed on January 22, 2025, entitled "Voltage Drop Acquisition Circuit, Power Device Drive Circuit and Electronic Equipment", the entire contents of which are incorporated herein by reference. Technical Field

[0003] This application relates to the field of electronic technology, and in particular to a voltage drop acquisition circuit, a power device drive circuit, and an electronic device. Background Technology

[0004] Currently, the measurement of the on-state voltage drop parameter of power devices typically relies on external parameter testing platforms. This involves connecting the power device to an external platform to simulate various operating scenarios, thereby obtaining the on-state voltage drop parameter under different conditions. Therefore, this approach cannot meet the need for real-time monitoring of the on-state voltage drop during the actual operation of power electronic equipment, and it suffers from the inability to obtain the operating status of the power device in real time based on its on-state voltage drop. Summary of the Invention

[0005] This application provides a voltage drop acquisition circuit, a power device driving circuit, and an electronic device, which can realize real-time monitoring of the on-state voltage drop of the power device, and thus obtain the working status of the power device in real time based on the on-state voltage drop of the power device.

[0006] In a first aspect, embodiments of this application provide a voltage drop acquisition circuit suitable for acquiring the on-state voltage drop of power devices, including:

[0007] The target device is the device in the desaturation protection path of the driver chip;

[0008] A voltage sampling unit is connected to a first node and a second node of the target device, wherein the first node or the second node of the target device is adapted to connect a power device.

[0009] The voltage sampling unit is used to collect the node voltages of the first node and the second node, and convert the node voltages into the on-state voltage drop of the power devices, and output the on-state voltage drop.

[0010] In some embodiments of this application, the target device includes a target high-voltage diode, the first node and the second node are the input terminal and the output terminal of the target high-voltage diode, respectively, and the output terminal of the target high-voltage diode is adapted to be connected to a power device.

[0011] In some embodiments of this application, the target high-voltage diode includes: a first high-voltage diode and a second high-voltage diode, wherein the input terminal of the second high-voltage diode is connected to the output terminal of the first high-voltage diode, and the output terminal of the second high-voltage diode is adapted to be connected to a power device; and the input terminal of the first high-voltage diode is adapted to be connected to a driver chip.

[0012] In some embodiments of this application, the voltage sampling unit includes an operational amplifier; the two input terminals of the operational amplifier are respectively connected to the first node and the second node, and the output terminal of the operational amplifier is connected to one input terminal. The operational amplifier is used to collect the node voltages of the first node and the second node, and to obtain the on-state voltage drop of the power device based on the node voltage conversion, and output the on-state voltage drop.

[0013] In some embodiments of this application, the voltage sampling unit further includes: a first resistor; the inverting input terminal of the operational amplifier is connected to the first node through the first resistor.

[0014] In some embodiments of this application, the voltage sampling unit further includes: a second resistor; one end of the second resistor is connected between the first resistor and the inverting input terminal, and the other end of the second resistor is connected to the output terminal of the operational amplifier.

[0015] In some embodiments of this application, the voltage drop acquisition circuit includes: a clamping unit; the clamping unit is connected to at least one target node among the first node and the second node, and is used to clamp the node voltage of the target node to a target voltage range.

[0016] In some embodiments of this application, the clamping unit includes: a clamping component; the two ends of the clamping component are respectively connected to a first node and a second node.

[0017] In some embodiments of this application, the clamping component includes: a first diode; the input and output terminals of the first diode are respectively connected to a second node and a first node.

[0018] In some embodiments of this application, the clamping unit further includes: a filtering component; the input terminal of the clamping component is connected to the first node through the filtering component, or the output terminal of the clamping component is connected to the first node through the filtering component; the filtering component is used to filter the signal of the input voltage sampling unit.

[0019] In some embodiments of this application, the filtering component includes a first capacitor and a third resistor; the first capacitor and the third resistor are connected in parallel.

[0020] In some embodiments of this application, the clamping unit includes: a Zener diode and a second diode; one end of the Zener diode is connected to a high-voltage node, and the other end of the Zener diode is grounded through the second diode; the high-voltage node is the node closer to the power device between the first node and the second node.

[0021] In some embodiments of this application, the voltage drop acquisition circuit further includes: an overshoot suppression circuit; the overshoot suppression circuit is connected to the high-voltage node and the target input terminal of the operational amplifier, and is used to suppress the voltage of the high-voltage node transmitted to the target input terminal, wherein the high-voltage node is the node closer to the power device in the first node and the second node.

[0022] In some embodiments of this application, the overshoot suppression circuit includes: a second capacitor and a fourth resistor; one end of the fourth resistor is connected to a high-voltage node, the other end of the fourth resistor is connected to the target input terminal and one end of the second capacitor, and the other end of the second capacitor is grounded.

[0023] In some embodiments of this application, the overshoot suppression circuit further includes: a third capacitor; one end of the third capacitor is connected to the low-voltage node, and the other end of the third capacitor is connected to the connection path between the fourth resistor, the target input terminal, and the second capacitor, wherein the low-voltage node is the node further away from the power device between the first node and the second node.

[0024] In some embodiments of this application, the voltage drop acquisition circuit further includes: an isolation unit; the isolation unit is connected to the voltage sampling unit and is used to receive the on-state voltage drop of the voltage sampling unit and isolate the output on-state voltage drop.

[0025] In a second aspect, a power device driving circuit is provided, including a power device and any of the voltage drop acquisition circuits in the first aspect. The power device is connected to a target device, and the desaturation protection path of the driving chip includes the target device. The detection voltage obtained through the desaturation protection path of the driving chip is used to detect whether the overcurrent protection of the power device is triggered.

[0026] In some embodiments of this application, the power device driving circuit further includes: a driving chip connected to a driving chip desaturation protection path, used to receive a detection voltage and drive the power device when it is determined from the detection voltage that overcurrent protection has not been triggered.

[0027] In some embodiments of this application, the driver chip desaturation protection path further includes a fourth capacitor; one end of the fourth capacitor is connected to the driver chip and the driver chip desaturation protection path, and the other end of the fourth capacitor is grounded.

[0028] In some embodiments of this application, the voltage drop acquisition circuit further includes: a constant current power supply unit; the constant current power supply unit is connected to the connection path between the driver chip and the low-voltage node, and is used to supply power to the fourth capacitor to accelerate the charging speed of the fourth capacitor, wherein the low-voltage node is the node further away from the power device between the first node and the second node.

[0029] In some embodiments of this application, the driver chip includes an isolation unit; the isolation unit of the voltage drop acquisition circuit is the isolation unit in the driver chip.

[0030] Thirdly, an electronic device is provided, the electronic device including a power device and a power device drive circuit according to any of the second aspects.

[0031] This application has the following advantages:

[0032] In this embodiment, the voltage drop acquisition circuit suitable for acquiring the on-state voltage drop of a power device includes: a target device on the desaturation protection path of the driver chip, and a voltage sampling unit. The voltage sampling unit is connected to a first node and a second node of the target device, and the first or second node of the target device is suitable for connecting to the power device. In this technical solution, the detection voltage on the desaturation protection path of the driver chip has a specific conversion relationship with the on-state voltage drop of the power device, which is used to determine whether the overcurrent protection of the power device is triggered. Therefore, by reusing the desaturation protection path of the driver chip, the voltage sampling unit of the voltage drop acquisition circuit can acquire the node voltages of the first and second nodes of the target device on the desaturation protection path of the driver chip without affecting the normal operation of the power device, and obtain the on-state voltage drop of the power device based on the node voltage conversion, thus realizing the acquisition of the on-state voltage drop of the power device. Furthermore, since the desaturation protection path of the driver chip is part of the normal operating circuit of the power device... Therefore, the voltage sampling unit can collect the node voltage on the desaturation protection path of the driver chip in real time, and use it to convert it into the on-state voltage drop of the power device, realize the real-time monitoring of the on-state voltage drop of the power device, and then obtain the working status of the power device in real time based on the on-state voltage drop of the power device.

[0033] The above description is only an overview of the technical solution of this application. In order to better understand the technical means of this application and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of this application more obvious and understandable, the following are specific embodiments of this application. Attached Figure Description

[0034] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the accompanying drawings used in the description of the embodiments will be briefly introduced below.

[0035] Figure 1 is one of the schematic diagrams of the peripheral circuit of the power device provided in the embodiment of this application;

[0036] Figure 2 is a schematic diagram of one of the overvoltage protection circuits provided in the embodiments of this application;

[0037] Figure 3 is a second schematic diagram of the overvoltage protection circuit provided in the embodiment of this application;

[0038] Figure 4 is a third schematic diagram of the overvoltage protection circuit provided in the embodiment of this application;

[0039] Figure 5 is a fourth schematic diagram of an overvoltage protection circuit provided in an embodiment of this application;

[0040] Figure 6 is a fifth schematic diagram of an overvoltage protection circuit provided in an embodiment of this application;

[0041] Figure 7 is a timing diagram of an overvoltage protection circuit provided in an embodiment of this application, number six.

[0042] Figure 8 is a seventh structural schematic diagram of the overvoltage protection circuit provided in the embodiment of this application;

[0043] Figure 9 is a schematic diagram of the overvoltage protection circuit provided in the embodiment of this application (the eighth one).

[0044] Figure 10 is a schematic diagram of the overvoltage protection circuit provided in the embodiment of this application (nine).

[0045] Figure 11 is a schematic diagram of an overvoltage protection circuit provided in an embodiment of this application;

[0046] Figure 12 is an eleventh schematic diagram of an overvoltage protection circuit provided in an embodiment of this application;

[0047] Figure 13 is a timing diagram of an overvoltage protection circuit provided in an embodiment of this application, number 12.

[0048] Figure 14 is a timing diagram of an overvoltage protection circuit provided in an embodiment of this application, number thirteen. Detailed Implementation

[0049] Exemplary embodiments of the present application will now be described in more detail with reference to the accompanying drawings. While exemplary embodiments of the present application are shown in the drawings, it should be understood that the present application may be implemented in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this application will be thorough and complete, and will fully convey the scope of the present application to those skilled in the art.

[0050] With increasing emphasis on environmental protection and low carbon emissions, the development of new energy vehicles has accelerated significantly. The integration of automotive technologies with energy, transportation, and information communication technologies is accelerating, with electrification, connectivity, and intelligence becoming the development trend of the automotive industry. New technologies for new energy vehicles are emerging rapidly. For example, patent applications CN202410658157.7 (publication number CN118238797B) entitled "Intelligent Energy Management System, Control Method, and Related Equipment for New Energy Vehicles"; CN202410672579.X (publication number CN118597091A) entitled "Intelligent Energy Management Method, System, and Related Equipment for New Energy Vehicles"; and CN202010470247.5 (publication number CN113734146B) entitled "Vehicle Driving Mode Selection Method, Device, Equipment, and Medium" all describe hybrid technology primarily based on electricity, possessing multiple advantages such as speed, fuel efficiency, quietness, smoothness, and environmental friendliness.

[0051] Applications CN202211678720.4 and CN117382629B, entitled "Power Control Method, Device, Medium, Vehicle Controller, and Vehicle for a Vehicle"; CN202311164098.X and CN116890770B, entitled "Vehicle Control System, Method, and Vehicle"; and CN202311170393.6 and CN117533292B, entitled "Vehicle Control System, Control Method, Controller, and Vehicle," all describe a new energy power system with four wheel-side motors independently driven as its core, which greatly improves the safety and power performance of new energy vehicles.

[0052] To at least partially solve the above problems, this application provides a voltage drop acquisition circuit, a power device drive circuit, and an electronic device. Please refer to Figure 1, which shows a schematic diagram of an overcurrent protection circuit for a power device according to an embodiment of this application. As shown in Figure 1, the overcurrent protection circuit 1 for the power device includes: an integrated circuit chip (IC) 11 and a driver over-current protection (DESAT) path 12. The driver chip 11 is connected to the power device 2 through the DESAT path 12. The DESAT path is used to transmit a detection voltage to the driver chip to determine whether overcurrent protection is triggered. The driver chip is used to output a drive signal to the power device to drive the power device to operate.

[0053] Specifically, the detection voltage and the forward voltage drop (Vcesat) of the power device have a specific conversion relationship. Therefore, the magnitude of the detection voltage can effectively reflect the magnitude of the forward voltage drop of the power device. When the power device is normally conducting, the forward voltage drop of the power device is normal, and the detection voltage is also normal. The driver chip will not trigger hardware overcurrent protection if the detection voltage is less than or equal to the DESAT voltage threshold (VDESAT). However, in the event of a short circuit in the power device, the forward voltage drop of the power device increases rapidly. The detection voltage also increases rapidly. When the detection voltage exceeds the DESAT voltage threshold (VDESAT), the driver chip triggers hardware overcurrent protection to control the driver chip to stop outputting drive signals to the power device, thereby causing the power device to stop working.

[0054] In some cases, the power device is taken as an IGBT (Insulated Gate Bipolar Transistor). Please continue to refer to Figure 1. The overcurrent protection circuit 1 includes: a fourth capacitor C4, a third diode D3, a fifth resistor R5, a first high-voltage diode D11, and a second high-voltage diode D12.

[0055] The driver chip 11 has a DESAT pin, which is connected to the collector of the IGBT via a fifth resistor R5, a first high-voltage diode D11, and a second high-voltage diode D12. One end of the fourth capacitor C4 is connected to the connection path between the driver chip 11 and the fifth resistor R5, while the other end of the fourth capacitor C4 is grounded. The anode of the third diode D3 is connected to the connection path between the fourth capacitor C4 and the fifth resistor R5, while the cathode of the third diode D3 is grounded.

[0056] Clearly, in Figure 1, the DESAT path refers to the signal path formed by the fourth capacitor C4, the third diode D3, the fifth resistor R5, the first high-voltage diode D11, and the second high-voltage diode D12. The detection voltage is the voltage of the fourth capacitor C4.

[0057] Furthermore, the driver chip 11 includes: a comparator U1, a MOS transistor (Metal-Oxide-Semiconductor) Q1, a logic processing module 111, and a constant current source IS.

[0058] The constant current source IS is connected to the DESAT pin to supply power to the DESAT pin. The logic processing module 111 is connected to the first stage of MOSFET Q1, the second stage of MOSFET Q1 is grounded, and the third stage of MOSFET Q1 is connected to the DESAT pin.

[0059] The non-inverting input of comparator U1 is connected to the DESAT pin to receive the detection voltage (the voltage of the fourth capacitor C4). The inverting input of comparator U1 is used to connect to the DESAT voltage threshold VDESAT. Comparator U1 outputs a first result signal to logic processing module 111 when the detection voltage is greater than the DESAT voltage threshold; and outputs a second result signal to logic processing module 111 when the detection voltage is less than or equal to the DESAT voltage threshold.

[0060] The logic processing module 111 is used to output a turn-on voltage to the MOSFET Q1 when a second result signal is received, indicating that the power device is operating normally. The MOSFET Q1 is turned on under the control of the turn-on voltage, so that the constant current source IS is connected to ground and begins to supply power to the DESAT pin. The logic processing module 111 is also used to stop outputting the turn-on voltage to the MOSFET Q1 when a first result signal is received, indicating that the power device is not operating normally. The MOSFET Q1 is used to turn off when no turn-on voltage is received, so that the constant current source IS is disconnected from ground and stops supplying power to the DESAT pin.

[0061] Based on this, the working principle of overcurrent protection for power devices is as follows:

[0062] When the power device is normally turned on, the constant current source IS of the driver chip supplies power to the fourth capacitor C4 through the DESAT pin, charging the fourth capacitor C4. Thus, the voltage of the fourth capacitor C4 (i.e., the detection voltage) VC4 satisfies: VC4 = VR5 + VD11 + VD12 + Vcesat. That is, the voltage of the fourth capacitor C4 is equal to the sum of: the voltage VR5 of the fifth resistor R5, the voltage VD11 of the first high-voltage diode, the voltage VD12 of the second high-voltage diode D12, and the on-state voltage drop Vcesat of the power device 2. In this case, the on-state voltage drop of the power device 2 is normal, therefore the detection voltage is normally less than or equal to the DESAT voltage threshold VDESAT. The comparator U1 in the driver chip 11 outputs a second result signal to the logic processing module 111. The logic processing module 111 receives the second result signal and outputs a turn-on voltage to the MOSFET Q1, turning on the MOSFET Q1, connecting the constant current source IS to ground, and continuously supplying power to the DESAT pin.

[0063] When the power device is short-circuited, the on-state voltage drop Vcesat of power device 2 increases rapidly, and the voltage of the fourth capacitor C4 increases rapidly as well, until it exceeds the DESAT voltage threshold VDESAT. At this time, the comparator U1 in the driver chip 11 outputs a first result signal to the logic processing module 111 when the voltage of the fourth capacitor C4 is greater than the DESAT voltage threshold VDESAT. The logic processing module 111 receives the first result signal, stops outputting the on-state voltage to the MOSFET Q1, so that the MOSFET Q1 is turned off, the constant current source IS is disconnected from ground, the power supply to the DESAT pin is stopped, and the hardware overcurrent protection of the power device is triggered.

[0064] In some embodiments, the driver chip 11 has a drive output pin, including: a sixth resistor R6, a fourth diode D4, a fifth diode D5, a seventh resistor R7, and a fifth capacitor C5. The drive output pin is connected to the base of the IGBT through the sixth resistor R6, and the emitter of the IGBT is grounded. One end of the fifth capacitor C5 is connected to the connection path between the sixth resistor R6 and the IGBT, and the other end of the fifth capacitor C5 is grounded. One end of the seventh resistor R7 is connected to the connection path between the sixth resistor R6 and the fifth capacitor C5, and the other end of the seventh resistor R7 is grounded. The anode of the fourth diode D4 is connected to the connection path between the sixth resistor R6 and the seventh resistor R7, the cathode of the fourth diode D4 is connected to the cathode of the fifth diode D5, and the anode of the fifth diode D5 is grounded.

[0065] The sixth resistor R6, the fourth diode D4, the fifth diode D5, the seventh resistor R7, and the fifth capacitor C5 constitute the driving circuit for the power device. The driver chip 11 can be used to output a driving signal to the power device through the drive output pin to drive the power device to conduct, that is, to turn on the power device.

[0066] Based on this, the hardware overcurrent protection triggered by the overcurrent protection of the power device can be: stop outputting the drive signal to the power device so that the power device is turned off, that is, the power device stops working, thereby protecting the power device.

[0067] Please refer to Figure 2, which shows a schematic diagram of a power device driving circuit provided in an embodiment of this application. As shown in Figure 2, the power device driving circuit includes a power device 2 and a voltage drop acquisition circuit 3 for the power device provided in an embodiment of this application. In some cases, the power device driving circuit includes an overcurrent protection circuit 1, a power device 2, and a voltage drop acquisition circuit 3 for the power device provided in an embodiment of this application. In the overcurrent protection circuit 1, the driving chip 11 is connected to the power device 2 via a DESAT path 12. The DESAT path 12 is used to transmit a detection voltage to the driving chip 11 to determine whether overcurrent protection is triggered. In some embodiments, the overcurrent protection circuit can be the overcurrent protection circuit 1 shown in Figure 1 above.

[0068] The voltage drop acquisition circuit 3 may include a target device and a voltage sampling unit 31. The target device is a device on the DESAT path 12. The voltage sampling unit 31 is connected to the first node and the second node of the target device on the DESAT path 12, and the first node or the second node of the target device is adapted to connect to the power device 2. The voltage sampling unit 31 is used to acquire the node voltage of the first node and the second node, convert the node voltage into the forward voltage drop of the power device, and output the forward voltage drop.

[0069] There is a voltage drop between the first node and the second node of the target device on the DESAT path 12. In some embodiments, the target device can be a single electronic component on the DESAT path 12. Alternatively, the target device can be a device assembly composed of at least two electronic components on the DESAT path 12. Specifically, the first node and the second node can be the input and output terminals of the target device on the DESAT path 12, respectively.

[0070] In some embodiments of this application, the DESAT path 12 includes a target high-voltage diode. The first node and the second node can be the input and output terminals of the target high-voltage diode, respectively, and the output terminal of the target high-voltage diode is adapted to connect to the power device 2. In some cases, the target high-voltage diode includes a first high-voltage diode and a second high-voltage diode. The input terminal of the second high-voltage diode is connected to the output terminal of the first high-voltage diode. The output terminal of the second high-voltage diode is adapted to connect to the power device 2. The input terminal of the first high-voltage diode is adapted to connect to the driver chip (11).

[0071] Specifically, as shown in Figures 1 and 2, the DESAT path 12 includes a first high-voltage diode D11 and a second high-voltage diode D12 connected in series. The input terminal of the first high-voltage diode D11 is connected to the driver chip 11, the output terminal of the first high-voltage diode D11 is connected to the input terminal of the second high-voltage diode D12, and the output terminal of the second high-voltage diode D12 is connected to the power device 2.

[0072] In some cases, the target high-voltage diode can be a second high-voltage diode D12. In other cases, the target high-voltage diode can be a first high-voltage diode D11. In still other cases, the target high-voltage diode can be a first high-voltage diode D11 and a second high-voltage diode D12 connected in series.

[0073] In this embodiment, the power device is a high-power device that operates in a high-voltage environment. The first high-voltage diode D11 is further away from the power device than the second high-voltage diode D12, and its voltage is lower. Therefore, the target device is the first high-voltage diode D11. Connecting the voltage drop acquisition circuit 3 to both ends of the first high-voltage diode D11 allows the voltage drop acquisition circuit 3 to operate in a relatively low-voltage environment, ensuring its stability and safety. It should be noted that in this embodiment, the following description will use the first high-voltage diode D11 as the target device, and the first and second nodes of the voltage drop acquisition circuit 3 as the input and output terminals of the first high-voltage diode D11, respectively, as examples for illustrative purposes.

[0074] Furthermore, as previously stated, when the power device is turned on, the detected voltage and the on-state voltage drop of the power device have a specific conversion relationship. Therefore, the node voltages of the first and second nodes with voltage drops on the DESAT path 12 also have a specific conversion relationship with the on-state voltage drop Vcesat of the power device. The voltage sampling unit 31 can utilize this conversion relationship to convert the node voltages of the first and second nodes into the on-state voltage drop of the power device and output the on-state voltage drop.

[0075] In some implementations, the voltage sampling unit 31 can utilize the relationship between the detected voltage on the DESAT path 12, the voltage of each device, and the on-state voltage drop of the power device to convert the collected node voltages of the first and second nodes into the on-state voltage drop of the power device and output the on-state voltage drop.

[0076] For example, assuming the DESAT path 12 is the DESAT path 12 shown in Figure 1, and assuming the first node and the second node connected to the voltage sampling unit 31 are the input and output terminals of the first high-voltage diode D11, then, based on the aforementioned relationship that the detected voltage VC4 satisfies when the power device is turned on: VC4=VR5+VD11+VD12+Vcesat, it can be known that VD11 satisfies the relationship: VD11=VC4-VR5+VD11+VD12+Vcesat. The voltage sampling unit 31 can convert the node voltages of the first and second nodes into the on-state voltage drop of the power device based on the relationship satisfied by VD11.

[0077] In some other implementations, the voltage sampling unit 31 can utilize the relationship between the node voltage of the first node, the node voltage of the second node and the on-state voltage drop of the power device on the DESAT path 12 to convert the collected voltages of the first node and the second node into the on-state voltage drop of the power device and output the on-state voltage drop.

[0078] In some embodiments, as shown in FIG3, the voltage sampling unit 31 may include an operational amplifier U2. The two input terminals of the operational amplifier U2 are connected to the first node and the second node, respectively, and the output terminal of the operational amplifier U2 is connected to one of its input terminals. The operational amplifier U2 is used to acquire the node voltages of the first node and the second node, and to convert the node voltages to obtain the forward voltage drop of the power device 2, and output the forward voltage drop.

[0079] In some cases, taking the target device as the first high-voltage diode D11, and the non-inverting input terminal of operational amplifier U2 connected to the first node, and the inverting input terminal of operational amplifier U2 connected to the second node as an example, operational amplifier U2 satisfies: Vop_out = (Vop+ - Vop-) × G. Where Vop_out represents the output voltage of operational amplifier U2. Vop+ represents the input voltage of the non-inverting input terminal of operational amplifier U2. Vop- represents the input voltage of the inverting input terminal of operational amplifier U2. G represents the gain of operational amplifier U2. Furthermore, the input voltage Vop+ of the non-inverting input terminal of operational amplifier U2 also satisfies: Vop+ = Vcesat + VD12. The input voltage Vop- of the inverting input terminal of operational amplifier U2 also satisfies: Vop- = Vop_out + Vop+. Based on this, we can obtain Vop_out = (Vcesat + VD12 - (Vop_out + Vop+)) × G. Wherein, VD12 represents the voltage of the second high-voltage diode D12, which can be determined based on the detection voltage, the node voltage of the first node, the node voltage of the second node, and the voltage drop of the power device. For example, when the DESAT path 12 is the DESAT path 12 shown in Figure 1, VD12 satisfies: VD12 = VC4 - VR5 - VD11 - Vcesat. VD11 is the difference between the node voltages of the first and second nodes. G represents the gain of operational amplifier U2, which is usually a known value. Therefore, based on the conversion relationship between the output voltage of operational amplifier U2 and the on-state voltage of the power device, the on-state voltage drop of power device 2, obtained from the node voltage conversion, can be output as the on-state voltage drop.

[0080] In other cases, referring to Figure 3, the voltage sampling unit 31 may further include: a first resistor R1. The inverting input of the operational amplifier U1 is connected to the first node through the first resistor R1. Further, the voltage sampling unit 31 may also include: a second resistor R2. One end of the second resistor R2 is connected between the first resistor R1 and the inverting input of the operational amplifier U1, and the other end of the second resistor R2 is connected to the output of the operational amplifier U1.

[0081] For example, suppose the DESAT path 12 is as shown in Figure 1, which specifically includes: a fourth capacitor C4, a third diode D3, a fifth resistor R5, a first high-voltage diode D11, and a second high-voltage diode D12. Furthermore, suppose the two nodes connected to the voltage sampling unit 31 are the two endpoints of the first high-voltage diode D11, the non-inverting input of the operational amplifier U2 is connected to the cathode of the first high-voltage diode D11 near the power device 1, and the inverting input of the operational amplifier U2 is connected to the anode of the first high-voltage diode D11 away from the power device 1.

[0082] When power device 2 is turned on, if the amplification factor of operational amplifier U2 is 1, then the input voltage Vop+ at the non-inverting input terminal of operational amplifier U2 satisfies: Vop+=Vop-=Vcesat+VD12. The input voltage Vop- at the inverting input terminal of operational amplifier U2 satisfies: Vop-=Vop_out×(r1 / (r1+r2))+(Vcesat+VD11+VD12)×(r2 / (r1+r2)).

[0083] Assume that the resistance values ​​of the first resistor R1 and the second resistor R2 are equal, and that the first high-voltage diode D11 and the second high-voltage diode D12 are of the same type. When the first high-voltage diode D11 and the second high-voltage diode D12 are of the same type, the voltage VD11 of the first high-voltage diode D11 is equal to the voltage VD12 of the second high-voltage diode D12.

[0084] Based on this, we can obtain the following relationship: Vcesat + VD12 = Vop_out × (r1 / (r1+r2)) + (Vcesat + VD11 + VD12) × (r2 / (r1+r2)). Furthermore, we obtain the relationship: Vop_out = Vcesat. Clearly, in the voltage sampling unit 31 shown in Figure 3, the output voltage at the output terminal of the operational amplifier U2 is the on-state voltage drop Vcesat of the power device. It should be noted that in the above relationship, r1 represents the resistance value of the first resistor R1; r2 represents the resistance value of the second resistor R2.

[0085] In this embodiment, the DESAT path of the overcurrent protection circuit can be reused so that the voltage sampling unit of the voltage drop acquisition circuit can acquire the node voltages of the first and second nodes on the DESAT path without affecting the normal operation of the power device. This allows for the conversion of the node voltages to obtain the on-state voltage drop of the power device, thus enabling the acquisition of the on-state voltage drop of the power device. Furthermore, since the overcurrent protection circuit is part of the normal operating circuit of the power device, the voltage sampling unit can acquire the node voltages on the DESAT path in real time, converting them to obtain the on-state voltage drop of the power device. This enables real-time monitoring of the on-state voltage drop of the power device, and consequently, the real-time operating status of the power device can be obtained based on the on-state voltage drop.

[0086] In some embodiments of this application, as shown in FIG2, the voltage drop acquisition circuit 3 includes a clamping unit 32.

[0087] The clamping unit 32 is connected to at least one target node among the first node and the second node. The clamping unit 32 is used to clamp the node voltage of the target node to a target voltage range, so that the voltage sampling unit 31 can acquire the clamped node voltage of the first node and / or the second node. By setting the clamping unit 32, the voltage input to the voltage sampling unit 31 can be effectively controlled, ensuring the operational stability of the voltage sampling unit 31.

[0088] It should be noted that the clamping unit 32 in this embodiment can have various structures to support the function of the clamping unit 32. The following describes two clamping unit 32 structures as examples.

[0089] In some cases, as shown in Figure 4, the clamping unit 32 may include a clamping assembly 321. The two ends of the clamping assembly 321 are connected to the first node and the second node, respectively. The clamping assembly 321 is used to clamp the node voltages of the first node and the second node to a target voltage range.

[0090] Specifically, in some embodiments, the clamping assembly 321 includes a first diode D1. The input and output terminals of the first diode D1 are connected to the second node and the first node, respectively. For example, the anode of the first diode D1 is connected to the high-voltage node, and the cathode of the first diode D1 is connected to the low-voltage node. The high-voltage node refers to the node closer to the power device 2 among the first and second nodes. The low-voltage node refers to the node farther from the power device 2 among the first and second nodes, that is, the low-voltage node refers to the node closer to the driver chip 11 among the first and second nodes.

[0091] In this embodiment, by connecting a first diode D1 in parallel on the connection path between the first node and the second node, a passive clamping function can be achieved using the diode to effectively limit the voltage of the input voltage sampling unit 31 and ensure the operational stability of the voltage sampling unit 31. This clamping component 321, which directly utilizes a diode to achieve the clamping function, obviously has the advantages of low cost and high performance compared to clamping circuits such as reverse series diode clamping circuits and enhancement-mode NMOS (N-channel MOSFET, a metal-oxide-semiconductor field-effect transistor based on an N-type channel) voltage clamping circuit.

[0092] Further, in some embodiments, referring to FIG4, the clamping unit 32 may also include a filtering component 322. The input terminal of the clamping component 321 is connected to the first node via the filtering component 322, or the output terminal of the clamping component 321 is connected to the first node via the filtering component 322. The filtering component 322 is used to filter the signal from the voltage sampling unit 31.

[0093] In some cases, the input of clamping component 321 is connected to the first node via filtering component 322, and the output of clamping component 321 is directly connected to the second node. Filtering component 322 is used to filter the signal input to filtering component 322. In other cases, the input of clamping component 321 is directly connected to the second node, and the output of clamping component 321 is connected to the first node via filtering component 322. Filtering component 322 is used to filter the output signal of filtering component 322, thereby filtering the signal input to filtering component 322. In some embodiments, filtering component 322 can be a low-pass filter to effectively filter out high-frequency interference signals introduced into the circuit by the switching of power device 2.

[0094] In some implementations, as shown in Figure 4, the filter component 322 may include a first capacitor C1 and a third resistor R3. The first capacitor C1 and the third resistor R3 are connected in parallel. Specifically, the first terminal of the first capacitor C1 and the first terminal of the third resistor R3 can both be connected to a node through the clamping component 321. The second terminal of the first capacitor C1 and the second terminal of the third resistor R3 are both directly connected to another node.

[0095] For example, referring to Figure 4, the first terminal of the first capacitor C1 and the first terminal of the third resistor R3 are both connected to the low-voltage node. The second terminal of the first capacitor C1 and the second terminal of the third resistor R3 are both connected to the cathode of the first diode D1. The anode of the first diode D1 is connected to the high-voltage node. It should be noted that Figure 4 illustrates an example where the output of the clamping assembly 321 is connected to a node through the filter assembly 322.

[0096] In other cases, as shown in Figure 5, the clamping unit 32 may include a Zener diode DZ1 and a second diode D2. One end of the Zener diode DZ1 is connected to the high-voltage node, and the other end of the Zener diode DZ1 is grounded through the second diode D2. For example, the cathode of the Zener diode DZ1 is connected to the high-voltage node, the anode of the Zener diode DZ1 is connected to the anode of the second diode D2, and the cathode of the second diode D2 is grounded.

[0097] In this embodiment, the voltage of the input voltage sampling unit 31 can be effectively controlled by setting the clamping unit 32, thereby ensuring the operational stability of the voltage sampling unit 31.

[0098] In some embodiments of this application, as shown in Figures 2 and 6, the voltage drop acquisition circuit 3 further includes an overshoot suppression circuit 33.

[0099] Overshoot suppression circuit 33 is connected to the high-voltage node and the target input terminal of operational amplifier U2. Overshoot suppression circuit 33 is used to suppress the voltage transmitted from the high-voltage node to the target input terminal. Specifically, overshoot suppression circuit 33 is connected to the high-voltage node and the non-inverting input terminal of operational amplifier U2 to suppress the voltage transmitted from the high-voltage node to the non-inverting input terminal of operational amplifier U2. This avoids the turn-off spike phenomenon of power device 2, which could lead to a large voltage, or even a voltage exceeding the power supply voltage of operational amplifier U2, being applied to the non-inverting input terminal of operational amplifier U2, effectively preventing circuit damage and increasing circuit reliability.

[0100] It should be noted that, similar to the clamping unit 32 in this embodiment, the overshoot suppression circuit 33 can also have various structures to support the function of the overshoot suppression circuit 33. The following describes two structures of the overshoot suppression circuit 33 as examples.

[0101] In some cases, as shown in Figure 6, the overshoot suppression circuit 33 may include a second capacitor C2 and a fourth resistor R4. One end of the fourth resistor R4 is connected to the high-voltage node, and the other end of the fourth resistor R4 is connected to the target input terminal of the operational amplifier U2 and one end of the second capacitor C2, the other end of the second capacitor C2 being grounded. The second capacitor C2 and the fourth resistor R4 work together to suppress the voltage of the high-voltage node transmitted to the target input terminal.

[0102] For example, the target input is a non-inverting input. One end of the fourth resistor R4 is connected to the high-voltage node, and the other end of the fourth resistor R4 is connected to the non-inverting input of the operational amplifier U2 and one end of the second capacitor C2. The other end of the second capacitor C2 is grounded.

[0103] In other cases, as shown in Figure 7, the overshoot suppression circuit 33 may include a second capacitor C2, a fourth resistor R4, and a third capacitor C3.

[0104] One end of the fourth resistor R4 is connected to the high-voltage node, and the other end of the fourth resistor R4 is connected to the target input terminal of operational amplifier U2 and one end of the second capacitor C2. The other end of the second capacitor C2 is grounded. One end of the third capacitor C3 is connected to the low-voltage node, and the other end of the third capacitor C3 is connected to the connection path between the fourth resistor R4, the target input terminal, and the second capacitor C2. The second capacitor C2, the fourth resistor R4, and the third capacitor C3 work together to suppress the voltage transmitted to the high-voltage node at the target input terminal. Furthermore, the addition of the third capacitor C3 can more effectively suppress the voltage transmitted to the high-voltage node at the target input terminal.

[0105] For example, the target input terminal is a non-inverting input terminal. One end of the fourth resistor R4 is connected to the high-voltage node, and the other end of the fourth resistor R4 is connected to the non-inverting input terminal of operational amplifier U2 and one end of the second capacitor C2. The other end of the second capacitor C2 is grounded. One end of the third capacitor C3 is connected to the low-voltage node, and the other end of the third capacitor C3 is connected to the connection path between the fourth resistor R4, operational amplifier U2, and the second capacitor C2.

[0106] In this embodiment, by setting an overshoot suppression circuit 33 at the non-inverting input terminal of the operational amplifier U2, the voltage of the high-voltage node transmitted to the non-inverting input terminal of the operational amplifier U2 can be effectively suppressed, thereby avoiding the turn-off spike phenomenon of the power device 2, which would cause the non-inverting input terminal of the operational amplifier U2 to be connected to a large voltage, or even connected to a voltage exceeding the power supply voltage of the operational amplifier U2, effectively preventing circuit damage and increasing circuit reliability.

[0107] In some embodiments of this application, as shown in FIG2, the voltage drop acquisition circuit 3 further includes an isolation unit 34. The isolation unit 34 is connected to the voltage sampling unit 31. The isolation unit 34 is used to receive the on-state voltage drop of the voltage sampling unit 31 and isolate the output on-state voltage drop. In some embodiments, the isolation unit 34 can be an optocoupler, a differential operational amplifier circuit, etc.

[0108] In some embodiments, the driver chip 11 may further include an isolation unit. The isolation unit 34 of the voltage drop acquisition circuit 3 may also directly reuse the isolation unit in the driver chip 11. For example, as shown in FIG8, the isolation module 112 of the driver chip 11 includes an isolation unit 34 and an analog-to-digital converter (AD converter) 1122. The isolation unit 34 is connected to the voltage sampling unit 31 and the AD converter 1122, and is used to receive the on-state voltage drop (analog signal) of the voltage sampling unit 31 and isolate the output of the on-state voltage drop to the AD converter 1122. The AD converter 1122 is used to convert the on-state voltage drop into a pulse width modulation (PWM) digital signal and output the PWM digital signal.

[0109] In this embodiment, the on-state voltage drop of the power device output by the voltage sampling unit 31 is typically high. Subsequent processing circuits, such as microcontroller units (MCUs) or central processing units (CPUs), are usually used to process this on-state voltage drop. These processing circuits are typically low-voltage circuits. Therefore, by using the isolation unit 34 to isolate the on-state voltage drop of the power device, the on-state voltage drop of the power device acquired by the voltage sampling unit 31 can be safely transmitted to the subsequent low-voltage processing circuit, thus enabling monitoring of the on-state voltage drop of the power device.

[0110] In some embodiments, as shown in FIG2, the voltage drop acquisition circuit 3 may further include an external bias circuit 35. The external bias unit 35 is connected to the isolation unit 34. The external bias unit 35 is used to receive the on-state voltage drop isolated by the isolation unit 34, add a bias voltage to the on-state voltage drop, and output the on-state voltage drop after adding the bias voltage. The external bias circuit 35 can increase the on-state voltage drop of the power device output by the isolation unit 34, so that the subsequent circuit for processing the on-state voltage drop can select a better sampling point from the signal output by the external bias circuit 35 to acquire the on-state voltage drop of the power device.

[0111] In some embodiments of this application, the DESAT path 12 further includes a fourth capacitor C4. One end of the fourth capacitor C4 is connected to the driver chip 11 and the DESAT path 12, and the other end of the fourth capacitor C4 is grounded. As shown in Figures 2 and 9, the voltage drop acquisition circuit 3 may further include a constant current power supply unit 36.

[0112] The constant current power supply unit 36 ​​is used to provide a constant current signal. The constant current power supply unit 36 ​​is connected to the connection path between the driver chip 11 and the low-voltage node. The constant current power supply unit 36 ​​is used to supply power to the fourth capacitor C4 to accelerate the charging speed of the fourth capacitor C4.

[0113] In some cases, as shown in Figure 9, the constant current power supply unit 36 ​​may include: a controllable precision voltage regulator TL431, a transistor Q2, an eighth resistor R8, a ninth resistor R9, and a tenth resistor R10. The base of transistor Q2 is connected to the external constant current power supply terminal VDD through the tenth resistor R10, and the base of transistor Q2 is also connected to the controllable precision voltage regulator TL431. The collector of transistor Q2 is connected to the external constant current power supply terminal VDD, and the emitter of transistor Q3 is connected sequentially to the connection path between the driver chip 11 and the low-voltage node through the ninth resistor R9 and the eighth resistor R8. The controllable precision voltage regulator TL431 is also connected to the connection path between the ninth resistor R9 and the eighth resistor R8.

[0114] In this embodiment, by adding a constant current power supply unit 36 ​​between the driver chip 11 and the low-voltage node, the constant current power supply unit 36 ​​and the original constant current source IS in the driver chip 11 can simultaneously supply power to the fourth capacitor C4, thereby increasing the charging current of the fourth capacitor C4, accelerating the charging speed, and accelerating the voltage rise speed of the fourth capacitor C4. This allows the fourth capacitor C4 to complete charging as soon as possible, so that the voltage of the fourth capacitor C4 can be used as a detection voltage to detect whether overcurrent protection is triggered, thus accelerating the triggering speed of overcurrent protection.

[0115] Furthermore, the addition of a constant current power supply unit 36 ​​between the driver chip 11 and the low-voltage node allows for a larger current flow in the DESAT path 12, resulting in a more significant voltage drop across the fifth resistor R5, the first high-voltage diode D11, and the second high-voltage diode D12. This allows the voltage sampling unit 31 to more sensitively acquire the node voltage in the DESAT path 12, thereby improving the sensitivity of the on-state voltage drop of the power devices based on the node voltage.

[0116] It should be noted that the aforementioned clamping unit 32, overshoot suppression circuit 33, and isolation unit 34 can be combined to form voltage drop acquisition circuit 3 with various structures. The following five examples further illustrate the voltage drop acquisition circuit 3 provided in the embodiments of this application. Furthermore, all five examples below use the overcurrent protection circuit 1 connected to the voltage drop acquisition circuit 3 as shown in Figure 1 as an example.

[0117] As shown in Figure 10, the voltage drop acquisition circuit 3 includes a voltage sampling unit 31, a clamping unit 32, an overshoot suppression circuit 33, an isolation unit 34, and an external biasing unit 35. The voltage sampling unit 31 includes an operational amplifier U2, a first resistor R1, and a second resistor R2. The clamping unit 32 includes a first diode D1, a first capacitor C1, and a third resistor R3. The overshoot suppression circuit 33 includes a fourth resistor R4 and a second capacitor C2. Furthermore, the first node and the second node connected to the voltage sampling unit 31 on the DESAT path 12 are respectively the two ends of the first high-voltage diode D11. The high-voltage node is the cathode of the first high-voltage diode D11, and the low-voltage node is the anode of the first high-voltage diode D11.

[0118] The anode of the first diode D1 is connected to the high-voltage node. The cathode of the first diode D1 is connected to the low-voltage node through the first capacitor C1, and the cathode of the first diode D1 is also connected to the low-voltage node through the third resistor R3.

[0119] The non-inverting input of operational amplifier U2 is connected to the high-voltage node via the fourth resistor R4, and is also grounded via the second capacitor C2. The inverting input of operational amplifier U2 is connected to the low-voltage node via the first resistor R1, and is also connected to the output of operational amplifier U2 via the second resistor R2. The output of operational amplifier U2 is connected sequentially to the isolation unit 34 and the external bias unit 35 outside the driver chip 11.

[0120] When power device 2 is turned on, voltage sampling unit 31 can collect the on-state voltage drop of power device 2 and output the on-state voltage drop of power device 2 to isolation unit 34. Isolation unit 34 transmits the on-state voltage drop of power device collected by voltage sampling unit 31 to external bias unit 35 and then outputs it, realizing the monitoring of the on-state voltage drop of power device.

[0121] With power device 2 off, its forward voltage drop is relatively large. Clamping unit 32 can effectively clamp the two input terminals of operational amplifier U2 to the target voltage range. At this time, the high forward voltage drop of power device 2 is mainly borne by the first high-voltage diode D11, ensuring the stability of voltage drop acquisition circuit 3.

[0122] In a second example, as shown in Figure 11, the voltage drop acquisition circuit 3 includes: a voltage sampling unit 31, a clamping unit 32, an overshoot suppression circuit 33, an isolation unit 34, and an external bias unit 35. The voltage sampling unit 31 includes an operational amplifier U2, a first resistor R1, and a second resistor R2. The clamping unit 32 includes a Zener diode DZ1 and a second diode D2. The overshoot suppression circuit 33 includes a fourth resistor R4, a second capacitor C2, and a third capacitor C3. Furthermore, the first node and the second node connected to the voltage sampling unit 31 on the DESAT path 12 are respectively the two ends of a first high-voltage diode D11. The high-voltage node in the first node and the low-voltage node in the second node is the cathode of the first high-voltage diode D11, and the low-voltage node is the anode of the first high-voltage diode D11.

[0123] The anode of the first diode D1 is connected to the high-voltage node. The cathode of the first diode D1 is connected to the low-voltage node through the first capacitor C1, and the cathode of the first diode D1 is also connected to the low-voltage node through the third resistor R3.

[0124] The non-inverting input of operational amplifier U2 is connected to the high-voltage node through the fourth resistor R4. The non-inverting input of operational amplifier U2 is also connected to the low-voltage node through the third capacitor C3. The non-inverting input of operational amplifier U2 is also connected to the ground through the second capacitor C2. The non-inverting input of operational amplifier U2 is also connected to the ground through the Zener diode DZ1 and the second diode D2 in sequence.

[0125] The inverting input of operational amplifier U2 is connected to the low-voltage node through a first resistor R1, and the inverting input of operational amplifier U2 is also connected to the output of operational amplifier U2 through a second resistor R2. The output of operational amplifier U2 is connected to the isolation unit 34 outside the driver chip 11.

[0126] When power device 2 is turned on, voltage sampling unit 31 can collect the on-state voltage drop of power device 2 and output the on-state voltage drop of power device 2 to isolation unit 34. Isolation unit 34 outputs the on-state voltage drop of power device collected by voltage sampling unit 31, thereby realizing the monitoring of the on-state voltage drop of power device.

[0127] It should be noted that the main difference between the voltage drop acquisition circuit 3 in the second example and the voltage drop acquisition circuit 3 in the first example is that the structures of the clamping unit 32 and the overshoot suppression circuit 33 have changed. The clamping unit 32 in the second example, compared to the clamping unit 32 in the first example, does not support the function of suppressing high-frequency interference signals transmitted by the power device 1.

[0128] In a third example, as shown in Figure 12, the voltage drop acquisition circuit 3 includes: a voltage sampling unit 31, a clamping unit 32, an overshoot suppression circuit 33, an isolation unit 34, and an external bias unit 35. The voltage sampling unit 31 includes an operational amplifier U2, a first resistor R1, and a second resistor R2. The clamping unit 32 includes a Zener diode DZ1 and a second diode D2. The overshoot suppression circuit 33 includes a fourth resistor R4, a second capacitor C2, and a third capacitor C3. The isolation unit 34 reuses the isolation unit in the driver chip 11, and this isolation unit includes the isolation unit 34 and the AD converter 1122. Furthermore, the first node and the second node connected to the voltage sampling unit 31 on the DESAT path 12 are respectively the two ends of the first high-voltage diode D11. The high-voltage node in the first node and the low-voltage node in the second node are the cathode of the first high-voltage diode D11, and the anode of the first high-voltage diode D11.

[0129] The anode of the first diode D1 is connected to the high-voltage node. The cathode of the first diode D1 is connected to the low-voltage node through the first capacitor C1, and the cathode of the first diode D1 is also connected to the low-voltage node through the third resistor R3.

[0130] The non-inverting input of operational amplifier U2 is connected to the high-voltage node through the fourth resistor R4. The non-inverting input of operational amplifier U2 is also connected to the low-voltage node through the third capacitor C3. The non-inverting input of operational amplifier U2 is also connected to the ground through the second capacitor C2. The non-inverting input of operational amplifier U2 is also connected to the ground through the Zener diode DZ1 and the second diode D2 in sequence.

[0131] The inverting input of operational amplifier U2 is connected to the low-voltage node through a first resistor R1, and the inverting input of operational amplifier U2 is also connected to the output of operational amplifier U2 through a second resistor R2. The output of operational amplifier U2 is connected to the isolation unit 34 inside the driver chip 11.

[0132] When power device 2 is turned on, voltage sampling unit 31 can collect the on-state voltage drop of power device 2 and output the on-state voltage drop of power device 2 to isolation unit 34. Isolation unit 34 in isolation unit 34 transmits the on-state voltage drop of power device collected by voltage sampling unit 31 to AD converter 1122. AD converter 1122 converts the on-state voltage drop into a PWM digital signal and outputs it, realizing the monitoring of the on-state voltage drop of power device.

[0133] It should be noted that the main difference between the voltage drop acquisition circuit 3 in the third example and the voltage drop acquisition circuit 3 in the second example is that the isolation unit 34 of the voltage drop acquisition circuit 3 reuses the isolation unit inside the driver chip 11, and then outputs the PWM digital signal after the conduction voltage drop of the power device is processed by analog-to-digital conversion.

[0134] In a fourth example, as shown in Figure 13, the voltage drop acquisition circuit 3 includes: a voltage sampling unit 31, a clamping unit 32, an overshoot suppression circuit 33, an isolation unit 34, and a constant current power supply unit 36. The voltage sampling unit 31 includes an operational amplifier U2, a first resistor R1, and a second resistor R2. The clamping unit 32 includes a first diode D1, a first capacitor C1, and a third resistor R3. The overshoot suppression circuit 33 includes a fourth resistor R4 and a second capacitor C2. Furthermore, the first node and the second node connected to the voltage sampling unit 31 on the DESAT path 12 are respectively the two ends of the first high-voltage diode D11. The high-voltage node in the first node and the low-voltage node in the second node is the cathode of the first high-voltage diode D11, and the low-voltage node is the anode of the first high-voltage diode D11.

[0135] The anode of the first diode D1 is connected to the high-voltage node. The cathode of the first diode D1 is connected to the low-voltage node through the first capacitor C1, and the cathode of the first diode D1 is also connected to the low-voltage node through the third resistor R3.

[0136] The non-inverting input of operational amplifier U2 is connected to the high-voltage node via the fourth resistor R4, and is also grounded via the second capacitor C2. The inverting input of operational amplifier U2 is connected to the low-voltage node via the first resistor R1, and is also connected to the output of operational amplifier U2 via the second resistor R2. The output of operational amplifier U2 is connected in sequence to the isolation unit 34 and the constant current power supply unit 36 ​​outside the driver chip 11.

[0137] When power device 2 is turned on, voltage sampling unit 31 can collect the on-state voltage drop of power device 2 and output the on-state voltage drop of power device 2 to isolation unit 34. Isolation unit 34 outputs the on-state voltage drop of power device collected by voltage sampling unit 31, thereby realizing the monitoring of the on-state voltage drop of power device.

[0138] It should be noted that the main difference between the voltage drop acquisition circuit 3 in the fourth example and the voltage drop acquisition circuit 3 in the first example is that a constant current power supply unit 36 ​​is added to increase the charging current of the fourth capacitor C4, accelerate the triggering speed of overcurrent protection, and improve the detection sensitivity of the on-state voltage drop of the power device.

[0139] In a fifth example, as shown in Figure 14, the voltage drop acquisition circuit 3 includes: a voltage sampling unit 31, a clamping unit 32, an overshoot suppression circuit 33, an isolation unit 34, and a constant current power supply unit 36. The voltage sampling unit 31 includes an operational amplifier U2, a first resistor R1, and a second resistor R2. The clamping unit 32 includes a first diode D1, a first capacitor C1, and a third resistor R3. The overshoot suppression circuit 33 includes a fourth resistor R4 and a second capacitor C2. The constant current power supply unit 36 ​​includes a controllable precision voltage regulator TL431, a transistor Q2, an eighth resistor R8, a ninth resistor R9, and a tenth resistor R10.

[0140] Furthermore, the first node and the second node connected to the voltage sampling unit 31 on the DESAT path 12 are respectively the two ends of the first high-voltage diode D11. The high-voltage node in the first node and the low-voltage node in the second node is the cathode of the first high-voltage diode D11, and the low-voltage node is the anode of the first high-voltage diode D11.

[0141] The anode of the first diode D1 is connected to the high-voltage node. The cathode of the first diode D1 is connected to the low-voltage node through the first capacitor C1, and the cathode of the first diode D1 is also connected to the low-voltage node through the third resistor R3.

[0142] The non-inverting input of operational amplifier U2 is connected to the high-voltage node via the fourth resistor R4, and is also grounded via the second capacitor C2. The inverting input of operational amplifier U2 is connected to the low-voltage node via the first resistor R1, and is also connected to the output of operational amplifier U2 via the second resistor R2. The output of operational amplifier U2 is connected in sequence to the isolation unit 34 and the constant current power supply unit 36 ​​outside the driver chip 11.

[0143] The base of transistor Q2 is connected to the external constant current power supply VDD via resistor R10 (the tenth resistor). The base of transistor Q2 is also connected to the controllable precision voltage regulator TL431. The collector of transistor Q2 is connected to the external constant current power supply VDD. The emitter of transistor Q3 is connected to the connection path between driver chip 11 and the low-voltage node via resistors R9 (the ninth resistor) and R8 (the eighth resistor). The controllable precision voltage regulator TL431 is also connected to the connection path between resistors R9 (the ninth resistor) and R8 (the eighth resistor).

[0144] When power device 2 is turned on, voltage sampling unit 31 can collect the on-state voltage drop of power device 2 and output the on-state voltage drop of power device 2 to isolation unit 34. Isolation unit 34 transmits the on-state voltage drop of power device collected by voltage sampling unit 31 to external bias unit 35 and then outputs it, realizing the monitoring of the on-state voltage drop of power device.

[0145] It should be noted that the main difference between the voltage drop acquisition circuit 3 in the fifth example and the voltage drop acquisition circuit 3 in the fourth example is the refinement of the specific structure of the constant current power supply unit 36. Of course, the embodiments of this application do not limit the specific circuit structure of the constant current power supply unit 36; they are merely illustrative examples.

[0146] In summary, the voltage drop acquisition circuit provided in this application embodiment is suitable for acquiring the on-state voltage drop of a power device. The voltage drop sampling circuit includes a target device on the desaturation protection path of the driver chip, and a voltage sampling unit. The voltage sampling unit is connected to a first node and a second node of the target device, and the first or second node of the target device is suitable for connecting to the power device. In this technical solution, the detection voltage on the desaturation protection path of the driver chip has a specific conversion relationship with the on-state voltage drop of the power device, which is used to determine whether the overcurrent protection of the power device is triggered. Therefore, by reusing the desaturation protection path of the driver chip, the voltage sampling unit of the voltage drop acquisition circuit can acquire the node voltages of the first and second nodes of the target device on the desaturation protection path of the driver chip without affecting the normal operation of the power device, and obtain the on-state voltage drop of the power device based on the node voltage conversion, thus realizing the acquisition of the on-state voltage drop of the power device. Furthermore, since the desaturation protection path of the driver chip is part of the normal operating circuit of the power device... Therefore, the voltage sampling unit can collect the node voltage on the desaturation protection path of the driver chip in real time, and use it to convert it into the on-state voltage drop of the power device, realize the real-time monitoring of the on-state voltage drop of the power device, and then obtain the working status of the power device in real time based on the on-state voltage drop of the power device.

[0147] This application also provides a power device driving circuit. The power device driving circuit includes a power device and a voltage drop acquisition circuit provided in this application embodiment. As shown in Figures 2 to 14, the power device 2 is connected to a target device, and the DESAT path 12 includes the target device. The detection voltage obtained through the DESAT path 12 is used to detect whether the overcurrent protection of the power device 2 is triggered.

[0148] In some embodiments, the power device drive circuit may further include a drive chip 11. The drive chip 11 is connected to the DESAT path 12. The drive chip 11 is used to receive a detection voltage and drive the power device 2 if it is determined from the detection voltage that overcurrent protection has not been triggered. For example, the power device drive circuit includes the overcurrent protection circuit 1 shown in FIG1 above. The overcurrent protection circuit 1 includes the drive chip 11 and the DESAT path 12.

[0149] In some embodiments, the DESAT path 12 further includes a fourth capacitor C4. One end of the fourth capacitor C4 is connected to the driver chip 11 and the DESAT path 12, and the other end of the fourth capacitor C4 is grounded. Based on this, in some embodiments, the voltage drop acquisition circuit 3 may further include a constant current power supply unit 36. The constant current power supply unit 36 ​​is used to provide a constant current signal. The constant current power supply unit 36 ​​is connected to the connection path between the driver chip 11 and the low-voltage node. The constant current power supply unit 36 ​​is used to supply power to the fourth capacitor C4 to accelerate the charging speed of the fourth capacitor C4. It should be noted that the specific structure and function of the constant current power supply unit 36 ​​can be referred to the foregoing description, and will not be repeated here.

[0150] In some embodiments, the driver chip 11 may include an isolation unit. The isolation unit 34 of the voltage drop acquisition circuit 3 may be an isolation unit in the driver chip 11, so as to reuse the isolation unit in the driver chip 11 and improve device utilization.

[0151] In the power device driving circuit provided in this application embodiment, the voltage drop sampling circuit suitable for acquiring the on-state voltage drop of the power device includes: a target device on the desaturation protection path of the driver chip, and a voltage sampling unit. The voltage sampling unit is connected to a first node and a second node of the target device, and the first or second node of the target device is suitable for connecting to the power device. In this technical solution, the detection voltage on the desaturation protection path of the driver chip has a specific conversion relationship with the on-state voltage drop of the power device, which is used to determine whether the overcurrent protection of the power device is triggered. Therefore, by reusing the desaturation protection path of the driver chip, the voltage sampling unit of the voltage drop acquisition circuit can acquire the node voltages of the first and second nodes of the target device on the desaturation protection path of the driver chip without affecting the normal operation of the power device, and obtain the on-state voltage drop of the power device based on the node voltage conversion, thus realizing the acquisition of the on-state voltage drop of the power device. Furthermore, since the desaturation protection path of the driver chip is part of the normal operating circuit of the power device... Therefore, the voltage sampling unit can collect the node voltage on the desaturation protection path of the driver chip in real time, and use it to convert it into the on-state voltage drop of the power device, realize the real-time monitoring of the on-state voltage drop of the power device, and then obtain the working status of the power device in real time based on the on-state voltage drop of the power device.

[0152] This application also provides an electronic device. The electronic device includes a power device and a power device driving circuit provided in this application embodiment. In the electronic device provided in this application embodiment, it is suitable for acquiring the on-state voltage drop of the power device. The voltage drop sampling circuit includes: a target device on the desaturation protection path of the driving chip, and a voltage sampling unit. The voltage sampling unit is connected to a first node and a second node of the target device, and the first or second node of the target device is suitable for connecting to the power device. In this technical solution, the detection voltage on the desaturation protection path of the driving chip has a specific conversion relationship with the on-state voltage drop of the power device, which is used to determine whether the overcurrent protection of the power device is triggered. Therefore, by reusing the desaturation protection path of the driving chip, the voltage sampling unit of the voltage drop acquisition circuit can acquire the node voltages of the first and second nodes of the target device on the desaturation protection path of the driving chip without affecting the normal operation of the power device, and obtain the on-state voltage drop of the power device based on the node voltage conversion, thereby realizing the acquisition of the on-state voltage drop of the power device. Furthermore, since the desaturation protection path of the driving chip is a normal operating circuit of the power device... Therefore, the voltage sampling unit can collect the node voltage on the desaturation protection path of the driver chip in real time, and use it to convert it into the on-state voltage drop of the power device, realize the real-time monitoring of the on-state voltage drop of the power device, and then obtain the working status of the power device in real time based on the on-state voltage drop of the power device.

[0153] In the above embodiments, implementation can be achieved, in whole or in part, through software, hardware, firmware, or any combination thereof. When implemented in software, it can be implemented, in whole or in part, as a computer program product. A computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the flow or function according to the embodiments of this application is generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that integrates one or more available media. The available media can be magnetic media (e.g., floppy disks, hard disks, magnetic tapes), optical media (e.g., DVDs (Digital Versatile Discs)), or semiconductor media (e.g., solid-state drives (SSDs)).

[0154] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes the element.

[0155] The various embodiments in this specification are described in a related manner. Similar or identical parts between embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. For embodiments of devices, electronic devices, computer-readable storage media, and computer program products containing instructions, the descriptions are relatively simple because they are basically similar to the method embodiments; relevant parts can be referred to the descriptions of the method embodiments.

[0156] The above are merely preferred embodiments of this application and are not intended to limit the scope of protection of this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application are included within the scope of protection of this application.

Claims

1. A voltage drop acquisition circuit, wherein, Suitable for acquiring the on-state voltage drop of power devices, including; The target device is the device on the desaturation protection path (12) of the driver chip; and A voltage sampling unit (31) is connected to a first node and a second node of the target device, wherein the first node or the second node of the target device is adapted to connect to a power device (2); The voltage sampling unit (31) is used to collect the node voltages of the first node and the second node, convert the node voltages into the on-state voltage drop of the power device (2), and output the on-state voltage drop.

2. The pressure drop harvesting circuit of claim 1, wherein, The target device includes a target high-voltage diode, the first node and the second node are the input terminal and the output terminal of the target high-voltage diode, respectively, and the output terminal of the target high-voltage diode is adapted to connect to a power device (2).

3. The pressure drop harvesting circuit of claim 2, wherein, The target high-voltage diode includes: A first high-voltage diode (D11), the input terminal of which is adapted to be connected to the driver chip (11); and The second high-voltage diode (D12) has its input terminal connected to the output terminal of the first high-voltage diode (D11), and its output terminal is adapted to be connected to the power device (2).

4. The voltage drop acquisition circuit according to any one of claims 1 to 3, wherein, The voltage sampling unit (31) includes an operational amplifier (U2); The two input terminals of the operational amplifier (U2) are connected to the first node and the second node respectively, and the output terminal of the operational amplifier (U2) is connected to one input terminal. The operational amplifier (U2) is used to collect the node voltages of the first node and the second node, and to obtain the on-state voltage drop of the power device (2) based on the node voltages, and output the on-state voltage drop.

5. The voltage drop acquisition circuit according to claim 4, wherein, The voltage sampling unit (31) further includes: a first resistor (R1); The inverting input of the operational amplifier (U2) is connected to the first node through the first resistor (R1).

6. The voltage drop acquisition circuit according to claim 5, wherein, The voltage sampling unit (31) further includes: a second resistor (R2); One end of the second resistor (R2) is connected between the first resistor (R1) and the inverting input terminal, and the other end of the second resistor (R2) is connected to the output terminal of the operational amplifier (U2).

7. The voltage drop acquisition circuit according to any one of claims 1-3, wherein, The voltage drop acquisition circuit (3) includes: a clamping unit (32); The clamping unit (32) is connected to at least one target node among the first node and the second node, and is used to clamp the node voltage of the target node to a target voltage range.

8. The voltage drop acquisition circuit according to claim 7, wherein, The clamping unit (32) includes: a clamping assembly (321); The clamping assembly (321) is connected to the first node and the second node at its two ends, respectively.

9. The voltage drop acquisition circuit according to claim 8, wherein, The clamping assembly (321) includes: a first diode (D1); the input and output terminals of the first diode (D1) are respectively connected to the second node and the first node.

10. The voltage drop acquisition circuit according to claim 8 or 9, wherein, The clamping unit (32) further includes: a filtering component (322); The input terminal of the clamping component (321) is connected to the first node through the filtering component (322), or the output terminal of the clamping component (321) is connected to the first node through the filtering component (322); the filtering component (322) is used to filter the signal input to the voltage sampling unit (31).

11. The voltage drop acquisition circuit according to claim 10, wherein, The filtering component (322) includes: The first capacitor (C1); and The third resistor (R3) is connected in parallel with the first capacitor (C1).

12. The voltage drop acquisition circuit according to claim 7, wherein, The clamping unit (32) includes: Zener diode (DZ1); and The second diode (D2) is connected to the high-voltage node at one end of the Zener diode (DZ1), and the other end of the Zener diode (DZ1) is grounded through the second diode (D2). The high-voltage node is the node closer to the power device (2) between the first node and the second node.

13. The voltage drop acquisition circuit according to claim 4, wherein, The voltage drop acquisition circuit (3) further includes: an overshoot suppression circuit (33); The overshoot suppression circuit (33) is connected to the high-voltage node and the target input terminal of the operational amplifier (U2) to suppress the voltage of the high-voltage node transmitted to the target input terminal. The high-voltage node is the node closer to the power device (2) between the first node and the second node.

14. The voltage drop acquisition circuit according to claim 13, wherein, The overshoot suppression circuit (33) includes: The second capacitor (C2); and A fourth resistor (R4) is connected at one end to the high-voltage node, and at the other end to the target input terminal and one end of the second capacitor (C2), with the other end of the second capacitor (C2) grounded.

15. The voltage drop acquisition circuit according to claim 14, wherein, The overshoot suppression circuit (33) further includes: a third capacitor (C3); One end of the third capacitor (C3) is connected to the low-voltage node, and the other end of the third capacitor (C3) is connected to the connection path between the fourth resistor (R4), the target input terminal and the second capacitor (C2). The low-voltage node is the node further away from the power device (2) between the first node and the second node.

16. The voltage drop acquisition circuit according to claim 1, wherein, The voltage drop acquisition circuit (3) further includes: an isolation unit (34); The isolation unit (34) is connected to the voltage sampling unit (31) and is used to receive the on-state voltage drop of the voltage sampling unit (31) and isolate and output the on-state voltage drop.

17. A power device drive circuit, wherein, Includes a power device (2) and a voltage drop acquisition circuit (3) as described in any one of claims 1 to 16. The power device (2) is connected to the target device. The desaturation protection path (12) of the driving chip includes the target device. The detection voltage obtained through the desaturation protection path of the driving chip is used to detect whether the overcurrent protection of the power device (2) is triggered.

18. The power device drive circuit according to claim 17, wherein, The power device driving circuit further includes a driving chip (11), which is connected to the driving chip desaturation protection path (12) for receiving the detection voltage and driving the power device (2) when it is determined from the detection voltage that the overcurrent protection has not been triggered.

19. The power device drive circuit according to claim 17 or 18, wherein, The desaturation protection path (12) of the driving chip also includes: a fourth capacitor (C4); One end of the fourth capacitor (C4) is connected to the driver chip (11) and the driver chip desaturation protection path (12), and the other end of the fourth capacitor (C4) is grounded.

20. The power device drive circuit according to claim 19, wherein, The voltage drop acquisition circuit (3) also includes: a constant current power supply unit (36); The constant current power supply unit (36) is connected to the connection path between the driver chip (11) and the low voltage node, and is used to supply power to the fourth capacitor (C4) to accelerate the charging speed of the fourth capacitor (C4). The low voltage node is the node that is farther away from the power device (2) between the first node and the second node.

21. The power device drive circuit according to claim 17, wherein, The driver chip (11) includes an isolation unit (34); the isolation unit (34) of the voltage drop acquisition circuit (3) is the isolation unit (34) in the driver chip (11).

22. An electronic device, wherein, The electronic device includes a power device (2) and a power device drive circuit according to any one of claims 17 to 21.

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