Encoding or decoding method and apparatus

Abstract

The present application provides an encoding or decoding method and an apparatus. An outer code of a polar code having a code length and an information-bit length satisfying corresponding conditions is replaced with a code extended on the basis of a simplex code or a code extended on the basis of a Hamming code, such that a non-regular-kernel polar code having an arbitrary code length and information-bit length can be constructed. Compared with an Arikan-kernel polar code and other non-regular-kernel polar codes, better performance gain can be achieved.

Description

Encoding or decoding methods and apparatus

[0001] This application claims priority to Chinese patent application filed on January 26, 2025, with application number 202510126576.0 and entitled "Method and apparatus for encoding or decoding", the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of channel coding, and more specifically, to a method and apparatus for encoding or decoding. Background Technology

[0003] Polar codes are coding schemes that can be rigorously proven to achieve Shannon channel capacity, offering advantages such as good decoding performance and low complexity. Currently, the construction method for polar codes, proposed by Professor Erdal Arikan, is generally adopted, also known as polar code construction based on the Arikan kernel.

[0004] However, when constructing polar codes based on Arikan kernels, there is only one coupling method for the polar kernel, or rather, it is fixed, and it is impossible to obtain better performance under arbitrary code length and information bit length. Summary of the Invention

[0005] This application provides a method and apparatus for encoding or decoding, which can construct non-regular kernel polar codes with arbitrary code length and information bit length, and can achieve better performance.

[0006] Firstly, an encoding method is provided, which can be executed by a communication device, which may be a communication equipment or a module applied to the communication equipment (e.g., a processor, chip, circuit, etc., or a logic module, hardware, and / or software capable of implementing all or part of the functions of the communication device). The communication device may also be called an encoding device, such as an encoding device or encoder. The method includes: obtaining a number of information bits K and a target code length E; determining at least one first sub-matrix based on the number of information bits K and the target code length E, each of the at least one first sub-matrix being obtained based on a Hamming code or simplex code extension; and encoding based on the at least one first sub-matrix to obtain an encoded sequence. Optionally, the method further includes: outputting the encoded sequence.

[0007] In the technical solution of this application, a target code of arbitrary code length and information bit length can be decomposed into at least one sub-code (corresponding sub-matrix), and each sub-code can be obtained by extending a simplex code or a Hamming code, thus constructing a non-regular kernel polar code of arbitrary code length and information bit length. Since Hamming codes and simplex codes are dual codes and have advantages such as large minimum distance and low decoding error rate, the overall performance of the target code decomposed into Hamming codes or simplex codes is better than that of Arikan kernel polar codes.

[0008] Furthermore, compared to other non-regular core polar codes, it can achieve better performance gains, for example, with lower bit error rates at different code lengths and information bit lengths.

[0009] Furthermore, when the target code length is long, the encoding or decoding sides of other non-regular kernel polar codes need to store encoding matrices of a length corresponding to the target code length (e.g., encoding matrices of the mother code length corresponding to the target code length), resulting in significant storage overhead. However, the technical solution of this application only stores a few smaller kernels (corresponding to the first sub-matrix), thus reducing storage overhead.

[0010] Secondly, a decoding method is provided, which can be executed by a communication device, which may be a communication equipment or a module applied to the communication equipment (e.g., a processor, chip, circuit, etc., or a logic module, hardware, and / or software capable of implementing all or part of the functions of the communication device). The communication device may also be called a decoding device, such as a decoding apparatus or decoder. The method may include: obtaining the number of information bits K and the target code length E; determining at least one first sub-matrix based on the number of information bits K and the target code length E, each of the at least one first sub-matrix being obtained based on a Hamming code or simplex code extension; and decoding based on the at least one first sub-matrix to obtain a decoded sequence. Optionally, the method further includes: outputting the decoded sequence.

[0011] The second aspect is the decoding method corresponding to the encoding method in the first aspect; the technical effects can be found in the explanation of the first aspect.

[0012] Furthermore, on the decoding side, compared with decoding based on Arikan core polar codes, the decoding performance is better, for example, with a lower error rate, while the decoding complexity remains basically unchanged.

[0013] In some implementations of the first or second aspect, determining at least one first sub-matrix of the polar code based on the number of information bits K and the target code length E includes: when K and E satisfy E≥2 K -1, determine a first submatrix, said first submatrix being (E, K) and obtained based on the simplex code extension; or, when K and E satisfy E≥2E-K -1, determine a first sub - matrix, where the first sub - matrix is (E, K) and is obtained by extending based on the Hamming code.

[0014] In this implementation, when the target code length and the information bit length meet the corresponding conditions, the target code can be directly replaced with a code extended based on the simplex code or the Hamming code. Among them, for the simplex code, the target code length E and the number of information bits K satisfy the condition E = 2 K -1, and it can be extended to a code with any code length; for the Hamming code, the target code length E and the number of information bits K satisfy the condition E = 2 E-K -1, and it can be extended to a code with any code length. Also, because these two codes are dual codes of each other and have advantages such as a large minimum distance and a low decoding error rate, therefore, by replacing the sub - code obtained by disassembling the target code with one of these two codes, the decoding error rate can be reduced and the decoding performance can be improved.

[0015] In some implementations of the first aspect or the second aspect, determining at least one first sub - matrix of the polar code based on the number K of information bits and the target code length E includes: when K and E do not satisfy E≥2 K -1, and do not satisfy E≥2 E-K -1, determine at least two first sub - matrices, where the at least two first sub - matrices include the first sub - matrix (E1, K1) and / or the first sub - matrix (E2, K2), and K1 and E1 satisfy K2 and E2 satisfy K1 < K, E1 < E, K2 < K, E2 < E, and K, K2, E1, and E2 are all positive integers.

[0016] In this implementation, when the target code length and the information bit length do not meet the two set conditions, the target code can be disassembled into multiple sub - codes, and each sub - code can be a code extended based on the simplex code or the Hamming code. Compared with the existing method of directly constructing non - regular kernel polar codes, the complexity is lower.

[0017] As an example, the first sub - matrix (E1, K1) is obtained by extending based on the simplex code, and the second sub - matrix (E2, K2) is obtained by extending based on the Hamming code.

[0018] In some implementations of the first aspect or the second aspect, determining at least one first sub - matrix based on the number K of information bits and the target code length E includes: disassembling the target polar code based on the number K of information bits, the target code length E, and the length N of the mother code corresponding to the target code length E to obtain the at least two first sub - matrices.

[0019] In this implementation, when the target code is decomposed into multiple sub-codes, it is related to the length of the corresponding mother code and the rate matching mode of the mother code.

[0020] In some implementations of the first or second aspect, the step of encoding based on the at least one first sub-matrix to obtain an encoded sequence includes: obtaining at least two second sub-matrixes based on the at least two first sub-matrixes, wherein the at least two second sub-matrixes correspond one-to-one with the at least two first sub-matrixes, the at least two first sub-matrixes are obtained by decomposing the target polar code through t layers, the second sub-matrix #a in the at least two second sub-matrixes is obtained by extending the first sub-matrix #a in the at least two first sub-matrixes, the size of the second sub-matrix #a is determined based on the length of the mother code corresponding to the target polar code and the number of decomposition layers corresponding to the first sub-matrix #a, and t is a positive integer; and encoding based on the at least two second sub-matrixes to obtain the encoded sequence.

[0021] In this implementation, after the target code is decomposed into multiple sub-codes (corresponding to the first sub-matrix), the lengths of the two sub-codes to be coupled must be the same. Therefore, some sub-codes (corresponding to the first sub-matrix #a) need to be expanded into sub-codes of a larger length (corresponding to the second sub-matrix #a). Subsequently, the encoded sequence is obtained through the coupling of multiple sub-codes.

[0022] In some implementations of the first or second aspect, the step of encoding based on the at least two second sub-matrices to obtain the encoded sequence includes: coupling the at least two second sub-matrices to obtain a third matrix; and encoding based on the third matrix to obtain the encoded sequence.

[0023] In some implementations of the first or second aspect, the step of encoding based on the at least two second sub-matrices to obtain the encoded sequence includes: encoding at least two sub-blocks of the sequence to be encoded based on the at least two second sub-matrices to obtain at least two encoded sub-blocks, wherein the at least two sub-blocks are obtained by splitting the sequence to be encoded based on the size of the at least two second sub-matrices; and coupling the at least two encoded sub-blocks to obtain the encoded sequence.

[0024] The two implementations described above are two ways of encoding based on multiple sub-matrices. One method is to couple multiple sub-matrices into a large matrix and then encode based on this large matrix to obtain an encoding sequence. The other method is to use multiple sub-matrices to encode the sub-blocks of the vector to be encoded, obtain the corresponding encoding sub-blocks, and finally couple the multiple encoding sub-blocks to obtain an encoding sequence.

[0025] The former implementation provides a general method for constructing the generator matrix of polar codes based on non-regular kernels; the latter implementation has low encoding complexity and low computational cost.

[0026] In some implementations of the first or second aspect, the coupling of the at least two coded sub-blocks to obtain the coded sequence includes: sequentially coupling the two coded sub-blocks with the shortest length in the at least two coded sub-blocks in a forward-backward order to obtain a coupled coded sub-block, replacing the two coded sub-blocks with the coupled coded sub-block, and then performing the next coupling; obtaining the coded sequence based on the coded sub-block obtained from the last coupling.

[0027] Thirdly, a communication device is provided, which has the function of implementing the method in the first aspect or any possible implementation of the first aspect. The function can be implemented by hardware or by hardware executing corresponding software. The hardware or software includes one or more units corresponding to the above-described function.

[0028] Fourthly, a communication device is provided, which has the function of implementing the method in the second aspect or any possible implementation of the second aspect. The function can be implemented by hardware or by hardware executing corresponding software. The hardware or software includes one or more units corresponding to the above-described function.

[0029] Fifthly, a communication device is provided, comprising at least one processor configured to cause the communication device to execute the method of the first aspect or any possible implementation thereof; or to execute the method of the second aspect or any possible implementation thereof. Optionally, the at least one processor is coupled to at least one memory for storing a computer program or instructions, the at least one processor being configured to call and execute the computer program or instructions from the at least one memory, causing the communication device to execute the method of the first aspect or any possible implementation thereof; or to execute the method of the second aspect or any possible implementation thereof. Optionally, the at least one processor may be included in the communication device or may be configured externally to the communication device. Optionally, the communication device further includes the at least one memory. Optionally, the processor and the memory are integrated together.

[0030] Optionally, the communication device further includes at least one communication interface for inputting and / or outputting signals.

[0031] Sixthly, a communication device is provided, including a communication interface and a circuit. The communication interface is used to receive a signal to be processed and transmit the signal to the circuit. The circuit is used to process the signal to perform a method as described in the first aspect or any possible implementation thereof; or to perform a method as described in the second aspect or any possible implementation thereof. Optionally, the communication interface is further used to output a signal processed by the circuit. Optionally, the signal may include information and / or data. Optionally, the communication device may be a chip (e.g., a baseband chip) or a chip system. The communication interface may be an interface circuit.

[0032] A seventh aspect provides a computer-readable storage medium storing computer program code or instructions that, when executed on a computer, cause the method of the first aspect or any possible implementation thereof to be implemented; or, the method of the second aspect or any possible implementation thereof to be implemented.

[0033] Eighthly, a computer program product is provided, the computer program product comprising computer program code or instructions, which, when executed on a computer, cause the method in the first aspect or any possible implementation thereof to be implemented; or, as in the second aspect or any possible implementation thereof, the method to be implemented.

[0034] A ninth aspect provides a wireless communication system, including a communication device as described in the third aspect and a communication device as described in the fourth aspect. Attached Figure Description

[0035] Figure 1 is a schematic diagram of an 8-bit polar code encoding.

[0036] Figure 2 is a schematic diagram of the SC decoding process.

[0037] Figure 3 is a schematic diagram of the coupling process of the Arikan polarization nucleus.

[0038] Figure 4 shows an example of a communication system applicable to the technical solution of this application.

[0039] Figure 5 is a schematic diagram of the basic process of wireless communication.

[0040] Figure 6 is a schematic flowchart of the encoding method 600 provided in this application.

[0041] Figure 7 is a schematic diagram of the encoding matrix of the (16,3) code, which is an extension of the (7,3) simplex code.

[0042] Figure 8 is a schematic diagram of the encoding matrix of the (16,13) code, which is an extension of the Hamming code based on (7,4).

[0043] Figure 9 is a schematic diagram of the process of decomposing the target polar code into multiple first subcodes in Example 1.

[0044] Figure 10 shows a performance comparison between Example 1 of this application and Arikan core polar codes.

[0045] Figure 11 is a schematic diagram of the process of decomposing the target polar code into multiple first subcodes in Example 2.

[0046] Figure 12 shows a performance comparison between the scheme of Example 2 of this application and the polar code of the Arikan polar core.

[0047] Figure 13 is a schematic diagram of the process of decomposing the target polar code into multiple first subcodes in Example 3.

[0048] Figure 14 shows a performance comparison between the scheme of Example 3 of this application and the polar code of the Arikan polar core.

[0049] Figure 15 shows an example of the first submatrix #a.

[0050] Figure 16 shows an example of the second submatrix #a.

[0051] Figure 17 is a schematic structural diagram of the communication device 1000 provided in this application.

[0052] Figure 18 is a schematic block diagram of another communication device 1100 provided in this application.

[0053] Figure 19 is a schematic diagram of the chip provided in this application. Detailed Implementation

[0054] The technical solutions in this application will now be described with reference to the accompanying drawings.

[0055] First, the relevant concepts or technologies involved in the embodiments of this application will be introduced.

[0056] 1. Polar code encoding

[0057] Polar codes are the first coding scheme that can be rigorously proven to "achieve" Shannon channel capacity. They have the advantages of good decoding performance and low complexity. Currently, they have been selected by the 3rd generation partnership project (3GPP) as the control channel coding scheme for the enhanced mobile broadband (eMBB) scenario of the fifth generation (5G) system.

[0058] Figure 1 is a schematic diagram of an 8-bit polar code encoding. As shown, the encoding process includes several polarization kernel operations, where the polarization kernel ANDs the two input bits... Multiplying them yields two output bits. It can be seen that the polar code is constructed recursively; an 8-bit polar code can be seen as a result of coupling two 4-bit polar codes, and a 4-bit polar code can be seen as a result of coupling two 2-bit polar codes.

[0059] G N For an Arikan polarization kernel of length N, a polar code of length N can be seen as obtained by coupling two polar codes of length N / 2 before polarization, a polar code of length N / 2 can be seen as obtained by coupling two polar codes of length N / 4 before polarization, and so on. Furthermore, an Arikan polarization kernel of length N can be SC decoded by performing Nlog(N) f operations and g operations.

[0060] 2. Construction of Polar Code

[0061] The construction process of polar codes is used to determine the information bits and freeze bits. Typically, the reliability of each sub-channel is sorted, and the K positions with the highest reliability are set as information bits, while the remaining NK positions are set as freeze bits. As shown in Figure 1, a polar code with N=8 and K=4 is constructed, where u3, u5, u6, and u7 are usually the information bits, and the remaining positions are freeze bits. In practice, polar codes can be constructed offline using a reliability sequence or online using methods such as Gaussian approximation.

[0062] 3. Polar code decoding

[0063] Polar codes can be decoded using a successive cancellation (SC) decoding algorithm. In the SC algorithm, the log likelihood ratio (LLR) of the information bits is calculated step by step. For an information bit, if LLR > 0, the bit is set to 0; if LLR < 0, the bit is set to 1. For a frozen bit, the bit is set to 0 regardless of the LLR value.

[0064] Figure 2 illustrates the SC decoding process. As shown in Figure 2, there are 8 computation nodes, including 4 f nodes and 4 g nodes. The computation of an f node requires 2 LLR inputs to its right, and the computation of a g node requires 2 LLR inputs to its right and 1 "partial sum" input above it. Furthermore, the output can only be calculated after the inputs have been calculated. According to the above rules, starting from the received signal on the right and calculating the 8 nodes sequentially, the decoding order of the 4 bit positions is ①→②→③→④, which is the SC decoding process.

[0065] 4. Rate matching

[0066] The parent code of a polar code is always an integer power of 2. However, in practical applications, the required length of the polar code (also known as the target code length) is not necessarily an integer power of 2. In this case, some bits can be removed from the parent code and not sent, or some bits in the parent code can be sent repeatedly. This process is called rate matching.

[0067] The rate matching in this application embodiment mainly uses the following two modes:

[0068] 1) Punch: This refers to directly punching holes in certain positions of a polar code of the master code length without transmitting the data. This method generates polar code sequences of arbitrary length. On the decoding side, since there is no information at the corresponding "punch" positions, the LLR of the corresponding bits is set to 0.

[0069] 2) Shortening: This involves designing the polar code so that certain positions in the encoded sequence are fixed values ​​and therefore do not need to be transmitted. On the decoding side, since the positions corresponding to the "shortening" are essentially known (usually set to 0), the LLR of the corresponding bit is set to infinity.

[0070] 5. Rate matching based on natural order

[0071] Specifically, this refers to continuously punching or shortening the bits of a polar code according to the natural order of their position indices. Taking punching as an example, when a polar code of length 6 is needed, first construct a polar code of length 8, then punch the first two bit positions; when a polar code of length 5 is needed, first construct a polar code of length 8, then punch the first three bit positions. Taking shortening as another example, when a polar code of length 7 is needed, a preset u7 = 0 can be used to make x7 0 in all encoded sequences; when a polar code of length 6 is needed, a preset u7 and u6 can be used to make x7 and x6 0 in all encoded sequences. In rate matching based on natural order, the shortening or punching positions are continuous, making implementation simple. It should be understood that in this example, the bit position indices are calculated starting from 0.

[0072] In existing polar code encoding techniques, there is only one coupling method when the code length N is an integer power of 2, as shown in Figure 3.

[0073] Figure 3 illustrates the coupling process of the Arikan polarization cores. As shown in Figure 3, two polarization cores F2 with a length of 2 are coupled to obtain a polarization core F4 with a length of 4; two polarization cores F1 with a length of 1 are coupled to obtain a polarization core F2 with a length of 2. This fixed coupling method of the Arikan cores cannot achieve optimal performance for various code lengths E and information lengths K. Furthermore, when the code length E is not an integer power of 2, rate matching is required, which degrades the performance of the SC algorithm.

[0074] Non-regular kernel polar codes construct large kernels by arranging polarization trellis connections according to the channel state or the number of information bits K, accelerating polarization without increasing decoding complexity. Different kernels are constructed for different code lengths E and information bit lengths K. Furthermore, there is a lack of a systematic construction scheme for any kernel of code length N and information bit length K.

[0075] In view of this, this application provides an encoding method and a corresponding decoding method, which can construct an irregular kernel polar code with arbitrary code length N and information bit length K, and has performance gains compared to Arikan kernel polar codes and other existing irregular kernel polar codes.

[0076] It should be noted that the polar codes provided in this embodiment are also based on non-regular kernel polar codes. For the generator matrix of the Arikan kernel polar code, the row weights of the first row are all powers of 2, and the row weight of the 2kth row is twice the row weight of the kth row. The submatrices corresponding to the [1,N / 2]th row and [1,N / 2]th column, the [N / 2+1,N]th column and [1,N / 2]th column, and the [N / 2+1,N]th row and [N / 2+1,N]th column are the same, and the submatrix corresponding to the [N / 2+1,N]th row and [1,N / 2]th column is a zero matrix.

[0077] The encoding matrix of the non-regular kernel polar code in the technical solution of this application may not satisfy the above characteristics. In other words, the encoding matrix of the non-regular kernel polar code in the embodiments of this application refers to a matrix that does not satisfy the above characteristics.

[0078] The technical solution provided in this application is described below.

[0079] The technical solutions of this application can be applied to various communication systems, including but not limited to: satellite communication systems, fifth-generation (5G) systems or new radio (NR) systems, long-term evolution (LTE) systems, LTE frequency division duplex (FDD) systems, LTE time division duplex (TDD) systems, and future communication systems. Furthermore, they can also be applied to sidelink (SL) communication, vehicle-to-everything (V2X) communication, machine-to-machine (M2M) communication, machine-type communication (MTC), and Internet of Things (IoT) communication systems, or other communication systems, which are not limited herein.

[0080] Figure 4 illustrates an example of a communication system applicable to the technical solution of this application. As shown in Figure 4, the communication system may include one or more transmitting devices and one or more receiving devices. Optionally, one of the transmitting and receiving devices may be a terminal device, and the other may be a network device. The encoding or decoding method provided in this application is applicable to communication between the network device and the terminal device shown in Figure 4, i.e., uplink or downlink communication. For example, in downlink communication, the transmitting device (or corresponding encoding device) in this embodiment of the application is a network device, and the receiving device (or corresponding decoding device) is a terminal device; in uplink communication, the transmitting device is a terminal device, and the receiving device is a network device.

[0081] The communication system provided in this application may also include AI network elements for implementing some or all AI-related operations. AI network elements can also be referred to as AI nodes, AI devices, AI entities, AI modules, AI models, or AI units, etc. The AI ​​network elements may be built into the network elements of the communication system. For example, an AI network element may be an AI module built into: access network equipment, core network equipment, cloud server, or operation, administration, and maintenance (OAM) to implement AI-related functions. The OAM may act as the network management system for core network equipment and / or access network equipment. Alternatively, the AI ​​network element may also be an independently configured network element in the communication system. Optionally, the terminal or its built-in chip may also include AI entities for implementing AI-related functions.

[0082] For example, a terminal device may also be referred to as user equipment (UE), access terminal, user unit, user station, mobile station, mobile station, mobile terminal (MT), remote station, remote terminal, mobile device, user terminal, terminal, wireless communication device, user agent, or user apparatus. In the embodiments of this application, the terminal device may be a device that provides voice and / or data connectivity to a user, and can be used to connect people, objects, and machines, such as a handheld device with wireless connectivity, in-vehicle equipment, etc. The terminal devices in the embodiments of this application can be mobile phones, tablets, laptops, handheld computers, mobile internet devices (MIDs), wearable devices, virtual reality (VR) devices, augmented reality (AR) devices, point-of-sale (POS) machines, customer-premises equipment (CPEs), light user equipment (UEs), reduced capability UEs (REDCAP UEs), vehicle devices (such as vehicle units, vehicle modules, vehicle chips, on-board units (OBUs), or telematics boxes (T-BOXs), wireless terminals in industrial control, wireless terminals in self-driving, wireless terminals in remote medical surgery, wireless terminals in smart grids, wireless terminals in transportation safety, wireless terminals in smart cities, and wireless terminals in smart homes. Wireless terminals in the home (e.g., wireless terminals). Optionally, the UE can be used to act as a base station. For example, the UE can act as a scheduling entity that provides sidelink signaling between UEs in V2X or SL, etc.

[0083] In this embodiment, the device for implementing the functions of the terminal device can be the terminal device itself, or any device capable of supporting the terminal device in implementing the corresponding functions, such as a chip, chip system, processor, circuit, or a combination of hardware and / or software. This device is located on the terminal side and can be configured within or used in conjunction with the terminal device. The chip system can be composed of chips or may include chips and other discrete components.

[0084] The network device in this application embodiment may include a device for communicating with a terminal device. This network device may include an access network device or a radio access network device; for example, the network device may be a base station. An access network device may refer to a radio access network (RAN) node (or device) that connects the terminal device to a wireless network. A base station can broadly encompass, or be replaced by, various names such as: NodeB, evolved NodeB (eNB), next-generation NodeB (gNB), relay station, access point, transmitting and receiving point (TRP), transmitting point (TP), master station, auxiliary station, motor slide retainer (MSR) node, home base station, network controller, access node, wireless node, access point (AP), transmission node, transceiver node, baseband unit (BBU), remote radio unit (RRU), active antenna unit (AAU), remote radio head (RRH), central unit (CU), distributed unit (DU), radio unit (RU), positioning node, etc. A base station can be a macro base station, micro base station, relay node, donor node, or a combination thereof. A base station can also refer to a communication module, modem, or chip installed within the aforementioned equipment or apparatus. A base station can also be a mobile switching center, a device performing base station functions in D2D, V2X, and M2M communications, a network device (e.g., a base station) in a future communication network, or a device performing network device functions. A base station can support networks using the same or different access technologies. Optionally, a RAN node can also be a server, wearable device, vehicle, or in-vehicle equipment. For example, the access network equipment in vehicle-to-everything (V2X) technology can be a roadside unit (RSU). The embodiments of this application do not limit the specific technology or device form used in the network equipment.

[0085] Base stations can be fixed or mobile. For example, a helicopter or drone can be configured to act as a mobile base station, and one or more cells can move depending on the location of the mobile base station. In other examples, a helicopter or drone can be configured as a device to communicate with another base station.

[0086] In some deployments, the network device in this application embodiment may be a device including a CU, or a DU, or a device including both CU and DU, or a control plane CU node (central unit-control plane (CU-CP)) and a user plane CU node (central unit-user plane (CU-UP)) and a DU node. For example, the network device may include gNB-CU-CP, gNB-CU-UP, and gNB-DU.

[0087] In some deployments, multiple RAN nodes collaborate to assist terminals in achieving wireless access, with different RAN nodes each implementing some of the base station's functions. For example, RAN nodes can be CUs, DUs, CU-CPs, CU-UPs, or RUs. CUs and DUs can be configured separately or included in the same network element, such as a BBU. RUs can be included in radio frequency equipment or radio frequency units, such as RRUs, AAUs, or RRHs.

[0088] In different systems, CU (or CU-CP and CU-UP), DU, or RU may have different names, but those skilled in the art will understand their meaning. For example, in an open radio access network (ORAN / O-RAN) system, CU can also be called an open CU (open CU, O-CU), and DU can also be called an open DU (open DU, O-DU). CU-CP can also be called O-CU-CP, CU-UP can also be called O-CU-UP, and RU can also be called O-RU. Any of the units among CU (or CU-CP, CU-UP), DU, and RU in this application can be implemented through software modules, hardware modules, or a combination of software modules and hardware modules.

[0089] In this embodiment, the device used to implement the functions of the network device can be the network device itself; it can also be a device capable of supporting the network device in implementing the corresponding functions, such as a combination of a chip, processor, circuit, hardware, and / or software. This device is located on the network side and can be configured within or used in conjunction with the network device.

[0090] Figure 5 is a schematic diagram of the basic process of wireless communication. As shown in Figure 5, on the transmitting side, the signal source is transmitted after sequentially undergoing source coding, channel coding, and modulation. On the receiving side, the received signal is sequentially demodulated, channel decoded, and source recovery (or source decoding) before outputting the destination signal. Among these, channel coding and channel decoding are one of the core technologies in the field of wireless communication.

[0091] The encoding or decoding methods provided in this application correspond to the channel coding and channel decoding processes shown in Figure 5, respectively. They can be used in dedicated network equipment or general network equipment, and can be applied to the various network devices (e.g., base station equipment) and the various terminal devices mentioned above. Specifically, the channel coding scheme is mainly implemented through the channel coding unit (e.g., encoder) in these devices, and the channel decoding scheme is mainly implemented through the channel decoding unit (e.g., decoder) in these devices.

[0092] Figure 6 is a schematic flowchart of the encoding method 600 provided in this application. Method 600 includes steps 610 to 640, respectively denoted as S610 to S640, which can be executed by an encoding device, such as an encoding apparatus, or a device applied to the encoding apparatus (e.g., an encoder, chip, or circuit). The following embodiments use an encoding apparatus as an example.

[0093] S610, the number of information bits K and the target code length E acquired by the encoding device.

[0094] S620. The encoding device determines at least one first sub-matrix based on the number of information bits K and the target code length E. Each of the at least one first sub-matrix is ​​obtained by extending a Hamming code or a simplex code. In this embodiment, a Hamming code refers to a code with a code length of 2... l -1, information length is 2 l -l-1, a binary linear code with a minimum Hamming distance of 3, and a simplex code that is the dual code of the Hamming code.

[0095] Among them, (2) l -1,l)simplex code and (2 l -1,2 l -l-1) Hamming code is a commonly used method in channel coding. It consists of two codes that are dual codes, possessing advantages such as a large minimum distance and a low decoding error rate. Furthermore, it can be used to construct codes with a length E≥2 based on simplex code. l -1, a kernel with 1 information bits, and a length E≥2 constructed based on Hamming code extension. l -1, a Hamming code-based core with E1 information bits. Where, (2 l -1,l)simplex code indicates a code length of 2. l -1, a simplex code with information length l. (2) l -1,2 l -l-1) Hamming code indicates a code length of 2. l -1, information length is 2 lHamming code for -l-1.

[0096] As an example, (2) l -1,l)simplex code can be derived from a length of 2 l The Arikan polar code is obtained by shortening the last bit, and the information bit is the 2nd bit. l -2 s Bit, 0≤s≤l-1. Based on (2) l -1,l)simplex code can be extended to obtain (t(2 l The encoding matrix is ​​given by [-1), l), where t is any positive integer. The [1, (t-1)(2)] encoding matrix is ​​given by [-1), l), where t is any positive integer. l -1)] column and [1,(t-1)(2 l The submatrix formed by rows [-1)] is the identity matrix, where the [x, y]th column represents the xth to yth columns. For example, the [1, (t-1)(2)]th column represents the submatrix formed by rows [-1)]. l -1)] column represents the first column to the (t-1)(2)th column. l -1) Columns and rows are represented similarly, for example, [1,(t-1)(2) l -1)] rows represent rows 1 to (t-1)(2) l -1) line. This description applies to all embodiments and will not be repeated below. For 0≤k≤t-1, the [k(2 l -1)+1,(k+1)(2 l -1)] column and [(t-1)(2 l -1)+1,t(2 l The submatrix formed by rows -1) is (2) l The encoding matrix of a simplex code (-1, l). The information bits are (2... l -1,l)simplex code information bit index plus (t-1)(2) l -1).

[0097] The length of the encoding matrix is ​​(t-1)(2) l -1)+q, 1≤q≤2 l -2, then the matrix can be obtained from [t(2 l The encoding matrix of [2] (-1), l] l -q,t(2 l -1)] column and [2] l -q,t(2 l The submatrix is ​​obtained by forming rows [-1).

[0098] Figure 7 is a schematic diagram of the encoding matrix of the (16,3) code extended from the (7,3) simpleplex code. The encoding matrix of the extended (16,3) code is denoted as matrix #1, where the lower right corner represents the encoding matrix of the (7,3) simpleplex code, as shown by G in Figure 7. 7,3 Based on the example of the above expansion method, l = 3, when 0 ≤ s ≤ 2, and when s takes the values ​​0, 1, and 2 respectively, the information bits are the 2nd... l -2 s The code length is extended from 7 to 16, that is, code length 16 equals (t-1)(2). l -1)+q, 16=2*7+2, therefore t=3, 3, q=2. In the example in Figure 7, the lower right corner (i.e., the sub-block corresponding to rows 10-16 and columns 10-16) is G. 7,3 The simplex code has an identity matrix in the upper left corner and a zero matrix in the upper right corner. The sub-blocks corresponding to rows 10-16 and columns 1-2 are G. 7,3 The last two columns are copied, and the sub-blocks corresponding to rows 10-16 and columns 3-9 are G. 7,3 For replication. It should be noted that the way the simplex code of (7,3) is extended to the simplex code of (16,3) shown here is only an example. Other ways can also be used to extend it. That is, the way the simplex code of (7,3) is extended to the simplex code of (16,3) is not unique.

[0099] Matrix #1:

[0100] [2 l -1,2 l -l-1] Hamming code can be of length 2 l The first bit of the Arikan polar code is obtained by punching the hole, and the information bit is the second bit. s Bit, 0≤s≤l-1. Based on [2] l -1,2 l -l-1]Hamming code can be expanded to obtain [t(2 l -1),t(2 l The encoding matrix of [k(2)-l]. Where, for 1≤k≤t-1, the [k(2)-l] ... l -1)+1,(k+1)(2 l -1)] column and [k(2 l -1)+1,(k+1)(2 l The submatrix formed by rows [-1)] is the identity matrix, and the submatrix in [1,2] is the identity matrix. l -1] column and [k(2 l -1)+1,(k+1)(2 lThe submatrix formed by rows [-1)] is also an identity matrix. l -1] column and [1,2] l The submatrix formed by rows -1 is [2] l -1,2 l The encoding matrix of Hamming code [-l-1]. The information bits are [2]. l -1,2 l -l-1] Hamming code information bit index. If the length of the encoding matrix is ​​(t-1)(2) l -1)+q,1≤q≤2 l -2, then the matrix can be formed by [t(2 l -1),t(2 l The encoding matrix of [1,(t-1)(2] is [1,(t-1)(2]]. l -1)+q] column and [1,(t-1)(2 l The submatrix is ​​obtained by forming rows [-1)+q].

[0101] Figure 8 shows a schematic diagram of the encoding matrix of the (16,13) code extended from the (7,4) Hamming code. The encoding matrix of the extended (16,13) code is denoted as matrix #2, where the upper left corner is the encoding matrix of the (7,4) Hamming code, as marked G in Figure 8. 7,4 Based on the extended example above, l = 4. When 0 ≤ s ≤ 3, and when s takes the values ​​0, 1, 2, and 3 respectively, the information bits are the 2nd, 3rd, and 3rd bits respectively. s The code length is extended from 7 to 16, that is, code length 16 equals (t-1)(2). l -1)+q,16=(3-1)*(2 3 -1)+2, therefore t=3, q=2. In the example in Figure 8, the top left corner (i.e., the sub-block corresponding to rows 1-7 and columns 1-7) is G. 7,4 The Hamming code for (7,4) is represented by the sub-blocks in rows 8-14 and columns 1-7, which are identity matrices. The 2x2 sub-blocks in the bottom left and bottom right corners are also identity matrices, and all other positions are zero. It should be noted that the example shown here of extending the Hamming code for (7,4) to (16,3) is only one example; other methods can also be used, meaning there is no unique way to extend the Hamming code for (7,4) to (16,3).

[0102] Matrix #2:

[0103] In summary, there are no unique ways to extend simplex code or Hamming code; the above are merely examples.

[0104] The encoding device determines at least one first sub-matrix based on the number of information bits K and the target code length E, and each first sub-matrix is ​​a matrix obtained by extending the simplex code or Hamming code.

[0105] In one example, when K and E satisfy E≥2 K -1 (hereinafter referred to as condition 1 for the sake of brevity), the encoding device determines a first submatrix, which is (E, K) and is obtained based on the simplex code extension.

[0106] In another example, when K and E satisfy E≥2 E-K -1 (hereinafter referred to as condition 2), the encoding device determines a first submatrix, which is (E, K) and is obtained based on the Hamming code extension.

[0107] Alternatively, when E is greater than 4, K and E may satisfy one of the two conditions mentioned above, i.e., E ≥ 2. K -1 or E≥2 E-K -1.

[0108] When 1≤E≤4, K and E may simultaneously satisfy both of the above conditions. In this case, the first submatrix can be determined according to the following principle:

[0109] When E = 1 or 2, the first submatrix determined by the encoding device can be obtained by extending the simplex code or the Hamming code. In other words, at this time, any code obtained by extending the simplex code or the Hamming code can be arbitrarily chosen as the first submatrix.

[0110] As an example, when (E, K) = (3, 1), the code obtained based on the Hamming code extension is selected as the first submatrix; or, when (E, K) = (3, 2), the code obtained based on the simplex code extension is selected as the first submatrix.

[0111] As an example, when (E, K) = (4, 2), any code derived from simplex code or Hamming code extension can be chosen as the first submatrix.

[0112] In S620, the encoding device can determine at least one first sub-matrix based on the number of information bits K, the target code length E, and the length N of the mother code corresponding to the target code length E. According to the above conditions, when the target polar code satisfies either of the two conditions, the target polar code is replaced with the code corresponding to the satisfied condition. For example, when the target polar code satisfies condition 1, it is replaced with a code based on the simplex code extension; when the target polar code satisfies condition 2, it is replaced with a code based on the Hamming code extension.

[0113] When the target polar code does not satisfy either of the above two conditions, the encoding device decomposes the target polar code according to the mother code of the Arikan core polar code to obtain two sub-codes. Further, the above two condition judgments are performed on each sub-code. When a sub-code satisfies one of the above two conditions, it is replaced with the corresponding code obtained by extending the simplex code or Hamming code. When a sub-code satisfies neither condition 1 nor condition 2, it continues to be further decomposed, and so on, until each of the decomposed sub-codes satisfies one of the above two conditions, and the decomposition is completed. At this point, the set of sub-codes that can be replaced with codes extended by the simplex code or Hamming code is the at least two first sub-codes described in the embodiments of this application.

[0114] As an example, the target polar code is decomposed to obtain two sub-codes, one of which is sub-code #1. The number of information bits K in sub-code #1 and the target code length E satisfy E≥2. K -1, replace subcode #1 with code (E, K) obtained based on simplex code extension; if the number of information bits K of subcode #1 and the target code length E satisfy ≥2 E-K -1, replace subcode #1 with the code (E, K) obtained based on the Hamming code extension. If subcode #1 does not satisfy either of the above two conditions, then subcode #1 is further decomposed, and the subcode obtained from the decomposition is then judged to satisfy one of the above two conditions. Similarly, the above judgment is performed on subcode #2 of the two subcodes. If subcode #2 satisfies one of the two conditions, it is replaced with the corresponding code based on the simplex code or Hamming code extension; if subcode #2 does not satisfy either of the above two conditions, then subcode #2 is further decomposed, and the subcode obtained from the decomposition of subcode #2 is then judged to satisfy one of the above two conditions, and so on. It can be understood that the same operation is performed on each subcode obtained from the decomposition, and the final target polar code will be decomposed into multiple subcodes, each of which satisfies one of the above two conditions.

[0115] When making conditional judgments, the number of information bits K and the target code length E in condition 1 or condition 2 are the number of information bits and the code length corresponding to each sub-code.

[0116] The following examples, from Examples 1 to Examples 3, illustrate the decomposition process of the target polar code.

[0117] Example 1

[0118] The target code length E = 32, and the number of information bits K = 12.

[0119] Figure 9 is a schematic diagram illustrating the process of decomposing the target polar code into multiple first subcodes in Example 1. As shown in Figure 9, according to the scheme provided in this application, it is first determined whether the code length E and the number of information bits K (or information bit length) of the target polar code satisfy one of the above two conditions. Since K and E do not satisfy E≥2 K -1, and also does not satisfy E≥2 E-K -1, therefore, the target polar code is decomposed. Specifically, it is decomposed into subcode #1 (16,2) and subcode #2 (16,10). For subcode #1, its code length is 16 and the number of information bits is 2. At this time, the code length E = 16 and the information bit length K = 2 in condition 1 or condition 2. Since subcode #1 satisfies condition 16 ≥ 2 2 -1, therefore, subcode #1 is replaced with code (16,2) obtained based on simplex code extension; for subcode #2, its code length is 16, the number of information bits is 10, the code length E = 16 and the information bit length K = 10 in condition 1 or condition 2. Since subcode #2 does not meet either condition, it is further decomposed into subcode #3 (8,3) and subcode #4 (8,7). Subcode #3 satisfies condition 8≥2. 3 -1, therefore subcode #3 is replaced with code (8,3) obtained based on simplex code extension; subcode #4 satisfies the condition 8≥2. 8-7 -1, therefore subcode #4 is replaced with code (8,7) obtained based on Hamming code extension. Thus, the target polar code (32,12) is finally decomposed into three subcodes, namely subcode #1 (16,2), subcode #3 (8,3) and subcode #4 (8,7), each of which satisfies one of the two conditions mentioned above.

[0120] Figure 10 shows a performance comparison between the scheme of Example 1 of this application and the Arikan core polar code. As can be seen from Figure 10, under the same signal-to-noise ratio (SNR), the block error rate (BLER) of the scheme of this application is lower than that of the Arikan core polar code, indicating that the decoding performance of the scheme of this application is superior.

[0121] Example 2

[0122] The target code length E = 24, and the number of information bits K = 8. The rate matching mode of the mother code is bit reverse shortening.

[0123] Figure 11 is a schematic diagram of the process of decomposing the target polar code into multiple first subcodes in Example 2. As shown in Figure 11, the code length of the target polar code is 24, and the information bit length is 8. The target code length of 24 and the information bit length of 8 do not satisfy either of the above two conditions, so the target polar code is decomposed to obtain subcode #1 (12,1) and subcode #2 (12,7). Since subcode #2 does not satisfy either of the above two conditions, subcode #2 is further decomposed into subcode #3 (6,2) and subcode #4 (6,5). Subcode #3 or subcode #4 satisfies one of the two conditions, therefore, the target polar code is decomposed into three subcodes, namely subcode #1 (12,1), subcode #3 (6,2), and subcode #4 (6,5), each of which satisfies one of the above two conditions.

[0124] Figure 12 shows a performance comparison between the scheme of Example 2 of this application and the polar code of the Arikan polar core. It can be seen that the decoding performance of the scheme of this application is better.

[0125] Example 3

[0126] The target code length E = 48, and the number of information bits K = 32. The rate matching mode of the mother code is based on puncturing in natural order.

[0127] Figure 13 is a schematic diagram illustrating the process of decomposing the target polar code into multiple first subcodes in Example 3. As shown in Figure 13, according to the technical solution provided in this application, the target polar code is finally decomposed into 5 subcodes, namely subcode #3(8,1), subcode #4(8,6), subcode #7(8,3), subcode #8(8,7), and subcode #6(16,15). In Example 3, the decomposition process can be referred to the detailed description in Example 1 or Example 2, and will not be repeated here.

[0128] Figure 14 shows a performance comparison between the scheme of Example 3 of this application and the polar code of the Arikan polar core. It can be seen that the decoding performance of the scheme of this application is better.

[0129] In Figures 10, 12, and 14, the curve marked "Scheme of this application" is the decoding performance curve of the scheme of this application, and the other curve is the decoding performance of Arikan core polar code.

[0130] As can be seen from the three examples above, when the number of information bits K and the target code length E do not satisfy E≥2 K -1, and does not satisfy E≥2 E-KWhen it is -1, the encoding device determines at least two first sub - matrices, and the at least two sub - matrices include the first sub - matrix (E1, K1) and / or the first sub - matrix (E2, K2), where K1 and E1 satisfy K2 and E2 satisfy K1 < K, E1 < E, K2 < K, E2 < E, and K1, K2, E1, and E2 are all positive integers. Among them, the first sub - matrix (E1, K1) is obtained by expanding based on the simplex code, and the second sub - matrix (E2, K2) is obtained by expanding based on the Hamming code.

[0131] It should be understood that the first sub - matrix (E1, K1) represents the sub - matrix corresponding to the code (E1, K1). Similarly, the first sub - matrix (E2, K2) represents the sub - matrix corresponding to the code (E2, K2).

[0132] The at least two first sub - matrices include the first sub - matrix (E1, K1), indicating that the target polar code is disassembled into at least two codes expanded based on the simplex code, that is, all the disassembled sub - codes are codes expanded based on the simplex code; or, the at least two first sub - matrices include the first sub - matrix (E2, K2), indicating that the target polar code is disassembled into at least two codes expanded based on the Hamming code, that is, all the disassembled sub - codes are codes expanded based on the Hamming code; or, the at least two first sub - matrices include the first sub - matrix (E1, K,1) and / or the first sub - matrix (E2, K2), indicating that the disassembled sub - codes include codes expanded based on the simplex code or the Hamming code.

[0133] In addition, when disassembling the target polar code, the disassembly result is not unique, and the disassembly results in the above three examples are only for illustration.

[0134] As an example, when disassembling the target polar code, specifically what type of sub - code the target polar code is disassembled into (here it refers to the specific length of the information bits and the code length of the sub - code) can be determined based on the reliability ranking of each bit position in the Arikan kernel polar code construction method and the rate - matching mode of the mother code. Generally speaking, according to the target code length E and the information - bit length K, and the rate - matching mode of the mother code, the lengths of the sub - codes E1 = 12 and E2 = 10 can be determined first, and then combined with the reliability sequence corresponding to the mother code and the information - bit length K, the information - bit lengths K1 and K2 of each sub - code can be determined.

[0135] As mentioned above, a polar code of length N can be considered as obtained by coupling two polar codes of length N / 2 before polarization; a polar code of length N / 2 can be considered as obtained by coupling two polar codes of length N / 4 before polarization, and so on. Therefore, for a target code of length E and information bit length K, it can be obtained by rate matching after coupling two sub-codes of length N / 2. When the rate matching model of the target code corresponding to the parent code is determined, the shortening positions and / or puncturing positions of the two sub-codes of length N / 2, as well as the number of information bits, can be determined, thus allowing it to be split into two corresponding sub-codes.

[0136] For example, if the target code length E = 22 and the information bit length K = 10, the corresponding mother code length is 32. Therefore, the mother code can be split into two sub-codes of length 16. The rate matching mode of the mother code is bit reverse shortening, and the shortening positions are determined to be 32, 16, 24, 8, 28, 12, 20, 4, 30, 18. After removing shortened positions from each 16-bit subcode, the remaining number of bits is the target length of each subcode. For example, two 16-bit subcodes are: Subcode #1 is [1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16], and Subcode #2 is [17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32]. The set of shortened positions in Subcode #1 is {16 8 12 4}, and the set of shortened positions in Subcode #2 is {32 24 28 20 30 18}. After removing shortened positions from Subcode #1 and Subcode #2, the remaining bits are [1 2 3 5 6 7 9 10 11 13 14 15] and [17 19 21 16], respectively. [22 23 25 26 27 29 31], with lengths of 12 and 10 respectively, thus we can determine that E1 = 12 and E2 = 10. Furthermore, given that the reliability sequence corresponding to the mother code of length 32 is [1 2 3 5 9 17 4 6 10 7 18 11 19 13 21 25 8 12 20 14 15 22 27 26 23 29 16 24 28 30 31 32], by pre-freezing (or deleting) and shortening the positions, the resulting sequence is [1 2 3 5 9 17 6 ​​10 7 11 19 13 21 25 14 15 22 27 26 23 29 31]. Reading the first 10 information bits of reliability from the end is 21 25 14 15 22 27 26 23 29. 31, thus the number of information bits in each subcode can be determined. For example, the number of information bits in subcode #1 is K1 = 2 (corresponding to the read bit positions 14 and 15), and the number of information bits in subcode #2 is K2 = 8 (corresponding to the read bit positions 21 25 22 27 26 23 29 31). Therefore, it can be determined that the target code is split into subcode #1 (12, 2) and subcode #2 (10, 8).

[0137] If subcodes #1 and #2 require further splitting, treat either subcode #1 or subcode #2 as a single target code and perform the above process. This process can be repeated to split the target code into multiple subcodes.

[0138] It is understandable that in Examples 2 and 3 above, the mother code length and the target code length are not equal, so rate matching is required.

[0139] When the length of the mother code and the length of the target code are equal, rate matching is not required, as in Example 1. In this case, during the splitting of the target code, based on the target code length E, the lengths of the sub-codes can be determined to be E / 2 (that is, half the length of the mother code N / 2), i.e., E1 = E2 = E / 2. Then, based on the reliability sequence corresponding to the mother code, K bit positions are read in descending order of reliability. According to the distribution of these K bit positions in the sub-code of length E / 2, the information bit lengths of the two sub-codes can be determined, i.e., K1 and K2 are determined.

[0140] For example, in Example 1, the target code length E = 32, and the number of information bits K = 12. We can determine that E1 = E2 = E / 2 = 16. Since the reliability sequence corresponding to the mother code with a code length of 32 is [1 2 3 5 9 17 4 6 10 7 18 11 19 13 21 25 8 12 20 14 15 22 27 26 23 29 16 24 28 30 31 32], without rate matching, based on the information bit length K = 12, we directly read the first 12 reliable positions from the reliability sequence, which are [15 22 27 26 23 29 16 24 28 30 31].

[32] , where bit positions 15 and 16 belong to the bit position index range 1 to 16, therefore, K1 = 2, and the remaining 10 bit positions belong to the bit position index range 17 to 32, therefore, K2 = 10. Thus, the target code can be split into subcode #1 (16, 2) and subcode #2 (16, 10).

[0141] The following section, using Example 1 as an example, details the process of gradually disassembling the target code based on the conditions given in this application for replacing it with Hamming code or simplex code.

[0142] In Example 1 above, the target code length E = 32, and the information bit length K = 12. The information bits are numbered 15, 16, 22, 23, 24, 26, 27, 28, 29, 30, 31, and 32. Since K and E do not satisfy E ≥ 2... K -1, and also does not satisfy E≥2 E-K-1. Therefore, the target polar code is decomposed into two polar codes of length 16 that can be coupled into the target polar code. That is, the upper half of the target polar code is a subcode consisting of bits 1 to 16, and the lower half is a subcode consisting of bits 17 to 32. The number of information bits in each subcode is the number of information bits in the target polar code in that sub-block. The target polar code has 2 information bits in bits 1 to 16 and 10 information bits in bits 17 to 32. Therefore, the target polar code is decomposed into subcode #1(16,2) and subcode #2(16,10). For subcode #1, its code length is 16 and the number of information bits is 2. Since subcode #1 satisfies the condition 16≥2... 2 -1, therefore, subcode #1 is replaced with code (16,2) obtained based on simplex code extension; for subcode #2, its code length is 16, the number of information bits is 10, the code length E = 16 and the information bit length K = 10 in condition 1 or condition 2. Since subcode #2 does not meet either condition, similarly, subcode #2 is decomposed into two polar codes of length 8 that can be coupled into the target polar code, that is, the upper half branch of subcode #2 is the subcode composed of the 17th to 24th bits of the target polar code, and the lower half branch is the subcode composed of the 25th to 32nd bits of the target polar code, and the number of information bits in each subcode is the number of information bits of the target polar code in that sub-block. Subcode #2 has 3 information bits in the 17th to 24th bits and 7 information bits in the 25th to 32nd bits, therefore it is decomposed into subcode #3 (8,3) and subcode #4 (8,7). Target polarization code #3 satisfies condition 8≥2 3 -1, therefore subcode #3 is replaced with code (8,3) obtained based on simplex code extension; subcode #4 satisfies the condition 8≥2. 8-7 -1, therefore subcode #4 is replaced with code (8,7) obtained based on Hamming code extension. Thus, the target polar code (32,12) is finally decomposed into three subcodes, namely subcode #1 (16,2), subcode #3 (8,3) and subcode #4 (8,7), each of which satisfies one of the two conditions mentioned above.

[0143] The process of decomposing the subcode is similar to that in Example 1, and will not be described in detail here.

[0144] S630, The encoding device performs encoding based on the at least one first sub-matrix to obtain an encoded sequence.

[0145] After obtaining at least two first sub-matrices, the sequence to be encoded is encoded based on these at least two first sub-matrices to obtain the encoded sequence. As described above, when the code length of the target code and the length of the information bits satisfy one of two conditions, a first sub-matrix is ​​determined, and this first sub-matrix can be obtained by extending a simplex code or a Hamming code; when neither of the two conditions is satisfied, the target code is decomposed into at least two first sub-matrices. Optionally, the encoding device obtains at least two second sub-matrices that correspond one-to-one with the at least two first sub-matrices, and performs encoding based on these at least two second sub-matrices.

[0146] In one example, assuming there are *s* second submatrices, the sequence to be encoded is divided into *s* sub-blocks based on the size of these *s* second submatrices. These *s* sub-blocks are then encoded using the *s* second submatrices to obtain *s* encoded sub-blocks. Each of the *s* encoded sub-blocks corresponds one-to-one with one of the *s* second submatrices (i.e., one-to-one with one of the *s* first submatrices), and each encoded sub-block is obtained by encoding the corresponding sub-block within the *s* sub-blocks using one of the second submatrices. Finally, the *s* encoded sub-blocks are coupled together to obtain the final encoded sequence.

[0147] remember Let s be the s second submatrices obtained. The sequence to be encoded, u, is divided into s sub-blocks according to the size of the second sub-matrix. The length is As explained above regarding the first and second submatrices, at least two second submatrices are obtained based on at least two first submatrices. For any one of these at least two second submatrices, it may be the first submatric itself (i.e., the first submatric does not need to be expanded), or it may be obtained by expanding the corresponding first submatric (i.e., the size of the first submatric is itself a power of 2 and expanded to a larger power of 2, or the size of the first submatric is not itself a power of 2 and expanded to a power of 2). In this case, the size of the second submatric is greater than the size of the first submatric. Assuming the target code length is E, the number of information bits (or the length of the information bits) is K, the sum of the lengths of the information bits of the subcodes corresponding to the at least two first submatrices is K, and the sum of the code lengths of the subcodes corresponding to the at least two first submatrices is E. The sum of the lengths of the information bits of the subcodes corresponding to the at least two second submatrices is K, and the sum of the code lengths of the subcodes corresponding to the at least two second submatrices may be greater than E.

[0148] First calculate the coded sub-blocks during encoding. Thus constructing the sequence of coded sub-blocks Search for the two shortest adjacent coded sub-blocks sequentially from front to back. and By coupling, a coupled coded sub-block is obtained. Will and Remove from the sequence and add the coupled coded sub-block v to the sequence, or in other words, replace the coded sub-block with the coupled coded sub-block v. and This process continues until the final coupled coded sub-block is obtained. This final coupled coded sub-block, after rate matching, becomes the final coded sequence (or codeword). The two coupled sub-blocks are of equal length. Coupling two adjacent coded sub-blocks involves a bitwise XOR operation.

[0149] In another example, assuming there are s second submatrices, these s second submatrices are coupled to obtain a third matrix. The sequence to be encoded, u, is then encoded based on the coupled third matrix, and after rate matching, a encoded sequence with a target code length of E is obtained.

[0150] Remember G N The encoding matrix of an Arikan polar code with a mother code length of N is shown below. In the technical solution provided in this application, the encoding matrix of the polar code based on a non-regular kernel is as follows:

[0151] in, Indicates length is Arikan polarization nuclei, Indicates length is The Arikan polarization nucleus, and so on.

[0152] In one possible scenario, among the at least two first submatrices, there might be a first submatrix whose size is not a power of 2. In this case, the first submatrix whose size is not a power of 2 is expanded to a matrix whose size is a power of 2. For example, in Example 2, the size of the first submatrix corresponding to subcode #1 is 12, which is not a power of 2, so its size is expanded to 16.

[0153] Alternatively, in another possible scenario, the first submatrix with a size that is a power of 2 may also need to be expanded, specifically by expanding its size to a larger power of 2. For example, in Example 3, the size of the first submatrix corresponding to subcode #1 is 16, which is a power of 2. However, when coupling it with the first submatrix corresponding to subcode #2, the size of the first submatrix corresponding to subcode #1 needs to be expanded from 16 to 32, making it the same size as the first submatrix corresponding to subcode #2, before coupling.

[0154] Therefore, in S630, encoding based on at least two first sub-matrices can be achieved by first obtaining at least two second sub-matrices that correspond one-to-one with the at least two first sub-matrices. These at least two first sub-matrices are obtained by decomposing the target polar code through t layers, where t is a positive integer. These at least two second sub-matrices include a second sub-matrice #a, which is obtained by extending the at least two first sub-matrices #a. The size of the second sub-matrice #a is related to the length N of the mother code corresponding to the target polar code and the number of decomposition layers corresponding to the first sub-matrice #a.

[0155] If one of the at least two first submatrices does not need to be expanded—for example, if it does not fall under either of the two cases requiring expansion mentioned above—then the corresponding second submatrix can be the first submatrix itself. When a first submatrix falls under the case requiring expansion to a power of 2, or to a larger power of 2, the corresponding second submatrix is ​​obtained by expanding the first submatrix. Therefore, first submatrix #a refers to the first submatrix among the at least two first submatrices that needs to be expanded; the second submatrix obtained by expanding first submatrix #a is the second submatrix #a.

[0156] Referring to Example 3 above, let's explain the number of decomposition layers. As shown in Figure 13, the target code length E = 48, and its corresponding mother code length N = 2. m =64, then the subcode #1 corresponds to a decomposition layer of 1. When the first submatrix corresponding to the subcode of this layer is expanded, the expanded size is 2. m-1 Taking the submatrix #a as an example, submatrix #a corresponds to a decomposition level of 1. Therefore, the size of the second submatrix corresponding to submatrix #a is 2. m-1 =2 6-1 =32. For example, when the decomposition layer has 2 layers, if the first submatrix corresponding to the subcode of that layer needs to be expanded, its expanded size is 2. m-2 =2 6-2 =16; and so on, when the number of decomposition layers is 3, if the first submatrix corresponding to the subcode of that layer needs to be expanded, its expanded size is 2. m-2 =2 6-3 =8.

[0157] As can be seen from the above explanation of Example 3, since the first submatrix corresponding to subcode #3, subcode #4 and subcode #6 does not need to be expanded when the number of decomposition layers is 2, and the first submatrix corresponding to subcode #7 and subcode #8 does not need to be expanded when the number of decomposition layers is 3, the size of the first submatrix corresponding to subcode #1 is only expanded from 16 to 32.

[0158] When expanding the first submatrix #a to the second submatrix #a, the expansion can be performed as follows:

[0159] The second submatrix #a satisfies the following characteristics:

[0160] The first position set of the second submatrix #a corresponds to the identity matrix. The first position set includes the row index of the row corresponding to the punch position or shortened position of the second submatrix #a, and the position corresponding to the column index of the column corresponding to the punch position or shortened position of the second submatrix #a.

[0161] The elements in the second position set of the second submatrix #a are 0. The second position set includes the row index of the row corresponding to the non-punched or non-shortened position of the second submatrix #a, and the position corresponding to the column index of the column corresponding to the punched or shortened position of the second submatrix #a.

[0162] The elements in the third position set of the second submatrix #a are 0. The third position set includes the row index of the row corresponding to the punched or shortened position of the second submatrix #a, and the column index of the column corresponding to the non-punched or non-shortened position of the second submatrix #a; and...

[0163] The fourth position set of the second submatrix #a corresponds to the first submatrix. The fourth position set includes the row index of the row corresponding to the non-punched or non-shortened position of the second submatrix #a, and the position corresponding to the column index of the column corresponding to the non-punched or non-shortened position of the second submatrix #a.

[0164] As an example, suppose the size of the first submatrix #a is 6*6, and it looks like this:

[0165] Figure 15 shows an example of the first submatrix #a. The information bits in rows 3, 5, and 6 of the first submatrix #a are shown in bold italics in Figure 15. The dashed lines in Figure 15 are only drawn for easy comparison with the expanded second submatrix #a.

[0166] Suppose that the first submatrix #a needs to be expanded into a second submatrix #a of size 8*8. The rate matching mode of the mother code corresponding to the size of the second submatrix #a is shortening, and the shortening bits are 4 and 8. Then the first submatrix #a is expanded into the following second submatrix #a of size 8*8:

[0167] Figure 16 shows an example of the second submatrix #a, which is the expanded version of the first submatrix #a in Figure 15. Referring to Figure 16, because the shortened positions are 4 and 8, according to the expansion rules mentioned above: 1) The positions corresponding to the 4th row and 4th column, the 4th row and 8th column, the 8th row and 4th column, and the 8th row and 8th column correspond to an identity matrix of size 2*2 (determined by subtracting the size of the first submatrix #a from the size of the second submatrix #a); these four positions constitute the first position set mentioned above. 2) In the elements of the 4th column, except for the elements in the 4th row and 8th row, and in the elements of the 8th column, except for the elements in the 4th and 8th rows, all positions are 0. These positions are the second set of positions mentioned above; 3) The positions in the 4th row except for the elements in the 4th and 8th columns, and the positions in the 8th row except for the elements in the 4th and 8th columns, are all 0. These positions are the third set of positions mentioned above; 4) The remaining positions in the second submatrix #a of size 8*8 constitute the fourth set of positions, corresponding to the first submatrix #a, that is, the elements in the first submatrix #a are kept unchanged.

[0168] Optionally, it also includes the S640.

[0169] S640, the encoding device outputs the encoded sequence.

[0170] According to the technical solution of this application, the code length E≥2 l -1. Replace the polar code outer code with 1 information bits with an outer code based on simplex code extension, and make the code length E≥2. l -1. The outer code of the polar code with the number of information bits El is replaced with the outer code based on the Hamming code extension, so that non-regular core polar codes with arbitrary code length and information bit length can be constructed. Compared with Arikan core polar codes and other non-regular core polar codes, the decoding performance is better.

[0171] In addition, this application also provides a decoding method. The decoding method may include the following steps S710 to S740.

[0172] S710, the number of information bits K acquired by the decoding device and the target code length E.

[0173] S720, the decoding device determines at least one first sub-matrix based on the number of information bits K and the target code length E, wherein each of the at least one first sub-matrix is ​​obtained based on Hamming code or simplex code extension.

[0174] S710 to S720 can be referred to the aforementioned steps S610 to S620, and will not be repeated here.

[0175] S730, the decoding device performs decoding based on the at least one first submatrix to obtain a decoding sequence.

[0176] The decoding device can perform decoding based on the SC decoding algorithm, as shown in Figure 2. Alternatively, other decoding algorithms can be used, such as the successive cancellation list (SCL) or belief propagation (BP), etc., which are not limited in this application.

[0177] Taking the SC decoding algorithm as an example, the decoding device uses the same method as the encoding device to obtain at least two first sub-matrices, and then decodes the information to be decoded based on the at least two first sub-matrices to obtain the decoding sequence.

[0178] In this embodiment, the target polar code is decomposed into at least two sub-codes, and then decoded based on at least two first sub-matrices corresponding to these at least two sub-codes (some of the first sub-matrices may need to be expanded, ultimately corresponding to at least two second sub-matrices). Since the construction of these at least two first sub-matrices differs from the core of the Arikan core polar code, the bit positions corresponding to the inputs of nodes f and g are different, as shown in Figure 2 during the SC decoding process, and the corresponding outputs are also different. Apart from this, the principle and process of the SC decoding algorithm are the same as those of the Arikan core polar code SC decoding algorithm. Therefore, based on the technical solution of this application, after determining at least two first sub-matrices, the decoding process of the decoding device is well known to those skilled in the art and will not be described in detail.

[0179] Optionally, it also includes the S740.

[0180] S740, the decoding device outputs the decoding sequence.

[0181] In the technical solution of this application, the target code with arbitrary code length and information bit length can be decomposed into at least one sub-code, and each sub-code can be obtained by extending a simplex code or a Hamming code, thereby constructing a non-regular kernel polar code with arbitrary code length and information bit length.

[0182] The above provides a detailed description of the encoding or decoding methods provided in this application. The following describes the communication device provided in this application.

[0183] It should be understood that the description of the device embodiment corresponds to the description of the method embodiment. Therefore, for any content not described in detail, please refer to the method embodiment above. For the sake of brevity, some content will not be repeated.

[0184] To achieve the functions of the encoding or decoding device in the embodiments of this application, the encoding or decoding device can be implemented through hardware structure, software module, or a combination of hardware structure and software module. No limitation is made. For ease of description, the encoding device and decoding device will be collectively referred to as communication device.

[0185] Figure 17 is a schematic structural diagram of a communication device provided in this application. As shown in Figure 17, the communication device 1000 includes a processing module 1001 and a communication module 1002. The communication device 1000 can be a communication device, or a device applied to a communication device and capable of realizing the corresponding functions of the communication device, such as a chip, chip system, or circuit. Exemplarily, the communication device can be an encoding device or a decoding device as described in the method embodiment.

[0186] The communication module can also be a transceiver module, transceiver, transceiver device, or transceiver apparatus. The processing module can also be a processor, processing board, processing unit, or processing apparatus. Optionally, the communication module is used to perform the sending (or output) operation or receiving (or input) operation of the encoding or decoding device in any of the method embodiments. The device in the communication module that implements the receiving function can be considered a receiving unit, and the device in the communication module that implements the sending function can be considered a sending unit; that is, the communication module includes a receiving unit and a sending unit. The processing module is used to perform the relevant operations / processing implemented internally by the encoding or decoding device in any of the method embodiments.

[0187] For example, if the communication device 1000 corresponds to the encoding device, the processing module 1001 is used to obtain at least two first sub-matrices, obtain at least two second sub-matrices that correspond one-to-one with the at least two first sub-matrices, and encode based on the at least two second sub-matrices to obtain an encoded sequence; the communication module 1002 can also be used to output the encoded sequence.

[0188] For example, if the communication device 1000 corresponds to the decoding device, the processing module 1001 is used to obtain at least two first sub-matrices, obtain at least two second sub-matrices that correspond one-to-one with the at least two first sub-matrices, and perform decoding based on the at least two second sub-matrices to obtain a decoding sequence; the communication module 1002 can also be used to output the decoding sequence.

[0189] Alternatively, the communication module and / or processing module can be implemented as virtual modules. For example, the processing module can be implemented as a software functional unit or a virtual device, and the communication module can be implemented as a software function or a virtual device. Alternatively, the processing module or communication module can also be implemented as a physical device. For example, the encoding or decoding device can be a chip, such as a system-on-chip (SoC) or hardware circuit. The communication module can be an input / output circuit and / or a communication interface, performing input and output operations; the processing module can be an integrated circuit or logic circuit, etc.

[0190] The module division in this application is illustrative and represents only one logical functional division. In actual implementation, other division methods are possible. Furthermore, the functional modules in the various examples of this application can be integrated into one module, exist as separate physical entities, or be integrated into one module. The integrated modules described above can be implemented in hardware, as software functional modules, or as a combination of hardware and software functional modules; no limitation is imposed.

[0191] As an example, the communication device 1000 can implement the corresponding software in hardware.

[0192] In another embodiment, the communication device 1000 can also be implemented in hardware.

[0193] Figure 18 is a schematic structural diagram of another communication device provided in this application. The communication device 1100 can be used to implement the communication method described in any of the foregoing method embodiments, specifically an encoding method or a decoding method. The communication device 1100 may include at least one processor 1110. Optionally, the processor 1110 (or processing device) is coupled to a memory, which may be located within the decoding device, or integrated with the processor, or located outside the decoding device. For example, the decoding device 1100 may also include at least one memory 1120. The memory 1120 stores computer programs, instructions, or data necessary for implementing any of the foregoing method embodiments; the processor 1110 may execute the computer programs, instructions, or data stored in the memory 1120 to perform the corresponding functions of the encoding or decoding device in any of the foregoing embodiments.

[0194] Optionally, the decoding device 1100 may further include a communication interface 1130, through which the communication device 1100 can interact with other devices. For example, the communication interface 1130 may be a transceiver, circuit, bus, module, pin, or other type of communication interface. When the decoding device 1100 is a chip or circuit, the communication interface 1130 may also be an input / output circuit, capable of inputting information (or receiving information) and / or outputting information (or sending information). The processor may be an integrated circuit or logic circuit, etc., and the processor can determine the output information based on the input information.

[0195] The coupling in this application refers to indirect coupling or communication connection between devices, units, or modules, which can be electrical, mechanical, or other forms, used for information exchange between devices, units, or modules. The processor 1110 may operate in conjunction with the memory 1120 and the communication interface 1130. This application does not limit the connection medium between the processor 1110, the memory 1120, and the communication interface 1130.

[0196] Figure 19 is a schematic structural diagram of the chip provided in this application. Chip 30 includes a processing circuit 31 and a communication circuit 32. The processing circuit 31 can be a logic circuit, integrated circuit, etc., and the communication circuit 32 can be an input / output circuit, input / output interface, interface circuit, etc., which can input information (or receive information) or output information (or send information). Chip 30 can execute the methods executed by the encoding device or decoding device in the various embodiments of this application. The processing circuit 31 can be one or more processors, or all or part of the circuits in one or more processors used for control or processing. Optionally, the functions on the encoding side or decoding side can be deployed in different parts of the chip.

[0197] In addition, this application also provides a computer-readable storage medium storing computer instructions that, when executed on a computer, cause operations and / or processes performed by an encoding or decoding device in the various method embodiments of this application to be executed.

[0198] This application also provides a computer program product, which includes computer program code or instructions. When the computer program code or instructions are run on a computer, the operations and / or processes performed by the encoding or decoding device in the various method embodiments of this application are executed.

[0199] Furthermore, this application also provides a chip including a processor. A memory for storing a computer program is provided independently of the chip, and the processor is used to execute the computer program stored in the memory, so that the operations and / or processes performed by the decoding device in any method embodiment are executed. Further, the chip may also include a communication interface. The communication interface may be an input / output interface or an interface circuit, etc. Further, the chip may also include a memory storing code and / or instructions required for the chip to execute the encoding and / or decoding methods of this application.

[0200] This application provides a communication system including the encoding device and decoding device described in the above method embodiments. As an example, one of the encoding device and the decoding device may be a terminal device, and the other may be a network device.

[0201] The processor in this application embodiment has signal processing capabilities and can be a central processing unit (CPU), or a general-purpose processor, digital signal processor (DSP), application-specific integrated circuit (ASIC), field-programmable gate array (FPGA), or other programmable logic device, discrete gate or transistor logic device, or discrete hardware component. It can implement or execute the methods, steps, and logic block diagrams disclosed in this application. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the methods disclosed in this application can be directly embodied in the execution of the hardware processor, or executed by a combination of hardware and software modules within the processor. The software modules can reside in random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, or other mature storage media in the art. This storage medium is located in memory; the processor reads information from the memory and, in conjunction with its hardware, completes the steps of the above methods.

[0202] In the embodiments of this application, the memory can be volatile memory or non-volatile memory, or it can include both volatile and non-volatile memory. The non-volatile memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. The volatile memory can be random access memory (RAM), which is used as an external cache. By way of example, but not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous linked dynamic random access memory (SLDRAM), and direct rambus RAM (DR RAM). The memory of the systems and methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0203] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0204] Those skilled in the art will understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0205] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0206] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0207] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0208] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, ROM, RAM, magnetic disks, or optical disks.

[0209] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. An encoding method, characterized in that, Comprising: Obtaining the number K of information bits and the target code length E; Based on the number K of the information bits and the target code length E, determining at least one first sub-matrix, where each first sub-matrix in the at least one first sub-matrix is obtained by expanding based on a Hamming code or a simplex code; And, Encoding based on the at least one first sub-matrix to obtain an encoded sequence.

2. A decoding method, characterized in that, Comprising: Obtaining the number K of information bits and the target code length E; Based on the number K of the information bits and the target code length E, determining at least one first sub-matrix, where each first sub-matrix in the at least one first sub-matrix is obtained by expanding based on a Hamming code or a simplex code; And Decoding based on the at least one first sub-matrix to obtain a decoded sequence.

3. The method according to claim 1 or 2, characterized in that, The determining of at least one first sub-matrix of the polar code based on the number K of the information bits and the target code length E includes: When K and E satisfy E≥2 K -1, determine a first submatrix, said first submatrix being (E, K) and obtained based on the simplex code extension; or, When K and E satisfy E≥2 E-K -1, determine a first submatrix, the first submatrix being (E, K) and obtained based on the Hamming code extension.

4. The method according to claim 1 or 2, characterized in that, The determining of at least one first sub-matrix of the polar code based on the number K of the information bits and the target code length E includes: When K and E do not satisfy E≥2 K -1, and does not satisfy E≥2 E-K -1, determine at least two first submatrices, the at least two first submatrices including first submatrices (E1, K1) and / or first submatrices (E2, K2), K1 and E1 satisfying K2 and E2 satisfy K1 < K, E1 < E, K2 < K, E2 < E, and K1, K2, E1, and E2 are all positive integers.

5. The method according to claim 4, characterized in that, The first sub-matrix (E1, K1) is obtained by expanding based on the simplex code, and the first sub-matrix (E2, K2) is obtained by expanding based on the Hamming code.

6. The method according to claim 4 or 5, characterized in that, The determining of at least one first sub-matrix based on the number K of the information bits and the target code length E includes: Based on the number K of the information bits, the target code length E, and the length N of the mother code corresponding to the target code length E, disassembling the target polar code to obtain the at least two first sub-matrices.

7. The method according to any one of claims 4-6, characterized in that, The obtaining of the encoded sequence by encoding based on the at least one first sub-matrix includes: Based on the at least two first sub-matrices, obtaining at least two second sub-matrices, where the at least two second sub-matrices correspond to the at least two first sub-matrices one by one. The at least two first sub-matrices are obtained by disassembling the target polar code through t layers. The second sub-matrix #a in the at least two second sub-matrices is obtained by expanding the first sub-matrix #a in the at least two first sub-matrices, and the size of the second sub-matrix #a is determined based on the length of the mother code corresponding to the target polar code and the disassembling layer number corresponding to the first sub-matrix #a. t is a positive integer; Encoding based on the at least two second sub-matrices to obtain the encoded sequence.

8. The method according to claim 7, characterized in that, The obtaining of the encoded sequence by encoding based on the at least two second sub-matrices includes: Coupling the at least two second sub-matrices to obtain a third matrix; and Encoding based on the third matrix to obtain the encoded sequence.

9. The method according to claim 7, characterized in that, The obtaining of the encoded sequence by encoding based on the at least two second sub-matrices includes: Based on at least two second sub-matrices, encoding at least two sub-blocks of the sequence to be encoded to obtain at least two encoded sub-blocks. The at least two sub-blocks are obtained by splitting the sequence to be encoded based on the sizes of the at least two second sub-matrices; and, Coupling the at least two encoded sub-blocks to obtain the encoded sequence.

10. The method according to claim 9, characterized in that, The coupling of the at least two coded sub-blocks to obtain the coded sequence includes: In accordance with the order of the at least two coded sub-blocks from front to back, the two coded sub-blocks with the shortest length are coupled sequentially to obtain a coupled coded sub-block. After replacing the two coded sub-blocks with the coupled coded sub-block, the next coupling is performed. The encoded sequence is obtained based on the encoded sub-blocks obtained from the last coupling.

11. A communication device, characterized in that, Includes a processor, the processor being configured to cause the communication device to perform the method as described in any one of claims 1, 3 to 10, or to perform the method as described in any one of claims 2 to 10, via logic circuitry and / or by executing a computer program.

12. The communication device according to claim 11, characterized in that, It also includes a communication interface for inputting and / or outputting signals.

13. The communication device according to claim 11 or 12, characterized in that, It also includes a memory for storing the computer program.

14. A communication device, characterized in that, It includes modules or units for performing the method as described in any one of claims 1, 3 to 10, or it includes modules or units for performing the method as described in any one of claims 2 to 10.

15. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions that, when executed on a computer, implement the method as described in any one of claims 1-10.

16. A computer program product, characterized in that, Includes a computer program or instructions for performing the method as described in any one of claims 1-10.

17. A communication system, characterized in that, The method includes a communication device for performing the method as described in any one of claims 1, 3 to 10, and a communication device for performing the method as described in any one of claims 2 to 10.

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