Memory compression method and apparatus, electronic device, storage medium, and program product
By writing memory pages into a FIFO and establishing a data channel between kernel and user modes when compression is detected, and using non-CPU computing units such as GPUs for compression, the problem of high CPU load and low memory page compression efficiency in existing technologies is solved, achieving more efficient memory management.
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- VIVO MOBILE COMM CO LTD
- Filing Date
- 2026-01-15
- Publication Date
- 2026-07-30
AI Technical Summary
In existing technologies, computing units such as GPUs lack effective memory compression mechanisms, resulting in high CPU load and low memory page compression efficiency.
When a memory page is detected that needs to be compressed, it is written into a FIFO and a data channel is established between kernel mode and user mode. In user mode, the memory page is read through the data channel and the compression operation is performed, utilizing non-CPU computing units such as GPUs for compression.
It improves memory page compression efficiency, reduces CPU load, enhances the smoothness of electronic device operation, and reduces power consumption.
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Figure CN2026072868_30072026_PF_FP_ABST
Abstract
Description
Memory compression methods, devices, electronic equipment, storage media, and software products
[0001] Cross-reference to related applications
[0002] This application claims priority to Chinese Patent Application No. 202510095119.X, filed in China on January 21, 2025, the entire contents of which are incorporated herein by reference. Technical Field
[0003] This application belongs to the field of electronic technology, specifically relating to a memory compression method, apparatus, electronic device, storage medium, and program product. Background Technology
[0004] With the development of technology, the complexity of applications and services in electronic devices is constantly increasing, making the management and optimization of memory resources in electronic devices increasingly important.
[0005] Currently, the compression of anonymous pages via zram is performed in kernel mode, while custom functions of computing units such as GPUs need to be implemented in user mode. In other words, although computing units like GPUs have compression capabilities, they lack an effective compression mechanism. Therefore, GPUs and other computing units struggle to reduce the CPU's load, resulting in low efficiency for electronic devices using existing compression methods to compress memory pages, and high CPU load. Summary of the Invention
[0006] The purpose of this application is to provide a memory compression method, apparatus, electronic device, storage medium, and program product that can improve the efficiency of electronic devices in compressing memory pages and reduce the CPU load.
[0007] In a first aspect, embodiments of this application provide a memory compression method, which includes: when a memory page that needs to be compressed is detected in the kernel mode, writing the memory page into a First In First Out (FIFO) array; establishing a data channel between the kernel mode and the user mode; and reading the memory page in the FIFO through the data channel in the user mode and performing a compression operation on the memory page.
[0008] Secondly, embodiments of this application provide a memory compression device, which includes a writing module and an execution module. The writing module is used to write memory pages that need to be compressed into a FIFO when the presence of such pages in kernel mode is detected. The execution module is used to establish a data channel between kernel mode and user mode. The execution module is also used to read memory pages written to the FIFO by the writing module in user mode via the data channel and perform compression operations on the memory pages.
[0009] Thirdly, embodiments of this application provide an electronic device including a processor and a memory, the memory storing programs or instructions executable on the processor, the programs or instructions, when executed by the processor, implementing the steps of the method described in the first aspect.
[0010] Fourthly, embodiments of this application provide a readable storage medium on which a program or instructions are stored, which, when executed by a processor, implement the steps of the method described in the first aspect.
[0011] Fifthly, embodiments of this application provide a chip, the chip including a processor and a communication interface, the communication interface being coupled to the processor, the processor being used to run programs or instructions to implement the method as described in the first aspect.
[0012] In a sixth aspect, embodiments of this application provide a computer program product stored in a storage medium, which is executed by at least one processor to implement the method described in the first aspect.
[0013] In this embodiment, when a memory page requiring compression is detected in the kernel mode, the memory page is written into a FIFO. Then, a data channel is established between the kernel mode and user mode. In user mode, the memory page in the FIFO is read through the data channel, and compression is performed on the memory page. In this solution, since the memory page is first written into the FIFO when compression is determined, and a data channel is established between the kernel mode and user mode, the memory page written to the FIFO by the kernel mode can be read directly in user mode. Therefore, non-CPU computing units such as GPUs can perform compression operations on the memory pages in the kernel mode in user mode, thereby improving the efficiency of memory page compression in electronic devices and reducing the CPU load. Attached Figure Description
[0014] Figure 1 is a flowchart of one of the memory compression methods provided in the embodiments of this application;
[0015] Figure 2 is a schematic diagram of the user mode and kernel mode provided in the embodiments of this application;
[0016] Figure 3 is a second flowchart of the memory compression method provided in the embodiment of this application;
[0017] Figure 4 is a schematic diagram of establishing a data channel provided in an embodiment of this application;
[0018] Figure 5 is a flowchart of the memory compression method provided in the embodiment of this application;
[0019] Figure 6 is a flowchart of the memory compression method provided in the embodiment of this application;
[0020] Figure 7 is a flowchart of the memory compression method provided in the embodiment of this application;
[0021] Figure 8 is a flowchart of the memory compression method provided in the embodiment of this application;
[0022] Figure 9 is a flowchart of the memory compression method provided in the embodiment of this application;
[0023] Figure 10 is the eighth flowchart of the memory compression method provided in the embodiment of this application;
[0024] Figure 11 is a schematic diagram of the execution process of the audio playback method provided in the embodiment of this application;
[0025] Figure 12 is a schematic diagram of a memory compression device provided in an embodiment of this application;
[0026] Figure 13 is a schematic diagram of the structure of the electronic device provided in an embodiment of this application;
[0027] Figure 14 is a schematic diagram of the hardware structure of the electronic device provided in an embodiment of this application. Detailed Implementation
[0028] The technical solutions of the embodiments of this application will be clearly described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. All other embodiments obtained by those skilled in the art based on the embodiments of this application are within the scope of protection of this application.
[0029] The terms "first," "second," etc., used in the specification and claims of this application are used to distinguish similar objects and not to describe a specific order or sequence. It should be understood that such use of data can be interchanged where appropriate so that embodiments of this application can be implemented in orders other than those illustrated or described herein, and the objects distinguished by "first," "second," etc., are generally of the same class and the number of objects is not limited; for example, a first object can be one or more. Furthermore, in the specification and claims, "and / or" indicates at least one of the connected objects, and the character " / " generally indicates that the preceding and following objects are in an "or" relationship.
[0030] The terms "at least one," "at least one," etc., in this application refer to any one, any two, or a combination of two or more of the included objects. For example, at least one of a, b, and c can mean: "a," "b," "c," "a and b," "a and c," "b and c," and "a, b, and c," where a, b, and c can be single or multiple. Similarly, "at least two" refers to two or more, and its meaning is similar to that of "at least one."
[0031] The memory compression method, apparatus, electronic device, storage medium, and program product provided in this application will be described in detail below with reference to the accompanying drawings and through specific embodiments and application scenarios.
[0032] The embodiments of this application can be applied to scenarios where memory pages are compressed in user space using computing units such as GPUs or NPUs.
[0033] The memory compression method provided in this application will be illustrated below using some specific scenarios as examples.
[0034] Scenario 1: Suppose an electronic device is performing intensive multitasking, such as running multiple applications simultaneously. In this case, the device's memory space will be heavily consumed. The electronic device can automatically detect the increase in memory usage and add anonymous pages to the FIFO (First-In, First-Out). By establishing a data channel, computing units such as the GPU or NPU can asynchronously compress the anonymous pages in the FIFO, thereby freeing up memory space and improving the smoothness of the electronic device's operation.
[0035] Scenario 2: When a user plays a large game on an electronic device, the game generates a large amount of temporary memory data, occupying the device's memory space. The electronic device can add this temporary memory data to a FIFO (First-In, First-Out) during game runtime. By establishing a data channel, the GPU or NPU (Neural Processing Unit) can asynchronously compress this temporary memory data in the FIFO, avoiding CPU compression and reducing CPU usage during game execution. This reduces power consumption and heat generation, improving the smoothness of the device's operation.
[0036] It should be noted that the above scenarios 1 and 2 are merely exemplary examples of some scenarios that may be applied to the embodiments of this application. In actual implementation, the embodiments of this application can also be applied to more scenarios that require memory compression. The embodiments of this application are not limited here.
[0037] This application provides a memory compression method, apparatus, electronic device, storage medium, and program product. When the electronic device determines that a memory page needs to be compressed, it can first write the memory page into a FIFO. Then, the electronic device can establish a data channel between kernel mode and user mode, enabling it to read the memory page written to the FIFO by the kernel mode in user mode through this data channel. In other words, the electronic device can directly read the memory page in kernel mode in user mode. Therefore, the electronic device can perform compression operations on the memory page in kernel mode in user mode through non-CPU computing units such as GPUs, thereby improving the efficiency of memory page compression and reducing the CPU load.
[0038] The execution subject of the memory compression method provided in this application embodiment can be a memory compression device, which can be an electronic device, or a functional module or functional entity in the electronic device. The following uses an electronic device as an example to illustrate the technical solution provided in this application embodiment.
[0039] Figure 1 shows a flowchart of a memory compression method provided in an embodiment of this application. As shown in Figure 1, the memory compression method provided in this embodiment of the application may include the following steps 201 to 203.
[0040] Step 201: If a memory page that needs to be compressed is detected in the kernel mode, the electronic device writes the memory page into the FIFO.
[0041] It should be noted that the kernel mode mentioned above refers to the privilege level that the operating system kernel can execute. In kernel mode, computing units can directly access hardware resources and system memory, and perform various system-level operations. Computing units in kernel mode (such as the CPU) can directly compress memory pages within kernel mode. In contrast, user mode has restricted permissions and cannot directly access hardware and system resources. Therefore, computing units in user mode (such as the GPU) cannot directly compress memory pages within kernel mode.
[0042] Optionally, in this embodiment of the application, to avoid asynchronous compression blocking the normal flow of other processes, the memory compression method provided in this embodiment defines a new asynchronous garbage collection process aswapd (async swapd daemon). Anonymous pages collected by aswapd can be added to the asynchronous compression process. aswapd can be triggered by polling or based on the memory waterline, that is, to determine whether memory pages need to be asynchronously compressed. The specific triggering conditions can be formulated based on the actual needs of the product.
[0043] For example, suppose aswapd is based on polling triggering, meaning the electronic device uses polling to determine whether to perform asynchronous compression. Assume the polling interval is 5 seconds, meaning the electronic device checks the available memory every 5 seconds. If the available memory is below a preset threshold, such as 1 gigabyte (GB), during a check, the electronic device determines that the memory pages need asynchronous compression, and thus performs asynchronous compression to free up memory.
[0044] For example, suppose aswapd is triggered based on the memory watermark, meaning the electronic device determines whether to perform asynchronous compaction operations based on the memory watermark. Assuming the memory watermark is 2GB, when available memory is less than 2GB, the electronic device determines that available memory is insufficient. The electronic device can wake up aswapd in response to changes in memory state through an event-driven approach. When the electronic device detects that available memory has dropped below 2GB, it can determine that available memory is insufficient, and therefore determine that memory pages need asynchronous compaction. This allows the electronic device to wake up aswapd to perform the asynchronous compaction operation to release memory.
[0045] Optionally, in this embodiment of the application, in addition to detecting available memory, the electronic device can also detect status information such as CPU load status, GPU load status, memory status, and current process priority to determine whether to perform asynchronous compression. Wherein:
[0046] (1) CPU load status may include, but is not limited to: CPU utilization, average load, etc.
[0047] (2) GPU load status may include, but is not limited to: GPU utilization, video memory usage, rendering frame rate, etc.
[0048] (3) Memory status may include, but is not limited to: memory utilization rate, available memory amount, and used memory amount.
[0049] The current process priority can include, but is not limited to, static priority and dynamic priority.
[0050] Optionally, as shown in Figure 2, the memory compression method provided in this embodiment mainly consists of four modules: a user-mode compression module in user mode, and an asynchronous garbage collection module, an asynchronous interaction module, and a forced compression module in kernel mode. Wherein:
[0051] (1) Asynchronous recycling module: It is used to add the anonymous page information that needs to be asynchronously compressed into the FIFO for isolation, and trigger the asynchronous compression action in a timely manner.
[0052] (2) Asynchronous interaction module: used to transmit data and status with user space.
[0053] (3) User-space compression module: The main body of user-space compression of anonymous pages, which can be a CPU process, or a GPU, NPU, etc.
[0054] (4) Forced Compression Module: A kernel compression function woken up by a timer, triggered when problems such as the FIFO not being full for a long time or native exception timeout occur. In this embodiment, "native" refers to compression operations related to user space, and "native exception" refers to abnormal situations that may occur during user space compression.
[0055] Optionally, in this embodiment of the application, since compression involves both user-mode and kernel-mode, to avoid anomalies caused by simultaneous compression, the memory compression method provided in this embodiment defines the compression states of user-mode and kernel-mode as follows:
[0056] (1)STATE_NATIVE_COMP_DOING: User-space compression start state.
[0057] (2)STATE_NATIVE_COMP_DONE: User-space compression end status.
[0058] (3)STATE_KERNEL_COMP_DOING: Kernel compression start state.
[0059] (4)STATE_KERNEL_COMP_DONE: Kernel-mode compression end status.
[0060] In this embodiment of the application, the aforementioned memory page is also referred to as a page, which is a fixed-size memory block managed by the operating system kernel and is the basic unit of memory management.
[0061] It should be noted that the compression described above involves processing the data in a memory page to reduce its memory footprint, typically done directly in kernel mode. Asynchronous compression, on the other hand, refers to the electronic device performing memory page compression in the background. This allows the device to perform compression without affecting other processes, thereby improving overall system performance and responsiveness. It should also be noted that the descriptor corresponding to a memory page is a pointer to that page, used for reading and writing data, managing memory allocation, etc.
[0062] The zram mentioned above is a memory compression technology that allows the creation of compressed block devices in memory. zram can be regarded as a compressed memory device or module. The zram written into the FIFO here is a specific instance of the zram module.
[0063] The index value of the aforementioned memory page in zram is an integer used to identify the location of a specific memory page in zram. Each compressed memory page has a unique index value in zram.
[0064] The bio pointer mentioned above is a structure used to describe the input / output requests of the block device. It contains information required for data transfer with the block device, such as data buffer, data length, and target device.
[0065] In this embodiment, the FIFO is a first-in, first-out (FIFO) data structure, following the principle that the data that first enters the queue is processed or removed first. FIFO can be used to manage memory pages that need compression. Whenever a new memory page needs compression, it is encapsulated into a compression request and added to the FIFO queue. This ensures that all memory pages to be compressed are processed in the order of requests. Furthermore, FIFO enables batch processing of the contained data, allowing electronic devices to perform batch compression after a certain number of compression requests have accumulated in the FIFO, reducing the additional memory consumption caused by frequent compression operations.
[0066] In this embodiment of the application, writing to the FIFO means adding the encapsulated compressed request variable to the FIFO queue.
[0067] Optionally, in this embodiment of the application, referring to FIG1 and FIG3, the above step 201 can be specifically implemented by the following steps 201a and 201b.
[0068] Step 201a: If a memory page that needs to be compressed is detected in the kernel mode, the electronic device encapsulates the descriptor corresponding to the memory page and the compression-related information of the memory page into a compression request variable.
[0069] In this embodiment of the application, the compression-related information mentioned above includes at least one of the following: compressed memory (zram), the index value of the memory page in zram, and block input / output (bio) pointers.
[0070] In this embodiment, the compression request variable is a data structure used to encapsulate information related to memory compression operations. The descriptor corresponding to the memory page can also be called a memory page descriptor.
[0071] In this embodiment of the application, the electronic device can simplify the data transmission process by encapsulating the descriptor corresponding to the memory page and the compression-related information of the memory page into a compression request variable and combining these data into a whole.
[0072] Step 201b: The electronic device writes the compression request variable into the FIFO.
[0073] In this embodiment of the application, the above-mentioned memory page compression-related information is used for kernel-mode processing of the data obtained after memory page compression.
[0074] In this embodiment, the electronic device can encapsulate the aforementioned memory page and its compression-related information into a compression request variable `async_request`, and then add it to the FIFO linked list of the compression request. The main encapsulated variables include the page pointer (i.e., the aforementioned memory page), zram, the index in zram, and bio, etc., which are needed in subsequent asynchronous operations. Among them:
[0075] (1) The page pointer is struct page*page, which is the memory page descriptor that needs to be compressed.
[0076] (2) zram is struct zram*zram, which is a compressed instance of zram and is used for the copying operation after compression.
[0077] (3) The index in zram is u32 index, which is the index value of the memory page in zram, and is used for the copying operation after compression.
[0078] (4) bio is struct bio*bio, which is a pointer to the bio of this memory page in this compression, used for I / O operations after compression.
[0079] In this way, electronic devices can write compression-related information of memory pages into the FIFO, so that after the electronic device has compressed the memory page, it can copy the compressed memory page using the corresponding compression-related information, thus providing data support for the copy operation.
[0080] Step 202: The electronic device establishes a data channel between kernel mode and user mode.
[0081] In this embodiment, the aforementioned data channel is a communication mechanism established between kernel mode and user mode, used for data transmission and state interaction between these two different execution environments.
[0082] Optionally, in this embodiment, the electronic device can establish a data channel based on a zero-copy data transfer mechanism. This zero-copy data transfer mechanism is a data transfer mechanism that allows user-mode processes to directly access data in kernel mode by directly mapping memory regions when transferring data between kernel mode and user mode, thereby accelerating data transfer and saving memory overhead.
[0083] Optionally, in this embodiment of the application, assuming the length of the FIFO is N, it can be represented by FIFO_SIZE. That is, when the FIFO is full, it contains FIFO_SIZE memory pages. The electronic device needs to transfer the source data (source_data) of these FIFO_SIZE memory pages before compression from the kernel space to the user space. At the same time, the user space needs to transfer the compressed data (dest_data) and compression result (result_desc) of these memory pages from the user space to the kernel space.
[0084] For example, as shown in Figure 4, the above process is illustrated with an example of FIFO_SIZE of 1024. Wherein:
[0085] (1) async_request is the source data compression request management structure, i.e. the compression request variable mentioned above.
[0086] (2) `dest_data` is the management variable for the compressed data, which is a buffer of size `FIFO_SIZE` memory pages. Because the size of each compressed page is uncertain, the size of each compressed data storage is set to the maximum `PAGE_SIZE`, which is the maximum size of a single memory page allowed in the system (e.g., 4096 bytes).
[0087] (3) `result_desc` represents the compression result, used to record the state of the corresponding memory page after compression. It mainly includes `unsigned int comp_len` and `unsigned int status`. `unsigned int comp_len` is the size of the page after compression, and `unsigned int status` is the compression status of the page. The compression status of the page includes:
[0088] 1) INITIAL: Initialization state, indicating that the page has not been compressed. It is set by the kernel before page compression.
[0089] 2) COMPRESSED: Compression status, indicating that the page has been successfully compressed, set by the user-mode compression process.
[0090] 3) ERROR: Error status, indicating that an error occurred during the compression process of this page, set by the user-mode compression process.
[0091] In this embodiment of the application, the above-mentioned async_request, dest_data, and result_desc are all one-to-one correspondences. That is, when the FIFO contains FIFO_SIZE pages, the number of async_request, dest_data, and result_desc is FIFO_SIZE.
[0092] Optionally, in this embodiment of the application, referring to FIG1 and FIG5, after step 201 above, the memory compression method provided in this embodiment of the application further includes the following steps 301 and 302.
[0093] Step 301: Start the timer on the electronic device.
[0094] It should be noted that the aforementioned timer is a hardware or software tool used for timing and controlling time intervals, used to trigger a specific event or perform an operation after a set time interval.
[0095] In this embodiment, the timer is used to set a first duration and start timing. The electronic device can determine to compress the FIFO in user mode if the FIFO is full within the first duration, or it can determine to compress the FIFO in kernel mode after the first duration if the FIFO is not full.
[0096] Optionally, in this embodiment, the electronic device can initialize the timer and set a first duration through system calls or other means. Then, the electronic device can call the corresponding function to start the timer, causing it to begin counting.
[0097] In this embodiment of the application, the first duration is a preset time period, which is used to avoid the waste of system resources caused by long waiting time.
[0098] Optionally, in this embodiment, the first duration can be the default value of the electronic device or a value preset by the user. For example, the first duration can be 0.5 seconds, 1 second, 2 seconds, etc. The specific duration can be determined according to actual usage requirements, and this embodiment does not impose any limitations.
[0099] Step 302: If the timer times out, compress the memory pages in the FIFO in kernel mode.
[0100] Optionally, in this embodiment, if the FIFO is still not full after the timer has run for a first duration, the electronic device can directly compress the memory pages in the FIFO in kernel mode. The specific method for compressing the memory pages in the FIFO in kernel mode is described in the following embodiments and will not be repeated here.
[0101] Optionally, in this embodiment of the application, referring to FIG5 and FIG6, the above step 202 can be specifically implemented by the following step 202a.
[0102] Step 202a: If the FIFO is full during the first duration of the timer, the electronic device establishes a data channel between kernel mode and user mode.
[0103] Optionally, in this embodiment, during the timer's counting process, the electronic device can check the state of the FIFO to determine whether the FIFO is full. If the electronic device detects that the FIFO is full within the first duration of the timer's counting, the electronic device can establish a data channel between kernel mode and user mode via mmap.
[0104] In this way, electronic devices can establish data channels in a timely manner within the first time period and when the FIFO is full, ensuring efficient data transmission and processing.
[0105] Optionally, in this embodiment of the application, referring to FIG6 and FIG7, the above step 202a can be specifically implemented by the following steps 202a1 and 202a2.
[0106] Step 202a1: If the timer has not expired and the FIFO is full, the electronic device sends a notification message to the user space by triggering the epoll mechanism.
[0107] In this embodiment of the application, the notification message is used to indicate that there is data in the kernel that needs to be compressed.
[0108] In this embodiment of the application, the epoll mechanism described above is an efficient event notification mechanism used to handle input and output events of a large number of file descriptors.
[0109] Optionally, in this embodiment, when the FIFO is filled, the electronic device can determine that the FIFO meets the conditions for batch compression, thereby waking up the asynchronous interaction thread async_comp. async_comp is a thread defined in the memory compression method provided in this embodiment, used to implement the interaction of state and data flow between kernel mode and user mode. Then, the electronic device can use async_comp to send notification messages to user mode via the epoll mechanism.
[0110] Step 202a2: The electronic device, through the mapping device node, traverses the N memory pages in the FIFO in kernel mode and associates the N memory pages with the first virtual address in user mode in turn.
[0111] In this embodiment, N is the length of the FIFO, and the size of the first virtual address range is equal to the size of N memory pages.
[0112] In this embodiment, the device node is a special file in the Linux system that represents a virtual device, typically located in the / dev directory. User-space programs can interact with the device through the device node.
[0113] In this embodiment, the mapping described above is also called mmap, a system call used to map the contents of a file or device to the virtual address space of a process. By mapping memory, user-mode programs can access files or devices as if they were accessing memory.
[0114] In this embodiment, the virtual address is the address used by the process in memory. The operating system maps the virtual address to the physical memory address through virtual memory management, and each process has its own virtual address space.
[0115] Optionally, in this embodiment of the application, to enable data to be shared between kernel mode and user mode in a zero-copy manner, the memory compression method provided in this embodiment defines three misc device nodes: srcdata for transmitting source data, destdata for transmitting compressed data, and rsltdesc for transmitting compression results. Electronic devices can establish data channels through open and mmap-related nodes. open is a system call used to open a file or device.
[0116] It should be noted that the three misc device nodes mentioned above are created when the electronic device is powered on. Among them, the data memory addresses of destdata and rsltdesc are fixed after the electronic device is powered on, while the data memory address of srcdata changes with each compression.
[0117] Optionally, in this embodiment of the application, since the physical memory addresses of destdata and rsltdesc data are fixed after the electronic device is powered on, the electronic device can initialize mmap once in the user-mode related process. However, since the physical memory address of srcdata data changes every time it is compressed, the related memory needs to be mapped once every time the memory page is compressed.
[0118] Optionally, in this embodiment, the electronic device can create a device node in kernel mode, such as / dev / srcdata, representing the device node srcdata in the / dev directory. The electronic device can then use memory mapping (i.e., mmap) technology to map the memory region of this device node to the user-space virtual address space, allowing user-space programs to directly access and manipulate the memory data corresponding to the device node. Similarly, the electronic device can also create / dev / destdata and / dev / rsltdesc in the / dev directory and map them using mmap, allowing user-space programs to directly store compressed data in the destdata node and compressed results in the rsltdesc node without requiring additional memory copying.
[0119] Optionally, in this embodiment of the application, after the electronic device maps the device node to the virtual address space in user space through memory mapping, the electronic device can traverse all memory pages in the FIFO and map these memory pages to the user's virtual address through the mapping function.
[0120] In this embodiment of the application, the above mapping function is used to map the address of a physical page to the virtual address space of the user space, so that the user space program can directly access these physical memory pages. For example, the mapping function can be remap_pfn_range.
[0121] Optionally, in this embodiment of the application, the electronic device can sequentially access N (i.e., FIFO_SIZE) memory pages in the FIFO queue in kernel mode, and use a mapping function (e.g., remap_pfn_range) to map the physical addresses of these N memory pages to the virtual address space in user mode.
[0122] Optionally, in this embodiment of the application, the electronic device needs to transmit source data through a data channel so that the user space can operate on the data in the kernel space. Specifically, the user space maps the / dev / srcdata node through mmap, and the corresponding mmap operation in the kernel is to traverse the FIFO_SIZE pages in async_request in sequence and map the pages to the virtual address in the user space through the remap_pfn_range function, so that the user space can operate on this part of the memory.
[0123] In this way, electronic devices can map device nodes to the virtual address space in user space through memory mapping, and traverse all memory pages in the FIFO. By mapping these memory pages to the user's virtual address through mapping functions, the user space can directly access and manipulate the data in these memory pages without data copying, thereby achieving efficient data interaction and processing.
[0124] Step 203: In user mode, the electronic device reads memory pages from the FIFO via the data channel and performs a compression operation on the memory pages.
[0125] In this embodiment of the application, the electronic device can access the FIFO in user mode through the established data channel, obtain the memory pages in the FIFO, perform a compression operation, and obtain and store the compression result.
[0126] It should be noted that for a detailed explanation of step 203 above, please refer to the description in the following embodiments, which will not be repeated here.
[0127] Optionally, in the embodiments of this application, the memory compression method provided in the embodiments of this application is not limited to compression of heterogeneous computing units such as GPUs and NPUs, or can also be used for asynchronous CPU compression in user space or kernel space.
[0128] Optionally, in the embodiments of this application, the memory compression method provided in the embodiments of this application uses a compression state method when handling user-mode and kernel-mode competition. This compression state method can also be extended to protect other processes, such as COPYING state.
[0129] In this embodiment, the memory compression method provided can support heterogeneous compression functions of computing units such as GPUs and NPUs, and can also support asynchronous compression requirements of user-mode or kernel-mode processes. Taking GPU heterogeneous compression supported by this embodiment as an example, it can significantly reduce the CPU memory reclamation load while improving memory compression efficiency, thereby improving user power consumption and performance experience.
[0130] This application provides a memory compression method. When an electronic device determines that a memory page needs to be compressed, it can first write the memory page into a FIFO. Then, the electronic device can establish a data channel between kernel mode and user mode, enabling it to read the memory page written to the FIFO by the kernel mode in user mode. In other words, the electronic device can directly read the memory page in kernel mode in user mode. Therefore, the electronic device can perform compression operations on the memory page in kernel mode in user mode through non-CPU computing units such as GPUs, thereby improving the efficiency of memory page compression and reducing the CPU load.
[0131] Optionally, in this embodiment of the application, the memory compression method provided in this embodiment of the application further includes the following step 401.
[0132] Step 401: If the FIFO is not full after the first duration, the electronic device performs a compression operation on the FIFO in kernel mode.
[0133] Optionally, in this embodiment of the application, if the electronic device detects that the FIFO is not full after the timer has reached the first duration, the electronic device can call the corresponding compression algorithm to directly compress the memory pages in the FIFO in the kernel mode.
[0134] Optionally, in this embodiment, when the force_timer (i.e., the aforementioned timer) times out, the kernel forced compression thread is awakened to compress the pages to be compressed in the async_request linked list sequentially, and the compressed data is saved to zsmalloc (i.e., the compressed memory allocator described below). Because this thread is in kernel mode and can access the relevant data structures, a complex data sharing mechanism is not required. Before and after compression, the electronic device can set its state to STATE_KERNEL_COMP_DOING and STATE_KERNEL_COMP_DONE, respectively. Since this thread cannot perform compression simultaneously with user mode, if it is determined that the current state is STATE_NATIVE_COMP_DOING before compression, i.e., the user mode compression start state, the electronic device can stop the compression operation being performed in user mode.
[0135] It can be understood that the execution relationship between step 401 and step 202a is OR. That is, if step 202a is executed, step 401 is not executed; or, if step 401 is executed, steps 202a and 203 are not executed.
[0136] In this way, electronic devices can set timers to perform memory compression operations in a timely manner when the FIFO is not full for a long time, thereby releasing memory resources and ensuring that they can respond within an appropriate time, avoiding long waiting times.
[0137] Optionally, in this embodiment of the application, referring to FIG7 and FIG8, the above step 203 can be specifically implemented by the following steps 203a to 203c.
[0138] Step 203a: The electronic device reads N memory pages from the FIFO by accessing the first virtual address in user mode.
[0139] Optionally, in this embodiment of the application, the electronic device can access the FIFO data structure in the virtual address of the user space through pointer operations or system calls based on the established data channel, so that the electronic device can directly interact with the data stored in the FIFO, thereby reading and processing the data to be compressed.
[0140] Optionally, in this embodiment, after accessing the FIFO in the user-mode virtual address, the electronic device can determine the current length N of the FIFO by checking its state or calling relevant functions, and then sequentially retrieve N memory pages from the FIFO and store them in a local variable or buffer. That is, the electronic device can obtain all memory pages in the FIFO for subsequent compression operations.
[0141] Step 203b: The electronic device performs a compression operation on N memory pages to obtain compressed memory page data and tag information.
[0142] In this embodiment of the application, the above-mentioned tag information is used to indicate the compression status of N memory pages.
[0143] Optionally, in the embodiments of this application, the compression situation described above may include, but is not limited to, at least one of the following: the size of the memory page before compression, the size of the memory page after compression, the compression algorithm type, and a description of the compression result of the memory page. The description of the compression result of the memory page may include uncompressed, successfully compressed, or compression error.
[0144] Optionally, in this embodiment of the application, the electronic device may use a specific compression algorithm to compress these N memory pages and obtain compressed memory page data (i.e., the above-mentioned dest_data) and tag information (i.e., the above-mentioned result_desc).
[0145] Step 203c: The electronic device stores the memory page compression data and tag information to the second virtual address and the third virtual address in user space, respectively.
[0146] Optionally, in this embodiment of the application, the electronic device can determine the specific location in the virtual address used to store the compressed data and tag information based on the address specified during mapping, namely the second virtual address in user mode and the third virtual address in user mode. Then, the electronic device can store the compressed memory page compressed data in user mode to the second virtual address and store the corresponding tag information in user mode to the third virtual address.
[0147] Optionally, in this embodiment of the application, after compression is completed, the electronic device needs to transfer the compressed memory page data and tag information from user space to kernel space via a data channel. Wherein:
[0148] (1) Method for transmitting compressed memory page data: User space maps the / dev / destdata node through mmap. The corresponding mmap operation in the kernel is to traverse the FIFO_SIZE pages in dest_data in turn and map the pages to the virtual address in user space through the remap_pfn_range function. In this way, user space can save the compressed data into dest_data.
[0149] (2) Method for transmitting tag information: In order to map the result data to user space, the size of result_desc needs to be aligned with PAGE_SIZE and be contiguous memory. When user space maps the / dev / rsltdesc node through mmap, the corresponding memory page is mapped to the virtual address of user space through the remap_pfn_range function. In this way, user space can save the compressed state data into result_desc.
[0150] In this way, electronic devices can quickly obtain the data to be processed by accessing the FIFO in the virtual address in user space, reducing data transmission latency and improving the efficiency of data compression.
[0151] Optionally, in this embodiment of the application, referring to FIG8 and FIG9, before step 203a above, the memory compression method provided by this embodiment of the application further includes step 501 below, and after step 203c above, the memory compression method provided by this embodiment of the application further includes steps 502 and 503 below.
[0152] Step 501: The electronic device sets the value of the second marker variable to the third value.
[0153] In this embodiment of the application, the second marker variable is used to mark the working state of the user state, and the third value indicates that the user state is in the starting compression state.
[0154] Optionally, in this embodiment of the application, when the compression operation begins, the electronic device may perform an assignment operation to set the value of the second flag variable (such as state) to a third value that indicates that the user state is in the compression start state, namely the aforementioned STATE_NATIVE_COMP_DOING.
[0155] Step 502: The electronic device sets the value of the second marker variable to the fourth value.
[0156] In this embodiment of the application, the fourth value indicates that the user state is in the compression completed state.
[0157] Optionally, in this embodiment of the application, after the compression operation in user mode is completed, the electronic device can perform an assignment operation to update the value of the second flag variable to the fourth value indicating that the user mode is in the compression completed state, namely the aforementioned STATE_NATIVE_COMP_DONE.
[0158] Step 503: The electronic device stores the compressed data of the memory page from the second virtual address to the compressed memory allocator.
[0159] Optionally, in this embodiment, after the compression operation in user space is completed, the electronic device can write the compressed data from the second virtual address to the compressed memory allocator (zsmalloc) based on compression-related information. Specifically, the electronic device can obtain a zsmalloc handle for storing the compressed data based on the zram memory pool (mem_pool) and the length of the compressed data (comp_len) in the compression-related information, then copy the compressed data from the second virtual address to the specified target memory, finally update the relevant flags of the memory page index value in zram in the compression-related information, and complete the cleanup operations related to block input / output (bio) through the bio pointer in the compression-related information to ensure data integrity and consistency.
[0160] In this way, electronic devices can accurately identify the current compression status of the user mode by setting the value of the second flag variable, and coordinate according to the compression status to avoid conflicts when performing compression operations.
[0161] Optionally, in this embodiment of the application, referring to FIG9 and FIG10, before step 501 above, the memory compression method provided in this embodiment of the application further includes step 601 below, and step 502 above can be specifically implemented by step 502a below.
[0162] Step 601: Start the timer on the electronic device.
[0163] In this embodiment of the application, the timer is used to determine whether to compress the FIFO in kernel mode.
[0164] Step 502a: If the user state completes the FIFO compression within the second time period, the electronic device sets the value of the second flag variable to the fourth value.
[0165] In this embodiment of the application, the second duration is a preset time period, which is used to avoid the waste of system resources caused by long waiting time.
[0166] Optionally, in this embodiment, the second duration can be the default value of the electronic device or a value preset by the user. For example, the second duration can be 0.5 seconds, 1 second, 2 seconds, etc. The specific duration can be determined according to actual usage requirements, and this embodiment does not impose any limitations.
[0167] Optionally, in this embodiment of the application, if the compression operation on the FIFO in user mode is completed within the second duration of the timer's countdown, the electronic device can update the value of the second flag variable to STATE_NATIVE_COMP_DONE.
[0168] Optionally, in this embodiment, if the FIFO compression operation in user mode is still not completed after the timer's duration has reached the second duration, the electronic device can directly compress the memory pages in the FIFO in kernel mode. The specific compression method is described above and will not be repeated here.
[0169] In this way, electronic devices can use timers to prevent user-mode compression operations from taking a long time to complete due to resource contention, processing delays, or other reasons, which can lead to slow system response.
[0170] Figure 11 is a schematic diagram of the execution process of the memory compression method provided in the embodiment of this application. As shown in Figure 11, the memory compression method provided in the embodiment of this application may include the following steps 10 to 28. Among them, the following steps 10 to 15 are executed by the kernel-mode asynchronous recycling module; the following steps 16 to 19 and 26 to 28 are executed by the kernel-mode asynchronous interaction module; and the following steps 20 to 25 are executed by the user-mode compression module.
[0171] Kernel-mode asynchronous garbage collection module:
[0172] Step 10: In the original ZRAM compression process, the electronic device determines whether the page being compressed needs to be asynchronously compressed.
[0173] If the electronic device determines that the page being compressed needs to be compressed asynchronously, it executes step 11 below; if the electronic device determines that the page being compressed does not need to be compressed asynchronously, it executes the original process.
[0174] In this embodiment, to avoid asynchronous compression blocking the normal flow of other processes, a new asynchronous recycling process, aswapd (async swapd daemon), is defined. Anonymous pages recycled by aswapd can be placed in the asynchronous compression process. aswapd can be triggered by polling or based on the memory waterline, and the specific triggering conditions can be determined based on the actual needs of the product. In addition, conditions such as the current system CPU load status, GPU load status, memory status, and current process priority can be added to determine whether to perform asynchronous compression. If the electronic device determines that Tn is not within the optimal environmental information range, then step 14 is executed below; if the electronic device determines that Tn is within the optimal environmental information range, then step 16 is executed below.
[0175] Step 11: The electronic device encapsulates the memory page descriptor and compression-related information into a compression request variable async_request and adds it to the FIFO linked list of compression requests.
[0176] In this embodiment, the main encapsulated variables include the page pointer, zram, index in zram, bio, etc., which are needed in subsequent asynchronous operations.
[0177] Step 12: Add a forced compression timer (force_timer) to the electronic device.
[0178] In this embodiment, the timer's duration can be in the range of seconds (1 second). The purpose of adding the timer here is to prevent the FIFO from becoming incompletely filled for an extended period, thus preventing compression. Only one timer exists in the system at any given time; if a timer already exists, it will not be added again.
[0179] Step 13: The electronic device determines whether the FIFO is full.
[0180] If the electronic device determines that the page being compressed needs to be compressed asynchronously, then it executes step 11 above; if the electronic device determines that the page being compressed does not need to be compressed asynchronously, then it executes the original process.
[0181] In this embodiment, when the FIFO is full, the conditions for batch compression are met. This embodiment defines the FIFO size as FIFO_SIZE. If the size is defined as 1024, then 1024 anonymous pages can be compressed in batches each time.
[0182] Step 14: Remove the force_timer from the electronic device.
[0183] In this embodiment, since the asynchronous compression process has been triggered normally, there is no need to continue timing. If the force_timer has been removed, the operation will not be repeated.
[0184] Step 15: The electronic device wakes up the asynchronous interaction thread async_comp.
[0185] In this embodiment of the application, the above-mentioned async_comp is a thread defined by the present invention, which mainly realizes the interaction of state and data flow with the user space.
[0186] Kernel-mode asynchronous interaction module:
[0187] Step 16: async_comp waits for the asynchronous recycling module to wake up.
[0188] Step 17: The electronic device notifies the user space that there is data that needs to be compressed through the epoll mechanism.
[0189] Step 18: Add a forced compression timer (force_timer) to the electronic device.
[0190] In this embodiment of the application, the timer is used to prevent the user mode from being unresponsive for a long time.
[0191] Step 19: The electronic device establishes a data communication channel with the user space via zero-copy method.
[0192] User-space compression module:
[0193] Step 20: The electronic device waits for the kernel to wake up.
[0194] Step 21: Establish a data channel for electronic devices.
[0195] Step 22: The electronic device determines whether the kernel mode is performing a forced compression operation.
[0196] If the kernel is performing a forced compression operation at this time, then proceed to step 20 above; if the kernel is not performing a forced compression operation at this time, then proceed to step 23 below.
[0197] Step 23: The electronic device notifies the kernel that the current state is user-mode compression and performs compression operations.
[0198] In this embodiment of the application, the aforementioned user-space compression state is STATE_NATIVE_COMP_DOING.
[0199] Step 24: The electronic device saves the compressed data and results.
[0200] Step 25: The electronic device notifies the kernel that user-mode compression is complete and wakes up the kernel to handle subsequent operations.
[0201] In this embodiment of the application, the kernel is notified that the user space compression is now complete, that is, the current state is set to STATE_NATIVE_COMP_DONE.
[0202] Kernel-mode asynchronous interaction module:
[0203] Step 26: The electronic device is woken up after the user-mode compression is completed.
[0204] Step 27: Remove the force_timer from the electronic device.
[0205] Step 28: The electronic device copies the compressed data into the zsmalloc memory.
[0206] In this embodiment, the copying operation of the electronic device to copy the compressed data into the zsmalloc memory is basically the same as the original process. First, the zsmalloc handle storing the compressed data is obtained based on zram->mem_pool and comp_len; second, the compressed data is copied to the target memory; finally, the relevant flags of zramindex are updated and the bio is closed.
[0207] Each of the above-described method embodiments, or various possible implementations of each method embodiment, can be executed individually or in combination of any two or more. The specific implementation can be determined according to actual usage requirements, and this application does not impose any restrictions on this.
[0208] The memory compression method provided in this application can be executed by a memory compression device. This application uses a memory compression device executing the memory compression method as an example to illustrate the memory compression device provided in this application.
[0209] Figure 12 shows a possible structural schematic diagram of a memory compression device involved in some embodiments of this application. As shown in Figure 12, the memory compression device 70 may include: a writing module 71 and an execution module 72;
[0210] The aforementioned write module 71 is used to write memory pages into the FIFO when it is detected that there are memory pages that need to be compressed in the kernel mode.
[0211] The aforementioned execution module 72 is used to establish a data channel between kernel mode and user mode.
[0212] The aforementioned execution module 72 is also used to read memory pages written by the write module 71 in the FIFO through the data channel in user mode, and to perform compression operations on the memory pages.
[0213] In one possible implementation, the writing module 71 is specifically used to: encapsulate the descriptor corresponding to the memory page and the compression-related information of the memory page into a compression request variable; and write the compression request variable into a FIFO; wherein the compression-related information of the memory page is used by the kernel to process the data obtained after the memory page is compressed.
[0214] In one possible implementation, the execution module 72 is further configured to: start a timer after the writing module 71 writes the memory page into the FIFO; and, if the timer times out, compress the memory page in the FIFO in kernel mode.
[0215] In one possible implementation, the execution module 72 is specifically used to: establish a data channel between kernel mode and user mode when the timer has not expired and the FIFO is full.
[0216] In one possible implementation, the execution module 72 is specifically used to: when the timer has not expired and the FIFO is full, send a notification message to the user space by triggering the epoll mechanism. This notification message is used to indicate that there are memory pages in the kernel space that need to be compressed; and, by mapping device nodes, traverse the N memory pages in the FIFO in the kernel space and associate the N memory pages with the first virtual address in the user space in turn, where N is the length of the FIFO and the size of the range of the first virtual address is equal to the size of the N memory pages.
[0217] In one possible implementation, the execution module 72 is specifically used to: read N memory pages in the FIFO by accessing the first virtual address in user space; perform a compression operation on the N memory pages to obtain memory page compression data and tag information, wherein the tag information is used to indicate the compression status of the N memory pages; and store the memory page compression data and tag information to the second virtual address and the third virtual address in user space, respectively.
[0218] This application provides a memory compression device. When the memory compression device determines that a memory page needs to be compressed, it can first write the memory page into a FIFO. Then, the memory compression device can establish a data channel between kernel mode and user mode, enabling it to read the memory page written to the FIFO by the kernel mode in user mode through this data channel. In other words, the memory compression device can directly read the memory page in kernel mode from user mode. Therefore, the memory compression device can perform compression operations on the memory page in kernel mode in user mode through non-CPU computing units such as GPUs, thereby improving the efficiency of the memory compression device in compressing memory pages and reducing the CPU load.
[0219] The memory compression device in this application embodiment can be an electronic device or a component within an electronic device, such as an integrated circuit or a chip. The electronic device can be a terminal or other devices besides a terminal. For example, the electronic device can be a mobile phone, tablet computer, laptop computer, PDA, in-vehicle electronic device, mobile internet device (MID), augmented reality (AR) / virtual reality (VR) device, robot, wearable device, ultra-mobile personal computer (UMPC), netbook, or personal digital assistant (PDA), etc. It can also be a server, network attached storage (NAS), personal computer (PC), television set (TV), ATM, or self-service machine, etc. This application embodiment does not specifically limit the specific type of device.
[0220] The memory compression device in this application embodiment can be a device with an operating system. This operating system can be Android, iOS, or other possible operating systems; this application embodiment does not specifically limit it.
[0221] The memory compression device provided in this application embodiment can implement all the processes implemented in the above method embodiments, and will not be described again here to avoid repetition.
[0222] Optionally, as shown in FIG13, this application embodiment also provides an electronic device 1000, including a processor 1001 and a memory 1002. The memory 1002 stores a program or instructions that can run on the processor 1001. When the program or instructions are executed by the processor 1001, they implement the various steps of the above-described memory compression method embodiment and can achieve the same technical effect. To avoid repetition, they will not be described again here.
[0223] It should be noted that the electronic devices in the embodiments of this application include the mobile electronic devices and non-mobile electronic devices described above.
[0224] Figure 14 is a schematic diagram of the hardware structure of an electronic device that implements an embodiment of this application.
[0225] The electronic device 100 includes, but is not limited to, components such as: radio frequency unit 101, network module 102, audio output unit 103, input unit 104, sensor 105, display unit 106, user input unit 107, interface unit 108, memory 109, and processor 110.
[0226] Those skilled in the art will understand that the electronic device 100 may also include a power supply (such as a battery) for powering various components. The power supply may be logically connected to the processor 110 through a power management system, thereby enabling functions such as charging, discharging, and power consumption management through the power management system. The electronic device structure shown in Figure 14 does not constitute a limitation on the electronic device. The electronic device may include more or fewer components than shown, or combine certain components, or have different component arrangements, which will not be elaborated here.
[0227] The processor 110 is used to write memory pages into a FIFO when it detects that there are memory pages that need to be compressed in the kernel mode.
[0228] The aforementioned processor 110 is used to establish a data channel between kernel mode and user mode.
[0229] The aforementioned processor 110 is also used to read memory pages in the FIFO through a data channel in user mode and perform compression operations on the memory pages.
[0230] Optionally, the processor 110 is specifically configured to: encapsulate the descriptor corresponding to the memory page and the compression-related information of the memory page into a compression request variable; and write the compression request variable into a FIFO; wherein the compression-related information of the memory page is used for kernel-mode processing of the data obtained after the memory page is compressed.
[0231] Optionally, the processor 110 is further configured to: start a timer after writing memory pages into the FIFO; and, if the timer times out, compress the memory pages in the FIFO in kernel mode.
[0232] Optionally, the processor 110 is specifically used to: establish a data channel between kernel mode and user mode when the timer has not expired and the FIFO is full.
[0233] Optionally, the processor 110 is specifically configured to: when the timer has not expired and the FIFO is full, send a notification message to the user space by triggering the epoll mechanism, the notification message indicating that there are memory pages in the kernel space that need to be compressed; and, by mapping device nodes, traverse the N memory pages in the FIFO in the kernel space, and sequentially associate the N memory pages with a first virtual address in the user space, where N is the length of the FIFO and the size of the range of the first virtual address is equal to the size of the N memory pages.
[0234] Optionally, the processor 110 is specifically configured to: read N memory pages from the FIFO by accessing a first virtual address in user space; perform a compression operation on the N memory pages to obtain compressed memory page data and tag information, wherein the tag information is used to indicate the compression status of the N memory pages; and store the compressed memory page data and tag information to a second virtual address in user space and a third virtual address in user space, respectively.
[0235] This application provides an electronic device. When the electronic device determines that a memory page needs to be compressed, it can first write the memory page into a FIFO. Then, the electronic device can establish a data channel between kernel mode and user mode, enabling it to read the memory page written to the FIFO by the kernel mode in user mode through this data channel. In other words, the electronic device can directly read the memory page in kernel mode in user mode. Therefore, the electronic device can perform compression operations on the memory page in kernel mode in user mode through non-CPU computing units such as GPUs, thereby improving the efficiency of memory page compression and reducing the CPU load.
[0236] The electronic device provided in this application embodiment can implement all the processes implemented in the above method embodiments and achieve the same technical effects. To avoid repetition, it will not be described again here. The beneficial effects of the various implementation methods in this embodiment can be found in the beneficial effects of the corresponding implementation methods in the above method embodiments. To avoid repetition, it will not be described again here.
[0237] It should be understood that, in this embodiment, the input unit 104 may include a graphics processing unit (GPU) 1041 and a microphone 1042. The GPU 1041 processes image data of still images or videos obtained by an image capture device (such as a camera) in video capture mode or image capture mode. The display unit 106 may include a display panel 1061, which may be configured in the form of a liquid crystal display, an organic light-emitting diode, or the like. The user input unit 107 includes at least one of a touch panel 1071 and other input devices 1072. The touch panel 1071 is also called a touch screen. The touch panel 1071 may include a touch detection device and a touch controller. Other input devices 1072 may include, but are not limited to, physical keyboards, function keys (such as volume control buttons, power buttons, etc.), trackballs, mice, and joysticks, which will not be described in detail here.
[0238] The memory 109 can be used to store software programs and various data. The memory 109 may primarily include a first storage area for storing programs or instructions and a second storage area for storing data. The first storage area may store the operating system, application programs or instructions required for at least one function (such as sound playback, image playback, etc.). Furthermore, the memory 109 may include volatile memory or non-volatile memory, or both. The non-volatile memory may be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. Volatile memory can be random access memory (RAM), static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDRSDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link dynamic random access memory (SLDRAM), and direct memory bus RAM (DRRAM). The memory 109 in the embodiments of this application includes, but is not limited to, these and any other suitable types of memory.
[0239] Processor 110 may include one or more processing units; optionally, processor 110 integrates an application processor and a modem processor, wherein the application processor mainly handles operations involving the operating system, user interface, and applications, and the modem processor mainly handles wireless communication signals, such as a baseband processor. It is understood that the aforementioned modem processor may also not be integrated into processor 110.
[0240] This application also provides a readable storage medium storing a program or instructions. When the program or instructions are executed by a processor, they implement the various processes of the above-described memory compression method embodiments and achieve the same technical effect. To avoid repetition, they will not be described again here.
[0241] The processor is the processor in the electronic device described in the above embodiments. The readable storage medium includes computer-readable storage media, such as computer read-only memory (ROM), random access memory (RAM), magnetic disk, or optical disk.
[0242] This application embodiment also provides a chip, which includes a processor and a communication interface. The communication interface is coupled to the processor. The processor is used to run programs or instructions to implement the various processes of the above-described memory compression method embodiments and can achieve the same technical effect. To avoid repetition, it will not be described again here.
[0243] It should be understood that the chip mentioned in the embodiments of this application may also be referred to as a system-on-a-chip, system chip, chip system, or system-on-a-chip, etc.
[0244] This application provides a computer program product that is stored in a storage medium and executed by at least one processor to implement the various processes of the memory compression method embodiments described above, and can achieve the same technical effect. To avoid repetition, it will not be described again here.
[0245] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element. Furthermore, it should be noted that the scope of the methods and apparatuses in the embodiments of this application is not limited to performing functions in the order shown or discussed, but may also include performing functions substantially simultaneously or in the reverse order, depending on the functions involved. For example, the described methods may be performed in a different order than described, and various steps may be added, omitted, or combined. Additionally, features described with reference to certain examples may be combined in other examples.
[0246] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a computer software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes several instructions to cause a terminal (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods described in the various embodiments of this application.
[0247] The embodiments of this application have been described above with reference to the accompanying drawings. However, this application is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of this application without departing from the spirit and scope of the claims, and all of these forms are within the protection scope of this application.
Claims
1. A memory compression method, comprising: If a memory page that needs to be compressed is detected in the kernel mode, the memory page is written into the first-in-first-out (FIFO). Establish a data channel between the kernel mode and the user mode; In the user space, memory pages in the FIFO are read through the data channel, and a compression operation is performed on the memory pages.
2. The method according to claim 1, wherein, The step of writing the memory page into the FIFO includes: The descriptor corresponding to the memory page and the compression-related information of the memory page are encapsulated into a compression request variable; Write the compression request variable into the FIFO; The compression-related information of the memory pages is used in kernel mode to process the data obtained after the memory pages are compressed.
3. The method according to claim 1, wherein, After writing the memory page into the FIFO, the method further includes: Start the timer; If the timer times out, the memory pages in the FIFO are compressed in the kernel mode.
4. The method according to claim 3, wherein, Establishing the data channel between the kernel mode and the user mode includes: If the timer has not expired and the FIFO is full, a data channel is established between the kernel mode and the user mode.
5. The method according to claim 4, wherein, The step of establishing a data channel between the kernel mode and the user mode when the timer has not expired and the FIFO is full includes: If the timer has not expired and the FIFO is full, the epoll mechanism is triggered to send a notification message to the user space. The notification message is used to indicate that there are memory pages in the kernel space that need to be compressed. By mapping device nodes, the N memory pages in the FIFO are traversed in the kernel mode, and the N memory pages are sequentially associated with a first virtual address in the user mode, where N is the length of the FIFO and the size of the range of the first virtual address is equal to the size of the N memory pages.
6. The method according to claim 5, wherein, The step of reading memory pages from the FIFO via the data channel in user mode and performing a compression operation on the memory pages includes: By accessing the first virtual address in user mode, N memory pages in the FIFO are read; A compression operation is performed on the N memory pages to obtain compressed memory page data and tag information. The tag information is used to indicate and describe the compression status of the N memory pages. The compressed memory page data and the tag information are stored in the second virtual address and the third virtual address in user space, respectively.
7. A memory compression device, comprising: Write module and execution module; The writing module is used to write the memory page that needs to be compressed into a first-in-first-out (FIFO) when it is detected that there is a memory page in the kernel mode that needs to be compressed. The execution module is used to establish a data channel between the kernel mode and the user mode; The execution module is further configured to read the memory page written by the writing module in the FIFO through the data channel in the user mode, and perform a compression operation on the memory page.
8. The apparatus according to claim 7, wherein, The writing module is specifically used for: The descriptor corresponding to the memory page and the compression-related information of the memory page are encapsulated into a compression request variable; and the compression request variable is written into the FIFO; The compression-related information of the memory pages is used in kernel mode to process the data obtained after the memory pages are compressed.
9. The apparatus according to claim 7, wherein, The execution module is further configured to: After the write module writes the memory page into the FIFO, a timer is started; and, If the timer times out, the memory pages in the FIFO are compressed in the kernel mode.
10. The apparatus according to claim 9, wherein, The execution module is specifically used for: If the timer has not expired and the FIFO is full, a data channel is established between the kernel mode and the user mode.
11. The apparatus according to claim 7, wherein, The execution module is specifically used for: If the timer has not expired and the FIFO is full, the epoll mechanism is triggered to send a notification message to the user space. The notification message is used to indicate that there are memory pages in the kernel space that need to be compressed. as well as, By mapping device nodes, the N memory pages in the FIFO are traversed in the kernel mode, and the N memory pages are sequentially associated with a first virtual address in the user mode, where N is the length of the FIFO and the size of the range of the first virtual address is equal to the size of the N memory pages.
12. The apparatus according to claim 11, wherein, The execution module is specifically used for: By accessing the first virtual address in user mode, N memory pages in the FIFO are read; A compression operation is performed on the N memory pages to obtain compressed memory page data and tag information. The tag information is used to indicate and describe the compression status of the N memory pages. The compressed memory page data and the tag information are stored in the second virtual address and the third virtual address in user space, respectively.
13. An electronic device comprising a processor and a memory, the memory storing a program or instructions executable on the processor, the program or instructions, when executed by the processor, implementing the steps of the memory compression method as described in any one of claims 1 to 6.
14. A readable storage medium storing a program or instructions that, when executed by a processor, implement the steps of the memory compression method as described in any one of claims 1 to 6.
15. A chip comprising a processor and a communication interface coupled to the processor, the processor being configured to run a program or instructions to implement the memory compression method as described in any one of claims 1 to 6.
16. A computer program product stored in a storage medium, the program product being executed by at least one processor to implement the memory compression method as described in any one of claims 1 to 6.