Ultrasonic sensor, ultrasonic fingerprint recognition module, and electronic device
By embedding a signal processing chip in a groove within the substrate of the ultrasonic sensor and connecting them through an interconnect layer, the problem of the imbalance between sensor cost and area is solved, achieving the effect of increasing area and reducing cost.
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- CHIPSEMI SEMICON (NINGBO) CO LTD
- Filing Date
- 2026-01-23
- Publication Date
- 2026-07-30
AI Technical Summary
The cost of existing ultrasonic sensors is not balanced with the chip detection area. Existing technical solutions often process pixel circuits and signal processing circuits on the same wafer substrate, which leads to a rapid increase in cost as the chip area increases.
A first groove is formed in the substrate, and the signal processing chip is embedded in the groove. The electrical connection between the signal processing chip and the circuit conversion layer and subsequent circuit board is realized through the interconnect layer, which increases the detection area of the sensor chip while reducing the manufacturing cost.
By embedding a signal processing chip, the detection area of the sensor chip is increased, the manufacturing cost is reduced, the accuracy of fingerprint recognition is improved, and the overall cost is reduced.
Smart Images
Figure CN2026074717_30072026_PF_FP_ABST
Abstract
Description
Ultrasonic sensors, ultrasonic fingerprint recognition modules and electronic devices Cross-references
[0001] This application claims priority to Chinese patent application No. 202510121191.5, filed on January 24, 2025, entitled "Ultrasonic Sensor, Ultrasonic Fingerprint Recognition Module and Electronic Device", which is incorporated herein by reference in its entirety. Technical Field
[0002] This application relates to the field of ultrasonic sensors, and particularly to an ultrasonic sensor, an ultrasonic fingerprint recognition module, and an electronic device. Background Technology
[0003] Ultrasonic sensors utilize the mechatronic-electroelectric conversion properties of piezoelectric materials. On one hand, they are excited by a voltage output from a driving circuit to emit ultrasonic signals; on the other hand, they convert the reflected ultrasonic signals back into electrical signals, thereby acquiring information about the external sensing surface. They can be widely used in medical imaging, structural flaw detection, and biometric identification. For example, ultrasonic sensors can be applied to ultrasonic fingerprint modules, positioned in specific areas of the screens of electronic devices including, but not limited to, smartphones, for fingerprint recognition, user authentication, and enhanced product anti-interference capabilities and security.
[0004] When an ultrasonic sensor is working, a pixel circuit is often placed below the ultrasonic sensing unit to amplify the received electrical signal. For post-processing of the received signal, a signal processing circuit is usually required. To obtain a large sound pressure signal, a very high transmission voltage, reaching tens to hundreds of volts, is typically needed for the sensor. Therefore, an inverter chip is also required in the ultrasonic fingerprint module to boost the pulse signal from the CMOS chip. The pixel circuit, signal processing circuit, and inverter chip circuit in the module usually require different process linewidths and processes. The pixel circuit requires the largest process linewidth, while the signal processing circuit requires the smallest. Existing technologies often fabricate the pixel circuit and signal processing circuit on the same wafer substrate. However, to increase the area of the fingerprint recognition region, existing technologies must increase the area of the ultrasonic sensor chip. But because the signal processing circuit, which requires advanced process nodes, is also fabricated on the same substrate, the increased chip area leads to a rapid increase in chip cost.
[0005] Therefore, the cost of current ultrasonic sensors is not balanced with the sensor chip detection area. Summary of the Invention
[0006] This application provides an ultrasonic sensor, an ultrasonic fingerprint recognition module, and an electronic device, which at least helps to increase the detection area of the sensor chip while reducing the manufacturing cost.
[0007] According to some embodiments of this application, one aspect of this application provides an ultrasonic sensor, comprising: a substrate having a first groove therein; a signal processing chip located within the first groove; an insulating layer located on the substrate and within the first groove; an acoustic-electric conversion layer located on the insulating layer, the acoustic-electric conversion layer comprising: a stacked bottom electrode layer, a piezoelectric layer, a top electrode layer, and a protective layer, the bottom electrode layer being located on the insulating layer; and an interconnect layer located between the substrate and the acoustic-electric conversion layer, the interconnect layer being at least used to connect the signal processing chip and the bottom electrode layer.
[0008] In some embodiments, the signal processing chip includes a first surface and a second surface opposite to each other, the first surface being attached to the bottom surface of the first groove, and the second surface being connected to the interconnect layer.
[0009] In some embodiments, the side surface of the piezoelectric layer forms an angle with the surface of the substrate, wherein the angle α ranges from 0 to 90°.
[0010] In some embodiments, the interconnect layer includes: a first interconnect layer located between the substrate and the acoustic-electric conversion layer; a second interconnect layer extending through the thickness of the substrate and used to connect the signal processing chip and the bottom electrode layer; the insulating layer includes a first insulating layer and a second insulating layer, the first insulating layer located between the substrate and the acoustic-electric conversion layer, and the second insulating layer located between the first groove and the second interconnect layer and the substrate.
[0011] In some embodiments, an adhesive layer is provided between the signal processing chip and the substrate.
[0012] According to some embodiments of this application, another aspect of this application provides an ultrasonic fingerprint recognition module, including: an ultrasonic sensor and a circuit board as described in any of the above embodiments; the ultrasonic sensor further includes: a solder pad located on a substrate; the solder pad is electrically connected to a signal processing chip and a top electrode respectively; wherein, the circuit board is electrically connected to the solder pad.
[0013] In some embodiments, the pad includes: a first pad, the top surface of the top electrode layer being away from the bottom electrode layer; a second pad, the second pad being located on the bottom electrode layer; and the circuit board being electrically connected to the first pad and the second pad, respectively.
[0014] In some embodiments, the substrate further includes: a conductive pillar extending through the thickness of the substrate and electrically connected to the bottom surface of the interconnect layer near the substrate; and a pad located on the side of the substrate away from the acoustic-electric conversion layer and electrically connected to the conductive pillar.
[0015] In some embodiments, the circuit board includes a boost chip, the substrate further having a second groove, the boost chip being located within the second groove, the insulating layer filling the second groove, and the boost chip being electrically connected to the pads.
[0016] According to some embodiments of this application, another aspect of this application provides an electronic device, including: an ultrasonic sensor as described in any of the above embodiments or an ultrasonic fingerprint recognition module as described in any of the above embodiments.
[0017] The technical solution provided in this application has at least the following advantages:
[0018] In the technical solution provided in this application embodiment, the ultrasonic sensor includes: a substrate, a signal processing chip, an electrical conversion layer, and an interconnect layer; a first groove is formed in the substrate, and the signal processing chip is embedded in the first groove, and then the electrical connection between the signal processing chip and the circuit conversion layer and the subsequent circuit board is realized through the interconnect layer, which can increase the detection area of the sensor chip while reducing the manufacturing cost. Attached Figure Description
[0019] One or more embodiments are illustrated by way of example with reference to the accompanying drawings. These illustrations do not constitute a limitation on the embodiments. Unless otherwise stated, the drawings in the accompanying drawings do not constitute a limitation on scale. In order to more clearly illustrate the technical solutions in the embodiments of this application or in the conventional art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0020] Figure 1 is a top view of an ultrasonic sensor provided in an embodiment of this application;
[0021] Figure 2 is a cross-sectional view of an ultrasonic sensor provided in an embodiment of this application;
[0022] Figure 3 is another cross-sectional view of an ultrasonic sensor provided in an embodiment of this application;
[0023] Figures 4 to 13 are cross-sectional views of the ultrasonic sensor corresponding to each step of the preparation method of the ultrasonic sensor provided in another embodiment of this application.
[0024] Figure 14 is a top view of an ultrasonic fingerprint recognition module provided in another embodiment of this application;
[0025] Figure 15 is a cross-sectional view of an ultrasonic fingerprint recognition module provided in another embodiment of this application;
[0026] Figure 16 is a schematic diagram of a fingerprint recognition structure for the electronic device corresponding to Figure 15;
[0027] Figure 17 is another cross-sectional view of an ultrasonic fingerprint recognition module provided in yet another embodiment of this application;
[0028] Figure 18 is a schematic diagram of a fingerprint recognition structure for the electronic device corresponding to Figure 17;
[0029] Figure 19 is another cross-sectional view of an ultrasonic fingerprint recognition module provided in yet another embodiment of this application;
[0030] Figure 20 is a schematic diagram of a fingerprint recognition structure for the electronic device corresponding to Figure 19;
[0031] Figure 21 is another top view of an ultrasonic fingerprint recognition module provided in yet another embodiment of this application;
[0032] Figure 22 is a cross-sectional view of the section along the axis of the signal processing chip in Figure 21;
[0033] Figure 23 is a cross-sectional view of the section along the axis of the boost chip in Figure 21. Detailed Implementation
[0034] As can be seen from the background technology, the cost of current ultrasonic sensors is not balanced with the chip detection area of the sensor.
[0035] This application provides an ultrasonic sensor, an ultrasonic fingerprint recognition module, and an electronic device. By embedding the signal processing chip within a substrate, the area within the plane of the signal processing chip is reduced, thereby increasing the chip detection area of the sensor and reducing the manufacturing cost of the ultrasonic sensor.
[0036] In the description of the embodiments of this application, technical terms such as "first" and "second" are used only to distinguish different objects and should not be construed as indicating or implying relative importance or implicitly specifying the number, specific order, or primary and secondary relationship of the indicated technical features. In the description of the embodiments of this application, "multiple" means two or more, unless otherwise explicitly defined.
[0037] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.
[0038] In the description of the embodiments in this application, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent three cases: A exists, A and B exist simultaneously, and B exists. In addition, the character " / " in this document generally indicates that the related objects before and after it have an "or" relationship.
[0039] In the description of the embodiments of this application, the term "multiple" refers to two or more (including two), similarly, "multiple sets" refers to two or more (including two sets), and "multiple pieces" refers to two or more (including two pieces).
[0040] In the description of the embodiments of this application, the technical terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," and "circumferential" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing the embodiments of this application and simplifying the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the embodiments of this application.
[0041] In the description of the embodiments of this application, unless otherwise expressly specified and limited, technical terms such as "installation," "connection," "joining," and "fixing" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. For those skilled in the art, the specific meaning of the above terms in the embodiments of this application can be understood according to the specific circumstances.
[0042] In the accompanying drawings corresponding to the embodiments of this application, the thickness and area of the layers are enlarged for better understanding and ease of description. When describing a component (such as a layer, film, region, or substrate) on or on the surface of another component, the component may be "directly" located on the surface of the other component, or there may be a third component between the two components. Conversely, when describing a component on the surface of another component, or when another component is formed or disposed on the surface of a component, it indicates that there is no third component between the two components. Furthermore, when describing a component as being "generally" formed on another component, it means that the component is not formed on the entire surface (or front surface) of the other component, nor is it formed on a portion of the edge of the entire surface.
[0043] In the description of the embodiments of this application, when a component "includes" another component, other components are not excluded unless otherwise stated, and other components may be further included. Furthermore, when a component such as a layer, film, region, or plate is referred to as being "on / located" on another component, it can be "directly on" the other component (i.e., located on the surface of the other component with no other components between them), or it can have another component present in between. Moreover, when a component such as a layer, film, region, or plate is "directly located" on another component, or when a component such as a layer, film, region, or plate is located on the surface of another component, it indicates that no other components are located in between.
[0044] The terminology used in the description of the various embodiments herein is for the purpose of describing particular embodiments only and is not intended to be limiting. As used in the description of the various embodiments and the appended claims, the term "part" is also intended to include the plural form unless the context clearly indicates otherwise. Components include layers, films, regions, or plates, etc.
[0045] The embodiments of this application will now be described in detail with reference to the accompanying drawings. However, those skilled in the art will understand that many technical details have been provided in the embodiments of this application to facilitate a better understanding of the application. However, the technical solutions claimed in this application can be implemented even without these technical details and various variations and modifications based on the following embodiments.
[0046] Figure 1 is a top view of an ultrasonic sensor provided in an embodiment of this application; Figure 2 is a cross-sectional view of an ultrasonic sensor provided in an embodiment of this application.
[0047] Referring to Figures 1 and 2, according to some embodiments of this application, one aspect of this application provides an ultrasonic sensor, which increases the detection area of the sensor chip while reducing manufacturing costs. The ultrasonic sensor includes: a substrate 100, with a first groove 102 within the substrate 100. The ultrasonic sensor includes: a signal processing chip 110 located within the first groove 102. The ultrasonic sensor includes: an insulating layer 115 located on the substrate 100 and within the first groove 102. The ultrasonic sensor includes: an acoustic-to-electric conversion layer 120 located on the insulating layer 115, the acoustic-to-electric conversion layer 120 including: a stacked bottom electrode layer 121, a piezoelectric layer 122, a top electrode layer 123, and a protective layer, with the bottom electrode layer 121 located on the insulating layer 115. An interconnect layer 114 is located between the substrate 100 and the acoustic-to-electric conversion layer 120, and the interconnect layer 114 is at least used to connect the signal processing chip 110 and the bottom electrode layer 121.
[0048] In some embodiments, the substrate 100 may be made of semiconductor materials, glass, or polyimide, and semiconductor materials may include silicon, silicon germanium, or germanium.
[0049] In some embodiments, the substrate 100 can be the substrate of a CMOS chip, that is, the acoustic-electric conversion layer 120 is located on the CMOS chip. The CMOS chip controls the signal transmission, signal reception and signal acquisition of the ultrasonic sensor, and at the same time serves as the sensor substrate 100.
[0050] In some embodiments, the thickness of the substrate 100 ranges from 50 μm to 150 μm. The thickness of the substrate 100 can be 50 μm, 55 μm, 60 μm, 65 μm, 70 μm, 75 μm, 80 μm, 85 μm, 90 μm, 95 μm, 100 μm, 110 μm, 120 μm, 130 μm, 140 μm, or 150 μm.
[0051] In some embodiments, the signal processing chip 110 includes any one of a digital filter, a digital amplifier, or an echo detection chip.
[0052] In some embodiments, the depth h of the first groove 102 is in the range of 50 μm to 100 μm. The depth h of the first groove 102 allows the signal processing chip 110 to be located within the first groove 102, and the depth of the first groove 102 is much smaller than the thickness of the substrate 100, thereby avoiding the problem of substrate 100 breaking and affecting the yield of the final ultrasonic sensor.
[0053] The depth h of the first groove 102 can be 50μm, 55μm, 60μm, 65μm, 70μm, 75μm, 80μm, 85μm, 90μm, 95μm or 100μm.
[0054] It should be noted that the signal processing chip 110 is placed in the first groove 102, and the top surface of the signal processing chip 110 can be lower than the top surface of the substrate 100, flush with the top surface of the substrate 100, or slightly higher than the top surface of the substrate 100.
[0055] Referring to Figure 2, in some embodiments, the signal processing chip 110 includes a first surface 111 and a second surface 112 facing each other. The first surface 111 is attached to the bottom surface of the first recess 102, and the second surface 112 is connected to the interconnect layer 114. Thus, the signal processing chip 110 is close to the acoustic-electric conversion layer 120, the interconnect layer 114 is shorter, and excessive etching of the substrate 100 is avoided, resulting in higher strength of the substrate 100 and preventing substrate 100 from cracking.
[0056] Figure 3 is another cross-sectional view of an ultrasonic sensor provided in an embodiment of this application.
[0057] Referring to Figure 3, in some embodiments, the signal processing chip 110 is located on the side of the substrate 100 away from the acoustic-electric conversion layer 120, that is, there is a certain distance between the signal processing chip 110 and the acoustic-electric conversion layer 120. In this way, interference between the acoustic-electric conversion layer 120 and the signal processing chip 110 can be avoided, and the accuracy of the final fingerprint recognition can be improved.
[0058] The bottom electrode layer 121 is used to receive the voltage echo signal generated between the top electrode layer 123 and the bottom electrode layer 121 when the returned ultrasonic signal acts on the piezoelectric layer 122.
[0059] In some embodiments, referring to FIG1, the bottom electrode layer 121 includes a plurality of sub-bottom electrode layers arranged in an array, and an insulating layer 115 is also filled between the plurality of sub-bottom electrode layers 121 to achieve isolation between the sub-bottom electrode layers 121.
[0060] In some embodiments, the material of the bottom electrode layer 121 includes metals, metal compounds, indium tin oxide (ITO), and the like.
[0061] In some embodiments, the thickness of the bottom electrode layer 121 ranges from 0.1 μm to 1 μm. The thickness of the bottom electrode layer 121 can be 0.1 μm, 0.2 μm, 0.3 μm, 0.4 μm, 0.5 μm, 0.6 μm, 0.7 μm, 0.8 μm, 0.9 μm, or 1 μm.
[0062] In some embodiments, the piezoelectric layer 122 is located above and covers the bottom electrode layer 121. When subjected to ultrasonic waves, the piezoelectric layer 122 causes the piezoelectric wafer to expand and contract, generating charges of opposite polarities on the two surfaces of the piezoelectric wafer. These charges are converted into voltages, amplified, and sent to the measuring circuit for recording or display.
[0063] In some embodiments, the piezoelectric layer 122 may be made of an organic polymer material, such as PVDF and its copolymer PVDF-TRFE or blend PVDF-graphene, etc.; the piezoelectric layer 122 may also be made of a mixture of piezoelectric ceramic material and adhesive, such as lead zirconate titanate piezoelectric ceramics (PZT) and its alloy materials (such as lead zirconate titanate lanthanum ceramics (PLZT), lead magnesium niobate (PNZT), potassium sodium niobate (KxNa1-xNbO3, KNN), perovskite phase structure lead magnesium titanate niobate (PMN-PT)) and other piezoelectric materials and adhesive.
[0064] In some embodiments, the thickness of the piezoelectric layer 122 ranges from 8 μm to 30 μm. The thickness of the piezoelectric layer 122 can be 8 μm, 10 μm, 13 μm, 15 μm, 17 μm, 20 μm, 23 μm, 25 μm, 27 μm, 29 μm or 30 μm.
[0065] In some embodiments, the side of the piezoelectric layer 122 forms an angle with the surface of the substrate 100, and the angle α is in the range of 0 < α < 90°. The angle range facilitates subsequent pad connection and routing. The angle α can be 10°, 20°, 30°, 40°, 50°, 60°, 70° or 80°.
[0066] It should be noted that the angle α between the side surface and the bottom surface of the piezoelectric layer 122 shown in Figure 2 can refer to the angle between the side surface of the piezoelectric layer 122 and the surface of the substrate 100 mentioned above.
[0067] In some embodiments, the top electrode layer 123 is at least partially located above the piezoelectric layer 122 and extends onto the portion of the bottom electrode layer 121 not covered by the piezoelectric layer 122, and the extended top electrode layer 123 is used for subsequent electrical connection with the circuit board.
[0068] In some embodiments, the top electrode layer 123 may be made of a metallic material, including but not limited to Au, Ag, Cu or Ni; or it may be a printing ink made of epoxy resin and silver nanoparticles.
[0069] In some embodiments, the thickness of the top electrode layer 123 ranges from 0.1 μm to 30 μm. The thickness of the top electrode layer 123 can be 0.1 μm, 0.5 μm, 2 μm, 5 μm, 8 μm, 10 μm, 13 μm, 15 μm, 17 μm, 20 μm, 23 μm, 25 μm, 27 μm, 29 μm, or 30 μm.
[0070] In some embodiments, a protective layer 124 is used to protect the top electrode layer 123 and the piezoelectric layer 122. The protective layer 124 is located above a portion of the top electrode layer 123 and exposes at least a portion of the surface of the top electrode layer 123.
[0071] In some embodiments, the protective layer 124 can be made of various polymer materials, such as optically clear adhesive (OCA), pressure-sensitive adhesive (PSA), plastics such as polyimide and polyethylene terephthalate (PET), epoxy resin, or a mixture of epoxy resin and metal particles. The protective layer 124 can also be made of metallic materials, including but not limited to Au, Ag, Cu, or Ni; the protective layer can be a single layer or a combination of multiple layers.
[0072] In some embodiments, the thickness of the protective layer 124 ranges from 5 μm to 40 μm. The thickness of the protective layer 124 can be 5 μm, 10 μm, 12 μm, 14 μm, 16 μm, 18 μm, 20 μm, 23 μm, 25 μm, 27 μm, 29 μm, 33 μm, 35 μm, 38 μm, or 40 μm.
[0073] The working principle of the acoustic-electric conversion layer 120 is as follows: when the ultrasonic sensor is in acoustic emission mode, the bottom electrode layer 121 is grounded, and the top electrode layer 123 is used to be excited by an excitation signal to excite the piezoelectric layer 122 to emit ultrasonic signals; when the ultrasonic sensor is in acoustic reception mode, the top electrode layer 123 is grounded, and the bottom electrode layer 121 is used to receive the voltage echo signal generated between the top electrode layer 123 and the bottom electrode layer 121 when the returned ultrasonic signal acts on the piezoelectric layer 122.
[0074] In some embodiments, the area of the substrate 100 corresponding to the acoustic-electric conversion layer 120 has a pixel circuit. The pixel circuit is connected to the bottom electrode layer 121 in the acoustic-electric conversion layer through the upper interconnect layer 114, and controls the on / off state of the bottom electrode layer 121 or performs primary amplification of the signal.
[0075] In some embodiments, the interconnect layer 114 includes at least a first type of interconnect layer and a second type of interconnect layer. The first type of interconnect layer is used to connect the pixel circuit to the bottom electrode layer 121 in the acoustic-electric conversion layer, and the second type of interconnect layer is used to connect the signal processing chip 110 to the bottom electrode layer 121. Referring to FIG2, the first type of interconnect layer includes a first interconnect layer 101, and the second type of interconnect layer includes a third interconnect layer 104.
[0076] In some embodiments, the material of the interconnect layer 114 includes metals, metal compounds, indium tin oxide (ITO), and other materials.
[0077] In some embodiments, a connection layer 106 is further provided between the interconnect layer 114 and the bottom electrode layer 121. The material of the connection layer 106 includes metals, metal compounds, indium tin oxide (ITO), and the like.
[0078] In some embodiments, one of the conductive materials in the interconnect layer 114 can be used as a shielding layer to reduce crosstalk between embedded chips or interference from external electromagnetic waves to the sensor chip.
[0079] In some embodiments, the insulating layer 115 includes a first type of insulating layer and a second type of insulating layer 107. The first type of insulating layer is located between the first groove 102 and the substrate 100 and the acoustic-electric conversion layer 120. The second type of insulating layer 107 is located between the first type of insulating layer and the top electrode layer 123. The second type of insulating layer 107 is used to achieve insulation between the bottom electrode layers 121, insulation between the bottom electrode layer 121 and the top electrode layer 123, and isolation between the top electrode layer 123 of the acoustic-electric conversion layer 120 and other interconnects on the surface. Referring to FIG2, the first type of insulating layer includes a first insulating layer 105.
[0080] In some embodiments, referring to FIG3, the interconnect layer 114 includes: a first interconnect layer 101 located between the substrate 100 and the acoustic-electric conversion layer 120; a second interconnect layer 108 extending through the thickness of the substrate 100 and used to connect the signal processing chip 110 and the bottom electrode layer 121; and an insulating layer 115 including a first insulating layer 105 and a second insulating layer 109, wherein the first insulating layer 105 is located between the substrate 100 and the acoustic-electric conversion layer 120, and the second insulating layer 109 is located between the first recess 102 and the second interconnect layer 114 and the substrate 100. Thus, the signal processing chip 110 is placed on the side away from the acoustic-electric conversion layer 120, and both ends of the signal processing chip 110 can be connected to the interconnect layer 114 and subsequent pads, respectively, reducing the length of the in-plane pads and thereby reducing the manufacturing cost.
[0081] In some embodiments, the insulating layer 115 is made of materials such as epoxy resin, photosensitive polyimide (PSPI), and benzocyclobutene (BCB).
[0082] In some embodiments, an adhesive layer 103 is provided between the signal processing chip 110 and the substrate 100. The material of the adhesive layer 103 includes, but is not limited to, epoxy resin, DAF (Die Attach Film), and other adhesives.
[0083] The ultrasonic sensor solution provided in this application includes: a substrate 100, a signal processing chip 110, an electrical conversion layer, and an interconnect layer 114. A first groove 102 is formed in the substrate 100, and the signal processing chip 110 is embedded in the first groove 102. Then, the electrical connection between the signal processing chip 110 and the circuit conversion layer and the subsequent circuit board is realized through the interconnect layer 114. This can increase the detection area of the sensor chip while reducing the manufacturing cost.
[0084] Accordingly, another embodiment of this application provides a method for preparing an ultrasonic sensor, which is used to prepare the ultrasonic sensor provided in the above embodiment. The same or corresponding technical features as those in the above embodiment will not be described in detail here.
[0085] Figures 4 to 13 are cross-sectional views of the ultrasonic sensor corresponding to each step of the preparation method of the ultrasonic sensor provided in another embodiment of this application.
[0086] It should be noted that the ultrasonic sensor fabrication method shown in Figure 2 is used as an example in this application embodiment. The ultrasonic sensor fabrication method shown in Figure 3 can be referred to the ultrasonic sensor fabrication method shown in Figure 2. The different parts will be described in another embodiment.
[0087] Referring to Figure 4, the fabrication method includes: providing a substrate 100.
[0088] In some embodiments, the substrate 100 may be made of a semiconductor material, glass, or polyimide, and the semiconductor material may include silicon, silicon germanium, or germanium. The substrate 100 may be the substrate of a CMOS chip, i.e., the acoustic-electric conversion layer 120 is located on the CMOS chip. The thickness of the substrate 100 ranges from 50 μm to 150 μm.
[0089] Referring again to Figure 4, the fabrication method includes: firstly, forming the required pattern of the first interconnect layer 101 and the pad area on the upper surface of the substrate 100 by means of coating, photolithography and development; then, fabricating the first interconnect layer 101 and the pad area on the substrate 100 by means of sputtering or electron beam evaporation.
[0090] In some embodiments, the interconnect traces can be made of transparent or non-transparent conductive materials. For example, at least one of the following metals: aluminum (Al), copper (Cu), gold (Au), and platinum (Pt), or inorganic conductive materials such as indium tin oxide (ITO). The pad material is primarily metallic.
[0091] In some embodiments, a pixel circuit can be fabricated in the region corresponding to the acoustic-electric conversion layer on the surface of the substrate 100. The pixel circuit is connected to the bottom electrode in the acoustic-electric conversion layer through the interconnect layer above, and controls the on / off state of the bottom electrode or performs primary amplification of the signal.
[0092] Referring to Figure 5, the fabrication method includes: forming a pattern of the first groove 102 region on the upper surface of the substrate 100 by means of coating, photolithography and development; and etching the first groove 102 with a set depth and size on the upper surface of the substrate 100 using a deep reactive ion etching (DRIE) process, wherein the depth of the first groove 102 can be 50μm to 100μm.
[0093] Referring to Figure 6, the fabrication method includes: thinning the back side of the signal processing chip 110 wafer that has undergone CP (Chip probing) testing, then attaching the wafer to the DAF film and cutting it into dies, positioning the dies with the front side facing up using a pick-up method, and attaching them to the first groove 102 on the substrate 100.
[0094] In some embodiments, adhesive can be applied first inside the first groove 102, and then the diced dies can be placed inside the first groove 102.
[0095] Referring to Figure 7, the fabrication method includes: firstly, forming the required pattern of the third interconnect layer 104 on the upper surface of the substrate 100 by means of coating, photolithography and development, and then fabricating the third interconnect layer 104 on the signal processing chip 110 by means of sputtering or electron beam evaporation.
[0096] Referring to Figure 8, the fabrication method includes: under vacuum conditions, processing an insulating layer, namely a first type of insulating layer, on the surface of the substrate 100 by solution coating or dry film lamination. The insulating layer covers the surface of the substrate 100 and fills the gap between the grains and the first groove 102. The first type of insulating layer includes a first insulating layer 105.
[0097] In some embodiments, the insulating layer is made of materials such as epoxy resin, photosensitive polyimide (PSPI), and benzocyclobutene (BCB).
[0098] Referring to Figure 9, the fabrication method includes: forming a through-hole pattern on the first insulating layer 105 by photolithography and development, and then filling the through-hole with conductive material by sputtering or electroplating to serve as a conductive channel between the first interconnect layer 101 and the next interconnect layer, i.e., the connection layer 106.
[0099] Referring to Figure 10, the fabrication method includes: depositing a conductive layer on the surface of the substrate 100 by means of sputtering, electron beam evaporation or electroplating, and then processing the second interconnect layer, namely the bottom electrode layer 121, by means of photolithography and etching.
[0100] In some embodiments, repeated processing of conductive layers, insulating layers, and vias can form a multilayer interconnect layer that meets the requirements.
[0101] In some embodiments, the material of the bottom electrode layer 121 includes metals, metal compounds, indium tin oxide (ITO), and the like. The thickness of the bottom electrode layer 121 ranges from 0.1 μm to 1 μm.
[0102] Referring to Figure 11, the preparation method includes: under vacuum conditions, processing an insulating layer, namely the second type of insulating layer 107, on the surface of the substrate 100 by solution coating or dry film lamination.
[0103] Referring to Figure 12, the preparation method includes: processing the piezoelectric layer 122 on the bottom electrode layer 121 by spin coating, spraying or screen printing.
[0104] In some embodiments, the piezoelectric layer 122 may be made of an organic polymer. The piezoelectric layer 122 may also be a mixture of piezoelectric ceramic and adhesive. The thickness of the piezoelectric layer 122 ranges from 8 μm to 30 μm. The side surface of the piezoelectric layer 122 forms an angle with the surface of the substrate 100, where the angle α ranges from 0 to 90°.
[0105] Referring to Figure 13, the preparation method includes: then using screen printing, sputtering, or a combination of both methods to process a top electrode layer 123 above the piezoelectric layer.
[0106] In some embodiments, the top electrode layer 123 may be made of a metallic material, including but not limited to Au, Ag, Cu, or Ni; or it may be a printing ink made of epoxy resin and silver nanoparticles. The thickness of the top electrode layer 123 ranges from 0.1 μm to 30 μm.
[0107] Referring to Figure 2, the fabrication method includes: preparing a protective layer 124 by coating, deposition or attachment; thinning and polishing the substrate 100 to control the final ultrasonic sensor chip thickness to be less than 150 μm.
[0108] In some embodiments, the protective layer 124 can be made of various polymer materials. The protective layer 124 can also be made of metallic materials, including but not limited to Au, Ag, Cu, or Ni; the protective layer can be a single layer or a combination of multiple layers. The thickness of the protective layer 124 ranges from 10 μm to 40 μm.
[0109] The difference between the ultrasonic sensor shown in Figure 3 and the ultrasonic sensor shown in Figure 2 lies in the steps shown in Figures 5-8. The differences are as follows:
[0110] In another embodiment, referring to FIG3, the fabrication method includes: forming a pattern of a first groove 102 region on the lower surface of the substrate 100 away from the first interconnect layer 101 by means of resist coating, photolithography, and development; and etching the first groove 102 of a set depth and size on the lower surface of the substrate 100 using a deep silicon etching process. The fabrication method includes: back-side thinning of the signal processing chip 110 wafer after CP detection, then attaching the wafer to a DAF film and dicing it into dies; positioning the dies with their front faces facing up using a pick-up method and attaching them into the first groove 102 on the substrate 100. The fabrication method includes: etching the substrate 100 to form vias, exposing the bottom of the vias to expose the signal processing chip 110, and forming a second interconnect layer 108. The fabrication method includes: under vacuum conditions, processing an insulating layer, namely a first insulating layer 105 and a second insulating layer 109, on the surface of the substrate 100 by means of solution coating or dry film lamination; the insulating layer covers the surface of the substrate 100, fills the vias, and fills the gap between the dies and the first groove 102.
[0111] Accordingly, according to some embodiments of this application, another aspect of this application provides an ultrasonic fingerprint recognition module and an electronic device, including an ultrasonic sensor as described in any of the above embodiments and an ultrasonic sensor prepared by the ultrasonic sensor preparation method as described in any of the above embodiments. The same or corresponding technical features as those in the above embodiments will not be described in detail here.
[0112] Ultrasonic fingerprint recognition technology utilizes the ability of ultrasound to penetrate materials and generate echoes of varying magnitudes depending on the material (i.e., the energy and path of the reflected ultrasound waves differ depending on the surface of the material). Therefore, by using the difference in acoustic impedance between skin and air, the location of fingerprint ridges and valleys can be distinguished.
[0113] Figure 14 is a top view of an ultrasonic fingerprint recognition module provided in another embodiment of this application; Figure 15 is a cross-sectional view of an ultrasonic fingerprint recognition module provided in another embodiment of this application; Figure 16 is a schematic diagram of a structure for fingerprint recognition of the electronic device corresponding to Figure 15.
[0114] Referring to Figures 14 and 15, the ultrasonic fingerprint recognition module includes: an ultrasonic sensor and a circuit board as shown in Figure 2; the ultrasonic sensor also includes: a pad 210, which is located on the substrate 100; the pad 210 is electrically connected to the signal processing chip 110 and the top electrode layer 123 respectively; wherein, the circuit board is electrically connected to the pad 210.
[0115] In some embodiments, the pad 210 includes: a first pad 211 located on the top surface of the top electrode layer 123 away from the bottom electrode layer 121; and a second pad 212 located on the bottom electrode layer 121; the circuit board is electrically connected to the first pad 211 and the second pad 212 respectively.
[0116] In some embodiments, the circuit board includes: a substrate 200, a reinforcing member 224, a passive device 221, a boost chip 222, and a connector 223. The substrate 200 is connected to the ultrasonic sensor via low-temperature bonding, the bonding medium including but not limited to anisotropic conductive adhesive (ACF). When the ultrasonic sensor is operating, the embedded signal processing chip 110 controls the boost chip 222 on the substrate 200 to provide a high-voltage drive signal to the acoustic-to-electric conversion layer 120. The signal processing chip 110 is also responsible for processing the ultrasonic echo signal received by the acoustic-to-electric conversion layer 120 and transmitting the fingerprint acquisition data to the main control chip of the back-end system via the connector 223.
[0117] In some embodiments, the substrate 200 may be a flexible substrate.
[0118] Referring to Figure 16, the electronic device includes: an ultrasonic sensor 10 as shown in Figure 2 or an ultrasonic fingerprint recognition module as shown in Figure 15.
[0119] In some embodiments, the ultrasonic fingerprint recognition module includes an ultrasonic sensor 10 and a circuit board 20.
[0120] In some embodiments, the electronic device may be a computer, tablet computer, personal digital assistant, mobile phone, etc.
[0121] In some embodiments, the electronic device includes a screen 32. In this application embodiment, the back side of the substrate 100 of the ultrasonic sensor can be bonded to the underside of the screen 32 of the electronic device through an adhesive layer 31 for under-screen ultrasonic biometric detection.
[0122] Figure 17 is another cross-sectional view of an ultrasonic fingerprint recognition module provided in another embodiment of this application; Figure 18 is a schematic diagram of a fingerprint recognition structure of the electronic device corresponding to Figure 17.
[0123] Referring to Figure 17, the ultrasonic fingerprint recognition module includes: an ultrasonic sensor and a circuit board as shown in Figure 3; the ultrasonic sensor also includes: a pad 210, which is located on the substrate 100; the pad 210 is electrically connected to the signal processing chip 110 and the top electrode layer 123 respectively; wherein, the circuit board is electrically connected to the pad 210.
[0124] Referring to Figure 18, the electronic device includes: an ultrasonic sensor as shown in Figure 3 or an ultrasonic fingerprint recognition module as shown in Figure 17.
[0125] In some embodiments, the electronic device includes a screen 32. In this application embodiment, the front side of the substrate 100 of the ultrasonic sensor (i.e., the surface of the acoustic-electric conversion layer 120) can be bonded to the underside of the screen 32 of the electronic device through an adhesive layer 31 for under-screen ultrasonic biometric detection.
[0126] Figure 19 is another cross-sectional view of an ultrasonic fingerprint recognition module provided in another embodiment of this application; Figure 20 is a schematic diagram of a fingerprint recognition structure of the electronic device corresponding to Figure 19.
[0127] Referring to Figure 19, the ultrasonic fingerprint recognition module includes: an ultrasonic sensor and a circuit board as shown in Figure 2; the ultrasonic sensor also includes: a pad 210, which is located on the substrate 100; the pad 210 is electrically connected to the signal processing chip 110 and the top electrode layer 123 respectively; wherein, the circuit board is electrically connected to the pad 210.
[0128] Referring to FIG19, in some embodiments, the ultrasonic sensor further includes: a conductive post 213, which penetrates the thickness of the substrate 100 and is electrically connected to the interconnect layer 114 near the bottom surface of the substrate 100; and a pad 210 located on the side of the substrate 100 away from the acoustic-electric conversion layer 120 and electrically connected to the conductive post 213.
[0129] Referring to Figure 20, the electronic device includes: an ultrasonic sensor as shown in Figure 2 or an ultrasonic fingerprint recognition module as shown in Figure 19.
[0130] In some embodiments, the electronic device includes a screen 32. In this application embodiment, the front side of the substrate 100 of the ultrasonic sensor (i.e., the surface of the acoustic-electric conversion layer 120) can be bonded to the underside of the screen 32 of the electronic device through an adhesive layer 31 for under-screen ultrasonic biometric detection.
[0131] Figure 21 is another top view of an ultrasonic fingerprint recognition module provided in another embodiment of this application; Figure 22 is a cross-sectional view of the section along the axis of the signal processing chip in Figure 21; Figure 23 is a cross-sectional view of the section along the axis of the boost chip in Figure 21.
[0132] Referring to Figures 21-23, in some embodiments, the circuit board includes a boost chip 222. The substrate 100 also has a second groove 125, the boost chip 222 is located within the second groove 125, an insulating layer fills the second groove 125, and the boost chip 222 is electrically connected to the pad 210. The ultrasonic sensor simultaneously embeds a signal processing chip 110 and the boost chip 222. During operation, the embedded signal processing chip 110 controls the boost chip 222 to provide a high-voltage drive signal to the acoustic-to-electric conversion layer 120. The signal processing chip 110 is also responsible for processing the ultrasonic echo signal received by the acoustic-to-electric conversion layer 120 and transmitting the fingerprint acquisition data to the main control chip of the back-end system through the connector 223. This ultrasonic fingerprint recognition module can achieve a larger area of ultrasonic fingerprint recognition function with lower process costs.
[0133] In some embodiments, the electronic device includes: an ultrasonic sensor as shown in FIG2 or FIG3 or an ultrasonic fingerprint recognition module as shown in FIG21.
[0134] Electronic devices can be computers, tablets, personal digital assistants, mobile phones, etc.
[0135] In some embodiments, the back side of the ultrasonic sensor substrate can be bonded to the underside of the screen of an electronic device via an adhesive layer for under-screen ultrasonic biometric detection; or, the front side of the ultrasonic sensor substrate (i.e., the surface of the acoustic-electric conversion layer) can be bonded to the underside of the screen of an electronic device via an adhesive layer for under-screen ultrasonic biometric detection.
[0136] Those skilled in the art will understand that the above embodiments are specific examples of implementing this application, and in practical applications, various changes in form and detail can be made without departing from the spirit and scope of this application. Any person skilled in the art can make various alterations and modifications without departing from the spirit and scope of this application; therefore, the scope of protection of this application should be determined by the scope defined in the claims.
Claims
1. An ultrasonic sensor, comprising: A substrate (100) having a first groove (102) therein; A signal processing chip (110) is located within the first recess (102); An insulating layer (115) is located on the substrate (100) and within the first groove (102); an acoustic-electric conversion layer (120) is located on the insulating layer (115), the acoustic-electric conversion layer (120) includes: a stacked bottom electrode layer (121), a piezoelectric layer (122), a top electrode layer (123) and a protective layer, the bottom electrode layer (121) being located on the insulating layer (115); An interconnect layer (114) is located between the substrate (100) and the acoustic-electric conversion layer (120), and the interconnect layer (114) is used to connect the signal processing chip (110) and the bottom electrode layer (121).
2. The ultrasonic sensor according to claim 1, wherein, The signal processing chip (110) includes a first surface (111) and a second surface (112) opposite to each other. The first surface (111) is attached to the bottom surface of the first groove (102), and the second surface (112) is connected to the interconnect layer (114).
3. The ultrasonic sensor according to claim 1 or 2, wherein, The side of the piezoelectric layer (122) forms an angle with the surface of the substrate (100), and the angle α is in the range of 0 < α < 90°.
4. The ultrasonic sensor according to claim 1, wherein, The interconnect layer (114) includes: a first interconnect layer (101) located between the substrate (100) and the acoustic-electric conversion layer (120); a second interconnect layer (108) extending through the thickness of the substrate (100) and used to connect the signal processing chip (110) and the bottom electrode layer (121); the insulating layer (115) includes a first insulating layer (105) and a second insulating layer (109), the first insulating layer (105) located between the substrate (100) and the acoustic-electric conversion layer (120), and the second insulating layer (109) located between the first groove (102) and the second interconnect layer (108) and the substrate (100).
5. The ultrasonic sensor according to any one of claims 1, 2, or 4, wherein, An adhesive layer is present between the signal processing chip (110) and the substrate (100).
6. An ultrasonic fingerprint recognition module, comprising: The ultrasonic sensor and circuit board as described in any one of claims 1 to 5; The ultrasonic sensor further includes: a pad (210) located on a substrate (100); the pad (210) is electrically connected to the signal processing chip (110) and the top electrode (123) respectively; The circuit board is electrically connected to the pad (210).
7. The ultrasonic fingerprint recognition module according to claim 6, wherein, The pad (210) includes: a first pad (211) located on the top surface of the top electrode layer (123) away from the bottom electrode layer (121); and a second pad (212) located on the bottom electrode layer (121); the circuit board is electrically connected to the first pad (211) and the second pad (212) respectively.
8. The ultrasonic fingerprint recognition module according to claim 6, wherein, Also includes: The conductive pillar (213) penetrates the thickness of the substrate (100) and is electrically connected to the interconnect layer (114) near the bottom surface of the substrate (100); the pad (210) is located on the side of the substrate (100) away from the acoustic-electric conversion layer (120) and is electrically connected to the conductive pillar (213).
9. The ultrasonic fingerprint recognition module according to claim 6, wherein, The circuit board includes a boost chip (222), the substrate (100) further having a second groove (125), the boost chip (222) being located in the second groove (125), the insulating layer (115) filling the second groove (125), and the boost chip (222) being electrically connected to the pad (210).
10. An electronic device, comprising: The ultrasonic sensor as described in any one of claims 1 to 5 or the ultrasonic fingerprint recognition module as described in any one of claims 6 to 9.