Parallel power modules with suppression of gate oscillation

Abstract

The present invention provides an electric power device comprising a plurality of power modules (PM1, PM2, PM3) each comprising at least one controllable wide bandgap semiconductor switch (SW1, SW2), wherein the plurality of power modules (PM1, PM2, PM3) are connected in parallel to an external power terminal (P_O). A gate driver system (GDS) serves to generate gate drive signals (GS) to the plurality of power modules (PM1, PM2, PM3). The gate driver system (GDS) comprises a master unit (M) and a plurality of connected slave driver units. The master unit (M) is configured to generate an electric power output (PWO, V+, V-, GND) and a gate control output (GCO). Each of the slave driver units (S1, S2, S3) are configured for connection to the electric power output (PWO) and the gate control output (GCO) of the master unit (M), and they each comprises a gate output (G_O) configured to output a gate control signal (GS) to a gate input (G) of one of the plurality of power modules (PM1, PM2, PM3) in response to the gate control output (GCO) of the master unit (M). A source output (S_O) is configured for connection to a source input (S) of the one of the plurality of power modules (PM1, PM2, PM3). To avoid high frequency gate voltage oscillations, a damping circuit (R, C) with at least a resistor (R) is connected between the gate output (G_O) and the source output (S_O). Further, decoupling inductors (I1, I2, I3) are connected to respective terminals configured for connection to the electric power output (PWO) of the master unit (M). This allows a low cost way of parallel connecting power module without instability problem due to gate oscillations, which can cause failure or permanent damage.

Description

[0001] 85130PC01

[0002] 1

[0003] PARALLEL POWER MODULES WITH SUPPRESSION OF GATE OSCILLATION

[0004] FIELD OF THE INVENTION

[0005] The present invention relates to power electronics. Especially, the invention realtes to a power module with parallel connected semiconductor switches. More specifically, the invention provides a power device with parallel connected power modules, e.g. SiC or GaN or GazOs semiconductor based power modules, and with components serving to suppress gate oscillation.

[0006] BACKGROUND OF THE INVENTION

[0007] Electric power converters implemented with wide-bandgap semiconductor material technologies such as gallium nitride (GaN) and silicon carbide (SiC) and gallium oxide (GazOs) can operate at a wide range of switching frequencies, e.g. from 1 kHz to several 10s MHz.

[0008] These technologies allow high efficiency power conversion, DC-AC, AC-DC, DC-DC or AC-AC, and with several power modules combined, it is possible to reach power handling in order of 10s of kW or even 10s of MW.

[0009] However, in practical implementations wide-bandgap semiconductor based power modules have proven to introduce a number of problems with instability, and these instability problems can be detrimental to the overall function of the system and can even lead to permanent damage of the power module.

[0010] For example, a number of single-chip semiconductor devices can be combined to form a multi-chip power module thereby having a plurality of parallel connected semiconductor switches, thus offering an increased current capacity. Further, such multi-chip power modules can be combined to obtain an even higher power handling capacity.

[0011] However, in practical implementations such combined power modules often cause significant instability problems caused by parasitics.85130PC01

[0012] 2

[0013] Especially, it has been observed that power modules with parallel connected semiconductor switches can suffer from instability problems due to high frequency gate oscillations, i.e. oscillations in the gate-source voltage. Such gate oscillations disturb the switching function of the power module and can cause permanent damage of the power modules.

[0014] Such gate oscillation problems can be solved by using individual isolated power supplies and gate drivers for each power module. However, this is a highly expensive solution which is not acceptable in many application. Furthermore, such solution can cause current imbalances between the power modules due to timing mismatch caused by different delays.

[0015] SUMMARY OF THE INVENTION

[0016] Following the above, it may be seen an object of the present invention to provide a solution to the problem of avoiding gate oscillations in a device with parallel connected power modules.

[0017] In a first aspect, the invention provides an electric power device comprising an external power terminal, the power device comprising:

[0018] - a plurality of power modules each comprising at least one controllable wide bandgap semiconductor switch, wherein the plurality of power modules are connected in parallel to the external power terminal, and

[0019] - a gate driver system configured to generate gate drive signals to the plurality of power modules, the gate driver system comprising:

[0020] - a master unit configured to generate an electric power output and a gate control output, and

[0021] - a plurality of slave driver units each being configured for connection to the electric power output and the gate control output of the master unit, wherein each of the plurality of slave driver units comprises:

[0022] - a gate output configured to output a gate control signal to a gate input of one of the plurality of power modules in response to the gate control output of the master unit,

[0023] - a source output configured for connection to a source input of the one of the plurality of power modules,85130PC01

[0024] 3

[0025] - a damping circuit comprising at least a resistor, wherein the damping circuit is connected between the gate output and the source output and being configured to damp high frequency gate oscillations, such as an oscillation within 1-1000 MHz, and

[0026] - decoupling inductors connected to respective terminals configured for connection to the electric power output of the master unit.

[0027] This power device is advantageous since the master and slave configuration of the gate driver system allows use of only one isolated power supply and signal processing circuit to be shared among several parallel connected power modules. This allows a low cost implementation and still achieve a high power output of parallel connected power modules without suffering from gate oscillation problems that can cause failure or permanent damage of the power device. Furthermore, compared to a solution with individual power supplies and gate drivers for each power module, provides simplified connections.

[0028] The invention is based on the inventors' insight, that high frequency gate oscillations, e.g. in the range 1-1000 MHz, caused by parasitics lead to instability problems when parallel connecting wide-bandgap semiconductors. The proposed simple damping circuit combined with decoupling inductors significantly reduces the gate oscillations and thereby mitigate the instability problems. In this way, it is still possible to share only one isolated power supply and signal processing circuit in a master unit, while the gate drivers are provided as slave units which can be located close to the respective power modules.

[0029] Since the damping circuit is connected between the semiconductor components where there is a low DC voltage difference, the damping circuit, especially its resistor, will absorb only mainly high frequency energy while only provide an insignificant power loss due to DC.

[0030] In its simplest form, the damping circuit can be implemented by a single resistor component, or a resistor and a capacitor in series, and it is therefore rather simple to implement. Likewise, the decoupling inductors are also simple to implement.85130PC01

[0031] 4

[0032] It is to be understood that the slave driver units can be more or less integrated with the power modules, depending on the preferences in a specific implementation.

[0033] The invention is highly suited for parallel single-chip modules but also for parallel multi-chip modules.

[0034] The inventors have specifically tested a device with three A power modules in parallel connection in a Double Pulse Test (DPT) at 6 kV / 15 A operation. The power module configuration was half-bridge. In the test, a switching speed of 40 V / ns was used. Without the damping circuit and decoupling inductors, a divergent high frequency gate oscillation was observed, which caused instability problems. Especially, a significant 60 MHz oscillation was observed. With the damping circuit and decoupling inductors, a clean gate voltage switching was observed.

[0035] Furthermore, a DPT with the three parallel power modules was performed at 90 A, confirming also a clean switching performance, thereby indicating that the proposed master-slave configuration of the gate driver system is successful.

[0036] In the following, preferred features and embodiments will be described.

[0037] Here and in the following "connected" means electrically connected.

[0038] Here and in the following "component X being connected between A and B" means that one terminal of component X is connected to A and another terminal of component X is connected to B.

[0039] By "AC output signal" is meant to include that the power circuit outputs a stepped voltage waveform which can approximate an AC signal.

[0040] A preferred range of the resistance value for the resistor of the damping circuit is 10 mQ to 10 kQ, e.g. a resistance value of 1 Q to 1 kQ, depending on the actualt circuit implementation.85130PC01

[0041] 5

[0042] In preferred embodiments, the damping circuit comprises a series connection of a resistor and a capacitor. The capacitance of the capacitor may be 10 pF to 10 pF, e.g. a capacitance of 1 nF to 1 pF.

[0043] In preferred embodiments, the inductance value of each of the decoupling inductors is in the range 10 nH to 10 mH, such as in the range 100 nH to 1 mH.

[0044] In some embodiments, the decoupling inductors of each of the slave driver units comprises first, second and third decoupling inductors connected to respective first, second and third electric power output terminals of the master unit.

[0045] Specifically, the first, second and third electric power output terminals of the master unit may be: a positive voltage terminal, a negative voltage terminal, and an electric ground terminal, respectively.

[0046] In preferred embodiments, each of the slave driver units are configured to receive an electric gate control output from the master unit and to generate the gate control signal in response thereto. Thus, preferably, the slave driver units each has an receiver connected to an electric generator which converts a received electric signal, e.g. a Pulse Width Modulation (PWM) signal, to an electric gate control signal at the gate output.

[0047] The master unit preferably comprises an isolated power supply configured to generate the electric power output in response to an electric power source.

[0048] Specifically, the isolated power supply has a positive voltage output terminal, a negative voltage output terminal, and an electric ground terminal.

[0049] The master unit is preferably configured to receive an optical gate control input and to generate the gate control output, e.g. an optical or electrical gate control output, in response thereto.

[0050] The at least one controllable wide bandgap semiconductor switch preferably comprises one semiconductor switch implemented as Silicium Carbide (SiC) or Gallium Nitride (GaN) or Gallium Oxide (e.g. Gallium (III) Oxide, GazOs). The at least one controllable wide bandgap semiconductor switch preferably comprises one semiconductor switch being an IGBT or a MOSFET.85130PC01

[0051] 6

[0052] This invention is suited for parallel single-chip modules as well as parallel multichip modules. Thus, each power module can be single-chip or multi-chip. For example, to provide a 20 kW converter, only 10 kW and a 50 kW module are available on the market. The secondary one is expensive, however by applying the invention, two 10 kW modules in parallel can be used to provide a 20 kW output.

[0053] The plurality of power modules may comprise at least three, such as at least four power modules, e.g. 3-10 power modules. Especially, the plurality of power modules are identical modules. Further, the corresponding slave driver units may also be identical slave driver units. In this way, a flexible and scalable power device can be provided based on standard components.

[0054] The plurality of power modules may be configured to handle a voltage of at least 100 V, such as at least 300 V, such as at least 500 V, such as at least 1 kV, such as at least 5 kV, such as at least 10 kV.

[0055] The external power terminal is preferably configured to output a current of at least 10 A, such as at least 30 A, such as at least 50 A, such as at least 100 A.

[0056] The gate driver system is preferably configured to generate gate drive signals to switch the at least one controllable wide bandgap semiconductor switch of each of the plurality of power modules at a switching frequency of at least 1 kHz, such as at least 10 kHz, such as at least 100 kHz, such as at least 500 kHz, such as at least 1 MHz, such as at least 5 MHz, such as at least 10 MHz.

[0057] The master unit and the plurality of slave driver units may be implemented on separate circuit boards. In this way, the slaver driver units can be located close to the power modules, while the master unit is located away from the power modules. However, the master unit and the slave driver units may also be placed together at one single board.

[0058] The external power terminal preferably comprises a power input terminal and a power output terminal, wherein the plurality of power modules are connected in85130PC01

[0059] 7

[0060] parallel to the power output terminal, and wherein each of the plurality of power modules are connected to the power input terminal. Thus, the power modules receive the same input voltage and output their power output to the power output terminal.

[0061] Each of the plurality of power modules preferably comprises at least two controllable wide bandgap semiconductor switches, such as connected in a halfbridge configuration. However, there are also single switch module available on the market, and these can also be parallel connected by applying the invention.

[0062] In specific embodiments, at least one of the plurality of power modules comprises at least one stabilizer circuit comprising a resistor, such as having a 1-100 resistance, connected between first and second terminals, wherein the first and second terminals of the stabilizer circuit are connected to:

[0063] 1) respective drain connections of the first and second controllable semiconductor switches, or

[0064] 2) respective source connections of the first and second controllable semiconductor switches,

[0065] wherein the stabilizer circuit is configured to damp an electric high frequency oscillation in the power module, such as an oscillation within 1-1000 MHz caused by parasitics. This embodiment allows parallel connected switches in each power module without any internal stability problem due to the stabilizer circuit, e.g. implemented as a resistor only having a resistance of 1-100 Q, depending on the actual power module implementation and components.

[0066] The electric power device of the first aspect has a large number of applications, since it provides a high efficient and yet simple and low cost power handling system which is capable of being scaled to very high power handling capacities without any instability problems.

[0067] Especially, the electric power device can be used as an electric power converter.

[0068] In a second aspect, the invention provides an electric power converter comprising:

[0069] - a power input terminal and a power output terminal, and85130PC01

[0070] 8

[0071] - at least one power device according to the first aspect, wherein the power output terminal is connected to the external power terminal of the at least one power device.

[0072] Especially, the power input terminal is configured to receive a DC voltage, and wherein the plurality of power modules are arranged to convert the DC voltage to an AC voltage or a DC voltage at the power output terminal.

[0073] Especially, the power input terminal is configured to receive an AC voltage, and wherein the plurality of power modules are arranged to convert the DC voltage to an AC voltage or a DC voltage at the power output terminal.

[0074] In a third aspect, the invention provides an electric system comprising:

[0075] - at least one power device according to the first aspect,

[0076] - an electric power source connected to deliver electric power to a power input terminal of the at least one power device, and

[0077] - an electric device connected to receive electric power from the external power terminal of the at least one power device.

[0078] Especially, the electric power source may comprise a renewable energy source, such as a wind turbine generator, such as a photovoltaic solar panel.

[0079] Especially, the electric device comprises at least one of: an electric vehicle, an electrolyzer system, a battery charging system, a photovoltaic solar panel, a wind turbine generator, and an electric motor driver.

[0080] Thus, the system according to the third aspect is suited as part of high power conversion systems in renewable energy generating systems, power storage, and Power-to-X etc.

[0081] In a fourth aspect, the invention provides a method for damping high frequency gate oscillations in an electric power device comprising an external power terminal, the method comprises:85130PC01

[0082] 9

[0083] - providing a plurality of power modules each comprising at least one controllable wide bandgap semiconductor switch,

[0084] - connecting the plurality of power modules in parallel to the external power terminal,

[0085] - providing a master unit configured to generate an electric power output and a gate control output,

[0086] - providing a plurality of slave driver units each comprising:

[0087] - a damping circuit comprising at least a resistor, wherein the damping circuit is connected between a gate output and a source output and being configured to damp high frequency gate oscillations, such as an oscillation within 1-1000 MHz, and

[0088] - decoupling inductors connected to respective terminals configured for connection to the electric power output of the master unit,

[0089] - connecting each of the plurality of slave driver units to the electric power output and the gate control output of the master unit,

[0090] - applying an input voltage to the plurality of power modules,

[0091] - applying a switching input to the master unit according to a switching scheme, and

[0092] - generating an output voltage at the external power terminal accordingly.

[0093] Features and embodiments of the mentioned aspects of the present invention may each be combined with each other. These and other aspects of the invention will be apparent from and elucidated with reference to the embodiments described hereinafter.

[0094] BRIEF DESCRIPTION OF THE FIGURES

[0095] The present invention and in particular preferred embodiments thereof will now be disclosed in more detail with regard to the accompanying figures. The figures show ways of implementing the present invention and are not to be construed as being limiting to other possible embodiments falling within the scope of the attached claim set.

[0096] FIG. 1 illustrates a block diagram of an embodiment,85130PC01

[0097] 10

[0098] FIG. 2 illustrates a circuit diagram with more details of slave driver unit embodiment,

[0099] FIG. 3 illustrates a circuit diagram of a power module embodiment with two semiconductor switches and a stabilizer circuit,

[0100] FIG. 4a shows a graph illustrating measured gate voltages versus time for a power device with three parallel power modules without the proposed decoupling inductors and damping circuit, a divergent high frequency gate oscillation is seen, FIG. 4b shows a graph similar to that in FIG. 4a, here with the proposed decoupling inductors and damping circuit, now gate oscillation are seen to be significantly reduced, and

[0101] FIG. 5 illustrates steps of a method embodiment.

[0102] DETAILED DESCRIPTION OF EMBODIMENTS

[0103] FIG. 1 illustrates a block diagram of an electric power device embodiment where three power modules PM1, PM2, PM3 are connected in parallel to the external power output terminal P_O. Each of the power modules PM1, PM2, PM3 are based on at least one controllable wide bandgap semiconductor switch SW1 with a gate G, source S and drain D. The power modules PM1, PM2, PM3 may include more switches in configurations as known in the art.

[0104] A gate driver system GDS serves to provide gate drive signals GS to the gates G of the switches SW1 of the power modules PM1, PM2, PM3 for control of the switching operation. The switching operation is determined externally to the gate driver system GDS, here illustrates as an optical input signal O_S. Further, the gate driver system receives electric power from an external power supply EPS.

[0105] The gate driver system GDS has a master unit M which controls operation of three slave driver units SI, S2, S3, one slave drive unit for each power module.

[0106] In the master unit M an isolated power supply IPS serves to generate an electric power output PWO based on the mentioned external electric power input EPS, e.g. involving an electric transformer to provide electric isolation. In this way electric power for driving the slave driver units SI, S2, S3 can be provided, e.g. as a positive voltage output, a negative voltage output and electric ground85130PC01

[0107] 11

[0108] connections from the electric power output PWO. This power output PWO can then be supplied to the slave driver units SI, S2, S3 by means of electric wires.

[0109] In the master unit M a driving signal receiver DSR generates an electric gate control output GCO based on the mentioned external optical input signal O_S. Hereby, the gate control output GCO determining the switching operation timing can be communicated to the slave driver units SI, S2, S3 by means of electric wires.

[0110] Each of the slave driver units SI, S2, S3 are connected to receive the mentioned electric power output PWO and the electric gate control output GCO from the master unit M. In response, the slave driver units SI, S2, S3 are configured to output gate control signals GS to the respective gate inputs G of the switch SW1 (or switches) of the power modules PM1, PM2, PM3 and thereby control switching operation of the power modules PM1, PM2, PM3.

[0111] The configuration of the gate driver system GDS with one master unit M implemented as one unit separate from separate slaver driver units SI, S2, S3, a flexible system is provided which is simple to connect and which can easily be designed to avoid switching timing mismatch due to different delays. Further, since only one isolated power supply IPS is necessary, the gate driver system GDS can be implemented with low costs. However, experiments have shown that the this configuration can suffer from high frequency, e.g. 1-1000 MHz, gate voltage oscillation problems which can cause failure or even permanent damage of the power modules PM1, PM2, PM3. The inventors have realized that this can be mitigated by features of the slave driver units SI, S2, S3 which will be explained by the embodiment shown in FIG. 2.

[0112] FIG. 2 illustrates an embodiment of the slave driver units SI, S2, S3 of FIG. 1 which mitigates the problem of gate oscillations.

[0113] In the shown embodiment, the slave driver units SI, S2, S3 receive electric input power from the master unit M in the form of inputs V+, V-, GND. Each of these electric inputs V+, V-, GND has a decoupling inductor II, 12, 13 connected in series to ensure electric decoupling from the master unit M. The decoupling85130PC01

[0114] 12

[0115] inductors II, 12, 13 can be designed with an inductance value which is determined based on the specific design of the master unit M and the power modules PM1, PM2, PM3. For example, the inductance value can be in the range 10 nH to 10 mH.

[0116] An electric gate control signal PWM from the master unit M is applied to a gate control signal generator which generates the appropriate gate signal voltages to a gate output terminal G_O and a source output terminal S_O which are configured for connection to gate G and source S inputs of the switch(es) SW1 of the power modules PM1, PM2, PM3. As seen, the source output terminal S_O is connected to electric ground GND via decoupling inductor 12. The gate control signal generator generates the gate control signal based on the positive and negative V+, V-electric inputs from the master unit M in response to the electric control signal PWM received also from the master unit M.

[0117] To damp gate voltage oscillations, the slave driver units SI, S2, S3 each has a damping circuit R, C including a series connection of a resistor R and an capacitor C connected between a gate output terminal G_O and a source output terminal S_O. The gate output terminal G_O and a source output terminal S_O are configured for connection to gate G and source S inputs of the switch(es) SW1 of the power modules PM1, PM2, PM3.

[0118] This damping circuit R, C, which in some embodiments only includes the resistor R, has been found to effectively damp high frequency gate oscillations. The resistance value of the resistor R and inductor C can be selected according to the actual design. Preferred resistance ranges for the resistor R is: 10 m to 10 kQ, while preferred capacitance ranges for the capacitor is: 10 pF to 10 pF. It has been found that with the rather low voltage applied to the gate G, the resistor R can be designed in general so only a power loss in the resistor R of tens of mW is the disadvantage to be accepted in return for the gate oscillation damping effect.

[0119] Finally, FIG. 2 illustrates that the drain and source terminal D, S of the power modules PM1, PM2, PM3 are parallel connected to provide the combined power output from the electric power device. With the described decouping inductors II, 12, 13 and the damping circuit R, C, it has been found that the master M and slave85130PC01

[0120] 13

[0121] driver units SI, S2, S3 configuration can operate switching of the parallel coupled power modules PM1, PM2, PM3 without any high frequency gate oscillation problems.

[0122] For simplicity, the electric power input to the power modules PM1, PM2, PM3 is not illustrated in FIG. 1 and 2, however the power modules PM1, PM2, PM3 can in principle be any power module known, based on wide bandgap SiC, GaN semiconductor switch technology, e.g. MOSFETs or IGBTs.

[0123] FIG. 3 illustrates a power module embodiment with two parallel connected semiconductor switches SW1, SW2, e.g. GaN or SiC implemented on separate dies (indicated by dashed lines), and a stabilizer circuit SC with a resistor R_S connected directly between drain connections of the switches SW1, SW2.

[0124] The resistor R_s preferably has a resistance of 1-100 Q. Such resistance value has been found to be a suitable value for providing an efficient damping of high frequency oscillations which has been observed as a problem that can create instability of power modules with parallel connected semiconductor switches. High frequency oscillations have been observed in the frequency range typically in the frequency range 1-1000 MHz, often around 50-150 MHz.

[0125] In the shown embodiment the stabilizer circuit SC includes inductors which may be added to provide an even higher high frequency oscillation in some cases.

[0126] It is to be understood that the inductors in FIG. 1 may be specific components added, but in some cases the inductors can be parasitic inductances caused by the practical implementation of the power module, e.g. a busbar or an arrangement of the external terminal of the power module etc.

[0127] It is to be understood that the power modules in general can be different than the one shown as an example in FIG. 1.

[0128] FIG. 4a and 4b show graphs illustrating measured gate voltages versus time for a power device with three parallel connected power modules. The three curves indicate the gate voltage measured at each of the power modules.85130PC01

[0129] 14

[0130] In FIG. 4a, the gate voltage is illustrated for a version of the power module without the proposed decoupling inductors and damping circuit. Here, a divergent high frequency gate oscillation is seen, especially a significant 60 MHz component can be seen in the oscillations. As seen, the amplitude of the gate voltage oscillations is high compared to the level of the gate voltage, thereby causing a disturbance of the switching operation of the power device which in turn may cause failure or permanent damage.

[0131] FIG. 4b shows the same graph as in FIG. 4a, here with the proposed decoupling inductors and damping circuit connected. Here, the gate voltage oscillations is seen to be significantly reduced and with an amplitude much lower than the level of the gate voltage, so here the switching operation of the power modules are undisturbed. This indicates, that the master-slave configuration of the gate driver system is successful.

[0132] FIG. 5 illustrate steps of a method embodiment, namely a method for for damping high frequency gate oscillations in an electric power device comprising an external power terminal. The method comprises providing P_PM a plurality of power modules each comprising at least one controllable wide bandgap semiconductor switch. Next, connecting C_PM the plurality of power modules in parallel to the external power terminal. Further, providing P_MU a master unit configured to generate an electric power output and a gate control output e.g. implemented on one circuit board. Next, providing a plurality of slave driver units each implemented on respective circuit boards. Each slave drive units comprises: 1) a damping circuit comprising at least a resistor, wherein the damping circuit is connected between a gate output and a source output and being configured to damp high frequency gate oscillations, such as an oscillation within 1-1000 MHz, and 2) decoupling inductors connected to respective terminals configured for connection to the electric power output of the master unit. Next, connecting C_MU_SU each of the plurality of slave driver units to the electric power output and the gate control output of the master unit. Next, applying A_V an input voltage to the plurality of power modules, applying A_SWI a switching input to the master unit according to a switching scheme, and generating G_O_V an output voltage at the external power terminal accordingly.85130PC01

[0133] 15

[0134] To sum up, the invention provides an electric power device comprising a plurality of power modules (PM1, PM2, PM3) each comprising at least one controllable wide bandgap semiconductor switch (SW1, SW2), wherein the plurality of power modules (PM1, PM2, PM3) are connected in parallel to an external power terminal (P_O). A gate driver system (GDS) serves to generate gate drive signals (GS) to the plurality of power modules (PM1, PM2, PM3). The gate driver system (GDS) comprises a master unit (M) and a plurality of connected slave driver units. The master unit (M) is configured to generate an electric power output (PWO, V+, V-, GND) and a gate control output (GCO). Each of the slave driver units (SI, S2, S3) are configured for connection to the electric power output (PWO) and the gate control output (GCO) of the master unit (M), and they each comprises a gate output (G_O) configured to output a gate control signal (GS) to a gate input (G) of one of the plurality of power modules (PM1, PM2, PM3) in response to the gate control output (GCO) of the master unit (M). A source output (S_O) is configured for connection to a source input (S) of the one of the plurality of power modules (PM1, PM2, PM3). To avoid high frequency gate voltage oscillations, a damping circuit (R, C) with at least a resistor (R) is connected between the gate output (G_O) and the source output (S_O). Further, decoupling inductors (II, 12, 13) are connected to respective terminals configured for connection to the electric power output (PWO) of the master unit (M). This allows a low cost way of parallel connecting power module without instability problem due to gate oscillations, which can cause failure or permanent damage.

[0135] Although the present invention has been described in connection with the specified embodiments, it should not be construed as being in any way limited to the presented examples. The scope of the present invention is set out by the accompanying claim set. In the context of the claims, the terms "comprising" or "comprises" do not exclude other possible elements or steps. Also, the mentioning of references such as "a" or "an" etc. should not be construed as excluding a plurality. The use of reference signs in the claims with respect to elements indicated in the figures shall also not be construed as limiting the scope of the invention. Furthermore, individual features mentioned in different claims, may possibly be advantageously combined, and the mentioning of these features in85130PC01

[0136] 16

[0137] different claims does not exclude that a combination of features is not possible and advantageous.

Claims

85130PC0117CLAIMS1. An electric power device comprising an external power terminal (P_O), the power device comprising:- a plurality of power modules (PM1, PM2, PM3) each comprising at least one controllable wide bandgap semiconductor switch (SW1, SW2), wherein the plurality of power modules (PM1, PM2, PM3) are connected in parallel to the external power terminal (P_O), and- a gate driver system (GDS) configured to generate gate drive signals (GS) to the plurality of power modules (PM1, PM2, PM3), the gate driver system (GDS) comprising:- a master unit (M) configured to generate an electric power output (PWO, V+, V-, GND) and a gate control output (GCO), and- a plurality of slave driver units (SI, S2, S3) each being configured for connection to the electric power output (PWO) and the gate control output (GCO) of the master unit (M), wherein each of the plurality of slave driver units (SI, S2, S3) comprises:- a gate output (G_O) configured to output a gate control signal (GS) to a gate input (G) of one of the plurality of power modules (PM1, PM2, PM3) in response to the gate control output (GCO) of the master unit (M),- a source output (S_O) configured for connection to a source input (S) of the one of the plurality of power modules (PM1, PM2, PM3), - a damping circuit (R, C) comprising at least a resistor (R), wherein the damping circuit (R, C) is connected between the gate output (G_O) and the source output (S_O) and being configured to damp high frequency gate oscillations, such as an oscillation within 1-1000 MHz, and- decoupling inductors (II, 12, 13) connected to respective terminals configured for connection to the electric power output (PWO) of the master unit (M).85130PC01182. The power device according to claim 1, wherein the damping circuit comprises a series connection of a resistor (R) and a capacitor (C).

3. The power device according to claim 1 or 2, wherein the decoupling inductors (II, 12, 13) of each of the slave driver units comprises first, second and third decoupling inductors (II, 12, 13) connected to respective first, second and third electric power output terminals of the master unit (M).

4. The power device according to claim 3, wherein the first, second and third electric power output terminals of the master unit (M) are: a positive voltage (V+) terminal, a negative voltage (V-) terminal, and an electric ground (GND) terminal, respectively.

5. The power device according to any of the preceding claims, wherein each of the slave driver units (SI, S2, S3) are configured to receive an electril gate control output (GCO, PWM) from the master unit (M) and to generate the gate control signal (GS) in response thereto.

6. The power device according to any of the preceding claims, wherein the master unit (M) comprises an isolated power supply (IPS) configured to generate the electric power output (V+, V-, GND) in response to an electric power source (EPS).

7. The power device according to any of the preceding claims, wherein the master unit (M) is configured to receive an optical gate control input and to generate the gate control output (GCO), preferably an electric gate control output, in response thereto.

8. The power device according to any of the preceding claims, wherein the at least one controllable wide bandgap semiconductor switch (SW1) comprises one semiconductor switch implemented as Silicium Carbide or Gallium Nitride or Gallium (III) Oxide.85130PC01199. The power device according to any of the preceding claims, wherein the at least one controllable wide bandgap semiconductor switch (SW1) comprises one semiconductor switch being an IGBT or a MOSFET.

10. The power device according to any of the preceding claims, wherein the plurality of power modules are single-chip modules.

11. The power device according to any of the preceding claims, wherein the plurality of power modules comprises at least three, such as at least four power modules, such as the plurality of power modules being identical modules.

12. The power device according to any of the preceding claims, wherein the plurality of power modules (PM1, PM2, PM3) are configured to handle a voltage of at least 100 V, such as at least 300 V, such as at least 500 V, such as at least 1 kV, such as at least 5 kV, such as at least 10 kV.

13. The power device according to any of the preceding claims, wherein the external power terminal (P_O) is configured to output a current of at least 10 A, such as at least 30 A, such as at least 50 A, such as at least 100 A.

14. The power device according to any of the preceding claims, wherein the gate driver system (GDS) is configured to generate gate drive signals (GS) to switch the at least one controllable wide bandgap semiconductor switch (SW1, SW2) of each of the plurality of power modules (PM1, PM2, PM3) at a switching frequency of at least 1 kHz, such as at least 10 kHz, such as at least 100 kHz, such as at least 500 kHz, such as at least 1 MHz, such as at least 5 MHz, such as at least 10 MHz.

15. The power device according to any of the preceding claims, wherein the master unit (M) and the plurality of slave driver units (SI, S2, S3) are implemented on separate circuit boards.

16. The power device according to any of the preceding claims, wherein the external power terminal (P_O) comprises a power input terminal and a power output terminal, wherein the plurality of power modules (PM1, PM2, PM3) are85130PC0120connected in parallel to the power output terminal, and wherein each of the plurality of power modules (PM1, PM2, PM3) are connected to the power input terminal.

17. The power device according to any of the preceding claims, wherein each of the plurality of power modules (PM1, PM2, PM3) comprises at least two controllable wide bandgap semiconductor switches (SW1, SW2), such as connected in a half-bridge configuration.

18. The power device according to claim 17, wherein at least one of the plurality of power modules (PM1, PM2, PM3) comprises at least one stabilizer circuit (SC) comprising a resistor (R_s), such as having a 1-100 resistance, connected between first and second terminals, wherein the first and second terminals of the stabilizer circuit (SC) are connected to:1) respective drain onnections of the first and second controllable semiconductor switches (SW1, SW2), or2) respective source connections of the first and second controllable semiconductor switches (SW1, SW2),wherein the stabilizer circuit (SC) is configured to damp an electric high frequency oscillation in the power module, such as an oscillation within 1-1000 MHz.

19. An electric power converter comprising:- a power input terminal and a power output terminal, and- at least one power device according to any of claims 1-18, wherein the power output terminal is connected to the external power terminal (P_O) of the at least one power device.

20. The electric power converter according to claim 19, wherein the power input terminal is configured to receive a DC voltage, and wherein the plurality of power modules are arranged to convert the DC voltage to an AC voltage or a DC voltage at the power output terminal.85130PC012121. The electric power converter according to claim 19, wherein the power input terminal is configured to receive an AC voltage, and wherein the plurality of power modules are arranged to convert the DC voltage to an AC voltage or a DC voltage at the power output terminal.

22. An electric system comprising:- at least one power device according to any of claims 1-18,- an electric power source connected to deliver electric power to a power input terminal of the at least one power device, and- an electric device connected to receive electric power from the external power terminal (P_O) of the at least one power device.

23. The electric system according to claim 22, wherein the electric power source comprises a renewable energy source, such as a wind turbine generator, such as a photovoltaic solar panel.

24. The electric system according to claim 22 or 23, wherien the electric device comprises at least one of: an electric vehicle, an electrolyzer system, a battery charging system, a photovoltaic solar panel, a wind turbine generator, and an electric motor driver.

25. A method for damping high frequency gate oscillations in an electric power device comprising an external power terminal, the method comprises:- providing (P_PM) a plurality of power modules each comprising at least one controllable wide bandgap semiconductor switch,- connecting (C_PM) the plurality of power modules in parallel to the external power terminal,- providing (P_MU) a master unit configured to generate an electric power output and a gate control output,85130PC0122- providing (P_SU) a plurality of slave driver units each comprising:- a damping circuit comprising at least a resistor, wherein the damping circuit is connected between a gate output and a source output and being configured to damp high frequency gate oscillations, such as an oscillation within 1-1000 MHz, and- decoupling inductors connected to respective terminals configured for connection to the electric power output of the master unit,- connecting (C_MU_SU) each of the plurality of slave driver units to the electric power output and the gate control output of the master unit,- applying (A_V) an input voltage to the plurality of power modules,- applying (A_SWI) a switching input to the master unit according to a switching scheme, and- generating (G_O_V) an output voltage at the external power terminal accordingly.

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