Method for detecting a short-circuit event in a power component

Abstract

The invention relates to a method (100) for detecting a short-circuit event in a power component (1), comprising: - providing (101) a first profile of a control current of the power component (1) during a regular switch-on process of the power component (1), the control current being intended to switch a switching element of an electronic arrangement (2) of the power component (1), - providing (102) a second profile of the control current during a further switch-on process of the power component (1), - detecting (103) the short-circuit event in the power component (1) during the further switch-on process on the basis of a comparison of the first profile with the second profile. The invention also relates to a computer program, to a device, and to a storage medium for this purpose.

Description

[0001] R.415299

[0002] - 1 -

[0003] Description

[0004] title

[0005] Method for detecting a short-circuit event in a power component

[0006] The invention relates to a method for detecting a short-circuit event in a power component. The invention further relates to a computer program, a device, and a storage medium for this purpose.

[0007] State of the art

[0008] Wide-bandgap power semiconductors are currently available in sufficient quality to gain traction in relevant market segments such as the automotive industry, power distribution networks, and rail transport. Given the harsh operating conditions prevalent in these applications, power components can be exposed to a variety of abnormal operating conditions, such as short circuits. A short circuit occurs, for example, when the entire DC link voltage drops across the power component without a load limiting the current. The current is thus limited only by the internal resistance of the power component. Knowing the time the power component can withstand such situations is essential for developing a detection and protection circuit that prevents damage to the power component.Although short-circuit detection is listed in the JDEC and AEC standards as part of the standard qualification tests for power devices, there is no IEEE standard that defines the detection and protection speed in the event of a short circuit. Typically, this time is set to less than half the resistance time of the power device. The longer the resistance time, the better in terms of reliability (R.415299).

[0009] - 2 -

[0010] such as robustness under extreme operating conditions. Another important reason for short-circuit detection and protection in power components is to create sufficient design margins. However, this can be achieved at the cost of a higher saturation current and thus lower short-circuit withstand capability. Rapid detection allows the saturation current to be limited from a high, but still safe, value to near zero, preventing damage to the power component. The short-circuit detection block is particularly time-consuming. Rapid short-circuit detection can only be achieved with a high-speed detection block and is a mandatory requirement for improving the robustness of power components.

[0011] In the prior art, solutions exist to detect and process a short circuit and ultimately safely disconnect the power device. All methods aim to detect and disconnect the power device within half its short-circuit withstand capability. Short-circuit detection is usually performed externally, while signal conditioning, along with the safe disconnect mechanism, can be integrated into the power device's driver. Typically, the drivers provide a normal turn-on / turn-off path and a separate path for safe / soft turn-off in the event of a short circuit. Most methods were developed for detecting an initial short-circuit event, also known as a hard switch fault (HSF); only a few are effective against all short-circuit types, including, for example, short circuits under load.

[0012] Disclosure of the invention

[0013] The invention relates to a method with the features of claim 1, a computer program with the features of claim 8, a device with the features of claim 9, and a

[0014] computer-readable storage medium having the features of claim 10.

[0015] Further features and details of the invention will become apparent from the respective R.415299.

[0016] - 3 -

[0017] The dependent claims, the description, and the drawings. Features and details described in connection with the method according to the invention naturally also apply in connection with the computer program, the device, and the computer-readable storage medium according to the invention, and vice versa, so that mutual reference is always possible with regard to the disclosure of the invention.

[0018] The invention relates in particular to a method for detecting a short-circuit event in a power component, comprising:

[0019] Providing an initial flow of a control current for the power component during a regular switch-on process of the power component, wherein the control current is intended for switching a switching element of an electronic arrangement of the power component,

[0020] Providing a second control current waveform during a further switch-on operation of the power component, wherein initiating a capture of the second waveform may be provided in order to provide the second waveform based on the capture,

[0021] Detecting the short-circuit event in the power component during the subsequent switch-on process based on a comparison of the first curve with the second curve.

[0022] In other words, the power component is checked during detection by comparing the two control current waveforms to determine whether a short-circuit event occurred during the subsequent switch-on process. The first and second waveforms can be limited to a defined time period, particularly the same one. Thus, the method according to the invention advantageously allows short-circuit events in the power component to be detected based on an analysis of the control current.

[0023] Furthermore, it is optionally provided that the procedure also includes:

[0024] Integrating the first run and the second run over a defined time period, R.415299

[0025] - 4 -

[0026] During the detection process, the integrated first curve is compared with the integrated second curve, for example using an (electronic) comparator. Integration advantageously allows the method according to the invention to be applied to different curve profiles of the first and second curves, since only one value of the respective integrals needs to be compared.

[0027] Furthermore, it is conceivable that a detection result could indicate the presence of a short-circuit event if the difference between the integrated first waveform and the integrated second waveform exceeds a defined threshold, particularly if the integrated second waveform is at least 30% larger than the integrated first waveform. In other words, the defined threshold could, for example, specify a relative difference of 30%. Defining an absolute difference as the threshold is also conceivable. This would allow for a precise, application-specific definition of when the presence of a short-circuit event should be indicated.

[0028] Preferably, the control current can be a gate current supplied by a driver, in particular a gate driver, of the power component, wherein the at least one switching element is a transistor element and the gate current is supplied to a gate terminal of the at least one transistor element. It can also be provided that a first and a second transistor element are provided and the gate current is supplied to a respective gate terminal of the first and second transistor elements. Furthermore, it can be provided that the second transistor element has a smaller active area than the first transistor element.

[0029] Within the scope of the invention, it can be provided that the electronic arrangement comprises at least one low-voltage transistor and a current-sensing resistor, wherein the low-voltage transistor and the current-sensing resistor are configured and arranged between the driver and the gate terminal of the at least one transistor element such that, when the short-circuit event occurs, the low-voltage transistor R.415299

[0030] - 5 -

[0031] The low-voltage transistor is switched on to amplify a change in the gate current. This facilitates the detection of the short-circuit event by the amplified change in the gate current. In particular, it can be provided that the low-voltage transistor is switched on only in the event of a short circuit, so that the regular operation of the power component is advantageously not affected by the low-voltage transistor and the current-sense resistor. It can be provided that the low-voltage transistor and the current-sense resistor are integrated, particularly monolithically, into an active region of the power component.

[0032] Furthermore, it may be advantageous within the scope of the invention that the method also comprises:

[0033] Initiating a shutdown process of the power component when the short-circuit event is detected during the detection process.

[0034] This makes it advantageous to prevent damage to the power component from the short-circuit event at an early stage.

[0035] The invention also relates to a computer program, in particular a computer program product, comprising instructions which, when executed by a computer, cause the computer to execute the method according to the invention. Thus, the computer program according to the invention offers the same advantages as those described in detail with reference to a method according to the invention.

[0036] The invention also relates to a data processing device configured to execute the method according to the invention. The device can, for example, be a computer that executes the computer program according to the invention. The computer can have at least one processor for executing the computer program. Alternatively, a non-volatile data storage device can be provided in which the computer program is stored and from which the computer program can be read by the processor for execution.

[0037] The invention can also include a computer-readable storage medium which contains the computer program R.415299 according to the invention.

[0038] - 6 -

[0039] The inventive method comprises and / or instructions that, when executed by a computer, cause it to perform the method according to the invention. The storage medium is, for example, a data storage device such as a hard drive and / or non-volatile memory and / or a memory card. The storage medium can, for example, be integrated into the computer.

[0040] Furthermore, the method according to the invention can also be implemented as a computer-implemented method. Alternatively or additionally, at least one of the disclosed method steps can be computer-implemented and / or carried out automatically.

[0041] Further advantages, features, and details of the invention will become apparent from the following description, in which exemplary embodiments of the invention are described in detail with reference to the drawings. The features mentioned in the claims and in the description can each be essential to the invention individually or in any combination. The drawings show:

[0042] Fig. 1 shows a schematic visualization of a method, a power component, a device, a storage medium and a computer program according to exemplary embodiments of the invention.

[0043] Fig. 2 shows a schematic representation of an electronic arrangement and a driver according to exemplary embodiments of the invention.

[0044] Fig. 1 schematically depicts a method 100, a power component 1, a device 10, a storage medium 15 and a computer program 20 according to exemplary embodiments of the invention.

[0045] Fig. 1 shows in particular an embodiment of a method 100 for detecting a short-circuit event in a power component 1. In a first step 101, a first profile of a control current of the power component 1 is provided during a regular switch-on process of the power component 1, wherein the control current is used to switch a switching element R.415299

[0046] - 7 -

[0047] An electronic arrangement 2 of the power component 1 is provided. The switching element is, in particular, a transistor element 3, 4. In a second step 102, the second waveform of the control current is detected during a further switch-on process of the power component 1. In a third step 103, the short-circuit event in the power component 1 during the further switch-on process is detected based on a comparison of the first waveform with the second waveform.

[0048] Fig. 2 shows an electronic arrangement 2, which can be integrated into the power component 1, and a driver 8 according to exemplary embodiments of the invention. This comprises two switching elements, in particular a first transistor element 3 and a second transistor element 4. Furthermore, the electronic arrangement comprises a low-voltage transistor 5, a current-sensing resistor 6 and optionally a diode 7.

[0049] According to exemplary embodiments of the invention, a solution for improving short-circuit detection speed is provided, achieving low architectural complexity and a short detection time. A key starting point is the behavior of a control current, preferably a gate current, of the power component 1 during a short-circuit event. Any changes at the drain terminal during such events can be transferred to the gate terminal due to Miller capacitance, leading to changes in the gate current. According to exemplary embodiments of the invention, changes in the control current of the power component 1 are amplified during a short-circuit event. The control current is then preferably integrated, and this value can be compared with an integral value that would be obtained under normal operating conditions.The differences between the two integral values ​​are particularly large enough to be easily detected by a comparator, and a "flag" can be set to indicate that a short-circuit event has occurred. Therefore, in the context of the present invention, and in particular in contrast to solutions that use the time integral of the drain current of the power device 1, the time integral of the gate current of the power device 1 is used as an indicator of a short-circuit event, R.415299.

[0050] - 8 -

[0051] This advantageously increases the detection speed. To more clearly distinguish the gate current during a regular turn-on process and during a faulty turn-on process, i.e., during a short-circuit event, at least one low-current transistor 5 and a current-sensing resistor (or shunt) 6 can be added to the power component 1, which amplify the gate current change.

[0052] Gate current amplification occurs only during a short-circuit event, so normal operation is not disrupted. The low-current transistor 5 and the current-sense resistor 6 can be monolithically integrated into an active area of ​​the power component 1. Therefore, parasitic elements such as inductances and capacitances associated with standard on-PCB solutions can be drastically minimized, which can positively impact operating speed. Since it is preferably a single-stage architecture, bandwidth can also be increased, further improving operating speed and eliminating the risk of potential gate voltage fluctuations. The solution can be purely analog, which can offer an advantage in terms of simplicity compared to most modern detection and protection methods.Signal processing is preferably carried out mainly in the analog domain; a digital circuit can be used for timing, control and communication synchronization between the fault detection blocks and the driver 8.

[0053] In terms of complexity, the blocks to be designed for a required functionality may be limited by a finite number of components: passive elements such as R, C, and active elements such as...

[0054] Low-voltage transistor 5 and Si-like PN junction. Therefore, a first limitation in the design space arises in particular from this limited number of elements, and preferably only simple architectures can be integrated. Since the short-circuit event is characterized in particular by fast transients that must be detected, signal conditioning blocks may require a large frequency bandwidth in the range of several tens of MHz. In addition, these blocks may require integrators or comparators that are robust against process, R.415299

[0055] - 9 -

[0056] Voltage and temperature fluctuations (PVT) are characterized by low offset values. Since it is not possible to achieve such large bandwidths in a potential low-voltage range within the active area of ​​a power component 1, additional circuitry must be added, in particular to handle such offsets and improve PVT robustness. According to the invention, a low-complexity integration solution, and thus potentially fast short-circuit detection, is provided, starting from standard detection solutions that are already available.

[0057] According to the method of exemplary embodiments of the invention, a short-circuit event can be detected quickly, a gate current change of the power component 1 during such a state can be amplified, and its time integral can be used as a signal for the driver 8 to safely switch off the power component 1. A circuit diagram of the electronic arrangement 2 according to an exemplary embodiment for detecting short circuits and increasing the gate current is shown in Fig. 2.

[0058] According to the embodiment shown in Fig. 2, a short-circuit event, either of the first or the second type, is detected, and changes in the gate current are amplified to be used as information by an external driver 8, in particular a gate driver 8. During a short-circuit event, the drain current of the power component 1 immediately rises to a high saturation value. Part of the drain current flows through a second transistor element 4, which is a smaller copy of the first transistor element 3, i.e., the same process but a different active area. The ratio of their drain currents is proportional to the ratio of their active areas, with both transistor elements 3 and 4 preferably biased in a common drain configuration. This configuration can be used to monitor the drain current.The current through the second transistor element 4 generates, in particular, a voltage drop across a current measuring resistor 6. If this is large enough, which is caused, for example, by a high short-circuit current, and is above the threshold voltage of a low-voltage transistor 5, depending on the drain-source voltage of the low-voltage transistor 5, this low-voltage transistor 5R.415299 switches on.

[0059] - 10 -

[0060] In particular, one, either in saturation or in the linear region. In both cases, this low-voltage transistor 5 can pull down the internal gate currents of the first and second transistor elements 4 if the low-voltage transistor 5 is dimensioned to draw a current greater than the current supplied by the driver 8, which, for example, charges the internal gates of the first and second transistor elements 3, 4 during operation. This action can directly affect the gate currents of the first and second transistor elements 3, 4, which eventually reach lower negative values, thereby maintaining the internal gate voltages at an intermediate value, which is, in particular, below the value specified by the driver 8 itself.A time integral value of the first transistor element 3 is preferably large enough to be used as additional information for the driver 8 itself, indicating the occurrence of a short-circuit event. Depending on the sink capabilities of the driver 8, a PN junction or a diode 7 in series with the low-voltage transistor 5 may be required to block the current caused by a negative driver voltage. Therefore, the additional electronic arrangement 2 does not interfere with the driver 8, for example, during an active clamping event. In particular, during normal turn-on of the power component 1, the drain current does not reach a sufficient magnitude to generate a voltage drop across the current-sense resistor 6 that is greater than the threshold voltage of the low-voltage transistor 5.Therefore, the low-voltage transistor 5 is in the off state, and the branch comprising, for example, the low-voltage transistor 5 and the PN junction, has no interference during normal switching. Regarding the stability of the short-circuit detection and current gain loop, i.e., the electronic arrangement 2, of the power device 1, the electronic arrangement 2 is in a closed-loop voltage-current feedback configuration equal to Gm / (1+Gm / gm_Treg), where Gm and gm_Treg are the transconductance of the power device 1 and the low-voltage transistor 5, respectively, when the low-voltage transistor 5 is operating in saturation. Since, in particular, Gm > gm_Treg, the closed-loop gain is less than 0 dB, so the control loop is stable and there is no risk of unwanted oscillations. R.415299.

[0061] - 11 -

[0062] The gain of the open-loop control system is defined in particular as the ratio between the controlled (clamped) current iiout and the control current (iin):

[0063] iiout

[0064] A iopen = ~ — = gm, Sense FETxgm.LDMOS TregxRgatexRshunt

[0065] In the preceding equation, the transconductance of the sense FET, i.e., in particular of the second transistor element 4, is related to the transconductance of the main power FET, i.e., in particular of the first transistor element 3, which can be changed by the KSENSE ratio:

[0066] gm, Force FET

[0067] gm, Sense FET = — — — - - - - —

[0068] KSENSE — Rshuntxgm, Force FET

[0069] The current amplification in the open control loop thus becomes, in particular:

[0070] gm, Force FET

[0071] A j

[0072] l ' n

[0073] o „

[0074] pe „„

[0075] n = -RshuntxRg

[0076] a atexg

[0077] a m.LDMOS Treg

[0078] a x———— — — - - - — — KSENSE — Rshuntxgm, Force FET

[0079] The minus sign in the open-loop gain in the equation specifically indicates the negative feedback of the closed-loop system. In a design loop using silicon carbide-based technology, the phase span can be greater than 45 degrees, and the open-loop gain may be greater than 50, indicating that the feedback loop is stable and strong enough to counteract large process variations. The estimated bandwidth of the closed-loop system is in the MHz range, meaning the loop is also fast enough to respond to rapid transients that can occur during Type 1 and Type 2 short-circuit events.

[0080] Depending on the initial operating conditions of the power component 1 during a short-circuit event, short-circuit events for wide-bandgap power components 1 are generally classified into two types, which can be referred to as the first short-circuit event or hard switching fault (HSF) and the second short-circuit event or fault under load (FUL). R.415299

[0081] - 12 -

[0082] HSF occurs particularly when the power component 1 is switched on with a permanent full bus voltage across itself, which can be caused by faulty control signals. A FUL event can occur after the power component 1 is switched on in the resistive region and is characterized in particular by a rise in drain current to high saturation values. For both short-circuit events, simulation test setups can be defined based on industry standard models for power components 1 and transient voltage / current rise rates. In the first short-circuit event, the power component 1 is switched on, particularly with a voltage-based driver 8, under a very high drain-source voltage, typically hundreds of volts.While the driver 8 has reached its steady-state value, for example 18 V, the internal gate voltage of the power component 1 can be limited to half the driver value due to the action of the electronic arrangement 2 according to the invention. This corresponds in particular to the detection of the short-circuit event by the increase in the drain current of the second transistor element 4, which increases the voltage drop across the current-sensing resistor 6 and turns on the branch comprising the low-voltage transistor 5. The internal power-gate pull-down action of the low-voltage transistor 5 particularly amplifies the change in the gate current of the first transistor element 3. The transient gate current of the power component 1 is particularly capacitive in nature, and its peak value can be similar with and without the electronic arrangement added to the power component 1.The time duration, i.e., the integral given by the area under the transient process, can be reduced by a factor of two by adding the electronic arrangement 2 according to the invention. The difference between the two integrals is, in terms of magnitude, particularly large enough to be used by the driver 8 as an indication of the occurrence of a short-circuit event. This reflects, in particular, the amplification of the gate current change by the electronic arrangement 2 during events of the type of the first short-circuit event.

[0083] The second short-circuit event can occur after a normal power-on of power component 1. For example, power component 1 is switched on via driver 8 at a time of 200 ns, using a driver R.415299.

[0084] - 13 -

[0085] A continuous voltage of, for example, 18 V is maintained, with a low drain-source voltage of, for example, hundreds of mV. After a delay of, for example, 800 ns, the drain-source voltage can rise to a very high value, for example, with a very high voltage rise rate of 50 kV / ps. During this time, the internal gate voltage of power component 1 can follow the driver voltage. When the second short-circuit event occurs, driver 8 is in a high state, but the internal gate voltage of power component 1 is limited to approximately half the voltage of driver 8. This corresponds specifically to the detection of the second short-circuit event via the increase in the drain current of the second transistor element 4, which increases the voltage drop across the current-sense resistor 6 and thus turns on the branch that includes the low-voltage transistor 5.The change in the gate current of the power component 1, which normally occurs during the second short-circuit event, can be further amplified by the pull-down action of the low-voltage transistor 5. The duration and the integral given by the area under the transient process can be reduced by a factor of 2 by adding the electronic arrangement 2 according to the invention. The difference between the two integrals is, in particular, large enough to be used by the driver 8 as an indication of the occurrence of the second short-circuit event.

[0086] During the first short-circuit event without the electronic arrangement 2 according to the invention, the area under the gate current during the first short-circuit event transient can be, for example, 108.5 A-ns with a transient duration of, for example, 0.19 ps. During the second short-circuit event without the electronic arrangement 2 according to the invention, the area under the gate current during the second short-circuit event transient can be, for example, -63.4 A-ns (the negative sign is due in particular to the negative gate current flowing from the gate terminal), with a settling time of, for example, 0.15 ps. These values ​​can be compared with the areas under the gate current for the short-circuit event with the electronic arrangement 2 according to the invention to amplify the changes in gate current for the first and second short-circuit events, respectively. For adequate detection, R.415299

[0087] - 14 -

[0088] The difference between the integrated gate currents is in the range of 30% to 40%. In the case of the first short-circuit event, detecting a 40% difference in the gate current range is, for example, 110 ns faster than the duration of the short-circuit event (a smaller difference results in even shorter detection times, which is definitely an advantage). In the case of the second short-circuit event, detecting a 30% difference in the gate current range is, for example, 140 ns faster than the duration of the second short-circuit event. For a power device 1 with a short-circuit withstand capability of SCWT = 1 ps, detection and protection can be achieved in 0.5 x SCWT, i.e., e.g., 500 ns. The improvements in short-circuit detection speed are, for example, 22% and 28% of 0.5 x SCWT for the first and second short-circuit events, respectively.

[0089] The preceding explanation of the embodiments describes the present invention exclusively by way of examples.

[0090] Of course, individual features of the embodiments can be freely combined with one another, provided this is technically feasible, without leaving the scope of the present invention.

Claims

R.415299 - 15 - Claims 1. Method (100) for detecting a short-circuit event in a power component (1), comprising: Providing (101) a first flow of a control current of the power component (1) during a regular switch-on process of the power component (1), wherein the control current is intended for switching a switching element of an electronic arrangement (2) of the power component (1), Providing (102) a second course of the control current during a further switching-on process of the power component (1), Detecting (103) the short-circuit event in the power component (1) during the further switching-on process based on a comparison of the first course with the second course.

2. Method (100) according to claim 1 , characterized by that the procedure (100) further includes: Integrating the first and second processes over a defined time period, where, as part of the detection process (103), the integrated first course is compared with the integrated second course.

3. Method (100) according to claim 2, characterized by that a result of detection (103) indicates the presence of the short-circuit event if a difference between the integrated first waveform and the integrated second waveform is greater than a defined threshold, in particular if the integrated R.415299 - 16 - The second course is at least 30% larger than the integrated first course.

4. Method (100) according to one of the preceding claims, characterized in that that the control current is a gate current and is provided by a driver (8), in particular a gate driver (8), of the power component (1), wherein the at least one switching element is a transistor element and the gate current is supplied to a gate terminal of the at least one transistor element.

5. Method (100) according to claim 4, characterized by that the electronic arrangement (2) comprises at least one low-voltage transistor (5) and one current-sensing resistor (6), wherein the low-voltage transistor (5) and the current-sensing resistor (6) are configured and arranged between the driver (8) and the gate terminal of the at least one transistor element such that when the short-circuit event occurs, the low-voltage transistor (5) is switched on to amplify a change in the gate current.

6. Method (100) according to claim 5, characterized by that the low-voltage transistor (5) and the current-sensing resistor (6) are integrated into an active area of ​​the power component (1).

7. Method (100) according to one of the preceding claims, characterized in that that the procedure (100) further includes: Initiating a shutdown process of the power component (1) when the short-circuit event is detected (103) during the detection process (103).

8. Computer program (20), comprising instructions which, when the computer program (20) is executed by a computer (10), this R.415299 - 17 - cause the process (100) to be carried out according to any of the preceding claims.

9. Device (10) for data processing, which is configured to carry out the method (100) according to any one of claims 1 to 7.

10. Computer-readable storage medium (15) comprising instructions which, when executed by a computer (10), cause it to perform the steps of the method (100) according to any one of claims 1 to 7.

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