Semiconductor device comprising a gate resistor and corresponding method

Abstract

A semiconductor device, comprising a substrate, a semiconductor die mounted on the substrate and a gate resistor mounted on the substrate and electrically connected to the semiconductor die via connection means, wherein the gate resistor is formed as a composite structure on the substrate.

Description

[0001] TITLE

[0002] Semiconductor device comprising a gate resistor and corresponding method

[0003] TECHNICAL FIELD

[0004] The present disclosure relates to semiconductor devices comprising a substrate, semiconductor die, and a gate resistor electrically connected to the semiconductor die.

[0005] BACKGROUND OF THE DISCLOSURE

[0006] In the production of power modules, surface-mount device, SMD, or surface-mount technology, SMT, gate resistors are commonly assembled onto substrates through reflow soldering. This process typically involves stencil printing, or the use of solder preforms. While effective, the materials and tools required — such as solder materials and reflow jigs — contribute to higher manufacturing costs. Additionally, in customized power modules, the inclusion of a printed circuit board, PCB, to house the SMD / SMT gate resistor further complicates the manufacturing process. This added complexity not only raises costs but also impacts overall product yield.

[0007] An alternative to traditional SMD / SMT gate resistors is the integrated gate resistor which offers greater flexibility in terms of soldering and sintering options. However, because integrated gate resistors are produced using front-end semiconductor processes, they tend to be associated with higher production costs. The choice between SMD / SMT gate resistors and integrated gate resistors often depends on the specific application requirements and cost constraints.

[0008] The use of SMD / SMT gate resistors has a long history in the market the functional role of gate resistors is well-documented. A typical thick-film resistor structure comprises an Aluminium Oxide, AI2O3, substrate for insulation and thermal conductivity, a resistive ruthenium dioxide, RuO2, film printed and sintered at around 850°C with laser trimming, a protective glass or epoxy film, and electrodes made of AgPd-Ni-Sn.Conversely, thin-film integrated gate resistor technology, involves a precision resistor made with thin metallic films on a substrate. This design incorporates coatings to minimize the effects of dimensional changes, achieving high precision. Despite its benefits, the front-end manufacturing process required for IGBRs contributes to their relatively high cost, which introduces an important drawback in integrating IGBRs in power modules.

[0009] SUMMARY OF THE DISCLOSURE

[0010] Therefore, it would be advantageous if a gate resistor is provided which may be used in a semiconductor device, wherein integration of the gate resistor is flexible such that it may cheaply and easily may easily be integrated in said semiconductor device.

[0011] In a first aspect of the disclosure, there is provided a semiconductor device comprising:

[0012] a substrate;

[0013] a semiconductor die mounted on the substrate;

[0014] a gate resistor mounted on the substrate and electrically connected to the semiconductor die via connection means;

[0015] wherein the gate resistor is formed as a composite structure on the substrate.

[0016] The inventors have found that a gate resistor may be formed as a composite structure on the substrate. This allows the gate structure to be directly attached to the substrate. Upon completing the attach process, a structure with resistive function is formed. The resistance of the gate resistor may be in between 1 and 500 Ohm, preferably 1 to 100 Ohm.

[0017] This composite structure is advantageous, because it has a flexible design, such that a plurality of different geometries is possible. It is possible to shape this composite structure due to its flexible nature. Composite structures are flexible in their material properties, as well as in the manufacturing of the gate resistor using these structures, due to the combination of different materials that enhance their strength and adaptability. The synergy of materials comprised by the composite enables these structures to be customized for specific shapes and applications.Therefore, they may be used to provide a gate resistor of different shapes on substrates. Also, the formulation of the composite structure may be adjusted based on the properties and process requirements.

[0018] Therefore, due to the flexibility of the gate resistor formed as a composite structure, the gate resistor is cheaper, as it has lower manufacturing costs. This is because it may be printed / placed upon the semiconductor package using simple, well-known attachment processes. This is an explicit advantage over the background gate resistors as these typically need specific and / or specialized attachment techniques which makes the integration of the gate resistor more expensive. Furthermore, due to the flexibility in both resistive properties and manufacturing, the gate resistor is not application specific and can be tailored towards a wide range of applications.

[0019] In an example of the disclosure, the substrate comprises:

[0020] a Direct Bonded Copper, DBC, substrate;

[0021] an Active Metal Brazed, AMB, substrate; or a Ceramic substrate.

[0022] A Direct Bonded Copper, DBC, substrate is a type of electronic package that combines copper and ceramic materials for efficient heat dissipation and electrical conductivity. In DBC, copper is directly bonded to a ceramic base, usually aluminium oxide or aluminium nitride, using a high-temperature process. This bonding creates a strong, thermally conductive interface, making DBC substrates ideal for high-power applications like power electronics, LED drivers, and automotive systems.

[0023] The copper provides excellent electrical conductivity, while the ceramic base offers thermal insulation and mechanical support, which ensures high performance in demanding environments.

[0024] An Active Metal Brazed, AMB, substrate is a type of metal-ceramic composite used primarily in power electronics. In AMB, a thin layer of metal, typically copper, is bonded to a ceramic base using an active metal brazing process, where the metal is activated to form a strong bond with the ceramic. This method creates a high-quality, durable interface that may ensure a high thermal conductivity and a good electrical performance. AMB substrates are reliable in high-temperature environments and may be used in applications such as power modules, motor drives, and inverters due to high thermal conductivity.Ceramic substrates are materials primarily composed of ceramic materials like alumina or silicon nitride, which may offer good thermal insulation, electrical insulation, and mechanical properties. These substrates may be used in electronic packaging for devices that require high thermal conductivity and electrical insulation, such as LEDs, power electronics, and RF devices.

[0025] Ceramic substrates provide a stable, heat-resistant base for mounting components and facilitate efficient heat dissipation. They can also be highly resistant to corrosion and wear, making them ideal for applications in harsh environments, which results in a high durability and a long lifespan.

[0026] Therefore, the composite structure may be provided on any of the types of substrates. It may be provided on the copper, which is a common metal used in the AMB substrates. However, the composite structure may also be provided directly on the ceramic that is described here. From there, the gate resistor may be connected to the semiconductor die using a bonding wire or other bonding means, such as bond clips etc.

[0027] This means that a wide range of different applications for the gate resistor to be used is possible. The positioning of the gate resistor is not bound by the specific material of the substrate, as it may be used on any of the layers of the substrate, such as the metal layer, often a copper layer, or on a ceramic layer.

[0028] In an example of the disclosure, a top view of the gate resistor has a shape of any of:

[0029] a rectangle;

[0030] wavy rectangle;

[0031] a S-shape.

[0032] Herein a top view is directed to the view perpendicular to a surface of the substrate and therefore also a perpendicular to a surface of the gate resistor. As mentioned before, the inventors have found that the composite structure may comprise any useful shape. The shapes may include a rectangle, a wavy rectangle, an S-shape or any other useful shape. A wavy rectangle can be understood as a shape made of two parallel wavy lines, such as sinusoidal curved connected by two interconnecting lines, thereby forming a closed area shape. Note that the wavy lines not necessarily have to be parallel, but that they preferably are. This therefore allows the gate resistor to be used in different environments and different substrate shapes.Further, it allows for complex shapes which may result in the gate resistor exhibiting unique properties that may be leverages in the device.

[0033] In an example of the disclosure, the composite structure comprises a filler material.

[0034] The inventors have found that a filler material may be applied to the composite structure to modify the resistance it has. This may be beneficial as this further allows the gate resistor to be flexible and to be used in numerous different occasions and circumstances. The inclusion of filler materials therefore increases the flexibility of the device.

[0035] In an example of the disclosure, the gate resistor is at least partially coated with at least one coating layer.

[0036] The inventors have found that the gate resistor may be coated. This may be done for a number of reasons and goals as will be elucidated below.

[0037] In an example of the disclosure, the at least one coating layer comprises any of:

[0038] protective coating, such as polyimide or polyamide; metallization coating.

[0039] One of the reasons for coating the gate resistor may be for protective purposes i.e. against mechanical deformation, chemical, and / or thermal influences.

[0040] The metallization layer may protect the gate resistor's underlying material by acting as a barrier against oxidation. This prevents the degradation of the resistor's conductive and structural properties caused by exposure to oxygen or environmental contaminants. This results in a more reliable and durable gate resistor which is beneficial.

[0041] The metallization coating may comprise a first coating and it may also comprise a second coating. This allows an improvement of the wire bondability. This allows a better connection of bonding wires to the gate resistor.

[0042] The optional protection coating may shield the gate resistor from environmental factors like moisture, dust, and chemicals. It prevents corrosion, electrical leakage, and physical damage. Due to these factors, the protection of the gate resistor may be ensured, which contributes to the durability and reliability of the gate resistor.

[0043] In an example of the disclosure, the gate resistor is mounted by means of a connecting layer comprising a brazing alloy.The inventors have found that the gate resistor may be mounted using a brazing alloy. The brazing alloy layer may facilitate strong, high-temperature bonding between the substrate and other components. It ensures high thermal and electrical conductivity at the interface and provides mechanical stability. This layer may be of importance for creating robust connections in the electrical applications of the device.

[0044] In a second aspect of the disclosure, there is provided a method of manufacturing a semiconductor device, comprising the steps of:

[0045] providing a substrate;

[0046] mounting a semiconductor die onto the substrate;

[0047] providing a composite material on the substrate;

[0048] sintering the semiconductor device, thereby forming a gate resistor from the composite material;

[0049] electrically connecting the gate resistor to the die via connection means.

[0050] The inventors have found that a substrate may be provided whereon a semiconductor die is mounted upon. This semiconductor die is to be electrically connected to the gate resistor, which is provided to the semiconductor device by first providing a composite material on the substrate, then sintering the semiconductor device where the gate resistor is formed.

[0051] As mentioned before, forming the gate resistor from the composite structure is advantageous, because it has a flexible design, such that a plurality of different geometries is possible. Therefore, they may be used to provide a gate resistor of different shapes on substrates. So due to the flexibility of the gate resistor formed as a composite structure, the gate resistor is cheaper, as it has lower manufacturing costs. These costs are decrease due to the fact that the providing of the composite material may be done using standard semiconductor manufacturing techniques. Further, the forming of the gate resistor also follows from standard semiconductor techniques, such as sintering.

[0052] The further advantage here is that the gate resistor does not have to be formed in a front-end process, where first the gate resistor is provided upon the semiconductor substrate. This saves costs as intermediate products comprising mainly the gate resistor are avoided. These intermediate products requirespecial / specific manufacturing steps, which would drive up the costs of manufacturing the gate resistor.

[0053] In an example of the disclosure, the composite material comprises metal particles.

[0054] The inventors have found that in the composite structure, resistive metal particles may be adjustable based on the specific properties and process requirements due to their ability to be tailored through various manufacturing techniques. Metals like copper, aluminium, or specialized alloys may be incorporated into composites to provide variations in electrical conductivity, thermal management, or structural reinforcement. The resistive properties of the gate resistor can be altered by modifying factors such as alloy composition, grain structure, and heat treatment processes.

[0055] For example, by adjusting the alloy mix or applying different heat treatments, the gate resistor’s resistivity can be increased or decreased to meet specific performance criteria, such as optimizing electrical resistance. Therefore, the inclusion of metal particles in the composite structure allows for control over thermal and electrical conductivity.

[0056] In an example of the disclosure, the metal particles comprise a particle size of in between 1nm and 1pm, preferably in between 10nm and 500nm

[0057] The inventors have found that nanoparticles, such as particles with sizes as described above, may help in lowering down the process temperature, which allows the process steps to be used simultaneous with other process steps, such as sintering of solder.

[0058] Nanoparticles have a high surface-to-volume ratio compared to larger particles. As the size of a particle decreases to the micro and then to the nanoscale, the proportion of atoms on the surface increases significantly. In many processes such as sintering or chemical reactions, surface atoms are the active sites. With more surface atoms available in nanoparticles, the reactivity is enhanced. In sintering, the diffusion of atoms between particles is a crucial step. Nanoparticles can start to sinter at lower temperatures because the high surface-to-volume ratio provides more diffusion paths for atoms at the interfaces between particles.

[0059] In an example of the disclosure, the step of forming a gate resistor from the composite material comprises any of the steps of:printing;

[0060] spraying;

[0061] dispensing;

[0062] transferring a film;

[0063] The inventors have found that the forming of the composite structure may be done using a variety of techniques. This adds to the flexibility of the method of forming the gate resistor.

[0064] Printing is a process used to deposit materials in patterns on a substrate. Techniques like screen printing or inkjet printing may be used to apply the composite material. This method is cost-effective and suitable for mass production, providing accurate deposition, his method is cost-effective and suitable for high-volume production. An advantage of printing is its ability to produce detailed and complex patterns with relatively low material waste, making it ideal for creating fine features in an economical manner.

[0065] Spraying involves atomizing liquid material into fine droplets and directing them onto the substrate for applying the material on the substrate. Spraying allows for uniform application over small areas or complex structures. An advantage of spraying is its capability to deliver consistent layers, ensuring uniformity and coverage that are difficult to achieve with other methods, especially on non-flat substrates. Furthermore, this ensures better connection with the substrate and is resilient to surface roughness.

[0066] Dispensing involves the precise application of small amounts of material onto specific areas of a semiconductor die, often using a needle or jet nozzle. This method is ideal for applying pastes in precise locations, which is the case for the composite structures. An advantage of dispensing is its high level of precision, which makes it suitable for applications that require exact placement and minimal material usage, particularly for intricate or delicate structures.

[0067] Transferring a film involves attaching a pre-formed small structure, such as a thin film or patterned layer, onto a semiconductor die using techniques like lamination or thermal bonding. This method is used to integrate functional materials, such as dielectric or conductive layers. An advantage of transferring a film is its ability to provide high-quality and defect-free structures with consistent thickness, reducingthe need for complex in-situ deposition processes while maintaining good material properties.

[0068] Through these methods, gate resistors with an area of in between 0.1-10 mm by 0.1-10 mm and having a thickness of in between 0.05 to 1 mm may be achieved.

[0069] Therefore, any of the above-mentioned methods may work for the transferring of the composite material onto the substrate.

[0070] In an example of the disclosure, the step of mounting a semiconductor die comprises;

[0071] applying sintering paste on the substrate;

[0072] providing the semiconductor die on the sintering paste.

[0073] In an example of the disclosure, the step of sintering comprises sintering the sintering paste and sintering the composite material thereby forming the gate resistor as a composite structure.

[0074] The inventors have found that in the step of sintering, which is performed after the mentioned steps of applying and providing, both the sintering paste applied in these steps as well as the composite material, provided in the step of providing a composite material on the substrate are sintered. This has the advantage of negating a sintering step that would otherwise need to be performed. Compared to the application of alternative resistors, this is therefore a cheaper solution.

[0075] During the sintering, the atoms on the adjacent particles of the composite material will diffuse to each other and form the so-called sintering neck. While the sintering process proceeding, the necking growing. In the end, all the original single particles connect with each other and form a sintering network.

[0076] Therefore, the advantage of this example, together with the providing of the composite material, is that as a one-step process, it reduces the process complexity.

[0077] In an example of the disclosure, the step of at least partially coating at least one coating layer on the gate resistor.

[0078] As mentioned before, coating layers may protect the gate resistor, increasing reliability and durability.In a third aspect of the disclosure, there is provided a semiconductor package comprising a semiconductor device in accordance the disclosure, wherein the semiconductor package is at least partially encapsulated by an encapsulant.

[0079] The encapsulant may shield the semiconductor device from harmful environmental effects which may physically affect the semiconductor components and therefore affect the performance of the package.

[0080] In the appended figures, similar components and / or features may have the same reference label. Further, various components of the same type may be distinguished by following the reference label by a dash and a second label that distinguishes among the similar components. If only the first reference label is used in the specification, the description is applicable to any one of the similar components having the same first reference label irrespective of the second reference label.

[0081] The above and other aspects of the disclosure will be apparent from and elucidated with reference to the examples described hereinafter.

[0082] BRIEF DESCRIPTION OF THE DRAWINGS

[0083] The disclosure will now be discussed with reference to the drawings, which show in:

[0084] Figure 1 depicts an example of the semiconductor device in accordance with the disclosure;

[0085] Figure 2 depicts examples of the gate resistor in accordance with the disclosure;

[0086] Figure 3 depicts example process steps in accordance with the disclosure;

[0087] Figure 4 depicts further example process steps in accordance with the disclosure;

[0088] Figure 5 depicts a further example of the semiconductor device in accordance with the disclosure.DETAILED DESCRIPTION OF THE DISCLOSURE

[0089] A more detailed description is made with reference to particular examples, some of which are illustrated in the appended drawings, such that the features of the present disclosure may be understood in more detail. It is noted that the drawings only illustrate typical examples and are therefore not to be considered to limit the scope of the subject matter of the claims. The drawings are incorporated for facilitating an understanding of the disclosure and are thus not necessarily drawn to scale. Advantages of the subject matter as claimed will become apparent to those skilled in the art upon reading the description in conjunction with the accompanying drawings.

[0090] The ensuing description above provides preferred exemplary embodiment(s) only, and is not intended to limit the scope, applicability, or configuration of the disclosure. Rather, the ensuing description of the preferred exemplary embodiment(s) will provide those skilled in the art with an enabling description for implementing a preferred exemplary embodiment of the disclosure, it being understood that various changes may be made in the function and arrangement of elements, including combinations of features from different embodiments, without departing from the scope of the disclosure.

[0091] Unless the context clearly requires otherwise, throughout the description and the claims, the words "comprise," "comprising," and the like are to be construed in an inclusive sense, as opposed to an exclusive or exhaustive sense; that is to say, in the sense of "including, but not limited to." As used herein, the terms "connected," "coupled," or any variant thereof means any connection or coupling, either direct or indirect, between two or more elements; the coupling or connection between the elements can be physical, logical, electromagnetic, or a combination thereof.

[0092] Additionally, the words "herein," "above," "below," and words of similar import, when used in this application, refer to this application as a whole and not to any particular portions of this application. Where the context permits, words in the Detailed Description using the singular or plural number may also include the plural or singular number respectively. The word "or" in reference to a list of two or more items, covers all the following interpretations of the word: any of the items in the list, all of the items in the list, and any combination of the items in the list.These and other changes can be made to the technology considering the following detailed description. While the description describes certain examples of the technology, and describes the best mode contemplated, no matter how detailed the description appears, the technology can be practiced in many ways. Details of the system may vary considerably in its specific implementation, while still being encompassed by the technology disclosed herein.

[0093] Figure 1 depicts an example of the semiconductor device in accordance with the disclosure. Herein the semiconductor device 100 comprises a semiconductor die 102, which is mounted on a substrate 101. The semiconductor die 102 is electrically connected to a gate resistor 104 formed as a composite structure via a bonding wire 103.

[0094] The gate resistor is a resistor connected in series between the gate of the semiconductor die and the driving circuit that controls it. Its primary purpose is to regulate the flow of current into or out of the gate during switching events, thereby controlling the rate at which the transistor turns on or off. Without a gate resistor, the gate current can be very high during these transitions, potentially causing issues such as overshoot, excessive electromagnetic interference (EMI), or even damage to the gate driver.

[0095] By introducing a gate resistor, the switching speed can be adjusted to achieve a balance between efficiency and reliability. Therefore, the resistor value is carefully chosen to allow this.

[0096] Figure 2 depicts examples of the gate resistor in accordance with the disclosure. Herein a rectangular gate resistor 2011 is depicted, alongside which a wavy rectangle 2012, a S-shaped gate resistor 2013 and an elongated S-shaped gate resistor 2OI4 are shown. The gate resistor is not bound to any of these shapes, but these are depicted to show the flexibility of the shapes that the gate resistor may comprise.

[0097] Figure 3 depicts example process steps in accordance with the disclosure. Herein the process flow comprises the providing of the substrate 301, which may be an Active Metal Brazed, AMB, substrate or any other substrate.

[0098] In this figure, the gate resistor is provided on the metal pad of the substrate 302, which may typically be a copper metal pad. In the next step 303 a semiconductor die may be provided on the substrate, which is connected to the gateresistor with a bonding wire. In an alternative step 304, the bonding wire may instead be replaced with a bond clip.

[0099] Figure 4 depicts further example process steps in accordance with the disclosure. In this figure an alternative to the providing of the gate resistor, being provided as a composite material on the substrate, is depicted. In this alternative, the gate resistor is located on the ceramic of the substrate. This may be facilitated by an optional additional brazing alloy underneath the composite material which helps the connection of the gate resistor to the ceramic.

[0100] Figure 5 depicts a further example of the semiconductor device in accordance with the disclosure. Herein the gate resistor is coated with at least one coating layer 501. One of these coating layers may be a metallization layer 502. This may be included to prevent oxidation. Another example of a coating layer 501 is a protective coating. This protective coating layer on the sintered gate resistor topside can be applied to prevent moisture and contamination of the gate resistor, increasing its reliability and durability.

[0101] Further, as explained above, a brazing alloy 503 may be applied onto the bottom side of the composite material in order to better connect it to the substrate.

[0102] As noted above, particular terminology used when describing certain features or aspects of the technology should not be taken to imply that the terminology is being redefined herein to be restricted to any specific characteristics, features, or aspects of the technology with which that terminology is associated. In general, the terms used in the following claims should not be construed to limit the technology to the specific examples disclosed in the specification, unless the Detailed Description section explicitly defines such terms. Accordingly, the actual scope of the technology encompasses not only the disclosed examples, but also all equivalent ways of practicing or implementing the technology under the claims.LIST OF REFERENCE NUMERALS USED

[0103] 100 semiconductor device

[0104] 101 substrate

[0105] 102 semiconductor die

[0106] 103 bonding wire

[0107] 104 gate resistor

[0108] 200 gate resistors

[0109] 201xgate resistor shapes

[0110] 300 method of manufacturing a semiconductor device 301 providing substrate

[0111] 302 providing gate resistor

[0112] 303 providing bonding wire

[0113] 304 providing bond clip

[0114] 400 alternate providing gate resistor

[0115] 500 example substrate with gate resistor

[0116] 501 coating layer

[0117] 502 metallization layer

[0118] 503 brazing alloy

Claims

CLAIMS1. A semiconductor device comprising:a substrate;a semiconductor die mounted on the substrate;a gate resistor mounted on the substrate and electrically connected to the semiconductor die via connection means;wherein the gate resistor is formed as a composite structure on the substrate.

2. A semiconductor device in accordance with claim 1, wherein the substrate comprises:a Direct Bonded Copper, DBC, substrate;an Active Metal Brazed, AMB, substrate; or a Ceramic substrate.

3. A semiconductor device in accordance with any of the previous claims, wherein a top view of the gate resistor has a shape of any of:a rectangle;wavy rectangle;a S-shape.

4. A semiconductor device in accordance with any of the previous claims, wherein the composite structure comprises a filler material.

5. A semiconductor device in accordance with any of the previous claims, wherein the gate resistor is at least partially coated with at least one coating layer.

6. A semiconductor device in accordance with claim 5, wherein the at least one coating layer comprises any of:protective coating, such as polyimide or polyamide; metallization coating.

7. A semiconductor device in accordance with any of the previous claims, wherein the gate resistor is mounted by means of a connecting layer comprising a brazing alloy.

8. A method of manufacturing a semiconductor device, comprising the steps of:providing a substrate;mounting a semiconductor die onto the substrate;providing a composite material on the substrate;sintering the semiconductor device, thereby forming a gate resistor from the composite material;electrically connecting the gate resistor to the semiconductor die via connection means.

9. A method in accordance with claim 8, wherein the composite material comprises metal particles.

10. A semiconductor device in accordance with claim 9, wherein the metal particles comprise a particle size of in between 1nm and 1 m, preferably in between 10nm and 500nm.

11. A method in accordance with any of the claims 8-10, wherein the step of forming a forming a gate resistor from the composite material comprises any of the steps of:printing;spraying;dispensing;transferring a film;12. A method in accordance with any of the claims 8-11, wherein the step of mounting a semiconductor die comprises;applying sintering paste on the substrate;providing the semiconductor die on the sintering paste;13. A method in accordance with claim 12, wherein the step of sintering comprises sintering the sintering paste and sintering the composite material thereby forming the gate resistor as a composite structure.

14. A method in accordance with any of the claims 8-13, comprising the step of at least partially coating at least one coating layer on the gate resistor.

15. A semiconductor package comprising a semiconductor device in accordance with any of the claims 1-7, wherein the semiconductor package is at least partially encapsulated by an encapsulant.

Images