Synchronization signal detection

Abstract

Example embodiments of the present disclosure are directed to synchronization signal detection. A method comprises receiving, from a second apparatus, a plurality of repetitions of a synchronization signal based on a time-domain mapping pattern for the synchronization signal; and detecting the synchronization signal by combining the plurality of repetitions of the synchronization signal, wherein in the time-domain mapping pattern, a time distance between repetitions of the synchronization signal remains same in one or more time periods, or a first time distance between repetitions of the synchronization signal within a first time period is same as a second time distance between repetitions of the synchronization signal within a second time period.

Description

SYNCHRONIZATION SIGNAL DETECTIONCROSS-REFERENCE TO RELATED APPLICATION

[0001] This application claims priority from, and the benefit of, US Provisional Application No.63 / 748715, filed January 23, 2025, which is hereby incorporated by reference in its entirety.FIELD

[0002] Various example embodiments of the present disclosure generally relate to the field of telecommunication and in particular, to apparatuses, methods, and computer readable storage medium for synchronization signal detection.BACKGROUND

[0003] A synchronization signal may be used by user equipment (UE) to synchronize with a network (NW) and further perform measurements. For example, the UE may perform synchronization signal detection to search for a cell and acquire synchronization with the cell. Coverage of the synchronization signal may need to be enhanced so that the UE may detect the synchronization signal successfully. Coverage of certain physical signals may be improved by increasing received energy of the signals. A longer transmission of a signal in time and / or repeated transmissions of the signal may enable the UE to accumulate more received energy of the signal.SUMMARY

[0004] In a first aspect of the present disclosure, there is provided a first apparatus. The first apparatus comprises at least one processor; and at least one memory storing instructions that, when executed by the at least one processor, cause the first apparatus at least to: receive, from a second apparatus, a plurality of repetitions of a synchronization signal based on a time-domain mapping pattern for the synchronization signal; and detect the synchronization signal by combining the plurality of repetitions of the synchronization signal, where in the time-domain mapping pattern, a time distance between repetitions of the synchronization signal remains same in one or more time periods, or a first time distance between repetitions of the synchronization signal within a first time period is same as a second time distance between repetitions of the synchronization signal within a second time period.

[0005] In a second aspect of the present disclosure, there is provided a second apparatus. The second apparatus comprises at least one processor; and at least one memory storing instructions that, when executed by the at least one processor, cause the second apparatus at least to: transmit a plurality of repetitions of a synchronization signal based on a time-domain mapping pattern for the synchronization signal, where in the time-domain mapping pattern, a time distance between repetitions of the synchronization signal remains same in one or more time periods, or a first time distancebetween repetitions of the synchronization signal within a first time period is same as a second time distance between repetitions of the synchronization signal within a second time period.

[0006] In a third aspect of the present disclosure, there is provided a method at a first apparatus. The method comprises: receiving, from a second apparatus, a plurality of repetitions of a synchronization signal based on a time-domain mapping pattern for the synchronization signal; and detecting the synchronization signal by combining the plurality of repetitions of the synchronization signal, where in the time-domain mapping pattern, a time distance between repetitions of the synchronization signal remains same in one or more time periods, or a first time distance between repetitions of the synchronization signal within a first time period is same as a second time distance between repetitions of the synchronization signal within a second time period.

[0007] In a fourth aspect of the present disclosure, there is provided a method at a second apparatus. The method comprises: transmitting a plurality of repetitions of a synchronization signal based on a time-domain mapping pattern for the synchronization signal, where in the time-domain mapping pattern, a time distance between repetitions of the synchronization signal remains same in one or more time periods, or a first time distance between repetitions of the synchronization signal within a first time period is same as a second time distance between repetitions of the synchronization signal within a second time period.

[0008] In a fifth aspect of the present disclosure, there is provided a first apparatus. The first apparatus comprises means for receiving, from a second apparatus, a plurality of repetitions of a synchronization signal based on a time-domain mapping pattern for the synchronization signal; and means for detecting the synchronization signal by combining the plurality of repetitions of the synchronization signal, where in the time-domain mapping pattern, a time distance between repetitions of the synchronization signal remains same in one or more time periods, or a first time distance between repetitions of the synchronization signal within a first time period is same as a second time distance between repetitions of the synchronization signal within a second time period.

[0009] In a sixth aspect of the present disclosure, there is provided a second apparatus. The second apparatus comprises means for transmitting a plurality of repetitions of a synchronization signal based on a time-domain mapping pattern for the synchronization signal, where in the time-domain mapping pattern, a time distance between repetitions of the synchronization signal remains same in one or more time periods, or a first time distance between repetitions of the synchronization signal within a first time period is same as a second time distance between repetitions of the synchronization signal within a second time period.

[0010] In a seventh aspect of the present disclosure, there is provided a computer readable medium. The computer readable medium comprises instructions stored thereon for causing an apparatus to perform at least the method according to the third or fourth aspect.

[0011] It is to be understood that the Summary section is not intended to identify key or essential features of embodiments of the present disclosure, nor is it intended to be used to limit the scope of the present disclosure. Other features of the present disclosure will become easily comprehensible through the following description.BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Some example embodiments will now be described with reference to the accompanying drawings, where:

[0013] FIG. 1 illustrates an example communication environment in which example embodiments of the present disclosure can be implemented;

[0014] FIG. 2A illustrates a schematic diagram of an example time-frequency structure of a synchronization signal and physical broadcast channel (PBCH) block (SSB);

[0015] FIG. 2B illustrates a schematic diagram of example mapping of SSBs into slots;

[0016] FIGS. 3A and 3B illustrate example processes of synchronization signal detection;

[0017] FIG. 4 illustrates a signaling flow for synchronization signal detection in accordance with some example embodiments of the present disclosure;

[0018] FIGS. 5A, 5B and 5C illustrate schematic diagrams of example time-domain structures and mapping of SSBs in accordance with some example embodiments of the present disclosure, respectively;

[0019] FIG. 6 illustrates a flowchart of an example method implemented at a first apparatus in accordance with some example embodiments of the present disclosure;

[0020] FIG. 7 illustrates a flowchart of an example method implemented at a second apparatus in accordance with some example embodiments of the present disclosure;

[0021] FIG. 8 is a simplified block diagram of a device that is suitable for implementing example embodiments of the present disclosure; and

[0022] FIG. 9 illustrates a block diagram of an example computer readable medium in accordance with some example embodiments of the present disclosure.

[0023] Throughout the drawings, the same or similar reference numerals represent the same or similar element.DETAILED DESCRIPTION

[0024] Principle of the present disclosure will now be described with reference to some example embodiments. It is to be understood that these embodiments are described only for the purpose of illustration and help those skilled in the art to understand and implement the present disclosure, without suggesting any limitation as to the scope of the disclosure. Embodiments described herein can be implemented in various manners other than the ones described below.

[0025] In the following description and claims, unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skills in the art to which this disclosure belongs.

[0026] References in the present disclosure to “one embodiment,” “an embodiment,” “an example embodiment,” and the like indicate that the embodiment described may include a particular feature, structure, or characteristic, but it is not necessary that every embodiment includes the particular feature, structure, or characteristic. Moreover, such phrases are not necessarily referring to the same embodiment. Further, when a particular feature, structure, or characteristic is described in connection with an embodiment, it is submitted that it is within the knowledge of one skilled in the art to affect such feature, structure, or characteristic in connection with other embodiments whether or not explicitly described.

[0027] It shall be understood that although the terms “first,” “second,”..., etc. in front of noun(s) and the like may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another and they do not limit the order of the noun(s). For example, a first element could be termed a second element, and similarly, a second element could be termed a first element, without departing from the scope of example embodiments. As used herein, the term “and / or” includes any and all combinations of one or more of the listed terms.

[0028] As used herein, “at least one of the following: ” and “at least one of ” and similar wording, where the list of two or more elements are joined by “and” or “or”, mean at least any one of the elements, or at least any two or more of the elements, or at least all the elements.

[0029] As used herein, unless stated explicitly, performing a step “in response to A” does not indicate that the step is performed immediately after “A” occurs and one or more intervening steps may be included.

[0030] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of example embodiments. As used herein, the singular forms “a”, “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises”, “comprising”, “has”, “having”, “includes” and / or “including”, when used herein, specify the presence of stated features, elements, and / or components etc., but do not preclude the presence or addition of one or more other features, elements, components and / or combinations thereof.

[0031] As used in this application, the term “circuitry” may refer to one or more or all of the following:(a) hardware-only circuit implementations (such as implementations in only analog and / or digital circuitry) and(b) combinations of hardware circuits and software, such as (as applicable):(i) a combination of analog and / or digital hardware ci rcuit(s) with software / firmware and(ii) any portions of hardware processor(s) with software (including digital signal processor(s), software, and memory(ies) that work together to cause an apparatus, such as a mobile phone or server, to perform various functions) and(c) hardware circuit(s) and or processor(s), such as a microprocessor(s) or a portion of a microprocessor(s), that requires software (e.g., firmware) for operation, but the software may not be present when it is not needed for operation.

[0032] This definition of circuitry applies to all uses of this term in this application, including in any claims. As a further example, as used in this application, the term circuitry also covers an implementation of merely a hardware circuit or processor (or multiple processors) or portion of a hardware circuit or processor and its (or their) accompanying software and / or firmware. The term circuitry also covers, for example and if applicable to the particular claim element, a baseband integrated circuit or processor integrated circuit for a mobile device or a similar integrated circuit in server, a cellular network device, or other computing or network device.

[0033] As used herein, the term “communication network” refers to a network following any suitable communication standards, such as New Radio (NR), Long Term Evolution (LTE), LTE-Advanced (LTE-A), Wideband Code Division Multiple Access (WCDMA), High-Speed Packet Access (HSPA), Narrow Band Internet of Things (NB-loT) and so on. Furthermore, the communications between a terminal device and a network device in the communication network may be performed according to any suitable generation communication protocols, including, but not limited to, the first generation (1G), the second generation (2G), 2.5G, 2.75G, the third generation (3G), the fourth generation (4G), 4.5G, the fifth generation (5G), 5G-advanced, the sixth generation (6G) communication protocols, wireless local network communication protocols such as Institute for Electrical and Electronics Engineers (IEEE) 802.11 and the like, and / or any other protocols either currently known or to be developed in the future. Moreover, the communication may utilize any proper wireless communication technology, comprising but not limited to: Code Division Multiple Access (CDMA), Frequency Division Multiple Access (FDMA), Time Division Multiple Access (TDMA), Frequency Division Duplex (FDD), Time Division Duplex (TDD), Multiple-Input Multiple-Output (MIMO), Orthogonal Frequency Division Multiple (OFDM), Discrete Fourier Transform spread OFDM (DFT-s-OFDM) and / or any other technologies currently known or to be developed in the future. Embodiments of the present disclosure may be applied in various communication systems. Given the rapid development in communications, there will of course also be future type communication technologies and systems with which the present disclosure may be embodied. It should not be seen as limiting the scope of the present disclosure to only theaforementioned system.

[0034] As used herein, the term “network device” refers to a node in a communication network via which a terminal device accesses the network and receives services therefrom. The network device may refer to a base station (BS) or an access point (AP), for example, a node B (NodeB or NB), an evolved NodeB (eNodeB or eNB), an NR NB (also referred to as a gNB), a remote radio unit (RRU), a radio head (RH), a remote radio head (RRH), a relay, an integrated access and backhaul (IAB) node, a low power node such as a femto, a pico, a non-terrestrial network (NTN) or non-ground network device such as a satellite network device, a low earth orbit (LEO) satellite and a geosynchronous earth orbit (GEO) satellite, an aircraft network device, and so forth, depending on the applied terminology and technology. In some example embodiments, radio access network (RAN) split architecture comprises a centralized unit (CU) and a distributed unit (DU) at an IAB donor node. An IAB node comprises a mobile terminal (IAB-MT) part that behaves like a UE towards the parent node, and a DU part of an IAB node behaves like a base station towards the next-hop IAB node.

[0035] The term “terminal device” refers to any end device that may be capable of wireless communication. By way of example rather than limitation, a terminal device may also be referred to as user equipment (UE), a subscriber station (SS), a portable subscriber station, a mobile station (MS), or an access terminal (AT). The terminal device may include, but not limited to, a mobile phone, a cellular phone, a smart phone, voice over IP (VoIP) phones, wireless local loop phones, a tablet, a wearable terminal device, a personal digital assistant (PDA), portable computers, desktop computer, image capture terminal devices such as digital cameras, gaming terminal devices, music storage and playback appliances, vehicle-mounted wireless terminal devices, wireless endpoints, mobile stations, laptop-embedded equipment (LEE), laptop-mounted equipment (LME), universal serial bus (USB) dongles, smart devices, wireless customer-premises equipment (CPE), an Internet of Things (loT) device, a watch or other wearable, a head-mounted display (HMD), a vehicle, a drone, a medical device and applications (e.g., remote surgery), an industrial device and applications (e.g., a robot and / or other wireless devices operating in an industrial and / or an automated processing chain contexts), a consumer electronics device, a device operating on commercial and / or industrial wireless networks, and the like. The terminal device may also correspond to a mobile termination (MT) part of an IAB node (e.g., a relay node). In the following description, the terms “terminal device”, “terminal”, “user equipment” and “UE” may be used interchangeably.

[0036] As used herein, the term “resource,” “transmission resource,” “resource block,” “physical resource block” (PRB), “uplink resource,” or “downlink resource” may refer to any resource for performing a communication, for example, a communication between a terminal device and a network device, such as a resource in time domain, a resource in frequency domain, a resource in space domain, a resource in code domain, or any other combination of the time, frequency, space and / orcode domain resource enabling a communication, and the like. In the following, unless explicitly stated, a resource in both frequency domain and time domain will be used as an example of a transmission resource for describing some example embodiments of the present disclosure. It is noted that example embodiments of the present disclosure are equally applicable to other resources in other domains.

[0037] FIG. 1 illustrates an example communication environment 100 in which example embodiments can be implemented.

[0038] In the communication environment 100, a plurality of communication devices, including a first apparatus 110 and a second apparatus 120, may communicate with each other. In some example embodiments, the first apparatus 110 may operate as a terminal device such as a UE, and the second apparatus 120 may operate as a network device (such as a gNB) serving the terminal device. In some example embodiments, the second apparatus 120 may serve the first apparatus 110 within its coverage area, which may be referred to as a cell 102.

[0039] In the following, for the purpose of illustration, some example embodiments are described with the first apparatus 110 operating as a terminal device and the second apparatus 120 operating as a network device. However, in some example embodiments, operations described with respect to a terminal device may be implemented at a network device or other devices, and operations described with respect to a network device may be implemented at a terminal device or other devices.

[0040] In some example embodiments, if the first apparatus 110 is a terminal device and the second apparatus 120 is a network device, a transmission direction from the second apparatus 120 to the first apparatus 110 is referred to as a downlink (DL), while a transmission direction from the first apparatus 110 to the second apparatus 120 is referred to as an uplink (UL). In DL, the second apparatus 120 is a transmitting (TX) device (or a transmitter), and the first apparatus 110 is a receiving (RX) device (or a receiver). In UL, the first apparatus 110 is a TX device, and the second apparatus 120 is an RX device. In some example embodiments, if both the first apparatus 110 and the second apparatus 120 are terminal devices, a transmission direction between the first apparatus 110 and the second apparatus 120 is referred to as a sidelink (SL).

[0041] It is to be understood that the number and types of apparatuses are shown in FIG. 1 for the purpose of illustration, without suggesting any limitation. The communication environment 100 may include any suitable numbers and types of devices and apparatuses.

[0042] In the communication environment 100, the first apparatus 110 may detect a synchronization signal from the second apparatus 120 for synchronization with the second apparatus 120 (for example, the cell 120). In 5G NR, a primary synchronization signal (PSS) and a secondary synchronization signal (SSS) may be used as synchronization signals, which, together with a PBCH signal and a PBCH demodulation reference signal (DMRS), may be comprised in an SSB.

[0043] FIG. 2A shows an example time-frequency domain structure 200A of an SSB. As shown inFIG. 2A, the SSB occupies four consecutive OFDM symbols in a time domain and spans 240 subcarriers (equivalent to 20 resource blocks (RBS)) in a frequency domain. A PSS 201 occupies the first OFDM symbol (denoted by Symbol #0) and spans 127 subcarriers. An SSS 202 is located in the third OFDM symbol (denoted by Symbol #2) and spans 127 subcarriers. PBCH signals (shortly PBCH) 203 and 204 occupies the second and fourth OFDM symbols (denoted by Symbol #1 and Symbol #3) completely and spans 240 subcarriers. In the third OFDM symbol (i.e., Symbol #2), PBCH signals may occupy 48 subcarriers above the SSS 202 and 48 subcarriers below the SSS 202.

[0044] The subcarrier spacing (SOS) for the SSB may vary depending on a frequency range. For example, it is 15 kHz or 30 kHz for frequency range 1 (FR1, below 6 GHz), and 120 kHz or 240 kHz for frequency range 1 (FR2, above 6 GHz). The mapping of SSBs into slots and OFDM symbols may depend on the SOS and the frequency range (e.g., FR1 or FR2). FIG. 2B shows example mapping pattern 200B of SSBs into slots with a 15kHz SOS for a frequency range below 3GHz. As shown in FIG. 2B, four-symbol SSBs 211 , 212, 213 and 214 with the 15 kHz SOS for the frequency range below 3GHz are mapped to the first two slots of the first or second half frame every 20ms (even a radio frame), where the first symbols of the SSBs in a slot are Symbol #2 and Symbol #8.

[0045] In some implementations, the first apparatus 110 may operate as a low power wide area (LPWA) device in low band deployments, specifically below 2GHz. LPWA devices may operate with a single receiver and expect a very wide coverage range of signals from the NW. For the LPWA devices, synchronization signal detection may be performed through combining multiple PSSs and SSSs. For example, during an initial search, the first apparatus 110 may attempt to combine multiple PSSs or multiple samples of the PSS. At this stage, the first apparatus 110 may operate with complete timing uncertainty. In the frequency domain, the first apparatus 110 may perform a search on a predetermined synchronization raster. In the time domain, when the first apparatus 110 performs PSS and SSS detection through the combination of multiple samples of the PSS and SSS (also referred to as PSS and SSS samples), the first apparatus 110 may need different hypotheses for such combination based on the mapping pattern 200B of the SSB into slots in FIG. 2B.

[0046] FIGS. 3A and 3B illustrate example cases of synchronization signal detection based on the mapping pattern 200B. As shown in FIGS. 3A and 3B, considering the combination of three samples of a PSS (or an SSS), a UE (as an example of the first apparatus 110) may have different hypotheses for buffering the possible PSS samples (or the SSB samples) for the combination. For example, in a case 300A for PSS detection, as shown in FIG. 3A, it may be assumed that the first PSS sample 301 , the second PSS sample 302 and the third PSS sample 303 are combined. The time distance between the first PSS sample 301 and the second PSS 302 is 6 symbols sample, and the time distance between the second PSS sample 302 and the third PSS sample 303 is 8 symbols. In a case 300B for PSS detection, as shown in FIG. 3B, it may be assumed that the second PSS sample 302, the third PSSsample 303 and the fourth PSS sample 304 are combined. The time distance between the second PSS sample 302 and the third PSS sample 303 is 8 symbols sample, and the time distance between the third PSS sample 303 and the fourth PSS sample 304 is 6 symbols.

[0047] In the cases 300A and 300B, the UE is required to have two different hypotheses for time distances between the three PSS samples. Similarly, if two potential PSS samples are buffered for the combination (e.g., the combination of two PSSs), the UE may need to have two different hypotheses for the time distance between the PSS samples. It is desired to reduce UE complexity in the PSS (and SSS) detection, for example, in an initial search, when a UE (especially, an LPWA device) is performing PSS (and SSS) detection based on combining.

[0048] Example embodiments propose a solution for synchronization signal detection. This solution provides time-domain mapping patterns for a synchronization signal such as a PSS and an SSS. In the time-domain mapping patterns, a time distance between repetitions of the synchronization signal remains same in one or more time periods (such as time slots or shortly slots), or a time distance between repetitions of the synchronization signal within a time period is same as a time distance between repetitions of the synchronization signal within another time period (for example, a immediately next time period).

[0049] Using such time-domain mapping patterns, synchronization signal detection may be improved via means of repetitions of the synchronization signal. Coverage for the synchronization signal detection may be improved with reduced device complexity.

[0050] Some example embodiments of the present disclosure will be described in detail below with reference to FIGS. 4 to 5C.

[0051] FIG. 4 illustrates a signaling diagram showing an example communication process 400 between the first apparatus 110 and the second apparatus 120 for synchronization signal detection in accordance with some example embodiments of the present disclosure. In some example embodiments, the first apparatus 110 may be discussed as a terminal device, for example, a UE. The second apparatus 120 may be discussed as a network device, for example, a BS, gNB, or an NW.

[0052] As shown in FIG. 4, in the process 400, the second apparatus 120 transmits (405), to the first apparatus 110, a plurality of repetitions of a synchronization signal based on a time-domain mapping pattern for the synchronization signal. Correspondingly, the first apparatus 110 receives (410) the plurality of repetitions of a synchronization signal. After receiving (410) the plurality of repetitions of a synchronization signal, the first apparatus 110 detects (415) the synchronization signal by combining the plurality of repetitions of the synchronization signal. In some example embodiments, the synchronization signal may comprise a PSS or an SSS. Alternatively, or in addition, the synchronization signal may be a part of an SSB. For example, the SSB may contain a PSS, an SSS, a PBCH and a PBCH DMRS. In the context of the present disclosure, repetitions of a PSS or an SSSmay also referred to as samples of a PSS or an SSS or PSS or SSS samples.

[0053] In some example embodiments, in the time-domain mapping pattern for the synchronization signal, the time distance between repetitions of the synchronization signal remains same in one or more time periods. In some example embodiments, the time period may comprise a time slot. Any other time durations are also possible such as a time subframe, time frame, and / or the like. Based on this time-domain mapping pattern, when the first apparatus 110 buffers these repetitions of the synchronization signal for combination, the first apparatus 110 may consider one hypothesis for a time distance between these repetitions, thereby reducing processing complexity and improving efficiency for the synchronization signal detection. In this way, the coverage for synchronization signal detection may be improved while reducing the complexity of the first apparatus 110.

[0054] By way of example, in the example embodiments where the synchronization signal is a part of the SSB, the same time distance between repetitions of the synchronization signal in one or more time periods may be achieved by configuring the structure of the SSB and mapping the SSB into the time period. In some example embodiments, one or more SSBs may be mapped into one time period (such as one time slot or one slot), each SSB may contain one repetition of the synchronization signal, and a time distance between repetitions of the synchronization signal in two consecutive SSBs remains same within the one or more time periods. In this case, the plurality of combined repetitions of the synchronization signal may be allocated in a same time period or different time periods.

[0055] In some example embodiments, an SSB with an even index may sequentially contain a PSS, a PBCH signal (referred to as a first PBCH signal), a SSS and another PBCH signal (referred to as a second PBCH signal). An SSB with an odd index may sequentially contain the first PBCH signal, the PSS, the second PBCH signal and the SSS. An example time-domain structure and mapping of such SSBs will be described below with reference to FIG. 5A.

[0056] As shown in FIG. 5A, an SSB of an even index (for example, denoted by SSB index #0 or SSB index #2) may comprise the following signals in the time domain: a PSS, a PBCH signal (or PBCH DMRS), an SSS, another PBCH signal (or PBCH DMRS). An SSB of an odd index (for example, denoted by SSB index #1 or SSB index #3) may comprise the following signals in the time domain: a PBCH signal (or PBCH DMRS), a PSS, another PBCH signal (or PBCH DMRS), an SSS. Four SSBs, e.g., SSB indexes #0 to #3, are allocated two slots, where two SSBs such as SSB indexes #0 and #1 or SSB indexes #2 or SSB index #3 may be allocated in one slot.

[0057] In this example, consecutive PSS samples or SSS samples within two slots may be always seven symbols apart from each other. The first apparatus 110 (such as the UE) may perform buffering of two or three (or four) PSS samples or SSS samples using the seven symbols time distance, which is one hypothesis for a time distance between consecutive PSS samples or SSS samples. Therefore, the complexity of the first apparatus 110 may be reduced.

[0058] In some other example embodiments, one SSB may be mapped across a plurality of time periods, each SSB may contain one repetition of the synchronization signal, and a time distance between repetitions of the synchronization signal in two consecutive SSBs remains same within one time period. In this case, the plurality of combined repetitions of the synchronization signal may be allocated in a same time period.

[0059] In some example embodiments, the SSB may sequentially contain a PSS, an SSS, a first PBCH signal, and a second PBCH signa. In a plurality of SSBs, repetitions of the PSS may be allocated consecutively in the first time period, repetitions of the SSS may be allocated consecutively in the first time period, repetitions of the first PBCH signal may be allocated consecutively in the second time period, and repetitions of the second PBCH signal may be allocated consecutively in the second time period. An example time-domain structure and mapping of such an SSB will be described below with reference to FIG. 5B.

[0060] As shown in FIG. 5B, PSS samples of all (such as four) SSBs may be allocated consecutively in the first slots (for example, in Symbols #2 to #5), and SSS samples of all (such as four) SSBs may be allocated consecutively in the first slots (for example, in Symbols #8 to #12). PBCH signals and PBCH DMRSs of the SSBs may be allocated in the second slot (for example, in Symbols #2 to #5 and in Symbols #8 to #11, respectively).

[0061] In this way, combining across four PSS samples may be relatively simple, as it requires short buffering memory. The first apparatus 110 (such as the UE) may perform buffering of four PSS samples assuming the PSSs in consecutive symbols. Therefore, the complexity of the first apparatus 110 may be reduced.

[0062] In some other example embodiments, in the time-domain mapping pattern for the synchronization signal, a first time distance between repetitions of the synchronization signal within a first time period may be same as a second time distance between repetitions of the synchronization signal within a second time period. Based on such mapping pattern, the first apparatus 110 may have more hypothesis certainties for a time distance between the repetitions of the synchronization signal for the combination. Thus, the coverage for synchronization signal detection may be improved while reducing the complexity of the first apparatus 110.

[0063] By way of example, in the example embodiments where the synchronization signal is a part of the SSB, more than one SSB may be mapped into one time period (such as one slot), and each SSB may contain one repetition of the synchronization signal. The first time distance between repetitions of the synchronization signal in two consecutive SSBs within the first time period is same as the second time distance between repetitions of the synchronization signal in two consecutive SSBs within the second time period. In this case, the plurality of combined repetitions of the synchronization signal may be allocated in a same time period.

[0064] In some example embodiments, the SSB may sequentially contain a PSS, a first PBCH signal, a SSS and a second PBCH signal. In a plurality of SSBs, repetitions of the PSS may be allocated consecutively in the first time period, and repetitions of the SSS, repetitions of the first PBCH signal and repetitions of the second PBCH signal may be allocated separately in the second time period. An example time-domain structure and mapping of such an SSB will be described below with reference to FIG. 50.

[0065] As shown in FIG. 5C, PSS samples of SSBs in a slot may be allocated in consecutive symbols (for example, Symbols #2 and #3). PBCH signals (or PBCH DMRSs), SSS samples may be allocated separately in the slot. In this way, combination across two PSS samples may be relatively simple. The first apparatus 110 (such as the UE) may perform buffering of two PSS samples using one symbol distance between PSS samples in the same slot, thereby reducing the complexity of the first apparatus 110.

[0066] In some example embodiments, a plurality of SSBs may be transmitted using a same beam. For example, the network may operate the system with a wide sector beam and thus use the plurality of SSBs (for example, two or four SSBs as shown in FIGS. 5A to 5C) to provide repetitions of SSBs using the same beam. The use of the same beams may further reduce the processing complexity of the first apparatus 110.

[0067] FIG. 6 shows a flowchart of an example method 600 implemented at a first apparatus in accordance with some example embodiments of the present disclosure. For the purpose of discussion, the method 600 will be described from the perspective of the first apparatus 110 in FIG. 1.

[0068] At block 610, the first apparatus 110 receives, from a second apparatus, a plurality of repetitions of a synchronization signal based on a time-domain mapping pattern for the synchronization signal, and

[0069] At block 620, the first apparatus 110 detects the synchronization signal by combining the plurality of repetitions of the synchronization signal. In the time-domain mapping pattern, a time distance between repetitions of the synchronization signal remains same in one or more time periods, or a first time distance between repetitions of the synchronization signal within a first time period is same as a second time distance between repetitions of the synchronization signal within a second time period.

[0070] In some example embodiments, the synchronization signal may comprise a primary synchronization signal or a secondary synchronization signal.

[0071] In some example embodiments, the synchronization signal may be a part of an SSB.

[0072] In some example embodiments, in the time-domain mapping pattern, one or more SSBs may be mapped into one time period, each SSB may contain one repetition of the synchronization signal, and a time distance between repetitions of the synchronization signal in two consecutive SSBsremains same within the one or more time periods.

[0073] In some example embodiments, in the time-domain mapping pattern, an SSB with an even index sequentially may contain a PSS, a first PBCH signal, an SSS and a second PBCH signal, and an SSB with an odd index sequentially may contain the first PBCH signal, the PSS, the second PBCH signal and the SSS.

[0074] In some example embodiments, the plurality of combined repetitions of the synchronization signal may be allocated in a same time period or different time periods.

[0075] In some example embodiments, in the time-domain mapping pattern, one SSB may be mapped across a plurality of time periods, each SSB may contain one repetition of the synchronization signal, and a time distance between repetitions of the synchronization signal in two consecutive SSBs remains same within one time period.

[0076] In some example embodiments, in the time-domain mapping pattern, the SSB sequentially may contain a PSS, a SSS, a first PBCH signal, and a second PBCH signal, and in a plurality of SSBs, repetitions of the PSS may be allocated consecutively in the first time period, repetitions of the SSS may be allocated consecutively in the first time period, repetitions of the first PBCH signal may be allocated consecutively in the second time period, and repetitions of the second PBCH signal may be allocated consecutively in the second time period.

[0077] In some example embodiments, in the time-domain mapping pattern, more than one SSB may be mapped into one time period, each SSB may contain one repetition of the synchronization signal, and the first time distance between repetitions of the synchronization signal in two consecutive SSBs within the first time period is same as the second time distance between repetitions of the synchronization signal in two consecutive SSBs within the second time period.

[0078] In some example embodiments, in the time-domain mapping pattern, the SSB sequentially may contain a PSS, a first PBCH signal, a SSS and a second PBCH signal, and in a plurality of SSBs, repetitions of the PSS may be allocated consecutively in the first time period, and repetitions of the SSS, repetitions of the first PBCH signal and repetitions of the second PBCH signal may be allocated separately in the second time period.

[0079] In some example embodiments, the plurality of combined repetitions of the synchronization signal may be allocated in a same time period.

[0080] In some example embodiments, a plurality of SSBs may be transmitted using a same beam.

[0081] In some example embodiments, the time period may comprise a time slot.

[0082] In some example embodiments, a first apparatus capable of performing any of the method 600 (for example, the first apparatus 110 in FIG. 1 ) may comprise means for performing the respective operations of the method 600 and / or any of the described one or more example embodiments thereof. The means may be implemented in any suitable form. For example, the means may be implementedin a circuitry or software module. The first apparatus may be implemented as or included in the first apparatus 110 in FIG. 1.

[0083] FIG. 7 shows a flowchart of an example method 700 implemented at a second apparatus in accordance with some example embodiments of the present disclosure. For the purpose of discussion, the method 700 will be described from the perspective of the second apparatus 120 in FIG. 1.

[0084] At block 710, the second apparatus 120 transmits a plurality of repetitions of a synchronization signal based on a time-domain mapping pattern for the synchronization signal. In the time-domain mapping pattern, a time distance between repetitions of the synchronization signal remains same in one or more time periods, or a first time distance between repetitions of the synchronization signal within a first time period is same as a second time distance between repetitions of the synchronization signal within a second time period.

[0085] In some example embodiments, the synchronization signal may comprise a primary synchronization signal or a secondary synchronization signal.

[0086] In some example embodiments, the synchronization signal may be a part of an SSB.

[0087] In some example embodiments, in the time-domain mapping pattern, one or more SSBs may be mapped into one time period, each SSB may contain one repetition of the synchronization signal, and a time distance between repetitions of the synchronization signal in two consecutive SSBs remains same within the one or more time periods.

[0088] In some example embodiments, in the time-domain mapping pattern, an SSB with an even index sequentially may contain a PSS, a first PBCH signal, an SSS and a second PBCH signal, and an SSB with an odd index sequentially may contain the first PBCH signal, the PSS, the second PBCH signal and the SSS.

[0089] In some example embodiments, in the time-domain mapping pattern, one SSB may be mapped across a plurality of time periods, each SSB may contain one repetition of the synchronization signal, and a time distance between repetitions of the synchronization signal in two consecutive SSBs remains same within one time period.

[0090] In some example embodiments, in the time-domain mapping pattern, the SSB sequentially may contain a PSS, a SSS, a first PBCH signal, and a second PBCH signal, and in a plurality of SSBs, repetitions of the PSS may be allocated consecutively in the first time period, repetitions of the SSS may be allocated consecutively in the first time period, repetitions of the first PBCH signal may be allocated consecutively in the second time period, and repetitions of the second PBCH signal may be allocated consecutively in the second time period.

[0091] In some example embodiments, in the time-domain mapping pattern, more than one SSB may be mapped into one time period, each SSB may contain one repetition of the synchronization signal, and the first time distance between repetitions of the synchronization signal in two consecutiveSSBs within the first time period is same as the second time distance between repetitions of the synchronization signal in two consecutive SSBs within the second time period.

[0092] In some example embodiments, in the time-domain mapping pattern, the SSB sequentially may contain a PSS, a first PBCH signal, a SSS and a second PBCH signal, and in a plurality of SSBs, repetitions of the PSS may be allocated consecutively in the first time period, and repetitions of the SSS, repetitions of the first PBCH signal and repetitions of the second PBCH signal may be allocated separately in the second time period.

[0093] In some example embodiments, a plurality of SSBs may be transmitted using a same beam.

[0094] In some example embodiments, the time period may comprise a time slot.

[0095] In some example embodiments, a second apparatus capable of performing any of the method 700 (for example, the second apparatus 120 in FIG. 1) may comprise means for performing the respective operations of the method 700 and / or any of the described one or more example embodiments thereof. The means may be implemented in any suitable form. For example, the means may be implemented in a circuitry or software module. The second apparatus may be implemented as or included in the second apparatus 120 in FIG. 1.

[0096] FIG. 8 is a simplified block diagram of a device 800 that is suitable for implementing example embodiments of the present disclosure. The device 800 may be provided to implement a communication device, for example, the first apparatus 110 or the second apparatus 120 as shown in FIG. 1. As shown, the device 800 includes one or more processors 810, one or more memories 820 coupled to the processor 810, and one or more communication modules 840 coupled to the processor 810.

[0097] The communication module 840 is for bidirectional communications. The communication module 840 has one or more communication interfaces to facilitate communication with one or more other modules or devices. The communication interfaces may represent any interface that is necessary for communication with other network elements. In some example embodiments, the communication module 840 may include at least one antenna.

[0098] The processor 810 may be of any type suitable to the local technical network and may include one or more of the following: general purpose computers, special purpose computers, microprocessors, digital signal processors (DSPs) and processors based on multicore processor architecture, as non-limiting examples. The device 800 may have multiple processors, such as an application specific integrated circuit chip that is slaved in time to a clock which synchronizes the main processor.

[0099] The memory 820 may include one or more non-volatile memories and one or more volatile memories. Examples of the non-volatile memories include, but are not limited to, a Read Only Memory (ROM) 824, an electrically programmable read only memory (EPROM), a flash memory, a hard disk,a compact disc (CD), a digital video disk (DVD), an optical disk, a laser disk, and other magnetic storage and / or optical storage. Examples of the volatile memories include, but are not limited to, a random-access memory (RAM) 822 and other volatile memories that will not last in the power-down duration.

[0100] A computer program 830 includes computer executable instructions that are executed by the associated processor 810. The instructions of the program 830 may include instructions for performing operations / acts of some example embodiments of the present disclosure. The program 830 may be stored in the memory, e.g., the ROM 824. The processor 810 may perform any suitable actions and processing by loading the program 830 into the RAM 822.

[0101] The example embodiments of the present disclosure may be implemented by means of the program 830 so that the device 800 may perform any process of the disclosure as discussed with reference to FIG. 4. The example embodiments of the present disclosure may also be implemented by hardware or by a combination of software and hardware.

[0102] In some example embodiments, the program 830 may be tangibly contained in a computer readable medium which may be included in the device 800 (such as in the memory 820) or other storage devices that are accessible by the device 800. The device 800 may load the program 830 from the computer readable medium to the RAM 822 for execution. In some example embodiments, the computer readable medium may include any types of non-transitory storage medium, such as ROM, EPROM, a flash memory, a hard disk, CD, DVD, and the like. The term “non-transitory,” as used herein, is a limitation of the medium itself (i.e. , tangible, not a signal) as opposed to a limitation on data storage persistency (e.g., RAM vs. ROM).

[0103] FIG. 9 shows an example of the computer readable medium 900 which may be in form of CD, DVD or other optical storage disk. The computer readable medium 900 has the program 830 stored thereon.

[0104] Generally, various embodiments of the present disclosure may be implemented in hardware or special purpose circuits, software, logic or any combination thereof. Some aspects may be implemented in hardware, and other aspects may be implemented in firmware or software which may be executed by a controller, microprocessor or other computing device. Although various aspects of embodiments of the present disclosure are illustrated and described as block diagrams, flowcharts, or using some other pictorial representations, it is to be understood that the block, apparatus, system, technique or method described herein may be implemented in, as non-limiting examples, hardware, software, firmware, special purpose circuits or logic, general purpose hardware or controller or other computing devices, or some combination thereof.

[0105] Some example embodiments of the present disclosure also provide at least one computer program product tangibly stored on a computer readable medium, such as a non-transitory computerreadable medium. The computer program product includes computer-executable instructions, such as those included in program modules, being executed in a device on a target physical or virtual processor, to carry out any of the methods as described above. Generally, program modules include routines, programs, libraries, objects, classes, components, data structures, or the like that perform particular tasks or implement particular abstract data types. The functionality of the program modules may be combined or split between program modules as desired in various embodiments. Machineexecutable instructions for program modules may be executed within a local or distributed device. In a distributed device, program modules may be located in both local and remote storage media.

[0106] Program code for carrying out methods of the present disclosure may be written in any combination of one or more programming languages. The program code may be provided to a processor or controller of a general-purpose computer, special purpose computer, or other programmable data processing apparatus, such that the program code, when executed by the processor or controller, cause the functions / operations specified in the flowcharts and / or block diagrams to be implemented. The program code may execute entirely on a machine, partly on the machine, as a stand-alone software package, partly on the machine and partly on a remote machine or entirely on the remote machine or server.

[0107] In the context of the present disclosure, the computer program code or related data may be carried by any suitable carrier to enable the device, apparatus or processor to perform various processes and operations as described above. Examples of the carrier include a signal, computer readable medium, and the like.

[0108] The computer readable medium may be a computer readable signal medium or a computer readable storage medium. A computer readable medium may include but not limited to an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of the computer readable storage medium would include an electrical connection having one or more wires, a portable computer diskette, a hard disk, a random-access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0109] Further, although operations are depicted in a particular order, this should not be understood as requiring that such operations be performed in the particular order shown or in sequential order, or that all illustrated operations be performed, to achieve desirable results. In certain circumstances, multitasking and parallel processing may be advantageous. Likewise, although several specific implementation details are contained in the above discussions, these should not be construed as limitations on the scope of the present disclosure, but rather as descriptions of features that may bespecific to particular embodiments. Unless explicitly stated, certain features that are described in the context of separate embodiments may also be implemented in combination in a single embodiment. Conversely, unless explicitly stated, various features that are described in the context of a single embodiment may also be implemented in a plurality of embodiments separately or in any suitable subcombination.

[0110] Although the present disclosure has been described in languages specific to structural features and / or methodological acts, it is to be understood that the present disclosure defined in the appended claims is not necessarily limited to the specific features or acts described above. Rather, the specific features and acts described above are disclosed as example forms of implementing the claims.

Claims

WHAT IS CLAIMED IS:

1. A first apparatus comprising:at least one processor; andat least one memory storing instructions that, when executed by the at least one processor, cause the first apparatus at least to:receive, from a second apparatus, a plurality of repetitions of a synchronization signal based on a time-domain mapping pattern for the synchronization signal; anddetect the synchronization signal by combining the plurality of repetitions of the synchronization signal,wherein in the time-domain mapping pattern, a time distance between repetitions of the synchronization signal remains same in one or more time periods, or a first time distance between repetitions of the synchronization signal within a first time period is same as a second time distance between repetitions of the synchronization signal within a second time period.

2. The first apparatus of claim 1, wherein the synchronization signal comprises a primary synchronization signal or a secondary synchronization signal.

3. The first apparatus of claim 1 or 2, wherein the synchronization signal is a part of a synchronization signal and physical broadcast channel (PBCH) block (SSB).

4. The first apparatus of claim 3, wherein in the time-domain mapping pattern, one or more SSBs are mapped into one time period, each SSB contains one repetition of the synchronization signal, and a time distance between repetitions of the synchronization signal in two consecutive SSBs remains same within the one or more time periods.

5. The first apparatus of claim 4, wherein in the time-domain mapping pattern, an SSB with an even index sequentially contains a primary synchronization signal (PSS), a first physical broadcast channel (PBCH) signal, a secondary synchronization signal (SSS) and a second PBCH signal, and an SSB with an odd index sequentially contains the first PBCH signal, the PSS, the second PBCH signal and the SSS.

6. The first apparatus of claim 4 or 5, wherein the plurality of combined repetitions of the synchronization signal are allocated in a same time period or different time periods.

7. The first apparatus of claim 3, wherein in the time-domain mapping pattern, one SSB is mapped across a plurality of time periods, each SSB contains one repetition of the synchronization signal, and a time distance between repetitions of the synchronization signal in two consecutive SSBs remains same within one time period.

8. The first apparatus of claim 7, wherein in the time-domain mapping pattern, the SSB sequentially contains a primary synchronization signal (PSS), a secondary synchronization signal (SSS), a first physical broadcast channel (PBCH) signal, and a second PBCH signal, andin a plurality of SSBs, repetitions of the PSS are allocated consecutively in the first time period, repetitions of the SSS are allocated consecutively in the first time period, repetitions of the first PBCH signal are allocated consecutively in the second time period, and repetitions of the second PBCH signal are allocated consecutively in the second time period.

9. The first apparatus of claim 3, wherein in the time-domain mapping pattern, more than one SSB is mapped into one time period, each SSB contains one repetition of the synchronization signal, and the first time distance between repetitions of the synchronization signal in two consecutive SSBs within the first time period is same as the second time distance between repetitions of the synchronization signal in two consecutive SSBs within the second time period.

10. The first apparatus of claim 9, wherein in the time-domain mapping pattern, the SSB sequentially contains a primary synchronization signal (PSS), a first physical broadcast channel (PBCH) signal, a secondary synchronization signal (SSS) and a second PBCH signal, andin a plurality of SSBs, repetitions of the PSS are allocated consecutively in the first time period, and repetitions of the SSS, repetitions of the first PBCH signal and repetitions of the second PBCH signal are allocated separately in the second time period.

11. The first apparatus of any of claims 7 to 10, wherein the plurality of combined repetitions of the synchronization signal are allocated in a same time period.

12. The first apparatus of any of claims 3 to 11, wherein a plurality of SSBs are transmitted using a same beam.

13. The first apparatus of any of claims 1 to 12, wherein the time period comprises a time slot.

14. A second apparatus comprising:at least one processor; andat least one memory storing instructions that, when executed by the at least one processor, cause the second apparatus at least to:transmit a plurality of repetitions of a synchronization signal based on a time-domain mapping pattern for the synchronization signal,wherein in the time-domain mapping pattern, a time distance between repetitions of the synchronization signal remains same in one or more time periods, or a first time distance between repetitions of the synchronization signal within a first time period is same as a second time distance between repetitions of the synchronization signal within a second time period.

15. The second apparatus of claim 14, wherein the synchronization signal comprises a primary synchronization signal or a secondary synchronization signal.

16. The second apparatus of claim 14 or 15, wherein the synchronization signal is a part of a synchronization signal and physical broadcast channel (PBCH) block (SSB).

17. The second apparatus of claim 16, wherein in the time-domain mapping pattern, one or more SSBs are mapped into one time period, each SSB contains one repetition of the synchronization signal, and a time distance between repetitions of the synchronization signal in two consecutive SSBs remains same within the one or more time periods.

18. The second apparatus of claim 17, wherein in the time-domain mapping pattern, an SSB with an even index sequentially contains a primary synchronization signal (PSS), a first physical broadcast channel (PBCH) signal, a secondary synchronization signal (SSS) and a second PBCH signal, and an SSB with an odd index sequentially contains the first PBCH signal, the PSS, the second PBCH signal and the SSS.

19. The second apparatus of claim 16, wherein in the time-domain mapping pattern, one SSB is mapped across a plurality of time periods, each SSB contains one repetition of the synchronization signal, and a time distance between repetitions of the synchronization signal in two consecutive SSBs remains same within one time period.

20. The second apparatus of claim 19, wherein in the time-domain mapping pattern, the SSB sequentially contains a primary synchronization signal (PSS), a secondary synchronization signal(SSS), a first physical broadcast channel (PBCH) signal, and a second PBCH signal, andin a plurality of SSBs, repetitions of the PSS are allocated consecutively in the first time period, repetitions of the SSS are allocated consecutively in the first time period, repetitions of the first PBCH signal are allocated consecutively in the second time period, and repetitions of the second PBCH signal are allocated consecutively in the second time period.

21. The second apparatus of claim 16, wherein in the time-domain mapping pattern, more than one SSB is mapped into one time period, each SSB contains one repetition of the synchronization signal, and the first time distance between repetitions of the synchronization signal in two consecutive SSBs within the first time period is same as the second time distance between repetitions of the synchronization signal in two consecutive SSBs within the second time period.

22. The second apparatus of claim 21, wherein in the time-domain mapping pattern, the SSB sequentially contains a primary synchronization signal (PSS), a first physical broadcast channel (PBCH) signal, a secondary synchronization signal (SSS) and a second PBCH signal, andin a plurality of SSBs, repetitions of the PSS are allocated consecutively in the first time period, and repetitions of the SSS, repetitions of the first PBCH signal and repetitions of the second PBCH signal are allocated separately in the second time period.

23. The second apparatus of any of claims 16 to 22, wherein a plurality of SSBs are transmitted using a same beam.

24. The second apparatus of any of claims 14 to 23, wherein the time period comprises a time slot.

25. A method comprising:at a first apparatus,receiving, from a second apparatus, a plurality of repetitions of a synchronization signal based on a time-domain mapping pattern for the synchronization signal; anddetecting the synchronization signal by combining the plurality of repetitions of the synchronization signal,wherein in the time-domain mapping pattern, a time distance between repetitions of the synchronization signal remains same in one or more time periods, or a first time distance between repetitions of the synchronization signal within a first time period is same as a second time distance between repetitions of the synchronization signal within a second time period.

26. A method comprising:at a second apparatus,transmitting a plurality of repetitions of a synchronization signal based on a time-domain mapping pattern for the synchronization signal,wherein in the time-domain mapping pattern, a time distance between repetitions of the synchronization signal remains same in one or more time periods, or a first time distance between repetitions of the synchronization signal within a first time period is same as a second time distance between repetitions of the synchronization signal within a second time period.

27. A first apparatus comprising:means for receiving, from a second apparatus, a plurality of repetitions of a synchronization signal based on a time-domain mapping pattern for the synchronization signal; andmeans for detecting the synchronization signal by combining the plurality of repetitions of the synchronization signal,wherein in the time-domain mapping pattern, a time distance between repetitions of the synchronization signal remains same in one or more time periods, or a first time distance between repetitions of the synchronization signal within a first time period is same as a second time distance between repetitions of the synchronization signal within a second time period.

28. A second apparatus comprising:means for transmitting a plurality of repetitions of a synchronization signal based on a timedomain mapping pattern for the synchronization signal,wherein in the time-domain mapping pattern, a time distance between repetitions of the synchronization signal remains same in one or more time periods, or a first time distance between repetitions of the synchronization signal within a first time period is same as a second time distance between repetitions of the synchronization signal within a second time period.

29. A computer readable medium comprising instructions stored thereon for causing an apparatus at least to perform the method of claim 25 or the method of claim 26.

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